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brcmsmac: remove PCIe functions needed for PCIe core rev <= 10
[~andy/linux] / drivers / net / wireless / brcm80211 / brcmsmac / main.c
1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include <linux/pci_ids.h>
20 #include <linux/if_ether.h>
21 #include <net/mac80211.h>
22 #include <brcm_hw_ids.h>
23 #include <aiutils.h>
24 #include <chipcommon.h>
25 #include "rate.h"
26 #include "scb.h"
27 #include "phy/phy_hal.h"
28 #include "channel.h"
29 #include "antsel.h"
30 #include "stf.h"
31 #include "ampdu.h"
32 #include "mac80211_if.h"
33 #include "ucode_loader.h"
34 #include "main.h"
35 #include "soc.h"
36
37 /*
38  * Indication for txflowcontrol that all priority bits in
39  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
40  */
41 #define ALLPRIO                         -1
42
43 /* watchdog timer, in unit of ms */
44 #define TIMER_INTERVAL_WATCHDOG         1000
45 /* radio monitor timer, in unit of ms */
46 #define TIMER_INTERVAL_RADIOCHK         800
47
48 /* beacon interval, in unit of 1024TU */
49 #define BEACON_INTERVAL_DEFAULT         100
50
51 /* n-mode support capability */
52 /* 2x2 includes both 1x1 & 2x2 devices
53  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
54  * control it independently
55  */
56 #define WL_11N_2x2                      1
57 #define WL_11N_3x3                      3
58 #define WL_11N_4x4                      4
59
60 #define EDCF_ACI_MASK                   0x60
61 #define EDCF_ACI_SHIFT                  5
62 #define EDCF_ECWMIN_MASK                0x0f
63 #define EDCF_ECWMAX_SHIFT               4
64 #define EDCF_AIFSN_MASK                 0x0f
65 #define EDCF_AIFSN_MAX                  15
66 #define EDCF_ECWMAX_MASK                0xf0
67
68 #define EDCF_AC_BE_TXOP_STA             0x0000
69 #define EDCF_AC_BK_TXOP_STA             0x0000
70 #define EDCF_AC_VO_ACI_STA              0x62
71 #define EDCF_AC_VO_ECW_STA              0x32
72 #define EDCF_AC_VI_ACI_STA              0x42
73 #define EDCF_AC_VI_ECW_STA              0x43
74 #define EDCF_AC_BK_ECW_STA              0xA4
75 #define EDCF_AC_VI_TXOP_STA             0x005e
76 #define EDCF_AC_VO_TXOP_STA             0x002f
77 #define EDCF_AC_BE_ACI_STA              0x03
78 #define EDCF_AC_BE_ECW_STA              0xA4
79 #define EDCF_AC_BK_ACI_STA              0x27
80 #define EDCF_AC_VO_TXOP_AP              0x002f
81
82 #define EDCF_TXOP2USEC(txop)            ((txop) << 5)
83 #define EDCF_ECW2CW(exp)                ((1 << (exp)) - 1)
84
85 #define APHY_SYMBOL_TIME                4
86 #define APHY_PREAMBLE_TIME              16
87 #define APHY_SIGNAL_TIME                4
88 #define APHY_SIFS_TIME                  16
89 #define APHY_SERVICE_NBITS              16
90 #define APHY_TAIL_NBITS                 6
91 #define BPHY_SIFS_TIME                  10
92 #define BPHY_PLCP_SHORT_TIME            96
93
94 #define PREN_PREAMBLE                   24
95 #define PREN_MM_EXT                     12
96 #define PREN_PREAMBLE_EXT               4
97
98 #define DOT11_MAC_HDR_LEN               24
99 #define DOT11_ACK_LEN                   10
100 #define DOT11_BA_LEN                    4
101 #define DOT11_OFDM_SIGNAL_EXTENSION     6
102 #define DOT11_MIN_FRAG_LEN              256
103 #define DOT11_RTS_LEN                   16
104 #define DOT11_CTS_LEN                   10
105 #define DOT11_BA_BITMAP_LEN             128
106 #define DOT11_MIN_BEACON_PERIOD         1
107 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
108 #define DOT11_MAXNUMFRAGS               16
109 #define DOT11_MAX_FRAG_LEN              2346
110
111 #define BPHY_PLCP_TIME                  192
112 #define RIFS_11N_TIME                   2
113
114 /* length of the BCN template area */
115 #define BCN_TMPL_LEN                    512
116
117 /* brcms_bss_info flag bit values */
118 #define BRCMS_BSS_HT                    0x0020  /* BSS is HT (MIMO) capable */
119
120 /* chip rx buffer offset */
121 #define BRCMS_HWRXOFF                   38
122
123 /* rfdisable delay timer 500 ms, runs of ALP clock */
124 #define RFDISABLE_DEFAULT               10000000
125
126 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
127
128 /* precedences numbers for wlc queues. These are twice as may levels as
129  * 802.1D priorities.
130  * Odd numbers are used for HI priority traffic at same precedence levels
131  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
132  * elsewhere.
133  */
134 #define _BRCMS_PREC_NONE                0       /* None = - */
135 #define _BRCMS_PREC_BK                  2       /* BK - Background */
136 #define _BRCMS_PREC_BE                  4       /* BE - Best-effort */
137 #define _BRCMS_PREC_EE                  6       /* EE - Excellent-effort */
138 #define _BRCMS_PREC_CL                  8       /* CL - Controlled Load */
139 #define _BRCMS_PREC_VI                  10      /* Vi - Video */
140 #define _BRCMS_PREC_VO                  12      /* Vo - Voice */
141 #define _BRCMS_PREC_NC                  14      /* NC - Network Control */
142
143 /* synthpu_dly times in us */
144 #define SYNTHPU_DLY_APHY_US             3700
145 #define SYNTHPU_DLY_BPHY_US             1050
146 #define SYNTHPU_DLY_NPHY_US             2048
147 #define SYNTHPU_DLY_LPPHY_US            300
148
149 #define ANTCNT                          10      /* vanilla M_MAX_ANTCNT val */
150
151 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
152 #define EDCF_SHORT_S                    0
153 #define EDCF_SFB_S                      4
154 #define EDCF_LONG_S                     8
155 #define EDCF_LFB_S                      12
156 #define EDCF_SHORT_M                    BITFIELD_MASK(4)
157 #define EDCF_SFB_M                      BITFIELD_MASK(4)
158 #define EDCF_LONG_M                     BITFIELD_MASK(4)
159 #define EDCF_LFB_M                      BITFIELD_MASK(4)
160
161 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
162 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
163 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
164 #define RETRY_SHORT_FB                  3       /* Short count for fb rate */
165 #define RETRY_LONG_FB                   2       /* Long count for fb rate */
166
167 #define APHY_CWMIN                      15
168 #define PHY_CWMAX                       1023
169
170 #define EDCF_AIFSN_MIN                  1
171
172 #define FRAGNUM_MASK                    0xF
173
174 #define APHY_SLOT_TIME                  9
175 #define BPHY_SLOT_TIME                  20
176
177 #define WL_SPURAVOID_OFF                0
178 #define WL_SPURAVOID_ON1                1
179 #define WL_SPURAVOID_ON2                2
180
181 /* invalid core flags, use the saved coreflags */
182 #define BRCMS_USE_COREFLAGS             0xffffffff
183
184 /* values for PLCPHdr_override */
185 #define BRCMS_PLCP_AUTO                 -1
186 #define BRCMS_PLCP_SHORT                0
187 #define BRCMS_PLCP_LONG                 1
188
189 /* values for g_protection_override and n_protection_override */
190 #define BRCMS_PROTECTION_AUTO           -1
191 #define BRCMS_PROTECTION_OFF            0
192 #define BRCMS_PROTECTION_ON             1
193 #define BRCMS_PROTECTION_MMHDR_ONLY     2
194 #define BRCMS_PROTECTION_CTS_ONLY       3
195
196 /* values for g_protection_control and n_protection_control */
197 #define BRCMS_PROTECTION_CTL_OFF        0
198 #define BRCMS_PROTECTION_CTL_LOCAL      1
199 #define BRCMS_PROTECTION_CTL_OVERLAP    2
200
201 /* values for n_protection */
202 #define BRCMS_N_PROTECTION_OFF          0
203 #define BRCMS_N_PROTECTION_OPTIONAL     1
204 #define BRCMS_N_PROTECTION_20IN40       2
205 #define BRCMS_N_PROTECTION_MIXEDMODE    3
206
207 /* values for band specific 40MHz capabilities */
208 #define BRCMS_N_BW_20ALL                0
209 #define BRCMS_N_BW_40ALL                1
210 #define BRCMS_N_BW_20IN2G_40IN5G        2
211
212 /* bitflags for SGI support (sgi_rx iovar) */
213 #define BRCMS_N_SGI_20                  0x01
214 #define BRCMS_N_SGI_40                  0x02
215
216 /* defines used by the nrate iovar */
217 /* MSC in use,indicates b0-6 holds an mcs */
218 #define NRATE_MCS_INUSE                 0x00000080
219 /* rate/mcs value */
220 #define NRATE_RATE_MASK                 0x0000007f
221 /* stf mode mask: siso, cdd, stbc, sdm */
222 #define NRATE_STF_MASK                  0x0000ff00
223 /* stf mode shift */
224 #define NRATE_STF_SHIFT                 8
225 /* bit indicate to override mcs only */
226 #define NRATE_OVERRIDE_MCS_ONLY         0x40000000
227 #define NRATE_SGI_MASK                  0x00800000      /* sgi mode */
228 #define NRATE_SGI_SHIFT                 23              /* sgi mode */
229 #define NRATE_LDPC_CODING               0x00400000      /* adv coding in use */
230 #define NRATE_LDPC_SHIFT                22              /* ldpc shift */
231
232 #define NRATE_STF_SISO                  0               /* stf mode SISO */
233 #define NRATE_STF_CDD                   1               /* stf mode CDD */
234 #define NRATE_STF_STBC                  2               /* stf mode STBC */
235 #define NRATE_STF_SDM                   3               /* stf mode SDM */
236
237 #define MAX_DMA_SEGS                    4
238
239 /* Max # of entries in Tx FIFO based on 4kb page size */
240 #define NTXD                            256
241 /* Max # of entries in Rx FIFO based on 4kb page size */
242 #define NRXD                            256
243
244 /* try to keep this # rbufs posted to the chip */
245 #define NRXBUFPOST                      32
246
247 /* data msg txq hiwat mark */
248 #define BRCMS_DATAHIWAT                 50
249
250 /* max # frames to process in brcms_c_recv() */
251 #define RXBND                           8
252 /* max # tx status to process in wlc_txstatus() */
253 #define TXSBND                          8
254
255 /* brcmu_format_flags() bit description structure */
256 struct brcms_c_bit_desc {
257         u32 bit;
258         const char *name;
259 };
260
261 /*
262  * The following table lists the buffer memory allocated to xmt fifos in HW.
263  * the size is in units of 256bytes(one block), total size is HW dependent
264  * ucode has default fifo partition, sw can overwrite if necessary
265  *
266  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
267  * the twiki is updated before making changes.
268  */
269
270 /* Starting corerev for the fifo size table */
271 #define XMTFIFOTBL_STARTREV     20
272
273 struct d11init {
274         __le16 addr;
275         __le16 size;
276         __le32 value;
277 };
278
279 struct edcf_acparam {
280         u8 ACI;
281         u8 ECW;
282         u16 TXOP;
283 } __packed;
284
285 const u8 prio2fifo[NUMPRIO] = {
286         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
287         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
288         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
289         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
290         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
291         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
292         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
293         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
294 };
295
296 /* debug/trace */
297 uint brcm_msg_level =
298 #if defined(DEBUG)
299         LOG_ERROR_VAL;
300 #else
301         0;
302 #endif                          /* DEBUG */
303
304 /* TX FIFO number to WME/802.1E Access Category */
305 static const u8 wme_fifo2ac[] = {
306         IEEE80211_AC_BK,
307         IEEE80211_AC_BE,
308         IEEE80211_AC_VI,
309         IEEE80211_AC_VO,
310         IEEE80211_AC_BE,
311         IEEE80211_AC_BE
312 };
313
314 /* ieee80211 Access Category to TX FIFO number */
315 static const u8 wme_ac2fifo[] = {
316         TX_AC_VO_FIFO,
317         TX_AC_VI_FIFO,
318         TX_AC_BE_FIFO,
319         TX_AC_BK_FIFO
320 };
321
322 /* 802.1D Priority to precedence queue mapping */
323 const u8 wlc_prio2prec_map[] = {
324         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
325         _BRCMS_PREC_BK,         /* 1 BK - Background */
326         _BRCMS_PREC_NONE,               /* 2 None = - */
327         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
328         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
329         _BRCMS_PREC_VI,         /* 5 Vi - Video */
330         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
331         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
332 };
333
334 static const u16 xmtfifo_sz[][NFIFO] = {
335         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
336         {20, 192, 192, 21, 17, 5},
337         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
338         {9, 58, 22, 14, 14, 5},
339         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
340         {20, 192, 192, 21, 17, 5},
341         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
342         {20, 192, 192, 21, 17, 5},
343         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
344         {9, 58, 22, 14, 14, 5},
345 };
346
347 #ifdef DEBUG
348 static const char * const fifo_names[] = {
349         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
350 #else
351 static const char fifo_names[6][0];
352 #endif
353
354 #ifdef DEBUG
355 /* pointer to most recently allocated wl/wlc */
356 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
357 #endif
358
359 /* Find basic rate for a given rate */
360 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
361 {
362         if (is_mcs_rate(rspec))
363                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
364                        .leg_ofdm];
365         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
366 }
367
368 static u16 frametype(u32 rspec, u8 mimoframe)
369 {
370         if (is_mcs_rate(rspec))
371                 return mimoframe;
372         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
373 }
374
375 /* currently the best mechanism for determining SIFS is the band in use */
376 static u16 get_sifs(struct brcms_band *band)
377 {
378         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
379                                  BPHY_SIFS_TIME;
380 }
381
382 /*
383  * Detect Card removed.
384  * Even checking an sbconfig register read will not false trigger when the core
385  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
386  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
387  * reg with fixed 0/1 pattern (some platforms return all 0).
388  * If clocks are present, call the sb routine which will figure out if the
389  * device is removed.
390  */
391 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
392 {
393         u32 macctrl;
394
395         if (!wlc->hw->clk)
396                 return ai_deviceremoved(wlc->hw->sih);
397         macctrl = bcma_read32(wlc->hw->d11core,
398                               D11REGOFFS(maccontrol));
399         return (macctrl & (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
400 }
401
402 /* sum the individual fifo tx pending packet counts */
403 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
404 {
405         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
406                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
407 }
408
409 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
410 {
411         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
412 }
413
414 static int brcms_chspec_bw(u16 chanspec)
415 {
416         if (CHSPEC_IS40(chanspec))
417                 return BRCMS_40_MHZ;
418         if (CHSPEC_IS20(chanspec))
419                 return BRCMS_20_MHZ;
420
421         return BRCMS_10_MHZ;
422 }
423
424 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
425 {
426         if (cfg == NULL)
427                 return;
428
429         kfree(cfg->current_bss);
430         kfree(cfg);
431 }
432
433 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
434 {
435         if (wlc == NULL)
436                 return;
437
438         brcms_c_bsscfg_mfree(wlc->bsscfg);
439         kfree(wlc->pub);
440         kfree(wlc->modulecb);
441         kfree(wlc->default_bss);
442         kfree(wlc->protection);
443         kfree(wlc->stf);
444         kfree(wlc->bandstate[0]);
445         kfree(wlc->corestate->macstat_snapshot);
446         kfree(wlc->corestate);
447         kfree(wlc->hw->bandstate[0]);
448         kfree(wlc->hw);
449
450         /* free the wlc */
451         kfree(wlc);
452         wlc = NULL;
453 }
454
455 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
456 {
457         struct brcms_bss_cfg *cfg;
458
459         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
460         if (cfg == NULL)
461                 goto fail;
462
463         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
464         if (cfg->current_bss == NULL)
465                 goto fail;
466
467         return cfg;
468
469  fail:
470         brcms_c_bsscfg_mfree(cfg);
471         return NULL;
472 }
473
474 static struct brcms_c_info *
475 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
476 {
477         struct brcms_c_info *wlc;
478
479         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
480         if (wlc == NULL) {
481                 *err = 1002;
482                 goto fail;
483         }
484
485         /* allocate struct brcms_c_pub state structure */
486         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
487         if (wlc->pub == NULL) {
488                 *err = 1003;
489                 goto fail;
490         }
491         wlc->pub->wlc = wlc;
492
493         /* allocate struct brcms_hardware state structure */
494
495         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
496         if (wlc->hw == NULL) {
497                 *err = 1005;
498                 goto fail;
499         }
500         wlc->hw->wlc = wlc;
501
502         wlc->hw->bandstate[0] =
503                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
504         if (wlc->hw->bandstate[0] == NULL) {
505                 *err = 1006;
506                 goto fail;
507         } else {
508                 int i;
509
510                 for (i = 1; i < MAXBANDS; i++)
511                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
512                             ((unsigned long)wlc->hw->bandstate[0] +
513                              (sizeof(struct brcms_hw_band) * i));
514         }
515
516         wlc->modulecb =
517                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
518         if (wlc->modulecb == NULL) {
519                 *err = 1009;
520                 goto fail;
521         }
522
523         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
524         if (wlc->default_bss == NULL) {
525                 *err = 1010;
526                 goto fail;
527         }
528
529         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
530         if (wlc->bsscfg == NULL) {
531                 *err = 1011;
532                 goto fail;
533         }
534
535         wlc->protection = kzalloc(sizeof(struct brcms_protection),
536                                   GFP_ATOMIC);
537         if (wlc->protection == NULL) {
538                 *err = 1016;
539                 goto fail;
540         }
541
542         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
543         if (wlc->stf == NULL) {
544                 *err = 1017;
545                 goto fail;
546         }
547
548         wlc->bandstate[0] =
549                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
550         if (wlc->bandstate[0] == NULL) {
551                 *err = 1025;
552                 goto fail;
553         } else {
554                 int i;
555
556                 for (i = 1; i < MAXBANDS; i++)
557                         wlc->bandstate[i] = (struct brcms_band *)
558                                 ((unsigned long)wlc->bandstate[0]
559                                 + (sizeof(struct brcms_band)*i));
560         }
561
562         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
563         if (wlc->corestate == NULL) {
564                 *err = 1026;
565                 goto fail;
566         }
567
568         wlc->corestate->macstat_snapshot =
569                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
570         if (wlc->corestate->macstat_snapshot == NULL) {
571                 *err = 1027;
572                 goto fail;
573         }
574
575         return wlc;
576
577  fail:
578         brcms_c_detach_mfree(wlc);
579         return NULL;
580 }
581
582 /*
583  * Update the slot timing for standard 11b/g (20us slots)
584  * or shortslot 11g (9us slots)
585  * The PSM needs to be suspended for this call.
586  */
587 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
588                                         bool shortslot)
589 {
590         struct bcma_device *core = wlc_hw->d11core;
591
592         if (shortslot) {
593                 /* 11g short slot: 11a timing */
594                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0207);
595                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
596         } else {
597                 /* 11g long slot: 11b timing */
598                 bcma_write16(core, D11REGOFFS(ifs_slot), 0x0212);
599                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
600         }
601 }
602
603 /*
604  * calculate frame duration of a given rate and length, return
605  * time in usec unit
606  */
607 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
608                                     u8 preamble_type, uint mac_len)
609 {
610         uint nsyms, dur = 0, Ndps, kNdps;
611         uint rate = rspec2rate(ratespec);
612
613         if (rate == 0) {
614                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
615                           wlc->pub->unit);
616                 rate = BRCM_RATE_1M;
617         }
618
619         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
620                  wlc->pub->unit, ratespec, preamble_type, mac_len);
621
622         if (is_mcs_rate(ratespec)) {
623                 uint mcs = ratespec & RSPEC_RATE_MASK;
624                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
625
626                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
627                 if (preamble_type == BRCMS_MM_PREAMBLE)
628                         dur += PREN_MM_EXT;
629                 /* 1000Ndbps = kbps * 4 */
630                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
631                                    rspec_issgi(ratespec)) * 4;
632
633                 if (rspec_stc(ratespec) == 0)
634                         nsyms =
635                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
636                                   APHY_TAIL_NBITS) * 1000, kNdps);
637                 else
638                         /* STBC needs to have even number of symbols */
639                         nsyms =
640                             2 *
641                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
642                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
643
644                 dur += APHY_SYMBOL_TIME * nsyms;
645                 if (wlc->band->bandtype == BRCM_BAND_2G)
646                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
647         } else if (is_ofdm_rate(rate)) {
648                 dur = APHY_PREAMBLE_TIME;
649                 dur += APHY_SIGNAL_TIME;
650                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
651                 Ndps = rate * 2;
652                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
653                 nsyms =
654                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
655                          Ndps);
656                 dur += APHY_SYMBOL_TIME * nsyms;
657                 if (wlc->band->bandtype == BRCM_BAND_2G)
658                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
659         } else {
660                 /*
661                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
662                  * will divide out
663                  */
664                 mac_len = mac_len * 8 * 2;
665                 /* calc ceiling of bits/rate = microseconds of air time */
666                 dur = (mac_len + rate - 1) / rate;
667                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
668                         dur += BPHY_PLCP_SHORT_TIME;
669                 else
670                         dur += BPHY_PLCP_TIME;
671         }
672         return dur;
673 }
674
675 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
676                                 const struct d11init *inits)
677 {
678         struct bcma_device *core = wlc_hw->d11core;
679         int i;
680         uint offset;
681         u16 size;
682         u32 value;
683
684         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
685
686         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
687                 size = le16_to_cpu(inits[i].size);
688                 offset = le16_to_cpu(inits[i].addr);
689                 value = le32_to_cpu(inits[i].value);
690                 if (size == 2)
691                         bcma_write16(core, offset, value);
692                 else if (size == 4)
693                         bcma_write32(core, offset, value);
694                 else
695                         break;
696         }
697 }
698
699 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
700 {
701         u8 idx;
702         u16 addr[] = {
703                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
704                 M_HOST_FLAGS5
705         };
706
707         for (idx = 0; idx < MHFMAX; idx++)
708                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
709 }
710
711 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
712 {
713         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
714         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
715
716         /* init microcode host flags */
717         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
718
719         /* do band-specific ucode IHR, SHM, and SCR inits */
720         if (D11REV_IS(wlc_hw->corerev, 23)) {
721                 if (BRCMS_ISNPHY(wlc_hw->band))
722                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
723                 else
724                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
725                                   " %d\n", __func__, wlc_hw->unit,
726                                   wlc_hw->corerev);
727         } else {
728                 if (D11REV_IS(wlc_hw->corerev, 24)) {
729                         if (BRCMS_ISLCNPHY(wlc_hw->band))
730                                 brcms_c_write_inits(wlc_hw,
731                                                     ucode->d11lcn0bsinitvals24);
732                         else
733                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
734                                           " core rev %d\n", __func__,
735                                           wlc_hw->unit, wlc_hw->corerev);
736                 } else {
737                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
738                                 __func__, wlc_hw->unit, wlc_hw->corerev);
739                 }
740         }
741 }
742
743 static void brcms_b_core_ioctl(struct brcms_hardware *wlc_hw, u32 m, u32 v)
744 {
745         struct bcma_device *core = wlc_hw->d11core;
746         u32 ioctl = bcma_aread32(core, BCMA_IOCTL) & ~m;
747
748         bcma_awrite32(core, BCMA_IOCTL, ioctl | v);
749 }
750
751 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
752 {
753         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
754
755         wlc_hw->phyclk = clk;
756
757         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
758
759                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC | SICF_GMODE),
760                                    (SICF_PRST | SICF_FGC));
761                 udelay(1);
762                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_PRST);
763                 udelay(1);
764
765         } else {                /* take phy out of reset */
766
767                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_FGC), SICF_FGC);
768                 udelay(1);
769                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
770                 udelay(1);
771
772         }
773 }
774
775 /* low-level band switch utility routine */
776 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
777 {
778         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
779                 bandunit);
780
781         wlc_hw->band = wlc_hw->bandstate[bandunit];
782
783         /*
784          * BMAC_NOTE:
785          *   until we eliminate need for wlc->band refs in low level code
786          */
787         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
788
789         /* set gmode core flag */
790         if (wlc_hw->sbclk && !wlc_hw->noreset) {
791                 u32 gmode = 0;
792
793                 if (bandunit == 0)
794                         gmode = SICF_GMODE;
795
796                 brcms_b_core_ioctl(wlc_hw, SICF_GMODE, gmode);
797         }
798 }
799
800 /* switch to new band but leave it inactive */
801 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
802 {
803         struct brcms_hardware *wlc_hw = wlc->hw;
804         u32 macintmask;
805         u32 macctrl;
806
807         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
808         macctrl = bcma_read32(wlc_hw->d11core,
809                               D11REGOFFS(maccontrol));
810         WARN_ON((macctrl & MCTL_EN_MAC) != 0);
811
812         /* disable interrupts */
813         macintmask = brcms_intrsoff(wlc->wl);
814
815         /* radio off */
816         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
817
818         brcms_b_core_phy_clk(wlc_hw, OFF);
819
820         brcms_c_setxband(wlc_hw, bandunit);
821
822         return macintmask;
823 }
824
825 /* process an individual struct tx_status */
826 static bool
827 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
828 {
829         struct sk_buff *p;
830         uint queue;
831         struct d11txh *txh;
832         struct scb *scb = NULL;
833         bool free_pdu;
834         int tx_rts, tx_frame_count, tx_rts_count;
835         uint totlen, supr_status;
836         bool lastframe;
837         struct ieee80211_hdr *h;
838         u16 mcl;
839         struct ieee80211_tx_info *tx_info;
840         struct ieee80211_tx_rate *txrate;
841         int i;
842
843         /* discard intermediate indications for ucode with one legitimate case:
844          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
845          *   but the subsequent tx of DATA failed. so it will start rts/cts
846          *   from the beginning (resetting the rts transmission count)
847          */
848         if (!(txs->status & TX_STATUS_AMPDU)
849             && (txs->status & TX_STATUS_INTERMEDIATE)) {
850                 BCMMSG(wlc->wiphy, "INTERMEDIATE but not AMPDU\n");
851                 return false;
852         }
853
854         queue = txs->frameid & TXFID_QUEUE_MASK;
855         if (queue >= NFIFO) {
856                 p = NULL;
857                 goto fatal;
858         }
859
860         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
861         if (p == NULL)
862                 goto fatal;
863
864         txh = (struct d11txh *) (p->data);
865         mcl = le16_to_cpu(txh->MacTxControlLow);
866
867         if (txs->phyerr) {
868                 if (brcm_msg_level & LOG_ERROR_VAL) {
869                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
870                                   txs->phyerr, txh->MainRates);
871                         brcms_c_print_txdesc(txh);
872                 }
873                 brcms_c_print_txstatus(txs);
874         }
875
876         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
877                 goto fatal;
878         tx_info = IEEE80211_SKB_CB(p);
879         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
880
881         if (tx_info->control.sta)
882                 scb = &wlc->pri_scb;
883
884         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
885                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
886                 return false;
887         }
888
889         supr_status = txs->status & TX_STATUS_SUPR_MASK;
890         if (supr_status == TX_STATUS_SUPR_BADCH)
891                 BCMMSG(wlc->wiphy,
892                        "%s: Pkt tx suppressed, possibly channel %d\n",
893                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
894
895         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
896         tx_frame_count =
897             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
898         tx_rts_count =
899             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
900
901         lastframe = !ieee80211_has_morefrags(h->frame_control);
902
903         if (!lastframe) {
904                 wiphy_err(wlc->wiphy, "Not last frame!\n");
905         } else {
906                 /*
907                  * Set information to be consumed by Minstrel ht.
908                  *
909                  * The "fallback limit" is the number of tx attempts a given
910                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
911                  * limit are sent at the "secondary" rate.
912                  * A 'short frame' does not exceed RTS treshold.
913                  */
914                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
915                     lfbl,       /* Long Frame Rate Fallback Limit */
916                     fbl;
917
918                 if (queue < IEEE80211_NUM_ACS) {
919                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
920                                       EDCF_SFB);
921                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
922                                       EDCF_LFB);
923                 } else {
924                         sfbl = wlc->SFBL;
925                         lfbl = wlc->LFBL;
926                 }
927
928                 txrate = tx_info->status.rates;
929                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
930                         fbl = lfbl;
931                 else
932                         fbl = sfbl;
933
934                 ieee80211_tx_info_clear_status(tx_info);
935
936                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
937                         /*
938                          * rate selection requested a fallback rate
939                          * and we used it
940                          */
941                         txrate[0].count = fbl;
942                         txrate[1].count = tx_frame_count - fbl;
943                 } else {
944                         /*
945                          * rate selection did not request fallback rate, or
946                          * we didn't need it
947                          */
948                         txrate[0].count = tx_frame_count;
949                         /*
950                          * rc80211_minstrel.c:minstrel_tx_status() expects
951                          * unused rates to be marked with idx = -1
952                          */
953                         txrate[1].idx = -1;
954                         txrate[1].count = 0;
955                 }
956
957                 /* clear the rest of the rates */
958                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
959                         txrate[i].idx = -1;
960                         txrate[i].count = 0;
961                 }
962
963                 if (txs->status & TX_STATUS_ACK_RCV)
964                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
965         }
966
967         totlen = p->len;
968         free_pdu = true;
969
970         brcms_c_txfifo_complete(wlc, queue, 1);
971
972         if (lastframe) {
973                 /* remove PLCP & Broadcom tx descriptor header */
974                 skb_pull(p, D11_PHY_HDR_LEN);
975                 skb_pull(p, D11_TXH_LEN);
976                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
977         } else {
978                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
979                           "tx_status\n", __func__);
980         }
981
982         return false;
983
984  fatal:
985         if (p)
986                 brcmu_pkt_buf_free_skb(p);
987
988         return true;
989
990 }
991
992 /* process tx completion events in BMAC
993  * Return true if more tx status need to be processed. false otherwise.
994  */
995 static bool
996 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
997 {
998         bool morepending = false;
999         struct brcms_c_info *wlc = wlc_hw->wlc;
1000         struct bcma_device *core;
1001         struct tx_status txstatus, *txs;
1002         u32 s1, s2;
1003         uint n = 0;
1004         /*
1005          * Param 'max_tx_num' indicates max. # tx status to process before
1006          * break out.
1007          */
1008         uint max_tx_num = bound ? TXSBND : -1;
1009
1010         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1011
1012         txs = &txstatus;
1013         core = wlc_hw->d11core;
1014         *fatal = false;
1015         s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1016         while (!(*fatal)
1017                && (s1 & TXS_V)) {
1018
1019                 if (s1 == 0xffffffff) {
1020                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1021                                 wlc_hw->unit, __func__);
1022                         return morepending;
1023                 }
1024                 s2 = bcma_read32(core, D11REGOFFS(frmtxstatus2));
1025
1026                 txs->status = s1 & TXS_STATUS_MASK;
1027                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1028                 txs->sequence = s2 & TXS_SEQ_MASK;
1029                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1030                 txs->lasttxtime = 0;
1031
1032                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1033
1034                 /* !give others some time to run! */
1035                 if (++n >= max_tx_num)
1036                         break;
1037                 s1 = bcma_read32(core, D11REGOFFS(frmtxstatus));
1038         }
1039
1040         if (*fatal)
1041                 return 0;
1042
1043         if (n >= max_tx_num)
1044                 morepending = true;
1045
1046         if (!pktq_empty(&wlc->pkt_queue->q))
1047                 brcms_c_send_q(wlc);
1048
1049         return morepending;
1050 }
1051
1052 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1053 {
1054         if (!wlc->bsscfg->BSS)
1055                 /*
1056                  * DirFrmQ is now valid...defer setting until end
1057                  * of ATIM window
1058                  */
1059                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1060 }
1061
1062 /* set initial host flags value */
1063 static void
1064 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1065 {
1066         struct brcms_hardware *wlc_hw = wlc->hw;
1067
1068         memset(mhfs, 0, MHFMAX * sizeof(u16));
1069
1070         mhfs[MHF2] |= mhf2_init;
1071
1072         /* prohibit use of slowclock on multifunction boards */
1073         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1074                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1075
1076         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1077                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1078                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1079         }
1080 }
1081
1082 static uint
1083 dmareg(uint direction, uint fifonum)
1084 {
1085         if (direction == DMA_TX)
1086                 return offsetof(struct d11regs, fifo64regs[fifonum].dmaxmt);
1087         return offsetof(struct d11regs, fifo64regs[fifonum].dmarcv);
1088 }
1089
1090 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1091 {
1092         uint i;
1093         char name[8];
1094         /*
1095          * ucode host flag 2 needed for pio mode, independent of band and fifo
1096          */
1097         u16 pio_mhf2 = 0;
1098         struct brcms_hardware *wlc_hw = wlc->hw;
1099         uint unit = wlc_hw->unit;
1100         struct wiphy *wiphy = wlc->wiphy;
1101
1102         /* name and offsets for dma_attach */
1103         snprintf(name, sizeof(name), "wl%d", unit);
1104
1105         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1106                 int dma_attach_err = 0;
1107
1108                 /*
1109                  * FIFO 0
1110                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1111                  * RX: RX_FIFO (RX data packets)
1112                  */
1113                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1114                                            (wme ? dmareg(DMA_TX, 0) : 0),
1115                                            dmareg(DMA_RX, 0),
1116                                            (wme ? NTXD : 0), NRXD,
1117                                            RXBUFSZ, -1, NRXBUFPOST,
1118                                            BRCMS_HWRXOFF, &brcm_msg_level);
1119                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1120
1121                 /*
1122                  * FIFO 1
1123                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1124                  *   (legacy) TX_DATA_FIFO (TX data packets)
1125                  * RX: UNUSED
1126                  */
1127                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1128                                            dmareg(DMA_TX, 1), 0,
1129                                            NTXD, 0, 0, -1, 0, 0,
1130                                            &brcm_msg_level);
1131                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1132
1133                 /*
1134                  * FIFO 2
1135                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1136                  * RX: UNUSED
1137                  */
1138                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1139                                            dmareg(DMA_TX, 2), 0,
1140                                            NTXD, 0, 0, -1, 0, 0,
1141                                            &brcm_msg_level);
1142                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1143                 /*
1144                  * FIFO 3
1145                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1146                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1147                  */
1148                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, wlc_hw->d11core,
1149                                            dmareg(DMA_TX, 3),
1150                                            0, NTXD, 0, 0, -1,
1151                                            0, 0, &brcm_msg_level);
1152                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1153 /* Cleaner to leave this as if with AP defined */
1154
1155                 if (dma_attach_err) {
1156                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1157                                   "\n", unit);
1158                         return false;
1159                 }
1160
1161                 /* get pointer to dma engine tx flow control variable */
1162                 for (i = 0; i < NFIFO; i++)
1163                         if (wlc_hw->di[i])
1164                                 wlc_hw->txavail[i] =
1165                                     (uint *) dma_getvar(wlc_hw->di[i],
1166                                                         "&txavail");
1167         }
1168
1169         /* initial ucode host flags */
1170         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1171
1172         return true;
1173 }
1174
1175 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1176 {
1177         uint j;
1178
1179         for (j = 0; j < NFIFO; j++) {
1180                 if (wlc_hw->di[j]) {
1181                         dma_detach(wlc_hw->di[j]);
1182                         wlc_hw->di[j] = NULL;
1183                 }
1184         }
1185 }
1186
1187 /*
1188  * Initialize brcms_c_info default values ...
1189  * may get overrides later in this function
1190  *  BMAC_NOTES, move low out and resolve the dangling ones
1191  */
1192 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1193 {
1194         struct brcms_c_info *wlc = wlc_hw->wlc;
1195
1196         /* set default sw macintmask value */
1197         wlc->defmacintmask = DEF_MACINTMASK;
1198
1199         /* various 802.11g modes */
1200         wlc_hw->shortslot = false;
1201
1202         wlc_hw->SFBL = RETRY_SHORT_FB;
1203         wlc_hw->LFBL = RETRY_LONG_FB;
1204
1205         /* default mac retry limits */
1206         wlc_hw->SRL = RETRY_SHORT_DEF;
1207         wlc_hw->LRL = RETRY_LONG_DEF;
1208         wlc_hw->chanspec = ch20mhz_chspec(1);
1209 }
1210
1211 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1212 {
1213         /* delay before first read of ucode state */
1214         udelay(40);
1215
1216         /* wait until ucode is no longer asleep */
1217         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1218                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1219 }
1220
1221 /* control chip clock to save power, enable dynamic clock or force fast clock */
1222 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1223 {
1224         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) {
1225                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1226                  * on backplane, but mac core will still run on ALP(not HT) when
1227                  * it enters powersave mode, which means the FCA bit may not be
1228                  * set. Should wakeup mac if driver wants it to run on HT.
1229                  */
1230
1231                 if (wlc_hw->clk) {
1232                         if (mode == CLK_FAST) {
1233                                 bcma_set32(wlc_hw->d11core,
1234                                            D11REGOFFS(clk_ctl_st),
1235                                            CCS_FORCEHT);
1236
1237                                 udelay(64);
1238
1239                                 SPINWAIT(
1240                                     ((bcma_read32(wlc_hw->d11core,
1241                                       D11REGOFFS(clk_ctl_st)) &
1242                                       CCS_HTAVAIL) == 0),
1243                                       PMU_MAX_TRANSITION_DLY);
1244                                 WARN_ON(!(bcma_read32(wlc_hw->d11core,
1245                                         D11REGOFFS(clk_ctl_st)) &
1246                                         CCS_HTAVAIL));
1247                         } else {
1248                                 if ((ai_get_pmurev(wlc_hw->sih) == 0) &&
1249                                     (bcma_read32(wlc_hw->d11core,
1250                                         D11REGOFFS(clk_ctl_st)) &
1251                                         (CCS_FORCEHT | CCS_HTAREQ)))
1252                                         SPINWAIT(
1253                                             ((bcma_read32(wlc_hw->d11core,
1254                                               offsetof(struct d11regs,
1255                                                        clk_ctl_st)) &
1256                                               CCS_HTAVAIL) == 0),
1257                                               PMU_MAX_TRANSITION_DLY);
1258                                 bcma_mask32(wlc_hw->d11core,
1259                                         D11REGOFFS(clk_ctl_st),
1260                                         ~CCS_FORCEHT);
1261                         }
1262                 }
1263                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1264         } else {
1265
1266                 /* old chips w/o PMU, force HT through cc,
1267                  * then use FCA to verify mac is running fast clock
1268                  */
1269
1270                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1271
1272                 /* check fast clock is available (if core is not in reset) */
1273                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1274                         WARN_ON(!(bcma_aread32(wlc_hw->d11core, BCMA_IOST) &
1275                                   SISF_FCLKA));
1276
1277                 /*
1278                  * keep the ucode wake bit on if forcefastclk is on since we
1279                  * do not want ucode to put us back to slow clock when it dozes
1280                  * for PM mode. Code below matches the wake override bit with
1281                  * current forcefastclk state. Only setting bit in wake_override
1282                  * instead of waking ucode immediately since old code had this
1283                  * behavior. Older code set wlc->forcefastclk but only had the
1284                  * wake happen if the wakup_ucode work (protected by an up
1285                  * check) was executed just below.
1286                  */
1287                 if (wlc_hw->forcefastclk)
1288                         mboolset(wlc_hw->wake_override,
1289                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1290                 else
1291                         mboolclr(wlc_hw->wake_override,
1292                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1293         }
1294 }
1295
1296 /* set or clear ucode host flag bits
1297  * it has an optimization for no-change write
1298  * it only writes through shared memory when the core has clock;
1299  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1300  *
1301  *
1302  * bands values are: BRCM_BAND_AUTO <--- Current band only
1303  *                   BRCM_BAND_5G   <--- 5G band only
1304  *                   BRCM_BAND_2G   <--- 2G band only
1305  *                   BRCM_BAND_ALL  <--- All bands
1306  */
1307 void
1308 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1309              int bands)
1310 {
1311         u16 save;
1312         u16 addr[MHFMAX] = {
1313                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1314                 M_HOST_FLAGS5
1315         };
1316         struct brcms_hw_band *band;
1317
1318         if ((val & ~mask) || idx >= MHFMAX)
1319                 return; /* error condition */
1320
1321         switch (bands) {
1322                 /* Current band only or all bands,
1323                  * then set the band to current band
1324                  */
1325         case BRCM_BAND_AUTO:
1326         case BRCM_BAND_ALL:
1327                 band = wlc_hw->band;
1328                 break;
1329         case BRCM_BAND_5G:
1330                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1331                 break;
1332         case BRCM_BAND_2G:
1333                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1334                 break;
1335         default:
1336                 band = NULL;    /* error condition */
1337         }
1338
1339         if (band) {
1340                 save = band->mhfs[idx];
1341                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1342
1343                 /* optimization: only write through if changed, and
1344                  * changed band is the current band
1345                  */
1346                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1347                     && (band == wlc_hw->band))
1348                         brcms_b_write_shm(wlc_hw, addr[idx],
1349                                            (u16) band->mhfs[idx]);
1350         }
1351
1352         if (bands == BRCM_BAND_ALL) {
1353                 wlc_hw->bandstate[0]->mhfs[idx] =
1354                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1355                 wlc_hw->bandstate[1]->mhfs[idx] =
1356                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1357         }
1358 }
1359
1360 /* set the maccontrol register to desired reset state and
1361  * initialize the sw cache of the register
1362  */
1363 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1364 {
1365         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1366         wlc_hw->maccontrol = 0;
1367         wlc_hw->suspended_fifos = 0;
1368         wlc_hw->wake_override = 0;
1369         wlc_hw->mute_override = 0;
1370         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1371 }
1372
1373 /*
1374  * write the software state of maccontrol and
1375  * overrides to the maccontrol register
1376  */
1377 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1378 {
1379         u32 maccontrol = wlc_hw->maccontrol;
1380
1381         /* OR in the wake bit if overridden */
1382         if (wlc_hw->wake_override)
1383                 maccontrol |= MCTL_WAKE;
1384
1385         /* set AP and INFRA bits for mute if needed */
1386         if (wlc_hw->mute_override) {
1387                 maccontrol &= ~(MCTL_AP);
1388                 maccontrol |= MCTL_INFRA;
1389         }
1390
1391         bcma_write32(wlc_hw->d11core, D11REGOFFS(maccontrol),
1392                      maccontrol);
1393 }
1394
1395 /* set or clear maccontrol bits */
1396 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1397 {
1398         u32 maccontrol;
1399         u32 new_maccontrol;
1400
1401         if (val & ~mask)
1402                 return; /* error condition */
1403         maccontrol = wlc_hw->maccontrol;
1404         new_maccontrol = (maccontrol & ~mask) | val;
1405
1406         /* if the new maccontrol value is the same as the old, nothing to do */
1407         if (new_maccontrol == maccontrol)
1408                 return;
1409
1410         /* something changed, cache the new value */
1411         wlc_hw->maccontrol = new_maccontrol;
1412
1413         /* write the new values with overrides applied */
1414         brcms_c_mctrl_write(wlc_hw);
1415 }
1416
1417 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1418                                  u32 override_bit)
1419 {
1420         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1421                 mboolset(wlc_hw->wake_override, override_bit);
1422                 return;
1423         }
1424
1425         mboolset(wlc_hw->wake_override, override_bit);
1426
1427         brcms_c_mctrl_write(wlc_hw);
1428         brcms_b_wait_for_wake(wlc_hw);
1429 }
1430
1431 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1432                                    u32 override_bit)
1433 {
1434         mboolclr(wlc_hw->wake_override, override_bit);
1435
1436         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1437                 return;
1438
1439         brcms_c_mctrl_write(wlc_hw);
1440 }
1441
1442 /* When driver needs ucode to stop beaconing, it has to make sure that
1443  * MCTL_AP is clear and MCTL_INFRA is set
1444  * Mode           MCTL_AP        MCTL_INFRA
1445  * AP                1              1
1446  * STA               0              1 <--- This will ensure no beacons
1447  * IBSS              0              0
1448  */
1449 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1450 {
1451         wlc_hw->mute_override = 1;
1452
1453         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1454          * override, then there is no change to write
1455          */
1456         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1457                 return;
1458
1459         brcms_c_mctrl_write(wlc_hw);
1460 }
1461
1462 /* Clear the override on AP and INFRA bits */
1463 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1464 {
1465         if (wlc_hw->mute_override == 0)
1466                 return;
1467
1468         wlc_hw->mute_override = 0;
1469
1470         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1471          * override, then there is no change to write
1472          */
1473         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1474                 return;
1475
1476         brcms_c_mctrl_write(wlc_hw);
1477 }
1478
1479 /*
1480  * Write a MAC address to the given match reg offset in the RXE match engine.
1481  */
1482 static void
1483 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1484                        const u8 *addr)
1485 {
1486         struct bcma_device *core = wlc_hw->d11core;
1487         u16 mac_l;
1488         u16 mac_m;
1489         u16 mac_h;
1490
1491         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1492                  wlc_hw->unit);
1493
1494         mac_l = addr[0] | (addr[1] << 8);
1495         mac_m = addr[2] | (addr[3] << 8);
1496         mac_h = addr[4] | (addr[5] << 8);
1497
1498         /* enter the MAC addr into the RXE match registers */
1499         bcma_write16(core, D11REGOFFS(rcm_ctl),
1500                      RCM_INC_DATA | match_reg_offset);
1501         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_l);
1502         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_m);
1503         bcma_write16(core, D11REGOFFS(rcm_mat_data), mac_h);
1504 }
1505
1506 void
1507 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1508                             void *buf)
1509 {
1510         struct bcma_device *core = wlc_hw->d11core;
1511         u32 word;
1512         __le32 word_le;
1513         __be32 word_be;
1514         bool be_bit;
1515         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1516
1517         bcma_write32(core, D11REGOFFS(tplatewrptr), offset);
1518
1519         /* if MCTL_BIGEND bit set in mac control register,
1520          * the chip swaps data in fifo, as well as data in
1521          * template ram
1522          */
1523         be_bit = (bcma_read32(core, D11REGOFFS(maccontrol)) & MCTL_BIGEND) != 0;
1524
1525         while (len > 0) {
1526                 memcpy(&word, buf, sizeof(u32));
1527
1528                 if (be_bit) {
1529                         word_be = cpu_to_be32(word);
1530                         word = *(u32 *)&word_be;
1531                 } else {
1532                         word_le = cpu_to_le32(word);
1533                         word = *(u32 *)&word_le;
1534                 }
1535
1536                 bcma_write32(core, D11REGOFFS(tplatewrdata), word);
1537
1538                 buf = (u8 *) buf + sizeof(u32);
1539                 len -= sizeof(u32);
1540         }
1541 }
1542
1543 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1544 {
1545         wlc_hw->band->CWmin = newmin;
1546
1547         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1548                      OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1549         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1550         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmin);
1551 }
1552
1553 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1554 {
1555         wlc_hw->band->CWmax = newmax;
1556
1557         bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
1558                      OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1559         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
1560         bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), newmax);
1561 }
1562
1563 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1564 {
1565         bool fastclk;
1566
1567         /* request FAST clock if not on */
1568         fastclk = wlc_hw->forcefastclk;
1569         if (!fastclk)
1570                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1571
1572         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1573
1574         brcms_b_phy_reset(wlc_hw);
1575         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1576
1577         /* restore the clk */
1578         if (!fastclk)
1579                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1580 }
1581
1582 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1583 {
1584         u16 v;
1585         struct brcms_c_info *wlc = wlc_hw->wlc;
1586         /* update SYNTHPU_DLY */
1587
1588         if (BRCMS_ISLCNPHY(wlc->band))
1589                 v = SYNTHPU_DLY_LPPHY_US;
1590         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1591                 v = SYNTHPU_DLY_NPHY_US;
1592         else
1593                 v = SYNTHPU_DLY_BPHY_US;
1594
1595         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1596 }
1597
1598 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1599 {
1600         u16 phyctl;
1601         u16 phytxant = wlc_hw->bmac_phytxant;
1602         u16 mask = PHY_TXC_ANT_MASK;
1603
1604         /* set the Probe Response frame phy control word */
1605         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1606         phyctl = (phyctl & ~mask) | phytxant;
1607         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1608
1609         /* set the Response (ACK/CTS) frame phy control word */
1610         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1611         phyctl = (phyctl & ~mask) | phytxant;
1612         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1613 }
1614
1615 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1616                                          u8 rate)
1617 {
1618         uint i;
1619         u8 plcp_rate = 0;
1620         struct plcp_signal_rate_lookup {
1621                 u8 rate;
1622                 u8 signal_rate;
1623         };
1624         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1625         const struct plcp_signal_rate_lookup rate_lookup[] = {
1626                 {BRCM_RATE_6M, 0xB},
1627                 {BRCM_RATE_9M, 0xF},
1628                 {BRCM_RATE_12M, 0xA},
1629                 {BRCM_RATE_18M, 0xE},
1630                 {BRCM_RATE_24M, 0x9},
1631                 {BRCM_RATE_36M, 0xD},
1632                 {BRCM_RATE_48M, 0x8},
1633                 {BRCM_RATE_54M, 0xC}
1634         };
1635
1636         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1637                 if (rate == rate_lookup[i].rate) {
1638                         plcp_rate = rate_lookup[i].signal_rate;
1639                         break;
1640                 }
1641         }
1642
1643         /* Find the SHM pointer to the rate table entry by looking in the
1644          * Direct-map Table
1645          */
1646         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1647 }
1648
1649 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1650 {
1651         u8 rate;
1652         u8 rates[8] = {
1653                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1654                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1655         };
1656         u16 entry_ptr;
1657         u16 pctl1;
1658         uint i;
1659
1660         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1661                 return;
1662
1663         /* walk the phy rate table and update the entries */
1664         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1665                 rate = rates[i];
1666
1667                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1668
1669                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1670                 pctl1 =
1671                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1672
1673                 /* modify the value */
1674                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1675                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1676
1677                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1678                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1679                                    pctl1);
1680         }
1681 }
1682
1683 /* band-specific init */
1684 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1685 {
1686         struct brcms_hardware *wlc_hw = wlc->hw;
1687
1688         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1689                 wlc_hw->band->bandunit);
1690
1691         brcms_c_ucode_bsinit(wlc_hw);
1692
1693         wlc_phy_init(wlc_hw->band->pi, chanspec);
1694
1695         brcms_c_ucode_txant_set(wlc_hw);
1696
1697         /*
1698          * cwmin is band-specific, update hardware
1699          * with value for current band
1700          */
1701         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1702         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1703
1704         brcms_b_update_slot_timing(wlc_hw,
1705                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1706                                    true : wlc_hw->shortslot);
1707
1708         /* write phytype and phyvers */
1709         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1710         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1711
1712         /*
1713          * initialize the txphyctl1 rate table since
1714          * shmem is shared between bands
1715          */
1716         brcms_upd_ofdm_pctl1_table(wlc_hw);
1717
1718         brcms_b_upd_synthpu(wlc_hw);
1719 }
1720
1721 /* Perform a soft reset of the PHY PLL */
1722 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1723 {
1724         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1725
1726         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_addr),
1727                   ~0, 0);
1728         udelay(1);
1729         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1730                   0x4, 0);
1731         udelay(1);
1732         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1733                   0x4, 4);
1734         udelay(1);
1735         ai_cc_reg(wlc_hw->sih, offsetof(struct chipcregs, chipcontrol_data),
1736                   0x4, 0);
1737         udelay(1);
1738 }
1739
1740 /* light way to turn on phy clock without reset for NPHY only
1741  *  refer to brcms_b_core_phy_clk for full version
1742  */
1743 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1744 {
1745         /* support(necessary for NPHY and HYPHY) only */
1746         if (!BRCMS_ISNPHY(wlc_hw->band))
1747                 return;
1748
1749         if (ON == clk)
1750                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, SICF_FGC);
1751         else
1752                 brcms_b_core_ioctl(wlc_hw, SICF_FGC, 0);
1753
1754 }
1755
1756 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1757 {
1758         if (ON == clk)
1759                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, SICF_MPCLKE);
1760         else
1761                 brcms_b_core_ioctl(wlc_hw, SICF_MPCLKE, 0);
1762 }
1763
1764 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1765 {
1766         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1767         u32 phy_bw_clkbits;
1768         bool phy_in_reset = false;
1769
1770         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1771
1772         if (pih == NULL)
1773                 return;
1774
1775         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1776
1777         /* Specific reset sequence required for NPHY rev 3 and 4 */
1778         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1779             NREV_LE(wlc_hw->band->phyrev, 4)) {
1780                 /* Set the PHY bandwidth */
1781                 brcms_b_core_ioctl(wlc_hw, SICF_BWMASK, phy_bw_clkbits);
1782
1783                 udelay(1);
1784
1785                 /* Perform a soft reset of the PHY PLL */
1786                 brcms_b_core_phypll_reset(wlc_hw);
1787
1788                 /* reset the PHY */
1789                 brcms_b_core_ioctl(wlc_hw, (SICF_PRST | SICF_PCLKE),
1790                                    (SICF_PRST | SICF_PCLKE));
1791                 phy_in_reset = true;
1792         } else {
1793                 brcms_b_core_ioctl(wlc_hw,
1794                                    (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1795                                    (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1796         }
1797
1798         udelay(2);
1799         brcms_b_core_phy_clk(wlc_hw, ON);
1800
1801         if (pih)
1802                 wlc_phy_anacore(pih, ON);
1803 }
1804
1805 /* switch to and initialize new band */
1806 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1807                             u16 chanspec) {
1808         struct brcms_c_info *wlc = wlc_hw->wlc;
1809         u32 macintmask;
1810
1811         /* Enable the d11 core before accessing it */
1812         if (!bcma_core_is_enabled(wlc_hw->d11core)) {
1813                 bcma_core_enable(wlc_hw->d11core, 0);
1814                 brcms_c_mctrl_reset(wlc_hw);
1815         }
1816
1817         macintmask = brcms_c_setband_inact(wlc, bandunit);
1818
1819         if (!wlc_hw->up)
1820                 return;
1821
1822         brcms_b_core_phy_clk(wlc_hw, ON);
1823
1824         /* band-specific initializations */
1825         brcms_b_bsinit(wlc, chanspec);
1826
1827         /*
1828          * If there are any pending software interrupt bits,
1829          * then replace these with a harmless nonzero value
1830          * so brcms_c_dpc() will re-enable interrupts when done.
1831          */
1832         if (wlc->macintstatus)
1833                 wlc->macintstatus = MI_DMAINT;
1834
1835         /* restore macintmask */
1836         brcms_intrsrestore(wlc->wl, macintmask);
1837
1838         /* ucode should still be suspended.. */
1839         WARN_ON((bcma_read32(wlc_hw->d11core, D11REGOFFS(maccontrol)) &
1840                  MCTL_EN_MAC) != 0);
1841 }
1842
1843 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1844 {
1845
1846         /* reject unsupported corerev */
1847         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1848                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1849                           wlc_hw->corerev);
1850                 return false;
1851         }
1852
1853         return true;
1854 }
1855
1856 /* Validate some board info parameters */
1857 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1858 {
1859         uint boardrev = wlc_hw->boardrev;
1860
1861         /* 4 bits each for board type, major, minor, and tiny version */
1862         uint brt = (boardrev & 0xf000) >> 12;
1863         uint b0 = (boardrev & 0xf00) >> 8;
1864         uint b1 = (boardrev & 0xf0) >> 4;
1865         uint b2 = boardrev & 0xf;
1866
1867         /* voards from other vendors are always considered valid */
1868         if (ai_get_boardvendor(wlc_hw->sih) != PCI_VENDOR_ID_BROADCOM)
1869                 return true;
1870
1871         /* do some boardrev sanity checks when boardvendor is Broadcom */
1872         if (boardrev == 0)
1873                 return false;
1874
1875         if (boardrev <= 0xff)
1876                 return true;
1877
1878         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1879                 || (b2 > 9))
1880                 return false;
1881
1882         return true;
1883 }
1884
1885 static void brcms_c_get_macaddr(struct brcms_hardware *wlc_hw, u8 etheraddr[ETH_ALEN])
1886 {
1887         struct ssb_sprom *sprom = &wlc_hw->d11core->bus->sprom;
1888
1889         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1890         if (!is_zero_ether_addr(sprom->il0mac)) {
1891                 memcpy(etheraddr, sprom->il0mac, 6);
1892                 return;
1893         }
1894
1895         if (wlc_hw->_nbands > 1)
1896                 memcpy(etheraddr, sprom->et1mac, 6);
1897         else
1898                 memcpy(etheraddr, sprom->il0mac, 6);
1899 }
1900
1901 /* power both the pll and external oscillator on/off */
1902 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1903 {
1904         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1905
1906         /*
1907          * dont power down if plldown is false or
1908          * we must poll hw radio disable
1909          */
1910         if (!want && wlc_hw->pllreq)
1911                 return;
1912
1913         wlc_hw->sbclk = want;
1914         if (!wlc_hw->sbclk) {
1915                 wlc_hw->clk = false;
1916                 if (wlc_hw->band && wlc_hw->band->pi)
1917                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1918         }
1919 }
1920
1921 /*
1922  * Return true if radio is disabled, otherwise false.
1923  * hw radio disable signal is an external pin, users activate it asynchronously
1924  * this function could be called when driver is down and w/o clock
1925  * it operates on different registers depending on corerev and boardflag.
1926  */
1927 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1928 {
1929         bool v, clk, xtal;
1930         u32 flags = 0;
1931
1932         xtal = wlc_hw->sbclk;
1933         if (!xtal)
1934                 brcms_b_xtal(wlc_hw, ON);
1935
1936         /* may need to take core out of reset first */
1937         clk = wlc_hw->clk;
1938         if (!clk) {
1939                 /*
1940                  * mac no longer enables phyclk automatically when driver
1941                  * accesses phyreg throughput mac. This can be skipped since
1942                  * only mac reg is accessed below
1943                  */
1944                 flags |= SICF_PCLKE;
1945
1946                 /*
1947                  * TODO: test suspend/resume
1948                  *
1949                  * AI chip doesn't restore bar0win2 on
1950                  * hibernation/resume, need sw fixup
1951                  */
1952
1953                 bcma_core_enable(wlc_hw->d11core, flags);
1954                 brcms_c_mctrl_reset(wlc_hw);
1955         }
1956
1957         v = ((bcma_read32(wlc_hw->d11core,
1958                           D11REGOFFS(phydebug)) & PDBG_RFD) != 0);
1959
1960         /* put core back into reset */
1961         if (!clk)
1962                 bcma_core_disable(wlc_hw->d11core, 0);
1963
1964         if (!xtal)
1965                 brcms_b_xtal(wlc_hw, OFF);
1966
1967         return v;
1968 }
1969
1970 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1971 {
1972         struct dma_pub *di = wlc_hw->di[fifo];
1973         return dma_rxreset(di);
1974 }
1975
1976 /* d11 core reset
1977  *   ensure fask clock during reset
1978  *   reset dma
1979  *   reset d11(out of reset)
1980  *   reset phy(out of reset)
1981  *   clear software macintstatus for fresh new start
1982  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1983  */
1984 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1985 {
1986         uint i;
1987         bool fastclk;
1988
1989         if (flags == BRCMS_USE_COREFLAGS)
1990                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
1991
1992         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1993
1994         /* request FAST clock if not on  */
1995         fastclk = wlc_hw->forcefastclk;
1996         if (!fastclk)
1997                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1998
1999         /* reset the dma engines except first time thru */
2000         if (bcma_core_is_enabled(wlc_hw->d11core)) {
2001                 for (i = 0; i < NFIFO; i++)
2002                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2003                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2004                                           "dma_txreset[%d]: cannot stop dma\n",
2005                                            wlc_hw->unit, __func__, i);
2006
2007                 if ((wlc_hw->di[RX_FIFO])
2008                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2009                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2010                                   "[%d]: cannot stop dma\n",
2011                                   wlc_hw->unit, __func__, RX_FIFO);
2012         }
2013         /* if noreset, just stop the psm and return */
2014         if (wlc_hw->noreset) {
2015                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2016                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2017                 return;
2018         }
2019
2020         /*
2021          * mac no longer enables phyclk automatically when driver accesses
2022          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2023          * band->pi is invalid. need to enable PHY CLK
2024          */
2025         flags |= SICF_PCLKE;
2026
2027         /*
2028          * reset the core
2029          * In chips with PMU, the fastclk request goes through d11 core
2030          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2031          *
2032          * This adds some delay and we can optimize it by also requesting
2033          * fastclk through chipcommon during this period if necessary. But
2034          * that has to work coordinate with other driver like mips/arm since
2035          * they may touch chipcommon as well.
2036          */
2037         wlc_hw->clk = false;
2038         bcma_core_enable(wlc_hw->d11core, flags);
2039         wlc_hw->clk = true;
2040         if (wlc_hw->band && wlc_hw->band->pi)
2041                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2042
2043         brcms_c_mctrl_reset(wlc_hw);
2044
2045         if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU)
2046                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2047
2048         brcms_b_phy_reset(wlc_hw);
2049
2050         /* turn on PHY_PLL */
2051         brcms_b_core_phypll_ctl(wlc_hw, true);
2052
2053         /* clear sw intstatus */
2054         wlc_hw->wlc->macintstatus = 0;
2055
2056         /* restore the clk setting */
2057         if (!fastclk)
2058                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2059 }
2060
2061 /* txfifo sizes needs to be modified(increased) since the newer cores
2062  * have more memory.
2063  */
2064 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2065 {
2066         struct bcma_device *core = wlc_hw->d11core;
2067         u16 fifo_nu;
2068         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2069         u16 txfifo_def, txfifo_def1;
2070         u16 txfifo_cmd;
2071
2072         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2073         txfifo_startblk = TXFIFO_START_BLK;
2074
2075         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2076         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2077
2078                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2079                 txfifo_def = (txfifo_startblk & 0xff) |
2080                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2081                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2082                     ((((txfifo_endblk -
2083                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2084                 txfifo_cmd =
2085                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2086
2087                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2088                 bcma_write16(core, D11REGOFFS(xmtfifodef), txfifo_def);
2089                 bcma_write16(core, D11REGOFFS(xmtfifodef1), txfifo_def1);
2090
2091                 bcma_write16(core, D11REGOFFS(xmtfifocmd), txfifo_cmd);
2092
2093                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2094         }
2095         /*
2096          * need to propagate to shm location to be in sync since ucode/hw won't
2097          * do this
2098          */
2099         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2100                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2101         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2102                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2103         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2104                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2105                             xmtfifo_sz[TX_AC_BK_FIFO]));
2106         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2107                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2108                             xmtfifo_sz[TX_BCMC_FIFO]));
2109 }
2110
2111 /* This function is used for changing the tsf frac register
2112  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2113  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2114  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2115  * HTPHY Formula is 2^26/freq(MHz) e.g.
2116  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2117  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2118  * For spuron: 123MHz -> 2^26/123    = 545600.5
2119  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2120  * For spur off: 120MHz -> 2^26/120    = 559240.5
2121  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2122  */
2123
2124 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2125 {
2126         struct bcma_device *core = wlc_hw->d11core;
2127
2128         if ((ai_get_chip_id(wlc_hw->sih) == BCM43224_CHIP_ID) ||
2129             (ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID)) {
2130                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2131                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x2082);
2132                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2133                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2134                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x5341);
2135                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2136                 } else {        /* 120Mhz */
2137                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x8889);
2138                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0x8);
2139                 }
2140         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2141                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2142                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0x7CE0);
2143                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2144                 } else {        /* 80Mhz */
2145                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_l), 0xCCCD);
2146                         bcma_write16(core, D11REGOFFS(tsf_clk_frac_h), 0xC);
2147                 }
2148         }
2149 }
2150
2151 /* Initialize GPIOs that are controlled by D11 core */
2152 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2153 {
2154         struct brcms_hardware *wlc_hw = wlc->hw;
2155         u32 gc, gm;
2156
2157         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2158         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2159
2160         /*
2161          * Common GPIO setup:
2162          *      G0 = LED 0 = WLAN Activity
2163          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2164          *      G2 = LED 2 = WLAN 5 GHz Radio State
2165          *      G4 = radio disable input (HI enabled, LO disabled)
2166          */
2167
2168         gc = gm = 0;
2169
2170         /* Allocate GPIOs for mimo antenna diversity feature */
2171         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2172                 /* Enable antenna diversity, use 2x3 mode */
2173                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2174                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2175                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2176                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2177
2178                 /* init superswitch control */
2179                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2180
2181         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2182                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2183                 /*
2184                  * The board itself is powered by these GPIOs
2185                  * (when not sending pattern) so set them high
2186                  */
2187                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_oe),
2188                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2189                 bcma_set16(wlc_hw->d11core, D11REGOFFS(psm_gpio_out),
2190                            (BOARD_GPIO_12 | BOARD_GPIO_13));
2191
2192                 /* Enable antenna diversity, use 2x4 mode */
2193                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2194                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2195                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2196                              BRCM_BAND_ALL);
2197
2198                 /* Configure the desired clock to be 4Mhz */
2199                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2200                                    ANTSEL_CLKDIV_4MHZ);
2201         }
2202
2203         /*
2204          * gpio 9 controls the PA. ucode is responsible
2205          * for wiggling out and oe
2206          */
2207         if (wlc_hw->boardflags & BFL_PACTRL)
2208                 gm |= gc |= BOARD_GPIO_PACTRL;
2209
2210         /* apply to gpiocontrol register */
2211         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2212 }
2213
2214 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2215                               const __le32 ucode[], const size_t nbytes)
2216 {
2217         struct bcma_device *core = wlc_hw->d11core;
2218         uint i;
2219         uint count;
2220
2221         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2222
2223         count = (nbytes / sizeof(u32));
2224
2225         bcma_write32(core, D11REGOFFS(objaddr),
2226                      OBJADDR_AUTO_INC | OBJADDR_UCM_SEL);
2227         (void)bcma_read32(core, D11REGOFFS(objaddr));
2228         for (i = 0; i < count; i++)
2229                 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i]));
2230
2231 }
2232
2233 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2234 {
2235         struct brcms_c_info *wlc;
2236         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2237
2238         wlc = wlc_hw->wlc;
2239
2240         if (wlc_hw->ucode_loaded)
2241                 return;
2242
2243         if (D11REV_IS(wlc_hw->corerev, 23)) {
2244                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2245                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2246                                           ucode->bcm43xx_16_mimosz);
2247                         wlc_hw->ucode_loaded = true;
2248                 } else
2249                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2250                                   "corerev %d\n",
2251                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2252         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2253                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2254                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2255                                           ucode->bcm43xx_24_lcnsz);
2256                         wlc_hw->ucode_loaded = true;
2257                 } else {
2258                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2259                                   "corerev %d\n",
2260                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2261                 }
2262         }
2263 }
2264
2265 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2266 {
2267         /* update sw state */
2268         wlc_hw->bmac_phytxant = phytxant;
2269
2270         /* push to ucode if up */
2271         if (!wlc_hw->up)
2272                 return;
2273         brcms_c_ucode_txant_set(wlc_hw);
2274
2275 }
2276
2277 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2278 {
2279         return (u16) wlc_hw->wlc->stf->txant;
2280 }
2281
2282 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2283 {
2284         wlc_hw->antsel_type = antsel_type;
2285
2286         /* Update the antsel type for phy module to use */
2287         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2288 }
2289
2290 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2291 {
2292         bool fatal = false;
2293         uint unit;
2294         uint intstatus, idx;
2295         struct bcma_device *core = wlc_hw->d11core;
2296         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2297
2298         unit = wlc_hw->unit;
2299
2300         for (idx = 0; idx < NFIFO; idx++) {
2301                 /* read intstatus register and ignore any non-error bits */
2302                 intstatus =
2303                         bcma_read32(core,
2304                                     D11REGOFFS(intctrlregs[idx].intstatus)) &
2305                         I_ERRORS;
2306                 if (!intstatus)
2307                         continue;
2308
2309                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2310                         unit, idx, intstatus);
2311
2312                 if (intstatus & I_RO) {
2313                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2314                                   "overflow\n", unit, idx);
2315                         fatal = true;
2316                 }
2317
2318                 if (intstatus & I_PC) {
2319                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2320                                  unit, idx);
2321                         fatal = true;
2322                 }
2323
2324                 if (intstatus & I_PD) {
2325                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2326                                   idx);
2327                         fatal = true;
2328                 }
2329
2330                 if (intstatus & I_DE) {
2331                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2332                                   "error\n", unit, idx);
2333                         fatal = true;
2334                 }
2335
2336                 if (intstatus & I_RU)
2337                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2338                                   "underflow\n", idx, unit);
2339
2340                 if (intstatus & I_XU) {
2341                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2342                                   "underflow\n", idx, unit);
2343                         fatal = true;
2344                 }
2345
2346                 if (fatal) {
2347                         brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2348                         break;
2349                 } else
2350                         bcma_write32(core,
2351                                      D11REGOFFS(intctrlregs[idx].intstatus),
2352                                      intstatus);
2353         }
2354 }
2355
2356 void brcms_c_intrson(struct brcms_c_info *wlc)
2357 {
2358         struct brcms_hardware *wlc_hw = wlc->hw;
2359         wlc->macintmask = wlc->defmacintmask;
2360         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2361 }
2362
2363 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2364 {
2365         struct brcms_hardware *wlc_hw = wlc->hw;
2366         u32 macintmask;
2367
2368         if (!wlc_hw->clk)
2369                 return 0;
2370
2371         macintmask = wlc->macintmask;   /* isr can still happen */
2372
2373         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), 0);
2374         (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(macintmask));
2375         udelay(1);              /* ensure int line is no longer driven */
2376         wlc->macintmask = 0;
2377
2378         /* return previous macintmask; resolve race between us and our isr */
2379         return wlc->macintstatus ? 0 : macintmask;
2380 }
2381
2382 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2383 {
2384         struct brcms_hardware *wlc_hw = wlc->hw;
2385         if (!wlc_hw->clk)
2386                 return;
2387
2388         wlc->macintmask = macintmask;
2389         bcma_write32(wlc_hw->d11core, D11REGOFFS(macintmask), wlc->macintmask);
2390 }
2391
2392 /* assumes that the d11 MAC is enabled */
2393 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2394                                     uint tx_fifo)
2395 {
2396         u8 fifo = 1 << tx_fifo;
2397
2398         /* Two clients of this code, 11h Quiet period and scanning. */
2399
2400         /* only suspend if not already suspended */
2401         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2402                 return;
2403
2404         /* force the core awake only if not already */
2405         if (wlc_hw->suspended_fifos == 0)
2406                 brcms_c_ucode_wake_override_set(wlc_hw,
2407                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2408
2409         wlc_hw->suspended_fifos |= fifo;
2410
2411         if (wlc_hw->di[tx_fifo]) {
2412                 /*
2413                  * Suspending AMPDU transmissions in the middle can cause
2414                  * underflow which may result in mismatch between ucode and
2415                  * driver so suspend the mac before suspending the FIFO
2416                  */
2417                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2418                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2419
2420                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2421
2422                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2423                         brcms_c_enable_mac(wlc_hw->wlc);
2424         }
2425 }
2426
2427 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2428                                    uint tx_fifo)
2429 {
2430         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2431          * but need to be done here for PIO otherwise the watchdog will catch
2432          * the inconsistency and fire
2433          */
2434         /* Two clients of this code, 11h Quiet period and scanning. */
2435         if (wlc_hw->di[tx_fifo])
2436                 dma_txresume(wlc_hw->di[tx_fifo]);
2437
2438         /* allow core to sleep again */
2439         if (wlc_hw->suspended_fifos == 0)
2440                 return;
2441         else {
2442                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2443                 if (wlc_hw->suspended_fifos == 0)
2444                         brcms_c_ucode_wake_override_clear(wlc_hw,
2445                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2446         }
2447 }
2448
2449 /* precondition: requires the mac core to be enabled */
2450 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool mute_tx)
2451 {
2452         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2453
2454         if (mute_tx) {
2455                 /* suspend tx fifos */
2456                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2457                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2458                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2459                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2460
2461                 /* zero the address match register so we do not send ACKs */
2462                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2463                                        null_ether_addr);
2464         } else {
2465                 /* resume tx fifos */
2466                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2467                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2468                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2469                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2470
2471                 /* Restore address */
2472                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2473                                        wlc_hw->etheraddr);
2474         }
2475
2476         wlc_phy_mute_upd(wlc_hw->band->pi, mute_tx, 0);
2477
2478         if (mute_tx)
2479                 brcms_c_ucode_mute_override_set(wlc_hw);
2480         else
2481                 brcms_c_ucode_mute_override_clear(wlc_hw);
2482 }
2483
2484 void
2485 brcms_c_mute(struct brcms_c_info *wlc, bool mute_tx)
2486 {
2487         brcms_b_mute(wlc->hw, mute_tx);
2488 }
2489
2490 /*
2491  * Read and clear macintmask and macintstatus and intstatus registers.
2492  * This routine should be called with interrupts off
2493  * Return:
2494  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2495  *   0 if the interrupt is not for us, or we are in some special cases;
2496  *   device interrupt status bits otherwise.
2497  */
2498 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2499 {
2500         struct brcms_hardware *wlc_hw = wlc->hw;
2501         struct bcma_device *core = wlc_hw->d11core;
2502         u32 macintstatus;
2503
2504         /* macintstatus includes a DMA interrupt summary bit */
2505         macintstatus = bcma_read32(core, D11REGOFFS(macintstatus));
2506
2507         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2508                  macintstatus);
2509
2510         /* detect cardbus removed, in power down(suspend) and in reset */
2511         if (brcms_deviceremoved(wlc))
2512                 return -1;
2513
2514         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2515          * handle that case here.
2516          */
2517         if (macintstatus == 0xffffffff)
2518                 return 0;
2519
2520         /* defer unsolicited interrupts */
2521         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2522
2523         /* if not for us */
2524         if (macintstatus == 0)
2525                 return 0;
2526
2527         /* interrupts are already turned off for CFE build
2528          * Caution: For CFE Turning off the interrupts again has some undesired
2529          * consequences
2530          */
2531         /* turn off the interrupts */
2532         bcma_write32(core, D11REGOFFS(macintmask), 0);
2533         (void)bcma_read32(core, D11REGOFFS(macintmask));
2534         wlc->macintmask = 0;
2535
2536         /* clear device interrupts */
2537         bcma_write32(core, D11REGOFFS(macintstatus), macintstatus);
2538
2539         /* MI_DMAINT is indication of non-zero intstatus */
2540         if (macintstatus & MI_DMAINT)
2541                 /*
2542                  * only fifo interrupt enabled is I_RI in
2543                  * RX_FIFO. If MI_DMAINT is set, assume it
2544                  * is set and clear the interrupt.
2545                  */
2546                 bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intstatus),
2547                              DEF_RXINTMASK);
2548
2549         return macintstatus;
2550 }
2551
2552 /* Update wlc->macintstatus and wlc->intstatus[]. */
2553 /* Return true if they are updated successfully. false otherwise */
2554 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2555 {
2556         u32 macintstatus;
2557
2558         /* read and clear macintstatus and intstatus registers */
2559         macintstatus = wlc_intstatus(wlc, false);
2560
2561         /* device is removed */
2562         if (macintstatus == 0xffffffff)
2563                 return false;
2564
2565         /* update interrupt status in software */
2566         wlc->macintstatus |= macintstatus;
2567
2568         return true;
2569 }
2570
2571 /*
2572  * First-level interrupt processing.
2573  * Return true if this was our interrupt, false otherwise.
2574  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2575  * false otherwise.
2576  */
2577 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2578 {
2579         struct brcms_hardware *wlc_hw = wlc->hw;
2580         u32 macintstatus;
2581
2582         *wantdpc = false;
2583
2584         if (!wlc_hw->up || !wlc->macintmask)
2585                 return false;
2586
2587         /* read and clear macintstatus and intstatus registers */
2588         macintstatus = wlc_intstatus(wlc, true);
2589
2590         if (macintstatus == 0xffffffff)
2591                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2592                           " path\n");
2593
2594         /* it is not for us */
2595         if (macintstatus == 0)
2596                 return false;
2597
2598         *wantdpc = true;
2599
2600         /* save interrupt status bits */
2601         wlc->macintstatus = macintstatus;
2602
2603         return true;
2604
2605 }
2606
2607 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2608 {
2609         struct brcms_hardware *wlc_hw = wlc->hw;
2610         struct bcma_device *core = wlc_hw->d11core;
2611         u32 mc, mi;
2612         struct wiphy *wiphy = wlc->wiphy;
2613
2614         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2615                 wlc_hw->band->bandunit);
2616
2617         /*
2618          * Track overlapping suspend requests
2619          */
2620         wlc_hw->mac_suspend_depth++;
2621         if (wlc_hw->mac_suspend_depth > 1)
2622                 return;
2623
2624         /* force the core awake */
2625         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2626
2627         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2628
2629         if (mc == 0xffffffff) {
2630                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2631                           __func__);
2632                 brcms_down(wlc->wl);
2633                 return;
2634         }
2635         WARN_ON(mc & MCTL_PSM_JMP_0);
2636         WARN_ON(!(mc & MCTL_PSM_RUN));
2637         WARN_ON(!(mc & MCTL_EN_MAC));
2638
2639         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2640         if (mi == 0xffffffff) {
2641                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2642                           __func__);
2643                 brcms_down(wlc->wl);
2644                 return;
2645         }
2646         WARN_ON(mi & MI_MACSSPNDD);
2647
2648         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2649
2650         SPINWAIT(!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD),
2651                  BRCMS_MAX_MAC_SUSPEND);
2652
2653         if (!(bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD)) {
2654                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2655                           " and MI_MACSSPNDD is still not on.\n",
2656                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2657                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2658                           "psm_brc 0x%04x\n", wlc_hw->unit,
2659                           bcma_read32(core, D11REGOFFS(psmdebug)),
2660                           bcma_read32(core, D11REGOFFS(phydebug)),
2661                           bcma_read16(core, D11REGOFFS(psm_brc)));
2662         }
2663
2664         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2665         if (mc == 0xffffffff) {
2666                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2667                           __func__);
2668                 brcms_down(wlc->wl);
2669                 return;
2670         }
2671         WARN_ON(mc & MCTL_PSM_JMP_0);
2672         WARN_ON(!(mc & MCTL_PSM_RUN));
2673         WARN_ON(mc & MCTL_EN_MAC);
2674 }
2675
2676 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2677 {
2678         struct brcms_hardware *wlc_hw = wlc->hw;
2679         struct bcma_device *core = wlc_hw->d11core;
2680         u32 mc, mi;
2681
2682         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2683                 wlc->band->bandunit);
2684
2685         /*
2686          * Track overlapping suspend requests
2687          */
2688         wlc_hw->mac_suspend_depth--;
2689         if (wlc_hw->mac_suspend_depth > 0)
2690                 return;
2691
2692         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2693         WARN_ON(mc & MCTL_PSM_JMP_0);
2694         WARN_ON(mc & MCTL_EN_MAC);
2695         WARN_ON(!(mc & MCTL_PSM_RUN));
2696
2697         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2698         bcma_write32(core, D11REGOFFS(macintstatus), MI_MACSSPNDD);
2699
2700         mc = bcma_read32(core, D11REGOFFS(maccontrol));
2701         WARN_ON(mc & MCTL_PSM_JMP_0);
2702         WARN_ON(!(mc & MCTL_EN_MAC));
2703         WARN_ON(!(mc & MCTL_PSM_RUN));
2704
2705         mi = bcma_read32(core, D11REGOFFS(macintstatus));
2706         WARN_ON(mi & MI_MACSSPNDD);
2707
2708         brcms_c_ucode_wake_override_clear(wlc_hw,
2709                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2710 }
2711
2712 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2713 {
2714         wlc_hw->hw_stf_ss_opmode = stf_mode;
2715
2716         if (wlc_hw->clk)
2717                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2718 }
2719
2720 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2721 {
2722         struct bcma_device *core = wlc_hw->d11core;
2723         u32 w, val;
2724         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2725
2726         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2727
2728         /* Validate dchip register access */
2729
2730         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2731         (void)bcma_read32(core, D11REGOFFS(objaddr));
2732         w = bcma_read32(core, D11REGOFFS(objdata));
2733
2734         /* Can we write and read back a 32bit register? */
2735         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2736         (void)bcma_read32(core, D11REGOFFS(objaddr));
2737         bcma_write32(core, D11REGOFFS(objdata), (u32) 0xaa5555aa);
2738
2739         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2740         (void)bcma_read32(core, D11REGOFFS(objaddr));
2741         val = bcma_read32(core, D11REGOFFS(objdata));
2742         if (val != (u32) 0xaa5555aa) {
2743                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2744                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2745                 return false;
2746         }
2747
2748         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2749         (void)bcma_read32(core, D11REGOFFS(objaddr));
2750         bcma_write32(core, D11REGOFFS(objdata), (u32) 0x55aaaa55);
2751
2752         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2753         (void)bcma_read32(core, D11REGOFFS(objaddr));
2754         val = bcma_read32(core, D11REGOFFS(objdata));
2755         if (val != (u32) 0x55aaaa55) {
2756                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2757                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2758                 return false;
2759         }
2760
2761         bcma_write32(core, D11REGOFFS(objaddr), OBJADDR_SHM_SEL | 0);
2762         (void)bcma_read32(core, D11REGOFFS(objaddr));
2763         bcma_write32(core, D11REGOFFS(objdata), w);
2764
2765         /* clear CFPStart */
2766         bcma_write32(core, D11REGOFFS(tsf_cfpstart), 0);
2767
2768         w = bcma_read32(core, D11REGOFFS(maccontrol));
2769         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2770             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2771                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2772                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2773                           (MCTL_IHR_EN | MCTL_WAKE),
2774                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2775                 return false;
2776         }
2777
2778         return true;
2779 }
2780
2781 #define PHYPLL_WAIT_US  100000
2782
2783 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2784 {
2785         struct bcma_device *core = wlc_hw->d11core;
2786         u32 tmp;
2787
2788         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2789
2790         tmp = 0;
2791
2792         if (on) {
2793                 if ((ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
2794                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2795                                    CCS_ERSRC_REQ_HT |
2796                                    CCS_ERSRC_REQ_D11PLL |
2797                                    CCS_ERSRC_REQ_PHYPLL);
2798                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2799                                   CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT,
2800                                  PHYPLL_WAIT_US);
2801
2802                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2803                         if ((tmp & CCS_ERSRC_AVAIL_HT) != CCS_ERSRC_AVAIL_HT)
2804                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2805                                           " PLL failed\n", __func__);
2806                 } else {
2807                         bcma_set32(core, D11REGOFFS(clk_ctl_st),
2808                                    tmp | CCS_ERSRC_REQ_D11PLL |
2809                                    CCS_ERSRC_REQ_PHYPLL);
2810                         SPINWAIT((bcma_read32(core, D11REGOFFS(clk_ctl_st)) &
2811                                   (CCS_ERSRC_AVAIL_D11PLL |
2812                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2813                                  (CCS_ERSRC_AVAIL_D11PLL |
2814                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2815
2816                         tmp = bcma_read32(core, D11REGOFFS(clk_ctl_st));
2817                         if ((tmp &
2818                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2819                             !=
2820                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2821                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2822                                           "PHY PLL failed\n", __func__);
2823                 }
2824         } else {
2825                 /*
2826                  * Since the PLL may be shared, other cores can still
2827                  * be requesting it; so we'll deassert the request but
2828                  * not wait for status to comply.
2829                  */
2830                 bcma_mask32(core, D11REGOFFS(clk_ctl_st),
2831                             ~CCS_ERSRC_REQ_PHYPLL);
2832                 (void)bcma_read32(core, D11REGOFFS(clk_ctl_st));
2833         }
2834 }
2835
2836 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2837 {
2838         bool dev_gone;
2839
2840         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2841
2842         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2843
2844         if (dev_gone)
2845                 return;
2846
2847         if (wlc_hw->noreset)
2848                 return;
2849
2850         /* radio off */
2851         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2852
2853         /* turn off analog core */
2854         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2855
2856         /* turn off PHYPLL to save power */
2857         brcms_b_core_phypll_ctl(wlc_hw, false);
2858
2859         wlc_hw->clk = false;
2860         bcma_core_disable(wlc_hw->d11core, 0);
2861         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2862 }
2863
2864 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2865 {
2866         struct brcms_hardware *wlc_hw = wlc->hw;
2867         uint i;
2868
2869         /* free any posted tx packets */
2870         for (i = 0; i < NFIFO; i++)
2871                 if (wlc_hw->di[i]) {
2872                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2873                         wlc->core->txpktpend[i] = 0;
2874                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2875                 }
2876
2877         /* free any posted rx packets */
2878         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2879 }
2880
2881 static u16
2882 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2883 {
2884         struct bcma_device *core = wlc_hw->d11core;
2885         u16 objoff = D11REGOFFS(objdata);
2886
2887         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2888         (void)bcma_read32(core, D11REGOFFS(objaddr));
2889         if (offset & 2)
2890                 objoff += 2;
2891
2892         return bcma_read16(core, objoff);
2893 }
2894
2895 static void
2896 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2897                      u32 sel)
2898 {
2899         struct bcma_device *core = wlc_hw->d11core;
2900         u16 objoff = D11REGOFFS(objdata);
2901
2902         bcma_write32(core, D11REGOFFS(objaddr), sel | (offset >> 2));
2903         (void)bcma_read32(core, D11REGOFFS(objaddr));
2904         if (offset & 2)
2905                 objoff += 2;
2906
2907         bcma_write16(core, objoff, v);
2908 }
2909
2910 /*
2911  * Read a single u16 from shared memory.
2912  * SHM 'offset' needs to be an even address
2913  */
2914 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2915 {
2916         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2917 }
2918
2919 /*
2920  * Write a single u16 to shared memory.
2921  * SHM 'offset' needs to be an even address
2922  */
2923 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2924 {
2925         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2926 }
2927
2928 /*
2929  * Copy a buffer to shared memory of specified type .
2930  * SHM 'offset' needs to be an even address and
2931  * Buffer length 'len' must be an even number of bytes
2932  * 'sel' selects the type of memory
2933  */
2934 void
2935 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2936                       const void *buf, int len, u32 sel)
2937 {
2938         u16 v;
2939         const u8 *p = (const u8 *)buf;
2940         int i;
2941
2942         if (len <= 0 || (offset & 1) || (len & 1))
2943                 return;
2944
2945         for (i = 0; i < len; i += 2) {
2946                 v = p[i] | (p[i + 1] << 8);
2947                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2948         }
2949 }
2950
2951 /*
2952  * Copy a piece of shared memory of specified type to a buffer .
2953  * SHM 'offset' needs to be an even address and
2954  * Buffer length 'len' must be an even number of bytes
2955  * 'sel' selects the type of memory
2956  */
2957 void
2958 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2959                          int len, u32 sel)
2960 {
2961         u16 v;
2962         u8 *p = (u8 *) buf;
2963         int i;
2964
2965         if (len <= 0 || (offset & 1) || (len & 1))
2966                 return;
2967
2968         for (i = 0; i < len; i += 2) {
2969                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2970                 p[i] = v & 0xFF;
2971                 p[i + 1] = (v >> 8) & 0xFF;
2972         }
2973 }
2974
2975 /* Copy a buffer to shared memory.
2976  * SHM 'offset' needs to be an even address and
2977  * Buffer length 'len' must be an even number of bytes
2978  */
2979 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2980                         const void *buf, int len)
2981 {
2982         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2983 }
2984
2985 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2986                                    u16 SRL, u16 LRL)
2987 {
2988         wlc_hw->SRL = SRL;
2989         wlc_hw->LRL = LRL;
2990
2991         /* write retry limit to SCR, shouldn't need to suspend */
2992         if (wlc_hw->up) {
2993                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
2994                              OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
2995                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
2996                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->SRL);
2997                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objaddr),
2998                              OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
2999                 (void)bcma_read32(wlc_hw->d11core, D11REGOFFS(objaddr));
3000                 bcma_write32(wlc_hw->d11core, D11REGOFFS(objdata), wlc_hw->LRL);
3001         }
3002 }
3003
3004 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3005 {
3006         if (set) {
3007                 if (mboolisset(wlc_hw->pllreq, req_bit))
3008                         return;
3009
3010                 mboolset(wlc_hw->pllreq, req_bit);
3011
3012                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3013                         if (!wlc_hw->sbclk)
3014                                 brcms_b_xtal(wlc_hw, ON);
3015                 }
3016         } else {
3017                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3018                         return;
3019
3020                 mboolclr(wlc_hw->pllreq, req_bit);
3021
3022                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3023                         if (wlc_hw->sbclk)
3024                                 brcms_b_xtal(wlc_hw, OFF);
3025                 }
3026         }
3027 }
3028
3029 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3030 {
3031         wlc_hw->antsel_avail = antsel_avail;
3032 }
3033
3034 /*
3035  * conditions under which the PM bit should be set in outgoing frames
3036  * and STAY_AWAKE is meaningful
3037  */
3038 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3039 {
3040         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3041
3042         /* disallow PS when one of the following global conditions meets */
3043         if (!wlc->pub->associated)
3044                 return false;
3045
3046         /* disallow PS when one of these meets when not scanning */
3047         if (wlc->filter_flags & FIF_PROMISC_IN_BSS)
3048                 return false;
3049
3050         if (cfg->associated) {
3051                 /*
3052                  * disallow PS when one of the following
3053                  * bsscfg specific conditions meets
3054                  */
3055                 if (!cfg->BSS)
3056                         return false;
3057
3058                 return false;
3059         }
3060
3061         return true;
3062 }
3063
3064 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3065 {
3066         int i;
3067         struct macstat macstats;
3068 #ifdef DEBUG
3069         u16 delta;
3070         u16 rxf0ovfl;
3071         u16 txfunfl[NFIFO];
3072 #endif                          /* DEBUG */
3073
3074         /* if driver down, make no sense to update stats */
3075         if (!wlc->pub->up)
3076                 return;
3077
3078 #ifdef DEBUG
3079         /* save last rx fifo 0 overflow count */
3080         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3081
3082         /* save last tx fifo  underflow count */
3083         for (i = 0; i < NFIFO; i++)
3084                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3085 #endif                          /* DEBUG */
3086
3087         /* Read mac stats from contiguous shared memory */
3088         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3089                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3090
3091 #ifdef DEBUG
3092         /* check for rx fifo 0 overflow */
3093         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3094         if (delta)
3095                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3096                           wlc->pub->unit, delta);
3097
3098         /* check for tx fifo underflows */
3099         for (i = 0; i < NFIFO; i++) {
3100                 delta =
3101                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3102                               txfunfl[i]);
3103                 if (delta)
3104                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3105                                   "\n", wlc->pub->unit, delta, i);
3106         }
3107 #endif                          /* DEBUG */
3108
3109         /* merge counters from dma module */
3110         for (i = 0; i < NFIFO; i++) {
3111                 if (wlc->hw->di[i])
3112                         dma_counterreset(wlc->hw->di[i]);
3113         }
3114 }
3115
3116 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3117 {
3118         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3119
3120         /* reset the core */
3121         if (!brcms_deviceremoved(wlc_hw->wlc))
3122                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3123
3124         /* purge the dma rings */
3125         brcms_c_flushqueues(wlc_hw->wlc);
3126 }
3127
3128 void brcms_c_reset(struct brcms_c_info *wlc)
3129 {
3130         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3131
3132         /* slurp up hw mac counters before core reset */
3133         brcms_c_statsupd(wlc);
3134
3135         /* reset our snapshot of macstat counters */
3136         memset((char *)wlc->core->macstat_snapshot, 0,
3137                 sizeof(struct macstat));
3138
3139         brcms_b_reset(wlc->hw);
3140 }
3141
3142 /* Return the channel the driver should initialize during brcms_c_init.
3143  * the channel may have to be changed from the currently configured channel
3144  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3145  * invalid channel for current country, etc.)
3146  */
3147 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3148 {
3149         u16 chanspec =
3150             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3151             WL_CHANSPEC_BAND_2G;
3152
3153         return chanspec;
3154 }
3155
3156 void brcms_c_init_scb(struct scb *scb)
3157 {
3158         int i;
3159
3160         memset(scb, 0, sizeof(struct scb));
3161         scb->flags = SCB_WMECAP | SCB_HTCAP;
3162         for (i = 0; i < NUMPRIO; i++) {
3163                 scb->seqnum[i] = 0;
3164                 scb->seqctl[i] = 0xFFFF;
3165         }
3166
3167         scb->seqctl_nonqos = 0xFFFF;
3168         scb->magic = SCB_MAGIC;
3169 }
3170
3171 /* d11 core init
3172  *   reset PSM
3173  *   download ucode/PCM
3174  *   let ucode run to suspended
3175  *   download ucode inits
3176  *   config other core registers
3177  *   init dma
3178  */
3179 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3180 {
3181         struct brcms_hardware *wlc_hw = wlc->hw;
3182         struct bcma_device *core = wlc_hw->d11core;
3183         u32 sflags;
3184         u32 bcnint_us;
3185         uint i = 0;
3186         bool fifosz_fixup = false;
3187         int err = 0;
3188         u16 buf[NFIFO];
3189         struct wiphy *wiphy = wlc->wiphy;
3190         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3191
3192         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3193
3194         /* reset PSM */
3195         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3196
3197         brcms_ucode_download(wlc_hw);
3198         /*
3199          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3200          */
3201         fifosz_fixup = true;
3202
3203         /* let the PSM run to the suspended state, set mode to BSS STA */
3204         bcma_write32(core, D11REGOFFS(macintstatus), -1);
3205         brcms_b_mctrl(wlc_hw, ~0,
3206                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3207
3208         /* wait for ucode to self-suspend after auto-init */
3209         SPINWAIT(((bcma_read32(core, D11REGOFFS(macintstatus)) &
3210                    MI_MACSSPNDD) == 0), 1000 * 1000);
3211         if ((bcma_read32(core, D11REGOFFS(macintstatus)) & MI_MACSSPNDD) == 0)
3212                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3213                           "suspend!\n", wlc_hw->unit);
3214
3215         brcms_c_gpio_init(wlc);
3216
3217         sflags = bcma_aread32(core, BCMA_IOST);
3218
3219         if (D11REV_IS(wlc_hw->corerev, 23)) {
3220                 if (BRCMS_ISNPHY(wlc_hw->band))
3221                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3222                 else
3223                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3224                                   " %d\n", __func__, wlc_hw->unit,
3225                                   wlc_hw->corerev);
3226         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3227                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3228                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3229                 else
3230                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3231                                   " %d\n", __func__, wlc_hw->unit,
3232                                   wlc_hw->corerev);
3233         } else {
3234                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3235                           __func__, wlc_hw->unit, wlc_hw->corerev);
3236         }
3237
3238         /* For old ucode, txfifo sizes needs to be modified(increased) */
3239         if (fifosz_fixup)
3240                 brcms_b_corerev_fifofixup(wlc_hw);
3241
3242         /* check txfifo allocations match between ucode and driver */
3243         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3244         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3245                 i = TX_AC_BE_FIFO;
3246                 err = -1;
3247         }
3248         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3249         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3250                 i = TX_AC_VI_FIFO;
3251                 err = -1;
3252         }
3253         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3254         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3255         buf[TX_AC_BK_FIFO] &= 0xff;
3256         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3257                 i = TX_AC_BK_FIFO;
3258                 err = -1;
3259         }
3260         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3261                 i = TX_AC_VO_FIFO;
3262                 err = -1;
3263         }
3264         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3265         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3266         buf[TX_BCMC_FIFO] &= 0xff;
3267         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3268                 i = TX_BCMC_FIFO;
3269                 err = -1;
3270         }
3271         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3272                 i = TX_ATIM_FIFO;
3273                 err = -1;
3274         }
3275         if (err != 0)
3276                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3277                           " driver size %d index %d\n", buf[i],
3278                           wlc_hw->xmtfifo_sz[i], i);
3279
3280         /* make sure we can still talk to the mac */
3281         WARN_ON(bcma_read32(core, D11REGOFFS(maccontrol)) == 0xffffffff);
3282
3283         /* band-specific inits done by wlc_bsinit() */
3284
3285         /* Set up frame burst size and antenna swap threshold init values */
3286         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3287         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3288
3289         /* enable one rx interrupt per received frame */
3290         bcma_write32(core, D11REGOFFS(intrcvlazy[0]), (1 << IRL_FC_SHIFT));
3291
3292         /* set the station mode (BSS STA) */
3293         brcms_b_mctrl(wlc_hw,
3294                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3295                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3296
3297         /* set up Beacon interval */
3298         bcnint_us = 0x8000 << 10;
3299         bcma_write32(core, D11REGOFFS(tsf_cfprep),
3300                      (bcnint_us << CFPREP_CBI_SHIFT));
3301         bcma_write32(core, D11REGOFFS(tsf_cfpstart), bcnint_us);
3302         bcma_write32(core, D11REGOFFS(macintstatus), MI_GP1);
3303
3304         /* write interrupt mask */
3305         bcma_write32(core, D11REGOFFS(intctrlregs[RX_FIFO].intmask),
3306                      DEF_RXINTMASK);
3307
3308         /* allow the MAC to control the PHY clock (dynamic on/off) */
3309         brcms_b_macphyclk_set(wlc_hw, ON);
3310
3311         /* program dynamic clock control fast powerup delay register */
3312         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3313         bcma_write16(core, D11REGOFFS(scc_fastpwrup_dly), wlc->fastpwrup_dly);
3314
3315         /* tell the ucode the corerev */
3316         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3317
3318         /* tell the ucode MAC capabilities */
3319         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3320                            (u16) (wlc_hw->machwcap & 0xffff));
3321         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3322                            (u16) ((wlc_hw->
3323                                       machwcap >> 16) & 0xffff));
3324
3325         /* write retry limits to SCR, this done after PSM init */
3326         bcma_write32(core, D11REGOFFS(objaddr),
3327                      OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3328         (void)bcma_read32(core, D11REGOFFS(objaddr));
3329         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->SRL);
3330         bcma_write32(core, D11REGOFFS(objaddr),
3331                      OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3332         (void)bcma_read32(core, D11REGOFFS(objaddr));
3333         bcma_write32(core, D11REGOFFS(objdata), wlc_hw->LRL);
3334
3335         /* write rate fallback retry limits */
3336         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3337         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3338
3339         bcma_mask16(core, D11REGOFFS(ifs_ctl), 0x0FFF);
3340         bcma_write16(core, D11REGOFFS(ifs_aifsn), EDCF_AIFSN_MIN);
3341
3342         /* init the tx dma engines */
3343         for (i = 0; i < NFIFO; i++) {
3344                 if (wlc_hw->di[i])
3345                         dma_txinit(wlc_hw->di[i]);
3346         }
3347
3348         /* init the rx dma engine(s) and post receive buffers */
3349         dma_rxinit(wlc_hw->di[RX_FIFO]);
3350         dma_rxfill(wlc_hw->di[RX_FIFO]);
3351 }
3352
3353 void
3354 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec) {
3355         u32 macintmask;
3356         bool fastclk;
3357         struct brcms_c_info *wlc = wlc_hw->wlc;
3358
3359         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3360
3361         /* request FAST clock if not on */
3362         fastclk = wlc_hw->forcefastclk;
3363         if (!fastclk)
3364                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3365
3366         /* disable interrupts */
3367         macintmask = brcms_intrsoff(wlc->wl);
3368
3369         /* set up the specified band and chanspec */
3370         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3371         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3372
3373         /* do one-time phy inits and calibration */
3374         wlc_phy_cal_init(wlc_hw->band->pi);
3375
3376         /* core-specific initialization */
3377         brcms_b_coreinit(wlc);
3378
3379         /* band-specific inits */
3380         brcms_b_bsinit(wlc, chanspec);
3381
3382         /* restore macintmask */
3383         brcms_intrsrestore(wlc->wl, macintmask);
3384
3385         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3386          * is suspended and brcms_c_enable_mac() will clear this override bit.
3387          */
3388         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3389
3390         /*
3391          * initialize mac_suspend_depth to 1 to match ucode
3392          * initial suspended state
3393          */
3394         wlc_hw->mac_suspend_depth = 1;
3395
3396         /* restore the clk */
3397         if (!fastclk)
3398                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3399 }
3400
3401 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3402                                      u16 chanspec)
3403 {
3404         /* Save our copy of the chanspec */
3405         wlc->chanspec = chanspec;
3406
3407         /* Set the chanspec and power limits for this locale */
3408         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3409
3410         if (wlc->stf->ss_algosel_auto)
3411                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3412                                             chanspec);
3413
3414         brcms_c_stf_ss_update(wlc, wlc->band);
3415 }
3416
3417 static void
3418 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3419 {
3420         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3421                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3422                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3423                 brcms_chspec_bw(wlc->default_bss->chanspec),
3424                 wlc->stf->txstreams);
3425 }
3426
3427 /* derive wlc->band->basic_rate[] table from 'rateset' */
3428 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3429                               struct brcms_c_rateset *rateset)
3430 {
3431         u8 rate;
3432         u8 mandatory;
3433         u8 cck_basic = 0;
3434         u8 ofdm_basic = 0;
3435         u8 *br = wlc->band->basic_rate;
3436         uint i;
3437
3438         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3439         memset(br, 0, BRCM_MAXRATE + 1);
3440
3441         /* For each basic rate in the rates list, make an entry in the
3442          * best basic lookup.
3443          */
3444         for (i = 0; i < rateset->count; i++) {
3445                 /* only make an entry for a basic rate */
3446                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3447                         continue;
3448
3449                 /* mask off basic bit */
3450                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3451
3452                 if (rate > BRCM_MAXRATE) {
3453                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3454                                   "invalid rate 0x%X in rate set\n",
3455                                   rateset->rates[i]);
3456                         continue;
3457                 }
3458
3459                 br[rate] = rate;
3460         }
3461
3462         /* The rate lookup table now has non-zero entries for each
3463          * basic rate, equal to the basic rate: br[basicN] = basicN
3464          *
3465          * To look up the best basic rate corresponding to any
3466          * particular rate, code can use the basic_rate table
3467          * like this
3468          *
3469          * basic_rate = wlc->band->basic_rate[tx_rate]
3470          *
3471          * Make sure there is a best basic rate entry for
3472          * every rate by walking up the table from low rates
3473          * to high, filling in holes in the lookup table
3474          */
3475
3476         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3477                 rate = wlc->band->hw_rateset.rates[i];
3478
3479                 if (br[rate] != 0) {
3480                         /* This rate is a basic rate.
3481                          * Keep track of the best basic rate so far by
3482                          * modulation type.
3483                          */
3484                         if (is_ofdm_rate(rate))
3485                                 ofdm_basic = rate;
3486                         else
3487                                 cck_basic = rate;
3488
3489                         continue;
3490                 }
3491
3492                 /* This rate is not a basic rate so figure out the
3493                  * best basic rate less than this rate and fill in
3494                  * the hole in the table
3495                  */
3496
3497                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3498
3499                 if (br[rate] != 0)
3500                         continue;
3501
3502                 if (is_ofdm_rate(rate)) {
3503                         /*
3504                          * In 11g and 11a, the OFDM mandatory rates
3505                          * are 6, 12, and 24 Mbps
3506                          */
3507                         if (rate >= BRCM_RATE_24M)
3508                                 mandatory = BRCM_RATE_24M;
3509                         else if (rate >= BRCM_RATE_12M)
3510                                 mandatory = BRCM_RATE_12M;
3511                         else
3512                                 mandatory = BRCM_RATE_6M;
3513                 } else {
3514                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3515                         mandatory = rate;
3516                 }
3517
3518                 br[rate] = mandatory;
3519         }
3520 }
3521
3522 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3523                                      u16 chanspec)
3524 {
3525         struct brcms_c_rateset default_rateset;
3526         uint parkband;
3527         uint i, band_order[2];
3528
3529         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3530         /*
3531          * We might have been bandlocked during down and the chip
3532          * power-cycled (hibernate). Figure out the right band to park on
3533          */
3534         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3535                 /* updated in brcms_c_bandlock() */
3536                 parkband = wlc->band->bandunit;
3537                 band_order[0] = band_order[1] = parkband;
3538         } else {
3539                 /* park on the band of the specified chanspec */
3540                 parkband = chspec_bandunit(chanspec);
3541
3542                 /* order so that parkband initialize last */
3543                 band_order[0] = parkband ^ 1;
3544                 band_order[1] = parkband;
3545         }
3546
3547         /* make each band operational, software state init */
3548         for (i = 0; i < wlc->pub->_nbands; i++) {
3549                 uint j = band_order[i];
3550
3551                 wlc->band = wlc->bandstate[j];
3552
3553                 brcms_default_rateset(wlc, &default_rateset);
3554
3555                 /* fill in hw_rate */
3556                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3557                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3558                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3559
3560                 /* init basic rate lookup */
3561                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3562         }
3563
3564         /* sync up phy/radio chanspec */
3565         brcms_c_set_phy_chanspec(wlc, chanspec);
3566 }
3567
3568 /*
3569  * Set or clear filtering related maccontrol bits based on
3570  * specified filter flags
3571  */
3572 void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags)
3573 {
3574         u32 promisc_bits = 0;
3575
3576         wlc->filter_flags = filter_flags;
3577
3578         if (filter_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS))
3579                 promisc_bits |= MCTL_PROMISC;
3580
3581         if (filter_flags & FIF_BCN_PRBRESP_PROMISC)
3582                 promisc_bits |= MCTL_BCNS_PROMISC;
3583
3584         if (filter_flags & FIF_FCSFAIL)
3585                 promisc_bits |= MCTL_KEEPBADFCS;
3586
3587         if (filter_flags & (FIF_CONTROL | FIF_PSPOLL))
3588                 promisc_bits |= MCTL_KEEPCONTROL;
3589
3590         brcms_b_mctrl(wlc->hw,
3591                 MCTL_PROMISC | MCTL_BCNS_PROMISC |
3592                 MCTL_KEEPCONTROL | MCTL_KEEPBADFCS,
3593                 promisc_bits);
3594 }
3595
3596 /*
3597  * ucode, hwmac update
3598  *    Channel dependent updates for ucode and hw
3599  */
3600 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3601 {
3602         /* enable or disable any active IBSSs depending on whether or not
3603          * we are on the home channel
3604          */
3605         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3606                 if (wlc->pub->associated) {
3607                         /*
3608                          * BMAC_NOTE: This is something that should be fixed
3609                          * in ucode inits. I think that the ucode inits set
3610                          * up the bcn templates and shm values with a bogus
3611                          * beacon. This should not be done in the inits. If
3612                          * ucode needs to set up a beacon for testing, the
3613                          * test routines should write it down, not expect the
3614                          * inits to populate a bogus beacon.
3615                          */
3616                         if (BRCMS_PHY_11N_CAP(wlc->band))
3617                                 brcms_b_write_shm(wlc->hw,
3618                                                 M_BCN_TXTSF_OFFSET, 0);
3619                 }
3620         } else {
3621                 /* disable an active IBSS if we are not on the home channel */
3622         }
3623 }
3624
3625 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3626                                    u8 basic_rate)
3627 {
3628         u8 phy_rate, index;
3629         u8 basic_phy_rate, basic_index;
3630         u16 dir_table, basic_table;
3631         u16 basic_ptr;
3632
3633         /* Shared memory address for the table we are reading */
3634         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3635
3636         /* Shared memory address for the table we are writing */
3637         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3638
3639         /*
3640          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3641          * the index into the rate table.
3642          */
3643         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3644         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3645         index = phy_rate & 0xf;
3646         basic_index = basic_phy_rate & 0xf;
3647
3648         /* Find the SHM pointer to the ACK rate entry by looking in the
3649          * Direct-map Table
3650          */
3651         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3652
3653         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3654          * to the correct basic rate for the given incoming rate
3655          */
3656         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3657 }
3658
3659 static const struct brcms_c_rateset *
3660 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3661 {
3662         const struct brcms_c_rateset *rs_dflt;
3663
3664         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3665                 if (wlc->band->bandtype == BRCM_BAND_5G)
3666                         rs_dflt = &ofdm_mimo_rates;
3667                 else
3668                         rs_dflt = &cck_ofdm_mimo_rates;
3669         } else if (wlc->band->gmode)
3670                 rs_dflt = &cck_ofdm_rates;
3671         else
3672                 rs_dflt = &cck_rates;
3673
3674         return rs_dflt;
3675 }
3676
3677 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3678 {
3679         const struct brcms_c_rateset *rs_dflt;
3680         struct brcms_c_rateset rs;
3681         u8 rate, basic_rate;
3682         uint i;
3683
3684         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3685
3686         brcms_c_rateset_copy(rs_dflt, &rs);
3687         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3688
3689         /* walk the phy rate table and update SHM basic rate lookup table */
3690         for (i = 0; i < rs.count; i++) {
3691                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3692
3693                 /* for a given rate brcms_basic_rate returns the rate at
3694                  * which a response ACK/CTS should be sent.
3695                  */
3696                 basic_rate = brcms_basic_rate(wlc, rate);
3697                 if (basic_rate == 0)
3698                         /* This should only happen if we are using a
3699                          * restricted rateset.
3700                          */
3701                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3702
3703                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3704         }
3705 }
3706
3707 /* band-specific init */
3708 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3709 {
3710         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3711                  wlc->pub->unit, wlc->band->bandunit);
3712
3713         /* write ucode ACK/CTS rate table */
3714         brcms_c_set_ratetable(wlc);
3715
3716         /* update some band specific mac configuration */
3717         brcms_c_ucode_mac_upd(wlc);
3718
3719         /* init antenna selection */
3720         brcms_c_antsel_init(wlc->asi);
3721
3722 }
3723
3724 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3725 static int
3726 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3727                    bool writeToShm)
3728 {
3729         int idle_busy_ratio_x_16 = 0;
3730         uint offset =
3731             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3732             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3733         if (duty_cycle > 100 || duty_cycle < 0) {
3734                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3735                           wlc->pub->unit);
3736                 return -EINVAL;
3737         }
3738         if (duty_cycle)
3739                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3740         /* Only write to shared memory  when wl is up */
3741         if (writeToShm)
3742                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3743
3744         if (isOFDM)
3745                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3746         else
3747                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3748
3749         return 0;
3750 }
3751
3752 /*
3753  * Initialize the base precedence map for dequeueing
3754  * from txq based on WME settings
3755  */
3756 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3757 {
3758         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3759         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3760
3761         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3762         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3763         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3764         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3765 }
3766
3767 static void
3768 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3769                              struct brcms_txq_info *qi, bool on, int prio)
3770 {
3771         /* transmit flowcontrol is not yet implemented */
3772 }
3773
3774 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3775 {
3776         struct brcms_txq_info *qi;
3777
3778         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3779                 if (qi->stopped) {
3780                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3781                         qi->stopped = 0;
3782                 }
3783         }
3784 }
3785
3786 /* push sw hps and wake state through hardware */
3787 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3788 {
3789         u32 v1, v2;
3790         bool hps;
3791         bool awake_before;
3792
3793         hps = brcms_c_ps_allowed(wlc);
3794
3795         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3796
3797         v1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(maccontrol));
3798         v2 = MCTL_WAKE;
3799         if (hps)
3800                 v2 |= MCTL_HPS;
3801
3802         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3803
3804         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3805
3806         if (!awake_before)
3807                 brcms_b_wait_for_wake(wlc->hw);
3808 }
3809
3810 /*
3811  * Write this BSS config's MAC address to core.
3812  * Updates RXE match engine.
3813  */
3814 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3815 {
3816         int err = 0;
3817         struct brcms_c_info *wlc = bsscfg->wlc;
3818
3819         /* enter the MAC addr into the RXE match registers */
3820         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3821
3822         brcms_c_ampdu_macaddr_upd(wlc);
3823
3824         return err;
3825 }
3826
3827 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3828  * Updates RXE match engine.
3829  */
3830 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3831 {
3832         /* we need to update BSSID in RXE match registers */
3833         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3834 }
3835
3836 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3837 {
3838         wlc_hw->shortslot = shortslot;
3839
3840         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3841                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3842                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3843                 brcms_c_enable_mac(wlc_hw->wlc);
3844         }
3845 }
3846
3847 /*
3848  * Suspend the the MAC and update the slot timing
3849  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3850  */
3851 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3852 {
3853         /* use the override if it is set */
3854         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3855                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3856
3857         if (wlc->shortslot == shortslot)
3858                 return;
3859
3860         wlc->shortslot = shortslot;
3861
3862         brcms_b_set_shortslot(wlc->hw, shortslot);
3863 }
3864
3865 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3866 {
3867         if (wlc->home_chanspec != chanspec) {
3868                 wlc->home_chanspec = chanspec;
3869
3870                 if (wlc->bsscfg->associated)
3871                         wlc->bsscfg->current_bss->chanspec = chanspec;
3872         }
3873 }
3874
3875 void
3876 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3877                       bool mute_tx, struct txpwr_limits *txpwr)
3878 {
3879         uint bandunit;
3880
3881         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3882
3883         wlc_hw->chanspec = chanspec;
3884
3885         /* Switch bands if necessary */
3886         if (wlc_hw->_nbands > 1) {
3887                 bandunit = chspec_bandunit(chanspec);
3888                 if (wlc_hw->band->bandunit != bandunit) {
3889                         /* brcms_b_setband disables other bandunit,
3890                          *  use light band switch if not up yet
3891                          */
3892                         if (wlc_hw->up) {
3893                                 wlc_phy_chanspec_radio_set(wlc_hw->
3894                                                            bandstate[bandunit]->
3895                                                            pi, chanspec);
3896                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3897                         } else {
3898                                 brcms_c_setxband(wlc_hw, bandunit);
3899                         }
3900                 }
3901         }
3902
3903         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute_tx);
3904
3905         if (!wlc_hw->up) {
3906                 if (wlc_hw->clk)
3907                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3908                                                   chanspec);
3909                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3910         } else {
3911                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3912                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3913
3914                 /* Update muting of the channel */
3915                 brcms_b_mute(wlc_hw, mute_tx);
3916         }
3917 }
3918
3919 /* switch to and initialize new band */
3920 static void brcms_c_setband(struct brcms_c_info *wlc,
3921                                            uint bandunit)
3922 {
3923         wlc->band = wlc->bandstate[bandunit];
3924
3925         if (!wlc->pub->up)
3926                 return;
3927
3928         /* wait for at least one beacon before entering sleeping state */
3929         brcms_c_set_ps_ctrl(wlc);
3930
3931         /* band-specific initializations */
3932         brcms_c_bsinit(wlc);
3933 }
3934
3935 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3936 {
3937         uint bandunit;
3938         bool switchband = false;
3939         u16 old_chanspec = wlc->chanspec;
3940
3941         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3942                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3943                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3944                 return;
3945         }
3946
3947         /* Switch bands if necessary */
3948         if (wlc->pub->_nbands > 1) {
3949                 bandunit = chspec_bandunit(chanspec);
3950                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3951                         switchband = true;
3952                         if (wlc->bandlocked) {
3953                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3954                                           "band is locked!\n",
3955                                           wlc->pub->unit, __func__,
3956                                           CHSPEC_CHANNEL(chanspec));
3957                                 return;
3958                         }
3959                         /*
3960                          * should the setband call come after the
3961                          * brcms_b_chanspec() ? if the setband updates
3962                          * (brcms_c_bsinit) use low level calls to inspect and
3963                          * set state, the state inspected may be from the wrong
3964                          * band, or the following brcms_b_set_chanspec() may
3965                          * undo the work.
3966                          */
3967                         brcms_c_setband(wlc, bandunit);
3968                 }
3969         }
3970
3971         /* sync up phy/radio chanspec */
3972         brcms_c_set_phy_chanspec(wlc, chanspec);
3973
3974         /* init antenna selection */
3975         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3976                 brcms_c_antsel_init(wlc->asi);
3977
3978                 /* Fix the hardware rateset based on bw.
3979                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
3980                  */
3981                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
3982                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
3983         }
3984
3985         /* update some mac configuration since chanspec changed */
3986         brcms_c_ucode_mac_upd(wlc);
3987 }
3988
3989 /*
3990  * This function changes the phytxctl for beacon based on current
3991  * beacon ratespec AND txant setting as per this table:
3992  *  ratespec     CCK            ant = wlc->stf->txant
3993  *              OFDM            ant = 3
3994  */
3995 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
3996                                        u32 bcn_rspec)
3997 {
3998         u16 phyctl;
3999         u16 phytxant = wlc->stf->phytxant;
4000         u16 mask = PHY_TXC_ANT_MASK;
4001
4002         /* for non-siso rates or default setting, use the available chains */
4003         if (BRCMS_PHY_11N_CAP(wlc->band))
4004                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4005
4006         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4007         phyctl = (phyctl & ~mask) | phytxant;
4008         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4009 }
4010
4011 /*
4012  * centralized protection config change function to simplify debugging, no
4013  * consistency checking this should be called only on changes to avoid overhead
4014  * in periodic function
4015  */
4016 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4017 {
4018         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4019
4020         switch (idx) {
4021         case BRCMS_PROT_G_SPEC:
4022                 wlc->protection->_g = (bool) val;
4023                 break;
4024         case BRCMS_PROT_G_OVR:
4025                 wlc->protection->g_override = (s8) val;
4026                 break;
4027         case BRCMS_PROT_G_USER:
4028                 wlc->protection->gmode_user = (u8) val;
4029                 break;
4030         case BRCMS_PROT_OVERLAP:
4031                 wlc->protection->overlap = (s8) val;
4032                 break;
4033         case BRCMS_PROT_N_USER:
4034                 wlc->protection->nmode_user = (s8) val;
4035                 break;
4036         case BRCMS_PROT_N_CFG:
4037                 wlc->protection->n_cfg = (s8) val;
4038                 break;
4039         case BRCMS_PROT_N_CFG_OVR:
4040                 wlc->protection->n_cfg_override = (s8) val;
4041                 break;
4042         case BRCMS_PROT_N_NONGF:
4043                 wlc->protection->nongf = (bool) val;
4044                 break;
4045         case BRCMS_PROT_N_NONGF_OVR:
4046                 wlc->protection->nongf_override = (s8) val;
4047                 break;
4048         case BRCMS_PROT_N_PAM_OVR:
4049                 wlc->protection->n_pam_override = (s8) val;
4050                 break;
4051         case BRCMS_PROT_N_OBSS:
4052                 wlc->protection->n_obss = (bool) val;
4053                 break;
4054
4055         default:
4056                 break;
4057         }
4058
4059 }
4060
4061 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4062 {
4063         if (wlc->pub->up) {
4064                 brcms_c_update_beacon(wlc);
4065                 brcms_c_update_probe_resp(wlc, true);
4066         }
4067 }
4068
4069 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4070 {
4071         wlc->stf->ldpc = val;
4072
4073         if (wlc->pub->up) {
4074                 brcms_c_update_beacon(wlc);
4075                 brcms_c_update_probe_resp(wlc, true);
4076                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4077         }
4078 }
4079
4080 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4081                        const struct ieee80211_tx_queue_params *params,
4082                        bool suspend)
4083 {
4084         int i;
4085         struct shm_acparams acp_shm;
4086         u16 *shm_entry;
4087
4088         /* Only apply params if the core is out of reset and has clocks */
4089         if (!wlc->clk) {
4090                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4091                           __func__);
4092                 return;
4093         }
4094
4095         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4096         /* fill in shm ac params struct */
4097         acp_shm.txop = params->txop;
4098         /* convert from units of 32us to us for ucode */
4099         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4100             EDCF_TXOP2USEC(acp_shm.txop);
4101         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4102
4103         if (aci == IEEE80211_AC_VI && acp_shm.txop == 0
4104             && acp_shm.aifs < EDCF_AIFSN_MAX)
4105                 acp_shm.aifs++;
4106
4107         if (acp_shm.aifs < EDCF_AIFSN_MIN
4108             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4109                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4110                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4111         } else {
4112                 acp_shm.cwmin = params->cw_min;
4113                 acp_shm.cwmax = params->cw_max;
4114                 acp_shm.cwcur = acp_shm.cwmin;
4115                 acp_shm.bslots =
4116                         bcma_read16(wlc->hw->d11core, D11REGOFFS(tsf_random)) &
4117                         acp_shm.cwcur;
4118                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4119                 /* Indicate the new params to the ucode */
4120                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4121                                                   wme_ac2fifo[aci] *
4122                                                   M_EDCF_QLEN +
4123                                                   M_EDCF_STATUS_OFF));
4124                 acp_shm.status |= WME_STATUS_NEWAC;
4125
4126                 /* Fill in shm acparam table */
4127                 shm_entry = (u16 *) &acp_shm;
4128                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4129                         brcms_b_write_shm(wlc->hw,
4130                                           M_EDCF_QINFO +
4131                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4132                                           *shm_entry++);
4133         }
4134
4135         if (suspend) {
4136                 brcms_c_suspend_mac_and_wait(wlc);
4137                 brcms_c_enable_mac(wlc);
4138         }
4139 }
4140
4141 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4142 {
4143         u16 aci;
4144         int i_ac;
4145         struct ieee80211_tx_queue_params txq_pars;
4146         static const struct edcf_acparam default_edcf_acparams[] = {
4147                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4148                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4149                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4150                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4151         }; /* ucode needs these parameters during its initialization */
4152         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4153
4154         for (i_ac = 0; i_ac < IEEE80211_NUM_ACS; i_ac++, edcf_acp++) {
4155                 /* find out which ac this set of params applies to */
4156                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4157
4158                 /* fill in shm ac params struct */
4159                 txq_pars.txop = edcf_acp->TXOP;
4160                 txq_pars.aifs = edcf_acp->ACI;
4161
4162                 /* CWmin = 2^(ECWmin) - 1 */
4163                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4164                 /* CWmax = 2^(ECWmax) - 1 */
4165                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4166                                             >> EDCF_ECWMAX_SHIFT);
4167                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4168         }
4169
4170         if (suspend) {
4171                 brcms_c_suspend_mac_and_wait(wlc);
4172                 brcms_c_enable_mac(wlc);
4173         }
4174 }
4175
4176 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4177 {
4178         /* Don't start the timer if HWRADIO feature is disabled */
4179         if (wlc->radio_monitor)
4180                 return;
4181
4182         wlc->radio_monitor = true;
4183         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4184         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4185 }
4186
4187 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4188 {
4189         if (!wlc->radio_monitor)
4190                 return true;
4191
4192         wlc->radio_monitor = false;
4193         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4194         return brcms_del_timer(wlc->radio_timer);
4195 }
4196
4197 /* read hwdisable state and propagate to wlc flag */
4198 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4199 {
4200         if (wlc->pub->hw_off)
4201                 return;
4202
4203         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4204                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4205         else
4206                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4207 }
4208
4209 /* update hwradio status and return it */
4210 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4211 {
4212         brcms_c_radio_hwdisable_upd(wlc);
4213
4214         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4215                         true : false;
4216 }
4217
4218 /* periodical query hw radio button while driver is "down" */
4219 static void brcms_c_radio_timer(void *arg)
4220 {
4221         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4222
4223         if (brcms_deviceremoved(wlc)) {
4224                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4225                         __func__);
4226                 brcms_down(wlc->wl);
4227                 return;
4228         }
4229
4230         brcms_c_radio_hwdisable_upd(wlc);
4231 }
4232
4233 /* common low-level watchdog code */
4234 static void brcms_b_watchdog(void *arg)
4235 {
4236         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4237         struct brcms_hardware *wlc_hw = wlc->hw;
4238
4239         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4240
4241         if (!wlc_hw->up)
4242                 return;
4243
4244         /* increment second count */
4245         wlc_hw->now++;
4246
4247         /* Check for FIFO error interrupts */
4248         brcms_b_fifoerrors(wlc_hw);
4249
4250         /* make sure RX dma has buffers */
4251         dma_rxfill(wlc->hw->di[RX_FIFO]);
4252
4253         wlc_phy_watchdog(wlc_hw->band->pi);
4254 }
4255
4256 /* common watchdog code */
4257 static void brcms_c_watchdog(void *arg)
4258 {
4259         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4260
4261         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4262
4263         if (!wlc->pub->up)
4264                 return;
4265
4266         if (brcms_deviceremoved(wlc)) {
4267                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4268                           __func__);
4269                 brcms_down(wlc->wl);
4270                 return;
4271         }
4272
4273         /* increment second count */
4274         wlc->pub->now++;
4275
4276         brcms_c_radio_hwdisable_upd(wlc);
4277         /* if radio is disable, driver may be down, quit here */
4278         if (wlc->pub->radio_disabled)
4279                 return;
4280
4281         brcms_b_watchdog(wlc);
4282
4283         /*
4284          * occasionally sample mac stat counters to
4285          * detect 16-bit counter wrap
4286          */
4287         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4288                 brcms_c_statsupd(wlc);
4289
4290         if (BRCMS_ISNPHY(wlc->band) &&
4291             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4292              BRCMS_TEMPSENSE_PERIOD)) {
4293                 wlc->tempsense_lasttime = wlc->pub->now;
4294                 brcms_c_tempsense_upd(wlc);
4295         }
4296 }
4297
4298 static void brcms_c_watchdog_by_timer(void *arg)
4299 {
4300         brcms_c_watchdog(arg);
4301 }
4302
4303 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4304 {
4305         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4306                 wlc, "watchdog");
4307         if (!wlc->wdtimer) {
4308                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4309                           "failed\n", unit);
4310                 goto fail;
4311         }
4312
4313         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4314                 wlc, "radio");
4315         if (!wlc->radio_timer) {
4316                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4317                           "failed\n", unit);
4318                 goto fail;
4319         }
4320
4321         return true;
4322
4323  fail:
4324         return false;
4325 }
4326
4327 /*
4328  * Initialize brcms_c_info default values ...
4329  * may get overrides later in this function
4330  */
4331 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4332 {
4333         int i;
4334
4335         /* Save our copy of the chanspec */
4336         wlc->chanspec = ch20mhz_chspec(1);
4337
4338         /* various 802.11g modes */
4339         wlc->shortslot = false;
4340         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4341
4342         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4343         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4344
4345         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4346                                BRCMS_PROTECTION_AUTO);
4347         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4348         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4349                                BRCMS_PROTECTION_AUTO);
4350         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4351         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4352
4353         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4354                                BRCMS_PROTECTION_CTL_OVERLAP);
4355
4356         /* 802.11g draft 4.0 NonERP elt advertisement */
4357         wlc->include_legacy_erp = true;
4358
4359         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4360         wlc->stf->txant = ANT_TX_DEF;
4361
4362         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4363
4364         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4365         for (i = 0; i < NFIFO; i++)
4366                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4367         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4368
4369         /* default rate fallback retry limits */
4370         wlc->SFBL = RETRY_SHORT_FB;
4371         wlc->LFBL = RETRY_LONG_FB;
4372
4373         /* default mac retry limits */
4374         wlc->SRL = RETRY_SHORT_DEF;
4375         wlc->LRL = RETRY_LONG_DEF;
4376
4377         /* WME QoS mode is Auto by default */
4378         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4379         wlc->pub->bcmerror = 0;
4380 }
4381
4382 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4383 {
4384         uint err = 0;
4385         uint unit;
4386         unit = wlc->pub->unit;
4387
4388         wlc->asi = brcms_c_antsel_attach(wlc);
4389         if (wlc->asi == NULL) {
4390                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4391                           "failed\n", unit);
4392                 err = 44;
4393                 goto fail;
4394         }
4395
4396         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4397         if (wlc->ampdu == NULL) {
4398                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4399                           "failed\n", unit);
4400                 err = 50;
4401                 goto fail;
4402         }
4403
4404         if ((brcms_c_stf_attach(wlc) != 0)) {
4405                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4406                           "failed\n", unit);
4407                 err = 68;
4408                 goto fail;
4409         }
4410  fail:
4411         return err;
4412 }
4413
4414 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4415 {
4416         return wlc->pub;
4417 }
4418
4419 /* low level attach
4420  *    run backplane attach, init nvram
4421  *    run phy attach
4422  *    initialize software state for each core and band
4423  *    put the whole chip in reset(driver down state), no clock
4424  */
4425 static int brcms_b_attach(struct brcms_c_info *wlc, struct bcma_device *core,
4426                           uint unit, bool piomode)
4427 {
4428         struct brcms_hardware *wlc_hw;
4429         uint err = 0;
4430         uint j;
4431         bool wme = false;
4432         struct shared_phy_params sha_params;
4433         struct wiphy *wiphy = wlc->wiphy;
4434         struct pci_dev *pcidev = core->bus->host_pci;
4435         struct ssb_sprom *sprom = &core->bus->sprom;
4436
4437         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit,
4438                pcidev->vendor,
4439                pcidev->device);
4440
4441         wme = true;
4442
4443         wlc_hw = wlc->hw;
4444         wlc_hw->wlc = wlc;
4445         wlc_hw->unit = unit;
4446         wlc_hw->band = wlc_hw->bandstate[0];
4447         wlc_hw->_piomode = piomode;
4448
4449         /* populate struct brcms_hardware with default values  */
4450         brcms_b_info_init(wlc_hw);
4451
4452         /*
4453          * Do the hardware portion of the attach. Also initialize software
4454          * state that depends on the particular hardware we are running.
4455          */
4456         wlc_hw->sih = ai_attach(core->bus);
4457         if (wlc_hw->sih == NULL) {
4458                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4459                           unit);
4460                 err = 11;
4461                 goto fail;
4462         }
4463
4464         /* verify again the device is supported */
4465         if (!brcms_c_chipmatch(pcidev->vendor, pcidev->device)) {
4466                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4467                         "vendor/device (0x%x/0x%x)\n",
4468                          unit, pcidev->vendor, pcidev->device);
4469                 err = 12;
4470                 goto fail;
4471         }
4472
4473         wlc_hw->vendorid = pcidev->vendor;
4474         wlc_hw->deviceid = pcidev->device;
4475
4476         wlc_hw->d11core = core;
4477         wlc_hw->corerev = core->id.rev;
4478
4479         /* validate chip, chiprev and corerev */
4480         if (!brcms_c_isgoodchip(wlc_hw)) {
4481                 err = 13;
4482                 goto fail;
4483         }
4484
4485         /* initialize power control registers */
4486         ai_clkctl_init(wlc_hw->sih);
4487
4488         /* request fastclock and force fastclock for the rest of attach
4489          * bring the d11 core out of reset.
4490          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4491          *   is still false; But it will be called again inside wlc_corereset,
4492          *   after d11 is out of reset.
4493          */
4494         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4495         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4496
4497         if (!brcms_b_validate_chip_access(wlc_hw)) {
4498                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4499                         "failed\n", unit);
4500                 err = 14;
4501                 goto fail;
4502         }
4503
4504         /* get the board rev, used just below */
4505         j = sprom->board_rev;
4506         /* promote srom boardrev of 0xFF to 1 */
4507         if (j == BOARDREV_PROMOTABLE)
4508                 j = BOARDREV_PROMOTED;
4509         wlc_hw->boardrev = (u16) j;
4510         if (!brcms_c_validboardtype(wlc_hw)) {
4511                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4512                           "board type (0x%x)" " or revision level (0x%x)\n",
4513                           unit, ai_get_boardtype(wlc_hw->sih),
4514                           wlc_hw->boardrev);
4515                 err = 15;
4516                 goto fail;
4517         }
4518         wlc_hw->sromrev = sprom->revision;
4519         wlc_hw->boardflags = sprom->boardflags_lo + (sprom->boardflags_hi << 16);
4520         wlc_hw->boardflags2 = sprom->boardflags2_lo + (sprom->boardflags2_hi << 16);
4521
4522         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4523                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4524
4525         /* check device id(srom, nvram etc.) to set bands */
4526         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4527             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4528                 /* Dualband boards */
4529                 wlc_hw->_nbands = 2;
4530         else
4531                 wlc_hw->_nbands = 1;
4532
4533         if ((ai_get_chip_id(wlc_hw->sih) == BCM43225_CHIP_ID))
4534                 wlc_hw->_nbands = 1;
4535
4536         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4537          * unconditionally does the init of these values
4538          */
4539         wlc->vendorid = wlc_hw->vendorid;
4540         wlc->deviceid = wlc_hw->deviceid;
4541         wlc->pub->sih = wlc_hw->sih;
4542         wlc->pub->corerev = wlc_hw->corerev;
4543         wlc->pub->sromrev = wlc_hw->sromrev;
4544         wlc->pub->boardrev = wlc_hw->boardrev;
4545         wlc->pub->boardflags = wlc_hw->boardflags;
4546         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4547         wlc->pub->_nbands = wlc_hw->_nbands;
4548
4549         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4550
4551         if (wlc_hw->physhim == NULL) {
4552                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4553                         "failed\n", unit);
4554                 err = 25;
4555                 goto fail;
4556         }
4557
4558         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4559         sha_params.sih = wlc_hw->sih;
4560         sha_params.physhim = wlc_hw->physhim;
4561         sha_params.unit = unit;
4562         sha_params.corerev = wlc_hw->corerev;
4563         sha_params.vid = wlc_hw->vendorid;
4564         sha_params.did = wlc_hw->deviceid;
4565         sha_params.chip = ai_get_chip_id(wlc_hw->sih);
4566         sha_params.chiprev = ai_get_chiprev(wlc_hw->sih);
4567         sha_params.chippkg = ai_get_chippkg(wlc_hw->sih);
4568         sha_params.sromrev = wlc_hw->sromrev;
4569         sha_params.boardtype = ai_get_boardtype(wlc_hw->sih);
4570         sha_params.boardrev = wlc_hw->boardrev;
4571         sha_params.boardflags = wlc_hw->boardflags;
4572         sha_params.boardflags2 = wlc_hw->boardflags2;
4573
4574         /* alloc and save pointer to shared phy state area */
4575         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4576         if (!wlc_hw->phy_sh) {
4577                 err = 16;
4578                 goto fail;
4579         }
4580
4581         /* initialize software state for each core and band */
4582         for (j = 0; j < wlc_hw->_nbands; j++) {
4583                 /*
4584                  * band0 is always 2.4Ghz
4585                  * band1, if present, is 5Ghz
4586                  */
4587
4588                 brcms_c_setxband(wlc_hw, j);
4589
4590                 wlc_hw->band->bandunit = j;
4591                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4592                 wlc->band->bandunit = j;
4593                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4594                 wlc->core->coreidx = core->core_index;
4595
4596                 wlc_hw->machwcap = bcma_read32(core, D11REGOFFS(machwcap));
4597                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4598
4599                 /* init tx fifo size */
4600                 wlc_hw->xmtfifo_sz =
4601                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4602
4603                 /* Get a phy for this band */
4604                 wlc_hw->band->pi =
4605                         wlc_phy_attach(wlc_hw->phy_sh, core,
4606                                        wlc_hw->band->bandtype,
4607                                        wlc->wiphy);
4608                 if (wlc_hw->band->pi == NULL) {
4609                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4610                                   "attach failed\n", unit);
4611                         err = 17;
4612                         goto fail;
4613                 }
4614
4615                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4616
4617                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4618                                        &wlc_hw->band->phyrev,
4619                                        &wlc_hw->band->radioid,
4620                                        &wlc_hw->band->radiorev);
4621                 wlc_hw->band->abgphy_encore =
4622                     wlc_phy_get_encore(wlc_hw->band->pi);
4623                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4624                 wlc_hw->band->core_flags =
4625                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4626
4627                 /* verify good phy_type & supported phy revision */
4628                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4629                         if (NCONF_HAS(wlc_hw->band->phyrev))
4630                                 goto good_phy;
4631                         else
4632                                 goto bad_phy;
4633                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4634                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4635                                 goto good_phy;
4636                         else
4637                                 goto bad_phy;
4638                 } else {
4639  bad_phy:
4640                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4641                                   "phy type/rev (%d/%d)\n", unit,
4642                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4643                         err = 18;
4644                         goto fail;
4645                 }
4646
4647  good_phy:
4648                 /*
4649                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4650                  * be done in the high level attach. However we can not make
4651                  * that change until all low level access is changed to
4652                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4653                  * keeping wlc_hw->band->pi as well for incremental update of
4654                  * low level fns, and cut over low only init when all fns
4655                  * updated.
4656                  */
4657                 wlc->band->pi = wlc_hw->band->pi;
4658                 wlc->band->phytype = wlc_hw->band->phytype;
4659                 wlc->band->phyrev = wlc_hw->band->phyrev;
4660                 wlc->band->radioid = wlc_hw->band->radioid;
4661                 wlc->band->radiorev = wlc_hw->band->radiorev;
4662
4663                 /* default contention windows size limits */
4664                 wlc_hw->band->CWmin = APHY_CWMIN;
4665                 wlc_hw->band->CWmax = PHY_CWMAX;
4666
4667                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4668                         err = 19;
4669                         goto fail;
4670                 }
4671         }
4672
4673         /* disable core to match driver "down" state */
4674         brcms_c_coredisable(wlc_hw);
4675
4676         /* Match driver "down" state */
4677         ai_pci_down(wlc_hw->sih);
4678
4679         /* turn off pll and xtal to match driver "down" state */
4680         brcms_b_xtal(wlc_hw, OFF);
4681
4682         /* *******************************************************************
4683          * The hardware is in the DOWN state at this point. D11 core
4684          * or cores are in reset with clocks off, and the board PLLs
4685          * are off if possible.
4686          *
4687          * Beyond this point, wlc->sbclk == false and chip registers
4688          * should not be touched.
4689          *********************************************************************
4690          */
4691
4692         /* init etheraddr state variables */
4693         brcms_c_get_macaddr(wlc_hw, wlc_hw->etheraddr);
4694
4695         if (is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4696             is_zero_ether_addr(wlc_hw->etheraddr)) {
4697                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr\n",
4698                           unit);
4699                 err = 22;
4700                 goto fail;
4701         }
4702
4703         BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x\n",
4704                wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih));
4705
4706         return err;
4707
4708  fail:
4709         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4710                   err);
4711         return err;
4712 }
4713
4714 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4715 {
4716         uint unit;
4717         unit = wlc->pub->unit;
4718
4719         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4720                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4721                 wlc->band->antgain = 8;
4722         } else if (wlc->band->antgain == -1) {
4723                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4724                           " srom, using 2dB\n", unit, __func__);
4725                 wlc->band->antgain = 8;
4726         } else {
4727                 s8 gain, fract;
4728                 /* Older sroms specified gain in whole dbm only.  In order
4729                  * be able to specify qdbm granularity and remain backward
4730                  * compatible the whole dbms are now encoded in only
4731                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4732                  * 6 bit signed number ranges from -32 - 31.
4733                  *
4734                  * Examples:
4735                  * 0x1 = 1 db,
4736                  * 0xc1 = 1.75 db (1 + 3 quarters),
4737                  * 0x3f = -1 (-1 + 0 quarters),
4738                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4739                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4740                  */
4741                 gain = wlc->band->antgain & 0x3f;
4742                 gain <<= 2;     /* Sign extend */
4743                 gain >>= 2;
4744                 fract = (wlc->band->antgain & 0xc0) >> 6;
4745                 wlc->band->antgain = 4 * gain + fract;
4746         }
4747 }
4748
4749 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4750 {
4751         int aa;
4752         uint unit;
4753         int bandtype;
4754         struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom;
4755
4756         unit = wlc->pub->unit;
4757         bandtype = wlc->band->bandtype;
4758
4759         /* get antennas available */
4760         if (bandtype == BRCM_BAND_5G)
4761                 aa = sprom->ant_available_a;
4762         else
4763                 aa = sprom->ant_available_bg;
4764
4765         if ((aa < 1) || (aa > 15)) {
4766                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4767                           " srom (0x%x), using 3\n", unit, __func__, aa);
4768                 aa = 3;
4769         }
4770
4771         /* reset the defaults if we have a single antenna */
4772         if (aa == 1) {
4773                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4774                 wlc->stf->txant = ANT_TX_FORCE_0;
4775         } else if (aa == 2) {
4776                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4777                 wlc->stf->txant = ANT_TX_FORCE_1;
4778         } else {
4779         }
4780
4781         /* Compute Antenna Gain */
4782         if (bandtype == BRCM_BAND_5G)
4783                 wlc->band->antgain = sprom->antenna_gain.a1;
4784         else
4785                 wlc->band->antgain = sprom->antenna_gain.a0;
4786
4787         brcms_c_attach_antgain_init(wlc);
4788
4789         return true;
4790 }
4791
4792 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4793 {
4794         u16 chanspec;
4795         struct brcms_band *band;
4796         struct brcms_bss_info *bi = wlc->default_bss;
4797
4798         /* init default and target BSS with some sane initial values */
4799         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4800         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4801
4802         /* fill the default channel as the first valid channel
4803          * starting from the 2G channels
4804          */
4805         chanspec = ch20mhz_chspec(1);
4806         wlc->home_chanspec = bi->chanspec = chanspec;
4807
4808         /* find the band of our default channel */
4809         band = wlc->band;
4810         if (wlc->pub->_nbands > 1 &&
4811             band->bandunit != chspec_bandunit(chanspec))
4812                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4813
4814         /* init bss rates to the band specific default rate set */
4815         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4816                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4817                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4818                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4819
4820         if (wlc->pub->_n_enab & SUPPORT_11N)
4821                 bi->flags |= BRCMS_BSS_HT;
4822 }
4823
4824 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4825 {
4826         struct brcms_txq_info *qi, *p;
4827
4828         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4829         if (qi != NULL) {
4830                 /*
4831                  * Have enough room for control packets along with HI watermark
4832                  * Also, add room to txq for total psq packets if all the SCBs
4833                  * leave PS mode. The watermark for flowcontrol to OS packets
4834                  * will remain the same
4835                  */
4836                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4837                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4838
4839                 /* add this queue to the the global list */
4840                 p = wlc->tx_queues;
4841                 if (p == NULL) {
4842                         wlc->tx_queues = qi;
4843                 } else {
4844                         while (p->next != NULL)
4845                                 p = p->next;
4846                         p->next = qi;
4847                 }
4848         }
4849         return qi;
4850 }
4851
4852 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4853                              struct brcms_txq_info *qi)
4854 {
4855         struct brcms_txq_info *p;
4856
4857         if (qi == NULL)
4858                 return;
4859
4860         /* remove the queue from the linked list */
4861         p = wlc->tx_queues;
4862         if (p == qi)
4863                 wlc->tx_queues = p->next;
4864         else {
4865                 while (p != NULL && p->next != qi)
4866                         p = p->next;
4867                 if (p != NULL)
4868                         p->next = p->next->next;
4869         }
4870
4871         kfree(qi);
4872 }
4873
4874 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4875 {
4876         uint i;
4877         struct brcms_band *band;
4878
4879         for (i = 0; i < wlc->pub->_nbands; i++) {
4880                 band = wlc->bandstate[i];
4881                 if (band->bandtype == BRCM_BAND_5G) {
4882                         if ((bwcap == BRCMS_N_BW_40ALL)
4883                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4884                                 band->mimo_cap_40 = true;
4885                         else
4886                                 band->mimo_cap_40 = false;
4887                 } else {
4888                         if (bwcap == BRCMS_N_BW_40ALL)
4889                                 band->mimo_cap_40 = true;
4890                         else
4891                                 band->mimo_cap_40 = false;
4892                 }
4893         }
4894 }
4895
4896 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4897 {
4898         /* free timer state */
4899         if (wlc->wdtimer) {
4900                 brcms_free_timer(wlc->wdtimer);
4901                 wlc->wdtimer = NULL;
4902         }
4903         if (wlc->radio_timer) {
4904                 brcms_free_timer(wlc->radio_timer);
4905                 wlc->radio_timer = NULL;
4906         }
4907 }
4908
4909 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4910 {
4911         if (wlc->asi) {
4912                 brcms_c_antsel_detach(wlc->asi);
4913                 wlc->asi = NULL;
4914         }
4915
4916         if (wlc->ampdu) {
4917                 brcms_c_ampdu_detach(wlc->ampdu);
4918                 wlc->ampdu = NULL;
4919         }
4920
4921         brcms_c_stf_detach(wlc);
4922 }
4923
4924 /*
4925  * low level detach
4926  */
4927 static int brcms_b_detach(struct brcms_c_info *wlc)
4928 {
4929         uint i;
4930         struct brcms_hw_band *band;
4931         struct brcms_hardware *wlc_hw = wlc->hw;
4932         int callbacks;
4933
4934         callbacks = 0;
4935
4936         brcms_b_detach_dmapio(wlc_hw);
4937
4938         band = wlc_hw->band;
4939         for (i = 0; i < wlc_hw->_nbands; i++) {
4940                 if (band->pi) {
4941                         /* Detach this band's phy */
4942                         wlc_phy_detach(band->pi);
4943                         band->pi = NULL;
4944                 }
4945                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4946         }
4947
4948         /* Free shared phy state */
4949         kfree(wlc_hw->phy_sh);
4950
4951         wlc_phy_shim_detach(wlc_hw->physhim);
4952
4953         if (wlc_hw->sih) {
4954                 ai_detach(wlc_hw->sih);
4955                 wlc_hw->sih = NULL;
4956         }
4957
4958         return callbacks;
4959
4960 }
4961
4962 /*
4963  * Return a count of the number of driver callbacks still pending.
4964  *
4965  * General policy is that brcms_c_detach can only dealloc/free software states.
4966  * It can NOT touch hardware registers since the d11core may be in reset and
4967  * clock may not be available.
4968  * One exception is sb register access, which is possible if crystal is turned
4969  * on after "down" state, driver should avoid software timer with the exception
4970  * of radio_monitor.
4971  */
4972 uint brcms_c_detach(struct brcms_c_info *wlc)
4973 {
4974         uint callbacks = 0;
4975
4976         if (wlc == NULL)
4977                 return 0;
4978
4979         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4980
4981         callbacks += brcms_b_detach(wlc);
4982
4983         /* delete software timers */
4984         if (!brcms_c_radio_monitor_stop(wlc))
4985                 callbacks++;
4986
4987         brcms_c_channel_mgr_detach(wlc->cmi);
4988
4989         brcms_c_timers_deinit(wlc);
4990
4991         brcms_c_detach_module(wlc);
4992
4993
4994         while (wlc->tx_queues != NULL)
4995                 brcms_c_txq_free(wlc, wlc->tx_queues);
4996
4997         brcms_c_detach_mfree(wlc);
4998         return callbacks;
4999 }
5000
5001 /* update state that depends on the current value of "ap" */
5002 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5003 {
5004         /* STA-BSS; short capable */
5005         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5006 }
5007
5008 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5009 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5010 {
5011         if (wlc_hw->wlc->pub->hw_up)
5012                 return;
5013
5014         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5015
5016         /*
5017          * Enable pll and xtal, initialize the power control registers,
5018          * and force fastclock for the remainder of brcms_c_up().
5019          */
5020         brcms_b_xtal(wlc_hw, ON);
5021         ai_clkctl_init(wlc_hw->sih);
5022         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5023
5024         ai_pci_fixcfg(wlc_hw->sih);
5025
5026         /*
5027          * TODO: test suspend/resume
5028          *
5029          * AI chip doesn't restore bar0win2 on
5030          * hibernation/resume, need sw fixup
5031          */
5032
5033         /*
5034          * Inform phy that a POR reset has occurred so
5035          * it does a complete phy init
5036          */
5037         wlc_phy_por_inform(wlc_hw->band->pi);
5038
5039         wlc_hw->ucode_loaded = false;
5040         wlc_hw->wlc->pub->hw_up = true;
5041
5042         if ((wlc_hw->boardflags & BFL_FEM)
5043             && (ai_get_chip_id(wlc_hw->sih) == BCM4313_CHIP_ID)) {
5044                 if (!
5045                     (wlc_hw->boardrev >= 0x1250
5046                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5047                         ai_epa_4313war(wlc_hw->sih);
5048         }
5049 }
5050
5051 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5052 {
5053         uint coremask;
5054
5055         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5056
5057         /*
5058          * Enable pll and xtal, initialize the power control registers,
5059          * and force fastclock for the remainder of brcms_c_up().
5060          */
5061         brcms_b_xtal(wlc_hw, ON);
5062         ai_clkctl_init(wlc_hw->sih);
5063         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5064
5065         /*
5066          * Configure pci/pcmcia here instead of in brcms_c_attach()
5067          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5068          */
5069         coremask = (1 << wlc_hw->wlc->core->coreidx);
5070
5071         ai_pci_setup(wlc_hw->sih, coremask);
5072
5073         /*
5074          * Need to read the hwradio status here to cover the case where the
5075          * system is loaded with the hw radio disabled. We do not want to
5076          * bring the driver up in this case.
5077          */
5078         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5079                 /* put SB PCI in down state again */
5080                 ai_pci_down(wlc_hw->sih);
5081                 brcms_b_xtal(wlc_hw, OFF);
5082                 return -ENOMEDIUM;
5083         }
5084
5085         ai_pci_up(wlc_hw->sih);
5086
5087         /* reset the d11 core */
5088         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5089
5090         return 0;
5091 }
5092
5093 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5094 {
5095         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5096
5097         wlc_hw->up = true;
5098         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5099
5100         /* FULLY enable dynamic power control and d11 core interrupt */
5101         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5102         brcms_intrson(wlc_hw->wlc->wl);
5103         return 0;
5104 }
5105
5106 /*
5107  * Write WME tunable parameters for retransmit/max rate
5108  * from wlc struct to ucode
5109  */
5110 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5111 {
5112         int ac;
5113
5114         /* Need clock to do this */
5115         if (!wlc->clk)
5116                 return;
5117
5118         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
5119                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5120                                   wlc->wme_retries[ac]);
5121 }
5122
5123 /* make interface operational */
5124 int brcms_c_up(struct brcms_c_info *wlc)
5125 {
5126         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5127
5128         /* HW is turned off so don't try to access it */
5129         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5130                 return -ENOMEDIUM;
5131
5132         if (!wlc->pub->hw_up) {
5133                 brcms_b_hw_up(wlc->hw);
5134                 wlc->pub->hw_up = true;
5135         }
5136
5137         if ((wlc->pub->boardflags & BFL_FEM)
5138             && (ai_get_chip_id(wlc->hw->sih) == BCM4313_CHIP_ID)) {
5139                 if (wlc->pub->boardrev >= 0x1250
5140                     && (wlc->pub->boardflags & BFL_FEM_BT))
5141                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5142                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5143                 else
5144                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5145                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5146         }
5147
5148         /*
5149          * Need to read the hwradio status here to cover the case where the
5150          * system is loaded with the hw radio disabled. We do not want to bring
5151          * the driver up in this case. If radio is disabled, abort up, lower
5152          * power, start radio timer and return 0(for NDIS) don't call
5153          * radio_update to avoid looping brcms_c_up.
5154          *
5155          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5156          */
5157         if (!wlc->pub->radio_disabled) {
5158                 int status = brcms_b_up_prep(wlc->hw);
5159                 if (status == -ENOMEDIUM) {
5160                         if (!mboolisset
5161                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5162                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5163                                 mboolset(wlc->pub->radio_disabled,
5164                                          WL_RADIO_HW_DISABLE);
5165
5166                                 if (bsscfg->enable && bsscfg->BSS)
5167                                         wiphy_err(wlc->wiphy, "wl%d: up"
5168                                                   ": rfdisable -> "
5169                                                   "bsscfg_disable()\n",
5170                                                    wlc->pub->unit);
5171                         }
5172                 }
5173         }
5174
5175         if (wlc->pub->radio_disabled) {
5176                 brcms_c_radio_monitor_start(wlc);
5177                 return 0;
5178         }
5179
5180         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5181         wlc->clk = true;
5182
5183         brcms_c_radio_monitor_stop(wlc);
5184
5185         /* Set EDCF hostflags */
5186         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5187
5188         brcms_init(wlc->wl);
5189         wlc->pub->up = true;
5190
5191         if (wlc->bandinit_pending) {
5192                 brcms_c_suspend_mac_and_wait(wlc);
5193                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5194                 wlc->bandinit_pending = false;
5195                 brcms_c_enable_mac(wlc);
5196         }
5197
5198         brcms_b_up_finish(wlc->hw);
5199
5200         /* Program the TX wme params with the current settings */
5201         brcms_c_wme_retries_write(wlc);
5202
5203         /* start one second watchdog timer */
5204         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5205         wlc->WDarmed = true;
5206
5207         /* ensure antenna config is up to date */
5208         brcms_c_stf_phy_txant_upd(wlc);
5209         /* ensure LDPC config is in sync */
5210         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5211
5212         return 0;
5213 }
5214
5215 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5216 {
5217         uint callbacks = 0;
5218
5219         return callbacks;
5220 }
5221
5222 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5223 {
5224         bool dev_gone;
5225         uint callbacks = 0;
5226
5227         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5228
5229         if (!wlc_hw->up)
5230                 return callbacks;
5231
5232         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5233
5234         /* disable interrupts */
5235         if (dev_gone)
5236                 wlc_hw->wlc->macintmask = 0;
5237         else {
5238                 /* now disable interrupts */
5239                 brcms_intrsoff(wlc_hw->wlc->wl);
5240
5241                 /* ensure we're running on the pll clock again */
5242                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5243         }
5244         /* down phy at the last of this stage */
5245         callbacks += wlc_phy_down(wlc_hw->band->pi);
5246
5247         return callbacks;
5248 }
5249
5250 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5251 {
5252         uint callbacks = 0;
5253         bool dev_gone;
5254
5255         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5256
5257         if (!wlc_hw->up)
5258                 return callbacks;
5259
5260         wlc_hw->up = false;
5261         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5262
5263         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5264
5265         if (dev_gone) {
5266                 wlc_hw->sbclk = false;
5267                 wlc_hw->clk = false;
5268                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5269
5270                 /* reclaim any posted packets */
5271                 brcms_c_flushqueues(wlc_hw->wlc);
5272         } else {
5273
5274                 /* Reset and disable the core */
5275                 if (bcma_core_is_enabled(wlc_hw->d11core)) {
5276                         if (bcma_read32(wlc_hw->d11core,
5277                                         D11REGOFFS(maccontrol)) & MCTL_EN_MAC)
5278                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5279                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5280                         brcms_c_coredisable(wlc_hw);
5281                 }
5282
5283                 /* turn off primary xtal and pll */
5284                 if (!wlc_hw->noreset) {
5285                         ai_pci_down(wlc_hw->sih);
5286                         brcms_b_xtal(wlc_hw, OFF);
5287                 }
5288         }
5289
5290         return callbacks;
5291 }
5292
5293 /*
5294  * Mark the interface nonoperational, stop the software mechanisms,
5295  * disable the hardware, free any transient buffer state.
5296  * Return a count of the number of driver callbacks still pending.
5297  */
5298 uint brcms_c_down(struct brcms_c_info *wlc)
5299 {
5300
5301         uint callbacks = 0;
5302         int i;
5303         bool dev_gone = false;
5304         struct brcms_txq_info *qi;
5305
5306         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5307
5308         /* check if we are already in the going down path */
5309         if (wlc->going_down) {
5310                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5311                           "\n", wlc->pub->unit, __func__);
5312                 return 0;
5313         }
5314         if (!wlc->pub->up)
5315                 return callbacks;
5316
5317         wlc->going_down = true;
5318
5319         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5320
5321         dev_gone = brcms_deviceremoved(wlc);
5322
5323         /* Call any registered down handlers */
5324         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5325                 if (wlc->modulecb[i].down_fn)
5326                         callbacks +=
5327                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5328         }
5329
5330         /* cancel the watchdog timer */
5331         if (wlc->WDarmed) {
5332                 if (!brcms_del_timer(wlc->wdtimer))
5333                         callbacks++;
5334                 wlc->WDarmed = false;
5335         }
5336         /* cancel all other timers */
5337         callbacks += brcms_c_down_del_timer(wlc);
5338
5339         wlc->pub->up = false;
5340
5341         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5342
5343         /* clear txq flow control */
5344         brcms_c_txflowcontrol_reset(wlc);
5345
5346         /* flush tx queues */
5347         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5348                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5349
5350         callbacks += brcms_b_down_finish(wlc->hw);
5351
5352         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5353         wlc->clk = false;
5354
5355         wlc->going_down = false;
5356         return callbacks;
5357 }
5358
5359 /* Set the current gmode configuration */
5360 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5361 {
5362         int ret = 0;
5363         uint i;
5364         struct brcms_c_rateset rs;
5365         /* Default to 54g Auto */
5366         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5367         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5368         bool shortslot_restrict = false; /* Restrict association to stations
5369                                           * that support shortslot
5370                                           */
5371         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5372         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5373         int preamble = BRCMS_PLCP_LONG;
5374         bool preamble_restrict = false; /* Restrict association to stations
5375                                          * that support short preambles
5376                                          */
5377         struct brcms_band *band;
5378
5379         /* if N-support is enabled, allow Gmode set as long as requested
5380          * Gmode is not GMODE_LEGACY_B
5381          */
5382         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5383                 return -ENOTSUPP;
5384
5385         /* verify that we are dealing with 2G band and grab the band pointer */
5386         if (wlc->band->bandtype == BRCM_BAND_2G)
5387                 band = wlc->band;
5388         else if ((wlc->pub->_nbands > 1) &&
5389                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5390                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5391         else
5392                 return -EINVAL;
5393
5394         /* Legacy or bust when no OFDM is supported by regulatory */
5395         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5396              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5397                 return -EINVAL;
5398
5399         /* update configuration value */
5400         if (config)
5401                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5402
5403         /* Clear rateset override */
5404         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5405
5406         switch (gmode) {
5407         case GMODE_LEGACY_B:
5408                 shortslot = BRCMS_SHORTSLOT_OFF;
5409                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5410
5411                 break;
5412
5413         case GMODE_LRS:
5414                 break;
5415
5416         case GMODE_AUTO:
5417                 /* Accept defaults */
5418                 break;
5419
5420         case GMODE_ONLY:
5421                 ofdm_basic = true;
5422                 preamble = BRCMS_PLCP_SHORT;
5423                 preamble_restrict = true;
5424                 break;
5425
5426         case GMODE_PERFORMANCE:
5427                 shortslot = BRCMS_SHORTSLOT_ON;
5428                 shortslot_restrict = true;
5429                 ofdm_basic = true;
5430                 preamble = BRCMS_PLCP_SHORT;
5431                 preamble_restrict = true;
5432                 break;
5433
5434         default:
5435                 /* Error */
5436                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5437                           wlc->pub->unit, __func__, gmode);
5438                 return -ENOTSUPP;
5439         }
5440
5441         band->gmode = gmode;
5442
5443         wlc->shortslot_override = shortslot;
5444
5445         /* Use the default 11g rateset */
5446         if (!rs.count)
5447                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5448
5449         if (ofdm_basic) {
5450                 for (i = 0; i < rs.count; i++) {
5451                         if (rs.rates[i] == BRCM_RATE_6M
5452                             || rs.rates[i] == BRCM_RATE_12M
5453                             || rs.rates[i] == BRCM_RATE_24M)
5454                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5455                 }
5456         }
5457
5458         /* Set default bss rateset */
5459         wlc->default_bss->rateset.count = rs.count;
5460         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5461                sizeof(wlc->default_bss->rateset.rates));
5462
5463         return ret;
5464 }
5465
5466 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5467 {
5468         uint i;
5469         s32 nmode = AUTO;
5470
5471         if (wlc->stf->txstreams == WL_11N_3x3)
5472                 nmode = WL_11N_3x3;
5473         else
5474                 nmode = WL_11N_2x2;
5475
5476         /* force GMODE_AUTO if NMODE is ON */
5477         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5478         if (nmode == WL_11N_3x3)
5479                 wlc->pub->_n_enab = SUPPORT_HT;
5480         else
5481                 wlc->pub->_n_enab = SUPPORT_11N;
5482         wlc->default_bss->flags |= BRCMS_BSS_HT;
5483         /* add the mcs rates to the default and hw ratesets */
5484         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5485                               wlc->stf->txstreams);
5486         for (i = 0; i < wlc->pub->_nbands; i++)
5487                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5488                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5489
5490         return 0;
5491 }
5492
5493 static int
5494 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5495                              struct brcms_c_rateset *rs_arg)
5496 {
5497         struct brcms_c_rateset rs, new;
5498         uint bandunit;
5499
5500         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5501
5502         /* check for bad count value */
5503         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5504                 return -EINVAL;
5505
5506         /* try the current band */
5507         bandunit = wlc->band->bandunit;
5508         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5509         if (brcms_c_rate_hwrs_filter_sort_validate
5510             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5511              wlc->stf->txstreams))
5512                 goto good;
5513
5514         /* try the other band */
5515         if (brcms_is_mband_unlocked(wlc)) {
5516                 bandunit = OTHERBANDUNIT(wlc);
5517                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5518                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5519                                                        &wlc->
5520                                                        bandstate[bandunit]->
5521                                                        hw_rateset, true,
5522                                                        wlc->stf->txstreams))
5523                         goto good;
5524         }
5525
5526         return -EBADE;
5527
5528  good:
5529         /* apply new rateset */
5530         memcpy(&wlc->default_bss->rateset, &new,
5531                sizeof(struct brcms_c_rateset));
5532         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5533                sizeof(struct brcms_c_rateset));
5534         return 0;
5535 }
5536
5537 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5538 {
5539         u8 r;
5540         bool war = false;
5541
5542         if (wlc->bsscfg->associated)
5543                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5544         else
5545                 r = wlc->default_bss->rateset.rates[0];
5546
5547         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5548 }
5549
5550 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5551 {
5552         u16 chspec = ch20mhz_chspec(channel);
5553
5554         if (channel < 0 || channel > MAXCHANNEL)
5555                 return -EINVAL;
5556
5557         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5558                 return -EINVAL;
5559
5560
5561         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5562                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5563                         wlc->bandinit_pending = true;
5564                 else
5565                         wlc->bandinit_pending = false;
5566         }
5567
5568         wlc->default_bss->chanspec = chspec;
5569         /* brcms_c_BSSinit() will sanitize the rateset before
5570          * using it.. */
5571         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5572                 brcms_c_set_home_chanspec(wlc, chspec);
5573                 brcms_c_suspend_mac_and_wait(wlc);
5574                 brcms_c_set_chanspec(wlc, chspec);
5575                 brcms_c_enable_mac(wlc);
5576         }
5577         return 0;
5578 }
5579
5580 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5581 {
5582         int ac;
5583
5584         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5585             lrl < 1 || lrl > RETRY_SHORT_MAX)
5586                 return -EINVAL;
5587
5588         wlc->SRL = srl;
5589         wlc->LRL = lrl;
5590
5591         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5592
5593         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
5594                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5595                                                EDCF_SHORT,  wlc->SRL);
5596                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5597                                                EDCF_LONG, wlc->LRL);
5598         }
5599         brcms_c_wme_retries_write(wlc);
5600
5601         return 0;
5602 }
5603
5604 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5605                                  struct brcm_rateset *currs)
5606 {
5607         struct brcms_c_rateset *rs;
5608
5609         if (wlc->pub->associated)
5610                 rs = &wlc->bsscfg->current_bss->rateset;
5611         else
5612                 rs = &wlc->default_bss->rateset;
5613
5614         /* Copy only legacy rateset section */
5615         currs->count = rs->count;
5616         memcpy(&currs->rates, &rs->rates, rs->count);
5617 }
5618
5619 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5620 {
5621         struct brcms_c_rateset internal_rs;
5622         int bcmerror;
5623
5624         if (rs->count > BRCMS_NUMRATES)
5625                 return -ENOBUFS;
5626
5627         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5628
5629         /* Copy only legacy rateset section */
5630         internal_rs.count = rs->count;
5631         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5632
5633         /* merge rateset coming in with the current mcsset */
5634         if (wlc->pub->_n_enab & SUPPORT_11N) {
5635                 struct brcms_bss_info *mcsset_bss;
5636                 if (wlc->bsscfg->associated)
5637                         mcsset_bss = wlc->bsscfg->current_bss;
5638                 else
5639                         mcsset_bss = wlc->default_bss;
5640                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5641                        MCSSET_LEN);
5642         }
5643
5644         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5645         if (!bcmerror)
5646                 brcms_c_ofdm_rateset_war(wlc);
5647
5648         return bcmerror;
5649 }
5650
5651 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5652 {
5653         if (period < DOT11_MIN_BEACON_PERIOD ||
5654             period > DOT11_MAX_BEACON_PERIOD)
5655                 return -EINVAL;
5656
5657         wlc->default_bss->beacon_period = period;
5658         return 0;
5659 }
5660
5661 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5662 {
5663         return wlc->band->phytype;
5664 }
5665
5666 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5667 {
5668         wlc->shortslot_override = sslot_override;
5669
5670         /*
5671          * shortslot is an 11g feature, so no more work if we are
5672          * currently on the 5G band
5673          */
5674         if (wlc->band->bandtype == BRCM_BAND_5G)
5675                 return;
5676
5677         if (wlc->pub->up && wlc->pub->associated) {
5678                 /* let watchdog or beacon processing update shortslot */
5679         } else if (wlc->pub->up) {
5680                 /* unassociated shortslot is off */
5681                 brcms_c_switch_shortslot(wlc, false);
5682         } else {
5683                 /* driver is down, so just update the brcms_c_info
5684                  * value */
5685                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5686                         wlc->shortslot = false;
5687                 else
5688                         wlc->shortslot =
5689                             (wlc->shortslot_override ==
5690                              BRCMS_SHORTSLOT_ON);
5691         }
5692 }
5693
5694 /*
5695  * register watchdog and down handlers.
5696  */
5697 int brcms_c_module_register(struct brcms_pub *pub,
5698                             const char *name, struct brcms_info *hdl,
5699                             int (*d_fn)(void *handle))
5700 {
5701         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5702         int i;
5703
5704         /* find an empty entry and just add, no duplication check! */
5705         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5706                 if (wlc->modulecb[i].name[0] == '\0') {
5707                         strncpy(wlc->modulecb[i].name, name,
5708                                 sizeof(wlc->modulecb[i].name) - 1);
5709                         wlc->modulecb[i].hdl = hdl;
5710                         wlc->modulecb[i].down_fn = d_fn;
5711                         return 0;
5712                 }
5713         }
5714
5715         return -ENOSR;
5716 }
5717
5718 /* unregister module callbacks */
5719 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5720                               struct brcms_info *hdl)
5721 {
5722         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5723         int i;
5724
5725         if (wlc == NULL)
5726                 return -ENODATA;
5727
5728         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5729                 if (!strcmp(wlc->modulecb[i].name, name) &&
5730                     (wlc->modulecb[i].hdl == hdl)) {
5731                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5732                         return 0;
5733                 }
5734         }
5735
5736         /* table not found! */
5737         return -ENODATA;
5738 }
5739
5740 void brcms_c_print_txstatus(struct tx_status *txs)
5741 {
5742         pr_debug("\ntxpkt (MPDU) Complete\n");
5743
5744         pr_debug("FrameID: %04x   TxStatus: %04x\n", txs->frameid, txs->status);
5745
5746         pr_debug("[15:12]  %d  frame attempts\n",
5747                   (txs->status & TX_STATUS_FRM_RTX_MASK) >>
5748                  TX_STATUS_FRM_RTX_SHIFT);
5749         pr_debug(" [11:8]  %d  rts attempts\n",
5750                  (txs->status & TX_STATUS_RTS_RTX_MASK) >>
5751                  TX_STATUS_RTS_RTX_SHIFT);
5752         pr_debug("    [7]  %d  PM mode indicated\n",
5753                  txs->status & TX_STATUS_PMINDCTD ? 1 : 0);
5754         pr_debug("    [6]  %d  intermediate status\n",
5755                  txs->status & TX_STATUS_INTERMEDIATE ? 1 : 0);
5756         pr_debug("    [5]  %d  AMPDU\n",
5757                  txs->status & TX_STATUS_AMPDU ? 1 : 0);
5758         pr_debug("  [4:2]  %d  Frame Suppressed Reason (%s)\n",
5759                  (txs->status & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT,
5760                  (const char *[]) {
5761                         "None",
5762                         "PMQ Entry",
5763                         "Flush request",
5764                         "Previous frag failure",
5765                         "Channel mismatch",
5766                         "Lifetime Expiry",
5767                         "Underflow"
5768                  } [(txs->status & TX_STATUS_SUPR_MASK) >>
5769                     TX_STATUS_SUPR_SHIFT]);
5770         pr_debug("    [1]  %d  acked\n",
5771                  txs->status & TX_STATUS_ACK_RCV ? 1 : 0);
5772
5773         pr_debug("LastTxTime: %04x Seq: %04x PHYTxStatus: %04x RxAckRSSI: %04x RxAckSQ: %04x\n",
5774                  txs->lasttxtime, txs->sequence, txs->phyerr,
5775                  (txs->ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT,
5776                  (txs->ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5777 }
5778
5779 bool brcms_c_chipmatch(u16 vendor, u16 device)
5780 {
5781         if (vendor != PCI_VENDOR_ID_BROADCOM) {
5782                 pr_err("unknown vendor id %04x\n", vendor);
5783                 return false;
5784         }
5785
5786         if (device == BCM43224_D11N_ID_VEN1)
5787                 return true;
5788         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5789                 return true;
5790         if (device == BCM4313_D11N2G_ID)
5791                 return true;
5792         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5793                 return true;
5794
5795         pr_err("unknown device id %04x\n", device);
5796         return false;
5797 }
5798
5799 #if defined(DEBUG)
5800 void brcms_c_print_txdesc(struct d11txh *txh)
5801 {
5802         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5803         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5804         u16 mfc = le16_to_cpu(txh->MacFrameControl);
5805         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5806         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5807         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5808         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5809         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5810         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5811         u16 mainrates = le16_to_cpu(txh->MainRates);
5812         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5813         u8 *iv = txh->IV;
5814         u8 *ra = txh->TxFrameRA;
5815         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5816         u8 *rtspfb = txh->RTSPLCPFallback;
5817         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5818         u8 *fragpfb = txh->FragPLCPFallback;
5819         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5820         u16 mmodelen = le16_to_cpu(txh->MModeLen);
5821         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5822         u16 tfid = le16_to_cpu(txh->TxFrameID);
5823         u16 txs = le16_to_cpu(txh->TxStatus);
5824         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5825         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5826         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5827         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5828
5829         u8 *rtsph = txh->RTSPhyHeader;
5830         struct ieee80211_rts rts = txh->rts_frame;
5831
5832         /* add plcp header along with txh descriptor */
5833         brcmu_dbg_hex_dump(txh, sizeof(struct d11txh) + 48,
5834                            "Raw TxDesc + plcp header:\n");
5835
5836         pr_debug("TxCtlLow: %04x ", mtcl);
5837         pr_debug("TxCtlHigh: %04x ", mtch);
5838         pr_debug("FC: %04x ", mfc);
5839         pr_debug("FES Time: %04x\n", tfest);
5840         pr_debug("PhyCtl: %04x%s ", ptcw,
5841                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5842         pr_debug("PhyCtl_1: %04x ", ptcw_1);
5843         pr_debug("PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5844         pr_debug("PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5845         pr_debug("PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5846         pr_debug("MainRates: %04x ", mainrates);
5847         pr_debug("XtraFrameTypes: %04x ", xtraft);
5848         pr_debug("\n");
5849
5850         print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5851         print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5852                              ra, sizeof(txh->TxFrameRA));
5853
5854         pr_debug("Fb FES Time: %04x ", tfestfb);
5855         print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5856                              rtspfb, sizeof(txh->RTSPLCPFallback));
5857         pr_debug("RTS DUR: %04x ", rtsdfb);
5858         print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5859                              fragpfb, sizeof(txh->FragPLCPFallback));
5860         pr_debug("DUR: %04x", fragdfb);
5861         pr_debug("\n");
5862
5863         pr_debug("MModeLen: %04x ", mmodelen);
5864         pr_debug("MModeFbrLen: %04x\n", mmodefbrlen);
5865
5866         pr_debug("FrameID:     %04x\n", tfid);
5867         pr_debug("TxStatus:    %04x\n", txs);
5868
5869         pr_debug("MaxNumMpdu:  %04x\n", mnmpdu);
5870         pr_debug("MaxAggbyte:  %04x\n", mabyte);
5871         pr_debug("MaxAggbyte_fb:  %04x\n", mabyte_f);
5872         pr_debug("MinByte:     %04x\n", mmbyte);
5873
5874         print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5875                              rtsph, sizeof(txh->RTSPhyHeader));
5876         print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5877                              (u8 *)&rts, sizeof(txh->rts_frame));
5878         pr_debug("\n");
5879 }
5880 #endif                          /* defined(DEBUG) */
5881
5882 #if defined(DEBUG)
5883 static int
5884 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5885                      int len)
5886 {
5887         int i;
5888         char *p = buf;
5889         char hexstr[16];
5890         int slen = 0, nlen = 0;
5891         u32 bit;
5892         const char *name;
5893
5894         if (len < 2 || !buf)
5895                 return 0;
5896
5897         buf[0] = '\0';
5898
5899         for (i = 0; flags != 0; i++) {
5900                 bit = bd[i].bit;
5901                 name = bd[i].name;
5902                 if (bit == 0 && flags != 0) {
5903                         /* print any unnamed bits */
5904                         snprintf(hexstr, 16, "0x%X", flags);
5905                         name = hexstr;
5906                         flags = 0;      /* exit loop */
5907                 } else if ((flags & bit) == 0)
5908                         continue;
5909                 flags &= ~bit;
5910                 nlen = strlen(name);
5911                 slen += nlen;
5912                 /* count btwn flag space */
5913                 if (flags != 0)
5914                         slen += 1;
5915                 /* need NULL char as well */
5916                 if (len <= slen)
5917                         break;
5918                 /* copy NULL char but don't count it */
5919                 strncpy(p, name, nlen + 1);
5920                 p += nlen;
5921                 /* copy btwn flag space and NULL char */
5922                 if (flags != 0)
5923                         p += snprintf(p, 2, " ");
5924                 len -= slen;
5925         }
5926
5927         /* indicate the str was too short */
5928         if (flags != 0) {
5929                 if (len < 2)
5930                         p -= 2 - len;   /* overwrite last char */
5931                 p += snprintf(p, 2, ">");
5932         }
5933
5934         return (int)(p - buf);
5935 }
5936 #endif                          /* defined(DEBUG) */
5937
5938 #if defined(DEBUG)
5939 void brcms_c_print_rxh(struct d11rxhdr *rxh)
5940 {
5941         u16 len = rxh->RxFrameSize;
5942         u16 phystatus_0 = rxh->PhyRxStatus_0;
5943         u16 phystatus_1 = rxh->PhyRxStatus_1;
5944         u16 phystatus_2 = rxh->PhyRxStatus_2;
5945         u16 phystatus_3 = rxh->PhyRxStatus_3;
5946         u16 macstatus1 = rxh->RxStatus1;
5947         u16 macstatus2 = rxh->RxStatus2;
5948         char flagstr[64];
5949         char lenbuf[20];
5950         static const struct brcms_c_bit_desc macstat_flags[] = {
5951                 {RXS_FCSERR, "FCSErr"},
5952                 {RXS_RESPFRAMETX, "Reply"},
5953                 {RXS_PBPRES, "PADDING"},
5954                 {RXS_DECATMPT, "DeCr"},
5955                 {RXS_DECERR, "DeCrErr"},
5956                 {RXS_BCNSENT, "Bcn"},
5957                 {0, NULL}
5958         };
5959
5960         brcmu_dbg_hex_dump(rxh, sizeof(struct d11rxhdr), "Raw RxDesc:\n");
5961
5962         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
5963
5964         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
5965
5966         pr_debug("RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
5967                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
5968         pr_debug("RxPHYStatus:     %04x %04x %04x %04x\n",
5969                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
5970         pr_debug("RxMACStatus:     %x %s\n", macstatus1, flagstr);
5971         pr_debug("RXMACaggtype:    %x\n",
5972                (macstatus2 & RXS_AGGTYPE_MASK));
5973         pr_debug("RxTSFTime:       %04x\n", rxh->RxTSFTime);
5974 }
5975 #endif                          /* defined(DEBUG) */
5976
5977 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
5978 {
5979         u16 table_ptr;
5980         u8 phy_rate, index;
5981
5982         /* get the phy specific rate encoding for the PLCP SIGNAL field */
5983         if (is_ofdm_rate(rate))
5984                 table_ptr = M_RT_DIRMAP_A;
5985         else
5986                 table_ptr = M_RT_DIRMAP_B;
5987
5988         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
5989          * the index into the rate table.
5990          */
5991         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
5992         index = phy_rate & 0xf;
5993
5994         /* Find the SHM pointer to the rate table entry by looking in the
5995          * Direct-map Table
5996          */
5997         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
5998 }
5999
6000 static bool
6001 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6002                       struct sk_buff *pkt, int prec, bool head)
6003 {
6004         struct sk_buff *p;
6005         int eprec = -1;         /* precedence to evict from */
6006
6007         /* Determine precedence from which to evict packet, if any */
6008         if (pktq_pfull(q, prec))
6009                 eprec = prec;
6010         else if (pktq_full(q)) {
6011                 p = brcmu_pktq_peek_tail(q, &eprec);
6012                 if (eprec > prec) {
6013                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6014                                   "\n", __func__, eprec, prec);
6015                         return false;
6016                 }
6017         }
6018
6019         /* Evict if needed */
6020         if (eprec >= 0) {
6021                 bool discard_oldest;
6022
6023                 discard_oldest = ac_bitmap_tst(0, eprec);
6024
6025                 /* Refuse newer packet unless configured to discard oldest */
6026                 if (eprec == prec && !discard_oldest) {
6027                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6028                                   "\n", __func__, prec);
6029                         return false;
6030                 }
6031
6032                 /* Evict packet according to discard policy */
6033                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6034                         brcmu_pktq_pdeq_tail(q, eprec);
6035                 brcmu_pkt_buf_free_skb(p);
6036         }
6037
6038         /* Enqueue */
6039         if (head)
6040                 p = brcmu_pktq_penq_head(q, prec, pkt);
6041         else
6042                 p = brcmu_pktq_penq(q, prec, pkt);
6043
6044         return true;
6045 }
6046
6047 /*
6048  * Attempts to queue a packet onto a multiple-precedence queue,
6049  * if necessary evicting a lower precedence packet from the queue.
6050  *
6051  * 'prec' is the precedence number that has already been mapped
6052  * from the packet priority.
6053  *
6054  * Returns true if packet consumed (queued), false if not.
6055  */
6056 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6057                       struct sk_buff *pkt, int prec)
6058 {
6059         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6060 }
6061
6062 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6063                      struct sk_buff *sdu, uint prec)
6064 {
6065         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6066         struct pktq *q = &qi->q;
6067         int prio;
6068
6069         prio = sdu->priority;
6070
6071         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6072                 /*
6073                  * we might hit this condtion in case
6074                  * packet flooding from mac80211 stack
6075                  */
6076                 brcmu_pkt_buf_free_skb(sdu);
6077         }
6078 }
6079
6080 /*
6081  * bcmc_fid_generate:
6082  * Generate frame ID for a BCMC packet.  The frag field is not used
6083  * for MC frames so is used as part of the sequence number.
6084  */
6085 static inline u16
6086 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6087                   struct d11txh *txh)
6088 {
6089         u16 frameid;
6090
6091         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6092                                                   TXFID_QUEUE_MASK);
6093         frameid |=
6094             (((wlc->
6095                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6096             TX_BCMC_FIFO;
6097
6098         return frameid;
6099 }
6100
6101 static uint
6102 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6103                       u8 preamble_type)
6104 {
6105         uint dur = 0;
6106
6107         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6108                 wlc->pub->unit, rspec, preamble_type);
6109         /*
6110          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6111          * is less than or equal to the rate of the immediately previous
6112          * frame in the FES
6113          */
6114         rspec = brcms_basic_rate(wlc, rspec);
6115         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6116         dur =
6117             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6118                                 (DOT11_ACK_LEN + FCS_LEN));
6119         return dur;
6120 }
6121
6122 static uint
6123 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6124                       u8 preamble_type)
6125 {
6126         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6127                 wlc->pub->unit, rspec, preamble_type);
6128         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6129 }
6130
6131 static uint
6132 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6133                      u8 preamble_type)
6134 {
6135         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6136                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6137         /*
6138          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6139          * is less than or equal to the rate of the immediately previous
6140          * frame in the FES
6141          */
6142         rspec = brcms_basic_rate(wlc, rspec);
6143         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6144         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6145                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6146                                     FCS_LEN));
6147 }
6148
6149 /* brcms_c_compute_frame_dur()
6150  *
6151  * Calculate the 802.11 MAC header DUR field for MPDU
6152  * DUR for a single frame = 1 SIFS + 1 ACK
6153  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6154  *
6155  * rate                 MPDU rate in unit of 500kbps
6156  * next_frag_len        next MPDU length in bytes
6157  * preamble_type        use short/GF or long/MM PLCP header
6158  */
6159 static u16
6160 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6161                       u8 preamble_type, uint next_frag_len)
6162 {
6163         u16 dur, sifs;
6164
6165         sifs = get_sifs(wlc->band);
6166
6167         dur = sifs;
6168         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6169
6170         if (next_frag_len) {
6171                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6172                 dur *= 2;
6173                 /* add another SIFS and the frag time */
6174                 dur += sifs;
6175                 dur +=
6176                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6177                                                  next_frag_len);
6178         }
6179         return dur;
6180 }
6181
6182 /* The opposite of brcms_c_calc_frame_time */
6183 static uint
6184 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6185                    u8 preamble_type, uint dur)
6186 {
6187         uint nsyms, mac_len, Ndps, kNdps;
6188         uint rate = rspec2rate(ratespec);
6189
6190         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6191                  wlc->pub->unit, ratespec, preamble_type, dur);
6192
6193         if (is_mcs_rate(ratespec)) {
6194                 uint mcs = ratespec & RSPEC_RATE_MASK;
6195                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6196                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6197                 /* payload calculation matches that of regular ofdm */
6198                 if (wlc->band->bandtype == BRCM_BAND_2G)
6199                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6200                 /* kNdbps = kbps * 4 */
6201                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6202                                    rspec_issgi(ratespec)) * 4;
6203                 nsyms = dur / APHY_SYMBOL_TIME;
6204                 mac_len =
6205                     ((nsyms * kNdps) -
6206                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6207         } else if (is_ofdm_rate(ratespec)) {
6208                 dur -= APHY_PREAMBLE_TIME;
6209                 dur -= APHY_SIGNAL_TIME;
6210                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6211                 Ndps = rate * 2;
6212                 nsyms = dur / APHY_SYMBOL_TIME;
6213                 mac_len =
6214                     ((nsyms * Ndps) -
6215                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6216         } else {
6217                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6218                         dur -= BPHY_PLCP_SHORT_TIME;
6219                 else
6220                         dur -= BPHY_PLCP_TIME;
6221                 mac_len = dur * rate;
6222                 /* divide out factor of 2 in rate (1/2 mbps) */
6223                 mac_len = mac_len / 8 / 2;
6224         }
6225         return mac_len;
6226 }
6227
6228 /*
6229  * Return true if the specified rate is supported by the specified band.
6230  * BRCM_BAND_AUTO indicates the current band.
6231  */
6232 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6233                     bool verbose)
6234 {
6235         struct brcms_c_rateset *hw_rateset;
6236         uint i;
6237
6238         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6239                 hw_rateset = &wlc->band->hw_rateset;
6240         else if (wlc->pub->_nbands > 1)
6241                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6242         else
6243                 /* other band specified and we are a single band device */
6244                 return false;
6245
6246         /* check if this is a mimo rate */
6247         if (is_mcs_rate(rspec)) {
6248                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6249                         goto error;
6250
6251                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6252         }
6253
6254         for (i = 0; i < hw_rateset->count; i++)
6255                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6256                         return true;
6257  error:
6258         if (verbose)
6259                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6260                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6261
6262         return false;
6263 }
6264
6265 static u32
6266 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6267                        u32 int_val)
6268 {
6269         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6270         u8 rate = int_val & NRATE_RATE_MASK;
6271         u32 rspec;
6272         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6273         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6274         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6275                                   == NRATE_OVERRIDE_MCS_ONLY);
6276         int bcmerror = 0;
6277
6278         if (!ismcs)
6279                 return (u32) rate;
6280
6281         /* validate the combination of rate/mcs/stf is allowed */
6282         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6283                 /* mcs only allowed when nmode */
6284                 if (stf > PHY_TXC1_MODE_SDM) {
6285                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6286                                   wlc->pub->unit, __func__);
6287                         bcmerror = -EINVAL;
6288                         goto done;
6289                 }
6290
6291                 /* mcs 32 is a special case, DUP mode 40 only */
6292                 if (rate == 32) {
6293                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6294                             ((stf != PHY_TXC1_MODE_SISO)
6295                              && (stf != PHY_TXC1_MODE_CDD))) {
6296                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6297                                           "32\n", wlc->pub->unit, __func__);
6298                                 bcmerror = -EINVAL;
6299                                 goto done;
6300                         }
6301                         /* mcs > 7 must use stf SDM */
6302                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6303                         /* mcs > 7 must use stf SDM */
6304                         if (stf != PHY_TXC1_MODE_SDM) {
6305                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6306                                        "SDM mode for mcs %d\n",
6307                                        wlc->pub->unit, rate);
6308                                 stf = PHY_TXC1_MODE_SDM;
6309                         }
6310                 } else {
6311                         /*
6312                          * MCS 0-7 may use SISO, CDD, and for
6313                          * phy_rev >= 3 STBC
6314                          */
6315                         if ((stf > PHY_TXC1_MODE_STBC) ||
6316                             (!BRCMS_STBC_CAP_PHY(wlc)
6317                              && (stf == PHY_TXC1_MODE_STBC))) {
6318                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6319                                           "\n", wlc->pub->unit, __func__);
6320                                 bcmerror = -EINVAL;
6321                                 goto done;
6322                         }
6323                 }
6324         } else if (is_ofdm_rate(rate)) {
6325                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6326                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6327                                   wlc->pub->unit, __func__);
6328                         bcmerror = -EINVAL;
6329                         goto done;
6330                 }
6331         } else if (is_cck_rate(rate)) {
6332                 if ((cur_band->bandtype != BRCM_BAND_2G)
6333                     || (stf != PHY_TXC1_MODE_SISO)) {
6334                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6335                                   wlc->pub->unit, __func__);
6336                         bcmerror = -EINVAL;
6337                         goto done;
6338                 }
6339         } else {
6340                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6341                           wlc->pub->unit, __func__);
6342                 bcmerror = -EINVAL;
6343                 goto done;
6344         }
6345         /* make sure multiple antennae are available for non-siso rates */
6346         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6347                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6348                           "request\n", wlc->pub->unit, __func__);
6349                 bcmerror = -EINVAL;
6350                 goto done;
6351         }
6352
6353         rspec = rate;
6354         if (ismcs) {
6355                 rspec |= RSPEC_MIMORATE;
6356                 /* For STBC populate the STC field of the ratespec */
6357                 if (stf == PHY_TXC1_MODE_STBC) {
6358                         u8 stc;
6359                         stc = 1;        /* Nss for single stream is always 1 */
6360                         rspec |= (stc << RSPEC_STC_SHIFT);
6361                 }
6362         }
6363
6364         rspec |= (stf << RSPEC_STF_SHIFT);
6365
6366         if (override_mcs_only)
6367                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6368
6369         if (issgi)
6370                 rspec |= RSPEC_SHORT_GI;
6371
6372         if ((rate != 0)
6373             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6374                 return rate;
6375
6376         return rspec;
6377 done:
6378         return rate;
6379 }
6380
6381 /*
6382  * Compute PLCP, but only requires actual rate and length of pkt.
6383  * Rate is given in the driver standard multiple of 500 kbps.
6384  * le is set for 11 Mbps rate if necessary.
6385  * Broken out for PRQ.
6386  */
6387
6388 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6389                              uint length, u8 *plcp)
6390 {
6391         u16 usec = 0;
6392         u8 le = 0;
6393
6394         switch (rate_500) {
6395         case BRCM_RATE_1M:
6396                 usec = length << 3;
6397                 break;
6398         case BRCM_RATE_2M:
6399                 usec = length << 2;
6400                 break;
6401         case BRCM_RATE_5M5:
6402                 usec = (length << 4) / 11;
6403                 if ((length << 4) - (usec * 11) > 0)
6404                         usec++;
6405                 break;
6406         case BRCM_RATE_11M:
6407                 usec = (length << 3) / 11;
6408                 if ((length << 3) - (usec * 11) > 0) {
6409                         usec++;
6410                         if ((usec * 11) - (length << 3) >= 8)
6411                                 le = D11B_PLCP_SIGNAL_LE;
6412                 }
6413                 break;
6414
6415         default:
6416                 wiphy_err(wlc->wiphy,
6417                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6418                           rate_500);
6419                 rate_500 = BRCM_RATE_1M;
6420                 usec = length << 3;
6421                 break;
6422         }
6423         /* PLCP signal byte */
6424         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6425         /* PLCP service byte */
6426         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6427         /* PLCP length u16, little endian */
6428         plcp[2] = usec & 0xff;
6429         plcp[3] = (usec >> 8) & 0xff;
6430         /* PLCP CRC16 */
6431         plcp[4] = 0;
6432         plcp[5] = 0;
6433 }
6434
6435 /* Rate: 802.11 rate code, length: PSDU length in octets */
6436 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6437 {
6438         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6439         plcp[0] = mcs;
6440         if (rspec_is40mhz(rspec) || (mcs == 32))
6441                 plcp[0] |= MIMO_PLCP_40MHZ;
6442         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6443         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6444         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6445         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6446         plcp[5] = 0;
6447 }
6448
6449 /* Rate: 802.11 rate code, length: PSDU length in octets */
6450 static void
6451 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6452 {
6453         u8 rate_signal;
6454         u32 tmp = 0;
6455         int rate = rspec2rate(rspec);
6456
6457         /*
6458          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6459          * transmitted first
6460          */
6461         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6462         memset(plcp, 0, D11_PHY_HDR_LEN);
6463         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6464
6465         tmp = (length & 0xfff) << 5;
6466         plcp[2] |= (tmp >> 16) & 0xff;
6467         plcp[1] |= (tmp >> 8) & 0xff;
6468         plcp[0] |= tmp & 0xff;
6469 }
6470
6471 /* Rate: 802.11 rate code, length: PSDU length in octets */
6472 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6473                                  uint length, u8 *plcp)
6474 {
6475         int rate = rspec2rate(rspec);
6476
6477         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6478 }
6479
6480 static void
6481 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6482                      uint length, u8 *plcp)
6483 {
6484         if (is_mcs_rate(rspec))
6485                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6486         else if (is_ofdm_rate(rspec))
6487                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6488         else
6489                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6490 }
6491
6492 /* brcms_c_compute_rtscts_dur()
6493  *
6494  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6495  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6496  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6497  *
6498  * cts                  cts-to-self or rts/cts
6499  * rts_rate             rts or cts rate in unit of 500kbps
6500  * rate                 next MPDU rate in unit of 500kbps
6501  * frame_len            next MPDU frame length in bytes
6502  */
6503 u16
6504 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6505                            u32 rts_rate,
6506                            u32 frame_rate, u8 rts_preamble_type,
6507                            u8 frame_preamble_type, uint frame_len, bool ba)
6508 {
6509         u16 dur, sifs;
6510
6511         sifs = get_sifs(wlc->band);
6512
6513         if (!cts_only) {
6514                 /* RTS/CTS */
6515                 dur = 3 * sifs;
6516                 dur +=
6517                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6518                                                rts_preamble_type);
6519         } else {
6520                 /* CTS-TO-SELF */
6521                 dur = 2 * sifs;
6522         }
6523
6524         dur +=
6525             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6526                                          frame_len);
6527         if (ba)
6528                 dur +=
6529                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6530                                               BRCMS_SHORT_PREAMBLE);
6531         else
6532                 dur +=
6533                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6534                                                frame_preamble_type);
6535         return dur;
6536 }
6537
6538 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6539 {
6540         u16 phyctl1 = 0;
6541         u16 bw;
6542
6543         if (BRCMS_ISLCNPHY(wlc->band)) {
6544                 bw = PHY_TXC1_BW_20MHZ;
6545         } else {
6546                 bw = rspec_get_bw(rspec);
6547                 /* 10Mhz is not supported yet */
6548                 if (bw < PHY_TXC1_BW_20MHZ) {
6549                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6550                                   "not supported yet, set to 20L\n", bw);
6551                         bw = PHY_TXC1_BW_20MHZ;
6552                 }
6553         }
6554
6555         if (is_mcs_rate(rspec)) {
6556                 uint mcs = rspec & RSPEC_RATE_MASK;
6557
6558                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6559                 phyctl1 = rspec_phytxbyte2(rspec);
6560                 /* set the upper byte of phyctl1 */
6561                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6562         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6563                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6564                 /*
6565                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6566                  * Data Rate. Eventually MIMOPHY would also be converted to
6567                  * this format
6568                  */
6569                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6570                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6571         } else {                /* legacy OFDM/CCK */
6572                 s16 phycfg;
6573                 /* get the phyctl byte from rate phycfg table */
6574                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6575                 if (phycfg == -1) {
6576                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6577                                   "legacy OFDM/CCK rate\n");
6578                         phycfg = 0;
6579                 }
6580                 /* set the upper byte of phyctl1 */
6581                 phyctl1 =
6582                     (bw | (phycfg << 8) |
6583                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6584         }
6585         return phyctl1;
6586 }
6587
6588 /*
6589  * Add struct d11txh, struct cck_phy_hdr.
6590  *
6591  * 'p' data must start with 802.11 MAC header
6592  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6593  *
6594  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6595  *
6596  */
6597 static u16
6598 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6599                      struct sk_buff *p, struct scb *scb, uint frag,
6600                      uint nfrags, uint queue, uint next_frag_len)
6601 {
6602         struct ieee80211_hdr *h;
6603         struct d11txh *txh;
6604         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6605         int len, phylen, rts_phylen;
6606         u16 mch, phyctl, xfts, mainrates;
6607         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6608         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6609         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6610         bool use_rts = false;
6611         bool use_cts = false;
6612         bool use_rifs = false;
6613         bool short_preamble[2] = { false, false };
6614         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6615         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6616         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6617         struct ieee80211_rts *rts = NULL;
6618         bool qos;
6619         uint ac;
6620         bool hwtkmic = false;
6621         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6622 #define ANTCFG_NONE 0xFF
6623         u8 antcfg = ANTCFG_NONE;
6624         u8 fbantcfg = ANTCFG_NONE;
6625         uint phyctl1_stf = 0;
6626         u16 durid = 0;
6627         struct ieee80211_tx_rate *txrate[2];
6628         int k;
6629         struct ieee80211_tx_info *tx_info;
6630         bool is_mcs;
6631         u16 mimo_txbw;
6632         u8 mimo_preamble_type;
6633
6634         /* locate 802.11 MAC header */
6635         h = (struct ieee80211_hdr *)(p->data);
6636         qos = ieee80211_is_data_qos(h->frame_control);
6637
6638         /* compute length of frame in bytes for use in PLCP computations */
6639         len = p->len;
6640         phylen = len + FCS_LEN;
6641
6642         /* Get tx_info */
6643         tx_info = IEEE80211_SKB_CB(p);
6644
6645         /* add PLCP */
6646         plcp = skb_push(p, D11_PHY_HDR_LEN);
6647
6648         /* add Broadcom tx descriptor header */
6649         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6650         memset(txh, 0, D11_TXH_LEN);
6651
6652         /* setup frameid */
6653         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6654                 /* non-AP STA should never use BCMC queue */
6655                 if (queue == TX_BCMC_FIFO) {
6656                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6657                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6658                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6659                 } else {
6660                         /* Increment the counter for first fragment */
6661                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6662                                 scb->seqnum[p->priority]++;
6663
6664                         /* extract fragment number from frame first */
6665                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6666                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6667                         h->seq_ctrl = cpu_to_le16(seq);
6668
6669                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6670                             (queue & TXFID_QUEUE_MASK);
6671                 }
6672         }
6673         frameid |= queue & TXFID_QUEUE_MASK;
6674
6675         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6676         if (ieee80211_is_beacon(h->frame_control))
6677                 mcl |= TXC_IGNOREPMQ;
6678
6679         txrate[0] = tx_info->control.rates;
6680         txrate[1] = txrate[0] + 1;
6681
6682         /*
6683          * if rate control algorithm didn't give us a fallback
6684          * rate, use the primary rate
6685          */
6686         if (txrate[1]->idx < 0)
6687                 txrate[1] = txrate[0];
6688
6689         for (k = 0; k < hw->max_rates; k++) {
6690                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6691                 if (!is_mcs) {
6692                         if ((txrate[k]->idx >= 0)
6693                             && (txrate[k]->idx <
6694                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6695                                 rspec[k] =
6696                                     hw->wiphy->bands[tx_info->band]->
6697                                     bitrates[txrate[k]->idx].hw_value;
6698                                 short_preamble[k] =
6699                                     txrate[k]->
6700                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6701                                     true : false;
6702                         } else {
6703                                 rspec[k] = BRCM_RATE_1M;
6704                         }
6705                 } else {
6706                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6707                                         NRATE_MCS_INUSE | txrate[k]->idx);
6708                 }
6709
6710                 /*
6711                  * Currently only support same setting for primay and
6712                  * fallback rates. Unify flags for each rate into a
6713                  * single value for the frame
6714                  */
6715                 use_rts |=
6716                     txrate[k]->
6717                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6718                 use_cts |=
6719                     txrate[k]->
6720                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6721
6722
6723                 /*
6724                  * (1) RATE:
6725                  *   determine and validate primary rate
6726                  *   and fallback rates
6727                  */
6728                 if (!rspec_active(rspec[k])) {
6729                         rspec[k] = BRCM_RATE_1M;
6730                 } else {
6731                         if (!is_multicast_ether_addr(h->addr1)) {
6732                                 /* set tx antenna config */
6733                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6734                                         false, 0, 0, &antcfg, &fbantcfg);
6735                         }
6736                 }
6737         }
6738
6739         phyctl1_stf = wlc->stf->ss_opmode;
6740
6741         if (wlc->pub->_n_enab & SUPPORT_11N) {
6742                 for (k = 0; k < hw->max_rates; k++) {
6743                         /*
6744                          * apply siso/cdd to single stream mcs's or ofdm
6745                          * if rspec is auto selected
6746                          */
6747                         if (((is_mcs_rate(rspec[k]) &&
6748                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6749                              is_ofdm_rate(rspec[k]))
6750                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6751                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6752                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6753
6754                                 /* For SISO MCS use STBC if possible */
6755                                 if (is_mcs_rate(rspec[k])
6756                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6757                                         u8 stc;
6758
6759                                         /* Nss for single stream is always 1 */
6760                                         stc = 1;
6761                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6762                                                         RSPEC_STF_SHIFT) |
6763                                                     (stc << RSPEC_STC_SHIFT);
6764                                 } else
6765                                         rspec[k] |=
6766                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6767                         }
6768
6769                         /*
6770                          * Is the phy configured to use 40MHZ frames? If
6771                          * so then pick the desired txbw
6772                          */
6773                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6774                                 /* default txbw is 20in40 SB */
6775                                 mimo_ctlchbw = mimo_txbw =
6776                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6777                                                                  wlc->band->pi))
6778                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6779
6780                                 if (is_mcs_rate(rspec[k])) {
6781                                         /* mcs 32 must be 40b/w DUP */
6782                                         if ((rspec[k] & RSPEC_RATE_MASK)
6783                                             == 32) {
6784                                                 mimo_txbw =
6785                                                     PHY_TXC1_BW_40MHZ_DUP;
6786                                                 /* use override */
6787                                         } else if (wlc->mimo_40txbw != AUTO)
6788                                                 mimo_txbw = wlc->mimo_40txbw;
6789                                         /* else check if dst is using 40 Mhz */
6790                                         else if (scb->flags & SCB_IS40)
6791                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
6792                                 } else if (is_ofdm_rate(rspec[k])) {
6793                                         if (wlc->ofdm_40txbw != AUTO)
6794                                                 mimo_txbw = wlc->ofdm_40txbw;
6795                                 } else if (wlc->cck_40txbw != AUTO) {
6796                                         mimo_txbw = wlc->cck_40txbw;
6797                                 }
6798                         } else {
6799                                 /*
6800                                  * mcs32 is 40 b/w only.
6801                                  * This is possible for probe packets on
6802                                  * a STA during SCAN
6803                                  */
6804                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6805                                         /* mcs 0 */
6806                                         rspec[k] = RSPEC_MIMORATE;
6807
6808                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
6809                         }
6810
6811                         /* Set channel width */
6812                         rspec[k] &= ~RSPEC_BW_MASK;
6813                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6814                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6815                         else
6816                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6817
6818                         /* Disable short GI, not supported yet */
6819                         rspec[k] &= ~RSPEC_SHORT_GI;
6820
6821                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
6822                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6823                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6824
6825                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6826                             && (!is_mcs_rate(rspec[k]))) {
6827                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6828                                           "RC_MCS != is_mcs_rate(rspec)\n",
6829                                           wlc->pub->unit, __func__);
6830                         }
6831
6832                         if (is_mcs_rate(rspec[k])) {
6833                                 preamble_type[k] = mimo_preamble_type;
6834
6835                                 /*
6836                                  * if SGI is selected, then forced mm
6837                                  * for single stream
6838                                  */
6839                                 if ((rspec[k] & RSPEC_SHORT_GI)
6840                                     && is_single_stream(rspec[k] &
6841                                                         RSPEC_RATE_MASK))
6842                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
6843                         }
6844
6845                         /* should be better conditionalized */
6846                         if (!is_mcs_rate(rspec[0])
6847                             && (tx_info->control.rates[0].
6848                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6849                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6850                 }
6851         } else {
6852                 for (k = 0; k < hw->max_rates; k++) {
6853                         /* Set ctrlchbw as 20Mhz */
6854                         rspec[k] &= ~RSPEC_BW_MASK;
6855                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6856
6857                         /* for nphy, stf of ofdm frames must follow policies */
6858                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6859                                 rspec[k] &= ~RSPEC_STF_MASK;
6860                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6861                         }
6862                 }
6863         }
6864
6865         /* Reset these for use with AMPDU's */
6866         txrate[0]->count = 0;
6867         txrate[1]->count = 0;
6868
6869         /* (2) PROTECTION, may change rspec */
6870         if ((ieee80211_is_data(h->frame_control) ||
6871             ieee80211_is_mgmt(h->frame_control)) &&
6872             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6873                 use_rts = true;
6874
6875         /* (3) PLCP: determine PLCP header and MAC duration,
6876          * fill struct d11txh */
6877         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6878         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6879         memcpy(&txh->FragPLCPFallback,
6880                plcp_fallback, sizeof(txh->FragPLCPFallback));
6881
6882         /* Length field now put in CCK FBR CRC field */
6883         if (is_cck_rate(rspec[1])) {
6884                 txh->FragPLCPFallback[4] = phylen & 0xff;
6885                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6886         }
6887
6888         /* MIMO-RATE: need validation ?? */
6889         mainrates = is_ofdm_rate(rspec[0]) ?
6890                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6891                         plcp[0];
6892
6893         /* DUR field for main rate */
6894         if (!ieee80211_is_pspoll(h->frame_control) &&
6895             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6896                 durid =
6897                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6898                                           next_frag_len);
6899                 h->duration_id = cpu_to_le16(durid);
6900         } else if (use_rifs) {
6901                 /* NAV protect to end of next max packet size */
6902                 durid =
6903                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6904                                                  preamble_type[0],
6905                                                  DOT11_MAX_FRAG_LEN);
6906                 durid += RIFS_11N_TIME;
6907                 h->duration_id = cpu_to_le16(durid);
6908         }
6909
6910         /* DUR field for fallback rate */
6911         if (ieee80211_is_pspoll(h->frame_control))
6912                 txh->FragDurFallback = h->duration_id;
6913         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6914                 txh->FragDurFallback = 0;
6915         else {
6916                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6917                                               preamble_type[1], next_frag_len);
6918                 txh->FragDurFallback = cpu_to_le16(durid);
6919         }
6920
6921         /* (4) MAC-HDR: MacTxControlLow */
6922         if (frag == 0)
6923                 mcl |= TXC_STARTMSDU;
6924
6925         if (!is_multicast_ether_addr(h->addr1))
6926                 mcl |= TXC_IMMEDACK;
6927
6928         if (wlc->band->bandtype == BRCM_BAND_5G)
6929                 mcl |= TXC_FREQBAND_5G;
6930
6931         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
6932                 mcl |= TXC_BW_40;
6933
6934         /* set AMIC bit if using hardware TKIP MIC */
6935         if (hwtkmic)
6936                 mcl |= TXC_AMIC;
6937
6938         txh->MacTxControlLow = cpu_to_le16(mcl);
6939
6940         /* MacTxControlHigh */
6941         mch = 0;
6942
6943         /* Set fallback rate preamble type */
6944         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
6945             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
6946                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
6947                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
6948         }
6949
6950         /* MacFrameControl */
6951         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
6952         txh->TxFesTimeNormal = cpu_to_le16(0);
6953
6954         txh->TxFesTimeFallback = cpu_to_le16(0);
6955
6956         /* TxFrameRA */
6957         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
6958
6959         /* TxFrameID */
6960         txh->TxFrameID = cpu_to_le16(frameid);
6961
6962         /*
6963          * TxStatus, Note the case of recreating the first frag of a suppressed
6964          * frame then we may need to reset the retry cnt's via the status reg
6965          */
6966         txh->TxStatus = cpu_to_le16(status);
6967
6968         /*
6969          * extra fields for ucode AMPDU aggregation, the new fields are added to
6970          * the END of previous structure so that it's compatible in driver.
6971          */
6972         txh->MaxNMpdus = cpu_to_le16(0);
6973         txh->MaxABytes_MRT = cpu_to_le16(0);
6974         txh->MaxABytes_FBR = cpu_to_le16(0);
6975         txh->MinMBytes = cpu_to_le16(0);
6976
6977         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
6978          * furnish struct d11txh */
6979         /* RTS PLCP header and RTS frame */
6980         if (use_rts || use_cts) {
6981                 if (use_rts && use_cts)
6982                         use_cts = false;
6983
6984                 for (k = 0; k < 2; k++) {
6985                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
6986                                                               false,
6987                                                               mimo_ctlchbw);
6988                 }
6989
6990                 if (!is_ofdm_rate(rts_rspec[0]) &&
6991                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
6992                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
6993                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
6994                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
6995                 }
6996
6997                 if (!is_ofdm_rate(rts_rspec[1]) &&
6998                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
6999                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7000                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7001                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7002                 }
7003
7004                 /* RTS/CTS additions to MacTxControlLow */
7005                 if (use_cts) {
7006                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7007                 } else {
7008                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7009                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7010                 }
7011
7012                 /* RTS PLCP header */
7013                 rts_plcp = txh->RTSPhyHeader;
7014                 if (use_cts)
7015                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7016                 else
7017                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7018
7019                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7020
7021                 /* fallback rate version of RTS PLCP header */
7022                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7023                                  rts_plcp_fallback);
7024                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7025                        sizeof(txh->RTSPLCPFallback));
7026
7027                 /* RTS frame fields... */
7028                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7029
7030                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7031                                                rspec[0], rts_preamble_type[0],
7032                                                preamble_type[0], phylen, false);
7033                 rts->duration = cpu_to_le16(durid);
7034                 /* fallback rate version of RTS DUR field */
7035                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7036                                                rts_rspec[1], rspec[1],
7037                                                rts_preamble_type[1],
7038                                                preamble_type[1], phylen, false);
7039                 txh->RTSDurFallback = cpu_to_le16(durid);
7040
7041                 if (use_cts) {
7042                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7043                                                          IEEE80211_STYPE_CTS);
7044
7045                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7046                 } else {
7047                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7048                                                          IEEE80211_STYPE_RTS);
7049
7050                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7051                 }
7052
7053                 /* mainrate
7054                  *    low 8 bits: main frag rate/mcs,
7055                  *    high 8 bits: rts/cts rate/mcs
7056                  */
7057                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7058                                 D11A_PHY_HDR_GRATE(
7059                                         (struct ofdm_phy_hdr *) rts_plcp) :
7060                                 rts_plcp[0]) << 8;
7061         } else {
7062                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7063                 memset((char *)&txh->rts_frame, 0,
7064                         sizeof(struct ieee80211_rts));
7065                 memset((char *)txh->RTSPLCPFallback, 0,
7066                       sizeof(txh->RTSPLCPFallback));
7067                 txh->RTSDurFallback = 0;
7068         }
7069
7070 #ifdef SUPPORT_40MHZ
7071         /* add null delimiter count */
7072         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7073                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7074                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7075
7076 #endif
7077
7078         /*
7079          * Now that RTS/RTS FB preamble types are updated, write
7080          * the final value
7081          */
7082         txh->MacTxControlHigh = cpu_to_le16(mch);
7083
7084         /*
7085          * MainRates (both the rts and frag plcp rates have
7086          * been calculated now)
7087          */
7088         txh->MainRates = cpu_to_le16(mainrates);
7089
7090         /* XtraFrameTypes */
7091         xfts = frametype(rspec[1], wlc->mimoft);
7092         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7093         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7094         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7095                                                              XFTS_CHANNEL_SHIFT;
7096         txh->XtraFrameTypes = cpu_to_le16(xfts);
7097
7098         /* PhyTxControlWord */
7099         phyctl = frametype(rspec[0], wlc->mimoft);
7100         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7101             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7102                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7103                         phyctl |= PHY_TXC_SHORT_HDR;
7104         }
7105
7106         /* phytxant is properly bit shifted */
7107         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7108         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7109
7110         /* PhyTxControlWord_1 */
7111         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7112                 u16 phyctl1 = 0;
7113
7114                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7115                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7116                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7117                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7118
7119                 if (use_rts || use_cts) {
7120                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7121                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7122                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7123                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7124                 }
7125
7126                 /*
7127                  * For mcs frames, if mixedmode(overloaded with long preamble)
7128                  * is going to be set, fill in non-zero MModeLen and/or
7129                  * MModeFbrLen it will be unnecessary if they are separated
7130                  */
7131                 if (is_mcs_rate(rspec[0]) &&
7132                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7133                         u16 mmodelen =
7134                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7135                         txh->MModeLen = cpu_to_le16(mmodelen);
7136                 }
7137
7138                 if (is_mcs_rate(rspec[1]) &&
7139                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7140                         u16 mmodefbrlen =
7141                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7142                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7143                 }
7144         }
7145
7146         ac = skb_get_queue_mapping(p);
7147         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7148                 uint frag_dur, dur, dur_fallback;
7149
7150                 /* WME: Update TXOP threshold */
7151                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7152                         frag_dur =
7153                             brcms_c_calc_frame_time(wlc, rspec[0],
7154                                         preamble_type[0], phylen);
7155
7156                         if (rts) {
7157                                 /* 1 RTS or CTS-to-self frame */
7158                                 dur =
7159                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7160                                                       rts_preamble_type[0]);
7161                                 dur_fallback =
7162                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7163                                                       rts_preamble_type[1]);
7164                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7165                                 dur += le16_to_cpu(rts->duration);
7166                                 dur_fallback +=
7167                                         le16_to_cpu(txh->RTSDurFallback);
7168                         } else if (use_rifs) {
7169                                 dur = frag_dur;
7170                                 dur_fallback = 0;
7171                         } else {
7172                                 /* frame + SIFS + ACK */
7173                                 dur = frag_dur;
7174                                 dur +=
7175                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7176                                                           preamble_type[0], 0);
7177
7178                                 dur_fallback =
7179                                     brcms_c_calc_frame_time(wlc, rspec[1],
7180                                                         preamble_type[1],
7181                                                         phylen);
7182                                 dur_fallback +=
7183                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7184                                                           preamble_type[1], 0);
7185                         }
7186                         /* NEED to set TxFesTimeNormal (hard) */
7187                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7188                         /*
7189                          * NEED to set fallback rate version of
7190                          * TxFesTimeNormal (hard)
7191                          */
7192                         txh->TxFesTimeFallback =
7193                                 cpu_to_le16((u16) dur_fallback);
7194
7195                         /*
7196                          * update txop byte threshold (txop minus intraframe
7197                          * overhead)
7198                          */
7199                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7200                                 uint newfragthresh;
7201
7202                                 newfragthresh =
7203                                     brcms_c_calc_frame_len(wlc,
7204                                         rspec[0], preamble_type[0],
7205                                         (wlc->edcf_txop[ac] -
7206                                                 (dur - frag_dur)));
7207                                 /* range bound the fragthreshold */
7208                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7209                                         newfragthresh =
7210                                             DOT11_MIN_FRAG_LEN;
7211                                 else if (newfragthresh >
7212                                          wlc->usr_fragthresh)
7213                                         newfragthresh =
7214                                             wlc->usr_fragthresh;
7215                                 /* update the fragthresh and do txc update */
7216                                 if (wlc->fragthresh[queue] !=
7217                                     (u16) newfragthresh)
7218                                         wlc->fragthresh[queue] =
7219                                             (u16) newfragthresh;
7220                         } else {
7221                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7222                                           "for rate %d\n",
7223                                           wlc->pub->unit, fifo_names[queue],
7224                                           rspec2rate(rspec[0]));
7225                         }
7226
7227                         if (dur > wlc->edcf_txop[ac])
7228                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7229                                           "exceeded phylen %d/%d dur %d/%d\n",
7230                                           wlc->pub->unit, __func__,
7231                                           fifo_names[queue],
7232                                           phylen, wlc->fragthresh[queue],
7233                                           dur, wlc->edcf_txop[ac]);
7234                 }
7235         }
7236
7237         return 0;
7238 }
7239
7240 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7241                               struct ieee80211_hw *hw)
7242 {
7243         u8 prio;
7244         uint fifo;
7245         struct scb *scb = &wlc->pri_scb;
7246         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7247
7248         /*
7249          * 802.11 standard requires management traffic
7250          * to go at highest priority
7251          */
7252         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7253                 MAXPRIO;
7254         fifo = prio2fifo[prio];
7255         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7256                 return;
7257         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7258         brcms_c_send_q(wlc);
7259 }
7260
7261 void brcms_c_send_q(struct brcms_c_info *wlc)
7262 {
7263         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7264         int prec;
7265         u16 prec_map;
7266         int err = 0, i, count;
7267         uint fifo;
7268         struct brcms_txq_info *qi = wlc->pkt_queue;
7269         struct pktq *q = &qi->q;
7270         struct ieee80211_tx_info *tx_info;
7271
7272         prec_map = wlc->tx_prec_map;
7273
7274         /* Send all the enq'd pkts that we can.
7275          * Dequeue packets with precedence with empty HW fifo only
7276          */
7277         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7278                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7279                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7280                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7281                 } else {
7282                         count = 1;
7283                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7284                         if (!err) {
7285                                 for (i = 0; i < count; i++)
7286                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7287                                                        1);
7288                         }
7289                 }
7290
7291                 if (err == -EBUSY) {
7292                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7293                         /*
7294                          * If send failed due to any other reason than a
7295                          * change in HW FIFO condition, quit. Otherwise,
7296                          * read the new prec_map!
7297                          */
7298                         if (prec_map == wlc->tx_prec_map)
7299                                 break;
7300                         prec_map = wlc->tx_prec_map;
7301                 }
7302         }
7303 }
7304
7305 void
7306 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7307                bool commit, s8 txpktpend)
7308 {
7309         u16 frameid = INVALIDFID;
7310         struct d11txh *txh;
7311
7312         txh = (struct d11txh *) (p->data);
7313
7314         /* When a BC/MC frame is being committed to the BCMC fifo
7315          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7316          */
7317         if (fifo == TX_BCMC_FIFO)
7318                 frameid = le16_to_cpu(txh->TxFrameID);
7319
7320         /*
7321          * Bump up pending count for if not using rpc. If rpc is
7322          * used, this will be handled in brcms_b_txfifo()
7323          */
7324         if (commit) {
7325                 wlc->core->txpktpend[fifo] += txpktpend;
7326                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7327                          txpktpend, wlc->core->txpktpend[fifo]);
7328         }
7329
7330         /* Commit BCMC sequence number in the SHM frame ID location */
7331         if (frameid != INVALIDFID) {
7332                 /*
7333                  * To inform the ucode of the last mcast frame posted
7334                  * so that it can clear moredata bit
7335                  */
7336                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7337         }
7338
7339         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7340                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7341 }
7342
7343 u32
7344 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7345                            bool use_rspec, u16 mimo_ctlchbw)
7346 {
7347         u32 rts_rspec = 0;
7348
7349         if (use_rspec)
7350                 /* use frame rate as rts rate */
7351                 rts_rspec = rspec;
7352         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7353                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7354                  * Use the brcms_basic_rate() lookup to find the best basic rate
7355                  * under the target in case 11 Mbps is not Basic.
7356                  * 6 and 9 Mbps are not usually selected by rate selection, but
7357                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7358                  * is more robust.
7359                  */
7360                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7361         else
7362                 /* calculate RTS rate and fallback rate based on the frame rate
7363                  * RTS must be sent at a basic rate since it is a
7364                  * control frame, sec 9.6 of 802.11 spec
7365                  */
7366                 rts_rspec = brcms_basic_rate(wlc, rspec);
7367
7368         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7369                 /* set rts txbw to correct side band */
7370                 rts_rspec &= ~RSPEC_BW_MASK;
7371
7372                 /*
7373                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7374                  * 20MHz channel (DUP), otherwise send RTS on control channel
7375                  */
7376                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7377                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7378                 else
7379                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7380
7381                 /* pick siso/cdd as default for ofdm */
7382                 if (is_ofdm_rate(rts_rspec)) {
7383                         rts_rspec &= ~RSPEC_STF_MASK;
7384                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7385                 }
7386         }
7387         return rts_rspec;
7388 }
7389
7390 void
7391 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7392 {
7393         wlc->core->txpktpend[fifo] -= txpktpend;
7394         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7395                wlc->core->txpktpend[fifo]);
7396
7397         /* There is more room; mark precedences related to this FIFO sendable */
7398         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7399
7400         /* figure out which bsscfg is being worked on... */
7401 }
7402
7403 /* Update beacon listen interval in shared memory */
7404 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7405 {
7406         /* wake up every DTIM is the default */
7407         if (wlc->bcn_li_dtim == 1)
7408                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7409         else
7410                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7411                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7412 }
7413
7414 static void
7415 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7416                   u32 *tsf_h_ptr)
7417 {
7418         struct bcma_device *core = wlc_hw->d11core;
7419
7420         /* read the tsf timer low, then high to get an atomic read */
7421         *tsf_l_ptr = bcma_read32(core, D11REGOFFS(tsf_timerlow));
7422         *tsf_h_ptr = bcma_read32(core, D11REGOFFS(tsf_timerhigh));
7423 }
7424
7425 /*
7426  * recover 64bit TSF value from the 16bit TSF value in the rx header
7427  * given the assumption that the TSF passed in header is within 65ms
7428  * of the current tsf.
7429  *
7430  * 6       5       4       4       3       2       1
7431  * 3.......6.......8.......0.......2.......4.......6.......8......0
7432  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7433  *
7434  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7435  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7436  * receive call sequence after rx interrupt. Only the higher 16 bits
7437  * are used. Finally, the tsf_h is read from the tsf register.
7438  */
7439 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7440                                  struct d11rxhdr *rxh)
7441 {
7442         u32 tsf_h, tsf_l;
7443         u16 rx_tsf_0_15, rx_tsf_16_31;
7444
7445         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7446
7447         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7448         rx_tsf_0_15 = rxh->RxTSFTime;
7449
7450         /*
7451          * a greater tsf time indicates the low 16 bits of
7452          * tsf_l wrapped, so decrement the high 16 bits.
7453          */
7454         if ((u16)tsf_l < rx_tsf_0_15) {
7455                 rx_tsf_16_31 -= 1;
7456                 if (rx_tsf_16_31 == 0xffff)
7457                         tsf_h -= 1;
7458         }
7459
7460         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7461 }
7462
7463 static void
7464 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7465                      struct sk_buff *p,
7466                      struct ieee80211_rx_status *rx_status)
7467 {
7468         int preamble;
7469         int channel;
7470         u32 rspec;
7471         unsigned char *plcp;
7472
7473         /* fill in TSF and flag its presence */
7474         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7475         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7476
7477         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7478
7479         if (channel > 14) {
7480                 rx_status->band = IEEE80211_BAND_5GHZ;
7481                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7482                                         WF_CHAN_FACTOR_5_G/2, channel);
7483
7484         } else {
7485                 rx_status->band = IEEE80211_BAND_2GHZ;
7486                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7487         }
7488
7489         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7490
7491         /* noise */
7492         /* qual */
7493         rx_status->antenna =
7494                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7495
7496         plcp = p->data;
7497
7498         rspec = brcms_c_compute_rspec(rxh, plcp);
7499         if (is_mcs_rate(rspec)) {
7500                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7501                 rx_status->flag |= RX_FLAG_HT;
7502                 if (rspec_is40mhz(rspec))
7503                         rx_status->flag |= RX_FLAG_40MHZ;
7504         } else {
7505                 switch (rspec2rate(rspec)) {
7506                 case BRCM_RATE_1M:
7507                         rx_status->rate_idx = 0;
7508                         break;
7509                 case BRCM_RATE_2M:
7510                         rx_status->rate_idx = 1;
7511                         break;
7512                 case BRCM_RATE_5M5:
7513                         rx_status->rate_idx = 2;
7514                         break;
7515                 case BRCM_RATE_11M:
7516                         rx_status->rate_idx = 3;
7517                         break;
7518                 case BRCM_RATE_6M:
7519                         rx_status->rate_idx = 4;
7520                         break;
7521                 case BRCM_RATE_9M:
7522                         rx_status->rate_idx = 5;
7523                         break;
7524                 case BRCM_RATE_12M:
7525                         rx_status->rate_idx = 6;
7526                         break;
7527                 case BRCM_RATE_18M:
7528                         rx_status->rate_idx = 7;
7529                         break;
7530                 case BRCM_RATE_24M:
7531                         rx_status->rate_idx = 8;
7532                         break;
7533                 case BRCM_RATE_36M:
7534                         rx_status->rate_idx = 9;
7535                         break;
7536                 case BRCM_RATE_48M:
7537                         rx_status->rate_idx = 10;
7538                         break;
7539                 case BRCM_RATE_54M:
7540                         rx_status->rate_idx = 11;
7541                         break;
7542                 default:
7543                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7544                 }
7545
7546                 /*
7547                  * For 5GHz, we should decrease the index as it is
7548                  * a subset of the 2.4G rates. See bitrates field
7549                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7550                  */
7551                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7552                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7553
7554                 /* Determine short preamble and rate_idx */
7555                 preamble = 0;
7556                 if (is_cck_rate(rspec)) {
7557                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7558                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7559                 } else if (is_ofdm_rate(rspec)) {
7560                         rx_status->flag |= RX_FLAG_SHORTPRE;
7561                 } else {
7562                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7563                                   __func__);
7564                 }
7565         }
7566
7567         if (plcp3_issgi(plcp[3]))
7568                 rx_status->flag |= RX_FLAG_SHORT_GI;
7569
7570         if (rxh->RxStatus1 & RXS_DECERR) {
7571                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7572                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7573                           __func__);
7574         }
7575         if (rxh->RxStatus1 & RXS_FCSERR) {
7576                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7577                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7578                           __func__);
7579         }
7580 }
7581
7582 static void
7583 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7584                 struct sk_buff *p)
7585 {
7586         int len_mpdu;
7587         struct ieee80211_rx_status rx_status;
7588         struct ieee80211_hdr *hdr;
7589
7590         memset(&rx_status, 0, sizeof(rx_status));
7591         prep_mac80211_status(wlc, rxh, p, &rx_status);
7592
7593         /* mac header+body length, exclude CRC and plcp header */
7594         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7595         skb_pull(p, D11_PHY_HDR_LEN);
7596         __skb_trim(p, len_mpdu);
7597
7598         /* unmute transmit */
7599         if (wlc->hw->suspended_fifos) {
7600                 hdr = (struct ieee80211_hdr *)p->data;
7601                 if (ieee80211_is_beacon(hdr->frame_control))
7602                         brcms_b_mute(wlc->hw, false);
7603         }
7604
7605         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7606         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7607 }
7608
7609 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7610  * number of bytes goes in the length field
7611  *
7612  * Formula given by HT PHY Spec v 1.13
7613  *   len = 3(nsyms + nstream + 3) - 3
7614  */
7615 u16
7616 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7617                       uint mac_len)
7618 {
7619         uint nsyms, len = 0, kNdps;
7620
7621         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7622                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7623
7624         if (is_mcs_rate(ratespec)) {
7625                 uint mcs = ratespec & RSPEC_RATE_MASK;
7626                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7627                                   rspec_stc(ratespec);
7628
7629                 /*
7630                  * the payload duration calculation matches that
7631                  * of regular ofdm
7632                  */
7633                 /* 1000Ndbps = kbps * 4 */
7634                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7635                                    rspec_issgi(ratespec)) * 4;
7636
7637                 if (rspec_stc(ratespec) == 0)
7638                         nsyms =
7639                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7640                                   APHY_TAIL_NBITS) * 1000, kNdps);
7641                 else
7642                         /* STBC needs to have even number of symbols */
7643                         nsyms =
7644                             2 *
7645                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7646                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7647
7648                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7649                 nsyms += (tot_streams + 3);
7650                 /*
7651                  * 3 bytes/symbol @ legacy 6Mbps rate
7652                  * (-3) excluding service bits and tail bits
7653                  */
7654                 len = (3 * nsyms) - 3;
7655         }
7656
7657         return (u16) len;
7658 }
7659
7660 static void
7661 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7662 {
7663         const struct brcms_c_rateset *rs_dflt;
7664         struct brcms_c_rateset rs;
7665         u8 rate;
7666         u16 entry_ptr;
7667         u8 plcp[D11_PHY_HDR_LEN];
7668         u16 dur, sifs;
7669         uint i;
7670
7671         sifs = get_sifs(wlc->band);
7672
7673         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7674
7675         brcms_c_rateset_copy(rs_dflt, &rs);
7676         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7677
7678         /*
7679          * walk the phy rate table and update MAC core SHM
7680          * basic rate table entries
7681          */
7682         for (i = 0; i < rs.count; i++) {
7683                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7684
7685                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7686
7687                 /* Calculate the Probe Response PLCP for the given rate */
7688                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7689
7690                 /*
7691                  * Calculate the duration of the Probe Response
7692                  * frame plus SIFS for the MAC
7693                  */
7694                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7695                                                 BRCMS_LONG_PREAMBLE, frame_len);
7696                 dur += sifs;
7697
7698                 /* Update the SHM Rate Table entry Probe Response values */
7699                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7700                               (u16) (plcp[0] + (plcp[1] << 8)));
7701                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7702                               (u16) (plcp[2] + (plcp[3] << 8)));
7703                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7704         }
7705 }
7706
7707 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7708  *
7709  *      PLCP header is 6 bytes.
7710  *      802.11 A3 header is 24 bytes.
7711  *      Max beacon frame body template length is 112 bytes.
7712  *      Max probe resp frame body template length is 110 bytes.
7713  *
7714  *      *len on input contains the max length of the packet available.
7715  *
7716  *      The *len value is set to the number of bytes in buf used, and starts
7717  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7718  */
7719 static void
7720 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7721                          u32 bcn_rspec,
7722                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7723 {
7724         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7725         struct cck_phy_hdr *plcp;
7726         struct ieee80211_mgmt *h;
7727         int hdr_len, body_len;
7728
7729         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7730
7731         /* calc buffer size provided for frame body */
7732         body_len = *len - hdr_len;
7733         /* return actual size */
7734         *len = hdr_len + body_len;
7735
7736         /* format PHY and MAC headers */
7737         memset((char *)buf, 0, hdr_len);
7738
7739         plcp = (struct cck_phy_hdr *) buf;
7740
7741         /*
7742          * PLCP for Probe Response frames are filled in from
7743          * core's rate table
7744          */
7745         if (type == IEEE80211_STYPE_BEACON)
7746                 /* fill in PLCP */
7747                 brcms_c_compute_plcp(wlc, bcn_rspec,
7748                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7749                                  (u8 *) plcp);
7750
7751         /* "Regular" and 16 MBSS but not for 4 MBSS */
7752         /* Update the phytxctl for the beacon based on the rspec */
7753         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7754
7755         h = (struct ieee80211_mgmt *)&plcp[1];
7756
7757         /* fill in 802.11 header */
7758         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7759
7760         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7761         /* A1 filled in by MAC for prb resp, broadcast for bcn */
7762         if (type == IEEE80211_STYPE_BEACON)
7763                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
7764         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7765         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7766
7767         /* SEQ filled in by MAC */
7768 }
7769
7770 int brcms_c_get_header_len(void)
7771 {
7772         return TXOFF;
7773 }
7774
7775 /*
7776  * Update all beacons for the system.
7777  */
7778 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7779 {
7780         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7781
7782         if (bsscfg->up && !bsscfg->BSS)
7783                 /* Clear the soft intmask */
7784                 wlc->defmacintmask &= ~MI_BCNTPL;
7785 }
7786
7787 /* Write ssid into shared memory */
7788 static void
7789 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7790 {
7791         u8 *ssidptr = cfg->SSID;
7792         u16 base = M_SSID;
7793         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7794
7795         /* padding the ssid with zero and copy it into shm */
7796         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7797         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7798
7799         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7800         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7801 }
7802
7803 static void
7804 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7805                               struct brcms_bss_cfg *cfg,
7806                               bool suspend)
7807 {
7808         u16 prb_resp[BCN_TMPL_LEN / 2];
7809         int len = BCN_TMPL_LEN;
7810
7811         /*
7812          * write the probe response to hardware, or save in
7813          * the config structure
7814          */
7815
7816         /* create the probe response template */
7817         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7818                                  cfg, prb_resp, &len);
7819
7820         if (suspend)
7821                 brcms_c_suspend_mac_and_wait(wlc);
7822
7823         /* write the probe response into the template region */
7824         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7825                                     (len + 3) & ~3, prb_resp);
7826
7827         /* write the length of the probe response frame (+PLCP/-FCS) */
7828         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7829
7830         /* write the SSID and SSID length */
7831         brcms_c_shm_ssid_upd(wlc, cfg);
7832
7833         /*
7834          * Write PLCP headers and durations for probe response frames
7835          * at all rates. Use the actual frame length covered by the
7836          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7837          * by subtracting the PLCP len and adding the FCS.
7838          */
7839         len += (-D11_PHY_HDR_LEN + FCS_LEN);
7840         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7841
7842         if (suspend)
7843                 brcms_c_enable_mac(wlc);
7844 }
7845
7846 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7847 {
7848         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7849
7850         /* update AP or IBSS probe responses */
7851         if (bsscfg->up && !bsscfg->BSS)
7852                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7853 }
7854
7855 /* prepares pdu for transmission. returns BCM error codes */
7856 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7857 {
7858         uint fifo;
7859         struct d11txh *txh;
7860         struct ieee80211_hdr *h;
7861         struct scb *scb;
7862
7863         txh = (struct d11txh *) (pdu->data);
7864         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7865
7866         /* get the pkt queue info. This was put at brcms_c_sendctl or
7867          * brcms_c_send for PDU */
7868         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7869
7870         scb = NULL;
7871
7872         *fifop = fifo;
7873
7874         /* return if insufficient dma resources */
7875         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7876                 /* Mark precedences related to this FIFO, unsendable */
7877                 /* A fifo is full. Clear precedences related to that FIFO */
7878                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7879                 return -EBUSY;
7880         }
7881         return 0;
7882 }
7883
7884 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7885                            uint *blocks)
7886 {
7887         if (fifo >= NFIFO)
7888                 return -EINVAL;
7889
7890         *blocks = wlc_hw->xmtfifo_sz[fifo];
7891
7892         return 0;
7893 }
7894
7895 void
7896 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7897                   const u8 *addr)
7898 {
7899         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7900         if (match_reg_offset == RCM_BSSID_OFFSET)
7901                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7902 }
7903
7904 /*
7905  * Flag 'scan in progress' to withhold dynamic phy calibration
7906  */
7907 void brcms_c_scan_start(struct brcms_c_info *wlc)
7908 {
7909         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7910 }
7911
7912 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7913 {
7914         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7915 }
7916
7917 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7918 {
7919         wlc->pub->associated = state;
7920         wlc->bsscfg->associated = state;
7921 }
7922
7923 /*
7924  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7925  * AMPDU traffic, packets pending in hardware have to be invalidated so that
7926  * when later on hardware releases them, they can be handled appropriately.
7927  */
7928 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7929                                struct ieee80211_sta *sta,
7930                                void (*dma_callback_fn))
7931 {
7932         struct dma_pub *dmah;
7933         int i;
7934         for (i = 0; i < NFIFO; i++) {
7935                 dmah = hw->di[i];
7936                 if (dmah != NULL)
7937                         dma_walk_packets(dmah, dma_callback_fn, sta);
7938         }
7939 }
7940
7941 int brcms_c_get_curband(struct brcms_c_info *wlc)
7942 {
7943         return wlc->band->bandunit;
7944 }
7945
7946 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
7947 {
7948         int timeout = 20;
7949
7950         /* flush packet queue when requested */
7951         if (drop)
7952                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
7953
7954         /* wait for queue and DMA fifos to run dry */
7955         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0) {
7956                 brcms_msleep(wlc->wl, 1);
7957
7958                 if (--timeout == 0)
7959                         break;
7960         }
7961
7962         WARN_ON_ONCE(timeout == 0);
7963 }
7964
7965 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
7966 {
7967         wlc->bcn_li_bcn = interval;
7968         if (wlc->pub->up)
7969                 brcms_c_bcn_li_upd(wlc);
7970 }
7971
7972 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
7973 {
7974         uint qdbm;
7975
7976         /* Remove override bit and clip to max qdbm value */
7977         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
7978         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
7979 }
7980
7981 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
7982 {
7983         uint qdbm;
7984         bool override;
7985
7986         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
7987
7988         /* Return qdbm units */
7989         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
7990 }
7991
7992 /* Process received frames */
7993 /*
7994  * Return true if more frames need to be processed. false otherwise.
7995  * Param 'bound' indicates max. # frames to process before break out.
7996  */
7997 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
7998 {
7999         struct d11rxhdr *rxh;
8000         struct ieee80211_hdr *h;
8001         uint len;
8002         bool is_amsdu;
8003
8004         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8005
8006         /* frame starts with rxhdr */
8007         rxh = (struct d11rxhdr *) (p->data);
8008
8009         /* strip off rxhdr */
8010         skb_pull(p, BRCMS_HWRXOFF);
8011
8012         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8013         if (rxh->RxStatus1 & RXS_PBPRES) {
8014                 if (p->len < 2) {
8015                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8016                                   "len %d\n", wlc->pub->unit, p->len);
8017                         goto toss;
8018                 }
8019                 skb_pull(p, 2);
8020         }
8021
8022         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8023         len = p->len;
8024
8025         if (rxh->RxStatus1 & RXS_FCSERR) {
8026                 if (!(wlc->filter_flags & FIF_FCSFAIL))
8027                         goto toss;
8028         }
8029
8030         /* check received pkt has at least frame control field */
8031         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8032                 goto toss;
8033
8034         /* not supporting A-MSDU */
8035         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8036         if (is_amsdu)
8037                 goto toss;
8038
8039         brcms_c_recvctl(wlc, rxh, p);
8040         return;
8041
8042  toss:
8043         brcmu_pkt_buf_free_skb(p);
8044 }
8045
8046 /* Process received frames */
8047 /*
8048  * Return true if more frames need to be processed. false otherwise.
8049  * Param 'bound' indicates max. # frames to process before break out.
8050  */
8051 static bool
8052 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8053 {
8054         struct sk_buff *p;
8055         struct sk_buff *next = NULL;
8056         struct sk_buff_head recv_frames;
8057
8058         uint n = 0;
8059         uint bound_limit = bound ? RXBND : -1;
8060
8061         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8062         skb_queue_head_init(&recv_frames);
8063
8064         /* gather received frames */
8065         while (dma_rx(wlc_hw->di[fifo], &recv_frames)) {
8066
8067                 /* !give others some time to run! */
8068                 if (++n >= bound_limit)
8069                         break;
8070         }
8071
8072         /* post more rbufs */
8073         dma_rxfill(wlc_hw->di[fifo]);
8074
8075         /* process each frame */
8076         skb_queue_walk_safe(&recv_frames, p, next) {
8077                 struct d11rxhdr_le *rxh_le;
8078                 struct d11rxhdr *rxh;
8079
8080                 skb_unlink(p, &recv_frames);
8081                 rxh_le = (struct d11rxhdr_le *)p->data;
8082                 rxh = (struct d11rxhdr *)p->data;
8083
8084                 /* fixup rx header endianness */
8085                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8086                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8087                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8088                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8089                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8090                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8091                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8092                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8093                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8094                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8095                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8096
8097                 brcms_c_recv(wlc_hw->wlc, p);
8098         }
8099
8100         return n >= bound_limit;
8101 }
8102
8103 /* second-level interrupt processing
8104  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8105  *   Param 'bounded' indicates if applicable loops should be bounded.
8106  */
8107 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8108 {
8109         u32 macintstatus;
8110         struct brcms_hardware *wlc_hw = wlc->hw;
8111         struct bcma_device *core = wlc_hw->d11core;
8112         struct wiphy *wiphy = wlc->wiphy;
8113
8114         if (brcms_deviceremoved(wlc)) {
8115                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8116                           __func__);
8117                 brcms_down(wlc->wl);
8118                 return false;
8119         }
8120
8121         /* grab and clear the saved software intstatus bits */
8122         macintstatus = wlc->macintstatus;
8123         wlc->macintstatus = 0;
8124
8125         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8126                wlc_hw->unit, macintstatus);
8127
8128         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8129
8130         /* tx status */
8131         if (macintstatus & MI_TFS) {
8132                 bool fatal;
8133                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8134                         wlc->macintstatus |= MI_TFS;
8135                 if (fatal) {
8136                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8137                         goto fatal;
8138                 }
8139         }
8140
8141         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8142                 brcms_c_tbtt(wlc);
8143
8144         /* ATIM window end */
8145         if (macintstatus & MI_ATIMWINEND) {
8146                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8147                 bcma_set32(core, D11REGOFFS(maccommand), wlc->qvalid);
8148                 wlc->qvalid = 0;
8149         }
8150
8151         /*
8152          * received data or control frame, MI_DMAINT is
8153          * indication of RX_FIFO interrupt
8154          */
8155         if (macintstatus & MI_DMAINT)
8156                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8157                         wlc->macintstatus |= MI_DMAINT;
8158
8159         /* noise sample collected */
8160         if (macintstatus & MI_BG_NOISE)
8161                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8162
8163         if (macintstatus & MI_GP0) {
8164                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8165                           "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8166
8167                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8168                             __func__, ai_get_chip_id(wlc_hw->sih),
8169                             ai_get_chiprev(wlc_hw->sih));
8170                 brcms_fatal_error(wlc_hw->wlc->wl);
8171         }
8172
8173         /* gptimer timeout */
8174         if (macintstatus & MI_TO)
8175                 bcma_write32(core, D11REGOFFS(gptimer), 0);
8176
8177         if (macintstatus & MI_RFDISABLE) {
8178                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8179                        " RF Disable Input\n", wlc_hw->unit);
8180                 brcms_rfkill_set_hw_state(wlc->wl);
8181         }
8182
8183         /* send any enq'd tx packets. Just makes sure to jump start tx */
8184         if (!pktq_empty(&wlc->pkt_queue->q))
8185                 brcms_c_send_q(wlc);
8186
8187         /* it isn't done and needs to be resched if macintstatus is non-zero */
8188         return wlc->macintstatus != 0;
8189
8190  fatal:
8191         brcms_fatal_error(wlc_hw->wlc->wl);
8192         return wlc->macintstatus != 0;
8193 }
8194
8195 void brcms_c_init(struct brcms_c_info *wlc, bool mute_tx)
8196 {
8197         struct bcma_device *core = wlc->hw->d11core;
8198         u16 chanspec;
8199
8200         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8201
8202         /*
8203          * This will happen if a big-hammer was executed. In
8204          * that case, we want to go back to the channel that
8205          * we were on and not new channel
8206          */
8207         if (wlc->pub->associated)
8208                 chanspec = wlc->home_chanspec;
8209         else
8210                 chanspec = brcms_c_init_chanspec(wlc);
8211
8212         brcms_b_init(wlc->hw, chanspec);
8213
8214         /* update beacon listen interval */
8215         brcms_c_bcn_li_upd(wlc);
8216
8217         /* write ethernet address to core */
8218         brcms_c_set_mac(wlc->bsscfg);
8219         brcms_c_set_bssid(wlc->bsscfg);
8220
8221         /* Update tsf_cfprep if associated and up */
8222         if (wlc->pub->associated && wlc->bsscfg->up) {
8223                 u32 bi;
8224
8225                 /* get beacon period and convert to uS */
8226                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8227                 /*
8228                  * update since init path would reset
8229                  * to default value
8230                  */
8231                 bcma_write32(core, D11REGOFFS(tsf_cfprep),
8232                              bi << CFPREP_CBI_SHIFT);
8233
8234                 /* Update maccontrol PM related bits */
8235                 brcms_c_set_ps_ctrl(wlc);
8236         }
8237
8238         brcms_c_bandinit_ordered(wlc, chanspec);
8239
8240         /* init probe response timeout */
8241         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8242
8243         /* init max burst txop (framebursting) */
8244         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8245                       (wlc->
8246                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8247
8248         /* initialize maximum allowed duty cycle */
8249         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8250         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8251
8252         /*
8253          * Update some shared memory locations related to
8254          * max AMPDU size allowed to received
8255          */
8256         brcms_c_ampdu_shm_upd(wlc->ampdu);
8257
8258         /* band-specific inits */
8259         brcms_c_bsinit(wlc);
8260
8261         /* Enable EDCF mode (while the MAC is suspended) */
8262         bcma_set16(core, D11REGOFFS(ifs_ctl), IFS_USEEDCF);
8263         brcms_c_edcf_setparams(wlc, false);
8264
8265         /* Init precedence maps for empty FIFOs */
8266         brcms_c_tx_prec_map_init(wlc);
8267
8268         /* read the ucode version if we have not yet done so */
8269         if (wlc->ucode_rev == 0) {
8270                 wlc->ucode_rev =
8271                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8272                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8273         }
8274
8275         /* ..now really unleash hell (allow the MAC out of suspend) */
8276         brcms_c_enable_mac(wlc);
8277
8278         /* suspend the tx fifos and mute the phy for preism cac time */
8279         if (mute_tx)
8280                 brcms_b_mute(wlc->hw, true);
8281
8282         /* clear tx flow control */
8283         brcms_c_txflowcontrol_reset(wlc);
8284
8285         /* enable the RF Disable Delay timer */
8286         bcma_write32(core, D11REGOFFS(rfdisabledly), RFDISABLE_DEFAULT);
8287
8288         /*
8289          * Initialize WME parameters; if they haven't been set by some other
8290          * mechanism (IOVar, etc) then read them from the hardware.
8291          */
8292         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8293                 /* Uninitialized; read from HW */
8294                 int ac;
8295
8296                 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
8297                         wlc->wme_retries[ac] =
8298                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8299         }
8300 }
8301
8302 /*
8303  * The common driver entry routine. Error codes should be unique
8304  */
8305 struct brcms_c_info *
8306 brcms_c_attach(struct brcms_info *wl, struct bcma_device *core, uint unit,
8307                bool piomode, uint *perr)
8308 {
8309         struct brcms_c_info *wlc;
8310         uint err = 0;
8311         uint i, j;
8312         struct brcms_pub *pub;
8313
8314         /* allocate struct brcms_c_info state and its substructures */
8315         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, 0);
8316         if (wlc == NULL)
8317                 goto fail;
8318         wlc->wiphy = wl->wiphy;
8319         pub = wlc->pub;
8320
8321 #if defined(DEBUG)
8322         wlc_info_dbg = wlc;
8323 #endif
8324
8325         wlc->band = wlc->bandstate[0];
8326         wlc->core = wlc->corestate;
8327         wlc->wl = wl;
8328         pub->unit = unit;
8329         pub->_piomode = piomode;
8330         wlc->bandinit_pending = false;
8331
8332         /* populate struct brcms_c_info with default values  */
8333         brcms_c_info_init(wlc, unit);
8334
8335         /* update sta/ap related parameters */
8336         brcms_c_ap_upd(wlc);
8337
8338         /*
8339          * low level attach steps(all hw accesses go
8340          * inside, no more in rest of the attach)
8341          */
8342         err = brcms_b_attach(wlc, core, unit, piomode);
8343         if (err)
8344                 goto fail;
8345
8346         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8347
8348         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8349
8350         /* disable allowed duty cycle */
8351         wlc->tx_duty_cycle_ofdm = 0;
8352         wlc->tx_duty_cycle_cck = 0;
8353
8354         brcms_c_stf_phy_chain_calc(wlc);
8355
8356         /* txchain 1: txant 0, txchain 2: txant 1 */
8357         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8358                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8359
8360         /* push to BMAC driver */
8361         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8362                                wlc->stf->hw_rxchain);
8363
8364         /* pull up some info resulting from the low attach */
8365         for (i = 0; i < NFIFO; i++)
8366                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8367
8368         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8369         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8370
8371         for (j = 0; j < wlc->pub->_nbands; j++) {
8372                 wlc->band = wlc->bandstate[j];
8373
8374                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8375                         err = 24;
8376                         goto fail;
8377                 }
8378
8379                 /* default contention windows size limits */
8380                 wlc->band->CWmin = APHY_CWMIN;
8381                 wlc->band->CWmax = PHY_CWMAX;
8382
8383                 /* init gmode value */
8384                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8385                         wlc->band->gmode = GMODE_AUTO;
8386                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8387                                            wlc->band->gmode);
8388                 }
8389
8390                 /* init _n_enab supported mode */
8391                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8392                         pub->_n_enab = SUPPORT_11N;
8393                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8394                                                    ((pub->_n_enab ==
8395                                                      SUPPORT_11N) ? WL_11N_2x2 :
8396                                                     WL_11N_3x3));
8397                 }
8398
8399                 /* init per-band default rateset, depend on band->gmode */
8400                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8401
8402                 /* fill in hw_rateset */
8403                 brcms_c_rateset_filter(&wlc->band->defrateset,
8404                                    &wlc->band->hw_rateset, false,
8405                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8406                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8407         }
8408
8409         /*
8410          * update antenna config due to
8411          * wlc->stf->txant/txchain/ant_rx_ovr change
8412          */
8413         brcms_c_stf_phy_txant_upd(wlc);
8414
8415         /* attach each modules */
8416         err = brcms_c_attach_module(wlc);
8417         if (err != 0)
8418                 goto fail;
8419
8420         if (!brcms_c_timers_init(wlc, unit)) {
8421                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8422                           __func__);
8423                 err = 32;
8424                 goto fail;
8425         }
8426
8427         /* depend on rateset, gmode */
8428         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8429         if (!wlc->cmi) {
8430                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8431                           "\n", unit, __func__);
8432                 err = 33;
8433                 goto fail;
8434         }
8435
8436         /* init default when all parameters are ready, i.e. ->rateset */
8437         brcms_c_bss_default_init(wlc);
8438
8439         /*
8440          * Complete the wlc default state initializations..
8441          */
8442
8443         /* allocate our initial queue */
8444         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8445         if (wlc->pkt_queue == NULL) {
8446                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8447                           unit, __func__);
8448                 err = 100;
8449                 goto fail;
8450         }
8451
8452         wlc->bsscfg->wlc = wlc;
8453
8454         wlc->mimoft = FT_HT;
8455         wlc->mimo_40txbw = AUTO;
8456         wlc->ofdm_40txbw = AUTO;
8457         wlc->cck_40txbw = AUTO;
8458         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8459
8460         /* Set default values of SGI */
8461         if (BRCMS_SGI_CAP_PHY(wlc)) {
8462                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8463                                                BRCMS_N_SGI_40));
8464         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8465                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8466                                                BRCMS_N_SGI_40));
8467         } else {
8468                 brcms_c_ht_update_sgi_rx(wlc, 0);
8469         }
8470
8471         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8472
8473         if (perr)
8474                 *perr = 0;
8475
8476         return wlc;
8477
8478  fail:
8479         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8480                   unit, __func__, err);
8481         if (wlc)
8482                 brcms_c_detach(wlc);
8483
8484         if (perr)
8485                 *perr = err;
8486         return NULL;
8487 }