Pileus Git - ~andy/linux/blob - drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44
  45 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  46
  47 #ifdef DEBUG
  48
  49 #define BRCMF_TRAP_INFO_SIZE    80
  50
  51 #define CBUF_LEN        (128)
  52
  53 /* Device console log buffer state */
  54 #define CONSOLE_BUFFER_MAX      2024
  55
  56 struct rte_log_le {
  57         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  58         __le32 buf_size;
  59         __le32 idx;
  60         char *_buf_compat;      /* Redundant pointer for backward compat. */
  61 };
  62
  63 struct rte_console {
  64         /* Virtual UART
  65          * When there is no UART (e.g. Quickturn),
  66          * the host should write a complete
  67          * input line directly into cbuf and then write
  68          * the length into vcons_in.
  69          * This may also be used when there is a real UART
  70          * (at risk of conflicting with
  71          * the real UART).  vcons_out is currently unused.
  72          */
  73         uint vcons_in;
  74         uint vcons_out;
  75
  76         /* Output (logging) buffer
  77          * Console output is written to a ring buffer log_buf at index log_idx.
  78          * The host may read the output when it sees log_idx advance.
  79          * Output will be lost if the output wraps around faster than the host
  80          * polls.
  81          */
  82         struct rte_log_le log_le;
  83
  84         /* Console input line buffer
  85          * Characters are read one at a time into cbuf
  86          * until <CR> is received, then
  87          * the buffer is processed as a command line.
  88          * Also used for virtual UART.
  89          */
  90         uint cbuf_idx;
  91         char cbuf[CBUF_LEN];
  92 };
  93
  94 #endif                          /* DEBUG */
  95 #include <chipcommon.h>
  96
  97 #include "dhd_bus.h"
  98 #include "dhd_dbg.h"
  99 #include "tracepoint.h"
 100
 101 #define TXQLEN          2048    /* bulk tx queue length */
 102 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 103 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 104 #define PRIOMASK        7
 105
 106 #define TXRETRIES       2       /* # of retries for tx frames */
 107
 108 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 109                                  one scheduling */
 110
 111 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 112                                  one scheduling */
 113
 114 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 /* intstatus */
 159 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 160 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 161 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 162 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 163 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 164 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 165 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 166 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 167 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 168 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 169 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 170 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 171 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 172 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 173 #define I_PC            (1 << 10)       /* descriptor error */
 174 #define I_PD            (1 << 11)       /* data error */
 175 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 176 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 177 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 178 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 179 #define I_RI            (1 << 16)       /* Receive Interrupt */
 180 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 181 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 182 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 183 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 184 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 185 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 186 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 187 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 188 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 189 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 190 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 191 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 192
 193 /* corecontrol */
 194 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 195 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 196 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 197 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 198 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 199 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 200
 201 /* SDA_FRAMECTRL */
 202 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 203 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 204 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 205 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 206
 207 /*
 208  * Software allocation of To SB Mailbox resources
 209  */
 210
 211 /* tosbmailbox bits corresponding to intstatus bits */
 212 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 213 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 214 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 215 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 216
 217 /* tosbmailboxdata */
 218 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 219
 220 /*
 221  * Software allocation of To Host Mailbox resources
 222  */
 223
 224 /* intstatus bits */
 225 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 226 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 227 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 228 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 229
 230 /* tohostmailboxdata */
 231 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 232 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 233 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 234 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 235
 236 #define HMB_DATA_FCDATA_MASK    0xff000000
 237 #define HMB_DATA_FCDATA_SHIFT   24
 238
 239 #define HMB_DATA_VERSION_MASK   0x00ff0000
 240 #define HMB_DATA_VERSION_SHIFT  16
 241
 242 /*
 243  * Software-defined protocol header
 244  */
 245
 246 /* Current protocol version */
 247 #define SDPCM_PROT_VERSION      4
 248
 249 /*
 250  * Shared structure between dongle and the host.
 251  * The structure contains pointers to trap or assert information.
 252  */
 253 #define SDPCM_SHARED_VERSION       0x0003
 254 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 255 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 256 #define SDPCM_SHARED_ASSERT        0x0200
 257 #define SDPCM_SHARED_TRAP          0x0400
 258
 259 /* Space for header read, limit for data packets */
 260 #define MAX_HDR_READ    (1 << 6)
 261 #define MAX_RX_DATASZ   2048
 262
 263 /* Bump up limit on waiting for HT to account for first startup;
 264  * if the image is doing a CRC calculation before programming the PMU
 265  * for HT availability, it could take a couple hundred ms more, so
 266  * max out at a 1 second (1000000us).
 267  */
 268 #undef PMU_MAX_TRANSITION_DLY
 269 #define PMU_MAX_TRANSITION_DLY 1000000
 270
 271 /* Value for ChipClockCSR during initial setup */
 272 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 273                                         SBSDIO_ALP_AVAIL_REQ)
 274
 275 /* Flags for SDH calls */
 276 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 277
 278 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 279 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 280                                          * when idle
 281                                          */
 282 #define BRCMF_IDLE_INTERVAL     1
 283
 284 #define KSO_WAIT_US 50
 285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 286
 287 /*
 288  * Conversion of 802.1D priority to precedence level
 289  */
 290 static uint prio2prec(u32 prio)
 291 {
 292         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 293                (prio^2) : prio;
 294 }
 295
 296 #ifdef DEBUG
 297 /* Device console log buffer state */
 298 struct brcmf_console {
 299         uint count;             /* Poll interval msec counter */
 300         uint log_addr;          /* Log struct address (fixed) */
 301         struct rte_log_le log_le;       /* Log struct (host copy) */
 302         uint bufsize;           /* Size of log buffer */
 303         u8 *buf;                /* Log buffer (host copy) */
 304         uint last;              /* Last buffer read index */
 305 };
 306
 307 struct brcmf_trap_info {
 308         __le32          type;
 309         __le32          epc;
 310         __le32          cpsr;
 311         __le32          spsr;
 312         __le32          r0;     /* a1 */
 313         __le32          r1;     /* a2 */
 314         __le32          r2;     /* a3 */
 315         __le32          r3;     /* a4 */
 316         __le32          r4;     /* v1 */
 317         __le32          r5;     /* v2 */
 318         __le32          r6;     /* v3 */
 319         __le32          r7;     /* v4 */
 320         __le32          r8;     /* v5 */
 321         __le32          r9;     /* sb/v6 */
 322         __le32          r10;    /* sl/v7 */
 323         __le32          r11;    /* fp/v8 */
 324         __le32          r12;    /* ip */
 325         __le32          r13;    /* sp */
 326         __le32          r14;    /* lr */
 327         __le32          pc;     /* r15 */
 328 };
 329 #endif                          /* DEBUG */
 330
 331 struct sdpcm_shared {
 332         u32 flags;
 333         u32 trap_addr;
 334         u32 assert_exp_addr;
 335         u32 assert_file_addr;
 336         u32 assert_line;
 337         u32 console_addr;       /* Address of struct rte_console */
 338         u32 msgtrace_addr;
 339         u8 tag[32];
 340         u32 brpt_addr;
 341 };
 342
 343 struct sdpcm_shared_le {
 344         __le32 flags;
 345         __le32 trap_addr;
 346         __le32 assert_exp_addr;
 347         __le32 assert_file_addr;
 348         __le32 assert_line;
 349         __le32 console_addr;    /* Address of struct rte_console */
 350         __le32 msgtrace_addr;
 351         u8 tag[32];
 352         __le32 brpt_addr;
 353 };
 354
 355 /* dongle SDIO bus specific header info */
 356 struct brcmf_sdio_hdrinfo {
 357         u8 seq_num;
 358         u8 channel;
 359         u16 len;
 360         u16 len_left;
 361         u16 len_nxtfrm;
 362         u8 dat_offset;
 363         bool lastfrm;
 364         u16 tail_pad;
 365 };
 366
 367 /* misc chip info needed by some of the routines */
 368 /* Private data for SDIO bus interaction */
 369 struct brcmf_sdio {
 370         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 371         struct chip_info *ci;   /* Chip info struct */
 372         char *vars;             /* Variables (from CIS and/or other) */
 373         uint varsz;             /* Size of variables buffer */
 374
 375         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 376
 377         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 378         atomic_t intstatus;     /* Intstatus bits (events) pending */
 379         atomic_t fcstate;       /* State of dongle flow-control */
 380
 381         uint blocksize;         /* Block size of SDIO transfers */
 382         uint roundup;           /* Max roundup limit */
 383
 384         struct pktq txq;        /* Queue length used for flow-control */
 385         u8 flowcontrol; /* per prio flow control bitmask */
 386         u8 tx_seq;              /* Transmit sequence number (next) */
 387         u8 tx_max;              /* Maximum transmit sequence allowed */
 388
 389         u8 *hdrbuf;             /* buffer for handling rx frame */
 390         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 391         u8 rx_seq;              /* Receive sequence number (expected) */
 392         struct brcmf_sdio_hdrinfo cur_read;
 393                                 /* info of current read frame */
 394         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 395         bool rxpending;         /* Data frame pending in dongle */
 396
 397         uint rxbound;           /* Rx frames to read before resched */
 398         uint txbound;           /* Tx frames to send before resched */
 399         uint txminmax;
 400
 401         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 402         struct sk_buff_head glom; /* Packet list for glommed superframe */
 403         uint glomerr;           /* Glom packet read errors */
 404
 405         u8 *rxbuf;              /* Buffer for receiving control packets */
 406         uint rxblen;            /* Allocated length of rxbuf */
 407         u8 *rxctl;              /* Aligned pointer into rxbuf */
 408         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 409         uint rxlen;             /* Length of valid data in buffer */
 410         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 411
 412         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 413
 414         bool intr;              /* Use interrupts */
 415         bool poll;              /* Use polling */
 416         atomic_t ipend;         /* Device interrupt is pending */
 417         uint spurious;          /* Count of spurious interrupts */
 418         uint pollrate;          /* Ticks between device polls */
 419         uint polltick;          /* Tick counter */
 420
 421 #ifdef DEBUG
 422         uint console_interval;
 423         struct brcmf_console console;   /* Console output polling support */
 424         uint console_addr;      /* Console address from shared struct */
 425 #endif                          /* DEBUG */
 426
 427         uint clkstate;          /* State of sd and backplane clock(s) */
 428         bool activity;          /* Activity flag for clock down */
 429         s32 idletime;           /* Control for activity timeout */
 430         s32 idlecount;  /* Activity timeout counter */
 431         s32 idleclock;  /* How to set bus driver when idle */
 432         bool rxflow_mode;       /* Rx flow control mode */
 433         bool rxflow;            /* Is rx flow control on */
 434         bool alp_only;          /* Don't use HT clock (ALP only) */
 435
 436         u8 *ctrl_frame_buf;
 437         u32 ctrl_frame_len;
 438         bool ctrl_frame_stat;
 439
 440         spinlock_t txqlock;
 441         wait_queue_head_t ctrl_wait;
 442         wait_queue_head_t dcmd_resp_wait;
 443
 444         struct timer_list timer;
 445         struct completion watchdog_wait;
 446         struct task_struct *watchdog_tsk;
 447         bool wd_timer_valid;
 448         uint save_ms;
 449
 450         struct workqueue_struct *brcmf_wq;
 451         struct work_struct datawork;
 452         atomic_t dpc_tskcnt;
 453
 454         bool txoff;             /* Transmit flow-controlled */
 455         struct brcmf_sdio_count sdcnt;
 456         bool sr_enabled; /* SaveRestore enabled */
 457         bool sleeping; /* SDIO bus sleeping */
 458
 459         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 460         bool txglom;            /* host tx glomming enable flag */
 461         struct sk_buff *txglom_sgpad;   /* scatter-gather padding buffer */
 462         u16 head_align;         /* buffer pointer alignment */
 463         u16 sgentry_align;      /* scatter-gather buffer alignment */
 464 };
 465
 466 /* clkstate */
 467 #define CLK_NONE        0
 468 #define CLK_SDONLY      1
 469 #define CLK_PENDING     2
 470 #define CLK_AVAIL       3
 471
 472 #ifdef DEBUG
 473 static int qcount[NUMPRIO];
 474 #endif                          /* DEBUG */
 475
 476 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 477
 478 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 479
 480 /* Retry count for register access failures */
 481 static const uint retry_limit = 2;
 482
 483 /* Limit on rounding up frames */
 484 static const uint max_roundup = 512;
 485
 486 #define ALIGNMENT  4
 487
 488 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 489 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 490 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 491
 492 enum brcmf_sdio_frmtype {
 493         BRCMF_SDIO_FT_NORMAL,
 494         BRCMF_SDIO_FT_SUPER,
 495         BRCMF_SDIO_FT_SUB,
 496 };
 497
 498 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 499 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 500 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 501 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 502 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 503 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 504 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 505 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 506 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 507 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 508 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 509 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 510 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 511 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 512 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 513 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 514 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 515 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 516
 517 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 518 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 519 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 520 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 521 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 522 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 523 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 524 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 525 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 526 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 527 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 528 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 529 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 530 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 531 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 532 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 533 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 534 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 535
 536 struct brcmf_firmware_names {
 537         u32 chipid;
 538         u32 revmsk;
 539         const char *bin;
 540         const char *nv;
 541 };
 542
 543 enum brcmf_firmware_type {
 544         BRCMF_FIRMWARE_BIN,
 545         BRCMF_FIRMWARE_NVRAM
 546 };
 547
 548 #define BRCMF_FIRMWARE_NVRAM(name) \
 549         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 550
 551 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 552         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 553         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 554         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 555         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 556         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 557         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 558         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 559         { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 560         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 561 };
 562
 563
 564 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 565                                                   enum brcmf_firmware_type type)
 566 {
 567         const struct firmware *fw;
 568         const char *name;
 569         int err, i;
 570
 571         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 572                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 573                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 574                         switch (type) {
 575                         case BRCMF_FIRMWARE_BIN:
 576                                 name = brcmf_fwname_data[i].bin;
 577                                 break;
 578                         case BRCMF_FIRMWARE_NVRAM:
 579                                 name = brcmf_fwname_data[i].nv;
 580                                 break;
 581                         default:
 582                                 brcmf_err("invalid firmware type (%d)\n", type);
 583                                 return NULL;
 584                         }
 585                         goto found;
 586                 }
 587         }
 588         brcmf_err("Unknown chipid %d [%d]\n",
 589                   bus->ci->chip, bus->ci->chiprev);
 590         return NULL;
 591
 592 found:
 593         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 594         if ((err) || (!fw)) {
 595                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 596                 return NULL;
 597         }
 598
 599         return fw;
 600 }
 601
 602 static void pkt_align(struct sk_buff *p, int len, int align)
 603 {
 604         uint datalign;
 605         datalign = (unsigned long)(p->data);
 606         datalign = roundup(datalign, (align)) - datalign;
 607         if (datalign)
 608                 skb_pull(p, datalign);
 609         __skb_trim(p, len);
 610 }
 611
 612 /* To check if there's window offered */
 613 static bool data_ok(struct brcmf_sdio *bus)
 614 {
 615         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 616                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 617 }
 618
 619 /*
 620  * Reads a register in the SDIO hardware block. This block occupies a series of
 621  * adresses on the 32 bit backplane bus.
 622  */
 623 static int
 624 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 625 {
 626         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 627         int ret;
 628
 629         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 630                                     bus->ci->c_inf[idx].base + offset, &ret);
 631
 632         return ret;
 633 }
 634
 635 static int
 636 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 637 {
 638         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 639         int ret;
 640
 641         brcmf_sdiod_regwl(bus->sdiodev,
 642                           bus->ci->c_inf[idx].base + reg_offset,
 643                           regval, &ret);
 644
 645         return ret;
 646 }
 647
 648 static int
 649 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 650 {
 651         u8 wr_val = 0, rd_val, cmp_val, bmask;
 652         int err = 0;
 653         int try_cnt = 0;
 654
 655         brcmf_dbg(TRACE, "Enter\n");
 656
 657         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 658         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 659         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 660                           wr_val, &err);
 661         if (err) {
 662                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 663                 return err;
 664         }
 665
 666         if (on) {
 667                 /* device WAKEUP through KSO:
 668                  * write bit 0 & read back until
 669                  * both bits 0 (kso bit) & 1 (dev on status) are set
 670                  */
 671                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 672                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 673                 bmask = cmp_val;
 674                 usleep_range(2000, 3000);
 675         } else {
 676                 /* Put device to sleep, turn off KSO */
 677                 cmp_val = 0;
 678                 /* only check for bit0, bit1(dev on status) may not
 679                  * get cleared right away
 680                  */
 681                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 682         }
 683
 684         do {
 685                 /* reliable KSO bit set/clr:
 686                  * the sdiod sleep write access is synced to PMU 32khz clk
 687                  * just one write attempt may fail,
 688                  * read it back until it matches written value
 689                  */
 690                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 691                                            &err);
 692                 if (((rd_val & bmask) == cmp_val) && !err)
 693                         break;
 694                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 695                           try_cnt, MAX_KSO_ATTEMPTS, err);
 696                 udelay(KSO_WAIT_US);
 697                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 698                                   wr_val, &err);
 699         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 700
 701         return err;
 702 }
 703
 704 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 705
 706 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 707
 708 /* Turn backplane clock on or off */
 709 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 710 {
 711         int err;
 712         u8 clkctl, clkreq, devctl;
 713         unsigned long timeout;
 714
 715         brcmf_dbg(SDIO, "Enter\n");
 716
 717         clkctl = 0;
 718
 719         if (bus->sr_enabled) {
 720                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 721                 return 0;
 722         }
 723
 724         if (on) {
 725                 /* Request HT Avail */
 726                 clkreq =
 727                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 728
 729                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 730                                   clkreq, &err);
 731                 if (err) {
 732                         brcmf_err("HT Avail request error: %d\n", err);
 733                         return -EBADE;
 734                 }
 735
 736                 /* Check current status */
 737                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 738                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 739                 if (err) {
 740                         brcmf_err("HT Avail read error: %d\n", err);
 741                         return -EBADE;
 742                 }
 743
 744                 /* Go to pending and await interrupt if appropriate */
 745                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 746                         /* Allow only clock-available interrupt */
 747                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 748                                                    SBSDIO_DEVICE_CTL, &err);
 749                         if (err) {
 750                                 brcmf_err("Devctl error setting CA: %d\n",
 751                                           err);
 752                                 return -EBADE;
 753                         }
 754
 755                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 756                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 757                                           devctl, &err);
 758                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 759                         bus->clkstate = CLK_PENDING;
 760
 761                         return 0;
 762                 } else if (bus->clkstate == CLK_PENDING) {
 763                         /* Cancel CA-only interrupt filter */
 764                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 765                                                    SBSDIO_DEVICE_CTL, &err);
 766                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 767                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 768                                           devctl, &err);
 769                 }
 770
 771                 /* Otherwise, wait here (polling) for HT Avail */
 772                 timeout = jiffies +
 773                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 774                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 775                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 776                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 777                                                    &err);
 778                         if (time_after(jiffies, timeout))
 779                                 break;
 780                         else
 781                                 usleep_range(5000, 10000);
 782                 }
 783                 if (err) {
 784                         brcmf_err("HT Avail request error: %d\n", err);
 785                         return -EBADE;
 786                 }
 787                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 788                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 789                                   PMU_MAX_TRANSITION_DLY, clkctl);
 790                         return -EBADE;
 791                 }
 792
 793                 /* Mark clock available */
 794                 bus->clkstate = CLK_AVAIL;
 795                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 796
 797 #if defined(DEBUG)
 798                 if (!bus->alp_only) {
 799                         if (SBSDIO_ALPONLY(clkctl))
 800                                 brcmf_err("HT Clock should be on\n");
 801                 }
 802 #endif                          /* defined (DEBUG) */
 803
 804                 bus->activity = true;
 805         } else {
 806                 clkreq = 0;
 807
 808                 if (bus->clkstate == CLK_PENDING) {
 809                         /* Cancel CA-only interrupt filter */
 810                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 811                                                    SBSDIO_DEVICE_CTL, &err);
 812                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 813                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 814                                           devctl, &err);
 815                 }
 816
 817                 bus->clkstate = CLK_SDONLY;
 818                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 819                                   clkreq, &err);
 820                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 821                 if (err) {
 822                         brcmf_err("Failed access turning clock off: %d\n",
 823                                   err);
 824                         return -EBADE;
 825                 }
 826         }
 827         return 0;
 828 }
 829
 830 /* Change idle/active SD state */
 831 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 832 {
 833         brcmf_dbg(SDIO, "Enter\n");
 834
 835         if (on)
 836                 bus->clkstate = CLK_SDONLY;
 837         else
 838                 bus->clkstate = CLK_NONE;
 839
 840         return 0;
 841 }
 842
 843 /* Transition SD and backplane clock readiness */
 844 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 845 {
 846 #ifdef DEBUG
 847         uint oldstate = bus->clkstate;
 848 #endif                          /* DEBUG */
 849
 850         brcmf_dbg(SDIO, "Enter\n");
 851
 852         /* Early exit if we're already there */
 853         if (bus->clkstate == target) {
 854                 if (target == CLK_AVAIL) {
 855                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 856                         bus->activity = true;
 857                 }
 858                 return 0;
 859         }
 860
 861         switch (target) {
 862         case CLK_AVAIL:
 863                 /* Make sure SD clock is available */
 864                 if (bus->clkstate == CLK_NONE)
 865                         brcmf_sdio_sdclk(bus, true);
 866                 /* Now request HT Avail on the backplane */
 867                 brcmf_sdio_htclk(bus, true, pendok);
 868                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 869                 bus->activity = true;
 870                 break;
 871
 872         case CLK_SDONLY:
 873                 /* Remove HT request, or bring up SD clock */
 874                 if (bus->clkstate == CLK_NONE)
 875                         brcmf_sdio_sdclk(bus, true);
 876                 else if (bus->clkstate == CLK_AVAIL)
 877                         brcmf_sdio_htclk(bus, false, false);
 878                 else
 879                         brcmf_err("request for %d -> %d\n",
 880                                   bus->clkstate, target);
 881                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 882                 break;
 883
 884         case CLK_NONE:
 885                 /* Make sure to remove HT request */
 886                 if (bus->clkstate == CLK_AVAIL)
 887                         brcmf_sdio_htclk(bus, false, false);
 888                 /* Now remove the SD clock */
 889                 brcmf_sdio_sdclk(bus, false);
 890                 brcmf_sdio_wd_timer(bus, 0);
 891                 break;
 892         }
 893 #ifdef DEBUG
 894         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 895 #endif                          /* DEBUG */
 896
 897         return 0;
 898 }
 899
 900 static int
 901 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 902 {
 903         int err = 0;
 904         brcmf_dbg(TRACE, "Enter\n");
 905         brcmf_dbg(SDIO, "request %s currently %s\n",
 906                   (sleep ? "SLEEP" : "WAKE"),
 907                   (bus->sleeping ? "SLEEP" : "WAKE"));
 908
 909         /* If SR is enabled control bus state with KSO */
 910         if (bus->sr_enabled) {
 911                 /* Done if we're already in the requested state */
 912                 if (sleep == bus->sleeping)
 913                         goto end;
 914
 915                 /* Going to sleep */
 916                 if (sleep) {
 917                         /* Don't sleep if something is pending */
 918                         if (atomic_read(&bus->intstatus) ||
 919                             atomic_read(&bus->ipend) > 0 ||
 920                             (!atomic_read(&bus->fcstate) &&
 921                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 922                             data_ok(bus)))
 923                                  return -EBUSY;
 924                         err = brcmf_sdio_kso_control(bus, false);
 925                         /* disable watchdog */
 926                         if (!err)
 927                                 brcmf_sdio_wd_timer(bus, 0);
 928                 } else {
 929                         bus->idlecount = 0;
 930                         err = brcmf_sdio_kso_control(bus, true);
 931                 }
 932                 if (!err) {
 933                         /* Change state */
 934                         bus->sleeping = sleep;
 935                         brcmf_dbg(SDIO, "new state %s\n",
 936                                   (sleep ? "SLEEP" : "WAKE"));
 937                 } else {
 938                         brcmf_err("error while changing bus sleep state %d\n",
 939                                   err);
 940                         return err;
 941                 }
 942         }
 943
 944 end:
 945         /* control clocks */
 946         if (sleep) {
 947                 if (!bus->sr_enabled)
 948                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 949         } else {
 950                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 951         }
 952
 953         return err;
 954
 955 }
 956
 957 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
 958 {
 959         u32 intstatus = 0;
 960         u32 hmb_data;
 961         u8 fcbits;
 962         int ret;
 963
 964         brcmf_dbg(SDIO, "Enter\n");
 965
 966         /* Read mailbox data and ack that we did so */
 967         ret = r_sdreg32(bus, &hmb_data,
 968                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 969
 970         if (ret == 0)
 971                 w_sdreg32(bus, SMB_INT_ACK,
 972                           offsetof(struct sdpcmd_regs, tosbmailbox));
 973         bus->sdcnt.f1regdata += 2;
 974
 975         /* Dongle recomposed rx frames, accept them again */
 976         if (hmb_data & HMB_DATA_NAKHANDLED) {
 977                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 978                           bus->rx_seq);
 979                 if (!bus->rxskip)
 980                         brcmf_err("unexpected NAKHANDLED!\n");
 981
 982                 bus->rxskip = false;
 983                 intstatus |= I_HMB_FRAME_IND;
 984         }
 985
 986         /*
 987          * DEVREADY does not occur with gSPI.
 988          */
 989         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 990                 bus->sdpcm_ver =
 991                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 992                     HMB_DATA_VERSION_SHIFT;
 993                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 994                         brcmf_err("Version mismatch, dongle reports %d, "
 995                                   "expecting %d\n",
 996                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 997                 else
 998                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 999                                   bus->sdpcm_ver);
1000         }
1001
1002         /*
1003          * Flow Control has been moved into the RX headers and this out of band
1004          * method isn't used any more.
1005          * remaining backward compatible with older dongles.
1006          */
1007         if (hmb_data & HMB_DATA_FC) {
1008                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1009                                                         HMB_DATA_FCDATA_SHIFT;
1010
1011                 if (fcbits & ~bus->flowcontrol)
1012                         bus->sdcnt.fc_xoff++;
1013
1014                 if (bus->flowcontrol & ~fcbits)
1015                         bus->sdcnt.fc_xon++;
1016
1017                 bus->sdcnt.fc_rcvd++;
1018                 bus->flowcontrol = fcbits;
1019         }
1020
1021         /* Shouldn't be any others */
1022         if (hmb_data & ~(HMB_DATA_DEVREADY |
1023                          HMB_DATA_NAKHANDLED |
1024                          HMB_DATA_FC |
1025                          HMB_DATA_FWREADY |
1026                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1027                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1028                           hmb_data);
1029
1030         return intstatus;
1031 }
1032
1033 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1034 {
1035         uint retries = 0;
1036         u16 lastrbc;
1037         u8 hi, lo;
1038         int err;
1039
1040         brcmf_err("%sterminate frame%s\n",
1041                   abort ? "abort command, " : "",
1042                   rtx ? ", send NAK" : "");
1043
1044         if (abort)
1045                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1046
1047         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1048                           SFC_RF_TERM, &err);
1049         bus->sdcnt.f1regdata++;
1050
1051         /* Wait until the packet has been flushed (device/FIFO stable) */
1052         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1053                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1054                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1055                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1056                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1057                 bus->sdcnt.f1regdata += 2;
1058
1059                 if ((hi == 0) && (lo == 0))
1060                         break;
1061
1062                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1063                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1064                                   lastrbc, (hi << 8) + lo);
1065                 }
1066                 lastrbc = (hi << 8) + lo;
1067         }
1068
1069         if (!retries)
1070                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1071         else
1072                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1073
1074         if (rtx) {
1075                 bus->sdcnt.rxrtx++;
1076                 err = w_sdreg32(bus, SMB_NAK,
1077                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1078
1079                 bus->sdcnt.f1regdata++;
1080                 if (err == 0)
1081                         bus->rxskip = true;
1082         }
1083
1084         /* Clear partial in any case */
1085         bus->cur_read.len = 0;
1086
1087         /* If we can't reach the device, signal failure */
1088         if (err)
1089                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1090 }
1091
1092 /* return total length of buffer chain */
1093 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1094 {
1095         struct sk_buff *p;
1096         uint total;
1097
1098         total = 0;
1099         skb_queue_walk(&bus->glom, p)
1100                 total += p->len;
1101         return total;
1102 }
1103
1104 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1105 {
1106         struct sk_buff *cur, *next;
1107
1108         skb_queue_walk_safe(&bus->glom, cur, next) {
1109                 skb_unlink(cur, &bus->glom);
1110                 brcmu_pkt_buf_free_skb(cur);
1111         }
1112 }
1113
1114 /**
1115  * brcmfmac sdio bus specific header
1116  * This is the lowest layer header wrapped on the packets transmitted between
1117  * host and WiFi dongle which contains information needed for SDIO core and
1118  * firmware
1119  *
1120  * It consists of 3 parts: hardware header, hardware extension header and
1121  * software header
1122  * hardware header (frame tag) - 4 bytes
1123  * Byte 0~1: Frame length
1124  * Byte 2~3: Checksum, bit-wise inverse of frame length
1125  * hardware extension header - 8 bytes
1126  * Tx glom mode only, N/A for Rx or normal Tx
1127  * Byte 0~1: Packet length excluding hw frame tag
1128  * Byte 2: Reserved
1129  * Byte 3: Frame flags, bit 0: last frame indication
1130  * Byte 4~5: Reserved
1131  * Byte 6~7: Tail padding length
1132  * software header - 8 bytes
1133  * Byte 0: Rx/Tx sequence number
1134  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1135  * Byte 2: Length of next data frame, reserved for Tx
1136  * Byte 3: Data offset
1137  * Byte 4: Flow control bits, reserved for Tx
1138  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1139  * Byte 6~7: Reserved
1140  */
1141 #define SDPCM_HWHDR_LEN                 4
1142 #define SDPCM_HWEXT_LEN                 8
1143 #define SDPCM_SWHDR_LEN                 8
1144 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1145 /* software header */
1146 #define SDPCM_SEQ_MASK                  0x000000ff
1147 #define SDPCM_SEQ_WRAP                  256
1148 #define SDPCM_CHANNEL_MASK              0x00000f00
1149 #define SDPCM_CHANNEL_SHIFT             8
1150 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1151 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1152 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1153 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1154 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1155 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1156 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1157 #define SDPCM_NEXTLEN_SHIFT             16
1158 #define SDPCM_DOFFSET_MASK              0xff000000
1159 #define SDPCM_DOFFSET_SHIFT             24
1160 #define SDPCM_FCMASK_MASK               0x000000ff
1161 #define SDPCM_WINDOW_MASK               0x0000ff00
1162 #define SDPCM_WINDOW_SHIFT              8
1163
1164 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1165 {
1166         u32 hdrvalue;
1167         hdrvalue = *(u32 *)swheader;
1168         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1169 }
1170
1171 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1172                               struct brcmf_sdio_hdrinfo *rd,
1173                               enum brcmf_sdio_frmtype type)
1174 {
1175         u16 len, checksum;
1176         u8 rx_seq, fc, tx_seq_max;
1177         u32 swheader;
1178
1179         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1180
1181         /* hw header */
1182         len = get_unaligned_le16(header);
1183         checksum = get_unaligned_le16(header + sizeof(u16));
1184         /* All zero means no more to read */
1185         if (!(len | checksum)) {
1186                 bus->rxpending = false;
1187                 return -ENODATA;
1188         }
1189         if ((u16)(~(len ^ checksum))) {
1190                 brcmf_err("HW header checksum error\n");
1191                 bus->sdcnt.rx_badhdr++;
1192                 brcmf_sdio_rxfail(bus, false, false);
1193                 return -EIO;
1194         }
1195         if (len < SDPCM_HDRLEN) {
1196                 brcmf_err("HW header length error\n");
1197                 return -EPROTO;
1198         }
1199         if (type == BRCMF_SDIO_FT_SUPER &&
1200             (roundup(len, bus->blocksize) != rd->len)) {
1201                 brcmf_err("HW superframe header length error\n");
1202                 return -EPROTO;
1203         }
1204         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1205                 brcmf_err("HW subframe header length error\n");
1206                 return -EPROTO;
1207         }
1208         rd->len = len;
1209
1210         /* software header */
1211         header += SDPCM_HWHDR_LEN;
1212         swheader = le32_to_cpu(*(__le32 *)header);
1213         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1214                 brcmf_err("Glom descriptor found in superframe head\n");
1215                 rd->len = 0;
1216                 return -EINVAL;
1217         }
1218         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1219         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1220         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1221             type != BRCMF_SDIO_FT_SUPER) {
1222                 brcmf_err("HW header length too long\n");
1223                 bus->sdcnt.rx_toolong++;
1224                 brcmf_sdio_rxfail(bus, false, false);
1225                 rd->len = 0;
1226                 return -EPROTO;
1227         }
1228         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1229                 brcmf_err("Wrong channel for superframe\n");
1230                 rd->len = 0;
1231                 return -EINVAL;
1232         }
1233         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1234             rd->channel != SDPCM_EVENT_CHANNEL) {
1235                 brcmf_err("Wrong channel for subframe\n");
1236                 rd->len = 0;
1237                 return -EINVAL;
1238         }
1239         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1240         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1241                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1242                 bus->sdcnt.rx_badhdr++;
1243                 brcmf_sdio_rxfail(bus, false, false);
1244                 rd->len = 0;
1245                 return -ENXIO;
1246         }
1247         if (rd->seq_num != rx_seq) {
1248                 brcmf_err("seq %d: sequence number error, expect %d\n",
1249                           rx_seq, rd->seq_num);
1250                 bus->sdcnt.rx_badseq++;
1251                 rd->seq_num = rx_seq;
1252         }
1253         /* no need to check the reset for subframe */
1254         if (type == BRCMF_SDIO_FT_SUB)
1255                 return 0;
1256         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1257         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1258                 /* only warm for NON glom packet */
1259                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1260                         brcmf_err("seq %d: next length error\n", rx_seq);
1261                 rd->len_nxtfrm = 0;
1262         }
1263         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1264         fc = swheader & SDPCM_FCMASK_MASK;
1265         if (bus->flowcontrol != fc) {
1266                 if (~bus->flowcontrol & fc)
1267                         bus->sdcnt.fc_xoff++;
1268                 if (bus->flowcontrol & ~fc)
1269                         bus->sdcnt.fc_xon++;
1270                 bus->sdcnt.fc_rcvd++;
1271                 bus->flowcontrol = fc;
1272         }
1273         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1274         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1275                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1276                 tx_seq_max = bus->tx_seq + 2;
1277         }
1278         bus->tx_max = tx_seq_max;
1279
1280         return 0;
1281 }
1282
1283 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1284 {
1285         *(__le16 *)header = cpu_to_le16(frm_length);
1286         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1287 }
1288
1289 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1290                               struct brcmf_sdio_hdrinfo *hd_info)
1291 {
1292         u32 hdrval;
1293         u8 hdr_offset;
1294
1295         brcmf_sdio_update_hwhdr(header, hd_info->len);
1296         hdr_offset = SDPCM_HWHDR_LEN;
1297
1298         if (bus->txglom) {
1299                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1300                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1301                 hdrval = (u16)hd_info->tail_pad << 16;
1302                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1303                 hdr_offset += SDPCM_HWEXT_LEN;
1304         }
1305
1306         hdrval = hd_info->seq_num;
1307         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1308                   SDPCM_CHANNEL_MASK;
1309         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1310                   SDPCM_DOFFSET_MASK;
1311         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1312         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1313         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1314 }
1315
1316 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1317 {
1318         u16 dlen, totlen;
1319         u8 *dptr, num = 0;
1320         u16 sublen;
1321         struct sk_buff *pfirst, *pnext;
1322
1323         int errcode;
1324         u8 doff, sfdoff;
1325
1326         struct brcmf_sdio_hdrinfo rd_new;
1327
1328         /* If packets, issue read(s) and send up packet chain */
1329         /* Return sequence numbers consumed? */
1330
1331         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1332                   bus->glomd, skb_peek(&bus->glom));
1333
1334         /* If there's a descriptor, generate the packet chain */
1335         if (bus->glomd) {
1336                 pfirst = pnext = NULL;
1337                 dlen = (u16) (bus->glomd->len);
1338                 dptr = bus->glomd->data;
1339                 if (!dlen || (dlen & 1)) {
1340                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1341                                   dlen);
1342                         dlen = 0;
1343                 }
1344
1345                 for (totlen = num = 0; dlen; num++) {
1346                         /* Get (and move past) next length */
1347                         sublen = get_unaligned_le16(dptr);
1348                         dlen -= sizeof(u16);
1349                         dptr += sizeof(u16);
1350                         if ((sublen < SDPCM_HDRLEN) ||
1351                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1352                                 brcmf_err("descriptor len %d bad: %d\n",
1353                                           num, sublen);
1354                                 pnext = NULL;
1355                                 break;
1356                         }
1357                         if (sublen % bus->sgentry_align) {
1358                                 brcmf_err("sublen %d not multiple of %d\n",
1359                                           sublen, bus->sgentry_align);
1360                         }
1361                         totlen += sublen;
1362
1363                         /* For last frame, adjust read len so total
1364                                  is a block multiple */
1365                         if (!dlen) {
1366                                 sublen +=
1367                                     (roundup(totlen, bus->blocksize) - totlen);
1368                                 totlen = roundup(totlen, bus->blocksize);
1369                         }
1370
1371                         /* Allocate/chain packet for next subframe */
1372                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1373                         if (pnext == NULL) {
1374                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1375                                           num, sublen);
1376                                 break;
1377                         }
1378                         skb_queue_tail(&bus->glom, pnext);
1379
1380                         /* Adhere to start alignment requirements */
1381                         pkt_align(pnext, sublen, bus->sgentry_align);
1382                 }
1383
1384                 /* If all allocations succeeded, save packet chain
1385                          in bus structure */
1386                 if (pnext) {
1387                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1388                                   totlen, num);
1389                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1390                             totlen != bus->cur_read.len) {
1391                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1392                                           bus->cur_read.len, totlen, rxseq);
1393                         }
1394                         pfirst = pnext = NULL;
1395                 } else {
1396                         brcmf_sdio_free_glom(bus);
1397                         num = 0;
1398                 }
1399
1400                 /* Done with descriptor packet */
1401                 brcmu_pkt_buf_free_skb(bus->glomd);
1402                 bus->glomd = NULL;
1403                 bus->cur_read.len = 0;
1404         }
1405
1406         /* Ok -- either we just generated a packet chain,
1407                  or had one from before */
1408         if (!skb_queue_empty(&bus->glom)) {
1409                 if (BRCMF_GLOM_ON()) {
1410                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1411                         skb_queue_walk(&bus->glom, pnext) {
1412                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1413                                           pnext, (u8 *) (pnext->data),
1414                                           pnext->len, pnext->len);
1415                         }
1416                 }
1417
1418                 pfirst = skb_peek(&bus->glom);
1419                 dlen = (u16) brcmf_sdio_glom_len(bus);
1420
1421                 /* Do an SDIO read for the superframe.  Configurable iovar to
1422                  * read directly into the chained packet, or allocate a large
1423                  * packet and and copy into the chain.
1424                  */
1425                 sdio_claim_host(bus->sdiodev->func[1]);
1426                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1427                                                  &bus->glom, dlen);
1428                 sdio_release_host(bus->sdiodev->func[1]);
1429                 bus->sdcnt.f2rxdata++;
1430
1431                 /* On failure, kill the superframe, allow a couple retries */
1432                 if (errcode < 0) {
1433                         brcmf_err("glom read of %d bytes failed: %d\n",
1434                                   dlen, errcode);
1435
1436                         sdio_claim_host(bus->sdiodev->func[1]);
1437                         if (bus->glomerr++ < 3) {
1438                                 brcmf_sdio_rxfail(bus, true, true);
1439                         } else {
1440                                 bus->glomerr = 0;
1441                                 brcmf_sdio_rxfail(bus, true, false);
1442                                 bus->sdcnt.rxglomfail++;
1443                                 brcmf_sdio_free_glom(bus);
1444                         }
1445                         sdio_release_host(bus->sdiodev->func[1]);
1446                         return 0;
1447                 }
1448
1449                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1450                                    pfirst->data, min_t(int, pfirst->len, 48),
1451                                    "SUPERFRAME:\n");
1452
1453                 rd_new.seq_num = rxseq;
1454                 rd_new.len = dlen;
1455                 sdio_claim_host(bus->sdiodev->func[1]);
1456                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1457                                              BRCMF_SDIO_FT_SUPER);
1458                 sdio_release_host(bus->sdiodev->func[1]);
1459                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1460
1461                 /* Remove superframe header, remember offset */
1462                 skb_pull(pfirst, rd_new.dat_offset);
1463                 sfdoff = rd_new.dat_offset;
1464                 num = 0;
1465
1466                 /* Validate all the subframe headers */
1467                 skb_queue_walk(&bus->glom, pnext) {
1468                         /* leave when invalid subframe is found */
1469                         if (errcode)
1470                                 break;
1471
1472                         rd_new.len = pnext->len;
1473                         rd_new.seq_num = rxseq++;
1474                         sdio_claim_host(bus->sdiodev->func[1]);
1475                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1476                                                      BRCMF_SDIO_FT_SUB);
1477                         sdio_release_host(bus->sdiodev->func[1]);
1478                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1479                                            pnext->data, 32, "subframe:\n");
1480
1481                         num++;
1482                 }
1483
1484                 if (errcode) {
1485                         /* Terminate frame on error, request
1486                                  a couple retries */
1487                         sdio_claim_host(bus->sdiodev->func[1]);
1488                         if (bus->glomerr++ < 3) {
1489                                 /* Restore superframe header space */
1490                                 skb_push(pfirst, sfdoff);
1491                                 brcmf_sdio_rxfail(bus, true, true);
1492                         } else {
1493                                 bus->glomerr = 0;
1494                                 brcmf_sdio_rxfail(bus, true, false);
1495                                 bus->sdcnt.rxglomfail++;
1496                                 brcmf_sdio_free_glom(bus);
1497                         }
1498                         sdio_release_host(bus->sdiodev->func[1]);
1499                         bus->cur_read.len = 0;
1500                         return 0;
1501                 }
1502
1503                 /* Basic SD framing looks ok - process each packet (header) */
1504
1505                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1506                         dptr = (u8 *) (pfirst->data);
1507                         sublen = get_unaligned_le16(dptr);
1508                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1509
1510                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1511                                            dptr, pfirst->len,
1512                                            "Rx Subframe Data:\n");
1513
1514                         __skb_trim(pfirst, sublen);
1515                         skb_pull(pfirst, doff);
1516
1517                         if (pfirst->len == 0) {
1518                                 skb_unlink(pfirst, &bus->glom);
1519                                 brcmu_pkt_buf_free_skb(pfirst);
1520                                 continue;
1521                         }
1522
1523                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1524                                            pfirst->data,
1525                                            min_t(int, pfirst->len, 32),
1526                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1527                                            bus->glom.qlen, pfirst, pfirst->data,
1528                                            pfirst->len, pfirst->next,
1529                                            pfirst->prev);
1530                         skb_unlink(pfirst, &bus->glom);
1531                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1532                         bus->sdcnt.rxglompkts++;
1533                 }
1534
1535                 bus->sdcnt.rxglomframes++;
1536         }
1537         return num;
1538 }
1539
1540 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1541                                      bool *pending)
1542 {
1543         DECLARE_WAITQUEUE(wait, current);
1544         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1545
1546         /* Wait until control frame is available */
1547         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1548         set_current_state(TASK_INTERRUPTIBLE);
1549
1550         while (!(*condition) && (!signal_pending(current) && timeout))
1551                 timeout = schedule_timeout(timeout);
1552
1553         if (signal_pending(current))
1554                 *pending = true;
1555
1556         set_current_state(TASK_RUNNING);
1557         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1558
1559         return timeout;
1560 }
1561
1562 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1563 {
1564         if (waitqueue_active(&bus->dcmd_resp_wait))
1565                 wake_up_interruptible(&bus->dcmd_resp_wait);
1566
1567         return 0;
1568 }
1569 static void
1570 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1571 {
1572         uint rdlen, pad;
1573         u8 *buf = NULL, *rbuf;
1574         int sdret;
1575
1576         brcmf_dbg(TRACE, "Enter\n");
1577
1578         if (bus->rxblen)
1579                 buf = vzalloc(bus->rxblen);
1580         if (!buf)
1581                 goto done;
1582
1583         rbuf = bus->rxbuf;
1584         pad = ((unsigned long)rbuf % bus->head_align);
1585         if (pad)
1586                 rbuf += (bus->head_align - pad);
1587
1588         /* Copy the already-read portion over */
1589         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1590         if (len <= BRCMF_FIRSTREAD)
1591                 goto gotpkt;
1592
1593         /* Raise rdlen to next SDIO block to avoid tail command */
1594         rdlen = len - BRCMF_FIRSTREAD;
1595         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1596                 pad = bus->blocksize - (rdlen % bus->blocksize);
1597                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1598                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1599                         rdlen += pad;
1600         } else if (rdlen % bus->head_align) {
1601                 rdlen += bus->head_align - (rdlen % bus->head_align);
1602         }
1603
1604         /* Drop if the read is too big or it exceeds our maximum */
1605         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1606                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1607                           rdlen, bus->sdiodev->bus_if->maxctl);
1608                 brcmf_sdio_rxfail(bus, false, false);
1609                 goto done;
1610         }
1611
1612         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1613                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1614                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1615                 bus->sdcnt.rx_toolong++;
1616                 brcmf_sdio_rxfail(bus, false, false);
1617                 goto done;
1618         }
1619
1620         /* Read remain of frame body */
1621         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1622         bus->sdcnt.f2rxdata++;
1623
1624         /* Control frame failures need retransmission */
1625         if (sdret < 0) {
1626                 brcmf_err("read %d control bytes failed: %d\n",
1627                           rdlen, sdret);
1628                 bus->sdcnt.rxc_errors++;
1629                 brcmf_sdio_rxfail(bus, true, true);
1630                 goto done;
1631         } else
1632                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1633
1634 gotpkt:
1635
1636         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1637                            buf, len, "RxCtrl:\n");
1638
1639         /* Point to valid data and indicate its length */
1640         spin_lock_bh(&bus->rxctl_lock);
1641         if (bus->rxctl) {
1642                 brcmf_err("last control frame is being processed.\n");
1643                 spin_unlock_bh(&bus->rxctl_lock);
1644                 vfree(buf);
1645                 goto done;
1646         }
1647         bus->rxctl = buf + doff;
1648         bus->rxctl_orig = buf;
1649         bus->rxlen = len - doff;
1650         spin_unlock_bh(&bus->rxctl_lock);
1651
1652 done:
1653         /* Awake any waiters */
1654         brcmf_sdio_dcmd_resp_wake(bus);
1655 }
1656
1657 /* Pad read to blocksize for efficiency */
1658 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1659 {
1660         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1661                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1662                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1663                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1664                         *rdlen += *pad;
1665         } else if (*rdlen % bus->head_align) {
1666                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1667         }
1668 }
1669
1670 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1671 {
1672         struct sk_buff *pkt;            /* Packet for event or data frames */
1673         u16 pad;                /* Number of pad bytes to read */
1674         uint rxleft = 0;        /* Remaining number of frames allowed */
1675         int ret;                /* Return code from calls */
1676         uint rxcount = 0;       /* Total frames read */
1677         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1678         u8 head_read = 0;
1679
1680         brcmf_dbg(TRACE, "Enter\n");
1681
1682         /* Not finished unless we encounter no more frames indication */
1683         bus->rxpending = true;
1684
1685         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1686              !bus->rxskip && rxleft &&
1687              bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1688              rd->seq_num++, rxleft--) {
1689
1690                 /* Handle glomming separately */
1691                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1692                         u8 cnt;
1693                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1694                                   bus->glomd, skb_peek(&bus->glom));
1695                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1696                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1697                         rd->seq_num += cnt - 1;
1698                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1699                         continue;
1700                 }
1701
1702                 rd->len_left = rd->len;
1703                 /* read header first for unknow frame length */
1704                 sdio_claim_host(bus->sdiodev->func[1]);
1705                 if (!rd->len) {
1706                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1707                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1708                         bus->sdcnt.f2rxhdrs++;
1709                         if (ret < 0) {
1710                                 brcmf_err("RXHEADER FAILED: %d\n",
1711                                           ret);
1712                                 bus->sdcnt.rx_hdrfail++;
1713                                 brcmf_sdio_rxfail(bus, true, true);
1714                                 sdio_release_host(bus->sdiodev->func[1]);
1715                                 continue;
1716                         }
1717
1718                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1719                                            bus->rxhdr, SDPCM_HDRLEN,
1720                                            "RxHdr:\n");
1721
1722                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1723                                                BRCMF_SDIO_FT_NORMAL)) {
1724                                 sdio_release_host(bus->sdiodev->func[1]);
1725                                 if (!bus->rxpending)
1726                                         break;
1727                                 else
1728                                         continue;
1729                         }
1730
1731                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1732                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1733                                                         rd->len,
1734                                                         rd->dat_offset);
1735                                 /* prepare the descriptor for the next read */
1736                                 rd->len = rd->len_nxtfrm << 4;
1737                                 rd->len_nxtfrm = 0;
1738                                 /* treat all packet as event if we don't know */
1739                                 rd->channel = SDPCM_EVENT_CHANNEL;
1740                                 sdio_release_host(bus->sdiodev->func[1]);
1741                                 continue;
1742                         }
1743                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1744                                        rd->len - BRCMF_FIRSTREAD : 0;
1745                         head_read = BRCMF_FIRSTREAD;
1746                 }
1747
1748                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1749
1750                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1751                                             bus->head_align);
1752                 if (!pkt) {
1753                         /* Give up on data, request rtx of events */
1754                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1755                         brcmf_sdio_rxfail(bus, false,
1756                                             RETRYCHAN(rd->channel));
1757                         sdio_release_host(bus->sdiodev->func[1]);
1758                         continue;
1759                 }
1760                 skb_pull(pkt, head_read);
1761                 pkt_align(pkt, rd->len_left, bus->head_align);
1762
1763                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1764                 bus->sdcnt.f2rxdata++;
1765                 sdio_release_host(bus->sdiodev->func[1]);
1766
1767                 if (ret < 0) {
1768                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1769                                   rd->len, rd->channel, ret);
1770                         brcmu_pkt_buf_free_skb(pkt);
1771                         sdio_claim_host(bus->sdiodev->func[1]);
1772                         brcmf_sdio_rxfail(bus, true,
1773                                             RETRYCHAN(rd->channel));
1774                         sdio_release_host(bus->sdiodev->func[1]);
1775                         continue;
1776                 }
1777
1778                 if (head_read) {
1779                         skb_push(pkt, head_read);
1780                         memcpy(pkt->data, bus->rxhdr, head_read);
1781                         head_read = 0;
1782                 } else {
1783                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1784                         rd_new.seq_num = rd->seq_num;
1785                         sdio_claim_host(bus->sdiodev->func[1]);
1786                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1787                                                BRCMF_SDIO_FT_NORMAL)) {
1788                                 rd->len = 0;
1789                                 brcmu_pkt_buf_free_skb(pkt);
1790                         }
1791                         bus->sdcnt.rx_readahead_cnt++;
1792                         if (rd->len != roundup(rd_new.len, 16)) {
1793                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1794                                           rd->len,
1795                                           roundup(rd_new.len, 16) >> 4);
1796                                 rd->len = 0;
1797                                 brcmf_sdio_rxfail(bus, true, true);
1798                                 sdio_release_host(bus->sdiodev->func[1]);
1799                                 brcmu_pkt_buf_free_skb(pkt);
1800                                 continue;
1801                         }
1802                         sdio_release_host(bus->sdiodev->func[1]);
1803                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1804                         rd->channel = rd_new.channel;
1805                         rd->dat_offset = rd_new.dat_offset;
1806
1807                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1808                                              BRCMF_DATA_ON()) &&
1809                                            BRCMF_HDRS_ON(),
1810                                            bus->rxhdr, SDPCM_HDRLEN,
1811                                            "RxHdr:\n");
1812
1813                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1814                                 brcmf_err("readahead on control packet %d?\n",
1815                                           rd_new.seq_num);
1816                                 /* Force retry w/normal header read */
1817                                 rd->len = 0;
1818                                 sdio_claim_host(bus->sdiodev->func[1]);
1819                                 brcmf_sdio_rxfail(bus, false, true);
1820                                 sdio_release_host(bus->sdiodev->func[1]);
1821                                 brcmu_pkt_buf_free_skb(pkt);
1822                                 continue;
1823                         }
1824                 }
1825
1826                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1827                                    pkt->data, rd->len, "Rx Data:\n");
1828
1829                 /* Save superframe descriptor and allocate packet frame */
1830                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1831                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1832                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1833                                           rd->len);
1834                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1835                                                    pkt->data, rd->len,
1836                                                    "Glom Data:\n");
1837                                 __skb_trim(pkt, rd->len);
1838                                 skb_pull(pkt, SDPCM_HDRLEN);
1839                                 bus->glomd = pkt;
1840                         } else {
1841                                 brcmf_err("%s: glom superframe w/o "
1842                                           "descriptor!\n", __func__);
1843                                 sdio_claim_host(bus->sdiodev->func[1]);
1844                                 brcmf_sdio_rxfail(bus, false, false);
1845                                 sdio_release_host(bus->sdiodev->func[1]);
1846                         }
1847                         /* prepare the descriptor for the next read */
1848                         rd->len = rd->len_nxtfrm << 4;
1849                         rd->len_nxtfrm = 0;
1850                         /* treat all packet as event if we don't know */
1851                         rd->channel = SDPCM_EVENT_CHANNEL;
1852                         continue;
1853                 }
1854
1855                 /* Fill in packet len and prio, deliver upward */
1856                 __skb_trim(pkt, rd->len);
1857                 skb_pull(pkt, rd->dat_offset);
1858
1859                 /* prepare the descriptor for the next read */
1860                 rd->len = rd->len_nxtfrm << 4;
1861                 rd->len_nxtfrm = 0;
1862                 /* treat all packet as event if we don't know */
1863                 rd->channel = SDPCM_EVENT_CHANNEL;
1864
1865                 if (pkt->len == 0) {
1866                         brcmu_pkt_buf_free_skb(pkt);
1867                         continue;
1868                 }
1869
1870                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1871         }
1872
1873         rxcount = maxframes - rxleft;
1874         /* Message if we hit the limit */
1875         if (!rxleft)
1876                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1877         else
1878                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1879         /* Back off rxseq if awaiting rtx, update rx_seq */
1880         if (bus->rxskip)
1881                 rd->seq_num--;
1882         bus->rx_seq = rd->seq_num;
1883
1884         return rxcount;
1885 }
1886
1887 static void
1888 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1889 {
1890         if (waitqueue_active(&bus->ctrl_wait))
1891                 wake_up_interruptible(&bus->ctrl_wait);
1892         return;
1893 }
1894
1895 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1896 {
1897         u16 head_pad;
1898         u8 *dat_buf;
1899
1900         dat_buf = (u8 *)(pkt->data);
1901
1902         /* Check head padding */
1903         head_pad = ((unsigned long)dat_buf % bus->head_align);
1904         if (head_pad) {
1905                 if (skb_headroom(pkt) < head_pad) {
1906                         bus->sdiodev->bus_if->tx_realloc++;
1907                         head_pad = 0;
1908                         if (skb_cow(pkt, head_pad))
1909                                 return -ENOMEM;
1910                 }
1911                 skb_push(pkt, head_pad);
1912                 dat_buf = (u8 *)(pkt->data);
1913                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1914         }
1915         return head_pad;
1916 }
1917
1918 /**
1919  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1920  * bus layer usage.
1921  */
1922 /* flag marking a dummy skb added for DMA alignment requirement */
1923 #define ALIGN_SKB_FLAG          0x8000
1924 /* bit mask of data length chopped from the previous packet */
1925 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1926
1927 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1928                                     struct sk_buff_head *pktq,
1929                                     struct sk_buff *pkt, u16 total_len)
1930 {
1931         struct brcmf_sdio_dev *sdiodev;
1932         struct sk_buff *pkt_pad;
1933         u16 tail_pad, tail_chop, chain_pad;
1934         unsigned int blksize;
1935         bool lastfrm;
1936         int ntail, ret;
1937
1938         sdiodev = bus->sdiodev;
1939         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1940         /* sg entry alignment should be a divisor of block size */
1941         WARN_ON(blksize % bus->sgentry_align);
1942
1943         /* Check tail padding */
1944         lastfrm = skb_queue_is_last(pktq, pkt);
1945         tail_pad = 0;
1946         tail_chop = pkt->len % bus->sgentry_align;
1947         if (tail_chop)
1948                 tail_pad = bus->sgentry_align - tail_chop;
1949         chain_pad = (total_len + tail_pad) % blksize;
1950         if (lastfrm && chain_pad)
1951                 tail_pad += blksize - chain_pad;
1952         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1953                 pkt_pad = bus->txglom_sgpad;
1954                 if (pkt_pad == NULL)
1955                           brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1956                 if (pkt_pad == NULL)
1957                         return -ENOMEM;
1958                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1959                 if (unlikely(ret < 0))
1960                         return ret;
1961                 memcpy(pkt_pad->data,
1962                        pkt->data + pkt->len - tail_chop,
1963                        tail_chop);
1964                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1965                 skb_trim(pkt, pkt->len - tail_chop);
1966                 __skb_queue_after(pktq, pkt, pkt_pad);
1967         } else {
1968                 ntail = pkt->data_len + tail_pad -
1969                         (pkt->end - pkt->tail);
1970                 if (skb_cloned(pkt) || ntail > 0)
1971                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1972                                 return -ENOMEM;
1973                 if (skb_linearize(pkt))
1974                         return -ENOMEM;
1975                 __skb_put(pkt, tail_pad);
1976         }
1977
1978         return tail_pad;
1979 }
1980
1981 /**
1982  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1983  * @bus: brcmf_sdio structure pointer
1984  * @pktq: packet list pointer
1985  * @chan: virtual channel to transmit the packet
1986  *
1987  * Processes to be applied to the packet
1988  *      - Align data buffer pointer
1989  *      - Align data buffer length
1990  *      - Prepare header
1991  * Return: negative value if there is error
1992  */
1993 static int
1994 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1995                       uint chan)
1996 {
1997         u16 head_pad, total_len;
1998         struct sk_buff *pkt_next;
1999         u8 txseq;
2000         int ret;
2001         struct brcmf_sdio_hdrinfo hd_info = {0};
2002
2003         txseq = bus->tx_seq;
2004         total_len = 0;
2005         skb_queue_walk(pktq, pkt_next) {
2006                 /* alignment packet inserted in previous
2007                  * loop cycle can be skipped as it is
2008                  * already properly aligned and does not
2009                  * need an sdpcm header.
2010                  */
2011                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2012                         continue;
2013
2014                 /* align packet data pointer */
2015                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2016                 if (ret < 0)
2017                         return ret;
2018                 head_pad = (u16)ret;
2019                 if (head_pad)
2020                         memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2021
2022                 total_len += pkt_next->len;
2023
2024                 hd_info.len = pkt_next->len;
2025                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2026                 if (bus->txglom && pktq->qlen > 1) {
2027                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2028                                                        pkt_next, total_len);
2029                         if (ret < 0)
2030                                 return ret;
2031                         hd_info.tail_pad = (u16)ret;
2032                         total_len += (u16)ret;
2033                 }
2034
2035                 hd_info.channel = chan;
2036                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2037                 hd_info.seq_num = txseq++;
2038
2039                 /* Now fill the header */
2040                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2041
2042                 if (BRCMF_BYTES_ON() &&
2043                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2044                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2045                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2046                                            "Tx Frame:\n");
2047                 else if (BRCMF_HDRS_ON())
2048                         brcmf_dbg_hex_dump(true, pkt_next,
2049                                            head_pad + bus->tx_hdrlen,
2050                                            "Tx Header:\n");
2051         }
2052         /* Hardware length tag of the first packet should be total
2053          * length of the chain (including padding)
2054          */
2055         if (bus->txglom)
2056                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2057         return 0;
2058 }
2059
2060 /**
2061  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2062  * @bus: brcmf_sdio structure pointer
2063  * @pktq: packet list pointer
2064  *
2065  * Processes to be applied to the packet
2066  *      - Remove head padding
2067  *      - Remove tail padding
2068  */
2069 static void
2070 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2071 {
2072         u8 *hdr;
2073         u32 dat_offset;
2074         u16 tail_pad;
2075         u32 dummy_flags, chop_len;
2076         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2077
2078         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2079                 dummy_flags = *(u32 *)(pkt_next->cb);
2080                 if (dummy_flags & ALIGN_SKB_FLAG) {
2081                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2082                         if (chop_len) {
2083                                 pkt_prev = pkt_next->prev;
2084                                 skb_put(pkt_prev, chop_len);
2085                         }
2086                         __skb_unlink(pkt_next, pktq);
2087                         brcmu_pkt_buf_free_skb(pkt_next);
2088                 } else {
2089                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2090                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2091                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2092                                      SDPCM_DOFFSET_SHIFT;
2093                         skb_pull(pkt_next, dat_offset);
2094                         if (bus->txglom) {
2095                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2096                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2097                         }
2098                 }
2099         }
2100 }
2101
2102 /* Writes a HW/SW header into the packet and sends it. */
2103 /* Assumes: (a) header space already there, (b) caller holds lock */
2104 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2105                             uint chan)
2106 {
2107         int ret;
2108         int i;
2109         struct sk_buff *pkt_next, *tmp;
2110
2111         brcmf_dbg(TRACE, "Enter\n");
2112
2113         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2114         if (ret)
2115                 goto done;
2116
2117         sdio_claim_host(bus->sdiodev->func[1]);
2118         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2119         bus->sdcnt.f2txdata++;
2120
2121         if (ret < 0) {
2122                 /* On failure, abort the command and terminate the frame */
2123                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2124                           ret);
2125                 bus->sdcnt.tx_sderrs++;
2126
2127                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2128                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2129                                   SFC_WF_TERM, NULL);
2130                 bus->sdcnt.f1regdata++;
2131
2132                 for (i = 0; i < 3; i++) {
2133                         u8 hi, lo;
2134                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2135                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2136                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2137                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2138                         bus->sdcnt.f1regdata += 2;
2139                         if ((hi == 0) && (lo == 0))
2140                                 break;
2141                 }
2142         }
2143         sdio_release_host(bus->sdiodev->func[1]);
2144
2145 done:
2146         brcmf_sdio_txpkt_postp(bus, pktq);
2147         if (ret == 0)
2148                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2149         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2150                 __skb_unlink(pkt_next, pktq);
2151                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2152         }
2153         return ret;
2154 }
2155
2156 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2157 {
2158         struct sk_buff *pkt;
2159         struct sk_buff_head pktq;
2160         u32 intstatus = 0;
2161         int ret = 0, prec_out, i;
2162         uint cnt = 0;
2163         u8 tx_prec_map, pkt_num;
2164
2165         brcmf_dbg(TRACE, "Enter\n");
2166
2167         tx_prec_map = ~bus->flowcontrol;
2168
2169         /* Send frames until the limit or some other event */
2170         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2171                 pkt_num = 1;
2172                 __skb_queue_head_init(&pktq);
2173                 if (bus->txglom)
2174                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2175                                         brcmf_sdio_txglomsz);
2176                 pkt_num = min_t(u32, pkt_num,
2177                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2178                 spin_lock_bh(&bus->txqlock);
2179                 for (i = 0; i < pkt_num; i++) {
2180                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2181                                               &prec_out);
2182                         if (pkt == NULL)
2183                                 break;
2184                         __skb_queue_tail(&pktq, pkt);
2185                 }
2186                 spin_unlock_bh(&bus->txqlock);
2187                 if (i == 0)
2188                         break;
2189
2190                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2191                 cnt += i;
2192
2193                 /* In poll mode, need to check for other events */
2194                 if (!bus->intr && cnt) {
2195                         /* Check device status, signal pending interrupt */
2196                         sdio_claim_host(bus->sdiodev->func[1]);
2197                         ret = r_sdreg32(bus, &intstatus,
2198                                         offsetof(struct sdpcmd_regs,
2199                                                  intstatus));
2200                         sdio_release_host(bus->sdiodev->func[1]);
2201                         bus->sdcnt.f2txdata++;
2202                         if (ret != 0)
2203                                 break;
2204                         if (intstatus & bus->hostintmask)
2205                                 atomic_set(&bus->ipend, 1);
2206                 }
2207         }
2208
2209         /* Deflow-control stack if needed */
2210         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2211             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2212                 bus->txoff = false;
2213                 brcmf_txflowblock(bus->sdiodev->dev, false);
2214         }
2215
2216         return cnt;
2217 }
2218
2219 static void brcmf_sdio_bus_stop(struct device *dev)
2220 {
2221         u32 local_hostintmask;
2222         u8 saveclk;
2223         int err;
2224         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2225         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2226         struct brcmf_sdio *bus = sdiodev->bus;
2227
2228         brcmf_dbg(TRACE, "Enter\n");
2229
2230         if (bus->watchdog_tsk) {
2231                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2232                 kthread_stop(bus->watchdog_tsk);
2233                 bus->watchdog_tsk = NULL;
2234         }
2235
2236         sdio_claim_host(bus->sdiodev->func[1]);
2237
2238         /* Enable clock for device interrupts */
2239         brcmf_sdio_bus_sleep(bus, false, false);
2240
2241         /* Disable and clear interrupts at the chip level also */
2242         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2243         local_hostintmask = bus->hostintmask;
2244         bus->hostintmask = 0;
2245
2246         /* Change our idea of bus state */
2247         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2248
2249         /* Force clocks on backplane to be sure F2 interrupt propagates */
2250         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
2251                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
2252         if (!err) {
2253                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2254                                   (saveclk | SBSDIO_FORCE_HT), &err);
2255         }
2256         if (err)
2257                 brcmf_err("Failed to force clock for F2: err %d\n", err);
2258
2259         /* Turn off the bus (F2), free any pending packets */
2260         brcmf_dbg(INTR, "disable SDIO interrupts\n");
2261         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
2262
2263         /* Clear any pending interrupts now that F2 is disabled */
2264         w_sdreg32(bus, local_hostintmask,
2265                   offsetof(struct sdpcmd_regs, intstatus));
2266
2267         /* Turn off the backplane clock (only) */
2268         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
2269         sdio_release_host(bus->sdiodev->func[1]);
2270
2271         /* Clear the data packet queues */
2272         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2273
2274         /* Clear any held glomming stuff */
2275         if (bus->glomd)
2276                 brcmu_pkt_buf_free_skb(bus->glomd);
2277         brcmf_sdio_free_glom(bus);
2278
2279         /* Clear rx control and wake any waiters */
2280         spin_lock_bh(&bus->rxctl_lock);
2281         bus->rxlen = 0;
2282         spin_unlock_bh(&bus->rxctl_lock);
2283         brcmf_sdio_dcmd_resp_wake(bus);
2284
2285         /* Reset some F2 state stuff */
2286         bus->rxskip = false;
2287         bus->tx_seq = bus->rx_seq = 0;
2288 }
2289
2290 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2291 {
2292         unsigned long flags;
2293
2294         if (bus->sdiodev->oob_irq_requested) {
2295                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2296                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2297                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2298                         bus->sdiodev->irq_en = true;
2299                 }
2300                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2301         }
2302 }
2303
2304 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2305 {
2306         u8 idx;
2307         u32 addr;
2308         unsigned long val;
2309         int n, ret;
2310
2311         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2312         addr = bus->ci->c_inf[idx].base +
2313                offsetof(struct sdpcmd_regs, intstatus);
2314
2315         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2316         bus->sdcnt.f1regdata++;
2317         if (ret != 0)
2318                 val = 0;
2319
2320         val &= bus->hostintmask;
2321         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2322
2323         /* Clear interrupts */
2324         if (val) {
2325                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2326                 bus->sdcnt.f1regdata++;
2327         }
2328
2329         if (ret) {
2330                 atomic_set(&bus->intstatus, 0);
2331         } else if (val) {
2332                 for_each_set_bit(n, &val, 32)
2333                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2334         }
2335
2336         return ret;
2337 }
2338
2339 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2340 {
2341         u32 newstatus = 0;
2342         unsigned long intstatus;
2343         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2344         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2345         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2346         int err = 0, n;
2347
2348         brcmf_dbg(TRACE, "Enter\n");
2349
2350         sdio_claim_host(bus->sdiodev->func[1]);
2351
2352         /* If waiting for HTAVAIL, check status */
2353         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2354                 u8 clkctl, devctl = 0;
2355
2356 #ifdef DEBUG
2357                 /* Check for inconsistent device control */
2358                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2359                                            SBSDIO_DEVICE_CTL, &err);
2360                 if (err) {
2361                         brcmf_err("error reading DEVCTL: %d\n", err);
2362                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2363                 }
2364 #endif                          /* DEBUG */
2365
2366                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2367                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2368                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2369                 if (err) {
2370                         brcmf_err("error reading CSR: %d\n",
2371                                   err);
2372                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2373                 }
2374
2375                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2376                           devctl, clkctl);
2377
2378                 if (SBSDIO_HTAV(clkctl)) {
2379                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2380                                                    SBSDIO_DEVICE_CTL, &err);
2381                         if (err) {
2382                                 brcmf_err("error reading DEVCTL: %d\n",
2383                                           err);
2384                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2385                         }
2386                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2387                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2388                                           devctl, &err);
2389                         if (err) {
2390                                 brcmf_err("error writing DEVCTL: %d\n",
2391                                           err);
2392                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2393                         }
2394                         bus->clkstate = CLK_AVAIL;
2395                 }
2396         }
2397
2398         /* Make sure backplane clock is on */
2399         brcmf_sdio_bus_sleep(bus, false, true);
2400
2401         /* Pending interrupt indicates new device status */
2402         if (atomic_read(&bus->ipend) > 0) {
2403                 atomic_set(&bus->ipend, 0);
2404                 err = brcmf_sdio_intr_rstatus(bus);
2405         }
2406
2407         /* Start with leftover status bits */
2408         intstatus = atomic_xchg(&bus->intstatus, 0);
2409
2410         /* Handle flow-control change: read new state in case our ack
2411          * crossed another change interrupt.  If change still set, assume
2412          * FC ON for safety, let next loop through do the debounce.
2413          */
2414         if (intstatus & I_HMB_FC_CHANGE) {
2415                 intstatus &= ~I_HMB_FC_CHANGE;
2416                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2417                                 offsetof(struct sdpcmd_regs, intstatus));
2418
2419                 err = r_sdreg32(bus, &newstatus,
2420                                 offsetof(struct sdpcmd_regs, intstatus));
2421                 bus->sdcnt.f1regdata += 2;
2422                 atomic_set(&bus->fcstate,
2423                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2424                 intstatus |= (newstatus & bus->hostintmask);
2425         }
2426
2427         /* Handle host mailbox indication */
2428         if (intstatus & I_HMB_HOST_INT) {
2429                 intstatus &= ~I_HMB_HOST_INT;
2430                 intstatus |= brcmf_sdio_hostmail(bus);
2431         }
2432
2433         sdio_release_host(bus->sdiodev->func[1]);
2434
2435         /* Generally don't ask for these, can get CRC errors... */
2436         if (intstatus & I_WR_OOSYNC) {
2437                 brcmf_err("Dongle reports WR_OOSYNC\n");
2438                 intstatus &= ~I_WR_OOSYNC;
2439         }
2440
2441         if (intstatus & I_RD_OOSYNC) {
2442                 brcmf_err("Dongle reports RD_OOSYNC\n");
2443                 intstatus &= ~I_RD_OOSYNC;
2444         }
2445
2446         if (intstatus & I_SBINT) {
2447                 brcmf_err("Dongle reports SBINT\n");
2448                 intstatus &= ~I_SBINT;
2449         }
2450
2451         /* Would be active due to wake-wlan in gSPI */
2452         if (intstatus & I_CHIPACTIVE) {
2453                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2454                 intstatus &= ~I_CHIPACTIVE;
2455         }
2456
2457         /* Ignore frame indications if rxskip is set */
2458         if (bus->rxskip)
2459                 intstatus &= ~I_HMB_FRAME_IND;
2460
2461         /* On frame indication, read available frames */
2462         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2463                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2464                 if (!bus->rxpending)
2465                         intstatus &= ~I_HMB_FRAME_IND;
2466                 rxlimit -= min(framecnt, rxlimit);
2467         }
2468
2469         /* Keep still-pending events for next scheduling */
2470         if (intstatus) {
2471                 for_each_set_bit(n, &intstatus, 32)
2472                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2473         }
2474
2475         brcmf_sdio_clrintr(bus);
2476
2477         if (data_ok(bus) && bus->ctrl_frame_stat &&
2478                 (bus->clkstate == CLK_AVAIL)) {
2479                 int i;
2480
2481                 sdio_claim_host(bus->sdiodev->func[1]);
2482                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2483                                            (u32)bus->ctrl_frame_len);
2484
2485                 if (err < 0) {
2486                         /* On failure, abort the command and
2487                                 terminate the frame */
2488                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2489                                   err);
2490                         bus->sdcnt.tx_sderrs++;
2491
2492                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2493
2494                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2495                                           SFC_WF_TERM, &err);
2496                         bus->sdcnt.f1regdata++;
2497
2498                         for (i = 0; i < 3; i++) {
2499                                 u8 hi, lo;
2500                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2501                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2502                                                        &err);
2503                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2504                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2505                                                        &err);
2506                                 bus->sdcnt.f1regdata += 2;
2507                                 if ((hi == 0) && (lo == 0))
2508                                         break;
2509                         }
2510
2511                 } else {
2512                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2513                 }
2514                 sdio_release_host(bus->sdiodev->func[1]);
2515                 bus->ctrl_frame_stat = false;
2516                 brcmf_sdio_wait_event_wakeup(bus);
2517         }
2518         /* Send queued frames (limit 1 if rx may still be pending) */
2519         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2520                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2521                  && data_ok(bus)) {
2522                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2523                                             txlimit;
2524                 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2525                 txlimit -= framecnt;
2526         }
2527
2528         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2529                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2530                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2531                 atomic_set(&bus->intstatus, 0);
2532         } else if (atomic_read(&bus->intstatus) ||
2533                    atomic_read(&bus->ipend) > 0 ||
2534                    (!atomic_read(&bus->fcstate) &&
2535                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2536                     data_ok(bus)) || PKT_AVAILABLE()) {
2537                 atomic_inc(&bus->dpc_tskcnt);
2538         }
2539
2540         /* If we're done for now, turn off clock request. */
2541         if ((bus->clkstate != CLK_PENDING)
2542             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2543                 bus->activity = false;
2544                 brcmf_dbg(SDIO, "idle state\n");
2545                 sdio_claim_host(bus->sdiodev->func[1]);
2546                 brcmf_sdio_bus_sleep(bus, true, false);
2547                 sdio_release_host(bus->sdiodev->func[1]);
2548         }
2549 }
2550
2551 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2552 {
2553         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2554         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2555         struct brcmf_sdio *bus = sdiodev->bus;
2556
2557         return &bus->txq;
2558 }
2559
2560 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2561 {
2562         int ret = -EBADE;
2563         uint datalen, prec;
2564         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2565         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2566         struct brcmf_sdio *bus = sdiodev->bus;
2567         ulong flags;
2568
2569         brcmf_dbg(TRACE, "Enter\n");
2570
2571         datalen = pkt->len;
2572
2573         /* Add space for the header */
2574         skb_push(pkt, bus->tx_hdrlen);
2575         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2576
2577         prec = prio2prec((pkt->priority & PRIOMASK));
2578
2579         /* Check for existing queue, current flow-control,
2580                          pending event, or pending clock */
2581         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2582         bus->sdcnt.fcqueued++;
2583
2584         /* Priority based enq */
2585         spin_lock_irqsave(&bus->txqlock, flags);
2586         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2587                 skb_pull(pkt, bus->tx_hdrlen);
2588                 brcmf_err("out of bus->txq !!!\n");
2589                 ret = -ENOSR;
2590         } else {
2591                 ret = 0;
2592         }
2593
2594         if (pktq_len(&bus->txq) >= TXHI) {
2595                 bus->txoff = true;
2596                 brcmf_txflowblock(bus->sdiodev->dev, true);
2597         }
2598         spin_unlock_irqrestore(&bus->txqlock, flags);
2599
2600 #ifdef DEBUG
2601         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2602                 qcount[prec] = pktq_plen(&bus->txq, prec);
2603 #endif
2604
2605         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2606                 atomic_inc(&bus->dpc_tskcnt);
2607                 queue_work(bus->brcmf_wq, &bus->datawork);
2608         }
2609
2610         return ret;
2611 }
2612
2613 #ifdef DEBUG
2614 #define CONSOLE_LINE_MAX        192
2615
2616 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2617 {
2618         struct brcmf_console *c = &bus->console;
2619         u8 line[CONSOLE_LINE_MAX], ch;
2620         u32 n, idx, addr;
2621         int rv;
2622
2623         /* Don't do anything until FWREADY updates console address */
2624         if (bus->console_addr == 0)
2625                 return 0;
2626
2627         /* Read console log struct */
2628         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2629         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2630                                sizeof(c->log_le));
2631         if (rv < 0)
2632                 return rv;
2633
2634         /* Allocate console buffer (one time only) */
2635         if (c->buf == NULL) {
2636                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2637                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2638                 if (c->buf == NULL)
2639                         return -ENOMEM;
2640         }
2641
2642         idx = le32_to_cpu(c->log_le.idx);
2643
2644         /* Protect against corrupt value */
2645         if (idx > c->bufsize)
2646                 return -EBADE;
2647
2648         /* Skip reading the console buffer if the index pointer
2649          has not moved */
2650         if (idx == c->last)
2651                 return 0;
2652
2653         /* Read the console buffer */
2654         addr = le32_to_cpu(c->log_le.buf);
2655         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2656         if (rv < 0)
2657                 return rv;
2658
2659         while (c->last != idx) {
2660                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2661                         if (c->last == idx) {
2662                                 /* This would output a partial line.
2663                                  * Instead, back up
2664                                  * the buffer pointer and output this
2665                                  * line next time around.
2666                                  */
2667                                 if (c->last >= n)
2668                                         c->last -= n;
2669                                 else
2670                                         c->last = c->bufsize - n;
2671                                 goto break2;
2672                         }
2673                         ch = c->buf[c->last];
2674                         c->last = (c->last + 1) % c->bufsize;
2675                         if (ch == '\n')
2676                                 break;
2677                         line[n] = ch;
2678                 }
2679
2680                 if (n > 0) {
2681                         if (line[n - 1] == '\r')
2682                                 n--;
2683                         line[n] = 0;
2684                         pr_debug("CONSOLE: %s\n", line);
2685                 }
2686         }
2687 break2:
2688
2689         return 0;
2690 }
2691 #endif                          /* DEBUG */
2692
2693 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2694 {
2695         int i;
2696         int ret;
2697
2698         bus->ctrl_frame_stat = false;
2699         ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2700
2701         if (ret < 0) {
2702                 /* On failure, abort the command and terminate the frame */
2703                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2704                           ret);
2705                 bus->sdcnt.tx_sderrs++;
2706
2707                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2708
2709                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2710                                   SFC_WF_TERM, NULL);
2711                 bus->sdcnt.f1regdata++;
2712
2713                 for (i = 0; i < 3; i++) {
2714                         u8 hi, lo;
2715                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2716                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2717                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2718                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2719                         bus->sdcnt.f1regdata += 2;
2720                         if (hi == 0 && lo == 0)
2721                                 break;
2722                 }
2723                 return ret;
2724         }
2725
2726         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2727
2728         return ret;
2729 }
2730
2731 static int
2732 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2733 {
2734         u8 *frame;
2735         u16 len, pad;
2736         uint retries = 0;
2737         u8 doff = 0;
2738         int ret = -1;
2739         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2740         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2741         struct brcmf_sdio *bus = sdiodev->bus;
2742         struct brcmf_sdio_hdrinfo hd_info = {0};
2743
2744         brcmf_dbg(TRACE, "Enter\n");
2745
2746         /* Back the pointer to make a room for bus header */
2747         frame = msg - bus->tx_hdrlen;
2748         len = (msglen += bus->tx_hdrlen);
2749
2750         /* Add alignment padding (optional for ctl frames) */
2751         doff = ((unsigned long)frame % bus->head_align);
2752         if (doff) {
2753                 frame -= doff;
2754                 len += doff;
2755                 msglen += doff;
2756                 memset(frame, 0, doff + bus->tx_hdrlen);
2757         }
2758         /* precondition: doff < bus->head_align */
2759         doff += bus->tx_hdrlen;
2760
2761         /* Round send length to next SDIO block */
2762         pad = 0;
2763         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2764                 pad = bus->blocksize - (len % bus->blocksize);
2765                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2766                         pad = 0;
2767         } else if (len % bus->head_align) {
2768                 pad = bus->head_align - (len % bus->head_align);
2769         }
2770         len += pad;
2771
2772         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2773
2774         /* Make sure backplane clock is on */
2775         sdio_claim_host(bus->sdiodev->func[1]);
2776         brcmf_sdio_bus_sleep(bus, false, false);
2777         sdio_release_host(bus->sdiodev->func[1]);
2778
2779         hd_info.len = (u16)msglen;
2780         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2781         hd_info.dat_offset = doff;
2782         hd_info.seq_num = bus->tx_seq;
2783         hd_info.lastfrm = true;
2784         hd_info.tail_pad = pad;
2785         brcmf_sdio_hdpack(bus, frame, &hd_info);
2786
2787         if (bus->txglom)
2788                 brcmf_sdio_update_hwhdr(frame, len);
2789
2790         if (!data_ok(bus)) {
2791                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2792                           bus->tx_max, bus->tx_seq);
2793                 bus->ctrl_frame_stat = true;
2794                 /* Send from dpc */
2795                 bus->ctrl_frame_buf = frame;
2796                 bus->ctrl_frame_len = len;
2797
2798                 wait_event_interruptible_timeout(bus->ctrl_wait,
2799                                                  !bus->ctrl_frame_stat,
2800                                                  msecs_to_jiffies(2000));
2801
2802                 if (!bus->ctrl_frame_stat) {
2803                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2804                         ret = 0;
2805                 } else {
2806                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2807                         ret = -1;
2808                 }
2809         }
2810
2811         if (ret == -1) {
2812                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2813                                    frame, len, "Tx Frame:\n");
2814                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2815                                    BRCMF_HDRS_ON(),
2816                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2817
2818                 do {
2819                         sdio_claim_host(bus->sdiodev->func[1]);
2820                         ret = brcmf_sdio_tx_frame(bus, frame, len);
2821                         sdio_release_host(bus->sdiodev->func[1]);
2822                 } while (ret < 0 && retries++ < TXRETRIES);
2823         }
2824
2825         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2826             atomic_read(&bus->dpc_tskcnt) == 0) {
2827                 bus->activity = false;
2828                 sdio_claim_host(bus->sdiodev->func[1]);
2829                 brcmf_dbg(INFO, "idle\n");
2830                 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2831                 sdio_release_host(bus->sdiodev->func[1]);
2832         }
2833
2834         if (ret)
2835                 bus->sdcnt.tx_ctlerrs++;
2836         else
2837                 bus->sdcnt.tx_ctlpkts++;
2838
2839         return ret ? -EIO : 0;
2840 }
2841
2842 #ifdef DEBUG
2843 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2844 {
2845         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2846 }
2847
2848 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2849                                  struct sdpcm_shared *sh)
2850 {
2851         u32 addr;
2852         int rv;
2853         u32 shaddr = 0;
2854         struct sdpcm_shared_le sh_le;
2855         __le32 addr_le;
2856
2857         shaddr = bus->ci->rambase + bus->ramsize - 4;
2858
2859         /*
2860          * Read last word in socram to determine
2861          * address of sdpcm_shared structure
2862          */
2863         sdio_claim_host(bus->sdiodev->func[1]);
2864         brcmf_sdio_bus_sleep(bus, false, false);
2865         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2866         sdio_release_host(bus->sdiodev->func[1]);
2867         if (rv < 0)
2868                 return rv;
2869
2870         addr = le32_to_cpu(addr_le);
2871
2872         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2873
2874         /*
2875          * Check if addr is valid.
2876          * NVRAM length at the end of memory should have been overwritten.
2877          */
2878         if (!brcmf_sdio_valid_shared_address(addr)) {
2879                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2880                                   addr);
2881                         return -EINVAL;
2882         }
2883
2884         /* Read hndrte_shared structure */
2885         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2886                                sizeof(struct sdpcm_shared_le));
2887         if (rv < 0)
2888                 return rv;
2889
2890         /* Endianness */
2891         sh->flags = le32_to_cpu(sh_le.flags);
2892         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2893         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2894         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2895         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2896         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2897         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2898
2899         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2900                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2901                           SDPCM_SHARED_VERSION,
2902                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2903                 return -EPROTO;
2904         }
2905
2906         return 0;
2907 }
2908
2909 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2910                                    struct sdpcm_shared *sh, char __user *data,
2911                                    size_t count)
2912 {
2913         u32 addr, console_ptr, console_size, console_index;
2914         char *conbuf = NULL;
2915         __le32 sh_val;
2916         int rv;
2917         loff_t pos = 0;
2918         int nbytes = 0;
2919
2920         /* obtain console information from device memory */
2921         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2922         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2923                                (u8 *)&sh_val, sizeof(u32));
2924         if (rv < 0)
2925                 return rv;
2926         console_ptr = le32_to_cpu(sh_val);
2927
2928         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2929         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2930                                (u8 *)&sh_val, sizeof(u32));
2931         if (rv < 0)
2932                 return rv;
2933         console_size = le32_to_cpu(sh_val);
2934
2935         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2936         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2937                                (u8 *)&sh_val, sizeof(u32));
2938         if (rv < 0)
2939                 return rv;
2940         console_index = le32_to_cpu(sh_val);
2941
2942         /* allocate buffer for console data */
2943         if (console_size <= CONSOLE_BUFFER_MAX)
2944                 conbuf = vzalloc(console_size+1);
2945
2946         if (!conbuf)
2947                 return -ENOMEM;
2948
2949         /* obtain the console data from device */
2950         conbuf[console_size] = '\0';
2951         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2952                                console_size);
2953         if (rv < 0)
2954                 goto done;
2955
2956         rv = simple_read_from_buffer(data, count, &pos,
2957                                      conbuf + console_index,
2958                                      console_size - console_index);
2959         if (rv < 0)
2960                 goto done;
2961
2962         nbytes = rv;
2963         if (console_index > 0) {
2964                 pos = 0;
2965                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2966                                              conbuf, console_index - 1);
2967                 if (rv < 0)
2968                         goto done;
2969                 rv += nbytes;
2970         }
2971 done:
2972         vfree(conbuf);
2973         return rv;
2974 }
2975
2976 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2977                                 char __user *data, size_t count)
2978 {
2979         int error, res;
2980         char buf[350];
2981         struct brcmf_trap_info tr;
2982         loff_t pos = 0;
2983
2984         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2985                 brcmf_dbg(INFO, "no trap in firmware\n");
2986                 return 0;
2987         }
2988
2989         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2990                                   sizeof(struct brcmf_trap_info));
2991         if (error < 0)
2992                 return error;
2993
2994         res = scnprintf(buf, sizeof(buf),
2995                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2996                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2997                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2998                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2999                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3000                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3001                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3002                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3003                         le32_to_cpu(tr.pc), sh->trap_addr,
3004                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3005                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3006                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3007                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3008
3009         return simple_read_from_buffer(data, count, &pos, buf, res);
3010 }
3011
3012 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3013                                   struct sdpcm_shared *sh, char __user *data,
3014                                   size_t count)
3015 {
3016         int error = 0;
3017         char buf[200];
3018         char file[80] = "?";
3019         char expr[80] = "<???>";
3020         int res;
3021         loff_t pos = 0;
3022
3023         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3024                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3025                 return 0;
3026         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3027                 brcmf_dbg(INFO, "no assert in dongle\n");
3028                 return 0;
3029         }
3030
3031         sdio_claim_host(bus->sdiodev->func[1]);
3032         if (sh->assert_file_addr != 0) {
3033                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3034                                           sh->assert_file_addr, (u8 *)file, 80);
3035                 if (error < 0)
3036                         return error;
3037         }
3038         if (sh->assert_exp_addr != 0) {
3039                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3040                                           sh->assert_exp_addr, (u8 *)expr, 80);
3041                 if (error < 0)
3042                         return error;
3043         }
3044         sdio_release_host(bus->sdiodev->func[1]);
3045
3046         res = scnprintf(buf, sizeof(buf),
3047                         "dongle assert: %s:%d: assert(%s)\n",
3048                         file, sh->assert_line, expr);
3049         return simple_read_from_buffer(data, count, &pos, buf, res);
3050 }
3051
3052 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3053 {
3054         int error;
3055         struct sdpcm_shared sh;
3056
3057         error = brcmf_sdio_readshared(bus, &sh);
3058
3059         if (error < 0)
3060                 return error;
3061
3062         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3063                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3064         else if (sh.flags & SDPCM_SHARED_ASSERT)
3065                 brcmf_err("assertion in dongle\n");
3066
3067         if (sh.flags & SDPCM_SHARED_TRAP)
3068                 brcmf_err("firmware trap in dongle\n");
3069
3070         return 0;
3071 }
3072
3073 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3074                                 size_t count, loff_t *ppos)
3075 {
3076         int error = 0;
3077         struct sdpcm_shared sh;
3078         int nbytes = 0;
3079         loff_t pos = *ppos;
3080
3081         if (pos != 0)
3082                 return 0;
3083
3084         error = brcmf_sdio_readshared(bus, &sh);
3085         if (error < 0)
3086                 goto done;
3087
3088         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3089         if (error < 0)
3090                 goto done;
3091         nbytes = error;
3092
3093         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3094         if (error < 0)
3095                 goto done;
3096         nbytes += error;
3097
3098         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3099         if (error < 0)
3100                 goto done;
3101         nbytes += error;
3102
3103         error = nbytes;
3104         *ppos += nbytes;
3105 done:
3106         return error;
3107 }
3108
3109 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3110                                         size_t count, loff_t *ppos)
3111 {
3112         struct brcmf_sdio *bus = f->private_data;
3113         int res;
3114
3115         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3116         if (res > 0)
3117                 *ppos += res;
3118         return (ssize_t)res;
3119 }
3120
3121 static const struct file_operations brcmf_sdio_forensic_ops = {
3122         .owner = THIS_MODULE,
3123         .open = simple_open,
3124         .read = brcmf_sdio_forensic_read
3125 };
3126
3127 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3128 {
3129         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3130         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3131
3132         if (IS_ERR_OR_NULL(dentry))
3133                 return;
3134
3135         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3136                             &brcmf_sdio_forensic_ops);
3137         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3138 }
3139 #else
3140 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3141 {
3142         return 0;
3143 }
3144
3145 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3146 {
3147 }
3148 #endif /* DEBUG */
3149
3150 static int
3151 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3152 {
3153         int timeleft;
3154         uint rxlen = 0;
3155         bool pending;
3156         u8 *buf;
3157         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3158         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3159         struct brcmf_sdio *bus = sdiodev->bus;
3160
3161         brcmf_dbg(TRACE, "Enter\n");
3162
3163         /* Wait until control frame is available */
3164         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3165
3166         spin_lock_bh(&bus->rxctl_lock);
3167         rxlen = bus->rxlen;
3168         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3169         bus->rxctl = NULL;
3170         buf = bus->rxctl_orig;
3171         bus->rxctl_orig = NULL;
3172         bus->rxlen = 0;
3173         spin_unlock_bh(&bus->rxctl_lock);
3174         vfree(buf);
3175
3176         if (rxlen) {
3177                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3178                           rxlen, msglen);
3179         } else if (timeleft == 0) {
3180                 brcmf_err("resumed on timeout\n");
3181                 brcmf_sdio_checkdied(bus);
3182         } else if (pending) {
3183                 brcmf_dbg(CTL, "cancelled\n");
3184                 return -ERESTARTSYS;
3185         } else {
3186                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3187                 brcmf_sdio_checkdied(bus);
3188         }
3189
3190         if (rxlen)
3191                 bus->sdcnt.rx_ctlpkts++;
3192         else
3193                 bus->sdcnt.rx_ctlerrs++;
3194
3195         return rxlen ? (int)rxlen : -ETIMEDOUT;
3196 }
3197
3198 static bool brcmf_sdio_download_state(struct brcmf_sdio *bus, bool enter)
3199 {
3200         struct chip_info *ci = bus->ci;
3201
3202         /* To enter download state, disable ARM and reset SOCRAM.
3203          * To exit download state, simply reset ARM (default is RAM boot).
3204          */
3205         if (enter) {
3206                 bus->alp_only = true;
3207
3208                 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3209         } else {
3210                 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3211                                                    bus->varsz))
3212                         return false;
3213
3214                 /* Allow HT Clock now that the ARM is running. */
3215                 bus->alp_only = false;
3216
3217                 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3218         }
3219
3220         return true;
3221 }
3222
3223 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus)
3224 {
3225         const struct firmware *fw;
3226         int err;
3227         int offset;
3228         int address;
3229         int len;
3230
3231         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3232         if (fw == NULL)
3233                 return -ENOENT;
3234
3235         if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3236             BRCMF_MAX_CORENUM)
3237                 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3238
3239         err = 0;
3240         offset = 0;
3241         address = bus->ci->rambase;
3242         while (offset < fw->size) {
3243                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3244                       fw->size - offset;
3245                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3246                                         (u8 *)&fw->data[offset], len);
3247                 if (err) {
3248                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3249                                   err, len, address);
3250                         goto failure;
3251                 }
3252                 offset += len;
3253                 address += len;
3254         }
3255
3256 failure:
3257         release_firmware(fw);
3258
3259         return err;
3260 }
3261
3262 /*
3263  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3264  * and ending in a NUL.
3265  * Removes carriage returns, empty lines, comment lines, and converts
3266  * newlines to NULs.
3267  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
3268  * by two NULs.
3269 */
3270
3271 static int brcmf_sdio_strip_nvram(struct brcmf_sdio *bus,
3272                                   const struct firmware *nv)
3273 {
3274         char *varbuf;
3275         char *dp;
3276         bool findNewline;
3277         int column;
3278         int ret = 0;
3279         uint buf_len, n, len;
3280
3281         len = nv->size;
3282         varbuf = vmalloc(len);
3283         if (!varbuf)
3284                 return -ENOMEM;
3285
3286         memcpy(varbuf, nv->data, len);
3287         dp = varbuf;
3288
3289         findNewline = false;
3290         column = 0;
3291
3292         for (n = 0; n < len; n++) {
3293                 if (varbuf[n] == 0)
3294                         break;
3295                 if (varbuf[n] == '\r')
3296                         continue;
3297                 if (findNewline && varbuf[n] != '\n')
3298                         continue;
3299                 findNewline = false;
3300                 if (varbuf[n] == '#') {
3301                         findNewline = true;
3302                         continue;
3303                 }
3304                 if (varbuf[n] == '\n') {
3305                         if (column == 0)
3306                                 continue;
3307                         *dp++ = 0;
3308                         column = 0;
3309                         continue;
3310                 }
3311                 *dp++ = varbuf[n];
3312                 column++;
3313         }
3314         buf_len = dp - varbuf;
3315         while (dp < varbuf + n)
3316                 *dp++ = 0;
3317
3318         kfree(bus->vars);
3319         /* roundup needed for download to device */
3320         bus->varsz = roundup(buf_len + 1, 4);
3321         bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3322         if (bus->vars == NULL) {
3323                 bus->varsz = 0;
3324                 ret = -ENOMEM;
3325                 goto err;
3326         }
3327
3328         /* copy the processed variables and add null termination */
3329         memcpy(bus->vars, varbuf, buf_len);
3330         bus->vars[buf_len] = 0;
3331 err:
3332         vfree(varbuf);
3333         return ret;
3334 }
3335
3336 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus)
3337 {
3338         const struct firmware *nv;
3339         int ret;
3340
3341         nv = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3342         if (nv == NULL)
3343                 return -ENOENT;
3344
3345         ret = brcmf_sdio_strip_nvram(bus, nv);
3346
3347         release_firmware(nv);
3348
3349         return ret;
3350 }
3351
3352 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3353 {
3354         int bcmerror = -EFAULT;
3355
3356
3357         sdio_claim_host(bus->sdiodev->func[1]);
3358         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3359
3360         /* Keep arm in reset */
3361         if (!brcmf_sdio_download_state(bus, true)) {
3362                 brcmf_err("error placing ARM core in reset\n");
3363                 goto err;
3364         }
3365
3366         if (brcmf_sdio_download_code_file(bus)) {
3367                 brcmf_err("dongle image file download failed\n");
3368                 goto err;
3369         }
3370
3371         if (brcmf_sdio_download_nvram(bus)) {
3372                 brcmf_err("dongle nvram file download failed\n");
3373                 goto err;
3374         }
3375
3376         /* Take arm out of reset */
3377         if (!brcmf_sdio_download_state(bus, false)) {
3378                 brcmf_err("error getting out of ARM core reset\n");
3379                 goto err;
3380         }
3381
3382         bcmerror = 0;
3383
3384 err:
3385         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3386         sdio_release_host(bus->sdiodev->func[1]);
3387         return bcmerror;
3388 }
3389
3390 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3391 {
3392         u32 addr, reg, pmu_cc3_mask = ~0;
3393         int err;
3394
3395         brcmf_dbg(TRACE, "Enter\n");
3396
3397         /* old chips with PMU version less than 17 don't support save restore */
3398         if (bus->ci->pmurev < 17)
3399                 return false;
3400
3401         switch (bus->ci->chip) {
3402         case BCM43241_CHIP_ID:
3403         case BCM4335_CHIP_ID:
3404         case BCM4339_CHIP_ID:
3405                 /* read PMU chipcontrol register 3 */
3406                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3407                 brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3408                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3409                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3410                 return (reg & pmu_cc3_mask) != 0;
3411         default:
3412                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext);
3413                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err);
3414                 if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
3415                         return false;
3416
3417                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl);
3418                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3419                 return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
3420                                PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
3421         }
3422 }
3423
3424 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3425 {
3426         int err = 0;
3427         u8 val;
3428
3429         brcmf_dbg(TRACE, "Enter\n");
3430
3431         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3432         if (err) {
3433                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3434                 return;
3435         }
3436
3437         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3438         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3439         if (err) {
3440                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3441                 return;
3442         }
3443
3444         /* Add CMD14 Support */
3445         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3446                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3447                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3448                           &err);
3449         if (err) {
3450                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3451                 return;
3452         }
3453
3454         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3455                           SBSDIO_FORCE_HT, &err);
3456         if (err) {
3457                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3458                 return;
3459         }
3460
3461         /* set flag */
3462         bus->sr_enabled = true;
3463         brcmf_dbg(INFO, "SR enabled\n");
3464 }
3465
3466 /* enable KSO bit */
3467 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3468 {
3469         u8 val;
3470         int err = 0;
3471
3472         brcmf_dbg(TRACE, "Enter\n");
3473
3474         /* KSO bit added in SDIO core rev 12 */
3475         if (bus->ci->c_inf[1].rev < 12)
3476                 return 0;
3477
3478         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3479         if (err) {
3480                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3481                 return err;
3482         }
3483
3484         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3485                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3486                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3487                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3488                                   val, &err);
3489                 if (err) {
3490                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3491                         return err;
3492                 }
3493         }
3494
3495         return 0;
3496 }
3497
3498
3499 static int brcmf_sdio_bus_preinit(struct device *dev)
3500 {
3501         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3502         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3503         struct brcmf_sdio *bus = sdiodev->bus;
3504         uint pad_size;
3505         u32 value;
3506         u8 idx;
3507         int err;
3508
3509         /* the commands below use the terms tx and rx from
3510          * a device perspective, ie. bus:txglom affects the
3511          * bus transfers from device to host.
3512          */
3513         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3514         if (bus->ci->c_inf[idx].rev < 12) {
3515                 /* for sdio core rev < 12, disable txgloming */
3516                 value = 0;
3517                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3518                                            sizeof(u32));
3519         } else {
3520                 /* otherwise, set txglomalign */
3521                 value = 4;
3522                 if (sdiodev->pdata)
3523                         value = sdiodev->pdata->sd_sgentry_align;
3524                 /* SDIO ADMA requires at least 32 bit alignment */
3525                 value = max_t(u32, value, 4);
3526                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3527                                            sizeof(u32));
3528         }
3529
3530         if (err < 0)
3531                 goto done;
3532
3533         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3534         if (sdiodev->sg_support) {
3535                 bus->txglom = false;
3536                 value = 1;
3537                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3538                 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3539                 if (!bus->txglom_sgpad)
3540                         brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3541
3542                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3543                                            &value, sizeof(u32));
3544                 if (err < 0) {
3545                         /* bus:rxglom is allowed to fail */
3546                         err = 0;
3547                 } else {
3548                         bus->txglom = true;
3549                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3550                 }
3551         }
3552         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3553
3554 done:
3555         return err;
3556 }
3557
3558 static int brcmf_sdio_bus_init(struct device *dev)
3559 {
3560         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3561         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3562         struct brcmf_sdio *bus = sdiodev->bus;
3563         int err, ret = 0;
3564         u8 saveclk;
3565
3566         brcmf_dbg(TRACE, "Enter\n");
3567
3568         /* try to download image and nvram to the dongle */
3569         if (bus_if->state == BRCMF_BUS_DOWN) {
3570                 err = brcmf_sdio_download_firmware(bus);
3571                 if (err)
3572                         return err;
3573         }
3574
3575         if (!bus->sdiodev->bus_if->drvr)
3576                 return 0;
3577
3578         /* Start the watchdog timer */
3579         bus->sdcnt.tickcnt = 0;
3580         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3581
3582         sdio_claim_host(bus->sdiodev->func[1]);
3583
3584         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3585         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3586         if (bus->clkstate != CLK_AVAIL)
3587                 goto exit;
3588
3589         /* Force clocks on backplane to be sure F2 interrupt propagates */
3590         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3591                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3592         if (!err) {
3593                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3594                                   (saveclk | SBSDIO_FORCE_HT), &err);
3595         }
3596         if (err) {
3597                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3598                 goto exit;
3599         }
3600
3601         /* Enable function 2 (frame transfers) */
3602         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3603                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3604         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3605
3606
3607         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3608
3609         /* If F2 successfully enabled, set core and enable interrupts */
3610         if (!err) {
3611                 /* Set up the interrupt mask and enable interrupts */
3612                 bus->hostintmask = HOSTINTMASK;
3613                 w_sdreg32(bus, bus->hostintmask,
3614                           offsetof(struct sdpcmd_regs, hostintmask));
3615
3616                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3617         } else {
3618                 /* Disable F2 again */
3619                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3620                 ret = -ENODEV;
3621         }
3622
3623         if (brcmf_sdio_sr_capable(bus)) {
3624                 brcmf_sdio_sr_init(bus);
3625         } else {
3626                 /* Restore previous clock setting */
3627                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3628                                   saveclk, &err);
3629         }
3630
3631         if (ret == 0) {
3632                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3633                 if (ret != 0)
3634                         brcmf_err("intr register failed:%d\n", ret);
3635         }
3636
3637         /* If we didn't come up, turn off backplane clock */
3638         if (ret != 0)
3639                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3640
3641 exit:
3642         sdio_release_host(bus->sdiodev->func[1]);
3643
3644         return ret;
3645 }
3646
3647 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3648 {
3649         brcmf_dbg(TRACE, "Enter\n");
3650
3651         if (!bus) {
3652                 brcmf_err("bus is null pointer, exiting\n");
3653                 return;
3654         }
3655
3656         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3657                 brcmf_err("bus is down. we have nothing to do\n");
3658                 return;
3659         }
3660         /* Count the interrupt call */
3661         bus->sdcnt.intrcount++;
3662         if (in_interrupt())
3663                 atomic_set(&bus->ipend, 1);
3664         else
3665                 if (brcmf_sdio_intr_rstatus(bus)) {
3666                         brcmf_err("failed backplane access\n");
3667                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3668                 }
3669
3670         /* Disable additional interrupts (is this needed now)? */
3671         if (!bus->intr)
3672                 brcmf_err("isr w/o interrupt configured!\n");
3673
3674         atomic_inc(&bus->dpc_tskcnt);
3675         queue_work(bus->brcmf_wq, &bus->datawork);
3676 }
3677
3678 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3679 {
3680 #ifdef DEBUG
3681         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3682 #endif  /* DEBUG */
3683
3684         brcmf_dbg(TIMER, "Enter\n");
3685
3686         /* Poll period: check device if appropriate. */
3687         if (!bus->sr_enabled &&
3688             bus->poll && (++bus->polltick >= bus->pollrate)) {
3689                 u32 intstatus = 0;
3690
3691                 /* Reset poll tick */
3692                 bus->polltick = 0;
3693
3694                 /* Check device if no interrupts */
3695                 if (!bus->intr ||
3696                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3697
3698                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3699                                 u8 devpend;
3700
3701                                 sdio_claim_host(bus->sdiodev->func[1]);
3702                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3703                                                             SDIO_CCCR_INTx,
3704                                                             NULL);
3705                                 sdio_release_host(bus->sdiodev->func[1]);
3706                                 intstatus =
3707                                     devpend & (INTR_STATUS_FUNC1 |
3708                                                INTR_STATUS_FUNC2);
3709                         }
3710
3711                         /* If there is something, make like the ISR and
3712                                  schedule the DPC */
3713                         if (intstatus) {
3714                                 bus->sdcnt.pollcnt++;
3715                                 atomic_set(&bus->ipend, 1);
3716
3717                                 atomic_inc(&bus->dpc_tskcnt);
3718                                 queue_work(bus->brcmf_wq, &bus->datawork);
3719                         }
3720                 }
3721
3722                 /* Update interrupt tracking */
3723                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3724         }
3725 #ifdef DEBUG
3726         /* Poll for console output periodically */
3727         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3728             bus->console_interval != 0) {
3729                 bus->console.count += BRCMF_WD_POLL_MS;
3730                 if (bus->console.count >= bus->console_interval) {
3731                         bus->console.count -= bus->console_interval;
3732                         sdio_claim_host(bus->sdiodev->func[1]);
3733                         /* Make sure backplane clock is on */
3734                         brcmf_sdio_bus_sleep(bus, false, false);
3735                         if (brcmf_sdio_readconsole(bus) < 0)
3736                                 /* stop on error */
3737                                 bus->console_interval = 0;
3738                         sdio_release_host(bus->sdiodev->func[1]);
3739                 }
3740         }
3741 #endif                          /* DEBUG */
3742
3743         /* On idle timeout clear activity flag and/or turn off clock */
3744         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3745                 if (++bus->idlecount >= bus->idletime) {
3746                         bus->idlecount = 0;
3747                         if (bus->activity) {
3748                                 bus->activity = false;
3749                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3750                         } else {
3751                                 brcmf_dbg(SDIO, "idle\n");
3752                                 sdio_claim_host(bus->sdiodev->func[1]);
3753                                 brcmf_sdio_bus_sleep(bus, true, false);
3754                                 sdio_release_host(bus->sdiodev->func[1]);
3755                         }
3756                 }
3757         }
3758
3759         return (atomic_read(&bus->ipend) > 0);
3760 }
3761
3762 static void brcmf_sdio_dataworker(struct work_struct *work)
3763 {
3764         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3765                                               datawork);
3766
3767         while (atomic_read(&bus->dpc_tskcnt)) {
3768                 brcmf_sdio_dpc(bus);
3769                 atomic_dec(&bus->dpc_tskcnt);
3770         }
3771 }
3772
3773 static bool
3774 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3775 {
3776         u8 clkctl = 0;
3777         int err = 0;
3778         int reg_addr;
3779         u32 reg_val;
3780         u32 drivestrength;
3781
3782         bus->alp_only = true;
3783
3784         sdio_claim_host(bus->sdiodev->func[1]);
3785
3786         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3787                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3788
3789         /*
3790          * Force PLL off until brcmf_sdio_chip_attach()
3791          * programs PLL control regs
3792          */
3793
3794         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3795                           BRCMF_INIT_CLKCTL1, &err);
3796         if (!err)
3797                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3798                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3799
3800         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3801                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3802                           err, BRCMF_INIT_CLKCTL1, clkctl);
3803                 goto fail;
3804         }
3805
3806         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3807                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3808                 goto fail;
3809         }
3810
3811         if (brcmf_sdio_kso_init(bus)) {
3812                 brcmf_err("error enabling KSO\n");
3813                 goto fail;
3814         }
3815
3816         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3817                 drivestrength = bus->sdiodev->pdata->drive_strength;
3818         else
3819                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3820         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3821
3822         /* Get info on the SOCRAM cores... */
3823         bus->ramsize = bus->ci->ramsize;
3824         if (!(bus->ramsize)) {
3825                 brcmf_err("failed to find SOCRAM memory!\n");
3826                 goto fail;
3827         }
3828
3829         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3830         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3831                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3832         if (err)
3833                 goto fail;
3834
3835         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3836
3837         brcmf_sdiod_regwb(bus->sdiodev,
3838                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3839         if (err)
3840                 goto fail;
3841
3842         /* set PMUControl so a backplane reset does PMU state reload */
3843         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3844                                pmucontrol);
3845         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3846                                     reg_addr,
3847                                     &err);
3848         if (err)
3849                 goto fail;
3850
3851         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3852
3853         brcmf_sdiod_regwl(bus->sdiodev,
3854                           reg_addr,
3855                           reg_val,
3856                           &err);
3857         if (err)
3858                 goto fail;
3859
3860
3861         sdio_release_host(bus->sdiodev->func[1]);
3862
3863         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3864
3865         /* allocate header buffer */
3866         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3867         if (!bus->hdrbuf)
3868                 return false;
3869         /* Locate an appropriately-aligned portion of hdrbuf */
3870         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3871                                     bus->head_align);
3872
3873         /* Set the poll and/or interrupt flags */
3874         bus->intr = true;
3875         bus->poll = false;
3876         if (bus->poll)
3877                 bus->pollrate = 1;
3878
3879         return true;
3880
3881 fail:
3882         sdio_release_host(bus->sdiodev->func[1]);
3883         return false;
3884 }
3885
3886 static int
3887 brcmf_sdio_watchdog_thread(void *data)
3888 {
3889         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3890
3891         allow_signal(SIGTERM);
3892         /* Run until signal received */
3893         while (1) {
3894                 if (kthread_should_stop())
3895                         break;
3896                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3897                         brcmf_sdio_bus_watchdog(bus);
3898                         /* Count the tick for reference */
3899                         bus->sdcnt.tickcnt++;
3900                 } else
3901                         break;
3902         }
3903         return 0;
3904 }
3905
3906 static void
3907 brcmf_sdio_watchdog(unsigned long data)
3908 {
3909         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3910
3911         if (bus->watchdog_tsk) {
3912                 complete(&bus->watchdog_wait);
3913                 /* Reschedule the watchdog */
3914                 if (bus->wd_timer_valid)
3915                         mod_timer(&bus->timer,
3916                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3917         }
3918 }
3919
3920 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3921         .stop = brcmf_sdio_bus_stop,
3922         .preinit = brcmf_sdio_bus_preinit,
3923         .init = brcmf_sdio_bus_init,
3924         .txdata = brcmf_sdio_bus_txdata,
3925         .txctl = brcmf_sdio_bus_txctl,
3926         .rxctl = brcmf_sdio_bus_rxctl,
3927         .gettxq = brcmf_sdio_bus_gettxq,
3928 };
3929
3930 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3931 {
3932         int ret;
3933         struct brcmf_sdio *bus;
3934
3935         brcmf_dbg(TRACE, "Enter\n");
3936
3937         /* Allocate private bus interface state */
3938         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3939         if (!bus)
3940                 goto fail;
3941
3942         bus->sdiodev = sdiodev;
3943         sdiodev->bus = bus;
3944         skb_queue_head_init(&bus->glom);
3945         bus->txbound = BRCMF_TXBOUND;
3946         bus->rxbound = BRCMF_RXBOUND;
3947         bus->txminmax = BRCMF_TXMINMAX;
3948         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3949
3950         /* platform specific configuration:
3951          *   alignments must be at least 4 bytes for ADMA
3952          */
3953         bus->head_align = ALIGNMENT;
3954         bus->sgentry_align = ALIGNMENT;
3955         if (sdiodev->pdata) {
3956                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
3957                         bus->head_align = sdiodev->pdata->sd_head_align;
3958                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
3959                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
3960         }
3961
3962         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3963         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3964         if (bus->brcmf_wq == NULL) {
3965                 brcmf_err("insufficient memory to create txworkqueue\n");
3966                 goto fail;
3967         }
3968
3969         /* attempt to attach to the dongle */
3970         if (!(brcmf_sdio_probe_attach(bus))) {
3971                 brcmf_err("brcmf_sdio_probe_attach failed\n");
3972                 goto fail;
3973         }
3974
3975         spin_lock_init(&bus->rxctl_lock);
3976         spin_lock_init(&bus->txqlock);
3977         init_waitqueue_head(&bus->ctrl_wait);
3978         init_waitqueue_head(&bus->dcmd_resp_wait);
3979
3980         /* Set up the watchdog timer */
3981         init_timer(&bus->timer);
3982         bus->timer.data = (unsigned long)bus;
3983         bus->timer.function = brcmf_sdio_watchdog;
3984
3985         /* Initialize watchdog thread */
3986         init_completion(&bus->watchdog_wait);
3987         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
3988                                         bus, "brcmf_watchdog");
3989         if (IS_ERR(bus->watchdog_tsk)) {
3990                 pr_warn("brcmf_watchdog thread failed to start\n");
3991                 bus->watchdog_tsk = NULL;
3992         }
3993         /* Initialize DPC thread */
3994         atomic_set(&bus->dpc_tskcnt, 0);
3995
3996         /* Assign bus interface call back */
3997         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3998         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3999         bus->sdiodev->bus_if->chip = bus->ci->chip;
4000         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4001
4002         /* default sdio bus header length for tx packet */
4003         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4004
4005         /* Attach to the common layer, reserve hdr space */
4006         ret = brcmf_attach(bus->sdiodev->dev);
4007         if (ret != 0) {
4008                 brcmf_err("brcmf_attach failed\n");
4009                 goto fail;
4010         }
4011
4012         /* Allocate buffers */
4013         if (bus->sdiodev->bus_if->maxctl) {
4014                 bus->rxblen =
4015                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4016                             ALIGNMENT) + bus->head_align;
4017                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4018                 if (!(bus->rxbuf)) {
4019                         brcmf_err("rxbuf allocation failed\n");
4020                         goto fail;
4021                 }
4022         }
4023
4024         sdio_claim_host(bus->sdiodev->func[1]);
4025
4026         /* Disable F2 to clear any intermediate frame state on the dongle */
4027         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4028
4029         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
4030         bus->rxflow = false;
4031
4032         /* Done with backplane-dependent accesses, can drop clock... */
4033         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4034
4035         sdio_release_host(bus->sdiodev->func[1]);
4036
4037         /* ...and initialize clock/power states */
4038         bus->clkstate = CLK_SDONLY;
4039         bus->idletime = BRCMF_IDLE_INTERVAL;
4040         bus->idleclock = BRCMF_IDLE_ACTIVE;
4041
4042         /* Query the F2 block size, set roundup accordingly */
4043         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4044         bus->roundup = min(max_roundup, bus->blocksize);
4045
4046         /* SR state */
4047         bus->sleeping = false;
4048         bus->sr_enabled = false;
4049
4050         brcmf_sdio_debugfs_create(bus);
4051         brcmf_dbg(INFO, "completed!!\n");
4052
4053         /* if firmware path present try to download and bring up bus */
4054         ret = brcmf_bus_start(bus->sdiodev->dev);
4055         if (ret != 0) {
4056                 brcmf_err("dongle is not responding\n");
4057                 goto fail;
4058         }
4059
4060         return bus;
4061
4062 fail:
4063         brcmf_sdio_remove(bus);
4064         return NULL;
4065 }
4066
4067 /* Detach and free everything */
4068 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4069 {
4070         brcmf_dbg(TRACE, "Enter\n");
4071
4072         if (bus) {
4073                 /* De-register interrupt handler */
4074                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4075
4076                 cancel_work_sync(&bus->datawork);
4077                 if (bus->brcmf_wq)
4078                         destroy_workqueue(bus->brcmf_wq);
4079
4080                 if (bus->sdiodev->bus_if->drvr) {
4081                         brcmf_detach(bus->sdiodev->dev);
4082                 }
4083
4084                 if (bus->ci) {
4085                         sdio_claim_host(bus->sdiodev->func[1]);
4086                         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4087                         brcmf_sdio_clkctl(bus, CLK_NONE, false);
4088                         sdio_release_host(bus->sdiodev->func[1]);
4089                         brcmf_sdio_chip_detach(&bus->ci);
4090                 }
4091
4092                 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4093                 kfree(bus->rxbuf);
4094                 kfree(bus->hdrbuf);
4095                 kfree(bus->vars);
4096                 kfree(bus);
4097         }
4098
4099         brcmf_dbg(TRACE, "Disconnected\n");
4100 }
4101
4102 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4103 {
4104         /* Totally stop the timer */
4105         if (!wdtick && bus->wd_timer_valid) {
4106                 del_timer_sync(&bus->timer);
4107                 bus->wd_timer_valid = false;
4108                 bus->save_ms = wdtick;
4109                 return;
4110         }
4111
4112         /* don't start the wd until fw is loaded */
4113         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4114                 return;
4115
4116         if (wdtick) {
4117                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4118                         if (bus->wd_timer_valid)
4119                                 /* Stop timer and restart at new value */
4120                                 del_timer_sync(&bus->timer);
4121
4122                         /* Create timer again when watchdog period is
4123                            dynamically changed or in the first instance
4124                          */
4125                         bus->timer.expires =
4126                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4127                         add_timer(&bus->timer);
4128
4129                 } else {
4130                         /* Re arm the timer, at last watchdog period */
4131                         mod_timer(&bus->timer,
4132                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4133                 }
4134
4135                 bus->wd_timer_valid = true;
4136                 bus->save_ms = wdtick;
4137         }
4138 }