Pileus Git - ~andy/linux/blob - drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44
  45 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  46
  47 #ifdef DEBUG
  48
  49 #define BRCMF_TRAP_INFO_SIZE    80
  50
  51 #define CBUF_LEN        (128)
  52
  53 /* Device console log buffer state */
  54 #define CONSOLE_BUFFER_MAX      2024
  55
  56 struct rte_log_le {
  57         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  58         __le32 buf_size;
  59         __le32 idx;
  60         char *_buf_compat;      /* Redundant pointer for backward compat. */
  61 };
  62
  63 struct rte_console {
  64         /* Virtual UART
  65          * When there is no UART (e.g. Quickturn),
  66          * the host should write a complete
  67          * input line directly into cbuf and then write
  68          * the length into vcons_in.
  69          * This may also be used when there is a real UART
  70          * (at risk of conflicting with
  71          * the real UART).  vcons_out is currently unused.
  72          */
  73         uint vcons_in;
  74         uint vcons_out;
  75
  76         /* Output (logging) buffer
  77          * Console output is written to a ring buffer log_buf at index log_idx.
  78          * The host may read the output when it sees log_idx advance.
  79          * Output will be lost if the output wraps around faster than the host
  80          * polls.
  81          */
  82         struct rte_log_le log_le;
  83
  84         /* Console input line buffer
  85          * Characters are read one at a time into cbuf
  86          * until <CR> is received, then
  87          * the buffer is processed as a command line.
  88          * Also used for virtual UART.
  89          */
  90         uint cbuf_idx;
  91         char cbuf[CBUF_LEN];
  92 };
  93
  94 #endif                          /* DEBUG */
  95 #include <chipcommon.h>
  96
  97 #include "dhd_bus.h"
  98 #include "dhd_dbg.h"
  99 #include "tracepoint.h"
 100
 101 #define TXQLEN          2048    /* bulk tx queue length */
 102 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 103 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 104 #define PRIOMASK        7
 105
 106 #define TXRETRIES       2       /* # of retries for tx frames */
 107
 108 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 109                                  one scheduling */
 110
 111 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 112                                  one scheduling */
 113
 114 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 /* intstatus */
 159 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 160 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 161 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 162 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 163 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 164 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 165 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 166 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 167 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 168 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 169 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 170 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 171 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 172 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 173 #define I_PC            (1 << 10)       /* descriptor error */
 174 #define I_PD            (1 << 11)       /* data error */
 175 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 176 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 177 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 178 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 179 #define I_RI            (1 << 16)       /* Receive Interrupt */
 180 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 181 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 182 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 183 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 184 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 185 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 186 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 187 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 188 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 189 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 190 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 191 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 192
 193 /* corecontrol */
 194 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 195 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 196 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 197 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 198 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 199 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 200
 201 /* SDA_FRAMECTRL */
 202 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 203 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 204 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 205 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 206
 207 /*
 208  * Software allocation of To SB Mailbox resources
 209  */
 210
 211 /* tosbmailbox bits corresponding to intstatus bits */
 212 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 213 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 214 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 215 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 216
 217 /* tosbmailboxdata */
 218 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 219
 220 /*
 221  * Software allocation of To Host Mailbox resources
 222  */
 223
 224 /* intstatus bits */
 225 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 226 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 227 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 228 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 229
 230 /* tohostmailboxdata */
 231 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 232 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 233 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 234 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 235
 236 #define HMB_DATA_FCDATA_MASK    0xff000000
 237 #define HMB_DATA_FCDATA_SHIFT   24
 238
 239 #define HMB_DATA_VERSION_MASK   0x00ff0000
 240 #define HMB_DATA_VERSION_SHIFT  16
 241
 242 /*
 243  * Software-defined protocol header
 244  */
 245
 246 /* Current protocol version */
 247 #define SDPCM_PROT_VERSION      4
 248
 249 /*
 250  * Shared structure between dongle and the host.
 251  * The structure contains pointers to trap or assert information.
 252  */
 253 #define SDPCM_SHARED_VERSION       0x0003
 254 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 255 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 256 #define SDPCM_SHARED_ASSERT        0x0200
 257 #define SDPCM_SHARED_TRAP          0x0400
 258
 259 /* Space for header read, limit for data packets */
 260 #define MAX_HDR_READ    (1 << 6)
 261 #define MAX_RX_DATASZ   2048
 262
 263 /* Bump up limit on waiting for HT to account for first startup;
 264  * if the image is doing a CRC calculation before programming the PMU
 265  * for HT availability, it could take a couple hundred ms more, so
 266  * max out at a 1 second (1000000us).
 267  */
 268 #undef PMU_MAX_TRANSITION_DLY
 269 #define PMU_MAX_TRANSITION_DLY 1000000
 270
 271 /* Value for ChipClockCSR during initial setup */
 272 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 273                                         SBSDIO_ALP_AVAIL_REQ)
 274
 275 /* Flags for SDH calls */
 276 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 277
 278 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 279 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 280                                          * when idle
 281                                          */
 282 #define BRCMF_IDLE_INTERVAL     1
 283
 284 #define KSO_WAIT_US 50
 285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 286
 287 /*
 288  * Conversion of 802.1D priority to precedence level
 289  */
 290 static uint prio2prec(u32 prio)
 291 {
 292         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 293                (prio^2) : prio;
 294 }
 295
 296 #ifdef DEBUG
 297 /* Device console log buffer state */
 298 struct brcmf_console {
 299         uint count;             /* Poll interval msec counter */
 300         uint log_addr;          /* Log struct address (fixed) */
 301         struct rte_log_le log_le;       /* Log struct (host copy) */
 302         uint bufsize;           /* Size of log buffer */
 303         u8 *buf;                /* Log buffer (host copy) */
 304         uint last;              /* Last buffer read index */
 305 };
 306
 307 struct brcmf_trap_info {
 308         __le32          type;
 309         __le32          epc;
 310         __le32          cpsr;
 311         __le32          spsr;
 312         __le32          r0;     /* a1 */
 313         __le32          r1;     /* a2 */
 314         __le32          r2;     /* a3 */
 315         __le32          r3;     /* a4 */
 316         __le32          r4;     /* v1 */
 317         __le32          r5;     /* v2 */
 318         __le32          r6;     /* v3 */
 319         __le32          r7;     /* v4 */
 320         __le32          r8;     /* v5 */
 321         __le32          r9;     /* sb/v6 */
 322         __le32          r10;    /* sl/v7 */
 323         __le32          r11;    /* fp/v8 */
 324         __le32          r12;    /* ip */
 325         __le32          r13;    /* sp */
 326         __le32          r14;    /* lr */
 327         __le32          pc;     /* r15 */
 328 };
 329 #endif                          /* DEBUG */
 330
 331 struct sdpcm_shared {
 332         u32 flags;
 333         u32 trap_addr;
 334         u32 assert_exp_addr;
 335         u32 assert_file_addr;
 336         u32 assert_line;
 337         u32 console_addr;       /* Address of struct rte_console */
 338         u32 msgtrace_addr;
 339         u8 tag[32];
 340         u32 brpt_addr;
 341 };
 342
 343 struct sdpcm_shared_le {
 344         __le32 flags;
 345         __le32 trap_addr;
 346         __le32 assert_exp_addr;
 347         __le32 assert_file_addr;
 348         __le32 assert_line;
 349         __le32 console_addr;    /* Address of struct rte_console */
 350         __le32 msgtrace_addr;
 351         u8 tag[32];
 352         __le32 brpt_addr;
 353 };
 354
 355 /* dongle SDIO bus specific header info */
 356 struct brcmf_sdio_hdrinfo {
 357         u8 seq_num;
 358         u8 channel;
 359         u16 len;
 360         u16 len_left;
 361         u16 len_nxtfrm;
 362         u8 dat_offset;
 363         bool lastfrm;
 364         u16 tail_pad;
 365 };
 366
 367 /* misc chip info needed by some of the routines */
 368 /* Private data for SDIO bus interaction */
 369 struct brcmf_sdio {
 370         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 371         struct chip_info *ci;   /* Chip info struct */
 372         char *vars;             /* Variables (from CIS and/or other) */
 373         uint varsz;             /* Size of variables buffer */
 374
 375         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 376
 377         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 378         atomic_t intstatus;     /* Intstatus bits (events) pending */
 379         atomic_t fcstate;       /* State of dongle flow-control */
 380
 381         uint blocksize;         /* Block size of SDIO transfers */
 382         uint roundup;           /* Max roundup limit */
 383
 384         struct pktq txq;        /* Queue length used for flow-control */
 385         u8 flowcontrol; /* per prio flow control bitmask */
 386         u8 tx_seq;              /* Transmit sequence number (next) */
 387         u8 tx_max;              /* Maximum transmit sequence allowed */
 388
 389         u8 *hdrbuf;             /* buffer for handling rx frame */
 390         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 391         u8 rx_seq;              /* Receive sequence number (expected) */
 392         struct brcmf_sdio_hdrinfo cur_read;
 393                                 /* info of current read frame */
 394         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 395         bool rxpending;         /* Data frame pending in dongle */
 396
 397         uint rxbound;           /* Rx frames to read before resched */
 398         uint txbound;           /* Tx frames to send before resched */
 399         uint txminmax;
 400
 401         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 402         struct sk_buff_head glom; /* Packet list for glommed superframe */
 403         uint glomerr;           /* Glom packet read errors */
 404
 405         u8 *rxbuf;              /* Buffer for receiving control packets */
 406         uint rxblen;            /* Allocated length of rxbuf */
 407         u8 *rxctl;              /* Aligned pointer into rxbuf */
 408         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 409         uint rxlen;             /* Length of valid data in buffer */
 410         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 411
 412         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 413
 414         bool intr;              /* Use interrupts */
 415         bool poll;              /* Use polling */
 416         atomic_t ipend;         /* Device interrupt is pending */
 417         uint spurious;          /* Count of spurious interrupts */
 418         uint pollrate;          /* Ticks between device polls */
 419         uint polltick;          /* Tick counter */
 420
 421 #ifdef DEBUG
 422         uint console_interval;
 423         struct brcmf_console console;   /* Console output polling support */
 424         uint console_addr;      /* Console address from shared struct */
 425 #endif                          /* DEBUG */
 426
 427         uint clkstate;          /* State of sd and backplane clock(s) */
 428         bool activity;          /* Activity flag for clock down */
 429         s32 idletime;           /* Control for activity timeout */
 430         s32 idlecount;  /* Activity timeout counter */
 431         s32 idleclock;  /* How to set bus driver when idle */
 432         bool rxflow_mode;       /* Rx flow control mode */
 433         bool rxflow;            /* Is rx flow control on */
 434         bool alp_only;          /* Don't use HT clock (ALP only) */
 435
 436         u8 *ctrl_frame_buf;
 437         u32 ctrl_frame_len;
 438         bool ctrl_frame_stat;
 439
 440         spinlock_t txqlock;
 441         wait_queue_head_t ctrl_wait;
 442         wait_queue_head_t dcmd_resp_wait;
 443
 444         struct timer_list timer;
 445         struct completion watchdog_wait;
 446         struct task_struct *watchdog_tsk;
 447         bool wd_timer_valid;
 448         uint save_ms;
 449
 450         struct workqueue_struct *brcmf_wq;
 451         struct work_struct datawork;
 452         atomic_t dpc_tskcnt;
 453
 454         bool txoff;             /* Transmit flow-controlled */
 455         struct brcmf_sdio_count sdcnt;
 456         bool sr_enabled; /* SaveRestore enabled */
 457         bool sleeping; /* SDIO bus sleeping */
 458
 459         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 460         bool txglom;            /* host tx glomming enable flag */
 461         struct sk_buff *txglom_sgpad;   /* scatter-gather padding buffer */
 462         u16 head_align;         /* buffer pointer alignment */
 463         u16 sgentry_align;      /* scatter-gather buffer alignment */
 464 };
 465
 466 /* clkstate */
 467 #define CLK_NONE        0
 468 #define CLK_SDONLY      1
 469 #define CLK_PENDING     2
 470 #define CLK_AVAIL       3
 471
 472 #ifdef DEBUG
 473 static int qcount[NUMPRIO];
 474 #endif                          /* DEBUG */
 475
 476 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 477
 478 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 479
 480 /* Retry count for register access failures */
 481 static const uint retry_limit = 2;
 482
 483 /* Limit on rounding up frames */
 484 static const uint max_roundup = 512;
 485
 486 #define ALIGNMENT  4
 487
 488 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 489 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 490 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 491
 492 enum brcmf_sdio_frmtype {
 493         BRCMF_SDIO_FT_NORMAL,
 494         BRCMF_SDIO_FT_SUPER,
 495         BRCMF_SDIO_FT_SUB,
 496 };
 497
 498 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 499 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 500 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 501 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 502 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 503 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 504 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 505 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 506 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 507 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 508 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 509 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 510 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 511 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 512 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 513 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 514
 515 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 516 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 517 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 518 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 519 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 520 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 521 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 522 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 523 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 524 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 525 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 526 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 527 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 528 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 529 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 530 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 531
 532 struct brcmf_firmware_names {
 533         u32 chipid;
 534         u32 revmsk;
 535         const char *bin;
 536         const char *nv;
 537 };
 538
 539 enum brcmf_firmware_type {
 540         BRCMF_FIRMWARE_BIN,
 541         BRCMF_FIRMWARE_NVRAM
 542 };
 543
 544 #define BRCMF_FIRMWARE_NVRAM(name) \
 545         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 546
 547 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 548         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 549         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 550         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 551         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 552         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 553         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 554         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 555         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 556 };
 557
 558
 559 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 560                                                   enum brcmf_firmware_type type)
 561 {
 562         const struct firmware *fw;
 563         const char *name;
 564         int err, i;
 565
 566         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 567                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 568                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 569                         switch (type) {
 570                         case BRCMF_FIRMWARE_BIN:
 571                                 name = brcmf_fwname_data[i].bin;
 572                                 break;
 573                         case BRCMF_FIRMWARE_NVRAM:
 574                                 name = brcmf_fwname_data[i].nv;
 575                                 break;
 576                         default:
 577                                 brcmf_err("invalid firmware type (%d)\n", type);
 578                                 return NULL;
 579                         }
 580                         goto found;
 581                 }
 582         }
 583         brcmf_err("Unknown chipid %d [%d]\n",
 584                   bus->ci->chip, bus->ci->chiprev);
 585         return NULL;
 586
 587 found:
 588         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 589         if ((err) || (!fw)) {
 590                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 591                 return NULL;
 592         }
 593
 594         return fw;
 595 }
 596
 597 static void pkt_align(struct sk_buff *p, int len, int align)
 598 {
 599         uint datalign;
 600         datalign = (unsigned long)(p->data);
 601         datalign = roundup(datalign, (align)) - datalign;
 602         if (datalign)
 603                 skb_pull(p, datalign);
 604         __skb_trim(p, len);
 605 }
 606
 607 /* To check if there's window offered */
 608 static bool data_ok(struct brcmf_sdio *bus)
 609 {
 610         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 611                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 612 }
 613
 614 /*
 615  * Reads a register in the SDIO hardware block. This block occupies a series of
 616  * adresses on the 32 bit backplane bus.
 617  */
 618 static int
 619 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 620 {
 621         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 622         int ret;
 623
 624         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 625                                     bus->ci->c_inf[idx].base + offset, &ret);
 626
 627         return ret;
 628 }
 629
 630 static int
 631 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 632 {
 633         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 634         int ret;
 635
 636         brcmf_sdiod_regwl(bus->sdiodev,
 637                           bus->ci->c_inf[idx].base + reg_offset,
 638                           regval, &ret);
 639
 640         return ret;
 641 }
 642
 643 static int
 644 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 645 {
 646         u8 wr_val = 0, rd_val, cmp_val, bmask;
 647         int err = 0;
 648         int try_cnt = 0;
 649
 650         brcmf_dbg(TRACE, "Enter\n");
 651
 652         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 653         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 654         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 655                           wr_val, &err);
 656         if (err) {
 657                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 658                 return err;
 659         }
 660
 661         if (on) {
 662                 /* device WAKEUP through KSO:
 663                  * write bit 0 & read back until
 664                  * both bits 0 (kso bit) & 1 (dev on status) are set
 665                  */
 666                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 667                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 668                 bmask = cmp_val;
 669                 usleep_range(2000, 3000);
 670         } else {
 671                 /* Put device to sleep, turn off KSO */
 672                 cmp_val = 0;
 673                 /* only check for bit0, bit1(dev on status) may not
 674                  * get cleared right away
 675                  */
 676                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 677         }
 678
 679         do {
 680                 /* reliable KSO bit set/clr:
 681                  * the sdiod sleep write access is synced to PMU 32khz clk
 682                  * just one write attempt may fail,
 683                  * read it back until it matches written value
 684                  */
 685                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 686                                            &err);
 687                 if (((rd_val & bmask) == cmp_val) && !err)
 688                         break;
 689                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 690                           try_cnt, MAX_KSO_ATTEMPTS, err);
 691                 udelay(KSO_WAIT_US);
 692                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 693                                   wr_val, &err);
 694         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 695
 696         return err;
 697 }
 698
 699 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 700
 701 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 702
 703 /* Turn backplane clock on or off */
 704 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 705 {
 706         int err;
 707         u8 clkctl, clkreq, devctl;
 708         unsigned long timeout;
 709
 710         brcmf_dbg(SDIO, "Enter\n");
 711
 712         clkctl = 0;
 713
 714         if (bus->sr_enabled) {
 715                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 716                 return 0;
 717         }
 718
 719         if (on) {
 720                 /* Request HT Avail */
 721                 clkreq =
 722                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 723
 724                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 725                                   clkreq, &err);
 726                 if (err) {
 727                         brcmf_err("HT Avail request error: %d\n", err);
 728                         return -EBADE;
 729                 }
 730
 731                 /* Check current status */
 732                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 733                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 734                 if (err) {
 735                         brcmf_err("HT Avail read error: %d\n", err);
 736                         return -EBADE;
 737                 }
 738
 739                 /* Go to pending and await interrupt if appropriate */
 740                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 741                         /* Allow only clock-available interrupt */
 742                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 743                                                    SBSDIO_DEVICE_CTL, &err);
 744                         if (err) {
 745                                 brcmf_err("Devctl error setting CA: %d\n",
 746                                           err);
 747                                 return -EBADE;
 748                         }
 749
 750                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 751                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 752                                           devctl, &err);
 753                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 754                         bus->clkstate = CLK_PENDING;
 755
 756                         return 0;
 757                 } else if (bus->clkstate == CLK_PENDING) {
 758                         /* Cancel CA-only interrupt filter */
 759                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 760                                                    SBSDIO_DEVICE_CTL, &err);
 761                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 762                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 763                                           devctl, &err);
 764                 }
 765
 766                 /* Otherwise, wait here (polling) for HT Avail */
 767                 timeout = jiffies +
 768                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 769                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 770                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 771                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 772                                                    &err);
 773                         if (time_after(jiffies, timeout))
 774                                 break;
 775                         else
 776                                 usleep_range(5000, 10000);
 777                 }
 778                 if (err) {
 779                         brcmf_err("HT Avail request error: %d\n", err);
 780                         return -EBADE;
 781                 }
 782                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 783                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 784                                   PMU_MAX_TRANSITION_DLY, clkctl);
 785                         return -EBADE;
 786                 }
 787
 788                 /* Mark clock available */
 789                 bus->clkstate = CLK_AVAIL;
 790                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 791
 792 #if defined(DEBUG)
 793                 if (!bus->alp_only) {
 794                         if (SBSDIO_ALPONLY(clkctl))
 795                                 brcmf_err("HT Clock should be on\n");
 796                 }
 797 #endif                          /* defined (DEBUG) */
 798
 799                 bus->activity = true;
 800         } else {
 801                 clkreq = 0;
 802
 803                 if (bus->clkstate == CLK_PENDING) {
 804                         /* Cancel CA-only interrupt filter */
 805                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 806                                                    SBSDIO_DEVICE_CTL, &err);
 807                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 808                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 809                                           devctl, &err);
 810                 }
 811
 812                 bus->clkstate = CLK_SDONLY;
 813                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 814                                   clkreq, &err);
 815                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 816                 if (err) {
 817                         brcmf_err("Failed access turning clock off: %d\n",
 818                                   err);
 819                         return -EBADE;
 820                 }
 821         }
 822         return 0;
 823 }
 824
 825 /* Change idle/active SD state */
 826 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 827 {
 828         brcmf_dbg(SDIO, "Enter\n");
 829
 830         if (on)
 831                 bus->clkstate = CLK_SDONLY;
 832         else
 833                 bus->clkstate = CLK_NONE;
 834
 835         return 0;
 836 }
 837
 838 /* Transition SD and backplane clock readiness */
 839 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 840 {
 841 #ifdef DEBUG
 842         uint oldstate = bus->clkstate;
 843 #endif                          /* DEBUG */
 844
 845         brcmf_dbg(SDIO, "Enter\n");
 846
 847         /* Early exit if we're already there */
 848         if (bus->clkstate == target) {
 849                 if (target == CLK_AVAIL) {
 850                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 851                         bus->activity = true;
 852                 }
 853                 return 0;
 854         }
 855
 856         switch (target) {
 857         case CLK_AVAIL:
 858                 /* Make sure SD clock is available */
 859                 if (bus->clkstate == CLK_NONE)
 860                         brcmf_sdio_sdclk(bus, true);
 861                 /* Now request HT Avail on the backplane */
 862                 brcmf_sdio_htclk(bus, true, pendok);
 863                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 864                 bus->activity = true;
 865                 break;
 866
 867         case CLK_SDONLY:
 868                 /* Remove HT request, or bring up SD clock */
 869                 if (bus->clkstate == CLK_NONE)
 870                         brcmf_sdio_sdclk(bus, true);
 871                 else if (bus->clkstate == CLK_AVAIL)
 872                         brcmf_sdio_htclk(bus, false, false);
 873                 else
 874                         brcmf_err("request for %d -> %d\n",
 875                                   bus->clkstate, target);
 876                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 877                 break;
 878
 879         case CLK_NONE:
 880                 /* Make sure to remove HT request */
 881                 if (bus->clkstate == CLK_AVAIL)
 882                         brcmf_sdio_htclk(bus, false, false);
 883                 /* Now remove the SD clock */
 884                 brcmf_sdio_sdclk(bus, false);
 885                 brcmf_sdio_wd_timer(bus, 0);
 886                 break;
 887         }
 888 #ifdef DEBUG
 889         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 890 #endif                          /* DEBUG */
 891
 892         return 0;
 893 }
 894
 895 static int
 896 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 897 {
 898         int err = 0;
 899         brcmf_dbg(TRACE, "Enter\n");
 900         brcmf_dbg(SDIO, "request %s currently %s\n",
 901                   (sleep ? "SLEEP" : "WAKE"),
 902                   (bus->sleeping ? "SLEEP" : "WAKE"));
 903
 904         /* If SR is enabled control bus state with KSO */
 905         if (bus->sr_enabled) {
 906                 /* Done if we're already in the requested state */
 907                 if (sleep == bus->sleeping)
 908                         goto end;
 909
 910                 /* Going to sleep */
 911                 if (sleep) {
 912                         /* Don't sleep if something is pending */
 913                         if (atomic_read(&bus->intstatus) ||
 914                             atomic_read(&bus->ipend) > 0 ||
 915                             (!atomic_read(&bus->fcstate) &&
 916                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 917                             data_ok(bus)))
 918                                  return -EBUSY;
 919                         err = brcmf_sdio_kso_control(bus, false);
 920                         /* disable watchdog */
 921                         if (!err)
 922                                 brcmf_sdio_wd_timer(bus, 0);
 923                 } else {
 924                         bus->idlecount = 0;
 925                         err = brcmf_sdio_kso_control(bus, true);
 926                 }
 927                 if (!err) {
 928                         /* Change state */
 929                         bus->sleeping = sleep;
 930                         brcmf_dbg(SDIO, "new state %s\n",
 931                                   (sleep ? "SLEEP" : "WAKE"));
 932                 } else {
 933                         brcmf_err("error while changing bus sleep state %d\n",
 934                                   err);
 935                         return err;
 936                 }
 937         }
 938
 939 end:
 940         /* control clocks */
 941         if (sleep) {
 942                 if (!bus->sr_enabled)
 943                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 944         } else {
 945                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 946         }
 947
 948         return err;
 949
 950 }
 951
 952 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
 953 {
 954         u32 intstatus = 0;
 955         u32 hmb_data;
 956         u8 fcbits;
 957         int ret;
 958
 959         brcmf_dbg(SDIO, "Enter\n");
 960
 961         /* Read mailbox data and ack that we did so */
 962         ret = r_sdreg32(bus, &hmb_data,
 963                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 964
 965         if (ret == 0)
 966                 w_sdreg32(bus, SMB_INT_ACK,
 967                           offsetof(struct sdpcmd_regs, tosbmailbox));
 968         bus->sdcnt.f1regdata += 2;
 969
 970         /* Dongle recomposed rx frames, accept them again */
 971         if (hmb_data & HMB_DATA_NAKHANDLED) {
 972                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 973                           bus->rx_seq);
 974                 if (!bus->rxskip)
 975                         brcmf_err("unexpected NAKHANDLED!\n");
 976
 977                 bus->rxskip = false;
 978                 intstatus |= I_HMB_FRAME_IND;
 979         }
 980
 981         /*
 982          * DEVREADY does not occur with gSPI.
 983          */
 984         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 985                 bus->sdpcm_ver =
 986                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 987                     HMB_DATA_VERSION_SHIFT;
 988                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 989                         brcmf_err("Version mismatch, dongle reports %d, "
 990                                   "expecting %d\n",
 991                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 992                 else
 993                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 994                                   bus->sdpcm_ver);
 995         }
 996
 997         /*
 998          * Flow Control has been moved into the RX headers and this out of band
 999          * method isn't used any more.
1000          * remaining backward compatible with older dongles.
1001          */
1002         if (hmb_data & HMB_DATA_FC) {
1003                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1004                                                         HMB_DATA_FCDATA_SHIFT;
1005
1006                 if (fcbits & ~bus->flowcontrol)
1007                         bus->sdcnt.fc_xoff++;
1008
1009                 if (bus->flowcontrol & ~fcbits)
1010                         bus->sdcnt.fc_xon++;
1011
1012                 bus->sdcnt.fc_rcvd++;
1013                 bus->flowcontrol = fcbits;
1014         }
1015
1016         /* Shouldn't be any others */
1017         if (hmb_data & ~(HMB_DATA_DEVREADY |
1018                          HMB_DATA_NAKHANDLED |
1019                          HMB_DATA_FC |
1020                          HMB_DATA_FWREADY |
1021                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1022                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1023                           hmb_data);
1024
1025         return intstatus;
1026 }
1027
1028 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1029 {
1030         uint retries = 0;
1031         u16 lastrbc;
1032         u8 hi, lo;
1033         int err;
1034
1035         brcmf_err("%sterminate frame%s\n",
1036                   abort ? "abort command, " : "",
1037                   rtx ? ", send NAK" : "");
1038
1039         if (abort)
1040                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1041
1042         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1043                           SFC_RF_TERM, &err);
1044         bus->sdcnt.f1regdata++;
1045
1046         /* Wait until the packet has been flushed (device/FIFO stable) */
1047         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1048                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1049                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1050                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1051                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1052                 bus->sdcnt.f1regdata += 2;
1053
1054                 if ((hi == 0) && (lo == 0))
1055                         break;
1056
1057                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1058                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1059                                   lastrbc, (hi << 8) + lo);
1060                 }
1061                 lastrbc = (hi << 8) + lo;
1062         }
1063
1064         if (!retries)
1065                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1066         else
1067                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1068
1069         if (rtx) {
1070                 bus->sdcnt.rxrtx++;
1071                 err = w_sdreg32(bus, SMB_NAK,
1072                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1073
1074                 bus->sdcnt.f1regdata++;
1075                 if (err == 0)
1076                         bus->rxskip = true;
1077         }
1078
1079         /* Clear partial in any case */
1080         bus->cur_read.len = 0;
1081
1082         /* If we can't reach the device, signal failure */
1083         if (err)
1084                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1085 }
1086
1087 /* return total length of buffer chain */
1088 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1089 {
1090         struct sk_buff *p;
1091         uint total;
1092
1093         total = 0;
1094         skb_queue_walk(&bus->glom, p)
1095                 total += p->len;
1096         return total;
1097 }
1098
1099 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1100 {
1101         struct sk_buff *cur, *next;
1102
1103         skb_queue_walk_safe(&bus->glom, cur, next) {
1104                 skb_unlink(cur, &bus->glom);
1105                 brcmu_pkt_buf_free_skb(cur);
1106         }
1107 }
1108
1109 /**
1110  * brcmfmac sdio bus specific header
1111  * This is the lowest layer header wrapped on the packets transmitted between
1112  * host and WiFi dongle which contains information needed for SDIO core and
1113  * firmware
1114  *
1115  * It consists of 3 parts: hardware header, hardware extension header and
1116  * software header
1117  * hardware header (frame tag) - 4 bytes
1118  * Byte 0~1: Frame length
1119  * Byte 2~3: Checksum, bit-wise inverse of frame length
1120  * hardware extension header - 8 bytes
1121  * Tx glom mode only, N/A for Rx or normal Tx
1122  * Byte 0~1: Packet length excluding hw frame tag
1123  * Byte 2: Reserved
1124  * Byte 3: Frame flags, bit 0: last frame indication
1125  * Byte 4~5: Reserved
1126  * Byte 6~7: Tail padding length
1127  * software header - 8 bytes
1128  * Byte 0: Rx/Tx sequence number
1129  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1130  * Byte 2: Length of next data frame, reserved for Tx
1131  * Byte 3: Data offset
1132  * Byte 4: Flow control bits, reserved for Tx
1133  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1134  * Byte 6~7: Reserved
1135  */
1136 #define SDPCM_HWHDR_LEN                 4
1137 #define SDPCM_HWEXT_LEN                 8
1138 #define SDPCM_SWHDR_LEN                 8
1139 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1140 /* software header */
1141 #define SDPCM_SEQ_MASK                  0x000000ff
1142 #define SDPCM_SEQ_WRAP                  256
1143 #define SDPCM_CHANNEL_MASK              0x00000f00
1144 #define SDPCM_CHANNEL_SHIFT             8
1145 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1146 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1147 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1148 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1149 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1150 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1151 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1152 #define SDPCM_NEXTLEN_SHIFT             16
1153 #define SDPCM_DOFFSET_MASK              0xff000000
1154 #define SDPCM_DOFFSET_SHIFT             24
1155 #define SDPCM_FCMASK_MASK               0x000000ff
1156 #define SDPCM_WINDOW_MASK               0x0000ff00
1157 #define SDPCM_WINDOW_SHIFT              8
1158
1159 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1160 {
1161         u32 hdrvalue;
1162         hdrvalue = *(u32 *)swheader;
1163         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1164 }
1165
1166 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1167                               struct brcmf_sdio_hdrinfo *rd,
1168                               enum brcmf_sdio_frmtype type)
1169 {
1170         u16 len, checksum;
1171         u8 rx_seq, fc, tx_seq_max;
1172         u32 swheader;
1173
1174         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1175
1176         /* hw header */
1177         len = get_unaligned_le16(header);
1178         checksum = get_unaligned_le16(header + sizeof(u16));
1179         /* All zero means no more to read */
1180         if (!(len | checksum)) {
1181                 bus->rxpending = false;
1182                 return -ENODATA;
1183         }
1184         if ((u16)(~(len ^ checksum))) {
1185                 brcmf_err("HW header checksum error\n");
1186                 bus->sdcnt.rx_badhdr++;
1187                 brcmf_sdio_rxfail(bus, false, false);
1188                 return -EIO;
1189         }
1190         if (len < SDPCM_HDRLEN) {
1191                 brcmf_err("HW header length error\n");
1192                 return -EPROTO;
1193         }
1194         if (type == BRCMF_SDIO_FT_SUPER &&
1195             (roundup(len, bus->blocksize) != rd->len)) {
1196                 brcmf_err("HW superframe header length error\n");
1197                 return -EPROTO;
1198         }
1199         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1200                 brcmf_err("HW subframe header length error\n");
1201                 return -EPROTO;
1202         }
1203         rd->len = len;
1204
1205         /* software header */
1206         header += SDPCM_HWHDR_LEN;
1207         swheader = le32_to_cpu(*(__le32 *)header);
1208         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1209                 brcmf_err("Glom descriptor found in superframe head\n");
1210                 rd->len = 0;
1211                 return -EINVAL;
1212         }
1213         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1214         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1215         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1216             type != BRCMF_SDIO_FT_SUPER) {
1217                 brcmf_err("HW header length too long\n");
1218                 bus->sdcnt.rx_toolong++;
1219                 brcmf_sdio_rxfail(bus, false, false);
1220                 rd->len = 0;
1221                 return -EPROTO;
1222         }
1223         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1224                 brcmf_err("Wrong channel for superframe\n");
1225                 rd->len = 0;
1226                 return -EINVAL;
1227         }
1228         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1229             rd->channel != SDPCM_EVENT_CHANNEL) {
1230                 brcmf_err("Wrong channel for subframe\n");
1231                 rd->len = 0;
1232                 return -EINVAL;
1233         }
1234         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1235         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1236                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1237                 bus->sdcnt.rx_badhdr++;
1238                 brcmf_sdio_rxfail(bus, false, false);
1239                 rd->len = 0;
1240                 return -ENXIO;
1241         }
1242         if (rd->seq_num != rx_seq) {
1243                 brcmf_err("seq %d: sequence number error, expect %d\n",
1244                           rx_seq, rd->seq_num);
1245                 bus->sdcnt.rx_badseq++;
1246                 rd->seq_num = rx_seq;
1247         }
1248         /* no need to check the reset for subframe */
1249         if (type == BRCMF_SDIO_FT_SUB)
1250                 return 0;
1251         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1252         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1253                 /* only warm for NON glom packet */
1254                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1255                         brcmf_err("seq %d: next length error\n", rx_seq);
1256                 rd->len_nxtfrm = 0;
1257         }
1258         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1259         fc = swheader & SDPCM_FCMASK_MASK;
1260         if (bus->flowcontrol != fc) {
1261                 if (~bus->flowcontrol & fc)
1262                         bus->sdcnt.fc_xoff++;
1263                 if (bus->flowcontrol & ~fc)
1264                         bus->sdcnt.fc_xon++;
1265                 bus->sdcnt.fc_rcvd++;
1266                 bus->flowcontrol = fc;
1267         }
1268         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1269         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1270                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1271                 tx_seq_max = bus->tx_seq + 2;
1272         }
1273         bus->tx_max = tx_seq_max;
1274
1275         return 0;
1276 }
1277
1278 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1279 {
1280         *(__le16 *)header = cpu_to_le16(frm_length);
1281         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1282 }
1283
1284 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1285                               struct brcmf_sdio_hdrinfo *hd_info)
1286 {
1287         u32 hdrval;
1288         u8 hdr_offset;
1289
1290         brcmf_sdio_update_hwhdr(header, hd_info->len);
1291         hdr_offset = SDPCM_HWHDR_LEN;
1292
1293         if (bus->txglom) {
1294                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1295                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1296                 hdrval = (u16)hd_info->tail_pad << 16;
1297                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1298                 hdr_offset += SDPCM_HWEXT_LEN;
1299         }
1300
1301         hdrval = hd_info->seq_num;
1302         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1303                   SDPCM_CHANNEL_MASK;
1304         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1305                   SDPCM_DOFFSET_MASK;
1306         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1307         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1308         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1309 }
1310
1311 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1312 {
1313         u16 dlen, totlen;
1314         u8 *dptr, num = 0;
1315         u16 sublen;
1316         struct sk_buff *pfirst, *pnext;
1317
1318         int errcode;
1319         u8 doff, sfdoff;
1320
1321         struct brcmf_sdio_hdrinfo rd_new;
1322
1323         /* If packets, issue read(s) and send up packet chain */
1324         /* Return sequence numbers consumed? */
1325
1326         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1327                   bus->glomd, skb_peek(&bus->glom));
1328
1329         /* If there's a descriptor, generate the packet chain */
1330         if (bus->glomd) {
1331                 pfirst = pnext = NULL;
1332                 dlen = (u16) (bus->glomd->len);
1333                 dptr = bus->glomd->data;
1334                 if (!dlen || (dlen & 1)) {
1335                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1336                                   dlen);
1337                         dlen = 0;
1338                 }
1339
1340                 for (totlen = num = 0; dlen; num++) {
1341                         /* Get (and move past) next length */
1342                         sublen = get_unaligned_le16(dptr);
1343                         dlen -= sizeof(u16);
1344                         dptr += sizeof(u16);
1345                         if ((sublen < SDPCM_HDRLEN) ||
1346                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1347                                 brcmf_err("descriptor len %d bad: %d\n",
1348                                           num, sublen);
1349                                 pnext = NULL;
1350                                 break;
1351                         }
1352                         if (sublen % bus->sgentry_align) {
1353                                 brcmf_err("sublen %d not multiple of %d\n",
1354                                           sublen, bus->sgentry_align);
1355                         }
1356                         totlen += sublen;
1357
1358                         /* For last frame, adjust read len so total
1359                                  is a block multiple */
1360                         if (!dlen) {
1361                                 sublen +=
1362                                     (roundup(totlen, bus->blocksize) - totlen);
1363                                 totlen = roundup(totlen, bus->blocksize);
1364                         }
1365
1366                         /* Allocate/chain packet for next subframe */
1367                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1368                         if (pnext == NULL) {
1369                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1370                                           num, sublen);
1371                                 break;
1372                         }
1373                         skb_queue_tail(&bus->glom, pnext);
1374
1375                         /* Adhere to start alignment requirements */
1376                         pkt_align(pnext, sublen, bus->sgentry_align);
1377                 }
1378
1379                 /* If all allocations succeeded, save packet chain
1380                          in bus structure */
1381                 if (pnext) {
1382                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1383                                   totlen, num);
1384                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1385                             totlen != bus->cur_read.len) {
1386                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1387                                           bus->cur_read.len, totlen, rxseq);
1388                         }
1389                         pfirst = pnext = NULL;
1390                 } else {
1391                         brcmf_sdio_free_glom(bus);
1392                         num = 0;
1393                 }
1394
1395                 /* Done with descriptor packet */
1396                 brcmu_pkt_buf_free_skb(bus->glomd);
1397                 bus->glomd = NULL;
1398                 bus->cur_read.len = 0;
1399         }
1400
1401         /* Ok -- either we just generated a packet chain,
1402                  or had one from before */
1403         if (!skb_queue_empty(&bus->glom)) {
1404                 if (BRCMF_GLOM_ON()) {
1405                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1406                         skb_queue_walk(&bus->glom, pnext) {
1407                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1408                                           pnext, (u8 *) (pnext->data),
1409                                           pnext->len, pnext->len);
1410                         }
1411                 }
1412
1413                 pfirst = skb_peek(&bus->glom);
1414                 dlen = (u16) brcmf_sdio_glom_len(bus);
1415
1416                 /* Do an SDIO read for the superframe.  Configurable iovar to
1417                  * read directly into the chained packet, or allocate a large
1418                  * packet and and copy into the chain.
1419                  */
1420                 sdio_claim_host(bus->sdiodev->func[1]);
1421                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1422                                                  &bus->glom, dlen);
1423                 sdio_release_host(bus->sdiodev->func[1]);
1424                 bus->sdcnt.f2rxdata++;
1425
1426                 /* On failure, kill the superframe, allow a couple retries */
1427                 if (errcode < 0) {
1428                         brcmf_err("glom read of %d bytes failed: %d\n",
1429                                   dlen, errcode);
1430
1431                         sdio_claim_host(bus->sdiodev->func[1]);
1432                         if (bus->glomerr++ < 3) {
1433                                 brcmf_sdio_rxfail(bus, true, true);
1434                         } else {
1435                                 bus->glomerr = 0;
1436                                 brcmf_sdio_rxfail(bus, true, false);
1437                                 bus->sdcnt.rxglomfail++;
1438                                 brcmf_sdio_free_glom(bus);
1439                         }
1440                         sdio_release_host(bus->sdiodev->func[1]);
1441                         return 0;
1442                 }
1443
1444                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1445                                    pfirst->data, min_t(int, pfirst->len, 48),
1446                                    "SUPERFRAME:\n");
1447
1448                 rd_new.seq_num = rxseq;
1449                 rd_new.len = dlen;
1450                 sdio_claim_host(bus->sdiodev->func[1]);
1451                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1452                                              BRCMF_SDIO_FT_SUPER);
1453                 sdio_release_host(bus->sdiodev->func[1]);
1454                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1455
1456                 /* Remove superframe header, remember offset */
1457                 skb_pull(pfirst, rd_new.dat_offset);
1458                 sfdoff = rd_new.dat_offset;
1459                 num = 0;
1460
1461                 /* Validate all the subframe headers */
1462                 skb_queue_walk(&bus->glom, pnext) {
1463                         /* leave when invalid subframe is found */
1464                         if (errcode)
1465                                 break;
1466
1467                         rd_new.len = pnext->len;
1468                         rd_new.seq_num = rxseq++;
1469                         sdio_claim_host(bus->sdiodev->func[1]);
1470                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1471                                                      BRCMF_SDIO_FT_SUB);
1472                         sdio_release_host(bus->sdiodev->func[1]);
1473                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1474                                            pnext->data, 32, "subframe:\n");
1475
1476                         num++;
1477                 }
1478
1479                 if (errcode) {
1480                         /* Terminate frame on error, request
1481                                  a couple retries */
1482                         sdio_claim_host(bus->sdiodev->func[1]);
1483                         if (bus->glomerr++ < 3) {
1484                                 /* Restore superframe header space */
1485                                 skb_push(pfirst, sfdoff);
1486                                 brcmf_sdio_rxfail(bus, true, true);
1487                         } else {
1488                                 bus->glomerr = 0;
1489                                 brcmf_sdio_rxfail(bus, true, false);
1490                                 bus->sdcnt.rxglomfail++;
1491                                 brcmf_sdio_free_glom(bus);
1492                         }
1493                         sdio_release_host(bus->sdiodev->func[1]);
1494                         bus->cur_read.len = 0;
1495                         return 0;
1496                 }
1497
1498                 /* Basic SD framing looks ok - process each packet (header) */
1499
1500                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1501                         dptr = (u8 *) (pfirst->data);
1502                         sublen = get_unaligned_le16(dptr);
1503                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1504
1505                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1506                                            dptr, pfirst->len,
1507                                            "Rx Subframe Data:\n");
1508
1509                         __skb_trim(pfirst, sublen);
1510                         skb_pull(pfirst, doff);
1511
1512                         if (pfirst->len == 0) {
1513                                 skb_unlink(pfirst, &bus->glom);
1514                                 brcmu_pkt_buf_free_skb(pfirst);
1515                                 continue;
1516                         }
1517
1518                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1519                                            pfirst->data,
1520                                            min_t(int, pfirst->len, 32),
1521                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1522                                            bus->glom.qlen, pfirst, pfirst->data,
1523                                            pfirst->len, pfirst->next,
1524                                            pfirst->prev);
1525                         skb_unlink(pfirst, &bus->glom);
1526                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1527                         bus->sdcnt.rxglompkts++;
1528                 }
1529
1530                 bus->sdcnt.rxglomframes++;
1531         }
1532         return num;
1533 }
1534
1535 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1536                                      bool *pending)
1537 {
1538         DECLARE_WAITQUEUE(wait, current);
1539         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1540
1541         /* Wait until control frame is available */
1542         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1543         set_current_state(TASK_INTERRUPTIBLE);
1544
1545         while (!(*condition) && (!signal_pending(current) && timeout))
1546                 timeout = schedule_timeout(timeout);
1547
1548         if (signal_pending(current))
1549                 *pending = true;
1550
1551         set_current_state(TASK_RUNNING);
1552         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1553
1554         return timeout;
1555 }
1556
1557 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1558 {
1559         if (waitqueue_active(&bus->dcmd_resp_wait))
1560                 wake_up_interruptible(&bus->dcmd_resp_wait);
1561
1562         return 0;
1563 }
1564 static void
1565 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1566 {
1567         uint rdlen, pad;
1568         u8 *buf = NULL, *rbuf;
1569         int sdret;
1570
1571         brcmf_dbg(TRACE, "Enter\n");
1572
1573         if (bus->rxblen)
1574                 buf = vzalloc(bus->rxblen);
1575         if (!buf)
1576                 goto done;
1577
1578         rbuf = bus->rxbuf;
1579         pad = ((unsigned long)rbuf % bus->head_align);
1580         if (pad)
1581                 rbuf += (bus->head_align - pad);
1582
1583         /* Copy the already-read portion over */
1584         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1585         if (len <= BRCMF_FIRSTREAD)
1586                 goto gotpkt;
1587
1588         /* Raise rdlen to next SDIO block to avoid tail command */
1589         rdlen = len - BRCMF_FIRSTREAD;
1590         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1591                 pad = bus->blocksize - (rdlen % bus->blocksize);
1592                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1593                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1594                         rdlen += pad;
1595         } else if (rdlen % bus->head_align) {
1596                 rdlen += bus->head_align - (rdlen % bus->head_align);
1597         }
1598
1599         /* Drop if the read is too big or it exceeds our maximum */
1600         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1601                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1602                           rdlen, bus->sdiodev->bus_if->maxctl);
1603                 brcmf_sdio_rxfail(bus, false, false);
1604                 goto done;
1605         }
1606
1607         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1608                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1609                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1610                 bus->sdcnt.rx_toolong++;
1611                 brcmf_sdio_rxfail(bus, false, false);
1612                 goto done;
1613         }
1614
1615         /* Read remain of frame body */
1616         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1617         bus->sdcnt.f2rxdata++;
1618
1619         /* Control frame failures need retransmission */
1620         if (sdret < 0) {
1621                 brcmf_err("read %d control bytes failed: %d\n",
1622                           rdlen, sdret);
1623                 bus->sdcnt.rxc_errors++;
1624                 brcmf_sdio_rxfail(bus, true, true);
1625                 goto done;
1626         } else
1627                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1628
1629 gotpkt:
1630
1631         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1632                            buf, len, "RxCtrl:\n");
1633
1634         /* Point to valid data and indicate its length */
1635         spin_lock_bh(&bus->rxctl_lock);
1636         if (bus->rxctl) {
1637                 brcmf_err("last control frame is being processed.\n");
1638                 spin_unlock_bh(&bus->rxctl_lock);
1639                 vfree(buf);
1640                 goto done;
1641         }
1642         bus->rxctl = buf + doff;
1643         bus->rxctl_orig = buf;
1644         bus->rxlen = len - doff;
1645         spin_unlock_bh(&bus->rxctl_lock);
1646
1647 done:
1648         /* Awake any waiters */
1649         brcmf_sdio_dcmd_resp_wake(bus);
1650 }
1651
1652 /* Pad read to blocksize for efficiency */
1653 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1654 {
1655         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1656                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1657                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1658                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1659                         *rdlen += *pad;
1660         } else if (*rdlen % bus->head_align) {
1661                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1662         }
1663 }
1664
1665 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1666 {
1667         struct sk_buff *pkt;            /* Packet for event or data frames */
1668         u16 pad;                /* Number of pad bytes to read */
1669         uint rxleft = 0;        /* Remaining number of frames allowed */
1670         int ret;                /* Return code from calls */
1671         uint rxcount = 0;       /* Total frames read */
1672         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1673         u8 head_read = 0;
1674
1675         brcmf_dbg(TRACE, "Enter\n");
1676
1677         /* Not finished unless we encounter no more frames indication */
1678         bus->rxpending = true;
1679
1680         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1681              !bus->rxskip && rxleft &&
1682              bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1683              rd->seq_num++, rxleft--) {
1684
1685                 /* Handle glomming separately */
1686                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1687                         u8 cnt;
1688                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1689                                   bus->glomd, skb_peek(&bus->glom));
1690                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1691                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1692                         rd->seq_num += cnt - 1;
1693                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1694                         continue;
1695                 }
1696
1697                 rd->len_left = rd->len;
1698                 /* read header first for unknow frame length */
1699                 sdio_claim_host(bus->sdiodev->func[1]);
1700                 if (!rd->len) {
1701                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1702                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1703                         bus->sdcnt.f2rxhdrs++;
1704                         if (ret < 0) {
1705                                 brcmf_err("RXHEADER FAILED: %d\n",
1706                                           ret);
1707                                 bus->sdcnt.rx_hdrfail++;
1708                                 brcmf_sdio_rxfail(bus, true, true);
1709                                 sdio_release_host(bus->sdiodev->func[1]);
1710                                 continue;
1711                         }
1712
1713                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1714                                            bus->rxhdr, SDPCM_HDRLEN,
1715                                            "RxHdr:\n");
1716
1717                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1718                                                BRCMF_SDIO_FT_NORMAL)) {
1719                                 sdio_release_host(bus->sdiodev->func[1]);
1720                                 if (!bus->rxpending)
1721                                         break;
1722                                 else
1723                                         continue;
1724                         }
1725
1726                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1727                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1728                                                         rd->len,
1729                                                         rd->dat_offset);
1730                                 /* prepare the descriptor for the next read */
1731                                 rd->len = rd->len_nxtfrm << 4;
1732                                 rd->len_nxtfrm = 0;
1733                                 /* treat all packet as event if we don't know */
1734                                 rd->channel = SDPCM_EVENT_CHANNEL;
1735                                 sdio_release_host(bus->sdiodev->func[1]);
1736                                 continue;
1737                         }
1738                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1739                                        rd->len - BRCMF_FIRSTREAD : 0;
1740                         head_read = BRCMF_FIRSTREAD;
1741                 }
1742
1743                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1744
1745                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1746                                             bus->head_align);
1747                 if (!pkt) {
1748                         /* Give up on data, request rtx of events */
1749                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1750                         brcmf_sdio_rxfail(bus, false,
1751                                             RETRYCHAN(rd->channel));
1752                         sdio_release_host(bus->sdiodev->func[1]);
1753                         continue;
1754                 }
1755                 skb_pull(pkt, head_read);
1756                 pkt_align(pkt, rd->len_left, bus->head_align);
1757
1758                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1759                 bus->sdcnt.f2rxdata++;
1760                 sdio_release_host(bus->sdiodev->func[1]);
1761
1762                 if (ret < 0) {
1763                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1764                                   rd->len, rd->channel, ret);
1765                         brcmu_pkt_buf_free_skb(pkt);
1766                         sdio_claim_host(bus->sdiodev->func[1]);
1767                         brcmf_sdio_rxfail(bus, true,
1768                                             RETRYCHAN(rd->channel));
1769                         sdio_release_host(bus->sdiodev->func[1]);
1770                         continue;
1771                 }
1772
1773                 if (head_read) {
1774                         skb_push(pkt, head_read);
1775                         memcpy(pkt->data, bus->rxhdr, head_read);
1776                         head_read = 0;
1777                 } else {
1778                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1779                         rd_new.seq_num = rd->seq_num;
1780                         sdio_claim_host(bus->sdiodev->func[1]);
1781                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1782                                                BRCMF_SDIO_FT_NORMAL)) {
1783                                 rd->len = 0;
1784                                 brcmu_pkt_buf_free_skb(pkt);
1785                         }
1786                         bus->sdcnt.rx_readahead_cnt++;
1787                         if (rd->len != roundup(rd_new.len, 16)) {
1788                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1789                                           rd->len,
1790                                           roundup(rd_new.len, 16) >> 4);
1791                                 rd->len = 0;
1792                                 brcmf_sdio_rxfail(bus, true, true);
1793                                 sdio_release_host(bus->sdiodev->func[1]);
1794                                 brcmu_pkt_buf_free_skb(pkt);
1795                                 continue;
1796                         }
1797                         sdio_release_host(bus->sdiodev->func[1]);
1798                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1799                         rd->channel = rd_new.channel;
1800                         rd->dat_offset = rd_new.dat_offset;
1801
1802                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1803                                              BRCMF_DATA_ON()) &&
1804                                            BRCMF_HDRS_ON(),
1805                                            bus->rxhdr, SDPCM_HDRLEN,
1806                                            "RxHdr:\n");
1807
1808                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1809                                 brcmf_err("readahead on control packet %d?\n",
1810                                           rd_new.seq_num);
1811                                 /* Force retry w/normal header read */
1812                                 rd->len = 0;
1813                                 sdio_claim_host(bus->sdiodev->func[1]);
1814                                 brcmf_sdio_rxfail(bus, false, true);
1815                                 sdio_release_host(bus->sdiodev->func[1]);
1816                                 brcmu_pkt_buf_free_skb(pkt);
1817                                 continue;
1818                         }
1819                 }
1820
1821                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1822                                    pkt->data, rd->len, "Rx Data:\n");
1823
1824                 /* Save superframe descriptor and allocate packet frame */
1825                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1826                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1827                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1828                                           rd->len);
1829                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1830                                                    pkt->data, rd->len,
1831                                                    "Glom Data:\n");
1832                                 __skb_trim(pkt, rd->len);
1833                                 skb_pull(pkt, SDPCM_HDRLEN);
1834                                 bus->glomd = pkt;
1835                         } else {
1836                                 brcmf_err("%s: glom superframe w/o "
1837                                           "descriptor!\n", __func__);
1838                                 sdio_claim_host(bus->sdiodev->func[1]);
1839                                 brcmf_sdio_rxfail(bus, false, false);
1840                                 sdio_release_host(bus->sdiodev->func[1]);
1841                         }
1842                         /* prepare the descriptor for the next read */
1843                         rd->len = rd->len_nxtfrm << 4;
1844                         rd->len_nxtfrm = 0;
1845                         /* treat all packet as event if we don't know */
1846                         rd->channel = SDPCM_EVENT_CHANNEL;
1847                         continue;
1848                 }
1849
1850                 /* Fill in packet len and prio, deliver upward */
1851                 __skb_trim(pkt, rd->len);
1852                 skb_pull(pkt, rd->dat_offset);
1853
1854                 /* prepare the descriptor for the next read */
1855                 rd->len = rd->len_nxtfrm << 4;
1856                 rd->len_nxtfrm = 0;
1857                 /* treat all packet as event if we don't know */
1858                 rd->channel = SDPCM_EVENT_CHANNEL;
1859
1860                 if (pkt->len == 0) {
1861                         brcmu_pkt_buf_free_skb(pkt);
1862                         continue;
1863                 }
1864
1865                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1866         }
1867
1868         rxcount = maxframes - rxleft;
1869         /* Message if we hit the limit */
1870         if (!rxleft)
1871                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1872         else
1873                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1874         /* Back off rxseq if awaiting rtx, update rx_seq */
1875         if (bus->rxskip)
1876                 rd->seq_num--;
1877         bus->rx_seq = rd->seq_num;
1878
1879         return rxcount;
1880 }
1881
1882 static void
1883 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1884 {
1885         if (waitqueue_active(&bus->ctrl_wait))
1886                 wake_up_interruptible(&bus->ctrl_wait);
1887         return;
1888 }
1889
1890 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1891 {
1892         u16 head_pad;
1893         u8 *dat_buf;
1894
1895         dat_buf = (u8 *)(pkt->data);
1896
1897         /* Check head padding */
1898         head_pad = ((unsigned long)dat_buf % bus->head_align);
1899         if (head_pad) {
1900                 if (skb_headroom(pkt) < head_pad) {
1901                         bus->sdiodev->bus_if->tx_realloc++;
1902                         head_pad = 0;
1903                         if (skb_cow(pkt, head_pad))
1904                                 return -ENOMEM;
1905                 }
1906                 skb_push(pkt, head_pad);
1907                 dat_buf = (u8 *)(pkt->data);
1908                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1909         }
1910         return head_pad;
1911 }
1912
1913 /**
1914  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1915  * bus layer usage.
1916  */
1917 /* flag marking a dummy skb added for DMA alignment requirement */
1918 #define ALIGN_SKB_FLAG          0x8000
1919 /* bit mask of data length chopped from the previous packet */
1920 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1921
1922 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1923                                     struct sk_buff_head *pktq,
1924                                     struct sk_buff *pkt, u16 total_len)
1925 {
1926         struct brcmf_sdio_dev *sdiodev;
1927         struct sk_buff *pkt_pad;
1928         u16 tail_pad, tail_chop, chain_pad;
1929         unsigned int blksize;
1930         bool lastfrm;
1931         int ntail, ret;
1932
1933         sdiodev = bus->sdiodev;
1934         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1935         /* sg entry alignment should be a divisor of block size */
1936         WARN_ON(blksize % bus->sgentry_align);
1937
1938         /* Check tail padding */
1939         lastfrm = skb_queue_is_last(pktq, pkt);
1940         tail_pad = 0;
1941         tail_chop = pkt->len % bus->sgentry_align;
1942         if (tail_chop)
1943                 tail_pad = bus->sgentry_align - tail_chop;
1944         chain_pad = (total_len + tail_pad) % blksize;
1945         if (lastfrm && chain_pad)
1946                 tail_pad += blksize - chain_pad;
1947         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1948                 pkt_pad = bus->txglom_sgpad;
1949                 if (pkt_pad == NULL)
1950                           brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1951                 if (pkt_pad == NULL)
1952                         return -ENOMEM;
1953                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1954                 if (unlikely(ret < 0))
1955                         return ret;
1956                 memcpy(pkt_pad->data,
1957                        pkt->data + pkt->len - tail_chop,
1958                        tail_chop);
1959                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1960                 skb_trim(pkt, pkt->len - tail_chop);
1961                 __skb_queue_after(pktq, pkt, pkt_pad);
1962         } else {
1963                 ntail = pkt->data_len + tail_pad -
1964                         (pkt->end - pkt->tail);
1965                 if (skb_cloned(pkt) || ntail > 0)
1966                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1967                                 return -ENOMEM;
1968                 if (skb_linearize(pkt))
1969                         return -ENOMEM;
1970                 __skb_put(pkt, tail_pad);
1971         }
1972
1973         return tail_pad;
1974 }
1975
1976 /**
1977  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1978  * @bus: brcmf_sdio structure pointer
1979  * @pktq: packet list pointer
1980  * @chan: virtual channel to transmit the packet
1981  *
1982  * Processes to be applied to the packet
1983  *      - Align data buffer pointer
1984  *      - Align data buffer length
1985  *      - Prepare header
1986  * Return: negative value if there is error
1987  */
1988 static int
1989 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1990                       uint chan)
1991 {
1992         u16 head_pad, total_len;
1993         struct sk_buff *pkt_next;
1994         u8 txseq;
1995         int ret;
1996         struct brcmf_sdio_hdrinfo hd_info = {0};
1997
1998         txseq = bus->tx_seq;
1999         total_len = 0;
2000         skb_queue_walk(pktq, pkt_next) {
2001                 /* alignment packet inserted in previous
2002                  * loop cycle can be skipped as it is
2003                  * already properly aligned and does not
2004                  * need an sdpcm header.
2005                  */
2006                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2007                         continue;
2008
2009                 /* align packet data pointer */
2010                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2011                 if (ret < 0)
2012                         return ret;
2013                 head_pad = (u16)ret;
2014                 if (head_pad)
2015                         memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2016
2017                 total_len += pkt_next->len;
2018
2019                 hd_info.len = pkt_next->len;
2020                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2021                 if (bus->txglom && pktq->qlen > 1) {
2022                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2023                                                        pkt_next, total_len);
2024                         if (ret < 0)
2025                                 return ret;
2026                         hd_info.tail_pad = (u16)ret;
2027                         total_len += (u16)ret;
2028                 }
2029
2030                 hd_info.channel = chan;
2031                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2032                 hd_info.seq_num = txseq++;
2033
2034                 /* Now fill the header */
2035                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2036
2037                 if (BRCMF_BYTES_ON() &&
2038                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2039                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2040                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2041                                            "Tx Frame:\n");
2042                 else if (BRCMF_HDRS_ON())
2043                         brcmf_dbg_hex_dump(true, pkt_next,
2044                                            head_pad + bus->tx_hdrlen,
2045                                            "Tx Header:\n");
2046         }
2047         /* Hardware length tag of the first packet should be total
2048          * length of the chain (including padding)
2049          */
2050         if (bus->txglom)
2051                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2052         return 0;
2053 }
2054
2055 /**
2056  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2057  * @bus: brcmf_sdio structure pointer
2058  * @pktq: packet list pointer
2059  *
2060  * Processes to be applied to the packet
2061  *      - Remove head padding
2062  *      - Remove tail padding
2063  */
2064 static void
2065 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2066 {
2067         u8 *hdr;
2068         u32 dat_offset;
2069         u16 tail_pad;
2070         u32 dummy_flags, chop_len;
2071         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2072
2073         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2074                 dummy_flags = *(u32 *)(pkt_next->cb);
2075                 if (dummy_flags & ALIGN_SKB_FLAG) {
2076                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2077                         if (chop_len) {
2078                                 pkt_prev = pkt_next->prev;
2079                                 skb_put(pkt_prev, chop_len);
2080                         }
2081                         __skb_unlink(pkt_next, pktq);
2082                         brcmu_pkt_buf_free_skb(pkt_next);
2083                 } else {
2084                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2085                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2086                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2087                                      SDPCM_DOFFSET_SHIFT;
2088                         skb_pull(pkt_next, dat_offset);
2089                         if (bus->txglom) {
2090                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2091                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2092                         }
2093                 }
2094         }
2095 }
2096
2097 /* Writes a HW/SW header into the packet and sends it. */
2098 /* Assumes: (a) header space already there, (b) caller holds lock */
2099 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2100                             uint chan)
2101 {
2102         int ret;
2103         int i;
2104         struct sk_buff *pkt_next, *tmp;
2105
2106         brcmf_dbg(TRACE, "Enter\n");
2107
2108         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2109         if (ret)
2110                 goto done;
2111
2112         sdio_claim_host(bus->sdiodev->func[1]);
2113         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2114         bus->sdcnt.f2txdata++;
2115
2116         if (ret < 0) {
2117                 /* On failure, abort the command and terminate the frame */
2118                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2119                           ret);
2120                 bus->sdcnt.tx_sderrs++;
2121
2122                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2123                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2124                                   SFC_WF_TERM, NULL);
2125                 bus->sdcnt.f1regdata++;
2126
2127                 for (i = 0; i < 3; i++) {
2128                         u8 hi, lo;
2129                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2130                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2131                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2132                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2133                         bus->sdcnt.f1regdata += 2;
2134                         if ((hi == 0) && (lo == 0))
2135                                 break;
2136                 }
2137         }
2138         sdio_release_host(bus->sdiodev->func[1]);
2139
2140 done:
2141         brcmf_sdio_txpkt_postp(bus, pktq);
2142         if (ret == 0)
2143                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2144         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2145                 __skb_unlink(pkt_next, pktq);
2146                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2147         }
2148         return ret;
2149 }
2150
2151 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2152 {
2153         struct sk_buff *pkt;
2154         struct sk_buff_head pktq;
2155         u32 intstatus = 0;
2156         int ret = 0, prec_out, i;
2157         uint cnt = 0;
2158         u8 tx_prec_map, pkt_num;
2159
2160         brcmf_dbg(TRACE, "Enter\n");
2161
2162         tx_prec_map = ~bus->flowcontrol;
2163
2164         /* Send frames until the limit or some other event */
2165         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2166                 pkt_num = 1;
2167                 __skb_queue_head_init(&pktq);
2168                 if (bus->txglom)
2169                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2170                                         brcmf_sdio_txglomsz);
2171                 pkt_num = min_t(u32, pkt_num,
2172                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2173                 spin_lock_bh(&bus->txqlock);
2174                 for (i = 0; i < pkt_num; i++) {
2175                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2176                                               &prec_out);
2177                         if (pkt == NULL)
2178                                 break;
2179                         __skb_queue_tail(&pktq, pkt);
2180                 }
2181                 spin_unlock_bh(&bus->txqlock);
2182                 if (i == 0)
2183                         break;
2184
2185                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2186                 cnt += i;
2187
2188                 /* In poll mode, need to check for other events */
2189                 if (!bus->intr && cnt) {
2190                         /* Check device status, signal pending interrupt */
2191                         sdio_claim_host(bus->sdiodev->func[1]);
2192                         ret = r_sdreg32(bus, &intstatus,
2193                                         offsetof(struct sdpcmd_regs,
2194                                                  intstatus));
2195                         sdio_release_host(bus->sdiodev->func[1]);
2196                         bus->sdcnt.f2txdata++;
2197                         if (ret != 0)
2198                                 break;
2199                         if (intstatus & bus->hostintmask)
2200                                 atomic_set(&bus->ipend, 1);
2201                 }
2202         }
2203
2204         /* Deflow-control stack if needed */
2205         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2206             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2207                 bus->txoff = false;
2208                 brcmf_txflowblock(bus->sdiodev->dev, false);
2209         }
2210
2211         return cnt;
2212 }
2213
2214 static void brcmf_sdio_bus_stop(struct device *dev)
2215 {
2216         u32 local_hostintmask;
2217         u8 saveclk;
2218         int err;
2219         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2220         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2221         struct brcmf_sdio *bus = sdiodev->bus;
2222
2223         brcmf_dbg(TRACE, "Enter\n");
2224
2225         if (bus->watchdog_tsk) {
2226                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2227                 kthread_stop(bus->watchdog_tsk);
2228                 bus->watchdog_tsk = NULL;
2229         }
2230
2231         sdio_claim_host(bus->sdiodev->func[1]);
2232
2233         /* Enable clock for device interrupts */
2234         brcmf_sdio_bus_sleep(bus, false, false);
2235
2236         /* Disable and clear interrupts at the chip level also */
2237         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2238         local_hostintmask = bus->hostintmask;
2239         bus->hostintmask = 0;
2240
2241         /* Change our idea of bus state */
2242         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2243
2244         /* Force clocks on backplane to be sure F2 interrupt propagates */
2245         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
2246                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
2247         if (!err) {
2248                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2249                                   (saveclk | SBSDIO_FORCE_HT), &err);
2250         }
2251         if (err)
2252                 brcmf_err("Failed to force clock for F2: err %d\n", err);
2253
2254         /* Turn off the bus (F2), free any pending packets */
2255         brcmf_dbg(INTR, "disable SDIO interrupts\n");
2256         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
2257
2258         /* Clear any pending interrupts now that F2 is disabled */
2259         w_sdreg32(bus, local_hostintmask,
2260                   offsetof(struct sdpcmd_regs, intstatus));
2261
2262         /* Turn off the backplane clock (only) */
2263         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
2264         sdio_release_host(bus->sdiodev->func[1]);
2265
2266         /* Clear the data packet queues */
2267         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2268
2269         /* Clear any held glomming stuff */
2270         if (bus->glomd)
2271                 brcmu_pkt_buf_free_skb(bus->glomd);
2272         brcmf_sdio_free_glom(bus);
2273
2274         /* Clear rx control and wake any waiters */
2275         spin_lock_bh(&bus->rxctl_lock);
2276         bus->rxlen = 0;
2277         spin_unlock_bh(&bus->rxctl_lock);
2278         brcmf_sdio_dcmd_resp_wake(bus);
2279
2280         /* Reset some F2 state stuff */
2281         bus->rxskip = false;
2282         bus->tx_seq = bus->rx_seq = 0;
2283 }
2284
2285 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2286 {
2287         unsigned long flags;
2288
2289         if (bus->sdiodev->oob_irq_requested) {
2290                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2291                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2292                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2293                         bus->sdiodev->irq_en = true;
2294                 }
2295                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2296         }
2297 }
2298
2299 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2300 {
2301         u8 idx;
2302         u32 addr;
2303         unsigned long val;
2304         int n, ret;
2305
2306         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2307         addr = bus->ci->c_inf[idx].base +
2308                offsetof(struct sdpcmd_regs, intstatus);
2309
2310         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2311         bus->sdcnt.f1regdata++;
2312         if (ret != 0)
2313                 val = 0;
2314
2315         val &= bus->hostintmask;
2316         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2317
2318         /* Clear interrupts */
2319         if (val) {
2320                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2321                 bus->sdcnt.f1regdata++;
2322         }
2323
2324         if (ret) {
2325                 atomic_set(&bus->intstatus, 0);
2326         } else if (val) {
2327                 for_each_set_bit(n, &val, 32)
2328                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2329         }
2330
2331         return ret;
2332 }
2333
2334 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2335 {
2336         u32 newstatus = 0;
2337         unsigned long intstatus;
2338         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2339         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2340         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2341         int err = 0, n;
2342
2343         brcmf_dbg(TRACE, "Enter\n");
2344
2345         sdio_claim_host(bus->sdiodev->func[1]);
2346
2347         /* If waiting for HTAVAIL, check status */
2348         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2349                 u8 clkctl, devctl = 0;
2350
2351 #ifdef DEBUG
2352                 /* Check for inconsistent device control */
2353                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2354                                            SBSDIO_DEVICE_CTL, &err);
2355                 if (err) {
2356                         brcmf_err("error reading DEVCTL: %d\n", err);
2357                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2358                 }
2359 #endif                          /* DEBUG */
2360
2361                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2362                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2363                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2364                 if (err) {
2365                         brcmf_err("error reading CSR: %d\n",
2366                                   err);
2367                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2368                 }
2369
2370                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2371                           devctl, clkctl);
2372
2373                 if (SBSDIO_HTAV(clkctl)) {
2374                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2375                                                    SBSDIO_DEVICE_CTL, &err);
2376                         if (err) {
2377                                 brcmf_err("error reading DEVCTL: %d\n",
2378                                           err);
2379                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2380                         }
2381                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2382                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2383                                           devctl, &err);
2384                         if (err) {
2385                                 brcmf_err("error writing DEVCTL: %d\n",
2386                                           err);
2387                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2388                         }
2389                         bus->clkstate = CLK_AVAIL;
2390                 }
2391         }
2392
2393         /* Make sure backplane clock is on */
2394         brcmf_sdio_bus_sleep(bus, false, true);
2395
2396         /* Pending interrupt indicates new device status */
2397         if (atomic_read(&bus->ipend) > 0) {
2398                 atomic_set(&bus->ipend, 0);
2399                 err = brcmf_sdio_intr_rstatus(bus);
2400         }
2401
2402         /* Start with leftover status bits */
2403         intstatus = atomic_xchg(&bus->intstatus, 0);
2404
2405         /* Handle flow-control change: read new state in case our ack
2406          * crossed another change interrupt.  If change still set, assume
2407          * FC ON for safety, let next loop through do the debounce.
2408          */
2409         if (intstatus & I_HMB_FC_CHANGE) {
2410                 intstatus &= ~I_HMB_FC_CHANGE;
2411                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2412                                 offsetof(struct sdpcmd_regs, intstatus));
2413
2414                 err = r_sdreg32(bus, &newstatus,
2415                                 offsetof(struct sdpcmd_regs, intstatus));
2416                 bus->sdcnt.f1regdata += 2;
2417                 atomic_set(&bus->fcstate,
2418                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2419                 intstatus |= (newstatus & bus->hostintmask);
2420         }
2421
2422         /* Handle host mailbox indication */
2423         if (intstatus & I_HMB_HOST_INT) {
2424                 intstatus &= ~I_HMB_HOST_INT;
2425                 intstatus |= brcmf_sdio_hostmail(bus);
2426         }
2427
2428         sdio_release_host(bus->sdiodev->func[1]);
2429
2430         /* Generally don't ask for these, can get CRC errors... */
2431         if (intstatus & I_WR_OOSYNC) {
2432                 brcmf_err("Dongle reports WR_OOSYNC\n");
2433                 intstatus &= ~I_WR_OOSYNC;
2434         }
2435
2436         if (intstatus & I_RD_OOSYNC) {
2437                 brcmf_err("Dongle reports RD_OOSYNC\n");
2438                 intstatus &= ~I_RD_OOSYNC;
2439         }
2440
2441         if (intstatus & I_SBINT) {
2442                 brcmf_err("Dongle reports SBINT\n");
2443                 intstatus &= ~I_SBINT;
2444         }
2445
2446         /* Would be active due to wake-wlan in gSPI */
2447         if (intstatus & I_CHIPACTIVE) {
2448                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2449                 intstatus &= ~I_CHIPACTIVE;
2450         }
2451
2452         /* Ignore frame indications if rxskip is set */
2453         if (bus->rxskip)
2454                 intstatus &= ~I_HMB_FRAME_IND;
2455
2456         /* On frame indication, read available frames */
2457         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2458                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2459                 if (!bus->rxpending)
2460                         intstatus &= ~I_HMB_FRAME_IND;
2461                 rxlimit -= min(framecnt, rxlimit);
2462         }
2463
2464         /* Keep still-pending events for next scheduling */
2465         if (intstatus) {
2466                 for_each_set_bit(n, &intstatus, 32)
2467                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2468         }
2469
2470         brcmf_sdio_clrintr(bus);
2471
2472         if (data_ok(bus) && bus->ctrl_frame_stat &&
2473                 (bus->clkstate == CLK_AVAIL)) {
2474                 int i;
2475
2476                 sdio_claim_host(bus->sdiodev->func[1]);
2477                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2478                                            (u32)bus->ctrl_frame_len);
2479
2480                 if (err < 0) {
2481                         /* On failure, abort the command and
2482                                 terminate the frame */
2483                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2484                                   err);
2485                         bus->sdcnt.tx_sderrs++;
2486
2487                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2488
2489                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2490                                           SFC_WF_TERM, &err);
2491                         bus->sdcnt.f1regdata++;
2492
2493                         for (i = 0; i < 3; i++) {
2494                                 u8 hi, lo;
2495                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2496                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2497                                                        &err);
2498                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2499                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2500                                                        &err);
2501                                 bus->sdcnt.f1regdata += 2;
2502                                 if ((hi == 0) && (lo == 0))
2503                                         break;
2504                         }
2505
2506                 } else {
2507                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2508                 }
2509                 sdio_release_host(bus->sdiodev->func[1]);
2510                 bus->ctrl_frame_stat = false;
2511                 brcmf_sdio_wait_event_wakeup(bus);
2512         }
2513         /* Send queued frames (limit 1 if rx may still be pending) */
2514         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2515                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2516                  && data_ok(bus)) {
2517                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2518                                             txlimit;
2519                 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2520                 txlimit -= framecnt;
2521         }
2522
2523         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2524                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2525                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2526                 atomic_set(&bus->intstatus, 0);
2527         } else if (atomic_read(&bus->intstatus) ||
2528                    atomic_read(&bus->ipend) > 0 ||
2529                    (!atomic_read(&bus->fcstate) &&
2530                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2531                     data_ok(bus)) || PKT_AVAILABLE()) {
2532                 atomic_inc(&bus->dpc_tskcnt);
2533         }
2534
2535         /* If we're done for now, turn off clock request. */
2536         if ((bus->clkstate != CLK_PENDING)
2537             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2538                 bus->activity = false;
2539                 brcmf_dbg(SDIO, "idle state\n");
2540                 sdio_claim_host(bus->sdiodev->func[1]);
2541                 brcmf_sdio_bus_sleep(bus, true, false);
2542                 sdio_release_host(bus->sdiodev->func[1]);
2543         }
2544 }
2545
2546 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2547 {
2548         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2549         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2550         struct brcmf_sdio *bus = sdiodev->bus;
2551
2552         return &bus->txq;
2553 }
2554
2555 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2556 {
2557         int ret = -EBADE;
2558         uint datalen, prec;
2559         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2560         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2561         struct brcmf_sdio *bus = sdiodev->bus;
2562         ulong flags;
2563
2564         brcmf_dbg(TRACE, "Enter\n");
2565
2566         datalen = pkt->len;
2567
2568         /* Add space for the header */
2569         skb_push(pkt, bus->tx_hdrlen);
2570         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2571
2572         prec = prio2prec((pkt->priority & PRIOMASK));
2573
2574         /* Check for existing queue, current flow-control,
2575                          pending event, or pending clock */
2576         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2577         bus->sdcnt.fcqueued++;
2578
2579         /* Priority based enq */
2580         spin_lock_irqsave(&bus->txqlock, flags);
2581         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2582                 skb_pull(pkt, bus->tx_hdrlen);
2583                 brcmf_err("out of bus->txq !!!\n");
2584                 ret = -ENOSR;
2585         } else {
2586                 ret = 0;
2587         }
2588
2589         if (pktq_len(&bus->txq) >= TXHI) {
2590                 bus->txoff = true;
2591                 brcmf_txflowblock(bus->sdiodev->dev, true);
2592         }
2593         spin_unlock_irqrestore(&bus->txqlock, flags);
2594
2595 #ifdef DEBUG
2596         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2597                 qcount[prec] = pktq_plen(&bus->txq, prec);
2598 #endif
2599
2600         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2601                 atomic_inc(&bus->dpc_tskcnt);
2602                 queue_work(bus->brcmf_wq, &bus->datawork);
2603         }
2604
2605         return ret;
2606 }
2607
2608 #ifdef DEBUG
2609 #define CONSOLE_LINE_MAX        192
2610
2611 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2612 {
2613         struct brcmf_console *c = &bus->console;
2614         u8 line[CONSOLE_LINE_MAX], ch;
2615         u32 n, idx, addr;
2616         int rv;
2617
2618         /* Don't do anything until FWREADY updates console address */
2619         if (bus->console_addr == 0)
2620                 return 0;
2621
2622         /* Read console log struct */
2623         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2624         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2625                                sizeof(c->log_le));
2626         if (rv < 0)
2627                 return rv;
2628
2629         /* Allocate console buffer (one time only) */
2630         if (c->buf == NULL) {
2631                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2632                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2633                 if (c->buf == NULL)
2634                         return -ENOMEM;
2635         }
2636
2637         idx = le32_to_cpu(c->log_le.idx);
2638
2639         /* Protect against corrupt value */
2640         if (idx > c->bufsize)
2641                 return -EBADE;
2642
2643         /* Skip reading the console buffer if the index pointer
2644          has not moved */
2645         if (idx == c->last)
2646                 return 0;
2647
2648         /* Read the console buffer */
2649         addr = le32_to_cpu(c->log_le.buf);
2650         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2651         if (rv < 0)
2652                 return rv;
2653
2654         while (c->last != idx) {
2655                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2656                         if (c->last == idx) {
2657                                 /* This would output a partial line.
2658                                  * Instead, back up
2659                                  * the buffer pointer and output this
2660                                  * line next time around.
2661                                  */
2662                                 if (c->last >= n)
2663                                         c->last -= n;
2664                                 else
2665                                         c->last = c->bufsize - n;
2666                                 goto break2;
2667                         }
2668                         ch = c->buf[c->last];
2669                         c->last = (c->last + 1) % c->bufsize;
2670                         if (ch == '\n')
2671                                 break;
2672                         line[n] = ch;
2673                 }
2674
2675                 if (n > 0) {
2676                         if (line[n - 1] == '\r')
2677                                 n--;
2678                         line[n] = 0;
2679                         pr_debug("CONSOLE: %s\n", line);
2680                 }
2681         }
2682 break2:
2683
2684         return 0;
2685 }
2686 #endif                          /* DEBUG */
2687
2688 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2689 {
2690         int i;
2691         int ret;
2692
2693         bus->ctrl_frame_stat = false;
2694         ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2695
2696         if (ret < 0) {
2697                 /* On failure, abort the command and terminate the frame */
2698                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2699                           ret);
2700                 bus->sdcnt.tx_sderrs++;
2701
2702                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2703
2704                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2705                                   SFC_WF_TERM, NULL);
2706                 bus->sdcnt.f1regdata++;
2707
2708                 for (i = 0; i < 3; i++) {
2709                         u8 hi, lo;
2710                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2711                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2712                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2713                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2714                         bus->sdcnt.f1regdata += 2;
2715                         if (hi == 0 && lo == 0)
2716                                 break;
2717                 }
2718                 return ret;
2719         }
2720
2721         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2722
2723         return ret;
2724 }
2725
2726 static int
2727 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2728 {
2729         u8 *frame;
2730         u16 len, pad;
2731         uint retries = 0;
2732         u8 doff = 0;
2733         int ret = -1;
2734         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2735         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2736         struct brcmf_sdio *bus = sdiodev->bus;
2737         struct brcmf_sdio_hdrinfo hd_info = {0};
2738
2739         brcmf_dbg(TRACE, "Enter\n");
2740
2741         /* Back the pointer to make a room for bus header */
2742         frame = msg - bus->tx_hdrlen;
2743         len = (msglen += bus->tx_hdrlen);
2744
2745         /* Add alignment padding (optional for ctl frames) */
2746         doff = ((unsigned long)frame % bus->head_align);
2747         if (doff) {
2748                 frame -= doff;
2749                 len += doff;
2750                 msglen += doff;
2751                 memset(frame, 0, doff + bus->tx_hdrlen);
2752         }
2753         /* precondition: doff < bus->head_align */
2754         doff += bus->tx_hdrlen;
2755
2756         /* Round send length to next SDIO block */
2757         pad = 0;
2758         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2759                 pad = bus->blocksize - (len % bus->blocksize);
2760                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2761                         pad = 0;
2762         } else if (len % bus->head_align) {
2763                 pad = bus->head_align - (len % bus->head_align);
2764         }
2765         len += pad;
2766
2767         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2768
2769         /* Make sure backplane clock is on */
2770         sdio_claim_host(bus->sdiodev->func[1]);
2771         brcmf_sdio_bus_sleep(bus, false, false);
2772         sdio_release_host(bus->sdiodev->func[1]);
2773
2774         hd_info.len = (u16)msglen;
2775         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2776         hd_info.dat_offset = doff;
2777         hd_info.seq_num = bus->tx_seq;
2778         hd_info.lastfrm = true;
2779         hd_info.tail_pad = pad;
2780         brcmf_sdio_hdpack(bus, frame, &hd_info);
2781
2782         if (bus->txglom)
2783                 brcmf_sdio_update_hwhdr(frame, len);
2784
2785         if (!data_ok(bus)) {
2786                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2787                           bus->tx_max, bus->tx_seq);
2788                 bus->ctrl_frame_stat = true;
2789                 /* Send from dpc */
2790                 bus->ctrl_frame_buf = frame;
2791                 bus->ctrl_frame_len = len;
2792
2793                 wait_event_interruptible_timeout(bus->ctrl_wait,
2794                                                  !bus->ctrl_frame_stat,
2795                                                  msecs_to_jiffies(2000));
2796
2797                 if (!bus->ctrl_frame_stat) {
2798                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2799                         ret = 0;
2800                 } else {
2801                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2802                         ret = -1;
2803                 }
2804         }
2805
2806         if (ret == -1) {
2807                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2808                                    frame, len, "Tx Frame:\n");
2809                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2810                                    BRCMF_HDRS_ON(),
2811                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2812
2813                 do {
2814                         sdio_claim_host(bus->sdiodev->func[1]);
2815                         ret = brcmf_sdio_tx_frame(bus, frame, len);
2816                         sdio_release_host(bus->sdiodev->func[1]);
2817                 } while (ret < 0 && retries++ < TXRETRIES);
2818         }
2819
2820         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2821             atomic_read(&bus->dpc_tskcnt) == 0) {
2822                 bus->activity = false;
2823                 sdio_claim_host(bus->sdiodev->func[1]);
2824                 brcmf_dbg(INFO, "idle\n");
2825                 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2826                 sdio_release_host(bus->sdiodev->func[1]);
2827         }
2828
2829         if (ret)
2830                 bus->sdcnt.tx_ctlerrs++;
2831         else
2832                 bus->sdcnt.tx_ctlpkts++;
2833
2834         return ret ? -EIO : 0;
2835 }
2836
2837 #ifdef DEBUG
2838 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2839 {
2840         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2841 }
2842
2843 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2844                                  struct sdpcm_shared *sh)
2845 {
2846         u32 addr;
2847         int rv;
2848         u32 shaddr = 0;
2849         struct sdpcm_shared_le sh_le;
2850         __le32 addr_le;
2851
2852         shaddr = bus->ci->rambase + bus->ramsize - 4;
2853
2854         /*
2855          * Read last word in socram to determine
2856          * address of sdpcm_shared structure
2857          */
2858         sdio_claim_host(bus->sdiodev->func[1]);
2859         brcmf_sdio_bus_sleep(bus, false, false);
2860         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2861         sdio_release_host(bus->sdiodev->func[1]);
2862         if (rv < 0)
2863                 return rv;
2864
2865         addr = le32_to_cpu(addr_le);
2866
2867         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2868
2869         /*
2870          * Check if addr is valid.
2871          * NVRAM length at the end of memory should have been overwritten.
2872          */
2873         if (!brcmf_sdio_valid_shared_address(addr)) {
2874                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2875                                   addr);
2876                         return -EINVAL;
2877         }
2878
2879         /* Read hndrte_shared structure */
2880         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2881                                sizeof(struct sdpcm_shared_le));
2882         if (rv < 0)
2883                 return rv;
2884
2885         /* Endianness */
2886         sh->flags = le32_to_cpu(sh_le.flags);
2887         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2888         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2889         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2890         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2891         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2892         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2893
2894         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2895                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2896                           SDPCM_SHARED_VERSION,
2897                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2898                 return -EPROTO;
2899         }
2900
2901         return 0;
2902 }
2903
2904 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2905                                    struct sdpcm_shared *sh, char __user *data,
2906                                    size_t count)
2907 {
2908         u32 addr, console_ptr, console_size, console_index;
2909         char *conbuf = NULL;
2910         __le32 sh_val;
2911         int rv;
2912         loff_t pos = 0;
2913         int nbytes = 0;
2914
2915         /* obtain console information from device memory */
2916         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2917         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2918                                (u8 *)&sh_val, sizeof(u32));
2919         if (rv < 0)
2920                 return rv;
2921         console_ptr = le32_to_cpu(sh_val);
2922
2923         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2924         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2925                                (u8 *)&sh_val, sizeof(u32));
2926         if (rv < 0)
2927                 return rv;
2928         console_size = le32_to_cpu(sh_val);
2929
2930         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2931         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2932                                (u8 *)&sh_val, sizeof(u32));
2933         if (rv < 0)
2934                 return rv;
2935         console_index = le32_to_cpu(sh_val);
2936
2937         /* allocate buffer for console data */
2938         if (console_size <= CONSOLE_BUFFER_MAX)
2939                 conbuf = vzalloc(console_size+1);
2940
2941         if (!conbuf)
2942                 return -ENOMEM;
2943
2944         /* obtain the console data from device */
2945         conbuf[console_size] = '\0';
2946         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2947                                console_size);
2948         if (rv < 0)
2949                 goto done;
2950
2951         rv = simple_read_from_buffer(data, count, &pos,
2952                                      conbuf + console_index,
2953                                      console_size - console_index);
2954         if (rv < 0)
2955                 goto done;
2956
2957         nbytes = rv;
2958         if (console_index > 0) {
2959                 pos = 0;
2960                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2961                                              conbuf, console_index - 1);
2962                 if (rv < 0)
2963                         goto done;
2964                 rv += nbytes;
2965         }
2966 done:
2967         vfree(conbuf);
2968         return rv;
2969 }
2970
2971 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2972                                 char __user *data, size_t count)
2973 {
2974         int error, res;
2975         char buf[350];
2976         struct brcmf_trap_info tr;
2977         loff_t pos = 0;
2978
2979         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2980                 brcmf_dbg(INFO, "no trap in firmware\n");
2981                 return 0;
2982         }
2983
2984         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2985                                   sizeof(struct brcmf_trap_info));
2986         if (error < 0)
2987                 return error;
2988
2989         res = scnprintf(buf, sizeof(buf),
2990                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2991                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2992                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2993                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2994                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2995                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2996                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2997                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2998                         le32_to_cpu(tr.pc), sh->trap_addr,
2999                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3000                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3001                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3002                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3003
3004         return simple_read_from_buffer(data, count, &pos, buf, res);
3005 }
3006
3007 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3008                                   struct sdpcm_shared *sh, char __user *data,
3009                                   size_t count)
3010 {
3011         int error = 0;
3012         char buf[200];
3013         char file[80] = "?";
3014         char expr[80] = "<???>";
3015         int res;
3016         loff_t pos = 0;
3017
3018         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3019                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3020                 return 0;
3021         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3022                 brcmf_dbg(INFO, "no assert in dongle\n");
3023                 return 0;
3024         }
3025
3026         sdio_claim_host(bus->sdiodev->func[1]);
3027         if (sh->assert_file_addr != 0) {
3028                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3029                                           sh->assert_file_addr, (u8 *)file, 80);
3030                 if (error < 0)
3031                         return error;
3032         }
3033         if (sh->assert_exp_addr != 0) {
3034                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3035                                           sh->assert_exp_addr, (u8 *)expr, 80);
3036                 if (error < 0)
3037                         return error;
3038         }
3039         sdio_release_host(bus->sdiodev->func[1]);
3040
3041         res = scnprintf(buf, sizeof(buf),
3042                         "dongle assert: %s:%d: assert(%s)\n",
3043                         file, sh->assert_line, expr);
3044         return simple_read_from_buffer(data, count, &pos, buf, res);
3045 }
3046
3047 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3048 {
3049         int error;
3050         struct sdpcm_shared sh;
3051
3052         error = brcmf_sdio_readshared(bus, &sh);
3053
3054         if (error < 0)
3055                 return error;
3056
3057         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3058                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3059         else if (sh.flags & SDPCM_SHARED_ASSERT)
3060                 brcmf_err("assertion in dongle\n");
3061
3062         if (sh.flags & SDPCM_SHARED_TRAP)
3063                 brcmf_err("firmware trap in dongle\n");
3064
3065         return 0;
3066 }
3067
3068 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3069                                 size_t count, loff_t *ppos)
3070 {
3071         int error = 0;
3072         struct sdpcm_shared sh;
3073         int nbytes = 0;
3074         loff_t pos = *ppos;
3075
3076         if (pos != 0)
3077                 return 0;
3078
3079         error = brcmf_sdio_readshared(bus, &sh);
3080         if (error < 0)
3081                 goto done;
3082
3083         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3084         if (error < 0)
3085                 goto done;
3086         nbytes = error;
3087
3088         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3089         if (error < 0)
3090                 goto done;
3091         nbytes += error;
3092
3093         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3094         if (error < 0)
3095                 goto done;
3096         nbytes += error;
3097
3098         error = nbytes;
3099         *ppos += nbytes;
3100 done:
3101         return error;
3102 }
3103
3104 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3105                                         size_t count, loff_t *ppos)
3106 {
3107         struct brcmf_sdio *bus = f->private_data;
3108         int res;
3109
3110         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3111         if (res > 0)
3112                 *ppos += res;
3113         return (ssize_t)res;
3114 }
3115
3116 static const struct file_operations brcmf_sdio_forensic_ops = {
3117         .owner = THIS_MODULE,
3118         .open = simple_open,
3119         .read = brcmf_sdio_forensic_read
3120 };
3121
3122 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3123 {
3124         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3125         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3126
3127         if (IS_ERR_OR_NULL(dentry))
3128                 return;
3129
3130         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3131                             &brcmf_sdio_forensic_ops);
3132         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3133 }
3134 #else
3135 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3136 {
3137         return 0;
3138 }
3139
3140 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3141 {
3142 }
3143 #endif /* DEBUG */
3144
3145 static int
3146 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3147 {
3148         int timeleft;
3149         uint rxlen = 0;
3150         bool pending;
3151         u8 *buf;
3152         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3153         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3154         struct brcmf_sdio *bus = sdiodev->bus;
3155
3156         brcmf_dbg(TRACE, "Enter\n");
3157
3158         /* Wait until control frame is available */
3159         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3160
3161         spin_lock_bh(&bus->rxctl_lock);
3162         rxlen = bus->rxlen;
3163         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3164         bus->rxctl = NULL;
3165         buf = bus->rxctl_orig;
3166         bus->rxctl_orig = NULL;
3167         bus->rxlen = 0;
3168         spin_unlock_bh(&bus->rxctl_lock);
3169         vfree(buf);
3170
3171         if (rxlen) {
3172                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3173                           rxlen, msglen);
3174         } else if (timeleft == 0) {
3175                 brcmf_err("resumed on timeout\n");
3176                 brcmf_sdio_checkdied(bus);
3177         } else if (pending) {
3178                 brcmf_dbg(CTL, "cancelled\n");
3179                 return -ERESTARTSYS;
3180         } else {
3181                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3182                 brcmf_sdio_checkdied(bus);
3183         }
3184
3185         if (rxlen)
3186                 bus->sdcnt.rx_ctlpkts++;
3187         else
3188                 bus->sdcnt.rx_ctlerrs++;
3189
3190         return rxlen ? (int)rxlen : -ETIMEDOUT;
3191 }
3192
3193 static bool brcmf_sdio_download_state(struct brcmf_sdio *bus, bool enter)
3194 {
3195         struct chip_info *ci = bus->ci;
3196
3197         /* To enter download state, disable ARM and reset SOCRAM.
3198          * To exit download state, simply reset ARM (default is RAM boot).
3199          */
3200         if (enter) {
3201                 bus->alp_only = true;
3202
3203                 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3204         } else {
3205                 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3206                                                    bus->varsz))
3207                         return false;
3208
3209                 /* Allow HT Clock now that the ARM is running. */
3210                 bus->alp_only = false;
3211
3212                 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3213         }
3214
3215         return true;
3216 }
3217
3218 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus)
3219 {
3220         const struct firmware *fw;
3221         int err;
3222         int offset;
3223         int address;
3224         int len;
3225
3226         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3227         if (fw == NULL)
3228                 return -ENOENT;
3229
3230         if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3231             BRCMF_MAX_CORENUM)
3232                 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3233
3234         err = 0;
3235         offset = 0;
3236         address = bus->ci->rambase;
3237         while (offset < fw->size) {
3238                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3239                       fw->size - offset;
3240                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3241                                         (u8 *)&fw->data[offset], len);
3242                 if (err) {
3243                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3244                                   err, len, address);
3245                         goto failure;
3246                 }
3247                 offset += len;
3248                 address += len;
3249         }
3250
3251 failure:
3252         release_firmware(fw);
3253
3254         return err;
3255 }
3256
3257 /*
3258  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3259  * and ending in a NUL.
3260  * Removes carriage returns, empty lines, comment lines, and converts
3261  * newlines to NULs.
3262  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
3263  * by two NULs.
3264 */
3265
3266 static int brcmf_sdio_strip_nvram(struct brcmf_sdio *bus,
3267                                   const struct firmware *nv)
3268 {
3269         char *varbuf;
3270         char *dp;
3271         bool findNewline;
3272         int column;
3273         int ret = 0;
3274         uint buf_len, n, len;
3275
3276         len = nv->size;
3277         varbuf = vmalloc(len);
3278         if (!varbuf)
3279                 return -ENOMEM;
3280
3281         memcpy(varbuf, nv->data, len);
3282         dp = varbuf;
3283
3284         findNewline = false;
3285         column = 0;
3286
3287         for (n = 0; n < len; n++) {
3288                 if (varbuf[n] == 0)
3289                         break;
3290                 if (varbuf[n] == '\r')
3291                         continue;
3292                 if (findNewline && varbuf[n] != '\n')
3293                         continue;
3294                 findNewline = false;
3295                 if (varbuf[n] == '#') {
3296                         findNewline = true;
3297                         continue;
3298                 }
3299                 if (varbuf[n] == '\n') {
3300                         if (column == 0)
3301                                 continue;
3302                         *dp++ = 0;
3303                         column = 0;
3304                         continue;
3305                 }
3306                 *dp++ = varbuf[n];
3307                 column++;
3308         }
3309         buf_len = dp - varbuf;
3310         while (dp < varbuf + n)
3311                 *dp++ = 0;
3312
3313         kfree(bus->vars);
3314         /* roundup needed for download to device */
3315         bus->varsz = roundup(buf_len + 1, 4);
3316         bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3317         if (bus->vars == NULL) {
3318                 bus->varsz = 0;
3319                 ret = -ENOMEM;
3320                 goto err;
3321         }
3322
3323         /* copy the processed variables and add null termination */
3324         memcpy(bus->vars, varbuf, buf_len);
3325         bus->vars[buf_len] = 0;
3326 err:
3327         vfree(varbuf);
3328         return ret;
3329 }
3330
3331 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus)
3332 {
3333         const struct firmware *nv;
3334         int ret;
3335
3336         nv = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3337         if (nv == NULL)
3338                 return -ENOENT;
3339
3340         ret = brcmf_sdio_strip_nvram(bus, nv);
3341
3342         release_firmware(nv);
3343
3344         return ret;
3345 }
3346
3347 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3348 {
3349         int bcmerror = -EFAULT;
3350
3351
3352         sdio_claim_host(bus->sdiodev->func[1]);
3353         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3354
3355         /* Keep arm in reset */
3356         if (!brcmf_sdio_download_state(bus, true)) {
3357                 brcmf_err("error placing ARM core in reset\n");
3358                 goto err;
3359         }
3360
3361         if (brcmf_sdio_download_code_file(bus)) {
3362                 brcmf_err("dongle image file download failed\n");
3363                 goto err;
3364         }
3365
3366         if (brcmf_sdio_download_nvram(bus)) {
3367                 brcmf_err("dongle nvram file download failed\n");
3368                 goto err;
3369         }
3370
3371         /* Take arm out of reset */
3372         if (!brcmf_sdio_download_state(bus, false)) {
3373                 brcmf_err("error getting out of ARM core reset\n");
3374                 goto err;
3375         }
3376
3377         bcmerror = 0;
3378
3379 err:
3380         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3381         sdio_release_host(bus->sdiodev->func[1]);
3382         return bcmerror;
3383 }
3384
3385 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3386 {
3387         u32 addr, reg;
3388
3389         brcmf_dbg(TRACE, "Enter\n");
3390
3391         /* old chips with PMU version less than 17 don't support save restore */
3392         if (bus->ci->pmurev < 17)
3393                 return false;
3394
3395         /* read PMU chipcontrol register 3*/
3396         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3397         brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3398         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3399         reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3400
3401         return (bool)reg;
3402 }
3403
3404 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3405 {
3406         int err = 0;
3407         u8 val;
3408
3409         brcmf_dbg(TRACE, "Enter\n");
3410
3411         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3412         if (err) {
3413                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3414                 return;
3415         }
3416
3417         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3418         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3419         if (err) {
3420                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3421                 return;
3422         }
3423
3424         /* Add CMD14 Support */
3425         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3426                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3427                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3428                           &err);
3429         if (err) {
3430                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3431                 return;
3432         }
3433
3434         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3435                           SBSDIO_FORCE_HT, &err);
3436         if (err) {
3437                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3438                 return;
3439         }
3440
3441         /* set flag */
3442         bus->sr_enabled = true;
3443         brcmf_dbg(INFO, "SR enabled\n");
3444 }
3445
3446 /* enable KSO bit */
3447 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3448 {
3449         u8 val;
3450         int err = 0;
3451
3452         brcmf_dbg(TRACE, "Enter\n");
3453
3454         /* KSO bit added in SDIO core rev 12 */
3455         if (bus->ci->c_inf[1].rev < 12)
3456                 return 0;
3457
3458         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3459         if (err) {
3460                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3461                 return err;
3462         }
3463
3464         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3465                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3466                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3467                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3468                                   val, &err);
3469                 if (err) {
3470                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3471                         return err;
3472                 }
3473         }
3474
3475         return 0;
3476 }
3477
3478
3479 static int brcmf_sdio_bus_preinit(struct device *dev)
3480 {
3481         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3482         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3483         struct brcmf_sdio *bus = sdiodev->bus;
3484         uint pad_size;
3485         u32 value;
3486         u8 idx;
3487         int err;
3488
3489         /* the commands below use the terms tx and rx from
3490          * a device perspective, ie. bus:txglom affects the
3491          * bus transfers from device to host.
3492          */
3493         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3494         if (bus->ci->c_inf[idx].rev < 12) {
3495                 /* for sdio core rev < 12, disable txgloming */
3496                 value = 0;
3497                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3498                                            sizeof(u32));
3499         } else {
3500                 /* otherwise, set txglomalign */
3501                 value = 4;
3502                 if (sdiodev->pdata)
3503                         value = sdiodev->pdata->sd_sgentry_align;
3504                 /* SDIO ADMA requires at least 32 bit alignment */
3505                 value = max_t(u32, value, 4);
3506                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3507                                            sizeof(u32));
3508         }
3509
3510         if (err < 0)
3511                 goto done;
3512
3513         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3514         if (sdiodev->sg_support) {
3515                 bus->txglom = false;
3516                 value = 1;
3517                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3518                 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3519                 if (!bus->txglom_sgpad)
3520                         brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3521
3522                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3523                                            &value, sizeof(u32));
3524                 if (err < 0) {
3525                         /* bus:rxglom is allowed to fail */
3526                         err = 0;
3527                 } else {
3528                         bus->txglom = true;
3529                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3530                 }
3531         }
3532         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3533
3534 done:
3535         return err;
3536 }
3537
3538 static int brcmf_sdio_bus_init(struct device *dev)
3539 {
3540         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3541         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3542         struct brcmf_sdio *bus = sdiodev->bus;
3543         int err, ret = 0;
3544         u8 saveclk;
3545
3546         brcmf_dbg(TRACE, "Enter\n");
3547
3548         /* try to download image and nvram to the dongle */
3549         if (bus_if->state == BRCMF_BUS_DOWN) {
3550                 err = brcmf_sdio_download_firmware(bus);
3551                 if (err)
3552                         return err;
3553         }
3554
3555         if (!bus->sdiodev->bus_if->drvr)
3556                 return 0;
3557
3558         /* Start the watchdog timer */
3559         bus->sdcnt.tickcnt = 0;
3560         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3561
3562         sdio_claim_host(bus->sdiodev->func[1]);
3563
3564         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3565         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3566         if (bus->clkstate != CLK_AVAIL)
3567                 goto exit;
3568
3569         /* Force clocks on backplane to be sure F2 interrupt propagates */
3570         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3571                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3572         if (!err) {
3573                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3574                                   (saveclk | SBSDIO_FORCE_HT), &err);
3575         }
3576         if (err) {
3577                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3578                 goto exit;
3579         }
3580
3581         /* Enable function 2 (frame transfers) */
3582         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3583                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3584         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3585
3586
3587         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3588
3589         /* If F2 successfully enabled, set core and enable interrupts */
3590         if (!err) {
3591                 /* Set up the interrupt mask and enable interrupts */
3592                 bus->hostintmask = HOSTINTMASK;
3593                 w_sdreg32(bus, bus->hostintmask,
3594                           offsetof(struct sdpcmd_regs, hostintmask));
3595
3596                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3597         } else {
3598                 /* Disable F2 again */
3599                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3600                 ret = -ENODEV;
3601         }
3602
3603         if (brcmf_sdio_sr_capable(bus)) {
3604                 brcmf_sdio_sr_init(bus);
3605         } else {
3606                 /* Restore previous clock setting */
3607                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3608                                   saveclk, &err);
3609         }
3610
3611         if (ret == 0) {
3612                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3613                 if (ret != 0)
3614                         brcmf_err("intr register failed:%d\n", ret);
3615         }
3616
3617         /* If we didn't come up, turn off backplane clock */
3618         if (bus_if->state != BRCMF_BUS_DATA)
3619                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3620
3621 exit:
3622         sdio_release_host(bus->sdiodev->func[1]);
3623
3624         return ret;
3625 }
3626
3627 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3628 {
3629         brcmf_dbg(TRACE, "Enter\n");
3630
3631         if (!bus) {
3632                 brcmf_err("bus is null pointer, exiting\n");
3633                 return;
3634         }
3635
3636         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3637                 brcmf_err("bus is down. we have nothing to do\n");
3638                 return;
3639         }
3640         /* Count the interrupt call */
3641         bus->sdcnt.intrcount++;
3642         if (in_interrupt())
3643                 atomic_set(&bus->ipend, 1);
3644         else
3645                 if (brcmf_sdio_intr_rstatus(bus)) {
3646                         brcmf_err("failed backplane access\n");
3647                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3648                 }
3649
3650         /* Disable additional interrupts (is this needed now)? */
3651         if (!bus->intr)
3652                 brcmf_err("isr w/o interrupt configured!\n");
3653
3654         atomic_inc(&bus->dpc_tskcnt);
3655         queue_work(bus->brcmf_wq, &bus->datawork);
3656 }
3657
3658 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3659 {
3660 #ifdef DEBUG
3661         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3662 #endif  /* DEBUG */
3663
3664         brcmf_dbg(TIMER, "Enter\n");
3665
3666         /* Poll period: check device if appropriate. */
3667         if (!bus->sr_enabled &&
3668             bus->poll && (++bus->polltick >= bus->pollrate)) {
3669                 u32 intstatus = 0;
3670
3671                 /* Reset poll tick */
3672                 bus->polltick = 0;
3673
3674                 /* Check device if no interrupts */
3675                 if (!bus->intr ||
3676                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3677
3678                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3679                                 u8 devpend;
3680
3681                                 sdio_claim_host(bus->sdiodev->func[1]);
3682                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3683                                                             SDIO_CCCR_INTx,
3684                                                             NULL);
3685                                 sdio_release_host(bus->sdiodev->func[1]);
3686                                 intstatus =
3687                                     devpend & (INTR_STATUS_FUNC1 |
3688                                                INTR_STATUS_FUNC2);
3689                         }
3690
3691                         /* If there is something, make like the ISR and
3692                                  schedule the DPC */
3693                         if (intstatus) {
3694                                 bus->sdcnt.pollcnt++;
3695                                 atomic_set(&bus->ipend, 1);
3696
3697                                 atomic_inc(&bus->dpc_tskcnt);
3698                                 queue_work(bus->brcmf_wq, &bus->datawork);
3699                         }
3700                 }
3701
3702                 /* Update interrupt tracking */
3703                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3704         }
3705 #ifdef DEBUG
3706         /* Poll for console output periodically */
3707         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3708             bus->console_interval != 0) {
3709                 bus->console.count += BRCMF_WD_POLL_MS;
3710                 if (bus->console.count >= bus->console_interval) {
3711                         bus->console.count -= bus->console_interval;
3712                         sdio_claim_host(bus->sdiodev->func[1]);
3713                         /* Make sure backplane clock is on */
3714                         brcmf_sdio_bus_sleep(bus, false, false);
3715                         if (brcmf_sdio_readconsole(bus) < 0)
3716                                 /* stop on error */
3717                                 bus->console_interval = 0;
3718                         sdio_release_host(bus->sdiodev->func[1]);
3719                 }
3720         }
3721 #endif                          /* DEBUG */
3722
3723         /* On idle timeout clear activity flag and/or turn off clock */
3724         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3725                 if (++bus->idlecount >= bus->idletime) {
3726                         bus->idlecount = 0;
3727                         if (bus->activity) {
3728                                 bus->activity = false;
3729                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3730                         } else {
3731                                 brcmf_dbg(SDIO, "idle\n");
3732                                 sdio_claim_host(bus->sdiodev->func[1]);
3733                                 brcmf_sdio_bus_sleep(bus, true, false);
3734                                 sdio_release_host(bus->sdiodev->func[1]);
3735                         }
3736                 }
3737         }
3738
3739         return (atomic_read(&bus->ipend) > 0);
3740 }
3741
3742 static void brcmf_sdio_dataworker(struct work_struct *work)
3743 {
3744         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3745                                               datawork);
3746
3747         while (atomic_read(&bus->dpc_tskcnt)) {
3748                 brcmf_sdio_dpc(bus);
3749                 atomic_dec(&bus->dpc_tskcnt);
3750         }
3751 }
3752
3753 static void brcmf_sdio_release_malloc(struct brcmf_sdio *bus)
3754 {
3755         brcmf_dbg(TRACE, "Enter\n");
3756
3757         kfree(bus->rxbuf);
3758         bus->rxctl = bus->rxbuf = NULL;
3759         bus->rxlen = 0;
3760 }
3761
3762 static bool brcmf_sdio_probe_malloc(struct brcmf_sdio *bus)
3763 {
3764         brcmf_dbg(TRACE, "Enter\n");
3765
3766         if (bus->sdiodev->bus_if->maxctl) {
3767                 bus->rxblen =
3768                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3769                             ALIGNMENT) + bus->head_align;
3770                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3771                 if (!(bus->rxbuf))
3772                         return false;
3773         }
3774
3775         return true;
3776 }
3777
3778 static bool
3779 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3780 {
3781         u8 clkctl = 0;
3782         int err = 0;
3783         int reg_addr;
3784         u32 reg_val;
3785         u32 drivestrength;
3786
3787         bus->alp_only = true;
3788
3789         sdio_claim_host(bus->sdiodev->func[1]);
3790
3791         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3792                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3793
3794         /*
3795          * Force PLL off until brcmf_sdio_chip_attach()
3796          * programs PLL control regs
3797          */
3798
3799         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3800                           BRCMF_INIT_CLKCTL1, &err);
3801         if (!err)
3802                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3803                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3804
3805         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3806                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3807                           err, BRCMF_INIT_CLKCTL1, clkctl);
3808                 goto fail;
3809         }
3810
3811         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3812                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3813                 goto fail;
3814         }
3815
3816         if (brcmf_sdio_kso_init(bus)) {
3817                 brcmf_err("error enabling KSO\n");
3818                 goto fail;
3819         }
3820
3821         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3822                 drivestrength = bus->sdiodev->pdata->drive_strength;
3823         else
3824                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3825         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3826
3827         /* Get info on the SOCRAM cores... */
3828         bus->ramsize = bus->ci->ramsize;
3829         if (!(bus->ramsize)) {
3830                 brcmf_err("failed to find SOCRAM memory!\n");
3831                 goto fail;
3832         }
3833
3834         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3835         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3836                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3837         if (err)
3838                 goto fail;
3839
3840         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3841
3842         brcmf_sdiod_regwb(bus->sdiodev,
3843                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3844         if (err)
3845                 goto fail;
3846
3847         /* set PMUControl so a backplane reset does PMU state reload */
3848         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3849                                pmucontrol);
3850         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3851                                     reg_addr,
3852                                     &err);
3853         if (err)
3854                 goto fail;
3855
3856         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3857
3858         brcmf_sdiod_regwl(bus->sdiodev,
3859                           reg_addr,
3860                           reg_val,
3861                           &err);
3862         if (err)
3863                 goto fail;
3864
3865
3866         sdio_release_host(bus->sdiodev->func[1]);
3867
3868         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3869
3870         /* allocate header buffer */
3871         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3872         if (!bus->hdrbuf)
3873                 return false;
3874         /* Locate an appropriately-aligned portion of hdrbuf */
3875         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3876                                     bus->head_align);
3877
3878         /* Set the poll and/or interrupt flags */
3879         bus->intr = true;
3880         bus->poll = false;
3881         if (bus->poll)
3882                 bus->pollrate = 1;
3883
3884         return true;
3885
3886 fail:
3887         sdio_release_host(bus->sdiodev->func[1]);
3888         return false;
3889 }
3890
3891 static bool brcmf_sdio_probe_init(struct brcmf_sdio *bus)
3892 {
3893         brcmf_dbg(TRACE, "Enter\n");
3894
3895         sdio_claim_host(bus->sdiodev->func[1]);
3896
3897         /* Disable F2 to clear any intermediate frame state on the dongle */
3898         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3899
3900         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3901         bus->rxflow = false;
3902
3903         /* Done with backplane-dependent accesses, can drop clock... */
3904         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3905
3906         sdio_release_host(bus->sdiodev->func[1]);
3907
3908         /* ...and initialize clock/power states */
3909         bus->clkstate = CLK_SDONLY;
3910         bus->idletime = BRCMF_IDLE_INTERVAL;
3911         bus->idleclock = BRCMF_IDLE_ACTIVE;
3912
3913         /* Query the F2 block size, set roundup accordingly */
3914         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3915         bus->roundup = min(max_roundup, bus->blocksize);
3916
3917         /* SR state */
3918         bus->sleeping = false;
3919         bus->sr_enabled = false;
3920
3921         return true;
3922 }
3923
3924 static int
3925 brcmf_sdio_watchdog_thread(void *data)
3926 {
3927         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3928
3929         allow_signal(SIGTERM);
3930         /* Run until signal received */
3931         while (1) {
3932                 if (kthread_should_stop())
3933                         break;
3934                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3935                         brcmf_sdio_bus_watchdog(bus);
3936                         /* Count the tick for reference */
3937                         bus->sdcnt.tickcnt++;
3938                 } else
3939                         break;
3940         }
3941         return 0;
3942 }
3943
3944 static void
3945 brcmf_sdio_watchdog(unsigned long data)
3946 {
3947         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3948
3949         if (bus->watchdog_tsk) {
3950                 complete(&bus->watchdog_wait);
3951                 /* Reschedule the watchdog */
3952                 if (bus->wd_timer_valid)
3953                         mod_timer(&bus->timer,
3954                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3955         }
3956 }
3957
3958 static void brcmf_sdio_release_dongle(struct brcmf_sdio *bus)
3959 {
3960         brcmf_dbg(TRACE, "Enter\n");
3961
3962         if (bus->ci) {
3963                 sdio_claim_host(bus->sdiodev->func[1]);
3964                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3965                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3966                 sdio_release_host(bus->sdiodev->func[1]);
3967                 brcmf_sdio_chip_detach(&bus->ci);
3968                 if (bus->vars && bus->varsz)
3969                         kfree(bus->vars);
3970                 bus->vars = NULL;
3971         }
3972
3973         brcmf_dbg(TRACE, "Disconnected\n");
3974 }
3975
3976 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3977         .stop = brcmf_sdio_bus_stop,
3978         .preinit = brcmf_sdio_bus_preinit,
3979         .init = brcmf_sdio_bus_init,
3980         .txdata = brcmf_sdio_bus_txdata,
3981         .txctl = brcmf_sdio_bus_txctl,
3982         .rxctl = brcmf_sdio_bus_rxctl,
3983         .gettxq = brcmf_sdio_bus_gettxq,
3984 };
3985
3986 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3987 {
3988         int ret;
3989         struct brcmf_sdio *bus;
3990
3991         brcmf_dbg(TRACE, "Enter\n");
3992
3993         /* Allocate private bus interface state */
3994         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3995         if (!bus)
3996                 goto fail;
3997
3998         bus->sdiodev = sdiodev;
3999         sdiodev->bus = bus;
4000         skb_queue_head_init(&bus->glom);
4001         bus->txbound = BRCMF_TXBOUND;
4002         bus->rxbound = BRCMF_RXBOUND;
4003         bus->txminmax = BRCMF_TXMINMAX;
4004         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4005
4006         /* platform specific configuration:
4007          *   alignments must be at least 4 bytes for ADMA
4008          */
4009         bus->head_align = ALIGNMENT;
4010         bus->sgentry_align = ALIGNMENT;
4011         if (sdiodev->pdata) {
4012                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4013                         bus->head_align = sdiodev->pdata->sd_head_align;
4014                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4015                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4016         }
4017
4018         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4019         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4020         if (bus->brcmf_wq == NULL) {
4021                 brcmf_err("insufficient memory to create txworkqueue\n");
4022                 goto fail;
4023         }
4024
4025         /* attempt to attach to the dongle */
4026         if (!(brcmf_sdio_probe_attach(bus))) {
4027                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4028                 goto fail;
4029         }
4030
4031         spin_lock_init(&bus->rxctl_lock);
4032         spin_lock_init(&bus->txqlock);
4033         init_waitqueue_head(&bus->ctrl_wait);
4034         init_waitqueue_head(&bus->dcmd_resp_wait);
4035
4036         /* Set up the watchdog timer */
4037         init_timer(&bus->timer);
4038         bus->timer.data = (unsigned long)bus;
4039         bus->timer.function = brcmf_sdio_watchdog;
4040
4041         /* Initialize watchdog thread */
4042         init_completion(&bus->watchdog_wait);
4043         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4044                                         bus, "brcmf_watchdog");
4045         if (IS_ERR(bus->watchdog_tsk)) {
4046                 pr_warn("brcmf_watchdog thread failed to start\n");
4047                 bus->watchdog_tsk = NULL;
4048         }
4049         /* Initialize DPC thread */
4050         atomic_set(&bus->dpc_tskcnt, 0);
4051
4052         /* Assign bus interface call back */
4053         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4054         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4055         bus->sdiodev->bus_if->chip = bus->ci->chip;
4056         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4057
4058         /* default sdio bus header length for tx packet */
4059         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4060
4061         /* Attach to the common layer, reserve hdr space */
4062         ret = brcmf_attach(bus->sdiodev->dev);
4063         if (ret != 0) {
4064                 brcmf_err("brcmf_attach failed\n");
4065                 goto fail;
4066         }
4067
4068         /* Allocate buffers */
4069         if (!(brcmf_sdio_probe_malloc(bus))) {
4070                 brcmf_err("brcmf_sdio_probe_malloc failed\n");
4071                 goto fail;
4072         }
4073
4074         if (!(brcmf_sdio_probe_init(bus))) {
4075                 brcmf_err("brcmf_sdio_probe_init failed\n");
4076                 goto fail;
4077         }
4078
4079         brcmf_sdio_debugfs_create(bus);
4080         brcmf_dbg(INFO, "completed!!\n");
4081
4082         /* if firmware path present try to download and bring up bus */
4083         ret = brcmf_bus_start(bus->sdiodev->dev);
4084         if (ret != 0) {
4085                 brcmf_err("dongle is not responding\n");
4086                 goto fail;
4087         }
4088
4089         return bus;
4090
4091 fail:
4092         brcmf_sdio_remove(bus);
4093         return NULL;
4094 }
4095
4096 /* Detach and free everything */
4097 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4098 {
4099         brcmf_dbg(TRACE, "Enter\n");
4100
4101         if (bus) {
4102                 /* De-register interrupt handler */
4103                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4104
4105                 cancel_work_sync(&bus->datawork);
4106                 if (bus->brcmf_wq)
4107                         destroy_workqueue(bus->brcmf_wq);
4108
4109                 if (bus->sdiodev->bus_if->drvr) {
4110                         brcmf_detach(bus->sdiodev->dev);
4111                         brcmf_sdio_release_dongle(bus);
4112                 }
4113
4114                 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4115                 brcmf_sdio_release_malloc(bus);
4116                 kfree(bus->hdrbuf);
4117                 kfree(bus);
4118         }
4119
4120         brcmf_dbg(TRACE, "Disconnected\n");
4121 }
4122
4123 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4124 {
4125         /* Totally stop the timer */
4126         if (!wdtick && bus->wd_timer_valid) {
4127                 del_timer_sync(&bus->timer);
4128                 bus->wd_timer_valid = false;
4129                 bus->save_ms = wdtick;
4130                 return;
4131         }
4132
4133         /* don't start the wd until fw is loaded */
4134         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4135                 return;
4136
4137         if (wdtick) {
4138                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4139                         if (bus->wd_timer_valid)
4140                                 /* Stop timer and restart at new value */
4141                                 del_timer_sync(&bus->timer);
4142
4143                         /* Create timer again when watchdog period is
4144                            dynamically changed or in the first instance
4145                          */
4146                         bus->timer.expires =
4147                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4148                         add_timer(&bus->timer);
4149
4150                 } else {
4151                         /* Re arm the timer, at last watchdog period */
4152                         mod_timer(&bus->timer,
4153                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4154                 }
4155
4156                 bus->wd_timer_valid = true;
4157                 bus->save_ms = wdtick;
4158         }
4159 }