3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
63 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
65 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66 static int modparam_pio;
67 module_param_named(pio, modparam_pio, int, 0444);
68 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
69 #elif defined(CONFIG_B43LEGACY_DMA)
70 # define modparam_pio 0
71 #elif defined(CONFIG_B43LEGACY_PIO)
72 # define modparam_pio 1
75 static int modparam_bad_frames_preempt;
76 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
77 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
80 static char modparam_fwpostfix[16];
81 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
82 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
84 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
85 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
86 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
90 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
93 /* Channel and ratetables are shared for all devices.
94 * They can't be const, because ieee80211 puts some precalculated
95 * data in there. This data is the same for all devices, so we don't
96 * get concurrency issues */
97 #define RATETAB_ENT(_rateid, _flags) \
99 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
100 .hw_value = (_rateid), \
104 * NOTE: When changing this, sync with xmit.c's
105 * b43legacy_plcp_get_bitrate_idx_* functions!
107 static struct ieee80211_rate __b43legacy_ratetable[] = {
108 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
109 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
110 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
111 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
112 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
113 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
119 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
121 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
122 #define b43legacy_b_ratetable_size 4
123 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
124 #define b43legacy_g_ratetable_size 12
126 #define CHANTAB_ENT(_chanid, _freq) \
128 .center_freq = (_freq), \
129 .hw_value = (_chanid), \
131 static struct ieee80211_channel b43legacy_bg_chantable[] = {
132 CHANTAB_ENT(1, 2412),
133 CHANTAB_ENT(2, 2417),
134 CHANTAB_ENT(3, 2422),
135 CHANTAB_ENT(4, 2427),
136 CHANTAB_ENT(5, 2432),
137 CHANTAB_ENT(6, 2437),
138 CHANTAB_ENT(7, 2442),
139 CHANTAB_ENT(8, 2447),
140 CHANTAB_ENT(9, 2452),
141 CHANTAB_ENT(10, 2457),
142 CHANTAB_ENT(11, 2462),
143 CHANTAB_ENT(12, 2467),
144 CHANTAB_ENT(13, 2472),
145 CHANTAB_ENT(14, 2484),
148 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
149 .channels = b43legacy_bg_chantable,
150 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
151 .bitrates = b43legacy_b_ratetable,
152 .n_bitrates = b43legacy_b_ratetable_size,
155 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
156 .channels = b43legacy_bg_chantable,
157 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
158 .bitrates = b43legacy_g_ratetable,
159 .n_bitrates = b43legacy_g_ratetable_size,
162 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
163 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
164 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
165 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
168 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
170 if (!wl || !wl->current_dev)
172 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
174 /* We are up and running.
175 * Ratelimit the messages to avoid DoS over the net. */
176 return net_ratelimit();
179 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
183 if (!b43legacy_ratelimit(wl))
186 printk(KERN_INFO "b43legacy-%s: ",
187 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
192 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
196 if (!b43legacy_ratelimit(wl))
199 printk(KERN_ERR "b43legacy-%s ERROR: ",
200 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
205 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
209 if (!b43legacy_ratelimit(wl))
212 printk(KERN_WARNING "b43legacy-%s warning: ",
213 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
219 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
224 printk(KERN_DEBUG "b43legacy-%s debug: ",
225 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
231 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
236 B43legacy_WARN_ON(offset % 4 != 0);
238 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
239 if (status & B43legacy_MACCTL_BE)
242 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
244 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
248 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
249 u16 routing, u16 offset)
253 /* "offset" is the WORD offset. */
258 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
261 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
262 u16 routing, u16 offset)
266 if (routing == B43legacy_SHM_SHARED) {
267 B43legacy_WARN_ON((offset & 0x0001) != 0);
268 if (offset & 0x0003) {
269 /* Unaligned access */
270 b43legacy_shm_control_word(dev, routing, offset >> 2);
271 ret = b43legacy_read16(dev,
272 B43legacy_MMIO_SHM_DATA_UNALIGNED);
274 b43legacy_shm_control_word(dev, routing,
276 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
282 b43legacy_shm_control_word(dev, routing, offset);
283 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
288 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
289 u16 routing, u16 offset)
293 if (routing == B43legacy_SHM_SHARED) {
294 B43legacy_WARN_ON((offset & 0x0001) != 0);
295 if (offset & 0x0003) {
296 /* Unaligned access */
297 b43legacy_shm_control_word(dev, routing, offset >> 2);
298 ret = b43legacy_read16(dev,
299 B43legacy_MMIO_SHM_DATA_UNALIGNED);
305 b43legacy_shm_control_word(dev, routing, offset);
306 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
311 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
312 u16 routing, u16 offset,
315 if (routing == B43legacy_SHM_SHARED) {
316 B43legacy_WARN_ON((offset & 0x0001) != 0);
317 if (offset & 0x0003) {
318 /* Unaligned access */
319 b43legacy_shm_control_word(dev, routing, offset >> 2);
321 b43legacy_write16(dev,
322 B43legacy_MMIO_SHM_DATA_UNALIGNED,
323 (value >> 16) & 0xffff);
325 b43legacy_shm_control_word(dev, routing,
328 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
334 b43legacy_shm_control_word(dev, routing, offset);
336 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
339 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
342 if (routing == B43legacy_SHM_SHARED) {
343 B43legacy_WARN_ON((offset & 0x0001) != 0);
344 if (offset & 0x0003) {
345 /* Unaligned access */
346 b43legacy_shm_control_word(dev, routing, offset >> 2);
348 b43legacy_write16(dev,
349 B43legacy_MMIO_SHM_DATA_UNALIGNED,
355 b43legacy_shm_control_word(dev, routing, offset);
357 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
361 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
365 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
366 B43legacy_SHM_SH_HOSTFHI);
368 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
369 B43legacy_SHM_SH_HOSTFLO);
374 /* Write HostFlags */
375 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
377 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
378 B43legacy_SHM_SH_HOSTFLO,
379 (value & 0x0000FFFF));
380 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
381 B43legacy_SHM_SH_HOSTFHI,
382 ((value & 0xFFFF0000) >> 16));
385 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
387 /* We need to be careful. As we read the TSF from multiple
388 * registers, we should take care of register overflows.
389 * In theory, the whole tsf read process should be atomic.
390 * We try to be atomic here, by restaring the read process,
391 * if any of the high registers changed (overflew).
393 if (dev->dev->id.revision >= 3) {
399 high = b43legacy_read32(dev,
400 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
401 low = b43legacy_read32(dev,
402 B43legacy_MMIO_REV3PLUS_TSF_LOW);
403 high2 = b43legacy_read32(dev,
404 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
405 } while (unlikely(high != high2));
421 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
422 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
423 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
424 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
426 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
427 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
428 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
429 } while (v3 != test3 || v2 != test2 || v1 != test1);
443 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
447 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
448 status |= B43legacy_MACCTL_TBTTHOLD;
449 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
453 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
457 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
458 status &= ~B43legacy_MACCTL_TBTTHOLD;
459 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
462 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
464 /* Be careful with the in-progress timer.
465 * First zero out the low register, so we have a full
466 * register-overflow duration to complete the operation.
468 if (dev->dev->id.revision >= 3) {
469 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
470 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
472 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
474 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
477 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
480 u16 v0 = (tsf & 0x000000000000FFFFULL);
481 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
482 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
483 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
485 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
487 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
489 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
491 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
493 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
497 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
499 b43legacy_time_lock(dev);
500 b43legacy_tsf_write_locked(dev, tsf);
501 b43legacy_time_unlock(dev);
505 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
506 u16 offset, const u8 *mac)
508 static const u8 zero_addr[ETH_ALEN] = { 0 };
515 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
519 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
522 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
525 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
528 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
530 static const u8 zero_addr[ETH_ALEN] = { 0 };
531 const u8 *mac = dev->wl->mac_addr;
532 const u8 *bssid = dev->wl->bssid;
533 u8 mac_bssid[ETH_ALEN * 2];
542 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
544 memcpy(mac_bssid, mac, ETH_ALEN);
545 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
547 /* Write our MAC address and BSSID to template ram */
548 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
549 tmp = (u32)(mac_bssid[i + 0]);
550 tmp |= (u32)(mac_bssid[i + 1]) << 8;
551 tmp |= (u32)(mac_bssid[i + 2]) << 16;
552 tmp |= (u32)(mac_bssid[i + 3]) << 24;
553 b43legacy_ram_write(dev, 0x20 + i, tmp);
554 b43legacy_ram_write(dev, 0x78 + i, tmp);
555 b43legacy_ram_write(dev, 0x478 + i, tmp);
559 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
561 b43legacy_write_mac_bssid_templates(dev);
562 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
566 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
569 /* slot_time is in usec. */
570 if (dev->phy.type != B43legacy_PHYTYPE_G)
572 b43legacy_write16(dev, 0x684, 510 + slot_time);
573 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
577 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
579 b43legacy_set_slot_time(dev, 9);
583 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
585 b43legacy_set_slot_time(dev, 20);
589 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
590 * Returns the _previously_ enabled IRQ mask.
592 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
597 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
598 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
604 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
605 * Returns the _previously_ enabled IRQ mask.
607 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
612 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
613 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
618 /* Synchronize IRQ top- and bottom-half.
619 * IRQs must be masked before calling this.
620 * This must not be called with the irq_lock held.
622 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
624 synchronize_irq(dev->dev->irq);
625 tasklet_kill(&dev->isr_tasklet);
628 /* DummyTransmission function, as documented on
629 * http://bcm-specs.sipsolutions.net/DummyTransmission
631 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
633 struct b43legacy_phy *phy = &dev->phy;
635 unsigned int max_loop;
646 case B43legacy_PHYTYPE_B:
647 case B43legacy_PHYTYPE_G:
649 buffer[0] = 0x000B846E;
656 for (i = 0; i < 5; i++)
657 b43legacy_ram_write(dev, i * 4, buffer[i]);
659 /* dummy read follows */
660 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
662 b43legacy_write16(dev, 0x0568, 0x0000);
663 b43legacy_write16(dev, 0x07C0, 0x0000);
664 b43legacy_write16(dev, 0x050C, 0x0000);
665 b43legacy_write16(dev, 0x0508, 0x0000);
666 b43legacy_write16(dev, 0x050A, 0x0000);
667 b43legacy_write16(dev, 0x054C, 0x0000);
668 b43legacy_write16(dev, 0x056A, 0x0014);
669 b43legacy_write16(dev, 0x0568, 0x0826);
670 b43legacy_write16(dev, 0x0500, 0x0000);
671 b43legacy_write16(dev, 0x0502, 0x0030);
673 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
674 b43legacy_radio_write16(dev, 0x0051, 0x0017);
675 for (i = 0x00; i < max_loop; i++) {
676 value = b43legacy_read16(dev, 0x050E);
681 for (i = 0x00; i < 0x0A; i++) {
682 value = b43legacy_read16(dev, 0x050E);
687 for (i = 0x00; i < 0x0A; i++) {
688 value = b43legacy_read16(dev, 0x0690);
689 if (!(value & 0x0100))
693 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
694 b43legacy_radio_write16(dev, 0x0051, 0x0037);
697 /* Turn the Analog ON/OFF */
698 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
700 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
703 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
708 flags |= B43legacy_TMSLOW_PHYCLKEN;
709 flags |= B43legacy_TMSLOW_PHYRESET;
710 ssb_device_enable(dev->dev, flags);
711 msleep(2); /* Wait for the PLL to turn on. */
713 /* Now take the PHY out of Reset again */
714 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
715 tmslow |= SSB_TMSLOW_FGC;
716 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
717 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
718 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
720 tmslow &= ~SSB_TMSLOW_FGC;
721 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
722 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
726 b43legacy_switch_analog(dev, 1);
728 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
729 macctl &= ~B43legacy_MACCTL_GMODE;
730 if (flags & B43legacy_TMSLOW_GMODE) {
731 macctl |= B43legacy_MACCTL_GMODE;
735 macctl |= B43legacy_MACCTL_IHR_ENABLED;
736 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
739 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
744 struct b43legacy_txstatus stat;
747 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
748 if (!(v0 & 0x00000001))
750 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
752 stat.cookie = (v0 >> 16);
753 stat.seq = (v1 & 0x0000FFFF);
754 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
755 tmp = (v0 & 0x0000FFFF);
756 stat.frame_count = ((tmp & 0xF000) >> 12);
757 stat.rts_count = ((tmp & 0x0F00) >> 8);
758 stat.supp_reason = ((tmp & 0x001C) >> 2);
759 stat.pm_indicated = !!(tmp & 0x0080);
760 stat.intermediate = !!(tmp & 0x0040);
761 stat.for_ampdu = !!(tmp & 0x0020);
762 stat.acked = !!(tmp & 0x0002);
764 b43legacy_handle_txstatus(dev, &stat);
768 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
772 if (dev->dev->id.revision < 5)
774 /* Read all entries from the microcode TXstatus FIFO
775 * and throw them away.
778 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
779 if (!(dummy & 0x00000001))
781 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
785 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
789 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
791 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
796 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
798 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
799 (jssi & 0x0000FFFF));
800 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
801 (jssi & 0xFFFF0000) >> 16);
804 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
806 b43legacy_jssi_write(dev, 0x7F7F7F7F);
807 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
808 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
809 | B43legacy_MACCMD_BGNOISE);
810 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
814 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
816 /* Top half of Link Quality calculation. */
818 if (dev->noisecalc.calculation_running)
820 dev->noisecalc.channel_at_start = dev->phy.channel;
821 dev->noisecalc.calculation_running = 1;
822 dev->noisecalc.nr_samples = 0;
824 b43legacy_generate_noise_sample(dev);
827 static void handle_irq_noise(struct b43legacy_wldev *dev)
829 struct b43legacy_phy *phy = &dev->phy;
836 /* Bottom half of Link Quality calculation. */
838 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
839 if (dev->noisecalc.channel_at_start != phy->channel)
840 goto drop_calculation;
841 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
842 if (noise[0] == 0x7F || noise[1] == 0x7F ||
843 noise[2] == 0x7F || noise[3] == 0x7F)
846 /* Get the noise samples. */
847 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
848 i = dev->noisecalc.nr_samples;
849 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
850 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
851 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
852 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
853 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
854 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
855 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
856 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
857 dev->noisecalc.nr_samples++;
858 if (dev->noisecalc.nr_samples == 8) {
859 /* Calculate the Link Quality by the noise samples. */
861 for (i = 0; i < 8; i++) {
862 for (j = 0; j < 4; j++)
863 average += dev->noisecalc.samples[i][j];
869 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
871 tmp = (tmp / 128) & 0x1F;
881 dev->stats.link_noise = average;
883 dev->noisecalc.calculation_running = 0;
887 b43legacy_generate_noise_sample(dev);
890 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
892 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
895 if (1/*FIXME: the last PSpoll frame was sent successfully */)
896 b43legacy_power_saving_ctl_bits(dev, -1, -1);
898 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
904 if (dev->dfq_valid) {
905 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
906 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
907 | B43legacy_MACCMD_DFQ_VALID);
912 static void handle_irq_pmq(struct b43legacy_wldev *dev)
919 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
920 if (!(tmp & 0x00000008))
923 /* 16bit write is odd, but correct. */
924 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
927 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
928 const u8 *data, u16 size,
930 u16 shm_size_offset, u8 rate)
934 struct b43legacy_plcp_hdr4 plcp;
937 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
938 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
939 ram_offset += sizeof(u32);
940 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
941 * So leave the first two bytes of the next write blank.
943 tmp = (u32)(data[0]) << 16;
944 tmp |= (u32)(data[1]) << 24;
945 b43legacy_ram_write(dev, ram_offset, tmp);
946 ram_offset += sizeof(u32);
947 for (i = 2; i < size; i += sizeof(u32)) {
948 tmp = (u32)(data[i + 0]);
950 tmp |= (u32)(data[i + 1]) << 8;
952 tmp |= (u32)(data[i + 2]) << 16;
954 tmp |= (u32)(data[i + 3]) << 24;
955 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
957 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
958 size + sizeof(struct b43legacy_plcp_hdr6));
961 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
963 u16 shm_size_offset, u8 rate)
966 unsigned int i, len, variable_len;
967 const struct ieee80211_mgmt *bcn;
971 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
972 len = min((size_t)dev->wl->current_beacon->len,
973 0x200 - sizeof(struct b43legacy_plcp_hdr6));
975 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
976 shm_size_offset, rate);
978 /* Find the position of the TIM and the DTIM_period value
979 * and write them to SHM. */
980 ie = bcn->u.beacon.variable;
981 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
982 for (i = 0; i < variable_len - 2; ) {
983 uint8_t ie_id, ie_len;
990 /* This is the TIM Information Element */
992 /* Check whether the ie_len is in the beacon data range. */
993 if (variable_len < ie_len + 2 + i)
995 /* A valid TIM is at least 4 bytes long. */
1000 tim_position = sizeof(struct b43legacy_plcp_hdr6);
1001 tim_position += offsetof(struct ieee80211_mgmt,
1005 dtim_period = ie[i + 3];
1007 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1008 B43legacy_SHM_SH_TIMPOS, tim_position);
1009 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1010 B43legacy_SHM_SH_DTIMP, dtim_period);
1016 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1017 "beacon template packet. AP or IBSS operation "
1018 "may be broken.\n");
1022 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1023 u16 shm_offset, u16 size,
1024 struct ieee80211_rate *rate)
1026 struct b43legacy_plcp_hdr4 plcp;
1031 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->bitrate);
1032 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1036 /* Write PLCP in two parts and timing for packet transfer */
1037 tmp = le32_to_cpu(plcp.data);
1038 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1040 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1042 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1046 /* Instead of using custom probe response template, this function
1047 * just patches custom beacon template by:
1048 * 1) Changing packet type
1049 * 2) Patching duration field
1052 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1054 struct ieee80211_rate *rate)
1058 u16 src_size, elem_size, src_pos, dest_pos;
1060 struct ieee80211_hdr *hdr;
1063 src_size = dev->wl->current_beacon->len;
1064 src_data = (const u8 *)dev->wl->current_beacon->data;
1066 /* Get the start offset of the variable IEs in the packet. */
1067 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1068 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1069 u.beacon.variable));
1071 if (src_size < ie_start) {
1072 B43legacy_WARN_ON(1);
1076 dest_data = kmalloc(src_size, GFP_ATOMIC);
1077 if (unlikely(!dest_data))
1080 /* Copy the static data and all Information Elements, except the TIM. */
1081 memcpy(dest_data, src_data, ie_start);
1083 dest_pos = ie_start;
1084 for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1085 elem_size = src_data[src_pos + 1] + 2;
1086 if (src_data[src_pos] == 5) {
1087 /* This is the TIM. */
1090 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1091 dest_pos += elem_size;
1093 *dest_size = dest_pos;
1094 hdr = (struct ieee80211_hdr *)dest_data;
1096 /* Set the frame control. */
1097 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1098 IEEE80211_STYPE_PROBE_RESP);
1099 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1103 hdr->duration_id = dur;
1108 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1110 u16 shm_size_offset,
1111 struct ieee80211_rate *rate)
1113 const u8 *probe_resp_data;
1116 size = dev->wl->current_beacon->len;
1117 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1118 if (unlikely(!probe_resp_data))
1121 /* Looks like PLCP headers plus packet timings are stored for
1122 * all possible basic rates
1124 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1125 &b43legacy_b_ratetable[0]);
1126 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1127 &b43legacy_b_ratetable[1]);
1128 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1129 &b43legacy_b_ratetable[2]);
1130 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1131 &b43legacy_b_ratetable[3]);
1133 size = min((size_t)size,
1134 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1135 b43legacy_write_template_common(dev, probe_resp_data,
1137 shm_size_offset, rate->bitrate);
1138 kfree(probe_resp_data);
1141 /* Asynchronously update the packet templates in template RAM.
1142 * Locking: Requires wl->irq_lock to be locked. */
1143 static void b43legacy_update_templates(struct b43legacy_wl *wl,
1144 struct sk_buff *beacon)
1146 /* This is the top half of the ansynchronous beacon update. The bottom
1147 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1148 * sending an invalid beacon. This can happen for example, if the
1149 * firmware transmits a beacon while we are updating it. */
1151 if (wl->current_beacon)
1152 dev_kfree_skb_any(wl->current_beacon);
1153 wl->current_beacon = beacon;
1154 wl->beacon0_uploaded = 0;
1155 wl->beacon1_uploaded = 0;
1158 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1159 const u8 *ssid, u8 ssid_len)
1165 len = min((u16)ssid_len, (u16)0x100);
1166 for (i = 0; i < len; i += sizeof(u32)) {
1167 tmp = (u32)(ssid[i + 0]);
1169 tmp |= (u32)(ssid[i + 1]) << 8;
1171 tmp |= (u32)(ssid[i + 2]) << 16;
1173 tmp |= (u32)(ssid[i + 3]) << 24;
1174 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1177 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1181 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1184 b43legacy_time_lock(dev);
1185 if (dev->dev->id.revision >= 3)
1186 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1188 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1189 b43legacy_write16(dev, 0x610, beacon_int);
1191 b43legacy_time_unlock(dev);
1194 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1196 struct b43legacy_wl *wl = dev->wl;
1199 if (!b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1202 /* This is the bottom half of the asynchronous beacon update. */
1204 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1205 if (!(cmd & B43legacy_MACCMD_BEACON0_VALID)) {
1206 if (!wl->beacon0_uploaded) {
1207 b43legacy_write_beacon_template(dev, 0x68,
1208 B43legacy_SHM_SH_BTL0,
1209 B43legacy_CCK_RATE_1MB);
1210 b43legacy_write_probe_resp_template(dev, 0x268,
1211 B43legacy_SHM_SH_PRTLEN,
1212 &__b43legacy_ratetable[3]);
1213 wl->beacon0_uploaded = 1;
1215 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1217 if (!(cmd & B43legacy_MACCMD_BEACON1_VALID)) {
1218 if (!wl->beacon1_uploaded) {
1219 b43legacy_write_beacon_template(dev, 0x468,
1220 B43legacy_SHM_SH_BTL1,
1221 B43legacy_CCK_RATE_1MB);
1222 wl->beacon1_uploaded = 1;
1224 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1226 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1229 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1233 /* Interrupt handler bottom-half */
1234 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1237 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1238 u32 merged_dma_reason = 0;
1240 unsigned long flags;
1242 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1244 B43legacy_WARN_ON(b43legacy_status(dev) <
1245 B43legacy_STAT_INITIALIZED);
1247 reason = dev->irq_reason;
1248 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1249 dma_reason[i] = dev->dma_reason[i];
1250 merged_dma_reason |= dma_reason[i];
1253 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1254 b43legacyerr(dev->wl, "MAC transmission error\n");
1256 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1257 b43legacyerr(dev->wl, "PHY transmission error\n");
1259 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1260 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1261 "restarting the controller\n");
1262 b43legacy_controller_restart(dev, "PHY TX errors");
1266 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1267 B43legacy_DMAIRQ_NONFATALMASK))) {
1268 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1269 b43legacyerr(dev->wl, "Fatal DMA error: "
1270 "0x%08X, 0x%08X, 0x%08X, "
1271 "0x%08X, 0x%08X, 0x%08X\n",
1272 dma_reason[0], dma_reason[1],
1273 dma_reason[2], dma_reason[3],
1274 dma_reason[4], dma_reason[5]);
1275 b43legacy_controller_restart(dev, "DMA error");
1277 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1280 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1281 b43legacyerr(dev->wl, "DMA error: "
1282 "0x%08X, 0x%08X, 0x%08X, "
1283 "0x%08X, 0x%08X, 0x%08X\n",
1284 dma_reason[0], dma_reason[1],
1285 dma_reason[2], dma_reason[3],
1286 dma_reason[4], dma_reason[5]);
1289 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1290 handle_irq_ucode_debug(dev);
1291 if (reason & B43legacy_IRQ_TBTT_INDI)
1292 handle_irq_tbtt_indication(dev);
1293 if (reason & B43legacy_IRQ_ATIM_END)
1294 handle_irq_atim_end(dev);
1295 if (reason & B43legacy_IRQ_BEACON)
1296 handle_irq_beacon(dev);
1297 if (reason & B43legacy_IRQ_PMQ)
1298 handle_irq_pmq(dev);
1299 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1301 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1302 handle_irq_noise(dev);
1304 /* Check the DMA reason registers for received data. */
1305 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1306 if (b43legacy_using_pio(dev))
1307 b43legacy_pio_rx(dev->pio.queue0);
1309 b43legacy_dma_rx(dev->dma.rx_ring0);
1311 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1312 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1313 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1314 if (b43legacy_using_pio(dev))
1315 b43legacy_pio_rx(dev->pio.queue3);
1317 b43legacy_dma_rx(dev->dma.rx_ring3);
1319 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1320 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1322 if (reason & B43legacy_IRQ_TX_OK)
1323 handle_irq_transmit_status(dev);
1325 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1327 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1330 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1331 u16 base, int queueidx)
1335 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1336 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1337 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1339 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1342 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1344 if (b43legacy_using_pio(dev) &&
1345 (dev->dev->id.revision < 3) &&
1346 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1347 /* Apply a PIO specific workaround to the dma_reasons */
1348 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1349 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1350 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1351 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1354 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1356 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1357 dev->dma_reason[0]);
1358 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1359 dev->dma_reason[1]);
1360 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1361 dev->dma_reason[2]);
1362 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1363 dev->dma_reason[3]);
1364 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1365 dev->dma_reason[4]);
1366 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1367 dev->dma_reason[5]);
1370 /* Interrupt handler top-half */
1371 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1373 irqreturn_t ret = IRQ_NONE;
1374 struct b43legacy_wldev *dev = dev_id;
1380 spin_lock(&dev->wl->irq_lock);
1382 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1384 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1385 if (reason == 0xffffffff) /* shared IRQ */
1388 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1392 dev->dma_reason[0] = b43legacy_read32(dev,
1393 B43legacy_MMIO_DMA0_REASON)
1395 dev->dma_reason[1] = b43legacy_read32(dev,
1396 B43legacy_MMIO_DMA1_REASON)
1398 dev->dma_reason[2] = b43legacy_read32(dev,
1399 B43legacy_MMIO_DMA2_REASON)
1401 dev->dma_reason[3] = b43legacy_read32(dev,
1402 B43legacy_MMIO_DMA3_REASON)
1404 dev->dma_reason[4] = b43legacy_read32(dev,
1405 B43legacy_MMIO_DMA4_REASON)
1407 dev->dma_reason[5] = b43legacy_read32(dev,
1408 B43legacy_MMIO_DMA5_REASON)
1411 b43legacy_interrupt_ack(dev, reason);
1412 /* disable all IRQs. They are enabled again in the bottom half. */
1413 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1415 /* save the reason code and call our bottom half. */
1416 dev->irq_reason = reason;
1417 tasklet_schedule(&dev->isr_tasklet);
1420 spin_unlock(&dev->wl->irq_lock);
1425 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1427 release_firmware(dev->fw.ucode);
1428 dev->fw.ucode = NULL;
1429 release_firmware(dev->fw.pcm);
1431 release_firmware(dev->fw.initvals);
1432 dev->fw.initvals = NULL;
1433 release_firmware(dev->fw.initvals_band);
1434 dev->fw.initvals_band = NULL;
1437 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1439 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1440 "Drivers/b43#devicefirmware "
1441 "and download the correct firmware (version 3).\n");
1444 static int do_request_fw(struct b43legacy_wldev *dev,
1446 const struct firmware **fw)
1448 char path[sizeof(modparam_fwpostfix) + 32];
1449 struct b43legacy_fw_header *hdr;
1456 snprintf(path, ARRAY_SIZE(path),
1457 "b43legacy%s/%s.fw",
1458 modparam_fwpostfix, name);
1459 err = request_firmware(fw, path, dev->dev->dev);
1461 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1462 "or load failed.\n", path);
1465 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1467 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1468 switch (hdr->type) {
1469 case B43legacy_FW_TYPE_UCODE:
1470 case B43legacy_FW_TYPE_PCM:
1471 size = be32_to_cpu(hdr->size);
1472 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1475 case B43legacy_FW_TYPE_IV:
1486 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1490 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1492 struct b43legacy_firmware *fw = &dev->fw;
1493 const u8 rev = dev->dev->id.revision;
1494 const char *filename;
1498 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1501 filename = "ucode2";
1503 filename = "ucode4";
1505 filename = "ucode5";
1506 err = do_request_fw(dev, filename, &fw->ucode);
1515 err = do_request_fw(dev, filename, &fw->pcm);
1519 if (!fw->initvals) {
1520 switch (dev->phy.type) {
1521 case B43legacy_PHYTYPE_G:
1522 if ((rev >= 5) && (rev <= 10))
1523 filename = "b0g0initvals5";
1524 else if (rev == 2 || rev == 4)
1525 filename = "b0g0initvals2";
1527 goto err_no_initvals;
1530 goto err_no_initvals;
1532 err = do_request_fw(dev, filename, &fw->initvals);
1536 if (!fw->initvals_band) {
1537 switch (dev->phy.type) {
1538 case B43legacy_PHYTYPE_G:
1539 if ((rev >= 5) && (rev <= 10))
1540 filename = "b0g0bsinitvals5";
1543 else if (rev == 2 || rev == 4)
1546 goto err_no_initvals;
1549 goto err_no_initvals;
1551 err = do_request_fw(dev, filename, &fw->initvals_band);
1559 b43legacy_print_fw_helptext(dev->wl);
1564 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1565 "core rev %u\n", dev->phy.type, rev);
1569 b43legacy_release_firmware(dev);
1573 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1575 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1586 /* Jump the microcode PSM to offset 0 */
1587 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1588 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1589 macctl |= B43legacy_MACCTL_PSM_JMP0;
1590 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1591 /* Zero out all microcode PSM registers and shared memory. */
1592 for (i = 0; i < 64; i++)
1593 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1594 for (i = 0; i < 4096; i += 2)
1595 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1597 /* Upload Microcode. */
1598 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1599 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1600 b43legacy_shm_control_word(dev,
1601 B43legacy_SHM_UCODE |
1602 B43legacy_SHM_AUTOINC_W,
1604 for (i = 0; i < len; i++) {
1605 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1606 be32_to_cpu(data[i]));
1611 /* Upload PCM data. */
1612 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1613 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1614 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1615 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1616 /* No need for autoinc bit in SHM_HW */
1617 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1618 for (i = 0; i < len; i++) {
1619 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1620 be32_to_cpu(data[i]));
1625 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1628 /* Start the microcode PSM */
1629 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1630 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1631 macctl |= B43legacy_MACCTL_PSM_RUN;
1632 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1634 /* Wait for the microcode to load and respond */
1637 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1638 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1641 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1642 b43legacyerr(dev->wl, "Microcode not responding\n");
1643 b43legacy_print_fw_helptext(dev->wl);
1647 msleep_interruptible(50);
1648 if (signal_pending(current)) {
1653 /* dummy read follows */
1654 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1656 /* Get and check the revisions. */
1657 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1658 B43legacy_SHM_SH_UCODEREV);
1659 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1660 B43legacy_SHM_SH_UCODEPATCH);
1661 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1662 B43legacy_SHM_SH_UCODEDATE);
1663 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1664 B43legacy_SHM_SH_UCODETIME);
1666 if (fwrev > 0x128) {
1667 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1668 " Only firmware from binary drivers version 3.x"
1669 " is supported. You must change your firmware"
1671 b43legacy_print_fw_helptext(dev->wl);
1675 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1676 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1677 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1678 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1681 dev->fw.rev = fwrev;
1682 dev->fw.patch = fwpatch;
1687 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1688 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1689 macctl |= B43legacy_MACCTL_PSM_JMP0;
1690 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1695 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1696 const struct b43legacy_iv *ivals,
1700 const struct b43legacy_iv *iv;
1705 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1707 for (i = 0; i < count; i++) {
1708 if (array_size < sizeof(iv->offset_size))
1710 array_size -= sizeof(iv->offset_size);
1711 offset = be16_to_cpu(iv->offset_size);
1712 bit32 = !!(offset & B43legacy_IV_32BIT);
1713 offset &= B43legacy_IV_OFFSET_MASK;
1714 if (offset >= 0x1000)
1719 if (array_size < sizeof(iv->data.d32))
1721 array_size -= sizeof(iv->data.d32);
1723 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1724 b43legacy_write32(dev, offset, value);
1726 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1732 if (array_size < sizeof(iv->data.d16))
1734 array_size -= sizeof(iv->data.d16);
1736 value = be16_to_cpu(iv->data.d16);
1737 b43legacy_write16(dev, offset, value);
1739 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1750 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1751 b43legacy_print_fw_helptext(dev->wl);
1756 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1758 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1759 const struct b43legacy_fw_header *hdr;
1760 struct b43legacy_firmware *fw = &dev->fw;
1761 const struct b43legacy_iv *ivals;
1765 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1766 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1767 count = be32_to_cpu(hdr->size);
1768 err = b43legacy_write_initvals(dev, ivals, count,
1769 fw->initvals->size - hdr_len);
1772 if (fw->initvals_band) {
1773 hdr = (const struct b43legacy_fw_header *)
1774 (fw->initvals_band->data);
1775 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1777 count = be32_to_cpu(hdr->size);
1778 err = b43legacy_write_initvals(dev, ivals, count,
1779 fw->initvals_band->size - hdr_len);
1788 /* Initialize the GPIOs
1789 * http://bcm-specs.sipsolutions.net/GPIO
1791 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1793 struct ssb_bus *bus = dev->dev->bus;
1794 struct ssb_device *gpiodev, *pcidev = NULL;
1798 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1799 b43legacy_read32(dev,
1800 B43legacy_MMIO_MACCTL)
1803 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1804 b43legacy_read16(dev,
1805 B43legacy_MMIO_GPIO_MASK)
1810 if (dev->dev->bus->chip_id == 0x4301) {
1814 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1815 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1816 b43legacy_read16(dev,
1817 B43legacy_MMIO_GPIO_MASK)
1822 if (dev->dev->id.revision >= 2)
1823 mask |= 0x0010; /* FIXME: This is redundant. */
1825 #ifdef CONFIG_SSB_DRIVER_PCICORE
1826 pcidev = bus->pcicore.dev;
1828 gpiodev = bus->chipco.dev ? : pcidev;
1831 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1832 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1838 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1839 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1841 struct ssb_bus *bus = dev->dev->bus;
1842 struct ssb_device *gpiodev, *pcidev = NULL;
1844 #ifdef CONFIG_SSB_DRIVER_PCICORE
1845 pcidev = bus->pcicore.dev;
1847 gpiodev = bus->chipco.dev ? : pcidev;
1850 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1853 /* http://bcm-specs.sipsolutions.net/EnableMac */
1854 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1856 dev->mac_suspended--;
1857 B43legacy_WARN_ON(dev->mac_suspended < 0);
1858 B43legacy_WARN_ON(irqs_disabled());
1859 if (dev->mac_suspended == 0) {
1860 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1861 b43legacy_read32(dev,
1862 B43legacy_MMIO_MACCTL)
1863 | B43legacy_MACCTL_ENABLED);
1864 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1865 B43legacy_IRQ_MAC_SUSPENDED);
1866 /* the next two are dummy reads */
1867 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1868 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1869 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1871 /* Re-enable IRQs. */
1872 spin_lock_irq(&dev->wl->irq_lock);
1873 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1874 spin_unlock_irq(&dev->wl->irq_lock);
1878 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1879 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1885 B43legacy_WARN_ON(irqs_disabled());
1886 B43legacy_WARN_ON(dev->mac_suspended < 0);
1888 if (dev->mac_suspended == 0) {
1889 /* Mask IRQs before suspending MAC. Otherwise
1890 * the MAC stays busy and won't suspend. */
1891 spin_lock_irq(&dev->wl->irq_lock);
1892 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1893 spin_unlock_irq(&dev->wl->irq_lock);
1894 b43legacy_synchronize_irq(dev);
1895 dev->irq_savedstate = tmp;
1897 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1898 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1899 b43legacy_read32(dev,
1900 B43legacy_MMIO_MACCTL)
1901 & ~B43legacy_MACCTL_ENABLED);
1902 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1903 for (i = 40; i; i--) {
1904 tmp = b43legacy_read32(dev,
1905 B43legacy_MMIO_GEN_IRQ_REASON);
1906 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1910 b43legacyerr(dev->wl, "MAC suspend failed\n");
1913 dev->mac_suspended++;
1916 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1918 struct b43legacy_wl *wl = dev->wl;
1922 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1923 /* Reset status to STA infrastructure mode. */
1924 ctl &= ~B43legacy_MACCTL_AP;
1925 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1926 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1927 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1928 ctl &= ~B43legacy_MACCTL_PROMISC;
1929 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1930 ctl |= B43legacy_MACCTL_INFRA;
1932 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1933 ctl |= B43legacy_MACCTL_AP;
1934 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1935 ctl &= ~B43legacy_MACCTL_INFRA;
1937 if (wl->filter_flags & FIF_CONTROL)
1938 ctl |= B43legacy_MACCTL_KEEP_CTL;
1939 if (wl->filter_flags & FIF_FCSFAIL)
1940 ctl |= B43legacy_MACCTL_KEEP_BAD;
1941 if (wl->filter_flags & FIF_PLCPFAIL)
1942 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1943 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1944 ctl |= B43legacy_MACCTL_PROMISC;
1945 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1946 ctl |= B43legacy_MACCTL_BEACPROMISC;
1948 /* Workaround: On old hardware the HW-MAC-address-filter
1949 * doesn't work properly, so always run promisc in filter
1950 * it in software. */
1951 if (dev->dev->id.revision <= 4)
1952 ctl |= B43legacy_MACCTL_PROMISC;
1954 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1957 if ((ctl & B43legacy_MACCTL_INFRA) &&
1958 !(ctl & B43legacy_MACCTL_AP)) {
1959 if (dev->dev->bus->chip_id == 0x4306 &&
1960 dev->dev->bus->chip_rev == 3)
1965 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1968 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1976 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1979 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1981 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1982 b43legacy_shm_read16(dev,
1983 B43legacy_SHM_SHARED, offset));
1986 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1988 switch (dev->phy.type) {
1989 case B43legacy_PHYTYPE_G:
1990 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1991 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1992 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1993 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1994 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1995 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1996 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1998 case B43legacy_PHYTYPE_B:
1999 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2000 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2001 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2002 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2005 B43legacy_BUG_ON(1);
2009 /* Set the TX-Antenna for management frames sent by firmware. */
2010 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2017 case B43legacy_ANTENNA0:
2018 ant |= B43legacy_TX4_PHY_ANT0;
2020 case B43legacy_ANTENNA1:
2021 ant |= B43legacy_TX4_PHY_ANT1;
2023 case B43legacy_ANTENNA_AUTO:
2024 ant |= B43legacy_TX4_PHY_ANTLAST;
2027 B43legacy_BUG_ON(1);
2030 /* FIXME We also need to set the other flags of the PHY control
2031 * field somewhere. */
2034 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2035 B43legacy_SHM_SH_BEACPHYCTL);
2036 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2037 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2038 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2040 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2041 B43legacy_SHM_SH_ACKCTSPHYCTL);
2042 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2043 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2044 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2045 /* For Probe Resposes */
2046 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2047 B43legacy_SHM_SH_PRPHYCTL);
2048 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2049 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2050 B43legacy_SHM_SH_PRPHYCTL, tmp);
2053 /* This is the opposite of b43legacy_chip_init() */
2054 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2056 b43legacy_radio_turn_off(dev, 1);
2057 b43legacy_gpio_cleanup(dev);
2058 /* firmware is released later */
2061 /* Initialize the chip
2062 * http://bcm-specs.sipsolutions.net/ChipInit
2064 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2066 struct b43legacy_phy *phy = &dev->phy;
2069 u32 value32, macctl;
2072 /* Initialize the MAC control */
2073 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2075 macctl |= B43legacy_MACCTL_GMODE;
2076 macctl |= B43legacy_MACCTL_INFRA;
2077 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2079 err = b43legacy_request_firmware(dev);
2082 err = b43legacy_upload_microcode(dev);
2084 goto out; /* firmware is released later */
2086 err = b43legacy_gpio_init(dev);
2088 goto out; /* firmware is released later */
2090 err = b43legacy_upload_initvals(dev);
2092 goto err_gpio_clean;
2093 b43legacy_radio_turn_on(dev);
2095 b43legacy_write16(dev, 0x03E6, 0x0000);
2096 err = b43legacy_phy_init(dev);
2100 /* Select initial Interference Mitigation. */
2101 tmp = phy->interfmode;
2102 phy->interfmode = B43legacy_INTERFMODE_NONE;
2103 b43legacy_radio_set_interference_mitigation(dev, tmp);
2105 b43legacy_phy_set_antenna_diversity(dev);
2106 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2108 if (phy->type == B43legacy_PHYTYPE_B) {
2109 value16 = b43legacy_read16(dev, 0x005E);
2111 b43legacy_write16(dev, 0x005E, value16);
2113 b43legacy_write32(dev, 0x0100, 0x01000000);
2114 if (dev->dev->id.revision < 5)
2115 b43legacy_write32(dev, 0x010C, 0x01000000);
2117 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2118 value32 &= ~B43legacy_MACCTL_INFRA;
2119 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2120 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2121 value32 |= B43legacy_MACCTL_INFRA;
2122 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2124 if (b43legacy_using_pio(dev)) {
2125 b43legacy_write32(dev, 0x0210, 0x00000100);
2126 b43legacy_write32(dev, 0x0230, 0x00000100);
2127 b43legacy_write32(dev, 0x0250, 0x00000100);
2128 b43legacy_write32(dev, 0x0270, 0x00000100);
2129 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2133 /* Probe Response Timeout value */
2134 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2135 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2137 /* Initially set the wireless operation mode. */
2138 b43legacy_adjust_opmode(dev);
2140 if (dev->dev->id.revision < 3) {
2141 b43legacy_write16(dev, 0x060E, 0x0000);
2142 b43legacy_write16(dev, 0x0610, 0x8000);
2143 b43legacy_write16(dev, 0x0604, 0x0000);
2144 b43legacy_write16(dev, 0x0606, 0x0200);
2146 b43legacy_write32(dev, 0x0188, 0x80000000);
2147 b43legacy_write32(dev, 0x018C, 0x02000000);
2149 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2150 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2151 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2152 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2153 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2154 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2155 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2157 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2158 value32 |= 0x00100000;
2159 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2161 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2162 dev->dev->bus->chipco.fast_pwrup_delay);
2164 /* PHY TX errors counter. */
2165 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2167 B43legacy_WARN_ON(err != 0);
2168 b43legacydbg(dev->wl, "Chip initialized\n");
2173 b43legacy_radio_turn_off(dev, 1);
2175 b43legacy_gpio_cleanup(dev);
2179 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2181 struct b43legacy_phy *phy = &dev->phy;
2183 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2186 b43legacy_mac_suspend(dev);
2187 b43legacy_phy_lo_g_measure(dev);
2188 b43legacy_mac_enable(dev);
2191 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2193 b43legacy_phy_lo_mark_all_unused(dev);
2194 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2195 b43legacy_mac_suspend(dev);
2196 b43legacy_calc_nrssi_slope(dev);
2197 b43legacy_mac_enable(dev);
2201 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2203 /* Update device statistics. */
2204 b43legacy_calculate_link_quality(dev);
2207 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2209 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2211 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2215 static void do_periodic_work(struct b43legacy_wldev *dev)
2219 state = dev->periodic_state;
2221 b43legacy_periodic_every120sec(dev);
2223 b43legacy_periodic_every60sec(dev);
2225 b43legacy_periodic_every30sec(dev);
2226 b43legacy_periodic_every15sec(dev);
2229 /* Periodic work locking policy:
2230 * The whole periodic work handler is protected by
2231 * wl->mutex. If another lock is needed somewhere in the
2232 * pwork callchain, it's aquired in-place, where it's needed.
2234 static void b43legacy_periodic_work_handler(struct work_struct *work)
2236 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2237 periodic_work.work);
2238 struct b43legacy_wl *wl = dev->wl;
2239 unsigned long delay;
2241 mutex_lock(&wl->mutex);
2243 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2245 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2248 do_periodic_work(dev);
2250 dev->periodic_state++;
2252 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2253 delay = msecs_to_jiffies(50);
2255 delay = round_jiffies_relative(HZ * 15);
2256 queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2258 mutex_unlock(&wl->mutex);
2261 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2263 struct delayed_work *work = &dev->periodic_work;
2265 dev->periodic_state = 0;
2266 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2267 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2270 /* Validate access to the chip (SHM) */
2271 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2276 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2277 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2278 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2281 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2282 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2285 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2287 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2288 if ((value | B43legacy_MACCTL_GMODE) !=
2289 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2292 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2298 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2302 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2304 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2305 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2306 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2308 /* KTP is a word address, but we address SHM bytewise.
2309 * So multiply by two.
2312 if (dev->dev->id.revision >= 5)
2313 /* Number of RCMTA address slots */
2314 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2315 dev->max_nr_keys - 8);
2318 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2320 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2321 unsigned long flags;
2323 /* Don't take wl->mutex here, as it could deadlock with
2324 * hwrng internal locking. It's not needed to take
2325 * wl->mutex here, anyway. */
2327 spin_lock_irqsave(&wl->irq_lock, flags);
2328 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2329 spin_unlock_irqrestore(&wl->irq_lock, flags);
2331 return (sizeof(u16));
2334 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2336 if (wl->rng_initialized)
2337 hwrng_unregister(&wl->rng);
2340 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2344 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2345 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2346 wl->rng.name = wl->rng_name;
2347 wl->rng.data_read = b43legacy_rng_read;
2348 wl->rng.priv = (unsigned long)wl;
2349 wl->rng_initialized = 1;
2350 err = hwrng_register(&wl->rng);
2352 wl->rng_initialized = 0;
2353 b43legacyerr(wl, "Failed to register the random "
2354 "number generator (%d)\n", err);
2360 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2361 struct sk_buff *skb,
2362 struct ieee80211_tx_control *ctl)
2364 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2365 struct b43legacy_wldev *dev = wl->current_dev;
2367 unsigned long flags;
2371 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2373 /* DMA-TX is done without a global lock. */
2374 if (b43legacy_using_pio(dev)) {
2375 spin_lock_irqsave(&wl->irq_lock, flags);
2376 err = b43legacy_pio_tx(dev, skb, ctl);
2377 spin_unlock_irqrestore(&wl->irq_lock, flags);
2379 err = b43legacy_dma_tx(dev, skb, ctl);
2382 return NETDEV_TX_BUSY;
2383 return NETDEV_TX_OK;
2386 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2388 const struct ieee80211_tx_queue_params *params)
2393 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2394 struct ieee80211_tx_queue_stats *stats)
2396 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2397 struct b43legacy_wldev *dev = wl->current_dev;
2398 unsigned long flags;
2403 spin_lock_irqsave(&wl->irq_lock, flags);
2404 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2405 if (b43legacy_using_pio(dev))
2406 b43legacy_pio_get_tx_stats(dev, stats);
2408 b43legacy_dma_get_tx_stats(dev, stats);
2411 spin_unlock_irqrestore(&wl->irq_lock, flags);
2416 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2417 struct ieee80211_low_level_stats *stats)
2419 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2420 unsigned long flags;
2422 spin_lock_irqsave(&wl->irq_lock, flags);
2423 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2424 spin_unlock_irqrestore(&wl->irq_lock, flags);
2429 static const char *phymode_to_string(unsigned int phymode)
2432 case B43legacy_PHYMODE_B:
2434 case B43legacy_PHYMODE_G:
2437 B43legacy_BUG_ON(1);
2442 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2443 unsigned int phymode,
2444 struct b43legacy_wldev **dev,
2447 struct b43legacy_wldev *d;
2449 list_for_each_entry(d, &wl->devlist, list) {
2450 if (d->phy.possible_phymodes & phymode) {
2451 /* Ok, this device supports the PHY-mode.
2452 * Set the gmode bit. */
2463 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2465 struct ssb_device *sdev = dev->dev;
2468 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2469 tmslow &= ~B43legacy_TMSLOW_GMODE;
2470 tmslow |= B43legacy_TMSLOW_PHYRESET;
2471 tmslow |= SSB_TMSLOW_FGC;
2472 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2475 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2476 tmslow &= ~SSB_TMSLOW_FGC;
2477 tmslow |= B43legacy_TMSLOW_PHYRESET;
2478 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2482 /* Expects wl->mutex locked */
2483 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2484 unsigned int new_mode)
2486 struct b43legacy_wldev *up_dev;
2487 struct b43legacy_wldev *down_dev;
2492 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2494 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2495 phymode_to_string(new_mode));
2498 if ((up_dev == wl->current_dev) &&
2499 (!!wl->current_dev->phy.gmode == !!gmode))
2500 /* This device is already running. */
2502 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2503 phymode_to_string(new_mode));
2504 down_dev = wl->current_dev;
2506 prev_status = b43legacy_status(down_dev);
2507 /* Shutdown the currently running core. */
2508 if (prev_status >= B43legacy_STAT_STARTED)
2509 b43legacy_wireless_core_stop(down_dev);
2510 if (prev_status >= B43legacy_STAT_INITIALIZED)
2511 b43legacy_wireless_core_exit(down_dev);
2513 if (down_dev != up_dev)
2514 /* We switch to a different core, so we put PHY into
2515 * RESET on the old core. */
2516 b43legacy_put_phy_into_reset(down_dev);
2518 /* Now start the new core. */
2519 up_dev->phy.gmode = gmode;
2520 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2521 err = b43legacy_wireless_core_init(up_dev);
2523 b43legacyerr(wl, "Fatal: Could not initialize device"
2524 " for newly selected %s-PHY mode\n",
2525 phymode_to_string(new_mode));
2529 if (prev_status >= B43legacy_STAT_STARTED) {
2530 err = b43legacy_wireless_core_start(up_dev);
2532 b43legacyerr(wl, "Fatal: Coult not start device for "
2533 "newly selected %s-PHY mode\n",
2534 phymode_to_string(new_mode));
2535 b43legacy_wireless_core_exit(up_dev);
2539 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2541 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2543 wl->current_dev = up_dev;
2547 /* Whoops, failed to init the new core. No core is operating now. */
2548 wl->current_dev = NULL;
2552 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2555 case 0: /* default/diversity */
2556 return B43legacy_ANTENNA_DEFAULT;
2557 case 1: /* Antenna 0 */
2558 return B43legacy_ANTENNA0;
2559 case 2: /* Antenna 1 */
2560 return B43legacy_ANTENNA1;
2562 return B43legacy_ANTENNA_DEFAULT;
2566 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2567 struct ieee80211_conf *conf)
2569 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2570 struct b43legacy_wldev *dev;
2571 struct b43legacy_phy *phy;
2572 unsigned long flags;
2573 unsigned int new_phymode = 0xFFFF;
2579 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2580 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2582 mutex_lock(&wl->mutex);
2583 dev = wl->current_dev;
2586 /* Switch the PHY mode (if necessary). */
2587 switch (conf->channel->band) {
2588 case IEEE80211_BAND_2GHZ:
2589 if (phy->type == B43legacy_PHYTYPE_B)
2590 new_phymode = B43legacy_PHYMODE_B;
2592 new_phymode = B43legacy_PHYMODE_G;
2595 B43legacy_WARN_ON(1);
2597 err = b43legacy_switch_phymode(wl, new_phymode);
2599 goto out_unlock_mutex;
2601 /* Disable IRQs while reconfiguring the device.
2602 * This makes it possible to drop the spinlock throughout
2603 * the reconfiguration process. */
2604 spin_lock_irqsave(&wl->irq_lock, flags);
2605 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2606 spin_unlock_irqrestore(&wl->irq_lock, flags);
2607 goto out_unlock_mutex;
2609 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2610 spin_unlock_irqrestore(&wl->irq_lock, flags);
2611 b43legacy_synchronize_irq(dev);
2613 /* Switch to the requested channel.
2614 * The firmware takes care of races with the TX handler. */
2615 if (conf->channel->hw_value != phy->channel)
2616 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2618 /* Enable/Disable ShortSlot timing. */
2619 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2620 != dev->short_slot) {
2621 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2622 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2623 b43legacy_short_slot_timing_enable(dev);
2625 b43legacy_short_slot_timing_disable(dev);
2628 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2630 /* Adjust the desired TX power level. */
2631 if (conf->power_level != 0) {
2632 if (conf->power_level != phy->power_level) {
2633 phy->power_level = conf->power_level;
2634 b43legacy_phy_xmitpower(dev);
2638 /* Antennas for RX and management frame TX. */
2639 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2641 /* Update templates for AP mode. */
2642 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2643 b43legacy_set_beacon_int(dev, conf->beacon_int);
2646 if (!!conf->radio_enabled != phy->radio_on) {
2647 if (conf->radio_enabled) {
2648 b43legacy_radio_turn_on(dev);
2649 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2650 if (!dev->radio_hw_enable)
2651 b43legacyinfo(dev->wl, "The hardware RF-kill"
2652 " button still turns the radio"
2653 " physically off. Press the"
2654 " button to turn it on.\n");
2656 b43legacy_radio_turn_off(dev, 0);
2657 b43legacyinfo(dev->wl, "Radio turned off by"
2662 spin_lock_irqsave(&wl->irq_lock, flags);
2663 b43legacy_interrupt_enable(dev, savedirqs);
2665 spin_unlock_irqrestore(&wl->irq_lock, flags);
2667 mutex_unlock(&wl->mutex);
2672 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2673 unsigned int changed,
2674 unsigned int *fflags,
2676 struct dev_addr_list *mc_list)
2678 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2679 struct b43legacy_wldev *dev = wl->current_dev;
2680 unsigned long flags;
2687 spin_lock_irqsave(&wl->irq_lock, flags);
2688 *fflags &= FIF_PROMISC_IN_BSS |
2694 FIF_BCN_PRBRESP_PROMISC;
2696 changed &= FIF_PROMISC_IN_BSS |
2702 FIF_BCN_PRBRESP_PROMISC;
2704 wl->filter_flags = *fflags;
2706 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2707 b43legacy_adjust_opmode(dev);
2708 spin_unlock_irqrestore(&wl->irq_lock, flags);
2711 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2712 struct ieee80211_vif *vif,
2713 struct ieee80211_if_conf *conf)
2715 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2716 struct b43legacy_wldev *dev = wl->current_dev;
2717 unsigned long flags;
2721 mutex_lock(&wl->mutex);
2722 spin_lock_irqsave(&wl->irq_lock, flags);
2723 B43legacy_WARN_ON(wl->vif != vif);
2725 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2727 memset(wl->bssid, 0, ETH_ALEN);
2728 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2729 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2730 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2731 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2733 b43legacy_update_templates(wl, conf->beacon);
2735 b43legacy_write_mac_bssid_templates(dev);
2737 spin_unlock_irqrestore(&wl->irq_lock, flags);
2738 mutex_unlock(&wl->mutex);
2743 /* Locking: wl->mutex */
2744 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2746 struct b43legacy_wl *wl = dev->wl;
2747 unsigned long flags;
2749 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2752 /* Disable and sync interrupts. We must do this before than
2753 * setting the status to INITIALIZED, as the interrupt handler
2754 * won't care about IRQs then. */
2755 spin_lock_irqsave(&wl->irq_lock, flags);
2756 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2758 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2759 spin_unlock_irqrestore(&wl->irq_lock, flags);
2760 b43legacy_synchronize_irq(dev);
2762 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2764 mutex_unlock(&wl->mutex);
2765 /* Must unlock as it would otherwise deadlock. No races here.
2766 * Cancel the possibly running self-rearming periodic work. */
2767 cancel_delayed_work_sync(&dev->periodic_work);
2768 mutex_lock(&wl->mutex);
2770 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2772 b43legacy_mac_suspend(dev);
2773 free_irq(dev->dev->irq, dev);
2774 b43legacydbg(wl, "Wireless interface stopped\n");
2777 /* Locking: wl->mutex */
2778 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2782 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2784 drain_txstatus_queue(dev);
2785 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2786 IRQF_SHARED, KBUILD_MODNAME, dev);
2788 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2792 /* We are ready to run. */
2793 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2795 /* Start data flow (TX/RX) */
2796 b43legacy_mac_enable(dev);
2797 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2798 ieee80211_start_queues(dev->wl->hw);
2800 /* Start maintenance work */
2801 b43legacy_periodic_tasks_setup(dev);
2803 b43legacydbg(dev->wl, "Wireless interface started\n");
2808 /* Get PHY and RADIO versioning numbers */
2809 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2811 struct b43legacy_phy *phy = &dev->phy;
2819 int unsupported = 0;
2821 /* Get PHY versioning */
2822 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2823 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2824 >> B43legacy_PHYVER_ANALOG_SHIFT;
2825 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2826 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2828 case B43legacy_PHYTYPE_B:
2829 if (phy_rev != 2 && phy_rev != 4
2830 && phy_rev != 6 && phy_rev != 7)
2833 case B43legacy_PHYTYPE_G:
2841 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2842 "(Analog %u, Type %u, Revision %u)\n",
2843 analog_type, phy_type, phy_rev);
2846 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2847 analog_type, phy_type, phy_rev);
2850 /* Get RADIO versioning */
2851 if (dev->dev->bus->chip_id == 0x4317) {
2852 if (dev->dev->bus->chip_rev == 0)
2854 else if (dev->dev->bus->chip_rev == 1)
2859 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2860 B43legacy_RADIOCTL_ID);
2861 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2863 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2864 B43legacy_RADIOCTL_ID);
2865 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2867 radio_manuf = (tmp & 0x00000FFF);
2868 radio_ver = (tmp & 0x0FFFF000) >> 12;
2869 radio_rev = (tmp & 0xF0000000) >> 28;
2871 case B43legacy_PHYTYPE_B:
2872 if ((radio_ver & 0xFFF0) != 0x2050)
2875 case B43legacy_PHYTYPE_G:
2876 if (radio_ver != 0x2050)
2880 B43legacy_BUG_ON(1);
2883 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2884 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2885 radio_manuf, radio_ver, radio_rev);
2888 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2889 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2892 phy->radio_manuf = radio_manuf;
2893 phy->radio_ver = radio_ver;
2894 phy->radio_rev = radio_rev;
2896 phy->analog = analog_type;
2897 phy->type = phy_type;
2903 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2904 struct b43legacy_phy *phy)
2906 struct b43legacy_lopair *lo;
2909 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2910 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2912 /* Assume the radio is enabled. If it's not enabled, the state will
2913 * immediately get fixed on the first periodic work run. */
2914 dev->radio_hw_enable = 1;
2916 phy->savedpctlreg = 0xFFFF;
2917 phy->aci_enable = 0;
2918 phy->aci_wlan_automatic = 0;
2919 phy->aci_hw_rssi = 0;
2921 lo = phy->_lo_pairs;
2923 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2924 B43legacy_LO_COUNT);
2925 phy->max_lb_gain = 0;
2926 phy->trsw_rx_gain = 0;
2928 /* Set default attenuation values. */
2929 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2930 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2931 phy->txctl1 = b43legacy_default_txctl1(dev);
2932 phy->txpwr_offset = 0;
2935 phy->nrssislope = 0;
2936 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2937 phy->nrssi[i] = -1000;
2938 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2939 phy->nrssi_lt[i] = i;
2941 phy->lofcal = 0xFFFF;
2942 phy->initval = 0xFFFF;
2944 phy->interfmode = B43legacy_INTERFMODE_NONE;
2945 phy->channel = 0xFF;
2948 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2954 memset(&dev->stats, 0, sizeof(dev->stats));
2956 setup_struct_phy_for_init(dev, &dev->phy);
2958 /* IRQ related flags */
2959 dev->irq_reason = 0;
2960 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2961 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2963 dev->mac_suspended = 1;
2965 /* Noise calculation context */
2966 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2969 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2971 #ifdef CONFIG_SSB_DRIVER_PCICORE
2972 struct ssb_bus *bus = dev->dev->bus;
2975 if (bus->pcicore.dev &&
2976 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2977 bus->pcicore.dev->id.revision <= 5) {
2978 /* IMCFGLO timeouts workaround. */
2979 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2980 tmp &= ~SSB_IMCFGLO_REQTO;
2981 tmp &= ~SSB_IMCFGLO_SERTO;
2982 switch (bus->bustype) {
2983 case SSB_BUSTYPE_PCI:
2984 case SSB_BUSTYPE_PCMCIA:
2987 case SSB_BUSTYPE_SSB:
2991 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2993 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2996 /* Write the short and long frame retry limit values. */
2997 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2998 unsigned int short_retry,
2999 unsigned int long_retry)
3001 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3002 * the chip-internal counter. */
3003 short_retry = min(short_retry, (unsigned int)0xF);
3004 long_retry = min(long_retry, (unsigned int)0xF);
3006 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
3007 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
3010 /* Shutdown a wireless core */
3011 /* Locking: wl->mutex */
3012 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3014 struct b43legacy_wl *wl = dev->wl;
3015 struct b43legacy_phy *phy = &dev->phy;
3018 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3019 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3021 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3023 /* Stop the microcode PSM. */
3024 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3025 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3026 macctl |= B43legacy_MACCTL_PSM_JMP0;
3027 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3029 mutex_unlock(&wl->mutex);
3030 /* Must unlock as it would otherwise deadlock. No races here.
3031 * Cancel possibly pending workqueues. */
3032 cancel_work_sync(&dev->restart_work);
3033 mutex_lock(&wl->mutex);
3035 b43legacy_leds_exit(dev);
3036 b43legacy_rng_exit(dev->wl);
3037 b43legacy_pio_free(dev);
3038 b43legacy_dma_free(dev);
3039 b43legacy_chip_exit(dev);
3040 b43legacy_radio_turn_off(dev, 1);
3041 b43legacy_switch_analog(dev, 0);
3042 if (phy->dyn_tssi_tbl)
3043 kfree(phy->tssi2dbm);
3044 kfree(phy->lo_control);
3045 phy->lo_control = NULL;
3046 if (dev->wl->current_beacon) {
3047 dev_kfree_skb_any(dev->wl->current_beacon);
3048 dev->wl->current_beacon = NULL;
3051 ssb_device_disable(dev->dev, 0);
3052 ssb_bus_may_powerdown(dev->dev->bus);
3055 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3057 struct b43legacy_phy *phy = &dev->phy;
3060 /* Set default attenuation values. */
3061 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3062 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3063 phy->txctl1 = b43legacy_default_txctl1(dev);
3064 phy->txctl2 = 0xFFFF;
3065 phy->txpwr_offset = 0;
3068 phy->nrssislope = 0;
3069 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3070 phy->nrssi[i] = -1000;
3071 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3072 phy->nrssi_lt[i] = i;
3074 phy->lofcal = 0xFFFF;
3075 phy->initval = 0xFFFF;
3077 phy->aci_enable = 0;
3078 phy->aci_wlan_automatic = 0;
3079 phy->aci_hw_rssi = 0;
3081 phy->antenna_diversity = 0xFFFF;
3082 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3083 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3086 phy->calibrated = 0;
3089 memset(phy->_lo_pairs, 0,
3090 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3091 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3094 /* Initialize a wireless core */
3095 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3097 struct b43legacy_wl *wl = dev->wl;
3098 struct ssb_bus *bus = dev->dev->bus;
3099 struct b43legacy_phy *phy = &dev->phy;
3100 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3105 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3107 err = ssb_bus_powerup(bus, 0);
3110 if (!ssb_device_is_enabled(dev->dev)) {
3111 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3112 b43legacy_wireless_core_reset(dev, tmp);
3115 if ((phy->type == B43legacy_PHYTYPE_B) ||
3116 (phy->type == B43legacy_PHYTYPE_G)) {
3117 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3118 * B43legacy_LO_COUNT,
3120 if (!phy->_lo_pairs)
3123 setup_struct_wldev_for_init(dev);
3125 err = b43legacy_phy_init_tssi2dbm_table(dev);
3127 goto err_kfree_lo_control;
3129 /* Enable IRQ routing to this device. */
3130 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3132 b43legacy_imcfglo_timeouts_workaround(dev);
3133 prepare_phy_data_for_init(dev);
3134 b43legacy_phy_calibrate(dev);
3135 err = b43legacy_chip_init(dev);
3137 goto err_kfree_tssitbl;
3138 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3139 B43legacy_SHM_SH_WLCOREREV,
3140 dev->dev->id.revision);
3141 hf = b43legacy_hf_read(dev);
3142 if (phy->type == B43legacy_PHYTYPE_G) {
3143 hf |= B43legacy_HF_SYMW;
3145 hf |= B43legacy_HF_GDCW;
3146 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3147 hf |= B43legacy_HF_OFDMPABOOST;
3148 } else if (phy->type == B43legacy_PHYTYPE_B) {
3149 hf |= B43legacy_HF_SYMW;
3150 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3151 hf &= ~B43legacy_HF_GDCW;
3153 b43legacy_hf_write(dev, hf);
3155 b43legacy_set_retry_limits(dev,
3156 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3157 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3159 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3161 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3164 /* Disable sending probe responses from firmware.
3165 * Setting the MaxTime to one usec will always trigger
3166 * a timeout, so we never send any probe resp.
3167 * A timeout of zero is infinite. */
3168 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3169 B43legacy_SHM_SH_PRMAXTIME, 1);
3171 b43legacy_rate_memory_init(dev);
3173 /* Minimum Contention Window */
3174 if (phy->type == B43legacy_PHYTYPE_B)
3175 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3178 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3180 /* Maximum Contention Window */
3181 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3185 if (b43legacy_using_pio(dev))
3186 err = b43legacy_pio_init(dev);
3188 err = b43legacy_dma_init(dev);
3190 b43legacy_qos_init(dev);
3192 } while (err == -EAGAIN);
3196 b43legacy_write16(dev, 0x0612, 0x0050);
3197 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3198 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3200 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3201 b43legacy_upload_card_macaddress(dev);
3202 b43legacy_security_init(dev);
3203 b43legacy_rng_init(wl);
3205 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3207 b43legacy_leds_init(dev);
3212 b43legacy_chip_exit(dev);
3214 if (phy->dyn_tssi_tbl)
3215 kfree(phy->tssi2dbm);
3216 err_kfree_lo_control:
3217 kfree(phy->lo_control);
3218 phy->lo_control = NULL;
3219 ssb_bus_may_powerdown(bus);
3220 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3224 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3225 struct ieee80211_if_init_conf *conf)
3227 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3228 struct b43legacy_wldev *dev;
3229 unsigned long flags;
3230 int err = -EOPNOTSUPP;
3232 /* TODO: allow WDS/AP devices to coexist */
3234 if (conf->type != IEEE80211_IF_TYPE_AP &&
3235 conf->type != IEEE80211_IF_TYPE_STA &&
3236 conf->type != IEEE80211_IF_TYPE_WDS &&
3237 conf->type != IEEE80211_IF_TYPE_IBSS)
3240 mutex_lock(&wl->mutex);
3242 goto out_mutex_unlock;
3244 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3246 dev = wl->current_dev;
3248 wl->vif = conf->vif;
3249 wl->if_type = conf->type;
3250 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3252 spin_lock_irqsave(&wl->irq_lock, flags);
3253 b43legacy_adjust_opmode(dev);
3254 b43legacy_upload_card_macaddress(dev);
3255 spin_unlock_irqrestore(&wl->irq_lock, flags);
3259 mutex_unlock(&wl->mutex);
3264 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3265 struct ieee80211_if_init_conf *conf)
3267 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3268 struct b43legacy_wldev *dev = wl->current_dev;
3269 unsigned long flags;
3271 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3273 mutex_lock(&wl->mutex);
3275 B43legacy_WARN_ON(!wl->operating);
3276 B43legacy_WARN_ON(wl->vif != conf->vif);
3281 spin_lock_irqsave(&wl->irq_lock, flags);
3282 b43legacy_adjust_opmode(dev);
3283 memset(wl->mac_addr, 0, ETH_ALEN);
3284 b43legacy_upload_card_macaddress(dev);
3285 spin_unlock_irqrestore(&wl->irq_lock, flags);
3287 mutex_unlock(&wl->mutex);
3290 static int b43legacy_op_start(struct ieee80211_hw *hw)
3292 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3293 struct b43legacy_wldev *dev = wl->current_dev;
3296 bool do_rfkill_exit = 0;
3298 /* First register RFkill.
3299 * LEDs that are registered later depend on it. */
3300 b43legacy_rfkill_init(dev);
3302 /* Kill all old instance specific information to make sure
3303 * the card won't use it in the short timeframe between start
3304 * and mac80211 reconfiguring it. */
3305 memset(wl->bssid, 0, ETH_ALEN);
3306 memset(wl->mac_addr, 0, ETH_ALEN);
3307 wl->filter_flags = 0;
3309 mutex_lock(&wl->mutex);
3311 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3312 err = b43legacy_wireless_core_init(dev);
3315 goto out_mutex_unlock;
3320 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3321 err = b43legacy_wireless_core_start(dev);
3324 b43legacy_wireless_core_exit(dev);
3326 goto out_mutex_unlock;
3331 mutex_unlock(&wl->mutex);
3334 b43legacy_rfkill_exit(dev);
3339 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3341 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3342 struct b43legacy_wldev *dev = wl->current_dev;
3344 b43legacy_rfkill_exit(dev);
3346 mutex_lock(&wl->mutex);
3347 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3348 b43legacy_wireless_core_stop(dev);
3349 b43legacy_wireless_core_exit(dev);
3350 mutex_unlock(&wl->mutex);
3353 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3354 u32 short_retry_limit,
3355 u32 long_retry_limit)
3357 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3358 struct b43legacy_wldev *dev;
3361 mutex_lock(&wl->mutex);
3362 dev = wl->current_dev;
3363 if (unlikely(!dev ||
3364 (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3368 b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3370 mutex_unlock(&wl->mutex);
3375 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3378 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3379 struct sk_buff *beacon;
3380 unsigned long flags;
3382 /* We could modify the existing beacon and set the aid bit in the TIM
3383 * field, but that would probably require resizing and moving of data
3384 * within the beacon template. Simply request a new beacon and let
3385 * mac80211 do the hard work. */
3386 beacon = ieee80211_beacon_get(hw, wl->vif, NULL);
3387 if (unlikely(!beacon))
3389 spin_lock_irqsave(&wl->irq_lock, flags);
3390 b43legacy_update_templates(wl, beacon);
3391 spin_unlock_irqrestore(&wl->irq_lock, flags);
3396 static int b43legacy_op_ibss_beacon_update(struct ieee80211_hw *hw,
3397 struct sk_buff *beacon,
3398 struct ieee80211_tx_control *ctl)
3400 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3401 unsigned long flags;
3403 spin_lock_irqsave(&wl->irq_lock, flags);
3404 b43legacy_update_templates(wl, beacon);
3405 spin_unlock_irqrestore(&wl->irq_lock, flags);
3410 static const struct ieee80211_ops b43legacy_hw_ops = {
3411 .tx = b43legacy_op_tx,
3412 .conf_tx = b43legacy_op_conf_tx,
3413 .add_interface = b43legacy_op_add_interface,
3414 .remove_interface = b43legacy_op_remove_interface,
3415 .config = b43legacy_op_dev_config,
3416 .config_interface = b43legacy_op_config_interface,
3417 .configure_filter = b43legacy_op_configure_filter,
3418 .get_stats = b43legacy_op_get_stats,
3419 .get_tx_stats = b43legacy_op_get_tx_stats,
3420 .start = b43legacy_op_start,
3421 .stop = b43legacy_op_stop,
3422 .set_retry_limit = b43legacy_op_set_retry_limit,
3423 .set_tim = b43legacy_op_beacon_set_tim,
3424 .beacon_update = b43legacy_op_ibss_beacon_update,
3427 /* Hard-reset the chip. Do not call this directly.
3428 * Use b43legacy_controller_restart()
3430 static void b43legacy_chip_reset(struct work_struct *work)
3432 struct b43legacy_wldev *dev =
3433 container_of(work, struct b43legacy_wldev, restart_work);
3434 struct b43legacy_wl *wl = dev->wl;
3438 mutex_lock(&wl->mutex);
3440 prev_status = b43legacy_status(dev);
3441 /* Bring the device down... */
3442 if (prev_status >= B43legacy_STAT_STARTED)
3443 b43legacy_wireless_core_stop(dev);
3444 if (prev_status >= B43legacy_STAT_INITIALIZED)
3445 b43legacy_wireless_core_exit(dev);
3447 /* ...and up again. */
3448 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3449 err = b43legacy_wireless_core_init(dev);
3453 if (prev_status >= B43legacy_STAT_STARTED) {
3454 err = b43legacy_wireless_core_start(dev);
3456 b43legacy_wireless_core_exit(dev);
3461 mutex_unlock(&wl->mutex);
3463 b43legacyerr(wl, "Controller restart FAILED\n");
3465 b43legacyinfo(wl, "Controller restarted\n");
3468 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3472 struct ieee80211_hw *hw = dev->wl->hw;
3473 struct b43legacy_phy *phy = &dev->phy;
3475 phy->possible_phymodes = 0;
3477 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3478 &b43legacy_band_2GHz_BPHY;
3479 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3483 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3484 &b43legacy_band_2GHz_GPHY;
3485 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3491 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3493 /* We release firmware that late to not be required to re-request
3494 * is all the time when we reinit the core. */
3495 b43legacy_release_firmware(dev);
3498 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3500 struct b43legacy_wl *wl = dev->wl;
3501 struct ssb_bus *bus = dev->dev->bus;
3502 struct pci_dev *pdev = bus->host_pci;
3508 /* Do NOT do any device initialization here.
3509 * Do it in wireless_core_init() instead.
3510 * This function is for gathering basic information about the HW, only.
3511 * Also some structs may be set up here. But most likely you want to
3512 * have that in core_init(), too.
3515 err = ssb_bus_powerup(bus, 0);
3517 b43legacyerr(wl, "Bus powerup failed\n");
3520 /* Get the PHY type. */
3521 if (dev->dev->id.revision >= 5) {
3524 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3525 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3528 } else if (dev->dev->id.revision == 4)
3533 dev->phy.gmode = (have_gphy || have_bphy);
3534 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3535 b43legacy_wireless_core_reset(dev, tmp);
3537 err = b43legacy_phy_versioning(dev);
3540 /* Check if this device supports multiband. */
3542 (pdev->device != 0x4312 &&
3543 pdev->device != 0x4319 &&
3544 pdev->device != 0x4324)) {
3545 /* No multiband support. */
3548 switch (dev->phy.type) {
3549 case B43legacy_PHYTYPE_B:
3552 case B43legacy_PHYTYPE_G:
3556 B43legacy_BUG_ON(1);
3559 dev->phy.gmode = (have_gphy || have_bphy);
3560 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3561 b43legacy_wireless_core_reset(dev, tmp);
3563 err = b43legacy_validate_chipaccess(dev);
3566 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3570 /* Now set some default "current_dev" */
3571 if (!wl->current_dev)
3572 wl->current_dev = dev;
3573 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3575 b43legacy_radio_turn_off(dev, 1);
3576 b43legacy_switch_analog(dev, 0);
3577 ssb_device_disable(dev->dev, 0);
3578 ssb_bus_may_powerdown(bus);
3584 ssb_bus_may_powerdown(bus);
3588 static void b43legacy_one_core_detach(struct ssb_device *dev)
3590 struct b43legacy_wldev *wldev;
3591 struct b43legacy_wl *wl;
3593 wldev = ssb_get_drvdata(dev);
3595 cancel_work_sync(&wldev->restart_work);
3596 b43legacy_debugfs_remove_device(wldev);
3597 b43legacy_wireless_core_detach(wldev);
3598 list_del(&wldev->list);
3600 ssb_set_drvdata(dev, NULL);
3604 static int b43legacy_one_core_attach(struct ssb_device *dev,
3605 struct b43legacy_wl *wl)
3607 struct b43legacy_wldev *wldev;
3608 struct pci_dev *pdev;
3611 if (!list_empty(&wl->devlist)) {
3612 /* We are not the first core on this chip. */
3613 pdev = dev->bus->host_pci;
3614 /* Only special chips support more than one wireless
3615 * core, although some of the other chips have more than
3616 * one wireless core as well. Check for this and
3620 ((pdev->device != 0x4321) &&
3621 (pdev->device != 0x4313) &&
3622 (pdev->device != 0x431A))) {
3623 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3628 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3634 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3635 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3636 tasklet_init(&wldev->isr_tasklet,
3637 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3638 (unsigned long)wldev);
3640 wldev->__using_pio = 1;
3641 INIT_LIST_HEAD(&wldev->list);
3643 err = b43legacy_wireless_core_attach(wldev);
3645 goto err_kfree_wldev;
3647 list_add(&wldev->list, &wl->devlist);
3649 ssb_set_drvdata(dev, wldev);
3650 b43legacy_debugfs_add_device(wldev);
3659 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3661 /* boardflags workarounds */
3662 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3663 bus->boardinfo.type == 0x4E &&
3664 bus->boardinfo.rev > 0x40)
3665 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3668 static void b43legacy_wireless_exit(struct ssb_device *dev,
3669 struct b43legacy_wl *wl)
3671 struct ieee80211_hw *hw = wl->hw;
3673 ssb_set_devtypedata(dev, NULL);
3674 ieee80211_free_hw(hw);
3677 static int b43legacy_wireless_init(struct ssb_device *dev)
3679 struct ssb_sprom *sprom = &dev->bus->sprom;
3680 struct ieee80211_hw *hw;
3681 struct b43legacy_wl *wl;
3684 b43legacy_sprom_fixup(dev->bus);
3686 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3688 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3693 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3694 IEEE80211_HW_RX_INCLUDES_FCS;
3695 hw->max_signal = 100;
3696 hw->max_rssi = -110;
3697 hw->max_noise = -110;
3698 hw->queues = 1; /* FIXME: hardware has more queues */
3699 SET_IEEE80211_DEV(hw, dev->dev);
3700 if (is_valid_ether_addr(sprom->et1mac))
3701 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3703 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3705 /* Get and initialize struct b43legacy_wl */
3706 wl = hw_to_b43legacy_wl(hw);
3707 memset(wl, 0, sizeof(*wl));
3709 spin_lock_init(&wl->irq_lock);
3710 spin_lock_init(&wl->leds_lock);
3711 mutex_init(&wl->mutex);
3712 INIT_LIST_HEAD(&wl->devlist);
3714 ssb_set_devtypedata(dev, wl);
3715 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3721 static int b43legacy_probe(struct ssb_device *dev,
3722 const struct ssb_device_id *id)
3724 struct b43legacy_wl *wl;
3728 wl = ssb_get_devtypedata(dev);
3730 /* Probing the first core - setup common struct b43legacy_wl */
3732 err = b43legacy_wireless_init(dev);
3735 wl = ssb_get_devtypedata(dev);
3736 B43legacy_WARN_ON(!wl);
3738 err = b43legacy_one_core_attach(dev, wl);
3740 goto err_wireless_exit;
3743 err = ieee80211_register_hw(wl->hw);
3745 goto err_one_core_detach;
3751 err_one_core_detach:
3752 b43legacy_one_core_detach(dev);
3755 b43legacy_wireless_exit(dev, wl);
3759 static void b43legacy_remove(struct ssb_device *dev)
3761 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3762 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3764 B43legacy_WARN_ON(!wl);
3765 if (wl->current_dev == wldev)
3766 ieee80211_unregister_hw(wl->hw);
3768 b43legacy_one_core_detach(dev);
3770 if (list_empty(&wl->devlist))
3771 /* Last core on the chip unregistered.
3772 * We can destroy common struct b43legacy_wl.
3774 b43legacy_wireless_exit(dev, wl);
3777 /* Perform a hardware reset. This can be called from any context. */
3778 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3781 /* Must avoid requeueing, if we are in shutdown. */
3782 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3784 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3785 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3790 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3792 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3793 struct b43legacy_wl *wl = wldev->wl;
3795 b43legacydbg(wl, "Suspending...\n");
3797 mutex_lock(&wl->mutex);
3798 wldev->suspend_init_status = b43legacy_status(wldev);
3799 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3800 b43legacy_wireless_core_stop(wldev);
3801 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3802 b43legacy_wireless_core_exit(wldev);
3803 mutex_unlock(&wl->mutex);
3805 b43legacydbg(wl, "Device suspended.\n");
3810 static int b43legacy_resume(struct ssb_device *dev)
3812 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3813 struct b43legacy_wl *wl = wldev->wl;
3816 b43legacydbg(wl, "Resuming...\n");
3818 mutex_lock(&wl->mutex);
3819 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3820 err = b43legacy_wireless_core_init(wldev);
3822 b43legacyerr(wl, "Resume failed at core init\n");
3826 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3827 err = b43legacy_wireless_core_start(wldev);
3829 b43legacy_wireless_core_exit(wldev);
3830 b43legacyerr(wl, "Resume failed at core start\n");
3834 mutex_unlock(&wl->mutex);
3836 b43legacydbg(wl, "Device resumed.\n");
3841 #else /* CONFIG_PM */
3842 # define b43legacy_suspend NULL
3843 # define b43legacy_resume NULL
3844 #endif /* CONFIG_PM */
3846 static struct ssb_driver b43legacy_ssb_driver = {
3847 .name = KBUILD_MODNAME,
3848 .id_table = b43legacy_ssb_tbl,
3849 .probe = b43legacy_probe,
3850 .remove = b43legacy_remove,
3851 .suspend = b43legacy_suspend,
3852 .resume = b43legacy_resume,
3855 static void b43legacy_print_driverinfo(void)
3857 const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3858 *feat_pio = "", *feat_dma = "";
3860 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3863 #ifdef CONFIG_B43LEGACY_LEDS
3866 #ifdef CONFIG_B43LEGACY_RFKILL
3869 #ifdef CONFIG_B43LEGACY_PIO
3872 #ifdef CONFIG_B43LEGACY_DMA
3875 printk(KERN_INFO "Broadcom 43xx driver loaded "
3876 "[ Features: %s%s%s%s%s, Firmware-ID: "
3877 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3878 feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3881 static int __init b43legacy_init(void)
3885 b43legacy_debugfs_init();
3887 err = ssb_driver_register(&b43legacy_ssb_driver);
3891 b43legacy_print_driverinfo();
3896 b43legacy_debugfs_exit();
3900 static void __exit b43legacy_exit(void)
3902 ssb_driver_unregister(&b43legacy_ssb_driver);
3903 b43legacy_debugfs_exit();
3906 module_init(b43legacy_init)
3907 module_exit(b43legacy_exit)