Pileus Git - ~andy/linux/blob - drivers/net/wireless/ath/ath9k/mci.c

   1 /*
   2  * Copyright (c) 2010-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/dma-mapping.h>
  18 #include <linux/slab.h>
  19
  20 #include "ath9k.h"
  21 #include "mci.h"
  22
  23 static const u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 };
  24
  25 static struct ath_mci_profile_info*
  26 ath_mci_find_profile(struct ath_mci_profile *mci,
  27                      struct ath_mci_profile_info *info)
  28 {
  29         struct ath_mci_profile_info *entry;
  30
  31         list_for_each_entry(entry, &mci->info, list) {
  32                 if (entry->conn_handle == info->conn_handle)
  33                         break;
  34         }
  35         return entry;
  36 }
  37
  38 static bool ath_mci_add_profile(struct ath_common *common,
  39                                 struct ath_mci_profile *mci,
  40                                 struct ath_mci_profile_info *info)
  41 {
  42         struct ath_mci_profile_info *entry;
  43
  44         if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
  45             (info->type == MCI_GPM_COEX_PROFILE_VOICE))
  46                 return false;
  47
  48         if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
  49             (info->type != MCI_GPM_COEX_PROFILE_VOICE))
  50                 return false;
  51
  52         entry = ath_mci_find_profile(mci, info);
  53
  54         if (entry) {
  55                 memcpy(entry, info, 10);
  56         } else {
  57                 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
  58                 if (!entry)
  59                         return false;
  60
  61                 memcpy(entry, info, 10);
  62                 INC_PROF(mci, info);
  63                 list_add_tail(&info->list, &mci->info);
  64         }
  65
  66         return true;
  67 }
  68
  69 static void ath_mci_del_profile(struct ath_common *common,
  70                                 struct ath_mci_profile *mci,
  71                                 struct ath_mci_profile_info *info)
  72 {
  73         struct ath_mci_profile_info *entry;
  74
  75         entry = ath_mci_find_profile(mci, info);
  76
  77         if (!entry)
  78                 return;
  79
  80         DEC_PROF(mci, entry);
  81         list_del(&entry->list);
  82         kfree(entry);
  83 }
  84
  85 void ath_mci_flush_profile(struct ath_mci_profile *mci)
  86 {
  87         struct ath_mci_profile_info *info, *tinfo;
  88
  89         list_for_each_entry_safe(info, tinfo, &mci->info, list) {
  90                 list_del(&info->list);
  91                 DEC_PROF(mci, info);
  92                 kfree(info);
  93         }
  94         mci->aggr_limit = 0;
  95 }
  96
  97 static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
  98 {
  99         struct ath_mci_profile *mci = &btcoex->mci;
 100         u32 wlan_airtime = btcoex->btcoex_period *
 101                                 (100 - btcoex->duty_cycle) / 100;
 102
 103         /*
 104          * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
 105          * When wlan_airtime is less than 4ms, aggregation limit has to be
 106          * adjusted half of wlan_airtime to ensure that the aggregation can fit
 107          * without collision with BT traffic.
 108          */
 109         if ((wlan_airtime <= 4) &&
 110             (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime))))
 111                 mci->aggr_limit = 2 * wlan_airtime;
 112 }
 113
 114 static void ath_mci_update_scheme(struct ath_softc *sc)
 115 {
 116         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 117         struct ath_btcoex *btcoex = &sc->btcoex;
 118         struct ath_mci_profile *mci = &btcoex->mci;
 119         struct ath9k_hw_mci *mci_hw = &sc->sc_ah->btcoex_hw.mci;
 120         struct ath_mci_profile_info *info;
 121         u32 num_profile = NUM_PROF(mci);
 122
 123         if (mci_hw->config & ATH_MCI_CONFIG_DISABLE_TUNING)
 124                 goto skip_tuning;
 125
 126         if (num_profile == 1) {
 127                 info = list_first_entry(&mci->info,
 128                                         struct ath_mci_profile_info,
 129                                         list);
 130                 if (mci->num_sco) {
 131                         if (info->T == 12)
 132                                 mci->aggr_limit = 8;
 133                         else if (info->T == 6) {
 134                                 mci->aggr_limit = 6;
 135                                 btcoex->duty_cycle = 30;
 136                         }
 137                         ath_dbg(common, MCI,
 138                                 "Single SCO, aggregation limit %d 1/4 ms\n",
 139                                 mci->aggr_limit);
 140                 } else if (mci->num_pan || mci->num_other_acl) {
 141                         /*
 142                          * For single PAN/FTP profile, allocate 35% for BT
 143                          * to improve WLAN throughput.
 144                          */
 145                         btcoex->duty_cycle = 35;
 146                         btcoex->btcoex_period = 53;
 147                         ath_dbg(common, MCI,
 148                                 "Single PAN/FTP bt period %d ms dutycycle %d\n",
 149                                 btcoex->duty_cycle, btcoex->btcoex_period);
 150                 } else if (mci->num_hid) {
 151                         btcoex->duty_cycle = 30;
 152                         mci->aggr_limit = 6;
 153                         ath_dbg(common, MCI,
 154                                 "Multiple attempt/timeout single HID "
 155                                 "aggregation limit 1.5 ms dutycycle 30%%\n");
 156                 }
 157         } else if (num_profile == 2) {
 158                 if (mci->num_hid == 2)
 159                         btcoex->duty_cycle = 30;
 160                 mci->aggr_limit = 6;
 161                 ath_dbg(common, MCI,
 162                         "Two BT profiles aggr limit 1.5 ms dutycycle %d%%\n",
 163                         btcoex->duty_cycle);
 164         } else if (num_profile >= 3) {
 165                 mci->aggr_limit = 4;
 166                 ath_dbg(common, MCI,
 167                         "Three or more profiles aggregation limit 1 ms\n");
 168         }
 169
 170 skip_tuning:
 171         if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
 172                 if (IS_CHAN_HT(sc->sc_ah->curchan))
 173                         ath_mci_adjust_aggr_limit(btcoex);
 174                 else
 175                         btcoex->btcoex_period >>= 1;
 176         }
 177
 178         ath9k_hw_btcoex_disable(sc->sc_ah);
 179         ath9k_btcoex_timer_pause(sc);
 180
 181         if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
 182                 return;
 183
 184         btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0);
 185         if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
 186                 btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
 187
 188         btcoex->btcoex_period *= 1000;
 189         btcoex->btcoex_no_stomp =  btcoex->btcoex_period *
 190                 (100 - btcoex->duty_cycle) / 100;
 191
 192         ath9k_hw_btcoex_enable(sc->sc_ah);
 193         ath9k_btcoex_timer_resume(sc);
 194 }
 195
 196 static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
 197 {
 198         struct ath_hw *ah = sc->sc_ah;
 199         struct ath_common *common = ath9k_hw_common(ah);
 200         u32 payload[4] = {0, 0, 0, 0};
 201
 202         switch (opcode) {
 203         case MCI_GPM_BT_CAL_REQ:
 204                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
 205                         ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
 206                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 207                 } else {
 208                         ath_dbg(common, MCI, "MCI State mismatch: %d\n",
 209                                 ar9003_mci_state(ah, MCI_STATE_BT, NULL));
 210                 }
 211                 break;
 212         case MCI_GPM_BT_CAL_DONE:
 213                 ar9003_mci_state(ah, MCI_STATE_BT, NULL);
 214                 break;
 215         case MCI_GPM_BT_CAL_GRANT:
 216                 MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
 217                 ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
 218                                         16, false, true);
 219                 break;
 220         default:
 221                 ath_dbg(common, MCI, "Unknown GPM CAL message\n");
 222                 break;
 223         }
 224 }
 225
 226 static void ath_mci_process_profile(struct ath_softc *sc,
 227                                     struct ath_mci_profile_info *info)
 228 {
 229         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 230         struct ath_btcoex *btcoex = &sc->btcoex;
 231         struct ath_mci_profile *mci = &btcoex->mci;
 232
 233         if (info->start) {
 234                 if (!ath_mci_add_profile(common, mci, info))
 235                         return;
 236         } else
 237                 ath_mci_del_profile(common, mci, info);
 238
 239         btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
 240         mci->aggr_limit = mci->num_sco ? 6 : 0;
 241
 242         if (NUM_PROF(mci)) {
 243                 btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
 244                 btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
 245         } else {
 246                 btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
 247                                                         ATH_BTCOEX_STOMP_LOW;
 248                 btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
 249         }
 250
 251         ath_mci_update_scheme(sc);
 252 }
 253
 254 static void ath_mci_process_status(struct ath_softc *sc,
 255                                    struct ath_mci_profile_status *status)
 256 {
 257         struct ath_btcoex *btcoex = &sc->btcoex;
 258         struct ath_mci_profile *mci = &btcoex->mci;
 259         struct ath_mci_profile_info info;
 260         int i = 0, old_num_mgmt = mci->num_mgmt;
 261
 262         /* Link status type are not handled */
 263         if (status->is_link)
 264                 return;
 265
 266         memset(&info, 0, sizeof(struct ath_mci_profile_info));
 267
 268         info.conn_handle = status->conn_handle;
 269         if (ath_mci_find_profile(mci, &info))
 270                 return;
 271
 272         if (status->conn_handle >= ATH_MCI_MAX_PROFILE)
 273                 return;
 274
 275         if (status->is_critical)
 276                 __set_bit(status->conn_handle, mci->status);
 277         else
 278                 __clear_bit(status->conn_handle, mci->status);
 279
 280         mci->num_mgmt = 0;
 281         do {
 282                 if (test_bit(i, mci->status))
 283                         mci->num_mgmt++;
 284         } while (++i < ATH_MCI_MAX_PROFILE);
 285
 286         if (old_num_mgmt != mci->num_mgmt)
 287                 ath_mci_update_scheme(sc);
 288 }
 289
 290 static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
 291 {
 292         struct ath_hw *ah = sc->sc_ah;
 293         struct ath_mci_profile_info profile_info;
 294         struct ath_mci_profile_status profile_status;
 295         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 296         u32 version;
 297         u8 major;
 298         u8 minor;
 299         u32 seq_num;
 300
 301         switch (opcode) {
 302         case MCI_GPM_COEX_VERSION_QUERY:
 303                 version = ar9003_mci_state(ah, MCI_STATE_SEND_WLAN_COEX_VERSION,
 304                                            NULL);
 305                 break;
 306         case MCI_GPM_COEX_VERSION_RESPONSE:
 307                 major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
 308                 minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
 309                 version = (major << 8) + minor;
 310                 version = ar9003_mci_state(ah, MCI_STATE_SET_BT_COEX_VERSION,
 311                                            &version);
 312                 break;
 313         case MCI_GPM_COEX_STATUS_QUERY:
 314                 ar9003_mci_state(ah, MCI_STATE_SEND_WLAN_CHANNELS, NULL);
 315                 break;
 316         case MCI_GPM_COEX_BT_PROFILE_INFO:
 317                 memcpy(&profile_info,
 318                        (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
 319
 320                 if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN) ||
 321                     (profile_info.type >= MCI_GPM_COEX_PROFILE_MAX)) {
 322                         ath_dbg(common, MCI,
 323                                 "Illegal profile type = %d, state = %d\n",
 324                                 profile_info.type,
 325                                 profile_info.start);
 326                         break;
 327                 }
 328
 329                 ath_mci_process_profile(sc, &profile_info);
 330                 break;
 331         case MCI_GPM_COEX_BT_STATUS_UPDATE:
 332                 profile_status.is_link = *(rx_payload +
 333                                            MCI_GPM_COEX_B_STATUS_TYPE);
 334                 profile_status.conn_handle = *(rx_payload +
 335                                                MCI_GPM_COEX_B_STATUS_LINKID);
 336                 profile_status.is_critical = *(rx_payload +
 337                                                MCI_GPM_COEX_B_STATUS_STATE);
 338
 339                 seq_num = *((u32 *)(rx_payload + 12));
 340                 ath_dbg(common, MCI,
 341                         "BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
 342                         profile_status.is_link, profile_status.conn_handle,
 343                         profile_status.is_critical, seq_num);
 344
 345                 ath_mci_process_status(sc, &profile_status);
 346                 break;
 347         default:
 348                 ath_dbg(common, MCI, "Unknown GPM COEX message = 0x%02x\n", opcode);
 349                 break;
 350         }
 351 }
 352
 353 int ath_mci_setup(struct ath_softc *sc)
 354 {
 355         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 356         struct ath_mci_coex *mci = &sc->mci_coex;
 357         struct ath_mci_buf *buf = &mci->sched_buf;
 358
 359         buf->bf_addr = dma_alloc_coherent(sc->dev,
 360                                   ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
 361                                   &buf->bf_paddr, GFP_KERNEL);
 362
 363         if (buf->bf_addr == NULL) {
 364                 ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
 365                 return -ENOMEM;
 366         }
 367
 368         memset(buf->bf_addr, MCI_GPM_RSVD_PATTERN,
 369                ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE);
 370
 371         mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;
 372
 373         mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
 374         mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr + mci->sched_buf.bf_len;
 375         mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;
 376
 377         ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
 378                          mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
 379                          mci->sched_buf.bf_paddr);
 380
 381         ath_dbg(common, MCI, "MCI Initialized\n");
 382
 383         return 0;
 384 }
 385
 386 void ath_mci_cleanup(struct ath_softc *sc)
 387 {
 388         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 389         struct ath_hw *ah = sc->sc_ah;
 390         struct ath_mci_coex *mci = &sc->mci_coex;
 391         struct ath_mci_buf *buf = &mci->sched_buf;
 392
 393         if (buf->bf_addr)
 394                 dma_free_coherent(sc->dev,
 395                                   ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
 396                                   buf->bf_addr, buf->bf_paddr);
 397
 398         ar9003_mci_cleanup(ah);
 399
 400         ath_dbg(common, MCI, "MCI De-Initialized\n");
 401 }
 402
 403 void ath_mci_intr(struct ath_softc *sc)
 404 {
 405         struct ath_mci_coex *mci = &sc->mci_coex;
 406         struct ath_hw *ah = sc->sc_ah;
 407         struct ath_common *common = ath9k_hw_common(ah);
 408         u32 mci_int, mci_int_rxmsg;
 409         u32 offset, subtype, opcode;
 410         u32 *pgpm;
 411         u32 more_data = MCI_GPM_MORE;
 412         bool skip_gpm = false;
 413
 414         ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
 415
 416         if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
 417                 ar9003_mci_state(ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
 418                 return;
 419         }
 420
 421         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
 422                 u32 payload[4] = { 0xffffffff, 0xffffffff,
 423                                    0xffffffff, 0xffffff00};
 424
 425                 /*
 426                  * The following REMOTE_RESET and SYS_WAKING used to sent
 427                  * only when BT wake up. Now they are always sent, as a
 428                  * recovery method to reset BT MCI's RX alignment.
 429                  */
 430                 ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
 431                                         payload, 16, true, false);
 432                 ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
 433                                         NULL, 0, true, false);
 434
 435                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
 436                 ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);
 437
 438                 /*
 439                  * always do this for recovery and 2G/5G toggling and LNA_TRANS
 440                  */
 441                 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
 442         }
 443
 444         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
 445                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;
 446
 447                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {
 448                         if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) !=
 449                             MCI_BT_SLEEP)
 450                                 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE,
 451                                                  NULL);
 452                 }
 453         }
 454
 455         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
 456                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;
 457
 458                 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
 459                         if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL) !=
 460                             MCI_BT_AWAKE)
 461                                 ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
 462                                                  NULL);
 463                 }
 464         }
 465
 466         if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
 467             (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
 468                 ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
 469                 skip_gpm = true;
 470         }
 471
 472         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {
 473                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
 474                 offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
 475                                           NULL);
 476         }
 477
 478         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {
 479                 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
 480
 481                 while (more_data == MCI_GPM_MORE) {
 482
 483                         pgpm = mci->gpm_buf.bf_addr;
 484                         offset = ar9003_mci_state(ah, MCI_STATE_NEXT_GPM_OFFSET,
 485                                                   &more_data);
 486
 487                         if (offset == MCI_GPM_INVALID)
 488                                 break;
 489
 490                         pgpm += (offset >> 2);
 491
 492                         /*
 493                          * The first dword is timer.
 494                          * The real data starts from 2nd dword.
 495                          */
 496                         subtype = MCI_GPM_TYPE(pgpm);
 497                         opcode = MCI_GPM_OPCODE(pgpm);
 498
 499                         if (skip_gpm)
 500                                 goto recycle;
 501
 502                         if (MCI_GPM_IS_CAL_TYPE(subtype)) {
 503                                 ath_mci_cal_msg(sc, subtype, (u8 *)pgpm);
 504                         } else {
 505                                 switch (subtype) {
 506                                 case MCI_GPM_COEX_AGENT:
 507                                         ath_mci_msg(sc, opcode, (u8 *)pgpm);
 508                                         break;
 509                                 default:
 510                                         break;
 511                                 }
 512                         }
 513                 recycle:
 514                         MCI_GPM_RECYCLE(pgpm);
 515                 }
 516         }
 517
 518         if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {
 519                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
 520                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;
 521
 522                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO)
 523                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
 524
 525                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
 526                         int value_dbm = ar9003_mci_state(ah,
 527                                                  MCI_STATE_CONT_RSSI_POWER, NULL);
 528
 529                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
 530
 531                         if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
 532                                 ath_dbg(common, MCI,
 533                                         "MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
 534                                         ar9003_mci_state(ah,
 535                                                  MCI_STATE_CONT_PRIORITY, NULL),
 536                                         value_dbm);
 537                         else
 538                                 ath_dbg(common, MCI,
 539                                         "MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
 540                                         ar9003_mci_state(ah,
 541                                                  MCI_STATE_CONT_PRIORITY, NULL),
 542                                         value_dbm);
 543                 }
 544
 545                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK)
 546                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
 547
 548                 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST)
 549                         mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
 550         }
 551
 552         if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
 553             (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
 554                 mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR |
 555                              AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
 556 }
 557
 558 void ath_mci_enable(struct ath_softc *sc)
 559 {
 560         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 561
 562         if (!common->btcoex_enabled)
 563                 return;
 564
 565         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
 566                 sc->sc_ah->imask |= ATH9K_INT_MCI;
 567 }