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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless
[~andy/linux] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24         /*
25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26          *   0 for no restriction
27          *   1 for 1/4 us
28          *   2 for 1/2 us
29          *   3 for 1 us
30          *   4 for 2 us
31          *   5 for 4 us
32          *   6 for 8 us
33          *   7 for 16 us
34          */
35         switch (mpdudensity) {
36         case 0:
37                 return 0;
38         case 1:
39         case 2:
40         case 3:
41                 /* Our lower layer calculations limit our precision to
42                    1 microsecond */
43                 return 1;
44         case 4:
45                 return 2;
46         case 5:
47                 return 4;
48         case 6:
49                 return 8;
50         case 7:
51                 return 16;
52         default:
53                 return 0;
54         }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59         bool pending = false;
60
61         spin_lock_bh(&txq->axq_lock);
62
63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
64                 pending = true;
65
66         spin_unlock_bh(&txq->axq_lock);
67         return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72         unsigned long flags;
73         bool ret;
74
75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79         return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85         unsigned long flags;
86         enum ath9k_power_mode power_mode;
87
88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
89         if (++sc->ps_usecount != 1)
90                 goto unlock;
91
92         power_mode = sc->sc_ah->power_mode;
93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95         /*
96          * While the hardware is asleep, the cycle counters contain no
97          * useful data. Better clear them now so that they don't mess up
98          * survey data results.
99          */
100         if (power_mode != ATH9K_PM_AWAKE) {
101                 spin_lock(&common->cc_lock);
102                 ath_hw_cycle_counters_update(common);
103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104                 spin_unlock(&common->cc_lock);
105         }
106
107  unlock:
108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114         enum ath9k_power_mode mode;
115         unsigned long flags;
116
117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
118         if (--sc->ps_usecount != 0)
119                 goto unlock;
120
121         if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122                 mode = ATH9K_PM_FULL_SLEEP;
123         else if (sc->ps_enabled &&
124                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
125                               PS_WAIT_FOR_CAB |
126                               PS_WAIT_FOR_PSPOLL_DATA |
127                               PS_WAIT_FOR_TX_ACK)))
128                 mode = ATH9K_PM_NETWORK_SLEEP;
129         else
130                 goto unlock;
131
132         spin_lock(&common->cc_lock);
133         ath_hw_cycle_counters_update(common);
134         spin_unlock(&common->cc_lock);
135
136         ath9k_hw_setpower(sc->sc_ah, mode);
137
138  unlock:
139         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
140 }
141
142 void ath_start_ani(struct ath_common *common)
143 {
144         struct ath_hw *ah = common->ah;
145         unsigned long timestamp = jiffies_to_msecs(jiffies);
146         struct ath_softc *sc = (struct ath_softc *) common->priv;
147
148         if (!(sc->sc_flags & SC_OP_ANI_RUN))
149                 return;
150
151         if (sc->sc_flags & SC_OP_OFFCHANNEL)
152                 return;
153
154         common->ani.longcal_timer = timestamp;
155         common->ani.shortcal_timer = timestamp;
156         common->ani.checkani_timer = timestamp;
157
158         mod_timer(&common->ani.timer,
159                   jiffies +
160                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
161 }
162
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
164 {
165         struct ath_hw *ah = sc->sc_ah;
166         struct ath9k_channel *chan = &ah->channels[channel];
167         struct survey_info *survey = &sc->survey[channel];
168
169         if (chan->noisefloor) {
170                 survey->filled |= SURVEY_INFO_NOISE_DBM;
171                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
172         }
173 }
174
175 /*
176  * Updates the survey statistics and returns the busy time since last
177  * update in %, if the measurement duration was long enough for the
178  * result to be useful, -1 otherwise.
179  */
180 static int ath_update_survey_stats(struct ath_softc *sc)
181 {
182         struct ath_hw *ah = sc->sc_ah;
183         struct ath_common *common = ath9k_hw_common(ah);
184         int pos = ah->curchan - &ah->channels[0];
185         struct survey_info *survey = &sc->survey[pos];
186         struct ath_cycle_counters *cc = &common->cc_survey;
187         unsigned int div = common->clockrate * 1000;
188         int ret = 0;
189
190         if (!ah->curchan)
191                 return -1;
192
193         if (ah->power_mode == ATH9K_PM_AWAKE)
194                 ath_hw_cycle_counters_update(common);
195
196         if (cc->cycles > 0) {
197                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198                         SURVEY_INFO_CHANNEL_TIME_BUSY |
199                         SURVEY_INFO_CHANNEL_TIME_RX |
200                         SURVEY_INFO_CHANNEL_TIME_TX;
201                 survey->channel_time += cc->cycles / div;
202                 survey->channel_time_busy += cc->rx_busy / div;
203                 survey->channel_time_rx += cc->rx_frame / div;
204                 survey->channel_time_tx += cc->tx_frame / div;
205         }
206
207         if (cc->cycles < div)
208                 return -1;
209
210         if (cc->cycles > 0)
211                 ret = cc->rx_busy * 100 / cc->cycles;
212
213         memset(cc, 0, sizeof(*cc));
214
215         ath_update_survey_nf(sc, pos);
216
217         return ret;
218 }
219
220 static void __ath_cancel_work(struct ath_softc *sc)
221 {
222         cancel_work_sync(&sc->paprd_work);
223         cancel_work_sync(&sc->hw_check_work);
224         cancel_delayed_work_sync(&sc->tx_complete_work);
225         cancel_delayed_work_sync(&sc->hw_pll_work);
226 }
227
228 static void ath_cancel_work(struct ath_softc *sc)
229 {
230         __ath_cancel_work(sc);
231         cancel_work_sync(&sc->hw_reset_work);
232 }
233
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
235 {
236         struct ath_hw *ah = sc->sc_ah;
237         struct ath_common *common = ath9k_hw_common(ah);
238         bool ret;
239
240         ieee80211_stop_queues(sc->hw);
241
242         sc->hw_busy_count = 0;
243         del_timer_sync(&common->ani.timer);
244
245         ath9k_debug_samp_bb_mac(sc);
246         ath9k_hw_disable_interrupts(ah);
247
248         ret = ath_drain_all_txq(sc, retry_tx);
249
250         if (!ath_stoprecv(sc))
251                 ret = false;
252
253         if (!flush) {
254                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255                         ath_rx_tasklet(sc, 1, true);
256                 ath_rx_tasklet(sc, 1, false);
257         } else {
258                 ath_flushrecv(sc);
259         }
260
261         return ret;
262 }
263
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
265 {
266         struct ath_hw *ah = sc->sc_ah;
267         struct ath_common *common = ath9k_hw_common(ah);
268
269         if (ath_startrecv(sc) != 0) {
270                 ath_err(common, "Unable to restart recv logic\n");
271                 return false;
272         }
273
274         ath9k_cmn_update_txpow(ah, sc->curtxpow,
275                                sc->config.txpowlimit, &sc->curtxpow);
276         ath9k_hw_set_interrupts(ah);
277         ath9k_hw_enable_interrupts(ah);
278
279         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280                 if (sc->sc_flags & SC_OP_BEACONS)
281                         ath_set_beacon(sc);
282
283                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285                 if (!common->disable_ani)
286                         ath_start_ani(common);
287         }
288
289         if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
290                 struct ath_hw_antcomb_conf div_ant_conf;
291                 u8 lna_conf;
292
293                 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
294
295                 if (sc->ant_rx == 1)
296                         lna_conf = ATH_ANT_DIV_COMB_LNA1;
297                 else
298                         lna_conf = ATH_ANT_DIV_COMB_LNA2;
299                 div_ant_conf.main_lna_conf = lna_conf;
300                 div_ant_conf.alt_lna_conf = lna_conf;
301
302                 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
303         }
304
305         ieee80211_wake_queues(sc->hw);
306
307         return true;
308 }
309
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
311                               bool retry_tx)
312 {
313         struct ath_hw *ah = sc->sc_ah;
314         struct ath_common *common = ath9k_hw_common(ah);
315         struct ath9k_hw_cal_data *caldata = NULL;
316         bool fastcc = true;
317         bool flush = false;
318         int r;
319
320         __ath_cancel_work(sc);
321
322         spin_lock_bh(&sc->sc_pcu_lock);
323
324         if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
325                 fastcc = false;
326                 caldata = &sc->caldata;
327         }
328
329         if (!hchan) {
330                 fastcc = false;
331                 flush = true;
332                 hchan = ah->curchan;
333         }
334
335         if (fastcc && (ah->chip_fullsleep ||
336             !ath9k_hw_check_alive(ah)))
337                 fastcc = false;
338
339         if (!ath_prepare_reset(sc, retry_tx, flush))
340                 fastcc = false;
341
342         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
343                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
344
345         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
346         if (r) {
347                 ath_err(common,
348                         "Unable to reset channel, reset status %d\n", r);
349                 goto out;
350         }
351
352         if (!ath_complete_reset(sc, true))
353                 r = -EIO;
354
355 out:
356         spin_unlock_bh(&sc->sc_pcu_lock);
357         return r;
358 }
359
360
361 /*
362  * Set/change channels.  If the channel is really being changed, it's done
363  * by reseting the chip.  To accomplish this we must first cleanup any pending
364  * DMA, then restart stuff.
365 */
366 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
367                     struct ath9k_channel *hchan)
368 {
369         int r;
370
371         if (sc->sc_flags & SC_OP_INVALID)
372                 return -EIO;
373
374         ath9k_ps_wakeup(sc);
375
376         r = ath_reset_internal(sc, hchan, false);
377
378         ath9k_ps_restore(sc);
379
380         return r;
381 }
382
383 static void ath_paprd_activate(struct ath_softc *sc)
384 {
385         struct ath_hw *ah = sc->sc_ah;
386         struct ath9k_hw_cal_data *caldata = ah->caldata;
387         int chain;
388
389         if (!caldata || !caldata->paprd_done)
390                 return;
391
392         ath9k_ps_wakeup(sc);
393         ar9003_paprd_enable(ah, false);
394         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
395                 if (!(ah->txchainmask & BIT(chain)))
396                         continue;
397
398                 ar9003_paprd_populate_single_table(ah, caldata, chain);
399         }
400
401         ar9003_paprd_enable(ah, true);
402         ath9k_ps_restore(sc);
403 }
404
405 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
406 {
407         struct ieee80211_hw *hw = sc->hw;
408         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
409         struct ath_hw *ah = sc->sc_ah;
410         struct ath_common *common = ath9k_hw_common(ah);
411         struct ath_tx_control txctl;
412         int time_left;
413
414         memset(&txctl, 0, sizeof(txctl));
415         txctl.txq = sc->tx.txq_map[WME_AC_BE];
416
417         memset(tx_info, 0, sizeof(*tx_info));
418         tx_info->band = hw->conf.channel->band;
419         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
420         tx_info->control.rates[0].idx = 0;
421         tx_info->control.rates[0].count = 1;
422         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
423         tx_info->control.rates[1].idx = -1;
424
425         init_completion(&sc->paprd_complete);
426         txctl.paprd = BIT(chain);
427
428         if (ath_tx_start(hw, skb, &txctl) != 0) {
429                 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
430                 dev_kfree_skb_any(skb);
431                 return false;
432         }
433
434         time_left = wait_for_completion_timeout(&sc->paprd_complete,
435                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
436
437         if (!time_left)
438                 ath_dbg(common, CALIBRATE,
439                         "Timeout waiting for paprd training on TX chain %d\n",
440                         chain);
441
442         return !!time_left;
443 }
444
445 void ath_paprd_calibrate(struct work_struct *work)
446 {
447         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
448         struct ieee80211_hw *hw = sc->hw;
449         struct ath_hw *ah = sc->sc_ah;
450         struct ieee80211_hdr *hdr;
451         struct sk_buff *skb = NULL;
452         struct ath9k_hw_cal_data *caldata = ah->caldata;
453         struct ath_common *common = ath9k_hw_common(ah);
454         int ftype;
455         int chain_ok = 0;
456         int chain;
457         int len = 1800;
458
459         if (!caldata)
460                 return;
461
462         ath9k_ps_wakeup(sc);
463
464         if (ar9003_paprd_init_table(ah) < 0)
465                 goto fail_paprd;
466
467         skb = alloc_skb(len, GFP_KERNEL);
468         if (!skb)
469                 goto fail_paprd;
470
471         skb_put(skb, len);
472         memset(skb->data, 0, len);
473         hdr = (struct ieee80211_hdr *)skb->data;
474         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
475         hdr->frame_control = cpu_to_le16(ftype);
476         hdr->duration_id = cpu_to_le16(10);
477         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
478         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
479         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
480
481         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
482                 if (!(ah->txchainmask & BIT(chain)))
483                         continue;
484
485                 chain_ok = 0;
486
487                 ath_dbg(common, CALIBRATE,
488                         "Sending PAPRD frame for thermal measurement on chain %d\n",
489                         chain);
490                 if (!ath_paprd_send_frame(sc, skb, chain))
491                         goto fail_paprd;
492
493                 ar9003_paprd_setup_gain_table(ah, chain);
494
495                 ath_dbg(common, CALIBRATE,
496                         "Sending PAPRD training frame on chain %d\n", chain);
497                 if (!ath_paprd_send_frame(sc, skb, chain))
498                         goto fail_paprd;
499
500                 if (!ar9003_paprd_is_done(ah)) {
501                         ath_dbg(common, CALIBRATE,
502                                 "PAPRD not yet done on chain %d\n", chain);
503                         break;
504                 }
505
506                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
507                         ath_dbg(common, CALIBRATE,
508                                 "PAPRD create curve failed on chain %d\n",
509                                                                    chain);
510                         break;
511                 }
512
513                 chain_ok = 1;
514         }
515         kfree_skb(skb);
516
517         if (chain_ok) {
518                 caldata->paprd_done = true;
519                 ath_paprd_activate(sc);
520         }
521
522 fail_paprd:
523         ath9k_ps_restore(sc);
524 }
525
526 /*
527  *  This routine performs the periodic noise floor calibration function
528  *  that is used to adjust and optimize the chip performance.  This
529  *  takes environmental changes (location, temperature) into account.
530  *  When the task is complete, it reschedules itself depending on the
531  *  appropriate interval that was calculated.
532  */
533 void ath_ani_calibrate(unsigned long data)
534 {
535         struct ath_softc *sc = (struct ath_softc *)data;
536         struct ath_hw *ah = sc->sc_ah;
537         struct ath_common *common = ath9k_hw_common(ah);
538         bool longcal = false;
539         bool shortcal = false;
540         bool aniflag = false;
541         unsigned int timestamp = jiffies_to_msecs(jiffies);
542         u32 cal_interval, short_cal_interval, long_cal_interval;
543         unsigned long flags;
544
545         if (ah->caldata && ah->caldata->nfcal_interference)
546                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
547         else
548                 long_cal_interval = ATH_LONG_CALINTERVAL;
549
550         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
551                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
552
553         /* Only calibrate if awake */
554         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
555                 goto set_timer;
556
557         ath9k_ps_wakeup(sc);
558
559         /* Long calibration runs independently of short calibration. */
560         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
561                 longcal = true;
562                 common->ani.longcal_timer = timestamp;
563         }
564
565         /* Short calibration applies only while caldone is false */
566         if (!common->ani.caldone) {
567                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
568                         shortcal = true;
569                         common->ani.shortcal_timer = timestamp;
570                         common->ani.resetcal_timer = timestamp;
571                 }
572         } else {
573                 if ((timestamp - common->ani.resetcal_timer) >=
574                     ATH_RESTART_CALINTERVAL) {
575                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
576                         if (common->ani.caldone)
577                                 common->ani.resetcal_timer = timestamp;
578                 }
579         }
580
581         /* Verify whether we must check ANI */
582         if (sc->sc_ah->config.enable_ani
583             && (timestamp - common->ani.checkani_timer) >=
584             ah->config.ani_poll_interval) {
585                 aniflag = true;
586                 common->ani.checkani_timer = timestamp;
587         }
588
589         /* Call ANI routine if necessary */
590         if (aniflag) {
591                 spin_lock_irqsave(&common->cc_lock, flags);
592                 ath9k_hw_ani_monitor(ah, ah->curchan);
593                 ath_update_survey_stats(sc);
594                 spin_unlock_irqrestore(&common->cc_lock, flags);
595         }
596
597         /* Perform calibration if necessary */
598         if (longcal || shortcal) {
599                 common->ani.caldone =
600                         ath9k_hw_calibrate(ah, ah->curchan,
601                                                 ah->rxchainmask, longcal);
602         }
603
604         ath_dbg(common, ANI,
605                 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
606                 jiffies,
607                 longcal ? "long" : "", shortcal ? "short" : "",
608                 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
609
610         ath9k_ps_restore(sc);
611
612 set_timer:
613         /*
614         * Set timer interval based on previous results.
615         * The interval must be the shortest necessary to satisfy ANI,
616         * short calibration and long calibration.
617         */
618         ath9k_debug_samp_bb_mac(sc);
619         cal_interval = ATH_LONG_CALINTERVAL;
620         if (sc->sc_ah->config.enable_ani)
621                 cal_interval = min(cal_interval,
622                                    (u32)ah->config.ani_poll_interval);
623         if (!common->ani.caldone)
624                 cal_interval = min(cal_interval, (u32)short_cal_interval);
625
626         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
627         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
628                 if (!ah->caldata->paprd_done)
629                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
630                 else if (!ah->paprd_table_write_done)
631                         ath_paprd_activate(sc);
632         }
633 }
634
635 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
636                             struct ieee80211_vif *vif)
637 {
638         struct ath_node *an;
639         an = (struct ath_node *)sta->drv_priv;
640
641 #ifdef CONFIG_ATH9K_DEBUGFS
642         spin_lock(&sc->nodes_lock);
643         list_add(&an->list, &sc->nodes);
644         spin_unlock(&sc->nodes_lock);
645 #endif
646         an->sta = sta;
647         an->vif = vif;
648         if (sc->sc_flags & SC_OP_TXAGGR) {
649                 ath_tx_node_init(sc, an);
650                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
651                                      sta->ht_cap.ampdu_factor);
652                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
653         }
654 }
655
656 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
657 {
658         struct ath_node *an = (struct ath_node *)sta->drv_priv;
659
660 #ifdef CONFIG_ATH9K_DEBUGFS
661         spin_lock(&sc->nodes_lock);
662         list_del(&an->list);
663         spin_unlock(&sc->nodes_lock);
664         an->sta = NULL;
665 #endif
666
667         if (sc->sc_flags & SC_OP_TXAGGR)
668                 ath_tx_node_cleanup(sc, an);
669 }
670
671
672 void ath9k_tasklet(unsigned long data)
673 {
674         struct ath_softc *sc = (struct ath_softc *)data;
675         struct ath_hw *ah = sc->sc_ah;
676         struct ath_common *common = ath9k_hw_common(ah);
677
678         u32 status = sc->intrstatus;
679         u32 rxmask;
680
681         ath9k_ps_wakeup(sc);
682         spin_lock(&sc->sc_pcu_lock);
683
684         if ((status & ATH9K_INT_FATAL) ||
685             (status & ATH9K_INT_BB_WATCHDOG)) {
686 #ifdef CONFIG_ATH9K_DEBUGFS
687                 enum ath_reset_type type;
688
689                 if (status & ATH9K_INT_FATAL)
690                         type = RESET_TYPE_FATAL_INT;
691                 else
692                         type = RESET_TYPE_BB_WATCHDOG;
693
694                 RESET_STAT_INC(sc, type);
695 #endif
696                 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
697                 goto out;
698         }
699
700         /*
701          * Only run the baseband hang check if beacons stop working in AP or
702          * IBSS mode, because it has a high false positive rate. For station
703          * mode it should not be necessary, since the upper layers will detect
704          * this through a beacon miss automatically and the following channel
705          * change will trigger a hardware reset anyway
706          */
707         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
708             !ath9k_hw_check_alive(ah))
709                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
710
711         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
712                 /*
713                  * TSF sync does not look correct; remain awake to sync with
714                  * the next Beacon.
715                  */
716                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
717                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
718         }
719
720         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
721                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
722                           ATH9K_INT_RXORN);
723         else
724                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
725
726         if (status & rxmask) {
727                 /* Check for high priority Rx first */
728                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
729                     (status & ATH9K_INT_RXHP))
730                         ath_rx_tasklet(sc, 0, true);
731
732                 ath_rx_tasklet(sc, 0, false);
733         }
734
735         if (status & ATH9K_INT_TX) {
736                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
737                         ath_tx_edma_tasklet(sc);
738                 else
739                         ath_tx_tasklet(sc);
740         }
741
742         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
743                 if (status & ATH9K_INT_GENTIMER)
744                         ath_gen_timer_isr(sc->sc_ah);
745
746         if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
747                 ath_mci_intr(sc);
748
749 out:
750         /* re-enable hardware interrupt */
751         ath9k_hw_enable_interrupts(ah);
752
753         spin_unlock(&sc->sc_pcu_lock);
754         ath9k_ps_restore(sc);
755 }
756
757 irqreturn_t ath_isr(int irq, void *dev)
758 {
759 #define SCHED_INTR (                            \
760                 ATH9K_INT_FATAL |               \
761                 ATH9K_INT_BB_WATCHDOG |         \
762                 ATH9K_INT_RXORN |               \
763                 ATH9K_INT_RXEOL |               \
764                 ATH9K_INT_RX |                  \
765                 ATH9K_INT_RXLP |                \
766                 ATH9K_INT_RXHP |                \
767                 ATH9K_INT_TX |                  \
768                 ATH9K_INT_BMISS |               \
769                 ATH9K_INT_CST |                 \
770                 ATH9K_INT_TSFOOR |              \
771                 ATH9K_INT_GENTIMER |            \
772                 ATH9K_INT_MCI)
773
774         struct ath_softc *sc = dev;
775         struct ath_hw *ah = sc->sc_ah;
776         struct ath_common *common = ath9k_hw_common(ah);
777         enum ath9k_int status;
778         bool sched = false;
779
780         /*
781          * The hardware is not ready/present, don't
782          * touch anything. Note this can happen early
783          * on if the IRQ is shared.
784          */
785         if (sc->sc_flags & SC_OP_INVALID)
786                 return IRQ_NONE;
787
788
789         /* shared irq, not for us */
790
791         if (!ath9k_hw_intrpend(ah))
792                 return IRQ_NONE;
793
794         /*
795          * Figure out the reason(s) for the interrupt.  Note
796          * that the hal returns a pseudo-ISR that may include
797          * bits we haven't explicitly enabled so we mask the
798          * value to insure we only process bits we requested.
799          */
800         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
801         status &= ah->imask;    /* discard unasked-for bits */
802
803         /*
804          * If there are no status bits set, then this interrupt was not
805          * for me (should have been caught above).
806          */
807         if (!status)
808                 return IRQ_NONE;
809
810         /* Cache the status */
811         sc->intrstatus = status;
812
813         if (status & SCHED_INTR)
814                 sched = true;
815
816         /*
817          * If a FATAL or RXORN interrupt is received, we have to reset the
818          * chip immediately.
819          */
820         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
821             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
822                 goto chip_reset;
823
824         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
825             (status & ATH9K_INT_BB_WATCHDOG)) {
826
827                 spin_lock(&common->cc_lock);
828                 ath_hw_cycle_counters_update(common);
829                 ar9003_hw_bb_watchdog_dbg_info(ah);
830                 spin_unlock(&common->cc_lock);
831
832                 goto chip_reset;
833         }
834
835         if (status & ATH9K_INT_SWBA)
836                 tasklet_schedule(&sc->bcon_tasklet);
837
838         if (status & ATH9K_INT_TXURN)
839                 ath9k_hw_updatetxtriglevel(ah, true);
840
841         if (status & ATH9K_INT_RXEOL) {
842                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
843                 ath9k_hw_set_interrupts(ah);
844         }
845
846         if (status & ATH9K_INT_MIB) {
847                 /*
848                  * Disable interrupts until we service the MIB
849                  * interrupt; otherwise it will continue to
850                  * fire.
851                  */
852                 ath9k_hw_disable_interrupts(ah);
853                 /*
854                  * Let the hal handle the event. We assume
855                  * it will clear whatever condition caused
856                  * the interrupt.
857                  */
858                 spin_lock(&common->cc_lock);
859                 ath9k_hw_proc_mib_event(ah);
860                 spin_unlock(&common->cc_lock);
861                 ath9k_hw_enable_interrupts(ah);
862         }
863
864         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
865                 if (status & ATH9K_INT_TIM_TIMER) {
866                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
867                                 goto chip_reset;
868                         /* Clear RxAbort bit so that we can
869                          * receive frames */
870                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
871                         ath9k_hw_setrxabort(sc->sc_ah, 0);
872                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
873                 }
874
875 chip_reset:
876
877         ath_debug_stat_interrupt(sc, status);
878
879         if (sched) {
880                 /* turn off every interrupt */
881                 ath9k_hw_disable_interrupts(ah);
882                 tasklet_schedule(&sc->intr_tq);
883         }
884
885         return IRQ_HANDLED;
886
887 #undef SCHED_INTR
888 }
889
890 static int ath_reset(struct ath_softc *sc, bool retry_tx)
891 {
892         int r;
893
894         ath9k_ps_wakeup(sc);
895
896         r = ath_reset_internal(sc, NULL, retry_tx);
897
898         if (retry_tx) {
899                 int i;
900                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
901                         if (ATH_TXQ_SETUP(sc, i)) {
902                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
903                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
904                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
905                         }
906                 }
907         }
908
909         ath9k_ps_restore(sc);
910
911         return r;
912 }
913
914 void ath_reset_work(struct work_struct *work)
915 {
916         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
917
918         ath_reset(sc, true);
919 }
920
921 void ath_hw_check(struct work_struct *work)
922 {
923         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
924         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
925         unsigned long flags;
926         int busy;
927
928         ath9k_ps_wakeup(sc);
929         if (ath9k_hw_check_alive(sc->sc_ah))
930                 goto out;
931
932         spin_lock_irqsave(&common->cc_lock, flags);
933         busy = ath_update_survey_stats(sc);
934         spin_unlock_irqrestore(&common->cc_lock, flags);
935
936         ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
937                 busy, sc->hw_busy_count + 1);
938         if (busy >= 99) {
939                 if (++sc->hw_busy_count >= 3) {
940                         RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
941                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
942                 }
943
944         } else if (busy >= 0)
945                 sc->hw_busy_count = 0;
946
947 out:
948         ath9k_ps_restore(sc);
949 }
950
951 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
952 {
953         static int count;
954         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
955
956         if (pll_sqsum >= 0x40000) {
957                 count++;
958                 if (count == 3) {
959                         /* Rx is hung for more than 500ms. Reset it */
960                         ath_dbg(common, RESET, "Possible RX hang, resetting\n");
961                         RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
962                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
963                         count = 0;
964                 }
965         } else
966                 count = 0;
967 }
968
969 void ath_hw_pll_work(struct work_struct *work)
970 {
971         struct ath_softc *sc = container_of(work, struct ath_softc,
972                                             hw_pll_work.work);
973         u32 pll_sqsum;
974
975         if (AR_SREV_9485(sc->sc_ah)) {
976
977                 ath9k_ps_wakeup(sc);
978                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
979                 ath9k_ps_restore(sc);
980
981                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
982
983                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
984         }
985 }
986
987 /**********************/
988 /* mac80211 callbacks */
989 /**********************/
990
991 static int ath9k_start(struct ieee80211_hw *hw)
992 {
993         struct ath_softc *sc = hw->priv;
994         struct ath_hw *ah = sc->sc_ah;
995         struct ath_common *common = ath9k_hw_common(ah);
996         struct ieee80211_channel *curchan = hw->conf.channel;
997         struct ath9k_channel *init_channel;
998         int r;
999
1000         ath_dbg(common, CONFIG,
1001                 "Starting driver with initial channel: %d MHz\n",
1002                 curchan->center_freq);
1003
1004         ath9k_ps_wakeup(sc);
1005
1006         mutex_lock(&sc->mutex);
1007
1008         /* setup initial channel */
1009         sc->chan_idx = curchan->hw_value;
1010
1011         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1012
1013         /* Reset SERDES registers */
1014         ath9k_hw_configpcipowersave(ah, false);
1015
1016         /*
1017          * The basic interface to setting the hardware in a good
1018          * state is ``reset''.  On return the hardware is known to
1019          * be powered up and with interrupts disabled.  This must
1020          * be followed by initialization of the appropriate bits
1021          * and then setup of the interrupt mask.
1022          */
1023         spin_lock_bh(&sc->sc_pcu_lock);
1024
1025         atomic_set(&ah->intr_ref_cnt, -1);
1026
1027         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1028         if (r) {
1029                 ath_err(common,
1030                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1031                         r, curchan->center_freq);
1032                 spin_unlock_bh(&sc->sc_pcu_lock);
1033                 goto mutex_unlock;
1034         }
1035
1036         /* Setup our intr mask. */
1037         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1038                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1039                     ATH9K_INT_GLOBAL;
1040
1041         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1042                 ah->imask |= ATH9K_INT_RXHP |
1043                              ATH9K_INT_RXLP |
1044                              ATH9K_INT_BB_WATCHDOG;
1045         else
1046                 ah->imask |= ATH9K_INT_RX;
1047
1048         ah->imask |= ATH9K_INT_GTT;
1049
1050         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1051                 ah->imask |= ATH9K_INT_CST;
1052
1053         if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1054                 ah->imask |= ATH9K_INT_MCI;
1055
1056         sc->sc_flags &= ~SC_OP_INVALID;
1057         sc->sc_ah->is_monitoring = false;
1058
1059         /* Disable BMISS interrupt when we're not associated */
1060         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1061
1062         if (!ath_complete_reset(sc, false)) {
1063                 r = -EIO;
1064                 spin_unlock_bh(&sc->sc_pcu_lock);
1065                 goto mutex_unlock;
1066         }
1067
1068         if (ah->led_pin >= 0) {
1069                 ath9k_hw_cfg_output(ah, ah->led_pin,
1070                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1071                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1072         }
1073
1074         /*
1075          * Reset key cache to sane defaults (all entries cleared) instead of
1076          * semi-random values after suspend/resume.
1077          */
1078         ath9k_cmn_init_crypto(sc->sc_ah);
1079
1080         spin_unlock_bh(&sc->sc_pcu_lock);
1081
1082         if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
1083             !ah->btcoex_hw.enabled) {
1084                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
1085                         ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1086                                                    AR_STOMP_LOW_WLAN_WGHT);
1087                 ath9k_hw_btcoex_enable(ah);
1088
1089                 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
1090                         ath9k_btcoex_timer_resume(sc);
1091         }
1092
1093         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1094                 common->bus_ops->extn_synch_en(common);
1095
1096 mutex_unlock:
1097         mutex_unlock(&sc->mutex);
1098
1099         ath9k_ps_restore(sc);
1100
1101         return r;
1102 }
1103
1104 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1105 {
1106         struct ath_softc *sc = hw->priv;
1107         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1108         struct ath_tx_control txctl;
1109         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1110
1111         if (sc->ps_enabled) {
1112                 /*
1113                  * mac80211 does not set PM field for normal data frames, so we
1114                  * need to update that based on the current PS mode.
1115                  */
1116                 if (ieee80211_is_data(hdr->frame_control) &&
1117                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1118                     !ieee80211_has_pm(hdr->frame_control)) {
1119                         ath_dbg(common, PS,
1120                                 "Add PM=1 for a TX frame while in PS mode\n");
1121                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1122                 }
1123         }
1124
1125         /*
1126          * Cannot tx while the hardware is in full sleep, it first needs a full
1127          * chip reset to recover from that
1128          */
1129         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1130                 goto exit;
1131
1132         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1133                 /*
1134                  * We are using PS-Poll and mac80211 can request TX while in
1135                  * power save mode. Need to wake up hardware for the TX to be
1136                  * completed and if needed, also for RX of buffered frames.
1137                  */
1138                 ath9k_ps_wakeup(sc);
1139                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1140                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1141                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1142                         ath_dbg(common, PS,
1143                                 "Sending PS-Poll to pick a buffered frame\n");
1144                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1145                 } else {
1146                         ath_dbg(common, PS, "Wake up to complete TX\n");
1147                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1148                 }
1149                 /*
1150                  * The actual restore operation will happen only after
1151                  * the sc_flags bit is cleared. We are just dropping
1152                  * the ps_usecount here.
1153                  */
1154                 ath9k_ps_restore(sc);
1155         }
1156
1157         memset(&txctl, 0, sizeof(struct ath_tx_control));
1158         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1159
1160         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1161
1162         if (ath_tx_start(hw, skb, &txctl) != 0) {
1163                 ath_dbg(common, XMIT, "TX failed\n");
1164                 goto exit;
1165         }
1166
1167         return;
1168 exit:
1169         dev_kfree_skb_any(skb);
1170 }
1171
1172 static void ath9k_stop(struct ieee80211_hw *hw)
1173 {
1174         struct ath_softc *sc = hw->priv;
1175         struct ath_hw *ah = sc->sc_ah;
1176         struct ath_common *common = ath9k_hw_common(ah);
1177         bool prev_idle;
1178
1179         mutex_lock(&sc->mutex);
1180
1181         ath_cancel_work(sc);
1182
1183         if (sc->sc_flags & SC_OP_INVALID) {
1184                 ath_dbg(common, ANY, "Device not present\n");
1185                 mutex_unlock(&sc->mutex);
1186                 return;
1187         }
1188
1189         /* Ensure HW is awake when we try to shut it down. */
1190         ath9k_ps_wakeup(sc);
1191
1192         if (ah->btcoex_hw.enabled &&
1193             ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
1194                 ath9k_hw_btcoex_disable(ah);
1195                 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
1196                         ath9k_btcoex_timer_pause(sc);
1197                 ath_mci_flush_profile(&sc->btcoex.mci);
1198         }
1199
1200         spin_lock_bh(&sc->sc_pcu_lock);
1201
1202         /* prevent tasklets to enable interrupts once we disable them */
1203         ah->imask &= ~ATH9K_INT_GLOBAL;
1204
1205         /* make sure h/w will not generate any interrupt
1206          * before setting the invalid flag. */
1207         ath9k_hw_disable_interrupts(ah);
1208
1209         spin_unlock_bh(&sc->sc_pcu_lock);
1210
1211         /* we can now sync irq and kill any running tasklets, since we already
1212          * disabled interrupts and not holding a spin lock */
1213         synchronize_irq(sc->irq);
1214         tasklet_kill(&sc->intr_tq);
1215         tasklet_kill(&sc->bcon_tasklet);
1216
1217         prev_idle = sc->ps_idle;
1218         sc->ps_idle = true;
1219
1220         spin_lock_bh(&sc->sc_pcu_lock);
1221
1222         if (ah->led_pin >= 0) {
1223                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1224                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1225         }
1226
1227         ath_prepare_reset(sc, false, true);
1228
1229         if (sc->rx.frag) {
1230                 dev_kfree_skb_any(sc->rx.frag);
1231                 sc->rx.frag = NULL;
1232         }
1233
1234         if (!ah->curchan)
1235                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1236
1237         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1238         ath9k_hw_phy_disable(ah);
1239
1240         ath9k_hw_configpcipowersave(ah, true);
1241
1242         spin_unlock_bh(&sc->sc_pcu_lock);
1243
1244         ath9k_ps_restore(sc);
1245
1246         sc->sc_flags |= SC_OP_INVALID;
1247         sc->ps_idle = prev_idle;
1248
1249         mutex_unlock(&sc->mutex);
1250
1251         ath_dbg(common, CONFIG, "Driver halt\n");
1252 }
1253
1254 bool ath9k_uses_beacons(int type)
1255 {
1256         switch (type) {
1257         case NL80211_IFTYPE_AP:
1258         case NL80211_IFTYPE_ADHOC:
1259         case NL80211_IFTYPE_MESH_POINT:
1260                 return true;
1261         default:
1262                 return false;
1263         }
1264 }
1265
1266 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1267                                  struct ieee80211_vif *vif)
1268 {
1269         struct ath_vif *avp = (void *)vif->drv_priv;
1270
1271         ath9k_set_beaconing_status(sc, false);
1272         ath_beacon_return(sc, avp);
1273         ath9k_set_beaconing_status(sc, true);
1274         sc->sc_flags &= ~SC_OP_BEACONS;
1275 }
1276
1277 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1278 {
1279         struct ath9k_vif_iter_data *iter_data = data;
1280         int i;
1281
1282         if (iter_data->hw_macaddr)
1283                 for (i = 0; i < ETH_ALEN; i++)
1284                         iter_data->mask[i] &=
1285                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1286
1287         switch (vif->type) {
1288         case NL80211_IFTYPE_AP:
1289                 iter_data->naps++;
1290                 break;
1291         case NL80211_IFTYPE_STATION:
1292                 iter_data->nstations++;
1293                 break;
1294         case NL80211_IFTYPE_ADHOC:
1295                 iter_data->nadhocs++;
1296                 break;
1297         case NL80211_IFTYPE_MESH_POINT:
1298                 iter_data->nmeshes++;
1299                 break;
1300         case NL80211_IFTYPE_WDS:
1301                 iter_data->nwds++;
1302                 break;
1303         default:
1304                 iter_data->nothers++;
1305                 break;
1306         }
1307 }
1308
1309 /* Called with sc->mutex held. */
1310 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1311                                struct ieee80211_vif *vif,
1312                                struct ath9k_vif_iter_data *iter_data)
1313 {
1314         struct ath_softc *sc = hw->priv;
1315         struct ath_hw *ah = sc->sc_ah;
1316         struct ath_common *common = ath9k_hw_common(ah);
1317
1318         /*
1319          * Use the hardware MAC address as reference, the hardware uses it
1320          * together with the BSSID mask when matching addresses.
1321          */
1322         memset(iter_data, 0, sizeof(*iter_data));
1323         iter_data->hw_macaddr = common->macaddr;
1324         memset(&iter_data->mask, 0xff, ETH_ALEN);
1325
1326         if (vif)
1327                 ath9k_vif_iter(iter_data, vif->addr, vif);
1328
1329         /* Get list of all active MAC addresses */
1330         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1331                                                    iter_data);
1332 }
1333
1334 /* Called with sc->mutex held. */
1335 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1336                                           struct ieee80211_vif *vif)
1337 {
1338         struct ath_softc *sc = hw->priv;
1339         struct ath_hw *ah = sc->sc_ah;
1340         struct ath_common *common = ath9k_hw_common(ah);
1341         struct ath9k_vif_iter_data iter_data;
1342
1343         ath9k_calculate_iter_data(hw, vif, &iter_data);
1344
1345         /* Set BSSID mask. */
1346         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1347         ath_hw_setbssidmask(common);
1348
1349         /* Set op-mode & TSF */
1350         if (iter_data.naps > 0) {
1351                 ath9k_hw_set_tsfadjust(ah, 1);
1352                 sc->sc_flags |= SC_OP_TSF_RESET;
1353                 ah->opmode = NL80211_IFTYPE_AP;
1354         } else {
1355                 ath9k_hw_set_tsfadjust(ah, 0);
1356                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1357
1358                 if (iter_data.nmeshes)
1359                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1360                 else if (iter_data.nwds)
1361                         ah->opmode = NL80211_IFTYPE_AP;
1362                 else if (iter_data.nadhocs)
1363                         ah->opmode = NL80211_IFTYPE_ADHOC;
1364                 else
1365                         ah->opmode = NL80211_IFTYPE_STATION;
1366         }
1367
1368         /*
1369          * Enable MIB interrupts when there are hardware phy counters.
1370          */
1371         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1372                 if (ah->config.enable_ani)
1373                         ah->imask |= ATH9K_INT_MIB;
1374                 ah->imask |= ATH9K_INT_TSFOOR;
1375         } else {
1376                 ah->imask &= ~ATH9K_INT_MIB;
1377                 ah->imask &= ~ATH9K_INT_TSFOOR;
1378         }
1379
1380         ath9k_hw_set_interrupts(ah);
1381
1382         /* Set up ANI */
1383         if (iter_data.naps > 0) {
1384                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1385
1386                 if (!common->disable_ani) {
1387                         sc->sc_flags |= SC_OP_ANI_RUN;
1388                         ath_start_ani(common);
1389                 }
1390
1391         } else {
1392                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1393                 del_timer_sync(&common->ani.timer);
1394         }
1395 }
1396
1397 /* Called with sc->mutex held, vif counts set up properly. */
1398 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1399                                    struct ieee80211_vif *vif)
1400 {
1401         struct ath_softc *sc = hw->priv;
1402
1403         ath9k_calculate_summary_state(hw, vif);
1404
1405         if (ath9k_uses_beacons(vif->type)) {
1406                 int error;
1407                 /* This may fail because upper levels do not have beacons
1408                  * properly configured yet.  That's OK, we assume it
1409                  * will be properly configured and then we will be notified
1410                  * in the info_changed method and set up beacons properly
1411                  * there.
1412                  */
1413                 ath9k_set_beaconing_status(sc, false);
1414                 error = ath_beacon_alloc(sc, vif);
1415                 if (!error)
1416                         ath_beacon_config(sc, vif);
1417                 ath9k_set_beaconing_status(sc, true);
1418         }
1419 }
1420
1421
1422 static int ath9k_add_interface(struct ieee80211_hw *hw,
1423                                struct ieee80211_vif *vif)
1424 {
1425         struct ath_softc *sc = hw->priv;
1426         struct ath_hw *ah = sc->sc_ah;
1427         struct ath_common *common = ath9k_hw_common(ah);
1428         int ret = 0;
1429
1430         ath9k_ps_wakeup(sc);
1431         mutex_lock(&sc->mutex);
1432
1433         switch (vif->type) {
1434         case NL80211_IFTYPE_STATION:
1435         case NL80211_IFTYPE_WDS:
1436         case NL80211_IFTYPE_ADHOC:
1437         case NL80211_IFTYPE_AP:
1438         case NL80211_IFTYPE_MESH_POINT:
1439                 break;
1440         default:
1441                 ath_err(common, "Interface type %d not yet supported\n",
1442                         vif->type);
1443                 ret = -EOPNOTSUPP;
1444                 goto out;
1445         }
1446
1447         if (ath9k_uses_beacons(vif->type)) {
1448                 if (sc->nbcnvifs >= ATH_BCBUF) {
1449                         ath_err(common, "Not enough beacon buffers when adding"
1450                                 " new interface of type: %i\n",
1451                                 vif->type);
1452                         ret = -ENOBUFS;
1453                         goto out;
1454                 }
1455         }
1456
1457         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1458             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1459              sc->nvifs > 0)) {
1460                 ath_err(common, "Cannot create ADHOC interface when other"
1461                         " interfaces already exist.\n");
1462                 ret = -EINVAL;
1463                 goto out;
1464         }
1465
1466         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1467
1468         sc->nvifs++;
1469
1470         ath9k_do_vif_add_setup(hw, vif);
1471 out:
1472         mutex_unlock(&sc->mutex);
1473         ath9k_ps_restore(sc);
1474         return ret;
1475 }
1476
1477 static int ath9k_change_interface(struct ieee80211_hw *hw,
1478                                   struct ieee80211_vif *vif,
1479                                   enum nl80211_iftype new_type,
1480                                   bool p2p)
1481 {
1482         struct ath_softc *sc = hw->priv;
1483         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1484         int ret = 0;
1485
1486         ath_dbg(common, CONFIG, "Change Interface\n");
1487         mutex_lock(&sc->mutex);
1488         ath9k_ps_wakeup(sc);
1489
1490         /* See if new interface type is valid. */
1491         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1492             (sc->nvifs > 1)) {
1493                 ath_err(common, "When using ADHOC, it must be the only"
1494                         " interface.\n");
1495                 ret = -EINVAL;
1496                 goto out;
1497         }
1498
1499         if (ath9k_uses_beacons(new_type) &&
1500             !ath9k_uses_beacons(vif->type)) {
1501                 if (sc->nbcnvifs >= ATH_BCBUF) {
1502                         ath_err(common, "No beacon slot available\n");
1503                         ret = -ENOBUFS;
1504                         goto out;
1505                 }
1506         }
1507
1508         /* Clean up old vif stuff */
1509         if (ath9k_uses_beacons(vif->type))
1510                 ath9k_reclaim_beacon(sc, vif);
1511
1512         /* Add new settings */
1513         vif->type = new_type;
1514         vif->p2p = p2p;
1515
1516         ath9k_do_vif_add_setup(hw, vif);
1517 out:
1518         ath9k_ps_restore(sc);
1519         mutex_unlock(&sc->mutex);
1520         return ret;
1521 }
1522
1523 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1524                                    struct ieee80211_vif *vif)
1525 {
1526         struct ath_softc *sc = hw->priv;
1527         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1528
1529         ath_dbg(common, CONFIG, "Detach Interface\n");
1530
1531         ath9k_ps_wakeup(sc);
1532         mutex_lock(&sc->mutex);
1533
1534         sc->nvifs--;
1535
1536         /* Reclaim beacon resources */
1537         if (ath9k_uses_beacons(vif->type))
1538                 ath9k_reclaim_beacon(sc, vif);
1539
1540         ath9k_calculate_summary_state(hw, NULL);
1541
1542         mutex_unlock(&sc->mutex);
1543         ath9k_ps_restore(sc);
1544 }
1545
1546 static void ath9k_enable_ps(struct ath_softc *sc)
1547 {
1548         struct ath_hw *ah = sc->sc_ah;
1549
1550         sc->ps_enabled = true;
1551         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1552                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1553                         ah->imask |= ATH9K_INT_TIM_TIMER;
1554                         ath9k_hw_set_interrupts(ah);
1555                 }
1556                 ath9k_hw_setrxabort(ah, 1);
1557         }
1558 }
1559
1560 static void ath9k_disable_ps(struct ath_softc *sc)
1561 {
1562         struct ath_hw *ah = sc->sc_ah;
1563
1564         sc->ps_enabled = false;
1565         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1566         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1567                 ath9k_hw_setrxabort(ah, 0);
1568                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1569                                   PS_WAIT_FOR_CAB |
1570                                   PS_WAIT_FOR_PSPOLL_DATA |
1571                                   PS_WAIT_FOR_TX_ACK);
1572                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1573                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1574                         ath9k_hw_set_interrupts(ah);
1575                 }
1576         }
1577
1578 }
1579
1580 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1581 {
1582         struct ath_softc *sc = hw->priv;
1583         struct ath_hw *ah = sc->sc_ah;
1584         struct ath_common *common = ath9k_hw_common(ah);
1585         struct ieee80211_conf *conf = &hw->conf;
1586
1587         ath9k_ps_wakeup(sc);
1588         mutex_lock(&sc->mutex);
1589
1590         /*
1591          * Leave this as the first check because we need to turn on the
1592          * radio if it was disabled before prior to processing the rest
1593          * of the changes. Likewise we must only disable the radio towards
1594          * the end.
1595          */
1596         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1597                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1598                 if (sc->ps_idle)
1599                         ath_cancel_work(sc);
1600         }
1601
1602         /*
1603          * We just prepare to enable PS. We have to wait until our AP has
1604          * ACK'd our null data frame to disable RX otherwise we'll ignore
1605          * those ACKs and end up retransmitting the same null data frames.
1606          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1607          */
1608         if (changed & IEEE80211_CONF_CHANGE_PS) {
1609                 unsigned long flags;
1610                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1611                 if (conf->flags & IEEE80211_CONF_PS)
1612                         ath9k_enable_ps(sc);
1613                 else
1614                         ath9k_disable_ps(sc);
1615                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1616         }
1617
1618         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1619                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1620                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1621                         sc->sc_ah->is_monitoring = true;
1622                 } else {
1623                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1624                         sc->sc_ah->is_monitoring = false;
1625                 }
1626         }
1627
1628         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1629                 struct ieee80211_channel *curchan = hw->conf.channel;
1630                 int pos = curchan->hw_value;
1631                 int old_pos = -1;
1632                 unsigned long flags;
1633
1634                 if (ah->curchan)
1635                         old_pos = ah->curchan - &ah->channels[0];
1636
1637                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1638                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1639                 else
1640                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1641
1642                 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1643                         curchan->center_freq, conf->channel_type);
1644
1645                 /* update survey stats for the old channel before switching */
1646                 spin_lock_irqsave(&common->cc_lock, flags);
1647                 ath_update_survey_stats(sc);
1648                 spin_unlock_irqrestore(&common->cc_lock, flags);
1649
1650                 /*
1651                  * Preserve the current channel values, before updating
1652                  * the same channel
1653                  */
1654                 if (ah->curchan && (old_pos == pos))
1655                         ath9k_hw_getnf(ah, ah->curchan);
1656
1657                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1658                                           curchan, conf->channel_type);
1659
1660                 /*
1661                  * If the operating channel changes, change the survey in-use flags
1662                  * along with it.
1663                  * Reset the survey data for the new channel, unless we're switching
1664                  * back to the operating channel from an off-channel operation.
1665                  */
1666                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1667                     sc->cur_survey != &sc->survey[pos]) {
1668
1669                         if (sc->cur_survey)
1670                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1671
1672                         sc->cur_survey = &sc->survey[pos];
1673
1674                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1675                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1676                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1677                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1678                 }
1679
1680                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1681                         ath_err(common, "Unable to set channel\n");
1682                         mutex_unlock(&sc->mutex);
1683                         return -EINVAL;
1684                 }
1685
1686                 /*
1687                  * The most recent snapshot of channel->noisefloor for the old
1688                  * channel is only available after the hardware reset. Copy it to
1689                  * the survey stats now.
1690                  */
1691                 if (old_pos >= 0)
1692                         ath_update_survey_nf(sc, old_pos);
1693         }
1694
1695         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1696                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1697                 sc->config.txpowlimit = 2 * conf->power_level;
1698                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1699                                        sc->config.txpowlimit, &sc->curtxpow);
1700         }
1701
1702         mutex_unlock(&sc->mutex);
1703         ath9k_ps_restore(sc);
1704
1705         return 0;
1706 }
1707
1708 #define SUPPORTED_FILTERS                       \
1709         (FIF_PROMISC_IN_BSS |                   \
1710         FIF_ALLMULTI |                          \
1711         FIF_CONTROL |                           \
1712         FIF_PSPOLL |                            \
1713         FIF_OTHER_BSS |                         \
1714         FIF_BCN_PRBRESP_PROMISC |               \
1715         FIF_PROBE_REQ |                         \
1716         FIF_FCSFAIL)
1717
1718 /* FIXME: sc->sc_full_reset ? */
1719 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1720                                    unsigned int changed_flags,
1721                                    unsigned int *total_flags,
1722                                    u64 multicast)
1723 {
1724         struct ath_softc *sc = hw->priv;
1725         u32 rfilt;
1726
1727         changed_flags &= SUPPORTED_FILTERS;
1728         *total_flags &= SUPPORTED_FILTERS;
1729
1730         sc->rx.rxfilter = *total_flags;
1731         ath9k_ps_wakeup(sc);
1732         rfilt = ath_calcrxfilter(sc);
1733         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1734         ath9k_ps_restore(sc);
1735
1736         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1737                 rfilt);
1738 }
1739
1740 static int ath9k_sta_add(struct ieee80211_hw *hw,
1741                          struct ieee80211_vif *vif,
1742                          struct ieee80211_sta *sta)
1743 {
1744         struct ath_softc *sc = hw->priv;
1745         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1746         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1747         struct ieee80211_key_conf ps_key = { };
1748
1749         ath_node_attach(sc, sta, vif);
1750
1751         if (vif->type != NL80211_IFTYPE_AP &&
1752             vif->type != NL80211_IFTYPE_AP_VLAN)
1753                 return 0;
1754
1755         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1756
1757         return 0;
1758 }
1759
1760 static void ath9k_del_ps_key(struct ath_softc *sc,
1761                              struct ieee80211_vif *vif,
1762                              struct ieee80211_sta *sta)
1763 {
1764         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1765         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1766         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1767
1768         if (!an->ps_key)
1769             return;
1770
1771         ath_key_delete(common, &ps_key);
1772 }
1773
1774 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1775                             struct ieee80211_vif *vif,
1776                             struct ieee80211_sta *sta)
1777 {
1778         struct ath_softc *sc = hw->priv;
1779
1780         ath9k_del_ps_key(sc, vif, sta);
1781         ath_node_detach(sc, sta);
1782
1783         return 0;
1784 }
1785
1786 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1787                          struct ieee80211_vif *vif,
1788                          enum sta_notify_cmd cmd,
1789                          struct ieee80211_sta *sta)
1790 {
1791         struct ath_softc *sc = hw->priv;
1792         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1793
1794         if (!(sc->sc_flags & SC_OP_TXAGGR))
1795                 return;
1796
1797         switch (cmd) {
1798         case STA_NOTIFY_SLEEP:
1799                 an->sleeping = true;
1800                 ath_tx_aggr_sleep(sta, sc, an);
1801                 break;
1802         case STA_NOTIFY_AWAKE:
1803                 an->sleeping = false;
1804                 ath_tx_aggr_wakeup(sc, an);
1805                 break;
1806         }
1807 }
1808
1809 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1810                          struct ieee80211_vif *vif, u16 queue,
1811                          const struct ieee80211_tx_queue_params *params)
1812 {
1813         struct ath_softc *sc = hw->priv;
1814         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1815         struct ath_txq *txq;
1816         struct ath9k_tx_queue_info qi;
1817         int ret = 0;
1818
1819         if (queue >= WME_NUM_AC)
1820                 return 0;
1821
1822         txq = sc->tx.txq_map[queue];
1823
1824         ath9k_ps_wakeup(sc);
1825         mutex_lock(&sc->mutex);
1826
1827         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1828
1829         qi.tqi_aifs = params->aifs;
1830         qi.tqi_cwmin = params->cw_min;
1831         qi.tqi_cwmax = params->cw_max;
1832         qi.tqi_burstTime = params->txop;
1833
1834         ath_dbg(common, CONFIG,
1835                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1836                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1837                 params->cw_max, params->txop);
1838
1839         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1840         if (ret)
1841                 ath_err(common, "TXQ Update failed\n");
1842
1843         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1844                 if (queue == WME_AC_BE && !ret)
1845                         ath_beaconq_config(sc);
1846
1847         mutex_unlock(&sc->mutex);
1848         ath9k_ps_restore(sc);
1849
1850         return ret;
1851 }
1852
1853 static int ath9k_set_key(struct ieee80211_hw *hw,
1854                          enum set_key_cmd cmd,
1855                          struct ieee80211_vif *vif,
1856                          struct ieee80211_sta *sta,
1857                          struct ieee80211_key_conf *key)
1858 {
1859         struct ath_softc *sc = hw->priv;
1860         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1861         int ret = 0;
1862
1863         if (ath9k_modparam_nohwcrypt)
1864                 return -ENOSPC;
1865
1866         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1867              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1868             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1869              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1870             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1871                 /*
1872                  * For now, disable hw crypto for the RSN IBSS group keys. This
1873                  * could be optimized in the future to use a modified key cache
1874                  * design to support per-STA RX GTK, but until that gets
1875                  * implemented, use of software crypto for group addressed
1876                  * frames is a acceptable to allow RSN IBSS to be used.
1877                  */
1878                 return -EOPNOTSUPP;
1879         }
1880
1881         mutex_lock(&sc->mutex);
1882         ath9k_ps_wakeup(sc);
1883         ath_dbg(common, CONFIG, "Set HW Key\n");
1884
1885         switch (cmd) {
1886         case SET_KEY:
1887                 if (sta)
1888                         ath9k_del_ps_key(sc, vif, sta);
1889
1890                 ret = ath_key_config(common, vif, sta, key);
1891                 if (ret >= 0) {
1892                         key->hw_key_idx = ret;
1893                         /* push IV and Michael MIC generation to stack */
1894                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1895                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1896                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1897                         if (sc->sc_ah->sw_mgmt_crypto &&
1898                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1899                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1900                         ret = 0;
1901                 }
1902                 break;
1903         case DISABLE_KEY:
1904                 ath_key_delete(common, key);
1905                 break;
1906         default:
1907                 ret = -EINVAL;
1908         }
1909
1910         ath9k_ps_restore(sc);
1911         mutex_unlock(&sc->mutex);
1912
1913         return ret;
1914 }
1915 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1916 {
1917         struct ath_softc *sc = data;
1918         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1919         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1920         struct ath_vif *avp = (void *)vif->drv_priv;
1921
1922         /*
1923          * Skip iteration if primary station vif's bss info
1924          * was not changed
1925          */
1926         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1927                 return;
1928
1929         if (bss_conf->assoc) {
1930                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1931                 avp->primary_sta_vif = true;
1932                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1933                 common->curaid = bss_conf->aid;
1934                 ath9k_hw_write_associd(sc->sc_ah);
1935                 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1936                         bss_conf->aid, common->curbssid);
1937                 ath_beacon_config(sc, vif);
1938                 /*
1939                  * Request a re-configuration of Beacon related timers
1940                  * on the receipt of the first Beacon frame (i.e.,
1941                  * after time sync with the AP).
1942                  */
1943                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1944                 /* Reset rssi stats */
1945                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1946                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1947
1948                 if (!common->disable_ani) {
1949                         sc->sc_flags |= SC_OP_ANI_RUN;
1950                         ath_start_ani(common);
1951                 }
1952
1953         }
1954 }
1955
1956 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1957 {
1958         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1959         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1960         struct ath_vif *avp = (void *)vif->drv_priv;
1961
1962         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1963                 return;
1964
1965         /* Reconfigure bss info */
1966         if (avp->primary_sta_vif && !bss_conf->assoc) {
1967                 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1968                         common->curaid, common->curbssid);
1969                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1970                 avp->primary_sta_vif = false;
1971                 memset(common->curbssid, 0, ETH_ALEN);
1972                 common->curaid = 0;
1973         }
1974
1975         ieee80211_iterate_active_interfaces_atomic(
1976                         sc->hw, ath9k_bss_iter, sc);
1977
1978         /*
1979          * None of station vifs are associated.
1980          * Clear bssid & aid
1981          */
1982         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1983                 ath9k_hw_write_associd(sc->sc_ah);
1984                 /* Stop ANI */
1985                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1986                 del_timer_sync(&common->ani.timer);
1987                 memset(&sc->caldata, 0, sizeof(sc->caldata));
1988         }
1989 }
1990
1991 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1992                                    struct ieee80211_vif *vif,
1993                                    struct ieee80211_bss_conf *bss_conf,
1994                                    u32 changed)
1995 {
1996         struct ath_softc *sc = hw->priv;
1997         struct ath_hw *ah = sc->sc_ah;
1998         struct ath_common *common = ath9k_hw_common(ah);
1999         struct ath_vif *avp = (void *)vif->drv_priv;
2000         int slottime;
2001         int error;
2002
2003         ath9k_ps_wakeup(sc);
2004         mutex_lock(&sc->mutex);
2005
2006         if (changed & BSS_CHANGED_BSSID) {
2007                 ath9k_config_bss(sc, vif);
2008
2009                 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
2010                         common->curbssid, common->curaid);
2011         }
2012
2013         if (changed & BSS_CHANGED_IBSS) {
2014                 /* There can be only one vif available */
2015                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2016                 common->curaid = bss_conf->aid;
2017                 ath9k_hw_write_associd(sc->sc_ah);
2018
2019                 if (bss_conf->ibss_joined) {
2020                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2021
2022                         if (!common->disable_ani) {
2023                                 sc->sc_flags |= SC_OP_ANI_RUN;
2024                                 ath_start_ani(common);
2025                         }
2026
2027                 } else {
2028                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2029                         del_timer_sync(&common->ani.timer);
2030                 }
2031         }
2032
2033         /* Enable transmission of beacons (AP, IBSS, MESH) */
2034         if ((changed & BSS_CHANGED_BEACON) ||
2035             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2036                 ath9k_set_beaconing_status(sc, false);
2037                 error = ath_beacon_alloc(sc, vif);
2038                 if (!error)
2039                         ath_beacon_config(sc, vif);
2040                 ath9k_set_beaconing_status(sc, true);
2041         }
2042
2043         if (changed & BSS_CHANGED_ERP_SLOT) {
2044                 if (bss_conf->use_short_slot)
2045                         slottime = 9;
2046                 else
2047                         slottime = 20;
2048                 if (vif->type == NL80211_IFTYPE_AP) {
2049                         /*
2050                          * Defer update, so that connected stations can adjust
2051                          * their settings at the same time.
2052                          * See beacon.c for more details
2053                          */
2054                         sc->beacon.slottime = slottime;
2055                         sc->beacon.updateslot = UPDATE;
2056                 } else {
2057                         ah->slottime = slottime;
2058                         ath9k_hw_init_global_settings(ah);
2059                 }
2060         }
2061
2062         /* Disable transmission of beacons */
2063         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2064             !bss_conf->enable_beacon) {
2065                 ath9k_set_beaconing_status(sc, false);
2066                 avp->is_bslot_active = false;
2067                 ath9k_set_beaconing_status(sc, true);
2068         }
2069
2070         if (changed & BSS_CHANGED_BEACON_INT) {
2071                 /*
2072                  * In case of AP mode, the HW TSF has to be reset
2073                  * when the beacon interval changes.
2074                  */
2075                 if (vif->type == NL80211_IFTYPE_AP) {
2076                         sc->sc_flags |= SC_OP_TSF_RESET;
2077                         ath9k_set_beaconing_status(sc, false);
2078                         error = ath_beacon_alloc(sc, vif);
2079                         if (!error)
2080                                 ath_beacon_config(sc, vif);
2081                         ath9k_set_beaconing_status(sc, true);
2082                 } else
2083                         ath_beacon_config(sc, vif);
2084         }
2085
2086         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2087                 ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
2088                         bss_conf->use_short_preamble);
2089                 if (bss_conf->use_short_preamble)
2090                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2091                 else
2092                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2093         }
2094
2095         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2096                 ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
2097                         bss_conf->use_cts_prot);
2098                 if (bss_conf->use_cts_prot &&
2099                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2100                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2101                 else
2102                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2103         }
2104
2105         mutex_unlock(&sc->mutex);
2106         ath9k_ps_restore(sc);
2107 }
2108
2109 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2110 {
2111         struct ath_softc *sc = hw->priv;
2112         u64 tsf;
2113
2114         mutex_lock(&sc->mutex);
2115         ath9k_ps_wakeup(sc);
2116         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2117         ath9k_ps_restore(sc);
2118         mutex_unlock(&sc->mutex);
2119
2120         return tsf;
2121 }
2122
2123 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2124                           struct ieee80211_vif *vif,
2125                           u64 tsf)
2126 {
2127         struct ath_softc *sc = hw->priv;
2128
2129         mutex_lock(&sc->mutex);
2130         ath9k_ps_wakeup(sc);
2131         ath9k_hw_settsf64(sc->sc_ah, tsf);
2132         ath9k_ps_restore(sc);
2133         mutex_unlock(&sc->mutex);
2134 }
2135
2136 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2137 {
2138         struct ath_softc *sc = hw->priv;
2139
2140         mutex_lock(&sc->mutex);
2141
2142         ath9k_ps_wakeup(sc);
2143         ath9k_hw_reset_tsf(sc->sc_ah);
2144         ath9k_ps_restore(sc);
2145
2146         mutex_unlock(&sc->mutex);
2147 }
2148
2149 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2150                               struct ieee80211_vif *vif,
2151                               enum ieee80211_ampdu_mlme_action action,
2152                               struct ieee80211_sta *sta,
2153                               u16 tid, u16 *ssn, u8 buf_size)
2154 {
2155         struct ath_softc *sc = hw->priv;
2156         int ret = 0;
2157
2158         local_bh_disable();
2159
2160         switch (action) {
2161         case IEEE80211_AMPDU_RX_START:
2162                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2163                         ret = -ENOTSUPP;
2164                 break;
2165         case IEEE80211_AMPDU_RX_STOP:
2166                 break;
2167         case IEEE80211_AMPDU_TX_START:
2168                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2169                         return -EOPNOTSUPP;
2170
2171                 ath9k_ps_wakeup(sc);
2172                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2173                 if (!ret)
2174                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2175                 ath9k_ps_restore(sc);
2176                 break;
2177         case IEEE80211_AMPDU_TX_STOP:
2178                 ath9k_ps_wakeup(sc);
2179                 ath_tx_aggr_stop(sc, sta, tid);
2180                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2181                 ath9k_ps_restore(sc);
2182                 break;
2183         case IEEE80211_AMPDU_TX_OPERATIONAL:
2184                 ath9k_ps_wakeup(sc);
2185                 ath_tx_aggr_resume(sc, sta, tid);
2186                 ath9k_ps_restore(sc);
2187                 break;
2188         default:
2189                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2190         }
2191
2192         local_bh_enable();
2193
2194         return ret;
2195 }
2196
2197 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2198                              struct survey_info *survey)
2199 {
2200         struct ath_softc *sc = hw->priv;
2201         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2202         struct ieee80211_supported_band *sband;
2203         struct ieee80211_channel *chan;
2204         unsigned long flags;
2205         int pos;
2206
2207         spin_lock_irqsave(&common->cc_lock, flags);
2208         if (idx == 0)
2209                 ath_update_survey_stats(sc);
2210
2211         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2212         if (sband && idx >= sband->n_channels) {
2213                 idx -= sband->n_channels;
2214                 sband = NULL;
2215         }
2216
2217         if (!sband)
2218                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2219
2220         if (!sband || idx >= sband->n_channels) {
2221                 spin_unlock_irqrestore(&common->cc_lock, flags);
2222                 return -ENOENT;
2223         }
2224
2225         chan = &sband->channels[idx];
2226         pos = chan->hw_value;
2227         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2228         survey->channel = chan;
2229         spin_unlock_irqrestore(&common->cc_lock, flags);
2230
2231         return 0;
2232 }
2233
2234 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2235 {
2236         struct ath_softc *sc = hw->priv;
2237         struct ath_hw *ah = sc->sc_ah;
2238
2239         mutex_lock(&sc->mutex);
2240         ah->coverage_class = coverage_class;
2241
2242         ath9k_ps_wakeup(sc);
2243         ath9k_hw_init_global_settings(ah);
2244         ath9k_ps_restore(sc);
2245
2246         mutex_unlock(&sc->mutex);
2247 }
2248
2249 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2250 {
2251         struct ath_softc *sc = hw->priv;
2252         struct ath_hw *ah = sc->sc_ah;
2253         struct ath_common *common = ath9k_hw_common(ah);
2254         int timeout = 200; /* ms */
2255         int i, j;
2256         bool drain_txq;
2257
2258         mutex_lock(&sc->mutex);
2259         cancel_delayed_work_sync(&sc->tx_complete_work);
2260
2261         if (ah->ah_flags & AH_UNPLUGGED) {
2262                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2263                 mutex_unlock(&sc->mutex);
2264                 return;
2265         }
2266
2267         if (sc->sc_flags & SC_OP_INVALID) {
2268                 ath_dbg(common, ANY, "Device not present\n");
2269                 mutex_unlock(&sc->mutex);
2270                 return;
2271         }
2272
2273         for (j = 0; j < timeout; j++) {
2274                 bool npend = false;
2275
2276                 if (j)
2277                         usleep_range(1000, 2000);
2278
2279                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2280                         if (!ATH_TXQ_SETUP(sc, i))
2281                                 continue;
2282
2283                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2284
2285                         if (npend)
2286                                 break;
2287                 }
2288
2289                 if (!npend)
2290                     break;
2291         }
2292
2293         if (drop) {
2294                 ath9k_ps_wakeup(sc);
2295                 spin_lock_bh(&sc->sc_pcu_lock);
2296                 drain_txq = ath_drain_all_txq(sc, false);
2297                 spin_unlock_bh(&sc->sc_pcu_lock);
2298
2299                 if (!drain_txq)
2300                         ath_reset(sc, false);
2301
2302                 ath9k_ps_restore(sc);
2303                 ieee80211_wake_queues(hw);
2304         }
2305
2306         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2307         mutex_unlock(&sc->mutex);
2308 }
2309
2310 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2311 {
2312         struct ath_softc *sc = hw->priv;
2313         int i;
2314
2315         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2316                 if (!ATH_TXQ_SETUP(sc, i))
2317                         continue;
2318
2319                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2320                         return true;
2321         }
2322         return false;
2323 }
2324
2325 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2326 {
2327         struct ath_softc *sc = hw->priv;
2328         struct ath_hw *ah = sc->sc_ah;
2329         struct ieee80211_vif *vif;
2330         struct ath_vif *avp;
2331         struct ath_buf *bf;
2332         struct ath_tx_status ts;
2333         int status;
2334
2335         vif = sc->beacon.bslot[0];
2336         if (!vif)
2337                 return 0;
2338
2339         avp = (void *)vif->drv_priv;
2340         if (!avp->is_bslot_active)
2341                 return 0;
2342
2343         if (!sc->beacon.tx_processed) {
2344                 tasklet_disable(&sc->bcon_tasklet);
2345
2346                 bf = avp->av_bcbuf;
2347                 if (!bf || !bf->bf_mpdu)
2348                         goto skip;
2349
2350                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2351                 if (status == -EINPROGRESS)
2352                         goto skip;
2353
2354                 sc->beacon.tx_processed = true;
2355                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2356
2357 skip:
2358                 tasklet_enable(&sc->bcon_tasklet);
2359         }
2360
2361         return sc->beacon.tx_last;
2362 }
2363
2364 static int ath9k_get_stats(struct ieee80211_hw *hw,
2365                            struct ieee80211_low_level_stats *stats)
2366 {
2367         struct ath_softc *sc = hw->priv;
2368         struct ath_hw *ah = sc->sc_ah;
2369         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2370
2371         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2372         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2373         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2374         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2375         return 0;
2376 }
2377
2378 static u32 fill_chainmask(u32 cap, u32 new)
2379 {
2380         u32 filled = 0;
2381         int i;
2382
2383         for (i = 0; cap && new; i++, cap >>= 1) {
2384                 if (!(cap & BIT(0)))
2385                         continue;
2386
2387                 if (new & BIT(0))
2388                         filled |= BIT(i);
2389
2390                 new >>= 1;
2391         }
2392
2393         return filled;
2394 }
2395
2396 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2397 {
2398         struct ath_softc *sc = hw->priv;
2399         struct ath_hw *ah = sc->sc_ah;
2400
2401         if (!rx_ant || !tx_ant)
2402                 return -EINVAL;
2403
2404         sc->ant_rx = rx_ant;
2405         sc->ant_tx = tx_ant;
2406
2407         if (ah->caps.rx_chainmask == 1)
2408                 return 0;
2409
2410         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2411         if (AR_SREV_9100(ah))
2412                 ah->rxchainmask = 0x7;
2413         else
2414                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2415
2416         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2417         ath9k_reload_chainmask_settings(sc);
2418
2419         return 0;
2420 }
2421
2422 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2423 {
2424         struct ath_softc *sc = hw->priv;
2425
2426         *tx_ant = sc->ant_tx;
2427         *rx_ant = sc->ant_rx;
2428         return 0;
2429 }
2430
2431 struct ieee80211_ops ath9k_ops = {
2432         .tx                 = ath9k_tx,
2433         .start              = ath9k_start,
2434         .stop               = ath9k_stop,
2435         .add_interface      = ath9k_add_interface,
2436         .change_interface   = ath9k_change_interface,
2437         .remove_interface   = ath9k_remove_interface,
2438         .config             = ath9k_config,
2439         .configure_filter   = ath9k_configure_filter,
2440         .sta_add            = ath9k_sta_add,
2441         .sta_remove         = ath9k_sta_remove,
2442         .sta_notify         = ath9k_sta_notify,
2443         .conf_tx            = ath9k_conf_tx,
2444         .bss_info_changed   = ath9k_bss_info_changed,
2445         .set_key            = ath9k_set_key,
2446         .get_tsf            = ath9k_get_tsf,
2447         .set_tsf            = ath9k_set_tsf,
2448         .reset_tsf          = ath9k_reset_tsf,
2449         .ampdu_action       = ath9k_ampdu_action,
2450         .get_survey         = ath9k_get_survey,
2451         .rfkill_poll        = ath9k_rfkill_poll_state,
2452         .set_coverage_class = ath9k_set_coverage_class,
2453         .flush              = ath9k_flush,
2454         .tx_frames_pending  = ath9k_tx_frames_pending,
2455         .tx_last_beacon     = ath9k_tx_last_beacon,
2456         .get_stats          = ath9k_get_stats,
2457         .set_antenna        = ath9k_set_antenna,
2458         .get_antenna        = ath9k_get_antenna,
2459 };