2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
38 switch (mpdudensity) {
44 /* Our lower layer calculations limit our precision to
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
64 spin_lock_bh(&txq->axq_lock);
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
69 spin_unlock_bh(&txq->axq_lock);
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
85 void ath_ps_full_sleep(unsigned long data)
87 struct ath_softc *sc = (struct ath_softc *) data;
88 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
91 spin_lock(&common->cc_lock);
92 ath_hw_cycle_counters_update(common);
93 spin_unlock(&common->cc_lock);
95 ath9k_hw_setrxabort(sc->sc_ah, 1);
96 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
98 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
101 void ath9k_ps_wakeup(struct ath_softc *sc)
103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
105 enum ath9k_power_mode power_mode;
107 spin_lock_irqsave(&sc->sc_pm_lock, flags);
108 if (++sc->ps_usecount != 1)
111 del_timer_sync(&sc->sleep_timer);
112 power_mode = sc->sc_ah->power_mode;
113 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
116 * While the hardware is asleep, the cycle counters contain no
117 * useful data. Better clear them now so that they don't mess up
118 * survey data results.
120 if (power_mode != ATH9K_PM_AWAKE) {
121 spin_lock(&common->cc_lock);
122 ath_hw_cycle_counters_update(common);
123 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
124 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
125 spin_unlock(&common->cc_lock);
129 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
132 void ath9k_ps_restore(struct ath_softc *sc)
134 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
135 enum ath9k_power_mode mode;
138 spin_lock_irqsave(&sc->sc_pm_lock, flags);
139 if (--sc->ps_usecount != 0)
143 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
147 if (sc->ps_enabled &&
148 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
150 PS_WAIT_FOR_PSPOLL_DATA |
153 mode = ATH9K_PM_NETWORK_SLEEP;
154 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
155 ath9k_btcoex_stop_gen_timer(sc);
160 spin_lock(&common->cc_lock);
161 ath_hw_cycle_counters_update(common);
162 spin_unlock(&common->cc_lock);
164 ath9k_hw_setpower(sc->sc_ah, mode);
167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
170 static void __ath_cancel_work(struct ath_softc *sc)
172 cancel_work_sync(&sc->paprd_work);
173 cancel_work_sync(&sc->hw_check_work);
174 cancel_delayed_work_sync(&sc->tx_complete_work);
175 cancel_delayed_work_sync(&sc->hw_pll_work);
177 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
178 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
179 cancel_work_sync(&sc->mci_work);
183 void ath_cancel_work(struct ath_softc *sc)
185 __ath_cancel_work(sc);
186 cancel_work_sync(&sc->hw_reset_work);
189 void ath_restart_work(struct ath_softc *sc)
191 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
193 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
194 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
195 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
197 ath_start_rx_poll(sc, 3);
201 static bool ath_prepare_reset(struct ath_softc *sc)
203 struct ath_hw *ah = sc->sc_ah;
206 ieee80211_stop_queues(sc->hw);
208 sc->hw_busy_count = 0;
210 del_timer_sync(&sc->rx_poll_timer);
212 ath9k_hw_disable_interrupts(ah);
214 if (!ath_drain_all_txq(sc))
217 if (!ath_stoprecv(sc))
223 static bool ath_complete_reset(struct ath_softc *sc, bool start)
225 struct ath_hw *ah = sc->sc_ah;
226 struct ath_common *common = ath9k_hw_common(ah);
230 if (ath_startrecv(sc) != 0) {
231 ath_err(common, "Unable to restart recv logic\n");
235 ath9k_cmn_update_txpow(ah, sc->curtxpow,
236 sc->config.txpowlimit, &sc->curtxpow);
238 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
239 ath9k_hw_set_interrupts(ah);
240 ath9k_hw_enable_interrupts(ah);
242 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
243 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
246 if (ah->opmode == NL80211_IFTYPE_STATION &&
247 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
248 spin_lock_irqsave(&sc->sc_pm_lock, flags);
249 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
250 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
252 ath9k_set_beacon(sc);
255 ath_restart_work(sc);
257 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
258 if (!ATH_TXQ_SETUP(sc, i))
261 spin_lock_bh(&sc->tx.txq[i].axq_lock);
262 ath_txq_schedule(sc, &sc->tx.txq[i]);
263 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
267 ieee80211_wake_queues(sc->hw);
272 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
274 struct ath_hw *ah = sc->sc_ah;
275 struct ath_common *common = ath9k_hw_common(ah);
276 struct ath9k_hw_cal_data *caldata = NULL;
280 __ath_cancel_work(sc);
282 tasklet_disable(&sc->intr_tq);
283 spin_lock_bh(&sc->sc_pcu_lock);
285 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
287 caldata = &sc->caldata;
295 if (!ath_prepare_reset(sc))
298 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
299 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
301 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
304 "Unable to reset channel, reset status %d\n", r);
306 ath9k_hw_enable_interrupts(ah);
307 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
312 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
313 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
314 ath9k_mci_set_txpower(sc, true, false);
316 if (!ath_complete_reset(sc, true))
320 spin_unlock_bh(&sc->sc_pcu_lock);
321 tasklet_enable(&sc->intr_tq);
328 * Set/change channels. If the channel is really being changed, it's done
329 * by reseting the chip. To accomplish this we must first cleanup any pending
330 * DMA, then restart stuff.
332 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
334 struct ath_hw *ah = sc->sc_ah;
335 struct ath_common *common = ath9k_hw_common(ah);
336 struct ieee80211_hw *hw = sc->hw;
337 struct ath9k_channel *hchan;
338 struct ieee80211_channel *chan = chandef->chan;
341 int pos = chan->hw_value;
345 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
348 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
351 old_pos = ah->curchan - &ah->channels[0];
353 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
354 chan->center_freq, chandef->width);
356 /* update survey stats for the old channel before switching */
357 spin_lock_irqsave(&common->cc_lock, flags);
358 ath_update_survey_stats(sc);
359 spin_unlock_irqrestore(&common->cc_lock, flags);
361 ath9k_cmn_get_channel(hw, ah, chandef);
364 * If the operating channel changes, change the survey in-use flags
366 * Reset the survey data for the new channel, unless we're switching
367 * back to the operating channel from an off-channel operation.
369 if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
371 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
373 sc->cur_survey = &sc->survey[pos];
375 memset(sc->cur_survey, 0, sizeof(struct survey_info));
376 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
377 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
378 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
381 hchan = &sc->sc_ah->channels[pos];
382 r = ath_reset_internal(sc, hchan);
387 * The most recent snapshot of channel->noisefloor for the old
388 * channel is only available after the hardware reset. Copy it to
389 * the survey stats now.
392 ath_update_survey_nf(sc, old_pos);
395 * Enable radar pulse detection if on a DFS channel. Spectral
396 * scanning and radar detection can not be used concurrently.
398 if (hw->conf.radar_enabled) {
401 /* set HW specific DFS configuration */
402 ath9k_hw_set_radar_params(ah);
403 rxfilter = ath9k_hw_getrxfilter(ah);
404 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
405 ATH9K_RX_FILTER_PHYERR;
406 ath9k_hw_setrxfilter(ah, rxfilter);
407 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
410 /* perform spectral scan if requested. */
411 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) &&
412 sc->spectral_mode == SPECTRAL_CHANSCAN)
413 ath9k_spectral_scan_trigger(hw);
419 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
420 struct ieee80211_vif *vif)
423 an = (struct ath_node *)sta->drv_priv;
429 ath_tx_node_init(sc, an);
431 if (sta->ht_cap.ht_supported) {
432 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
433 sta->ht_cap.ampdu_factor);
434 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
438 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
440 struct ath_node *an = (struct ath_node *)sta->drv_priv;
441 ath_tx_node_cleanup(sc, an);
444 void ath9k_tasklet(unsigned long data)
446 struct ath_softc *sc = (struct ath_softc *)data;
447 struct ath_hw *ah = sc->sc_ah;
448 struct ath_common *common = ath9k_hw_common(ah);
449 enum ath_reset_type type;
451 u32 status = sc->intrstatus;
455 spin_lock(&sc->sc_pcu_lock);
457 if ((status & ATH9K_INT_FATAL) ||
458 (status & ATH9K_INT_BB_WATCHDOG)) {
460 if (status & ATH9K_INT_FATAL)
461 type = RESET_TYPE_FATAL_INT;
463 type = RESET_TYPE_BB_WATCHDOG;
465 ath9k_queue_reset(sc, type);
468 * Increment the ref. counter here so that
469 * interrupts are enabled in the reset routine.
471 atomic_inc(&ah->intr_ref_cnt);
472 ath_dbg(common, ANY, "FATAL: Skipping interrupts\n");
476 spin_lock_irqsave(&sc->sc_pm_lock, flags);
477 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
479 * TSF sync does not look correct; remain awake to sync with
482 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
483 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
485 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
487 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
488 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
491 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
493 if (status & rxmask) {
494 /* Check for high priority Rx first */
495 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
496 (status & ATH9K_INT_RXHP))
497 ath_rx_tasklet(sc, 0, true);
499 ath_rx_tasklet(sc, 0, false);
502 if (status & ATH9K_INT_TX) {
503 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
504 ath_tx_edma_tasklet(sc);
509 ath9k_btcoex_handle_interrupt(sc, status);
511 /* re-enable hardware interrupt */
512 ath9k_hw_enable_interrupts(ah);
514 spin_unlock(&sc->sc_pcu_lock);
515 ath9k_ps_restore(sc);
518 irqreturn_t ath_isr(int irq, void *dev)
520 #define SCHED_INTR ( \
522 ATH9K_INT_BB_WATCHDOG | \
532 ATH9K_INT_GENTIMER | \
535 struct ath_softc *sc = dev;
536 struct ath_hw *ah = sc->sc_ah;
537 struct ath_common *common = ath9k_hw_common(ah);
538 enum ath9k_int status;
542 * The hardware is not ready/present, don't
543 * touch anything. Note this can happen early
544 * on if the IRQ is shared.
546 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
549 /* shared irq, not for us */
551 if (!ath9k_hw_intrpend(ah))
554 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
555 ath9k_hw_kill_interrupts(ah);
560 * Figure out the reason(s) for the interrupt. Note
561 * that the hal returns a pseudo-ISR that may include
562 * bits we haven't explicitly enabled so we mask the
563 * value to insure we only process bits we requested.
565 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
566 status &= ah->imask; /* discard unasked-for bits */
569 * If there are no status bits set, then this interrupt was not
570 * for me (should have been caught above).
575 /* Cache the status */
576 sc->intrstatus = status;
578 if (status & SCHED_INTR)
582 * If a FATAL or RXORN interrupt is received, we have to reset the
585 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
586 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
589 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
590 (status & ATH9K_INT_BB_WATCHDOG)) {
592 spin_lock(&common->cc_lock);
593 ath_hw_cycle_counters_update(common);
594 ar9003_hw_bb_watchdog_dbg_info(ah);
595 spin_unlock(&common->cc_lock);
600 #ifdef CONFIG_ATH9K_WOW
601 if (status & ATH9K_INT_BMISS) {
602 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
603 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
604 atomic_inc(&sc->wow_got_bmiss_intr);
605 atomic_dec(&sc->wow_sleep_proc_intr);
611 if (status & ATH9K_INT_SWBA)
612 tasklet_schedule(&sc->bcon_tasklet);
614 if (status & ATH9K_INT_TXURN)
615 ath9k_hw_updatetxtriglevel(ah, true);
617 if (status & ATH9K_INT_RXEOL) {
618 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
619 ath9k_hw_set_interrupts(ah);
622 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
623 if (status & ATH9K_INT_TIM_TIMER) {
624 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
626 /* Clear RxAbort bit so that we can
628 ath9k_setpower(sc, ATH9K_PM_AWAKE);
629 spin_lock(&sc->sc_pm_lock);
630 ath9k_hw_setrxabort(sc->sc_ah, 0);
631 sc->ps_flags |= PS_WAIT_FOR_BEACON;
632 spin_unlock(&sc->sc_pm_lock);
637 ath_debug_stat_interrupt(sc, status);
640 /* turn off every interrupt */
641 ath9k_hw_disable_interrupts(ah);
642 tasklet_schedule(&sc->intr_tq);
650 int ath_reset(struct ath_softc *sc)
655 r = ath_reset_internal(sc, NULL);
656 ath9k_ps_restore(sc);
661 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
663 #ifdef CONFIG_ATH9K_DEBUGFS
664 RESET_STAT_INC(sc, type);
666 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
667 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
670 void ath_reset_work(struct work_struct *work)
672 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
677 /**********************/
678 /* mac80211 callbacks */
679 /**********************/
681 static int ath9k_start(struct ieee80211_hw *hw)
683 struct ath_softc *sc = hw->priv;
684 struct ath_hw *ah = sc->sc_ah;
685 struct ath_common *common = ath9k_hw_common(ah);
686 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
687 struct ath9k_channel *init_channel;
690 ath_dbg(common, CONFIG,
691 "Starting driver with initial channel: %d MHz\n",
692 curchan->center_freq);
695 mutex_lock(&sc->mutex);
697 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
699 /* Reset SERDES registers */
700 ath9k_hw_configpcipowersave(ah, false);
703 * The basic interface to setting the hardware in a good
704 * state is ``reset''. On return the hardware is known to
705 * be powered up and with interrupts disabled. This must
706 * be followed by initialization of the appropriate bits
707 * and then setup of the interrupt mask.
709 spin_lock_bh(&sc->sc_pcu_lock);
711 atomic_set(&ah->intr_ref_cnt, -1);
713 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
716 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
717 r, curchan->center_freq);
718 ah->reset_power_on = false;
721 /* Setup our intr mask. */
722 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
723 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
726 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
727 ah->imask |= ATH9K_INT_RXHP |
729 ATH9K_INT_BB_WATCHDOG;
731 ah->imask |= ATH9K_INT_RX;
733 ah->imask |= ATH9K_INT_GTT;
735 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
736 ah->imask |= ATH9K_INT_CST;
740 clear_bit(SC_OP_INVALID, &sc->sc_flags);
741 sc->sc_ah->is_monitoring = false;
743 if (!ath_complete_reset(sc, false))
744 ah->reset_power_on = false;
746 if (ah->led_pin >= 0) {
747 ath9k_hw_cfg_output(ah, ah->led_pin,
748 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
749 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
753 * Reset key cache to sane defaults (all entries cleared) instead of
754 * semi-random values after suspend/resume.
756 ath9k_cmn_init_crypto(sc->sc_ah);
758 spin_unlock_bh(&sc->sc_pcu_lock);
760 mutex_unlock(&sc->mutex);
762 ath9k_ps_restore(sc);
767 static void ath9k_tx(struct ieee80211_hw *hw,
768 struct ieee80211_tx_control *control,
771 struct ath_softc *sc = hw->priv;
772 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
773 struct ath_tx_control txctl;
774 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
777 if (sc->ps_enabled) {
779 * mac80211 does not set PM field for normal data frames, so we
780 * need to update that based on the current PS mode.
782 if (ieee80211_is_data(hdr->frame_control) &&
783 !ieee80211_is_nullfunc(hdr->frame_control) &&
784 !ieee80211_has_pm(hdr->frame_control)) {
786 "Add PM=1 for a TX frame while in PS mode\n");
787 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
791 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
793 * We are using PS-Poll and mac80211 can request TX while in
794 * power save mode. Need to wake up hardware for the TX to be
795 * completed and if needed, also for RX of buffered frames.
798 spin_lock_irqsave(&sc->sc_pm_lock, flags);
799 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
800 ath9k_hw_setrxabort(sc->sc_ah, 0);
801 if (ieee80211_is_pspoll(hdr->frame_control)) {
803 "Sending PS-Poll to pick a buffered frame\n");
804 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
806 ath_dbg(common, PS, "Wake up to complete TX\n");
807 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
810 * The actual restore operation will happen only after
811 * the ps_flags bit is cleared. We are just dropping
812 * the ps_usecount here.
814 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
815 ath9k_ps_restore(sc);
819 * Cannot tx while the hardware is in full sleep, it first needs a full
820 * chip reset to recover from that
822 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
823 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
827 memset(&txctl, 0, sizeof(struct ath_tx_control));
828 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
829 txctl.sta = control->sta;
831 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
833 if (ath_tx_start(hw, skb, &txctl) != 0) {
834 ath_dbg(common, XMIT, "TX failed\n");
835 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
841 ieee80211_free_txskb(hw, skb);
844 static void ath9k_stop(struct ieee80211_hw *hw)
846 struct ath_softc *sc = hw->priv;
847 struct ath_hw *ah = sc->sc_ah;
848 struct ath_common *common = ath9k_hw_common(ah);
851 mutex_lock(&sc->mutex);
854 del_timer_sync(&sc->rx_poll_timer);
856 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
857 ath_dbg(common, ANY, "Device not present\n");
858 mutex_unlock(&sc->mutex);
862 /* Ensure HW is awake when we try to shut it down. */
865 spin_lock_bh(&sc->sc_pcu_lock);
867 /* prevent tasklets to enable interrupts once we disable them */
868 ah->imask &= ~ATH9K_INT_GLOBAL;
870 /* make sure h/w will not generate any interrupt
871 * before setting the invalid flag. */
872 ath9k_hw_disable_interrupts(ah);
874 spin_unlock_bh(&sc->sc_pcu_lock);
876 /* we can now sync irq and kill any running tasklets, since we already
877 * disabled interrupts and not holding a spin lock */
878 synchronize_irq(sc->irq);
879 tasklet_kill(&sc->intr_tq);
880 tasklet_kill(&sc->bcon_tasklet);
882 prev_idle = sc->ps_idle;
885 spin_lock_bh(&sc->sc_pcu_lock);
887 if (ah->led_pin >= 0) {
888 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
889 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
892 ath_prepare_reset(sc);
895 dev_kfree_skb_any(sc->rx.frag);
900 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
902 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
903 ath9k_hw_phy_disable(ah);
905 ath9k_hw_configpcipowersave(ah, true);
907 spin_unlock_bh(&sc->sc_pcu_lock);
909 ath9k_ps_restore(sc);
911 set_bit(SC_OP_INVALID, &sc->sc_flags);
912 sc->ps_idle = prev_idle;
914 mutex_unlock(&sc->mutex);
916 ath_dbg(common, CONFIG, "Driver halt\n");
919 static bool ath9k_uses_beacons(int type)
922 case NL80211_IFTYPE_AP:
923 case NL80211_IFTYPE_ADHOC:
924 case NL80211_IFTYPE_MESH_POINT:
931 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
933 struct ath9k_vif_iter_data *iter_data = data;
936 if (iter_data->has_hw_macaddr) {
937 for (i = 0; i < ETH_ALEN; i++)
938 iter_data->mask[i] &=
939 ~(iter_data->hw_macaddr[i] ^ mac[i]);
941 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
942 iter_data->has_hw_macaddr = true;
946 case NL80211_IFTYPE_AP:
949 case NL80211_IFTYPE_STATION:
950 iter_data->nstations++;
952 case NL80211_IFTYPE_ADHOC:
953 iter_data->nadhocs++;
955 case NL80211_IFTYPE_MESH_POINT:
956 iter_data->nmeshes++;
958 case NL80211_IFTYPE_WDS:
966 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
968 struct ath_softc *sc = data;
969 struct ath_vif *avp = (void *)vif->drv_priv;
971 if (vif->type != NL80211_IFTYPE_STATION)
974 if (avp->primary_sta_vif)
975 ath9k_set_assoc_state(sc, vif);
978 /* Called with sc->mutex held. */
979 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
980 struct ieee80211_vif *vif,
981 struct ath9k_vif_iter_data *iter_data)
983 struct ath_softc *sc = hw->priv;
984 struct ath_hw *ah = sc->sc_ah;
985 struct ath_common *common = ath9k_hw_common(ah);
988 * Use the hardware MAC address as reference, the hardware uses it
989 * together with the BSSID mask when matching addresses.
991 memset(iter_data, 0, sizeof(*iter_data));
992 memset(&iter_data->mask, 0xff, ETH_ALEN);
995 ath9k_vif_iter(iter_data, vif->addr, vif);
997 /* Get list of all active MAC addresses */
998 ieee80211_iterate_active_interfaces_atomic(
999 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1000 ath9k_vif_iter, iter_data);
1002 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
1005 /* Called with sc->mutex held. */
1006 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1007 struct ieee80211_vif *vif)
1009 struct ath_softc *sc = hw->priv;
1010 struct ath_hw *ah = sc->sc_ah;
1011 struct ath_common *common = ath9k_hw_common(ah);
1012 struct ath9k_vif_iter_data iter_data;
1013 enum nl80211_iftype old_opmode = ah->opmode;
1015 ath9k_calculate_iter_data(hw, vif, &iter_data);
1017 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1018 ath_hw_setbssidmask(common);
1020 if (iter_data.naps > 0) {
1021 ath9k_hw_set_tsfadjust(ah, true);
1022 ah->opmode = NL80211_IFTYPE_AP;
1024 ath9k_hw_set_tsfadjust(ah, false);
1026 if (iter_data.nmeshes)
1027 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1028 else if (iter_data.nwds)
1029 ah->opmode = NL80211_IFTYPE_AP;
1030 else if (iter_data.nadhocs)
1031 ah->opmode = NL80211_IFTYPE_ADHOC;
1033 ah->opmode = NL80211_IFTYPE_STATION;
1036 ath9k_hw_setopmode(ah);
1038 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1039 ah->imask |= ATH9K_INT_TSFOOR;
1041 ah->imask &= ~ATH9K_INT_TSFOOR;
1043 ath9k_hw_set_interrupts(ah);
1046 * If we are changing the opmode to STATION,
1047 * a beacon sync needs to be done.
1049 if (ah->opmode == NL80211_IFTYPE_STATION &&
1050 old_opmode == NL80211_IFTYPE_AP &&
1051 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1052 ieee80211_iterate_active_interfaces_atomic(
1053 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1054 ath9k_sta_vif_iter, sc);
1058 static int ath9k_add_interface(struct ieee80211_hw *hw,
1059 struct ieee80211_vif *vif)
1061 struct ath_softc *sc = hw->priv;
1062 struct ath_hw *ah = sc->sc_ah;
1063 struct ath_common *common = ath9k_hw_common(ah);
1064 struct ath_vif *avp = (void *)vif->drv_priv;
1065 struct ath_node *an = &avp->mcast_node;
1067 mutex_lock(&sc->mutex);
1069 if (config_enabled(CONFIG_ATH9K_TX99)) {
1070 if (sc->nvifs >= 1) {
1071 mutex_unlock(&sc->mutex);
1077 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1080 ath9k_ps_wakeup(sc);
1081 ath9k_calculate_summary_state(hw, vif);
1082 ath9k_ps_restore(sc);
1084 if (ath9k_uses_beacons(vif->type))
1085 ath9k_beacon_assign_slot(sc, vif);
1090 an->no_ps_filter = true;
1091 ath_tx_node_init(sc, an);
1093 mutex_unlock(&sc->mutex);
1097 static int ath9k_change_interface(struct ieee80211_hw *hw,
1098 struct ieee80211_vif *vif,
1099 enum nl80211_iftype new_type,
1102 struct ath_softc *sc = hw->priv;
1103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1105 mutex_lock(&sc->mutex);
1107 if (config_enabled(CONFIG_ATH9K_TX99)) {
1108 mutex_unlock(&sc->mutex);
1112 ath_dbg(common, CONFIG, "Change Interface\n");
1114 if (ath9k_uses_beacons(vif->type))
1115 ath9k_beacon_remove_slot(sc, vif);
1117 vif->type = new_type;
1120 ath9k_ps_wakeup(sc);
1121 ath9k_calculate_summary_state(hw, vif);
1122 ath9k_ps_restore(sc);
1124 if (ath9k_uses_beacons(vif->type))
1125 ath9k_beacon_assign_slot(sc, vif);
1127 mutex_unlock(&sc->mutex);
1131 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1132 struct ieee80211_vif *vif)
1134 struct ath_softc *sc = hw->priv;
1135 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1136 struct ath_vif *avp = (void *)vif->drv_priv;
1138 ath_dbg(common, CONFIG, "Detach Interface\n");
1140 mutex_lock(&sc->mutex);
1143 sc->tx99_vif = NULL;
1145 if (ath9k_uses_beacons(vif->type))
1146 ath9k_beacon_remove_slot(sc, vif);
1148 if (sc->csa_vif == vif)
1151 ath9k_ps_wakeup(sc);
1152 ath9k_calculate_summary_state(hw, NULL);
1153 ath9k_ps_restore(sc);
1155 ath_tx_node_cleanup(sc, &avp->mcast_node);
1157 mutex_unlock(&sc->mutex);
1160 static void ath9k_enable_ps(struct ath_softc *sc)
1162 struct ath_hw *ah = sc->sc_ah;
1163 struct ath_common *common = ath9k_hw_common(ah);
1165 if (config_enabled(CONFIG_ATH9K_TX99))
1168 sc->ps_enabled = true;
1169 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1170 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1171 ah->imask |= ATH9K_INT_TIM_TIMER;
1172 ath9k_hw_set_interrupts(ah);
1174 ath9k_hw_setrxabort(ah, 1);
1176 ath_dbg(common, PS, "PowerSave enabled\n");
1179 static void ath9k_disable_ps(struct ath_softc *sc)
1181 struct ath_hw *ah = sc->sc_ah;
1182 struct ath_common *common = ath9k_hw_common(ah);
1184 if (config_enabled(CONFIG_ATH9K_TX99))
1187 sc->ps_enabled = false;
1188 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1189 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1190 ath9k_hw_setrxabort(ah, 0);
1191 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1193 PS_WAIT_FOR_PSPOLL_DATA |
1194 PS_WAIT_FOR_TX_ACK);
1195 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1196 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1197 ath9k_hw_set_interrupts(ah);
1200 ath_dbg(common, PS, "PowerSave disabled\n");
1203 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1205 struct ath_softc *sc = hw->priv;
1206 struct ath_hw *ah = sc->sc_ah;
1207 struct ath_common *common = ath9k_hw_common(ah);
1210 if (config_enabled(CONFIG_ATH9K_TX99))
1213 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1214 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1218 ath9k_ps_wakeup(sc);
1219 rxfilter = ath9k_hw_getrxfilter(ah);
1220 ath9k_hw_setrxfilter(ah, rxfilter |
1221 ATH9K_RX_FILTER_PHYRADAR |
1222 ATH9K_RX_FILTER_PHYERR);
1224 /* TODO: usually this should not be neccesary, but for some reason
1225 * (or in some mode?) the trigger must be called after the
1226 * configuration, otherwise the register will have its values reset
1227 * (on my ar9220 to value 0x01002310)
1229 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1230 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1231 ath9k_ps_restore(sc);
1234 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1235 enum spectral_mode spectral_mode)
1237 struct ath_softc *sc = hw->priv;
1238 struct ath_hw *ah = sc->sc_ah;
1239 struct ath_common *common = ath9k_hw_common(ah);
1241 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1242 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1246 switch (spectral_mode) {
1247 case SPECTRAL_DISABLED:
1248 sc->spec_config.enabled = 0;
1250 case SPECTRAL_BACKGROUND:
1251 /* send endless samples.
1252 * TODO: is this really useful for "background"?
1254 sc->spec_config.endless = 1;
1255 sc->spec_config.enabled = 1;
1257 case SPECTRAL_CHANSCAN:
1258 case SPECTRAL_MANUAL:
1259 sc->spec_config.endless = 0;
1260 sc->spec_config.enabled = 1;
1266 ath9k_ps_wakeup(sc);
1267 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1268 ath9k_ps_restore(sc);
1270 sc->spectral_mode = spectral_mode;
1275 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1277 struct ath_softc *sc = hw->priv;
1278 struct ath_hw *ah = sc->sc_ah;
1279 struct ath_common *common = ath9k_hw_common(ah);
1280 struct ieee80211_conf *conf = &hw->conf;
1281 bool reset_channel = false;
1283 ath9k_ps_wakeup(sc);
1284 mutex_lock(&sc->mutex);
1286 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1287 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1289 ath_cancel_work(sc);
1290 ath9k_stop_btcoex(sc);
1292 ath9k_start_btcoex(sc);
1294 * The chip needs a reset to properly wake up from
1297 reset_channel = ah->chip_fullsleep;
1302 * We just prepare to enable PS. We have to wait until our AP has
1303 * ACK'd our null data frame to disable RX otherwise we'll ignore
1304 * those ACKs and end up retransmitting the same null data frames.
1305 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1307 if (changed & IEEE80211_CONF_CHANGE_PS) {
1308 unsigned long flags;
1309 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1310 if (conf->flags & IEEE80211_CONF_PS)
1311 ath9k_enable_ps(sc);
1313 ath9k_disable_ps(sc);
1314 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1317 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1318 if (conf->flags & IEEE80211_CONF_MONITOR) {
1319 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1320 sc->sc_ah->is_monitoring = true;
1322 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1323 sc->sc_ah->is_monitoring = false;
1327 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1328 if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
1329 ath_err(common, "Unable to set channel\n");
1330 mutex_unlock(&sc->mutex);
1331 ath9k_ps_restore(sc);
1336 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1337 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1338 sc->config.txpowlimit = 2 * conf->power_level;
1339 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1340 sc->config.txpowlimit, &sc->curtxpow);
1343 mutex_unlock(&sc->mutex);
1344 ath9k_ps_restore(sc);
1349 #define SUPPORTED_FILTERS \
1350 (FIF_PROMISC_IN_BSS | \
1355 FIF_BCN_PRBRESP_PROMISC | \
1359 /* FIXME: sc->sc_full_reset ? */
1360 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1361 unsigned int changed_flags,
1362 unsigned int *total_flags,
1365 struct ath_softc *sc = hw->priv;
1368 changed_flags &= SUPPORTED_FILTERS;
1369 *total_flags &= SUPPORTED_FILTERS;
1371 sc->rx.rxfilter = *total_flags;
1372 ath9k_ps_wakeup(sc);
1373 rfilt = ath_calcrxfilter(sc);
1374 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1375 ath9k_ps_restore(sc);
1377 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1381 static int ath9k_sta_add(struct ieee80211_hw *hw,
1382 struct ieee80211_vif *vif,
1383 struct ieee80211_sta *sta)
1385 struct ath_softc *sc = hw->priv;
1386 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1387 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1388 struct ieee80211_key_conf ps_key = { };
1391 ath_node_attach(sc, sta, vif);
1393 if (vif->type != NL80211_IFTYPE_AP &&
1394 vif->type != NL80211_IFTYPE_AP_VLAN)
1397 key = ath_key_config(common, vif, sta, &ps_key);
1404 static void ath9k_del_ps_key(struct ath_softc *sc,
1405 struct ieee80211_vif *vif,
1406 struct ieee80211_sta *sta)
1408 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1409 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1410 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1415 ath_key_delete(common, &ps_key);
1419 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1420 struct ieee80211_vif *vif,
1421 struct ieee80211_sta *sta)
1423 struct ath_softc *sc = hw->priv;
1425 ath9k_del_ps_key(sc, vif, sta);
1426 ath_node_detach(sc, sta);
1431 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1432 struct ieee80211_vif *vif,
1433 enum sta_notify_cmd cmd,
1434 struct ieee80211_sta *sta)
1436 struct ath_softc *sc = hw->priv;
1437 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1440 case STA_NOTIFY_SLEEP:
1441 an->sleeping = true;
1442 ath_tx_aggr_sleep(sta, sc, an);
1444 case STA_NOTIFY_AWAKE:
1445 an->sleeping = false;
1446 ath_tx_aggr_wakeup(sc, an);
1451 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1452 struct ieee80211_vif *vif, u16 queue,
1453 const struct ieee80211_tx_queue_params *params)
1455 struct ath_softc *sc = hw->priv;
1456 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1457 struct ath_txq *txq;
1458 struct ath9k_tx_queue_info qi;
1461 if (queue >= IEEE80211_NUM_ACS)
1464 txq = sc->tx.txq_map[queue];
1466 ath9k_ps_wakeup(sc);
1467 mutex_lock(&sc->mutex);
1469 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1471 qi.tqi_aifs = params->aifs;
1472 qi.tqi_cwmin = params->cw_min;
1473 qi.tqi_cwmax = params->cw_max;
1474 qi.tqi_burstTime = params->txop * 32;
1476 ath_dbg(common, CONFIG,
1477 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1478 queue, txq->axq_qnum, params->aifs, params->cw_min,
1479 params->cw_max, params->txop);
1481 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1482 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1484 ath_err(common, "TXQ Update failed\n");
1486 mutex_unlock(&sc->mutex);
1487 ath9k_ps_restore(sc);
1492 static int ath9k_set_key(struct ieee80211_hw *hw,
1493 enum set_key_cmd cmd,
1494 struct ieee80211_vif *vif,
1495 struct ieee80211_sta *sta,
1496 struct ieee80211_key_conf *key)
1498 struct ath_softc *sc = hw->priv;
1499 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1502 if (ath9k_modparam_nohwcrypt)
1505 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1506 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1507 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1508 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1509 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1511 * For now, disable hw crypto for the RSN IBSS group keys. This
1512 * could be optimized in the future to use a modified key cache
1513 * design to support per-STA RX GTK, but until that gets
1514 * implemented, use of software crypto for group addressed
1515 * frames is a acceptable to allow RSN IBSS to be used.
1520 mutex_lock(&sc->mutex);
1521 ath9k_ps_wakeup(sc);
1522 ath_dbg(common, CONFIG, "Set HW Key\n");
1527 ath9k_del_ps_key(sc, vif, sta);
1529 ret = ath_key_config(common, vif, sta, key);
1531 key->hw_key_idx = ret;
1532 /* push IV and Michael MIC generation to stack */
1533 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1534 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1535 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1536 if (sc->sc_ah->sw_mgmt_crypto &&
1537 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1538 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1543 ath_key_delete(common, key);
1549 ath9k_ps_restore(sc);
1550 mutex_unlock(&sc->mutex);
1555 static void ath9k_set_assoc_state(struct ath_softc *sc,
1556 struct ieee80211_vif *vif)
1558 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1559 struct ath_vif *avp = (void *)vif->drv_priv;
1560 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1561 unsigned long flags;
1563 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1564 avp->primary_sta_vif = true;
1567 * Set the AID, BSSID and do beacon-sync only when
1568 * the HW opmode is STATION.
1570 * But the primary bit is set above in any case.
1572 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1575 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1576 common->curaid = bss_conf->aid;
1577 ath9k_hw_write_associd(sc->sc_ah);
1579 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1580 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1582 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1583 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1584 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1586 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1587 ath9k_mci_update_wlan_channels(sc, false);
1589 ath_dbg(common, CONFIG,
1590 "Primary Station interface: %pM, BSSID: %pM\n",
1591 vif->addr, common->curbssid);
1594 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1596 struct ath_softc *sc = data;
1597 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1599 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1602 if (bss_conf->assoc)
1603 ath9k_set_assoc_state(sc, vif);
1606 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1607 struct ieee80211_vif *vif,
1608 struct ieee80211_bss_conf *bss_conf,
1612 (BSS_CHANGED_ASSOC | \
1613 BSS_CHANGED_IBSS | \
1614 BSS_CHANGED_BEACON_ENABLED)
1616 struct ath_softc *sc = hw->priv;
1617 struct ath_hw *ah = sc->sc_ah;
1618 struct ath_common *common = ath9k_hw_common(ah);
1619 struct ath_vif *avp = (void *)vif->drv_priv;
1622 ath9k_ps_wakeup(sc);
1623 mutex_lock(&sc->mutex);
1625 if (changed & BSS_CHANGED_ASSOC) {
1626 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1627 bss_conf->bssid, bss_conf->assoc);
1629 if (avp->primary_sta_vif && !bss_conf->assoc) {
1630 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1631 avp->primary_sta_vif = false;
1633 if (ah->opmode == NL80211_IFTYPE_STATION)
1634 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1637 ieee80211_iterate_active_interfaces_atomic(
1638 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1639 ath9k_bss_assoc_iter, sc);
1641 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
1642 ah->opmode == NL80211_IFTYPE_STATION) {
1643 memset(common->curbssid, 0, ETH_ALEN);
1645 ath9k_hw_write_associd(sc->sc_ah);
1646 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1647 ath9k_mci_update_wlan_channels(sc, true);
1651 if (changed & BSS_CHANGED_IBSS) {
1652 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1653 common->curaid = bss_conf->aid;
1654 ath9k_hw_write_associd(sc->sc_ah);
1657 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1658 (changed & BSS_CHANGED_BEACON_INT)) {
1659 if (ah->opmode == NL80211_IFTYPE_AP &&
1660 bss_conf->enable_beacon)
1661 ath9k_set_tsfadjust(sc, vif);
1662 if (ath9k_allow_beacon_config(sc, vif))
1663 ath9k_beacon_config(sc, vif, changed);
1666 if (changed & BSS_CHANGED_ERP_SLOT) {
1667 if (bss_conf->use_short_slot)
1671 if (vif->type == NL80211_IFTYPE_AP) {
1673 * Defer update, so that connected stations can adjust
1674 * their settings at the same time.
1675 * See beacon.c for more details
1677 sc->beacon.slottime = slottime;
1678 sc->beacon.updateslot = UPDATE;
1680 ah->slottime = slottime;
1681 ath9k_hw_init_global_settings(ah);
1685 if (changed & CHECK_ANI)
1688 mutex_unlock(&sc->mutex);
1689 ath9k_ps_restore(sc);
1694 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1696 struct ath_softc *sc = hw->priv;
1699 mutex_lock(&sc->mutex);
1700 ath9k_ps_wakeup(sc);
1701 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1702 ath9k_ps_restore(sc);
1703 mutex_unlock(&sc->mutex);
1708 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1709 struct ieee80211_vif *vif,
1712 struct ath_softc *sc = hw->priv;
1714 mutex_lock(&sc->mutex);
1715 ath9k_ps_wakeup(sc);
1716 ath9k_hw_settsf64(sc->sc_ah, tsf);
1717 ath9k_ps_restore(sc);
1718 mutex_unlock(&sc->mutex);
1721 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1723 struct ath_softc *sc = hw->priv;
1725 mutex_lock(&sc->mutex);
1727 ath9k_ps_wakeup(sc);
1728 ath9k_hw_reset_tsf(sc->sc_ah);
1729 ath9k_ps_restore(sc);
1731 mutex_unlock(&sc->mutex);
1734 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1735 struct ieee80211_vif *vif,
1736 enum ieee80211_ampdu_mlme_action action,
1737 struct ieee80211_sta *sta,
1738 u16 tid, u16 *ssn, u8 buf_size)
1740 struct ath_softc *sc = hw->priv;
1744 mutex_lock(&sc->mutex);
1747 case IEEE80211_AMPDU_RX_START:
1749 case IEEE80211_AMPDU_RX_STOP:
1751 case IEEE80211_AMPDU_TX_START:
1752 ath9k_ps_wakeup(sc);
1753 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1755 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1756 ath9k_ps_restore(sc);
1758 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1759 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1761 case IEEE80211_AMPDU_TX_STOP_CONT:
1762 ath9k_ps_wakeup(sc);
1763 ath_tx_aggr_stop(sc, sta, tid);
1765 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1766 ath9k_ps_restore(sc);
1768 case IEEE80211_AMPDU_TX_OPERATIONAL:
1769 ath9k_ps_wakeup(sc);
1770 ath_tx_aggr_resume(sc, sta, tid);
1771 ath9k_ps_restore(sc);
1774 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1777 mutex_unlock(&sc->mutex);
1782 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1783 struct survey_info *survey)
1785 struct ath_softc *sc = hw->priv;
1786 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1787 struct ieee80211_supported_band *sband;
1788 struct ieee80211_channel *chan;
1789 unsigned long flags;
1792 if (config_enabled(CONFIG_ATH9K_TX99))
1795 spin_lock_irqsave(&common->cc_lock, flags);
1797 ath_update_survey_stats(sc);
1799 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1800 if (sband && idx >= sband->n_channels) {
1801 idx -= sband->n_channels;
1806 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1808 if (!sband || idx >= sband->n_channels) {
1809 spin_unlock_irqrestore(&common->cc_lock, flags);
1813 chan = &sband->channels[idx];
1814 pos = chan->hw_value;
1815 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1816 survey->channel = chan;
1817 spin_unlock_irqrestore(&common->cc_lock, flags);
1822 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1824 struct ath_softc *sc = hw->priv;
1825 struct ath_hw *ah = sc->sc_ah;
1827 if (config_enabled(CONFIG_ATH9K_TX99))
1830 mutex_lock(&sc->mutex);
1831 ah->coverage_class = coverage_class;
1833 ath9k_ps_wakeup(sc);
1834 ath9k_hw_init_global_settings(ah);
1835 ath9k_ps_restore(sc);
1837 mutex_unlock(&sc->mutex);
1840 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1842 struct ath_softc *sc = hw->priv;
1843 struct ath_hw *ah = sc->sc_ah;
1844 struct ath_common *common = ath9k_hw_common(ah);
1845 int timeout = 200; /* ms */
1849 mutex_lock(&sc->mutex);
1850 cancel_delayed_work_sync(&sc->tx_complete_work);
1852 if (ah->ah_flags & AH_UNPLUGGED) {
1853 ath_dbg(common, ANY, "Device has been unplugged!\n");
1854 mutex_unlock(&sc->mutex);
1858 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1859 ath_dbg(common, ANY, "Device not present\n");
1860 mutex_unlock(&sc->mutex);
1864 for (j = 0; j < timeout; j++) {
1868 usleep_range(1000, 2000);
1870 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1871 if (!ATH_TXQ_SETUP(sc, i))
1874 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1885 ath9k_ps_wakeup(sc);
1886 spin_lock_bh(&sc->sc_pcu_lock);
1887 drain_txq = ath_drain_all_txq(sc);
1888 spin_unlock_bh(&sc->sc_pcu_lock);
1893 ath9k_ps_restore(sc);
1894 ieee80211_wake_queues(hw);
1897 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1898 mutex_unlock(&sc->mutex);
1901 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1903 struct ath_softc *sc = hw->priv;
1906 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1907 if (!ATH_TXQ_SETUP(sc, i))
1910 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1916 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1918 struct ath_softc *sc = hw->priv;
1919 struct ath_hw *ah = sc->sc_ah;
1920 struct ieee80211_vif *vif;
1921 struct ath_vif *avp;
1923 struct ath_tx_status ts;
1924 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1927 vif = sc->beacon.bslot[0];
1931 if (!vif->bss_conf.enable_beacon)
1934 avp = (void *)vif->drv_priv;
1936 if (!sc->beacon.tx_processed && !edma) {
1937 tasklet_disable(&sc->bcon_tasklet);
1940 if (!bf || !bf->bf_mpdu)
1943 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1944 if (status == -EINPROGRESS)
1947 sc->beacon.tx_processed = true;
1948 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1951 tasklet_enable(&sc->bcon_tasklet);
1954 return sc->beacon.tx_last;
1957 static int ath9k_get_stats(struct ieee80211_hw *hw,
1958 struct ieee80211_low_level_stats *stats)
1960 struct ath_softc *sc = hw->priv;
1961 struct ath_hw *ah = sc->sc_ah;
1962 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1964 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1965 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1966 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1967 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1971 static u32 fill_chainmask(u32 cap, u32 new)
1976 for (i = 0; cap && new; i++, cap >>= 1) {
1977 if (!(cap & BIT(0)))
1989 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1991 if (AR_SREV_9300_20_OR_LATER(ah))
1994 switch (val & 0x7) {
2000 return (ah->caps.rx_chainmask == 1);
2006 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2008 struct ath_softc *sc = hw->priv;
2009 struct ath_hw *ah = sc->sc_ah;
2011 if (ah->caps.rx_chainmask != 1)
2014 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2017 sc->ant_rx = rx_ant;
2018 sc->ant_tx = tx_ant;
2020 if (ah->caps.rx_chainmask == 1)
2023 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2024 if (AR_SREV_9100(ah))
2025 ah->rxchainmask = 0x7;
2027 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2029 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2030 ath9k_reload_chainmask_settings(sc);
2035 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2037 struct ath_softc *sc = hw->priv;
2039 *tx_ant = sc->ant_tx;
2040 *rx_ant = sc->ant_rx;
2044 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2046 struct ath_softc *sc = hw->priv;
2047 set_bit(SC_OP_SCANNING, &sc->sc_flags);
2050 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2052 struct ath_softc *sc = hw->priv;
2053 clear_bit(SC_OP_SCANNING, &sc->sc_flags);
2056 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2057 struct ieee80211_vif *vif,
2058 struct cfg80211_chan_def *chandef)
2060 struct ath_softc *sc = hw->priv;
2062 /* mac80211 does not support CSA in multi-if cases (yet) */
2063 if (WARN_ON(sc->csa_vif))
2069 struct ieee80211_ops ath9k_ops = {
2071 .start = ath9k_start,
2073 .add_interface = ath9k_add_interface,
2074 .change_interface = ath9k_change_interface,
2075 .remove_interface = ath9k_remove_interface,
2076 .config = ath9k_config,
2077 .configure_filter = ath9k_configure_filter,
2078 .sta_add = ath9k_sta_add,
2079 .sta_remove = ath9k_sta_remove,
2080 .sta_notify = ath9k_sta_notify,
2081 .conf_tx = ath9k_conf_tx,
2082 .bss_info_changed = ath9k_bss_info_changed,
2083 .set_key = ath9k_set_key,
2084 .get_tsf = ath9k_get_tsf,
2085 .set_tsf = ath9k_set_tsf,
2086 .reset_tsf = ath9k_reset_tsf,
2087 .ampdu_action = ath9k_ampdu_action,
2088 .get_survey = ath9k_get_survey,
2089 .rfkill_poll = ath9k_rfkill_poll_state,
2090 .set_coverage_class = ath9k_set_coverage_class,
2091 .flush = ath9k_flush,
2092 .tx_frames_pending = ath9k_tx_frames_pending,
2093 .tx_last_beacon = ath9k_tx_last_beacon,
2094 .release_buffered_frames = ath9k_release_buffered_frames,
2095 .get_stats = ath9k_get_stats,
2096 .set_antenna = ath9k_set_antenna,
2097 .get_antenna = ath9k_get_antenna,
2099 #ifdef CONFIG_ATH9K_WOW
2100 .suspend = ath9k_suspend,
2101 .resume = ath9k_resume,
2102 .set_wakeup = ath9k_set_wakeup,
2105 #ifdef CONFIG_ATH9K_DEBUGFS
2106 .get_et_sset_count = ath9k_get_et_sset_count,
2107 .get_et_stats = ath9k_get_et_stats,
2108 .get_et_strings = ath9k_get_et_strings,
2111 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2112 .sta_add_debugfs = ath9k_sta_add_debugfs,
2114 .sw_scan_start = ath9k_sw_scan_start,
2115 .sw_scan_complete = ath9k_sw_scan_complete,
2116 .channel_switch_beacon = ath9k_channel_switch_beacon,