2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
33 struct ath_rate_table;
35 extern struct ieee80211_ops ath9k_ops;
36 extern int ath9k_modparam_nohwcrypt;
38 extern bool is_ath9k_unloaded;
44 /*************************/
45 /* Descriptor Management */
46 /*************************/
48 #define ATH_TXSTATUS_RING_SIZE 512
50 /* Macro to expand scalars to 64-bit objects */
51 #define ito64(x) (sizeof(x) == 1) ? \
52 (((unsigned long long int)(x)) & (0xff)) : \
54 (((unsigned long long int)(x)) & 0xffff) : \
56 (((unsigned long long int)(x)) & 0xffffffff) : \
57 (unsigned long long int)(x))
59 #define ATH_TXBUF_RESET(_bf) do { \
60 (_bf)->bf_lastbf = NULL; \
61 (_bf)->bf_next = NULL; \
62 memset(&((_bf)->bf_state), 0, \
63 sizeof(struct ath_buf_state)); \
66 #define DS2PHYS(_dd, _ds) \
67 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
68 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
69 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
73 dma_addr_t dd_desc_paddr;
77 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
78 struct list_head *head, const char *name,
79 int nbuf, int ndesc, bool is_tx);
85 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
87 /* increment with wrap-around */
88 #define INCR(_l, _sz) do { \
90 (_l) &= ((_sz) - 1); \
95 #define ATH_TXBUF_RESERVE 5
96 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
97 #define ATH_TXMAXTRY 13
98 #define ATH_MAX_SW_RETRIES 30
100 #define TID_TO_WME_AC(_tid) \
101 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
102 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
103 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
106 #define ATH_AGGR_DELIM_SZ 4
107 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
108 /* number of delimiters for encryption padding */
109 #define ATH_AGGR_ENCRYPTDELIM 10
110 /* minimum h/w qdepth to be sustained to maximize aggregation */
111 #define ATH_AGGR_MIN_QDEPTH 2
112 /* minimum h/w qdepth for non-aggregated traffic */
113 #define ATH_NON_AGGR_MIN_QDEPTH 8
114 #define ATH_TX_COMPLETE_POLL_INT 1000
115 #define ATH_TXFIFO_DEPTH 8
116 #define ATH_TX_ERROR 0x01
118 #define IEEE80211_SEQ_SEQ_SHIFT 4
119 #define IEEE80211_SEQ_MAX 4096
120 #define IEEE80211_WEP_IVLEN 3
121 #define IEEE80211_WEP_KIDLEN 1
122 #define IEEE80211_WEP_CRCLEN 4
123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
124 (IEEE80211_WEP_IVLEN + \
125 IEEE80211_WEP_KIDLEN + \
126 IEEE80211_WEP_CRCLEN))
128 /* return whether a bit at index _n in bitmap _bm is set
129 * _sz is the size of the bitmap */
130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
133 /* return block-ack bitmap index given sequence and starting sequence */
134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
136 /* return the seqno for _start + _offset */
137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
139 /* returns delimiter padding required given the packet length */
140 #define ATH_AGGR_GET_NDELIM(_len) \
141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
149 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
152 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
153 u32 axq_qnum; /* ath9k hardware queue number */
155 struct list_head axq_q;
160 bool axq_tx_inprogress;
161 struct list_head axq_acq;
162 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
166 struct sk_buff_head complete_q;
171 struct list_head list;
172 struct list_head tid_q;
173 bool clear_ps_filter;
177 struct ath_frame_info {
180 enum ath9k_key_type keytype;
188 struct list_head list;
189 struct sk_buff *bf_mpdu;
192 dma_addr_t bf_buf_addr;
196 * enum buffer_type - Buffer type flags
198 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
199 * @BUF_AGGR: Indicates whether the buffer can be aggregated
200 * (used in aggregation scheduling)
207 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
208 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
210 struct ath_buf_state {
216 unsigned long bfs_paprd_timestamp;
220 struct list_head list;
221 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
223 struct ath_buf *bf_next; /* next subframe in the aggregate */
224 struct sk_buff *bf_mpdu; /* enclosing frame structure */
225 void *bf_desc; /* virtual addr of desc */
226 dma_addr_t bf_daddr; /* physical addr of desc */
227 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
228 struct ieee80211_tx_rate rates[4];
229 struct ath_buf_state bf_state;
233 struct list_head list;
234 struct sk_buff_head buf_q;
235 struct sk_buff_head retry_q;
237 struct ath_atx_ac *ac;
238 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
243 int baw_head; /* first un-acked tx buffer */
244 int baw_tail; /* next unused tx buffer slot */
253 struct ath_softc *sc;
254 struct ieee80211_sta *sta; /* station struct we're part of */
255 struct ieee80211_vif *vif; /* interface with which we're associated */
256 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
257 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
267 struct ath_tx_control {
271 struct ieee80211_sta *sta;
276 * @txq_map: Index is mac80211 queue number. This is
277 * not necessarily the same as the hardware queue number
283 spinlock_t txbuflock;
284 struct list_head txbuf;
285 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
286 struct ath_descdma txdma;
287 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
288 struct ath_txq *uapsdq;
289 u32 txq_max_pending[IEEE80211_NUM_ACS];
290 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
294 struct sk_buff_head rx_fifo;
304 unsigned int rxfilter;
305 struct list_head rxbuf;
306 struct ath_descdma rxdma;
307 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
309 struct ath_rxbuf *buf_hold;
310 struct sk_buff *frag;
315 int ath_startrecv(struct ath_softc *sc);
316 bool ath_stoprecv(struct ath_softc *sc);
317 u32 ath_calcrxfilter(struct ath_softc *sc);
318 int ath_rx_init(struct ath_softc *sc, int nbufs);
319 void ath_rx_cleanup(struct ath_softc *sc);
320 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
321 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
322 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
323 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
324 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
325 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
326 bool ath_drain_all_txq(struct ath_softc *sc);
327 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
328 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
329 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
330 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
331 int ath_tx_init(struct ath_softc *sc, int nbufs);
332 int ath_txq_update(struct ath_softc *sc, int qnum,
333 struct ath9k_tx_queue_info *q);
334 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
335 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
336 struct ath_tx_control *txctl);
337 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
338 struct sk_buff *skb);
339 void ath_tx_tasklet(struct ath_softc *sc);
340 void ath_tx_edma_tasklet(struct ath_softc *sc);
341 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
343 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
344 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
346 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
347 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
348 struct ath_node *an);
349 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
350 struct ieee80211_sta *sta,
351 u16 tids, int nframes,
352 enum ieee80211_frame_release_type reason,
360 struct ath_node mcast_node;
362 bool primary_sta_vif;
363 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
364 struct ath_buf *av_bcbuf;
367 struct ath9k_vif_iter_data {
368 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
369 u8 mask[ETH_ALEN]; /* bssid mask */
372 int naps; /* number of AP vifs */
373 int nmeshes; /* number of mesh vifs */
374 int nstations; /* number of station vifs */
375 int nwds; /* number of WDS vifs */
376 int nadhocs; /* number of adhoc vifs */
379 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
380 struct ieee80211_vif *vif,
381 struct ath9k_vif_iter_data *iter_data);
383 /*******************/
384 /* Beacon Handling */
385 /*******************/
388 * Regardless of the number of beacons we stagger, (i.e. regardless of the
389 * number of BSSIDs) if a given beacon does not go out even after waiting this
390 * number of beacon intervals, the game's up.
392 #define BSTUCK_THRESH 9
394 #define ATH_DEFAULT_BINTVAL 100 /* TU */
395 #define ATH_DEFAULT_BMISS_LIMIT 10
396 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
398 #define TSF_TO_TU(_h,_l) \
399 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
401 struct ath_beacon_config {
413 OK, /* no change needed */
414 UPDATE, /* update pending */
415 COMMIT /* beacon sent, commit change */
416 } updateslot; /* slot time update fsm */
421 struct ieee80211_vif *bslot[ATH_BCBUF];
424 struct ath9k_tx_queue_info beacon_qi;
425 struct ath_descdma bdma;
426 struct ath_txq *cabq;
427 struct list_head bbuf;
433 void ath9k_beacon_tasklet(unsigned long data);
434 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
436 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
437 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
438 void ath9k_set_beacon(struct ath_softc *sc);
439 bool ath9k_csa_is_finished(struct ath_softc *sc);
441 /*******************/
442 /* Link Monitoring */
443 /*******************/
445 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
446 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
447 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
448 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
449 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
450 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
451 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
452 #define ATH_ANI_MAX_SKIP_COUNT 10
453 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
454 #define ATH_PLL_WORK_INTERVAL 100
456 void ath_tx_complete_poll_work(struct work_struct *work);
457 void ath_reset_work(struct work_struct *work);
458 void ath_hw_check(struct work_struct *work);
459 void ath_hw_pll_work(struct work_struct *work);
460 void ath_rx_poll(unsigned long data);
461 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
462 void ath_paprd_calibrate(struct work_struct *work);
463 void ath_ani_calibrate(unsigned long data);
464 void ath_start_ani(struct ath_softc *sc);
465 void ath_stop_ani(struct ath_softc *sc);
466 void ath_check_ani(struct ath_softc *sc);
467 int ath_update_survey_stats(struct ath_softc *sc);
468 void ath_update_survey_nf(struct ath_softc *sc, int channel);
469 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
470 void ath_ps_full_sleep(unsigned long data);
476 #define ATH_DUMP_BTCOEX(_s, _val) \
478 len += scnprintf(buf + len, size - len, \
479 "%20s : %10d\n", _s, (_val)); \
483 BT_OP_PRIORITY_DETECTED,
488 spinlock_t btcoex_lock;
489 struct timer_list period_timer; /* Timer for BT period */
490 struct timer_list no_stomp_timer;
492 unsigned long bt_priority_time;
493 unsigned long op_flags;
494 int bt_stomp_type; /* Types of BT stomping */
495 u32 btcoex_no_stomp; /* in msec */
496 u32 btcoex_period; /* in msec */
497 u32 btscan_no_stomp; /* in msec */
501 struct ath_mci_profile mci;
505 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
506 int ath9k_init_btcoex(struct ath_softc *sc);
507 void ath9k_deinit_btcoex(struct ath_softc *sc);
508 void ath9k_start_btcoex(struct ath_softc *sc);
509 void ath9k_stop_btcoex(struct ath_softc *sc);
510 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
511 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
512 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
513 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
514 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
515 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
517 static inline int ath9k_init_btcoex(struct ath_softc *sc)
521 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
524 static inline void ath9k_start_btcoex(struct ath_softc *sc)
527 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
530 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
534 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
535 u32 max_4ms_framelen)
539 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
542 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
546 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
548 /********************/
550 /********************/
552 #define ATH_LED_PIN_DEF 1
553 #define ATH_LED_PIN_9287 8
554 #define ATH_LED_PIN_9300 10
555 #define ATH_LED_PIN_9485 6
556 #define ATH_LED_PIN_9462 4
558 #ifdef CONFIG_MAC80211_LEDS
559 void ath_init_leds(struct ath_softc *sc);
560 void ath_deinit_leds(struct ath_softc *sc);
561 void ath_fill_led_pin(struct ath_softc *sc);
563 static inline void ath_init_leds(struct ath_softc *sc)
567 static inline void ath_deinit_leds(struct ath_softc *sc)
570 static inline void ath_fill_led_pin(struct ath_softc *sc)
575 /************************/
576 /* Wake on Wireless LAN */
577 /************************/
579 struct ath9k_wow_pattern {
580 u8 pattern_bytes[MAX_PATTERN_SIZE];
581 u8 mask_bytes[MAX_PATTERN_SIZE];
585 #ifdef CONFIG_ATH9K_WOW
586 void ath9k_init_wow(struct ieee80211_hw *hw);
587 int ath9k_suspend(struct ieee80211_hw *hw,
588 struct cfg80211_wowlan *wowlan);
589 int ath9k_resume(struct ieee80211_hw *hw);
590 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
592 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
595 static inline int ath9k_suspend(struct ieee80211_hw *hw,
596 struct cfg80211_wowlan *wowlan)
600 static inline int ath9k_resume(struct ieee80211_hw *hw)
604 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
607 #endif /* CONFIG_ATH9K_WOW */
609 /*******************************/
610 /* Antenna diversity/combining */
611 /*******************************/
613 #define ATH_ANT_RX_CURRENT_SHIFT 4
614 #define ATH_ANT_RX_MAIN_SHIFT 2
615 #define ATH_ANT_RX_MASK 0x3
617 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
618 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
619 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
620 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
621 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
622 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
623 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
624 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
625 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
627 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
628 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
629 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
631 struct ath_ant_comb {
651 enum ath9k_ant_div_comb_lna_conf main_conf;
652 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
653 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
656 unsigned long scan_start_time;
659 * Card-specific config values.
665 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
667 /********************/
668 /* Main driver core */
669 /********************/
671 #define ATH9K_PCI_CUS198 0x0001
672 #define ATH9K_PCI_CUS230 0x0002
673 #define ATH9K_PCI_CUS217 0x0004
674 #define ATH9K_PCI_CUS252 0x0008
675 #define ATH9K_PCI_WOW 0x0010
676 #define ATH9K_PCI_BT_ANT_DIV 0x0020
677 #define ATH9K_PCI_D3_L1_WAR 0x0040
678 #define ATH9K_PCI_AR9565_1ANT 0x0080
679 #define ATH9K_PCI_AR9565_2ANT 0x0100
680 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
681 #define ATH9K_PCI_KILLER 0x0400
684 * Default cache line size, in bytes.
685 * Used when PCI device not fully initialized by bootrom/BIOS
687 #define DEFAULT_CACHELINE 32
688 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
689 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
700 /* Powersave flags */
701 #define PS_WAIT_FOR_BEACON BIT(0)
702 #define PS_WAIT_FOR_CAB BIT(1)
703 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
704 #define PS_WAIT_FOR_TX_ACK BIT(3)
705 #define PS_BEACON_SYNC BIT(4)
706 #define PS_WAIT_FOR_ANI BIT(5)
709 struct ieee80211_hw *hw;
712 struct survey_info *cur_survey;
713 struct survey_info survey[ATH9K_NUM_CHANNELS];
715 struct tasklet_struct intr_tq;
716 struct tasklet_struct bcon_tasklet;
717 struct ath_hw *sc_ah;
720 spinlock_t sc_serial_rw;
721 spinlock_t sc_pm_lock;
722 spinlock_t sc_pcu_lock;
724 struct work_struct paprd_work;
725 struct work_struct hw_check_work;
726 struct work_struct hw_reset_work;
727 struct completion paprd_complete;
728 wait_queue_head_t tx_wait;
730 unsigned int hw_busy_count;
731 unsigned long sc_flags;
732 unsigned long driver_data;
735 u16 ps_flags; /* PS_* */
741 unsigned long ps_usecount;
743 struct ath_config config;
746 struct ath_beacon beacon;
747 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
749 #ifdef CONFIG_MAC80211_LEDS
752 struct led_classdev led_cdev;
755 struct ath9k_hw_cal_data caldata;
758 #ifdef CONFIG_ATH9K_DEBUGFS
759 struct ath9k_debug debug;
761 struct ath_beacon_config cur_beacon_conf;
762 struct delayed_work tx_complete_work;
763 struct delayed_work hw_pll_work;
764 struct timer_list rx_poll_timer;
765 struct timer_list sleep_timer;
767 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
768 struct ath_btcoex btcoex;
769 struct ath_mci_coex mci_coex;
770 struct work_struct mci_work;
773 struct ath_descdma txsdma;
774 struct ieee80211_vif *csa_vif;
776 struct ath_ant_comb ant_comb;
778 struct dfs_pattern_detector *dfs_detector;
780 /* relay(fs) channel for spectral scan */
781 struct rchan *rfs_chan_spec_scan;
782 enum spectral_mode spectral_mode;
783 struct ath_spec_scan spec_config;
785 struct ieee80211_vif *tx99_vif;
786 struct sk_buff *tx99_skb;
790 #ifdef CONFIG_ATH9K_WOW
791 atomic_t wow_got_bmiss_intr;
792 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
793 u32 wow_intr_before_sleep;
801 #ifdef CONFIG_ATH9K_TX99
802 void ath9k_tx99_init_debug(struct ath_softc *sc);
803 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
804 struct ath_tx_control *txctl);
806 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
809 static inline int ath9k_tx99_send(struct ath_softc *sc,
811 struct ath_tx_control *txctl)
815 #endif /* CONFIG_ATH9K_TX99 */
817 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
819 common->bus_ops->read_cachesize(common, csz);
822 void ath9k_tasklet(unsigned long data);
823 int ath_cabq_update(struct ath_softc *);
824 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
825 irqreturn_t ath_isr(int irq, void *dev);
826 int ath_reset(struct ath_softc *sc);
827 void ath_cancel_work(struct ath_softc *sc);
828 void ath_restart_work(struct ath_softc *sc);
829 int ath9k_init_device(u16 devid, struct ath_softc *sc,
830 const struct ath_bus_ops *bus_ops);
831 void ath9k_deinit_device(struct ath_softc *sc);
832 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
833 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
834 void ath_start_rfkill_poll(struct ath_softc *sc);
835 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
836 void ath9k_ps_wakeup(struct ath_softc *sc);
837 void ath9k_ps_restore(struct ath_softc *sc);
839 #ifdef CONFIG_ATH9K_PCI
840 int ath_pci_init(void);
841 void ath_pci_exit(void);
843 static inline int ath_pci_init(void) { return 0; };
844 static inline void ath_pci_exit(void) {};
847 #ifdef CONFIG_ATH9K_AHB
848 int ath_ahb_init(void);
849 void ath_ahb_exit(void);
851 static inline int ath_ahb_init(void) { return 0; };
852 static inline void ath_ahb_exit(void) {};