2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #define PHY_MODE_MARVELL 0x0000
26 #define MII_MARVELL_LED_CTRL 0x0018
27 #define MII_MARVELL_STATUS 0x001b
28 #define MII_MARVELL_CTRL 0x0014
30 #define MARVELL_LED_MANUAL 0x0019
32 #define MARVELL_STATUS_HWCFG 0x0004
34 #define MARVELL_CTRL_TXDELAY 0x0002
35 #define MARVELL_CTRL_RXDELAY 0x0080
37 #define PHY_MODE_RTL8211CL 0x000C
39 struct ax88172_int_data {
47 static void asix_status(struct usbnet *dev, struct urb *urb)
49 struct ax88172_int_data *event;
52 if (urb->actual_length < 8)
55 event = urb->transfer_buffer;
56 link = event->link & 0x01;
57 if (netif_carrier_ok(dev->net) != link) {
59 netif_carrier_on(dev->net);
60 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
62 netif_carrier_off(dev->net);
63 netdev_dbg(dev->net, "Link Status is: %d\n", link);
67 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
68 static u32 asix_get_phyid(struct usbnet *dev)
74 /* Poll for the rare case the FW or phy isn't ready yet. */
75 for (i = 0; i < 100; i++) {
76 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
77 if (phy_reg != 0 && phy_reg != 0xFFFF)
82 if (phy_reg <= 0 || phy_reg == 0xFFFF)
85 phy_id = (phy_reg & 0xffff) << 16;
87 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
91 phy_id |= (phy_reg & 0xffff);
96 static u32 asix_get_link(struct net_device *net)
98 struct usbnet *dev = netdev_priv(net);
100 return mii_link_ok(&dev->mii);
103 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
105 struct usbnet *dev = netdev_priv(net);
107 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
110 /* We need to override some ethtool_ops so we require our
111 own structure so we don't interfere with other usbnet
112 devices that may be connected at the same time. */
113 static const struct ethtool_ops ax88172_ethtool_ops = {
114 .get_drvinfo = asix_get_drvinfo,
115 .get_link = asix_get_link,
116 .get_msglevel = usbnet_get_msglevel,
117 .set_msglevel = usbnet_set_msglevel,
118 .get_wol = asix_get_wol,
119 .set_wol = asix_set_wol,
120 .get_eeprom_len = asix_get_eeprom_len,
121 .get_eeprom = asix_get_eeprom,
122 .get_settings = usbnet_get_settings,
123 .set_settings = usbnet_set_settings,
124 .nway_reset = usbnet_nway_reset,
127 static void ax88172_set_multicast(struct net_device *net)
129 struct usbnet *dev = netdev_priv(net);
130 struct asix_data *data = (struct asix_data *)&dev->data;
133 if (net->flags & IFF_PROMISC) {
135 } else if (net->flags & IFF_ALLMULTI ||
136 netdev_mc_count(net) > AX_MAX_MCAST) {
138 } else if (netdev_mc_empty(net)) {
139 /* just broadcast and directed */
141 /* We use the 20 byte dev->data
142 * for our 8 byte filter buffer
143 * to avoid allocating memory that
144 * is tricky to free later */
145 struct netdev_hw_addr *ha;
148 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
150 /* Build the multicast hash filter. */
151 netdev_for_each_mc_addr(ha, net) {
152 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
153 data->multi_filter[crc_bits >> 3] |=
157 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
158 AX_MCAST_FILTER_SIZE, data->multi_filter);
163 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
166 static int ax88172_link_reset(struct usbnet *dev)
169 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
171 mii_check_media(&dev->mii, 1, 1);
172 mii_ethtool_gset(&dev->mii, &ecmd);
173 mode = AX88172_MEDIUM_DEFAULT;
175 if (ecmd.duplex != DUPLEX_FULL)
176 mode |= ~AX88172_MEDIUM_FD;
178 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
179 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
181 asix_write_medium_mode(dev, mode);
186 static const struct net_device_ops ax88172_netdev_ops = {
187 .ndo_open = usbnet_open,
188 .ndo_stop = usbnet_stop,
189 .ndo_start_xmit = usbnet_start_xmit,
190 .ndo_tx_timeout = usbnet_tx_timeout,
191 .ndo_change_mtu = usbnet_change_mtu,
192 .ndo_set_mac_address = eth_mac_addr,
193 .ndo_validate_addr = eth_validate_addr,
194 .ndo_do_ioctl = asix_ioctl,
195 .ndo_set_rx_mode = ax88172_set_multicast,
198 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
203 unsigned long gpio_bits = dev->driver_info->data;
204 struct asix_data *data = (struct asix_data *)&dev->data;
206 data->eeprom_len = AX88172_EEPROM_LEN;
208 usbnet_get_endpoints(dev,intf);
210 /* Toggle the GPIOs in a manufacturer/model specific way */
211 for (i = 2; i >= 0; i--) {
212 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
213 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
219 ret = asix_write_rx_ctl(dev, 0x80);
223 /* Get the MAC address */
224 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
226 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
229 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
231 /* Initialize MII structure */
232 dev->mii.dev = dev->net;
233 dev->mii.mdio_read = asix_mdio_read;
234 dev->mii.mdio_write = asix_mdio_write;
235 dev->mii.phy_id_mask = 0x3f;
236 dev->mii.reg_num_mask = 0x1f;
237 dev->mii.phy_id = asix_get_phy_addr(dev);
239 dev->net->netdev_ops = &ax88172_netdev_ops;
240 dev->net->ethtool_ops = &ax88172_ethtool_ops;
241 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
242 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
244 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
245 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
246 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
247 mii_nway_restart(&dev->mii);
255 static const struct ethtool_ops ax88772_ethtool_ops = {
256 .get_drvinfo = asix_get_drvinfo,
257 .get_link = asix_get_link,
258 .get_msglevel = usbnet_get_msglevel,
259 .set_msglevel = usbnet_set_msglevel,
260 .get_wol = asix_get_wol,
261 .set_wol = asix_set_wol,
262 .get_eeprom_len = asix_get_eeprom_len,
263 .get_eeprom = asix_get_eeprom,
264 .get_settings = usbnet_get_settings,
265 .set_settings = usbnet_set_settings,
266 .nway_reset = usbnet_nway_reset,
269 static int ax88772_link_reset(struct usbnet *dev)
272 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
274 mii_check_media(&dev->mii, 1, 1);
275 mii_ethtool_gset(&dev->mii, &ecmd);
276 mode = AX88772_MEDIUM_DEFAULT;
278 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
279 mode &= ~AX_MEDIUM_PS;
281 if (ecmd.duplex != DUPLEX_FULL)
282 mode &= ~AX_MEDIUM_FD;
284 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
285 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
287 asix_write_medium_mode(dev, mode);
292 static int ax88772_reset(struct usbnet *dev)
294 struct asix_data *data = (struct asix_data *)&dev->data;
298 ret = asix_write_gpio(dev,
299 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
303 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
305 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
307 dbg("Select PHY #1 failed: %d", ret);
311 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
317 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
324 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
328 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
334 rx_ctl = asix_read_rx_ctl(dev);
335 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
336 ret = asix_write_rx_ctl(dev, 0x0000);
340 rx_ctl = asix_read_rx_ctl(dev);
341 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
343 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
349 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
355 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
356 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
357 ADVERTISE_ALL | ADVERTISE_CSMA);
358 mii_nway_restart(&dev->mii);
360 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
364 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
365 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
366 AX88772_IPG2_DEFAULT, 0, NULL);
368 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
372 /* Rewrite MAC address */
373 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
374 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
379 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
380 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
384 rx_ctl = asix_read_rx_ctl(dev);
385 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
387 rx_ctl = asix_read_medium_status(dev);
388 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
397 static const struct net_device_ops ax88772_netdev_ops = {
398 .ndo_open = usbnet_open,
399 .ndo_stop = usbnet_stop,
400 .ndo_start_xmit = usbnet_start_xmit,
401 .ndo_tx_timeout = usbnet_tx_timeout,
402 .ndo_change_mtu = usbnet_change_mtu,
403 .ndo_set_mac_address = asix_set_mac_address,
404 .ndo_validate_addr = eth_validate_addr,
405 .ndo_do_ioctl = asix_ioctl,
406 .ndo_set_rx_mode = asix_set_multicast,
409 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
412 struct asix_data *data = (struct asix_data *)&dev->data;
416 data->eeprom_len = AX88772_EEPROM_LEN;
418 usbnet_get_endpoints(dev,intf);
420 /* Get the MAC address */
421 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
423 dbg("Failed to read MAC address: %d", ret);
426 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
428 /* Initialize MII structure */
429 dev->mii.dev = dev->net;
430 dev->mii.mdio_read = asix_mdio_read;
431 dev->mii.mdio_write = asix_mdio_write;
432 dev->mii.phy_id_mask = 0x1f;
433 dev->mii.reg_num_mask = 0x1f;
434 dev->mii.phy_id = asix_get_phy_addr(dev);
436 dev->net->netdev_ops = &ax88772_netdev_ops;
437 dev->net->ethtool_ops = &ax88772_ethtool_ops;
438 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
439 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
441 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
443 /* Reset the PHY to normal operation mode */
444 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
446 dbg("Select PHY #1 failed: %d", ret);
450 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
456 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
462 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
464 /* Read PHYID register *AFTER* the PHY was reset properly */
465 phyid = asix_get_phyid(dev);
466 dbg("PHYID=0x%08x", phyid);
468 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
469 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
470 /* hard_mtu is still the default - the device does not support
472 dev->rx_urb_size = 2048;
478 static const struct ethtool_ops ax88178_ethtool_ops = {
479 .get_drvinfo = asix_get_drvinfo,
480 .get_link = asix_get_link,
481 .get_msglevel = usbnet_get_msglevel,
482 .set_msglevel = usbnet_set_msglevel,
483 .get_wol = asix_get_wol,
484 .set_wol = asix_set_wol,
485 .get_eeprom_len = asix_get_eeprom_len,
486 .get_eeprom = asix_get_eeprom,
487 .get_settings = usbnet_get_settings,
488 .set_settings = usbnet_set_settings,
489 .nway_reset = usbnet_nway_reset,
492 static int marvell_phy_init(struct usbnet *dev)
494 struct asix_data *data = (struct asix_data *)&dev->data;
497 netdev_dbg(dev->net, "marvell_phy_init()\n");
499 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
500 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
502 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
503 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
506 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
507 MII_MARVELL_LED_CTRL);
508 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
512 asix_mdio_write(dev->net, dev->mii.phy_id,
513 MII_MARVELL_LED_CTRL, reg);
515 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
516 MII_MARVELL_LED_CTRL);
517 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
524 static int rtl8211cl_phy_init(struct usbnet *dev)
526 struct asix_data *data = (struct asix_data *)&dev->data;
528 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
530 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
531 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
532 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
533 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
534 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
536 if (data->ledmode == 12) {
537 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
538 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
539 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
545 static int marvell_led_status(struct usbnet *dev, u16 speed)
547 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
549 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
551 /* Clear out the center LED bits - 0x03F0 */
565 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
566 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
571 static int ax88178_reset(struct usbnet *dev)
573 struct asix_data *data = (struct asix_data *)&dev->data;
580 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
581 dbg("GPIO Status: 0x%04x", status);
583 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
584 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
585 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
587 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
589 if (eeprom == cpu_to_le16(0xffff)) {
590 data->phymode = PHY_MODE_MARVELL;
594 data->phymode = le16_to_cpu(eeprom) & 0x7F;
595 data->ledmode = le16_to_cpu(eeprom) >> 8;
596 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
598 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
600 /* Power up external GigaPHY through AX88178 GPIO pin */
601 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
602 if ((le16_to_cpu(eeprom) >> 8) != 1) {
603 asix_write_gpio(dev, 0x003c, 30);
604 asix_write_gpio(dev, 0x001c, 300);
605 asix_write_gpio(dev, 0x003c, 30);
607 dbg("gpio phymode == 1 path");
608 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
609 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
612 /* Read PHYID register *AFTER* powering up PHY */
613 phyid = asix_get_phyid(dev);
614 dbg("PHYID=0x%08x", phyid);
616 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
617 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
619 asix_sw_reset(dev, 0);
622 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
625 asix_write_rx_ctl(dev, 0);
627 if (data->phymode == PHY_MODE_MARVELL) {
628 marvell_phy_init(dev);
630 } else if (data->phymode == PHY_MODE_RTL8211CL)
631 rtl8211cl_phy_init(dev);
633 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
634 BMCR_RESET | BMCR_ANENABLE);
635 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
636 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
637 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
640 mii_nway_restart(&dev->mii);
642 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
646 /* Rewrite MAC address */
647 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
648 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
653 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
660 static int ax88178_link_reset(struct usbnet *dev)
663 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
664 struct asix_data *data = (struct asix_data *)&dev->data;
667 netdev_dbg(dev->net, "ax88178_link_reset()\n");
669 mii_check_media(&dev->mii, 1, 1);
670 mii_ethtool_gset(&dev->mii, &ecmd);
671 mode = AX88178_MEDIUM_DEFAULT;
672 speed = ethtool_cmd_speed(&ecmd);
674 if (speed == SPEED_1000)
675 mode |= AX_MEDIUM_GM;
676 else if (speed == SPEED_100)
677 mode |= AX_MEDIUM_PS;
679 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
681 mode |= AX_MEDIUM_ENCK;
683 if (ecmd.duplex == DUPLEX_FULL)
684 mode |= AX_MEDIUM_FD;
686 mode &= ~AX_MEDIUM_FD;
688 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
689 speed, ecmd.duplex, mode);
691 asix_write_medium_mode(dev, mode);
693 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
694 marvell_led_status(dev, speed);
699 static void ax88178_set_mfb(struct usbnet *dev)
701 u16 mfb = AX_RX_CTL_MFB_16384;
704 int old_rx_urb_size = dev->rx_urb_size;
706 if (dev->hard_mtu < 2048) {
707 dev->rx_urb_size = 2048;
708 mfb = AX_RX_CTL_MFB_2048;
709 } else if (dev->hard_mtu < 4096) {
710 dev->rx_urb_size = 4096;
711 mfb = AX_RX_CTL_MFB_4096;
712 } else if (dev->hard_mtu < 8192) {
713 dev->rx_urb_size = 8192;
714 mfb = AX_RX_CTL_MFB_8192;
715 } else if (dev->hard_mtu < 16384) {
716 dev->rx_urb_size = 16384;
717 mfb = AX_RX_CTL_MFB_16384;
720 rxctl = asix_read_rx_ctl(dev);
721 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
723 medium = asix_read_medium_status(dev);
724 if (dev->net->mtu > 1500)
725 medium |= AX_MEDIUM_JFE;
727 medium &= ~AX_MEDIUM_JFE;
728 asix_write_medium_mode(dev, medium);
730 if (dev->rx_urb_size > old_rx_urb_size)
731 usbnet_unlink_rx_urbs(dev);
734 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
736 struct usbnet *dev = netdev_priv(net);
737 int ll_mtu = new_mtu + net->hard_header_len + 4;
739 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
741 if (new_mtu <= 0 || ll_mtu > 16384)
744 if ((ll_mtu % dev->maxpacket) == 0)
748 dev->hard_mtu = net->mtu + net->hard_header_len;
749 ax88178_set_mfb(dev);
754 static const struct net_device_ops ax88178_netdev_ops = {
755 .ndo_open = usbnet_open,
756 .ndo_stop = usbnet_stop,
757 .ndo_start_xmit = usbnet_start_xmit,
758 .ndo_tx_timeout = usbnet_tx_timeout,
759 .ndo_set_mac_address = asix_set_mac_address,
760 .ndo_validate_addr = eth_validate_addr,
761 .ndo_set_rx_mode = asix_set_multicast,
762 .ndo_do_ioctl = asix_ioctl,
763 .ndo_change_mtu = ax88178_change_mtu,
766 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
770 struct asix_data *data = (struct asix_data *)&dev->data;
772 data->eeprom_len = AX88772_EEPROM_LEN;
774 usbnet_get_endpoints(dev,intf);
776 /* Get the MAC address */
777 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
779 dbg("Failed to read MAC address: %d", ret);
782 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
784 /* Initialize MII structure */
785 dev->mii.dev = dev->net;
786 dev->mii.mdio_read = asix_mdio_read;
787 dev->mii.mdio_write = asix_mdio_write;
788 dev->mii.phy_id_mask = 0x1f;
789 dev->mii.reg_num_mask = 0xff;
790 dev->mii.supports_gmii = 1;
791 dev->mii.phy_id = asix_get_phy_addr(dev);
793 dev->net->netdev_ops = &ax88178_netdev_ops;
794 dev->net->ethtool_ops = &ax88178_ethtool_ops;
796 /* Blink LEDS so users know driver saw dongle */
797 asix_sw_reset(dev, 0);
800 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
803 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
804 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
805 /* hard_mtu is still the default - the device does not support
807 dev->rx_urb_size = 2048;
813 static const struct driver_info ax8817x_info = {
814 .description = "ASIX AX8817x USB 2.0 Ethernet",
815 .bind = ax88172_bind,
816 .status = asix_status,
817 .link_reset = ax88172_link_reset,
818 .reset = ax88172_link_reset,
819 .flags = FLAG_ETHER | FLAG_LINK_INTR,
823 static const struct driver_info dlink_dub_e100_info = {
824 .description = "DLink DUB-E100 USB Ethernet",
825 .bind = ax88172_bind,
826 .status = asix_status,
827 .link_reset = ax88172_link_reset,
828 .reset = ax88172_link_reset,
829 .flags = FLAG_ETHER | FLAG_LINK_INTR,
833 static const struct driver_info netgear_fa120_info = {
834 .description = "Netgear FA-120 USB Ethernet",
835 .bind = ax88172_bind,
836 .status = asix_status,
837 .link_reset = ax88172_link_reset,
838 .reset = ax88172_link_reset,
839 .flags = FLAG_ETHER | FLAG_LINK_INTR,
843 static const struct driver_info hawking_uf200_info = {
844 .description = "Hawking UF200 USB Ethernet",
845 .bind = ax88172_bind,
846 .status = asix_status,
847 .link_reset = ax88172_link_reset,
848 .reset = ax88172_link_reset,
849 .flags = FLAG_ETHER | FLAG_LINK_INTR,
853 static const struct driver_info ax88772_info = {
854 .description = "ASIX AX88772 USB 2.0 Ethernet",
855 .bind = ax88772_bind,
856 .status = asix_status,
857 .link_reset = ax88772_link_reset,
858 .reset = ax88772_reset,
859 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
860 .rx_fixup = asix_rx_fixup,
861 .tx_fixup = asix_tx_fixup,
864 static const struct driver_info ax88178_info = {
865 .description = "ASIX AX88178 USB 2.0 Ethernet",
866 .bind = ax88178_bind,
867 .status = asix_status,
868 .link_reset = ax88178_link_reset,
869 .reset = ax88178_reset,
870 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
871 .rx_fixup = asix_rx_fixup,
872 .tx_fixup = asix_tx_fixup,
875 static const struct usb_device_id products [] = {
878 USB_DEVICE (0x077b, 0x2226),
879 .driver_info = (unsigned long) &ax8817x_info,
882 USB_DEVICE (0x0846, 0x1040),
883 .driver_info = (unsigned long) &netgear_fa120_info,
886 USB_DEVICE (0x2001, 0x1a00),
887 .driver_info = (unsigned long) &dlink_dub_e100_info,
889 // Intellinet, ST Lab USB Ethernet
890 USB_DEVICE (0x0b95, 0x1720),
891 .driver_info = (unsigned long) &ax8817x_info,
893 // Hawking UF200, TrendNet TU2-ET100
894 USB_DEVICE (0x07b8, 0x420a),
895 .driver_info = (unsigned long) &hawking_uf200_info,
897 // Billionton Systems, USB2AR
898 USB_DEVICE (0x08dd, 0x90ff),
899 .driver_info = (unsigned long) &ax8817x_info,
902 USB_DEVICE (0x0557, 0x2009),
903 .driver_info = (unsigned long) &ax8817x_info,
905 // Buffalo LUA-U2-KTX
906 USB_DEVICE (0x0411, 0x003d),
907 .driver_info = (unsigned long) &ax8817x_info,
909 // Buffalo LUA-U2-GT 10/100/1000
910 USB_DEVICE (0x0411, 0x006e),
911 .driver_info = (unsigned long) &ax88178_info,
913 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
914 USB_DEVICE (0x6189, 0x182d),
915 .driver_info = (unsigned long) &ax8817x_info,
917 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
918 USB_DEVICE (0x0df6, 0x0056),
919 .driver_info = (unsigned long) &ax88178_info,
921 // corega FEther USB2-TX
922 USB_DEVICE (0x07aa, 0x0017),
923 .driver_info = (unsigned long) &ax8817x_info,
925 // Surecom EP-1427X-2
926 USB_DEVICE (0x1189, 0x0893),
927 .driver_info = (unsigned long) &ax8817x_info,
929 // goodway corp usb gwusb2e
930 USB_DEVICE (0x1631, 0x6200),
931 .driver_info = (unsigned long) &ax8817x_info,
933 // JVC MP-PRX1 Port Replicator
934 USB_DEVICE (0x04f1, 0x3008),
935 .driver_info = (unsigned long) &ax8817x_info,
937 // ASIX AX88772B 10/100
938 USB_DEVICE (0x0b95, 0x772b),
939 .driver_info = (unsigned long) &ax88772_info,
941 // ASIX AX88772 10/100
942 USB_DEVICE (0x0b95, 0x7720),
943 .driver_info = (unsigned long) &ax88772_info,
945 // ASIX AX88178 10/100/1000
946 USB_DEVICE (0x0b95, 0x1780),
947 .driver_info = (unsigned long) &ax88178_info,
949 // Logitec LAN-GTJ/U2A
950 USB_DEVICE (0x0789, 0x0160),
951 .driver_info = (unsigned long) &ax88178_info,
953 // Linksys USB200M Rev 2
954 USB_DEVICE (0x13b1, 0x0018),
955 .driver_info = (unsigned long) &ax88772_info,
957 // 0Q0 cable ethernet
958 USB_DEVICE (0x1557, 0x7720),
959 .driver_info = (unsigned long) &ax88772_info,
961 // DLink DUB-E100 H/W Ver B1
962 USB_DEVICE (0x07d1, 0x3c05),
963 .driver_info = (unsigned long) &ax88772_info,
965 // DLink DUB-E100 H/W Ver B1 Alternate
966 USB_DEVICE (0x2001, 0x3c05),
967 .driver_info = (unsigned long) &ax88772_info,
970 USB_DEVICE (0x1737, 0x0039),
971 .driver_info = (unsigned long) &ax88178_info,
974 USB_DEVICE (0x04bb, 0x0930),
975 .driver_info = (unsigned long) &ax88178_info,
978 USB_DEVICE(0x050d, 0x5055),
979 .driver_info = (unsigned long) &ax88178_info,
981 // Apple USB Ethernet Adapter
982 USB_DEVICE(0x05ac, 0x1402),
983 .driver_info = (unsigned long) &ax88772_info,
985 // Cables-to-Go USB Ethernet Adapter
986 USB_DEVICE(0x0b95, 0x772a),
987 .driver_info = (unsigned long) &ax88772_info,
990 USB_DEVICE(0x14ea, 0xab11),
991 .driver_info = (unsigned long) &ax88178_info,
994 USB_DEVICE(0x0db0, 0xa877),
995 .driver_info = (unsigned long) &ax88772_info,
997 // Asus USB Ethernet Adapter
998 USB_DEVICE (0x0b95, 0x7e2b),
999 .driver_info = (unsigned long) &ax88772_info,
1003 MODULE_DEVICE_TABLE(usb, products);
1005 static struct usb_driver asix_driver = {
1006 .name = DRIVER_NAME,
1007 .id_table = products,
1008 .probe = usbnet_probe,
1009 .suspend = usbnet_suspend,
1010 .resume = usbnet_resume,
1011 .disconnect = usbnet_disconnect,
1012 .supports_autosuspend = 1,
1013 .disable_hub_initiated_lpm = 1,
1016 module_usb_driver(asix_driver);
1018 MODULE_AUTHOR("David Hollis");
1019 MODULE_VERSION(DRIVER_VERSION);
1020 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1021 MODULE_LICENSE("GPL");