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[~andy/linux] / drivers / net / tokenring / 3c359.c
1 /*
2  *   3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved
3  *
4  *  Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC
5  *
6  *  Base Driver Olympic:
7  *      Written 1999 Peter De Schrijver & Mike Phillips
8  *
9  *  This software may be used and distributed according to the terms
10  *  of the GNU General Public License, incorporated herein by reference.
11  * 
12  *  7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.
13  *
14  *  2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.
15  *  3/05/01 - Last clean up stuff before submission.
16  *  2/15/01 - Finally, update to new pci api. 
17  *
18  *  To Do:
19  */
20
21 /* 
22  *      Technical Card Details
23  *
24  *  All access to data is done with 16/8 bit transfers.  The transfer
25  *  method really sucks. You can only read or write one location at a time.
26  *
27  *  Also, the microcode for the card must be uploaded if the card does not have
28  *  the flashrom on board.  This is a 28K bloat in the driver when compiled
29  *  as a module.
30  *
31  *  Rx is very simple, status into a ring of descriptors, dma data transfer,
32  *  interrupts to tell us when a packet is received.
33  *
34  *  Tx is a little more interesting. Similar scenario, descriptor and dma data
35  *  transfers, but we don't have to interrupt the card to tell it another packet
36  *  is ready for transmission, we are just doing simple memory writes, not io or mmio
37  *  writes.  The card can be set up to simply poll on the next
38  *  descriptor pointer and when this value is non-zero will automatically download
39  *  the next packet.  The card then interrupts us when the packet is done.
40  *
41  */
42
43 #define XL_DEBUG 0
44
45 #include <linux/jiffies.h>
46 #include <linux/module.h>
47 #include <linux/kernel.h>
48 #include <linux/errno.h>
49 #include <linux/timer.h>
50 #include <linux/in.h>
51 #include <linux/ioport.h>
52 #include <linux/string.h>
53 #include <linux/proc_fs.h>
54 #include <linux/ptrace.h>
55 #include <linux/skbuff.h>
56 #include <linux/interrupt.h>
57 #include <linux/delay.h>
58 #include <linux/netdevice.h>
59 #include <linux/trdevice.h>
60 #include <linux/stddef.h>
61 #include <linux/init.h>
62 #include <linux/pci.h>
63 #include <linux/spinlock.h>
64 #include <linux/bitops.h>
65 #include <linux/firmware.h>
66 #include <linux/slab.h>
67
68 #include <net/checksum.h>
69
70 #include <asm/io.h>
71
72 #include "3c359.h"
73
74 static char version[] __devinitdata  = 
75 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ; 
76
77 #define FW_NAME         "3com/3C359.bin"
78 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ; 
79 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver\n") ;
80 MODULE_FIRMWARE(FW_NAME);
81
82 /* Module parameters */
83
84 /* Ring Speed 0,4,16 
85  * 0 = Autosense   
86  * 4,16 = Selected speed only, no autosense
87  * This allows the card to be the first on the ring
88  * and become the active monitor.
89  *
90  * WARNING: Some hubs will allow you to insert
91  * at the wrong speed.
92  * 
93  * The adapter will _not_ fail to open if there are no
94  * active monitors on the ring, it will simply open up in 
95  * its last known ringspeed if no ringspeed is specified.
96  */
97
98 static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;
99
100 module_param_array(ringspeed, int, NULL, 0);
101 MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;
102
103 /* Packet buffer size */
104
105 static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;
106  
107 module_param_array(pkt_buf_sz, int, NULL, 0) ;
108 MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;
109 /* Message Level */
110
111 static int message_level[XL_MAX_ADAPTERS] = {0,} ;
112
113 module_param_array(message_level, int, NULL, 0) ;
114 MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ;
115 /* 
116  *      This is a real nasty way of doing this, but otherwise you
117  *      will be stuck with 1555 lines of hex #'s in the code.
118  */
119
120 static DEFINE_PCI_DEVICE_TABLE(xl_pci_tbl) =
121 {
122         {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
123         { }                     /* terminate list */
124 };
125 MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ; 
126
127 static int xl_init(struct net_device *dev);
128 static int xl_open(struct net_device *dev);
129 static int xl_open_hw(struct net_device *dev) ;  
130 static int xl_hw_reset(struct net_device *dev); 
131 static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev);
132 static void xl_dn_comp(struct net_device *dev); 
133 static int xl_close(struct net_device *dev);
134 static void xl_set_rx_mode(struct net_device *dev);
135 static irqreturn_t xl_interrupt(int irq, void *dev_id);
136 static int xl_set_mac_address(struct net_device *dev, void *addr) ; 
137 static void xl_arb_cmd(struct net_device *dev);
138 static void xl_asb_cmd(struct net_device *dev) ; 
139 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ; 
140 static void xl_wait_misr_flags(struct net_device *dev) ; 
141 static int xl_change_mtu(struct net_device *dev, int mtu);
142 static void xl_srb_bh(struct net_device *dev) ; 
143 static void xl_asb_bh(struct net_device *dev) ; 
144 static void xl_reset(struct net_device *dev) ;  
145 static void xl_freemem(struct net_device *dev) ;  
146
147
148 /* EEProm Access Functions */
149 static u16  xl_ee_read(struct net_device *dev, int ee_addr) ; 
150 static void  xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ; 
151
152 /* Debugging functions */
153 #if XL_DEBUG
154 static void print_tx_state(struct net_device *dev) ; 
155 static void print_rx_state(struct net_device *dev) ; 
156
157 static void print_tx_state(struct net_device *dev)
158 {
159
160         struct xl_private *xl_priv = netdev_priv(dev);
161         struct xl_tx_desc *txd ; 
162         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
163         int i ; 
164
165         printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d\n",xl_priv->tx_ring_head,
166                 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ; 
167         printk("Ring    , Address ,   FSH  , DnNextPtr, Buffer, Buffer_Len\n");
168         for (i = 0; i < 16; i++) {
169                 txd = &(xl_priv->xl_tx_ring[i]) ; 
170                 printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(txd),
171                         txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ; 
172         }
173
174         printk("DNLISTPTR = %04x\n", readl(xl_mmio + MMIO_DNLISTPTR) );
175         
176         printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL) );
177         printk("Queue status = %0x\n",netif_running(dev) ) ;
178 }
179
180 static void print_rx_state(struct net_device *dev)
181 {
182
183         struct xl_private *xl_priv = netdev_priv(dev);
184         struct xl_rx_desc *rxd ; 
185         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
186         int i ; 
187
188         printk("rx_ring_tail: %d\n", xl_priv->rx_ring_tail);
189         printk("Ring    , Address ,   FrameState  , UPNextPtr, FragAddr, Frag_Len\n");
190         for (i = 0; i < 16; i++) { 
191                 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */
192                 rxd = &(xl_priv->xl_rx_ring[i]) ; 
193                 printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(rxd),
194                         rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ; 
195         }
196
197         printk("UPLISTPTR = %04x\n", readl(xl_mmio + MMIO_UPLISTPTR));
198         
199         printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL));
200         printk("Queue status = %0x\n",netif_running(dev));
201
202 #endif
203
204 /*
205  *      Read values from the on-board EEProm.  This looks very strange
206  *      but you have to wait for the EEProm to get/set the value before 
207  *      passing/getting the next value from the nic. As with all requests
208  *      on this nic it has to be done in two stages, a) tell the nic which
209  *      memory address you want to access and b) pass/get the value from the nic.
210  *      With the EEProm, you have to wait before and between access a) and b).
211  *      As this is only read at initialization time and the wait period is very 
212  *      small we shouldn't have to worry about scheduling issues.
213  */
214
215 static u16 xl_ee_read(struct net_device *dev, int ee_addr)
216
217         struct xl_private *xl_priv = netdev_priv(dev);
218         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
219
220         /* Wait for EEProm to not be busy */
221         writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
222         while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
223
224         /* Tell EEProm what we want to do and where */
225         writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
226         writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; 
227
228         /* Wait for EEProm to not be busy */
229         writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
230         while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 
231         
232         /* Tell EEProm what we want to do and where */
233         writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
234         writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; 
235
236         /* Finally read the value from the EEProm */
237         writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
238         return readw(xl_mmio + MMIO_MACDATA) ; 
239 }
240
241 /* 
242  *      Write values to the onboard eeprom. As with eeprom read you need to 
243  *      set which location to write, wait, value to write, wait, with the 
244  *      added twist of having to enable eeprom writes as well.
245  */
246
247 static void  xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) 
248 {
249         struct xl_private *xl_priv = netdev_priv(dev);
250         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
251
252         /* Wait for EEProm to not be busy */
253         writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
254         while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
255         
256         /* Enable write/erase */
257         writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
258         writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ; 
259
260         /* Wait for EEProm to not be busy */
261         writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
262         while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
263
264         /* Put the value we want to write into EEDATA */ 
265         writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
266         writew(ee_value, xl_mmio + MMIO_MACDATA) ;
267
268         /* Tell EEProm to write eevalue into ee_addr */
269         writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
270         writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ; 
271
272         /* Wait for EEProm to not be busy, to ensure write gets done */
273         writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
274         while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
275         
276         return ; 
277 }
278
279 static const struct net_device_ops xl_netdev_ops = {
280         .ndo_open               = xl_open,
281         .ndo_stop               = xl_close,
282         .ndo_start_xmit         = xl_xmit,
283         .ndo_change_mtu         = xl_change_mtu,
284         .ndo_set_rx_mode        = xl_set_rx_mode,
285         .ndo_set_mac_address    = xl_set_mac_address,
286 };
287  
288 static int __devinit xl_probe(struct pci_dev *pdev,
289                               const struct pci_device_id *ent) 
290 {
291         struct net_device *dev ; 
292         struct xl_private *xl_priv ; 
293         static int card_no = -1 ;
294         int i ; 
295
296         card_no++ ; 
297
298         if (pci_enable_device(pdev)) { 
299                 return -ENODEV ; 
300         } 
301
302         pci_set_master(pdev);
303
304         if ((i = pci_request_regions(pdev,"3c359"))) { 
305                 return i ; 
306         }
307
308         /* 
309          * Allowing init_trdev to allocate the private data will align
310          * xl_private on a 32 bytes boundary which we need for the rx/tx
311          * descriptors
312          */
313
314         dev = alloc_trdev(sizeof(struct xl_private)) ; 
315         if (!dev) { 
316                 pci_release_regions(pdev) ; 
317                 return -ENOMEM ; 
318         } 
319         xl_priv = netdev_priv(dev);
320
321 #if XL_DEBUG  
322         printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n", 
323                 pdev, dev, netdev_priv(dev), (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start);
324 #endif 
325
326         dev->irq=pdev->irq;
327         dev->base_addr=pci_resource_start(pdev,0) ; 
328         xl_priv->xl_card_name = pci_name(pdev);
329         xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);
330         xl_priv->pdev = pdev ; 
331                 
332         if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
333                 xl_priv->pkt_buf_sz = PKT_BUF_SZ ; 
334         else
335                 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ; 
336
337         dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ; 
338         xl_priv->xl_ring_speed = ringspeed[card_no] ; 
339         xl_priv->xl_message_level = message_level[card_no] ; 
340         xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ; 
341         xl_priv->xl_copy_all_options = 0 ; 
342                 
343         if((i = xl_init(dev))) {
344                 iounmap(xl_priv->xl_mmio) ; 
345                 free_netdev(dev) ; 
346                 pci_release_regions(pdev) ; 
347                 return i ; 
348         }                               
349
350         dev->netdev_ops = &xl_netdev_ops;
351         SET_NETDEV_DEV(dev, &pdev->dev);
352
353         pci_set_drvdata(pdev,dev) ; 
354         if ((i = register_netdev(dev))) { 
355                 printk(KERN_ERR "3C359, register netdev failed\n") ;  
356                 pci_set_drvdata(pdev,NULL) ; 
357                 iounmap(xl_priv->xl_mmio) ; 
358                 free_netdev(dev) ; 
359                 pci_release_regions(pdev) ; 
360                 return i ; 
361         }
362    
363         printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ; 
364
365         return 0; 
366 }
367
368 static int xl_init_firmware(struct xl_private *xl_priv)
369 {
370         int err;
371
372         err = request_firmware(&xl_priv->fw, FW_NAME, &xl_priv->pdev->dev);
373         if (err) {
374                 printk(KERN_ERR "Failed to load firmware \"%s\"\n", FW_NAME);
375                 return err;
376         }
377
378         if (xl_priv->fw->size < 16) {
379                 printk(KERN_ERR "Bogus length %zu in \"%s\"\n",
380                        xl_priv->fw->size, FW_NAME);
381                 release_firmware(xl_priv->fw);
382                 err = -EINVAL;
383         }
384
385         return err;
386 }
387
388 static int __devinit xl_init(struct net_device *dev) 
389 {
390         struct xl_private *xl_priv = netdev_priv(dev);
391         int err;
392
393         printk(KERN_INFO "%s\n", version);
394         printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
395                 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq);
396
397         spin_lock_init(&xl_priv->xl_lock) ; 
398
399         err = xl_init_firmware(xl_priv);
400         if (err == 0)
401                 err = xl_hw_reset(dev);
402
403         return err;
404 }
405
406
407 /* 
408  *      Hardware reset.  This needs to be a separate entity as we need to reset the card
409  *      when we change the EEProm settings.
410  */
411
412 static int xl_hw_reset(struct net_device *dev) 
413 {
414         struct xl_private *xl_priv = netdev_priv(dev);
415         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
416         unsigned long t ; 
417         u16 i ; 
418         u16 result_16 ; 
419         u8 result_8 ;
420         u16 start ; 
421         int j ;
422
423         if (xl_priv->fw == NULL)
424                 return -EINVAL;
425
426         /*
427          *  Reset the card.  If the card has got the microcode on board, we have 
428          *  missed the initialization interrupt, so we must always do this.
429          */
430
431         writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; 
432
433         /* 
434          * Must wait for cmdInProgress bit (12) to clear before continuing with
435          * card configuration.
436          */
437
438         t=jiffies;
439         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
440                 schedule();             
441                 if (time_after(jiffies, t + 40 * HZ)) {
442                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL  card not responding to global reset.\n", dev->name);
443                         return -ENODEV;
444                 }
445         }
446
447         /*
448          *  Enable pmbar by setting bit in CPAttention
449          */
450
451         writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
452         result_8 = readb(xl_mmio + MMIO_MACDATA) ; 
453         result_8 = result_8 | CPA_PMBARVIS ; 
454         writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
455         writeb(result_8, xl_mmio + MMIO_MACDATA) ; 
456         
457         /*
458          * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.
459          * If not, we need to upload the microcode to the card
460          */
461
462         writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  
463
464 #if XL_DEBUG
465         printk(KERN_INFO "Read from PMBAR = %04x\n", readw(xl_mmio + MMIO_MACDATA));
466 #endif
467
468         if ( readw( (xl_mmio + MMIO_MACDATA))  & PMB_CPHOLD ) { 
469
470                 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */
471
472                 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  
473                 result_16 = readw(xl_mmio + MMIO_MACDATA) ; 
474                 result_16 = result_16 & ~((0x7F) << 2) ; 
475                 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
476                 writew(result_16,xl_mmio + MMIO_MACDATA) ; 
477         
478                 /* Set CPAttention, memWrEn bit */
479
480                 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
481                 result_8 = readb(xl_mmio + MMIO_MACDATA) ; 
482                 result_8 = result_8 | CPA_MEMWREN  ; 
483                 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
484                 writeb(result_8, xl_mmio + MMIO_MACDATA) ; 
485
486                 /* 
487                  * Now to write the microcode into the shared ram 
488                  * The microcode must finish at position 0xFFFF,
489                  * so we must subtract to get the start position for the code
490                  *
491                  * Looks strange but ensures compiler only uses
492                  * 16 bit unsigned int
493                  */
494                 start = (0xFFFF - (xl_priv->fw->size) + 1) ;
495
496                 printk(KERN_INFO "3C359: Uploading Microcode: "); 
497
498                 for (i = start, j = 0; j < xl_priv->fw->size; i++, j++) {
499                         writel(MEM_BYTE_WRITE | 0XD0000 | i,
500                                xl_mmio + MMIO_MAC_ACCESS_CMD);
501                         writeb(xl_priv->fw->data[j], xl_mmio + MMIO_MACDATA);
502                         if (j % 1024 == 0)
503                                 printk(".");
504                 }
505                 printk("\n") ; 
506
507                 for (i = 0; i < 16; i++) {
508                         writel((MEM_BYTE_WRITE | 0xDFFF0) + i,
509                                xl_mmio + MMIO_MAC_ACCESS_CMD);
510                         writeb(xl_priv->fw->data[xl_priv->fw->size - 16 + i],
511                                xl_mmio + MMIO_MACDATA);
512                 }
513
514                 /*
515                  * Have to write the start address of the upload to FFF4, but
516                  * the address must be >> 4. You do not want to know how long
517                  * it took me to discover this.
518                  */
519
520                 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
521                 writew(start >> 4, xl_mmio + MMIO_MACDATA);
522
523                 /* Clear the CPAttention, memWrEn Bit */
524         
525                 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
526                 result_8 = readb(xl_mmio + MMIO_MACDATA) ; 
527                 result_8 = result_8 & ~CPA_MEMWREN ; 
528                 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
529                 writeb(result_8, xl_mmio + MMIO_MACDATA) ; 
530
531                 /* Clear the cpHold bit in pmbar */
532
533                 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);  
534                 result_16 = readw(xl_mmio + MMIO_MACDATA) ; 
535                 result_16 = result_16 & ~PMB_CPHOLD ; 
536                 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
537                 writew(result_16,xl_mmio + MMIO_MACDATA) ; 
538
539
540         } /* If microcode upload required */
541
542         /* 
543          * The card should now go though a self test procedure and get itself ready
544          * to be opened, we must wait for an srb response with the initialization
545          * information. 
546          */
547
548 #if XL_DEBUG
549         printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name);
550 #endif
551
552         writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ; 
553
554         t=jiffies;
555         while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) { 
556                 schedule();             
557                 if (time_after(jiffies, t + 15 * HZ)) {
558                         printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");
559                         return -ENODEV; 
560                 }
561         }
562
563         /*
564          * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh, 
565          * DnPriReqThresh, read the tech docs if you want to know what
566          * values they need to be.
567          */
568
569         writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
570         writew(0xD000, xl_mmio + MMIO_MACDATA) ; 
571         
572         writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
573         writew(0X0020, xl_mmio + MMIO_MACDATA) ; 
574         
575         writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ; 
576
577         writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ; 
578         writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;
579
580         /*
581          * Read WRBR to provide the location of the srb block, have to use byte reads not word reads. 
582          * Tech docs have this wrong !!!!
583          */
584
585         writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
586         xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ; 
587         writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
588         xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ;
589
590 #if XL_DEBUG
591         writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
592         if ( readw(xl_mmio + MMIO_MACDATA) & 2) { 
593                 printk(KERN_INFO "Default ring speed 4 mbps\n");
594         } else {
595                 printk(KERN_INFO "Default ring speed 16 mbps\n");
596         } 
597         printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb);
598 #endif
599
600         return 0;
601 }
602
603 static int xl_open(struct net_device *dev) 
604 {
605         struct xl_private *xl_priv=netdev_priv(dev);
606         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
607         u8 i ; 
608         __le16 hwaddr[3] ; /* Should be u8[6] but we get word return values */
609         int open_err ;
610
611         u16 switchsettings, switchsettings_eeprom  ;
612  
613         if (request_irq(dev->irq, xl_interrupt, IRQF_SHARED , "3c359", dev))
614                 return -EAGAIN;
615
616         /* 
617          * Read the information from the EEPROM that we need.
618          */
619         
620         hwaddr[0] = cpu_to_le16(xl_ee_read(dev,0x10));
621         hwaddr[1] = cpu_to_le16(xl_ee_read(dev,0x11));
622         hwaddr[2] = cpu_to_le16(xl_ee_read(dev,0x12));
623
624         /* Ring speed */
625
626         switchsettings_eeprom = xl_ee_read(dev,0x08) ;
627         switchsettings = switchsettings_eeprom ;  
628
629         if (xl_priv->xl_ring_speed != 0) { 
630                 if (xl_priv->xl_ring_speed == 4)  
631                         switchsettings = switchsettings | 0x02 ; 
632                 else 
633                         switchsettings = switchsettings & ~0x02 ; 
634         }
635
636         /* Only write EEProm if there has been a change */
637         if (switchsettings != switchsettings_eeprom) { 
638                 xl_ee_write(dev,0x08,switchsettings) ; 
639                 /* Hardware reset after changing EEProm */
640                 xl_hw_reset(dev) ; 
641         }
642
643         memcpy(dev->dev_addr,hwaddr,dev->addr_len) ; 
644         
645         open_err = xl_open_hw(dev) ; 
646
647         /* 
648          * This really needs to be cleaned up with better error reporting.
649          */
650
651         if (open_err != 0) { /* Something went wrong with the open command */
652                 if (open_err & 0x07) { /* Wrong speed, retry at different speed */
653                         printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed\n", dev->name);
654                         switchsettings = switchsettings ^ 2 ; 
655                         xl_ee_write(dev,0x08,switchsettings) ; 
656                         xl_hw_reset(dev) ; 
657                         open_err = xl_open_hw(dev) ; 
658                         if (open_err != 0) { 
659                                 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name); 
660                                 free_irq(dev->irq,dev) ;                                                
661                                 return -ENODEV ;
662                         }  
663                 } else { 
664                         printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ; 
665                         free_irq(dev->irq,dev) ; 
666                         return -ENODEV ; 
667                 }
668         }
669
670         /*
671          * Now to set up the Rx and Tx buffer structures
672          */
673         /* These MUST be on 8 byte boundaries */
674         xl_priv->xl_tx_ring = kzalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL);
675         if (xl_priv->xl_tx_ring == NULL) {
676                 free_irq(dev->irq,dev);
677                 return -ENOMEM;
678         }
679         xl_priv->xl_rx_ring = kzalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL);
680         if (xl_priv->xl_rx_ring == NULL) {
681                 free_irq(dev->irq,dev);
682                 kfree(xl_priv->xl_tx_ring);
683                 return -ENOMEM;
684         }
685
686          /* Setup Rx Ring */
687          for (i=0 ; i < XL_RX_RING_SIZE ; i++) { 
688                 struct sk_buff *skb ; 
689
690                 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; 
691                 if (skb==NULL) 
692                         break ; 
693
694                 skb->dev = dev ; 
695                 xl_priv->xl_rx_ring[i].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
696                 xl_priv->xl_rx_ring[i].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
697                 xl_priv->rx_ring_skb[i] = skb ;         
698         }
699
700         if (i==0) { 
701                 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n",dev->name);
702                 free_irq(dev->irq,dev) ; 
703                 kfree(xl_priv->xl_tx_ring);
704                 kfree(xl_priv->xl_rx_ring);
705                 return -EIO ; 
706         } 
707
708         xl_priv->rx_ring_no = i ; 
709         xl_priv->rx_ring_tail = 0 ; 
710         xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ; 
711         for (i=0;i<(xl_priv->rx_ring_no-1);i++) { 
712                 xl_priv->xl_rx_ring[i].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)));
713         } 
714         xl_priv->xl_rx_ring[i].upnextptr = 0 ; 
715
716         writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ; 
717         
718         /* Setup Tx Ring */
719         
720         xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ; 
721         
722         xl_priv->tx_ring_head = 1 ; 
723         xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */
724         xl_priv->free_ring_entries = XL_TX_RING_SIZE ; 
725
726         /*
727          * Setup the first dummy DPD entry for polling to start working.
728          */
729
730         xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY;
731         xl_priv->xl_tx_ring[0].buffer = 0 ; 
732         xl_priv->xl_tx_ring[0].buffer_length = 0 ; 
733         xl_priv->xl_tx_ring[0].dnnextptr = 0 ; 
734
735         writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ; 
736         writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ; 
737         writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ; 
738         writel(DNENABLE, xl_mmio + MMIO_COMMAND) ; 
739         writeb(0x40, xl_mmio + MMIO_DNPOLL) ;   
740
741         /*
742          * Enable interrupts on the card
743          */
744
745         writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 
746         writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 
747
748         netif_start_queue(dev) ;        
749         return 0;
750         
751 }       
752
753 static int xl_open_hw(struct net_device *dev) 
754
755         struct xl_private *xl_priv=netdev_priv(dev);
756         u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
757         u16 vsoff ;
758         char ver_str[33];  
759         int open_err ; 
760         int i ; 
761         unsigned long t ; 
762
763         /*
764          * Okay, let's build up the Open.NIC srb command
765          *
766          */
767                 
768         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
769         writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ; 
770         
771         /*
772          * Use this as a test byte, if it comes back with the same value, the command didn't work
773          */
774
775         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
776         writeb(0xff,xl_mmio + MMIO_MACDATA) ; 
777
778         /* Open options */
779         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
780         writeb(0x00, xl_mmio + MMIO_MACDATA) ; 
781         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
782         writeb(0x00, xl_mmio + MMIO_MACDATA) ; 
783
784         /* 
785          * Node address, be careful here, the docs say you can just put zeros here and it will use
786          * the hardware address, it doesn't, you must include the node address in the open command.
787          */
788
789         if (xl_priv->xl_laa[0]) {  /* If using a LAA address */
790                 for (i=10;i<16;i++) { 
791                         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
792                         writeb(xl_priv->xl_laa[i-10],xl_mmio + MMIO_MACDATA) ;
793                 }
794                 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ; 
795         } else { /* Regular hardware address */ 
796                 for (i=10;i<16;i++) { 
797                         writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
798                         writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ; 
799                 }
800         }
801
802         /* Default everything else to 0 */
803         for (i = 16; i < 34; i++) {
804                 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
805                 writeb(0x00,xl_mmio + MMIO_MACDATA) ; 
806         }
807         
808         /*
809          *  Set the csrb bit in the MISR register
810          */
811
812         xl_wait_misr_flags(dev) ; 
813         writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
814         writeb(0xFF, xl_mmio + MMIO_MACDATA) ; 
815         writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
816         writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ; 
817
818         /*
819          * Now wait for the command to run
820          */
821
822         t=jiffies;
823         while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { 
824                 schedule();             
825                 if (time_after(jiffies, t + 40 * HZ)) {
826                         printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");
827                         break ; 
828                 }
829         }
830
831         /*
832          * Let's interpret the open response
833          */
834
835         writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
836         if (readb(xl_mmio + MMIO_MACDATA)!=0) {
837                 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ; 
838                 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
839                 open_err |= readb(xl_mmio + MMIO_MACDATA) ; 
840                 return open_err ; 
841         } else { 
842                 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
843                 xl_priv->asb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
844                 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ; 
845                 printk("ASB: %04x",xl_priv->asb ) ; 
846                 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
847                 printk(", SRB: %04x",swab16(readw(xl_mmio + MMIO_MACDATA)) ) ;
848  
849                 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
850                 xl_priv->arb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
851                 printk(", ARB: %04x\n",xl_priv->arb );
852                 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
853                 vsoff = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
854
855                 /* 
856                  * Interesting, sending the individual characters directly to printk was causing klogd to use
857                  * use 100% of processor time, so we build up the string and print that instead.
858                  */
859
860                 for (i=0;i<0x20;i++) { 
861                         writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
862                         ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ; 
863                 }
864                 ver_str[i] = '\0' ; 
865                 printk(KERN_INFO "%s: Microcode version String: %s\n",dev->name,ver_str);
866         }       
867         
868         /*
869          * Issue the AckInterrupt
870          */
871         writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
872
873         return 0 ; 
874 }
875
876 /*
877  *      There are two ways of implementing rx on the 359 NIC, either
878  *      interrupt driven or polling.  We are going to uses interrupts,
879  *      it is the easier way of doing things.
880  *      
881  *      The Rx works with a ring of Rx descriptors.  At initialise time the ring
882  *      entries point to the next entry except for the last entry in the ring 
883  *      which points to 0.  The card is programmed with the location of the first
884  *      available descriptor and keeps reading the next_ptr until next_ptr is set
885  *      to 0.  Hopefully with a ring size of 16 the card will never get to read a next_ptr
886  *      of 0.  As the Rx interrupt is received we copy the frame up to the protocol layers
887  *      and then point the end of the ring to our current position and point our current
888  *      position to 0, therefore making the current position the last position on the ring.
889  *      The last position on the ring therefore loops continually loops around the rx ring.
890  *      
891  *      rx_ring_tail is the position on the ring to process next. (Think of a snake, the head 
892  *      expands as the card adds new packets and we go around eating the tail processing the
893  *      packets.)
894  *
895  *      Undoubtably it could be streamlined and improved upon, but at the moment it works 
896  *      and the fast path through the routine is fine. 
897  *      
898  *      adv_rx_ring could be inlined to increase performance, but its called a *lot* of times
899  *      in xl_rx so would increase the size of the function significantly. 
900  */
901
902 static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */ 
903 {
904         struct xl_private *xl_priv=netdev_priv(dev);
905         int n = xl_priv->rx_ring_tail;
906         int prev_ring_loc;
907
908         prev_ring_loc = (n + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1);
909         xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * n));
910         xl_priv->xl_rx_ring[n].framestatus = 0;
911         xl_priv->xl_rx_ring[n].upnextptr = 0;
912         xl_priv->rx_ring_tail++;
913         xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1);
914 }
915
916 static void xl_rx(struct net_device *dev)
917 {
918         struct xl_private *xl_priv=netdev_priv(dev);
919         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
920         struct sk_buff *skb, *skb2 ; 
921         int frame_length = 0, copy_len = 0  ;   
922         int temp_ring_loc ;  
923
924         /*
925          * Receive the next frame, loop around the ring until all frames
926          * have been received.
927          */      
928         
929         while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */
930
931                 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */
932
933                         /* 
934                          * This is a pain, you need to go through all the descriptors until the last one 
935                          * for this frame to find the framelength
936                          */
937
938                         temp_ring_loc = xl_priv->rx_ring_tail ; 
939
940                         while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) {
941                                 temp_ring_loc++ ; 
942                                 temp_ring_loc &= (XL_RX_RING_SIZE-1) ; 
943                         }
944
945                         frame_length = le32_to_cpu(xl_priv->xl_rx_ring[temp_ring_loc].framestatus) & 0x7FFF;
946
947                         skb = dev_alloc_skb(frame_length) ;
948  
949                         if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */
950                                 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ; 
951                                 while (xl_priv->rx_ring_tail != temp_ring_loc)  
952                                         adv_rx_ring(dev) ; 
953                                 
954                                 adv_rx_ring(dev) ; /* One more time just for luck :) */ 
955                                 dev->stats.rx_dropped++ ; 
956
957                                 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 
958                                 return ;                                
959                         }
960         
961                         while (xl_priv->rx_ring_tail != temp_ring_loc) { 
962                                 copy_len = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen) & 0x7FFF;
963                                 frame_length -= copy_len ;  
964                                 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
965                                 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
966                                                           skb_put(skb, copy_len),
967                                                           copy_len);
968                                 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
969                                 adv_rx_ring(dev) ; 
970                         } 
971
972                         /* Now we have found the last fragment */
973                         pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
974                         skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
975                                       skb_put(skb,copy_len), frame_length);
976 /*                      memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */
977                         pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
978                         adv_rx_ring(dev) ; 
979                         skb->protocol = tr_type_trans(skb,dev) ; 
980                         netif_rx(skb) ; 
981
982                 } else { /* Single Descriptor Used, simply swap buffers over, fast path  */
983
984                         frame_length = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus) & 0x7FFF;
985                         
986                         skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; 
987
988                         if (skb==NULL) { /* Still need to fix the rx ring */
989                                 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer\n",dev->name);
990                                 adv_rx_ring(dev) ; 
991                                 dev->stats.rx_dropped++ ; 
992                                 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 
993                                 return ; 
994                         }
995
996                         skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ; 
997                         pci_unmap_single(xl_priv->pdev, le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
998                         skb_put(skb2, frame_length) ; 
999                         skb2->protocol = tr_type_trans(skb2,dev) ; 
1000
1001                         xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ;     
1002                         xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
1003                         xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
1004                         adv_rx_ring(dev) ; 
1005                         dev->stats.rx_packets++ ; 
1006                         dev->stats.rx_bytes += frame_length ;   
1007
1008                         netif_rx(skb2) ;                
1009                  } /* if multiple buffers */
1010         } /* while packet to do */
1011
1012         /* Clear the updComplete interrupt */
1013         writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 
1014         return ;        
1015 }
1016
1017 /*
1018  * This is ruthless, it doesn't care what state the card is in it will 
1019  * completely reset the adapter.
1020  */
1021
1022 static void xl_reset(struct net_device *dev) 
1023 {
1024         struct xl_private *xl_priv=netdev_priv(dev);
1025         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1026         unsigned long t; 
1027
1028         writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; 
1029
1030         /* 
1031          * Must wait for cmdInProgress bit (12) to clear before continuing with
1032          * card configuration.
1033          */
1034
1035         t=jiffies;
1036         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1037                 if (time_after(jiffies, t + 40 * HZ)) {
1038                         printk(KERN_ERR "3COM 3C359 Velocity XL  card not responding.\n");
1039                         break ; 
1040                 }
1041         }
1042         
1043 }
1044
1045 static void xl_freemem(struct net_device *dev) 
1046 {
1047         struct xl_private *xl_priv=netdev_priv(dev);
1048         int i ; 
1049
1050         for (i=0;i<XL_RX_RING_SIZE;i++) {
1051                 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ; 
1052                 pci_unmap_single(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE);
1053                 xl_priv->rx_ring_tail++ ; 
1054                 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1; 
1055         } 
1056
1057         /* unmap ring */
1058         pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ; 
1059         
1060         pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ; 
1061
1062         kfree(xl_priv->xl_rx_ring) ; 
1063         kfree(xl_priv->xl_tx_ring) ; 
1064
1065         return  ; 
1066 }
1067
1068 static irqreturn_t xl_interrupt(int irq, void *dev_id) 
1069 {
1070         struct net_device *dev = (struct net_device *)dev_id;
1071         struct xl_private *xl_priv =netdev_priv(dev);
1072         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1073         u16 intstatus, macstatus  ;
1074
1075         intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;  
1076
1077         if (!(intstatus & 1)) /* We didn't generate the interrupt */
1078                 return IRQ_NONE;
1079
1080         spin_lock(&xl_priv->xl_lock) ; 
1081
1082         /*
1083          * Process the interrupt
1084          */
1085         /*
1086          * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.
1087          */
1088         if (intstatus == 0x0001) {  
1089                 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1090                 printk(KERN_INFO "%s: 00001 int received\n",dev->name);
1091         } else {  
1092                 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) { 
1093                         
1094                         /* 
1095                          * Host Error.
1096                          * It may be possible to recover from this, but usually it means something
1097                          * is seriously fubar, so we just close the adapter.
1098                          */
1099
1100                         if (intstatus & HOSTERRINT) {
1101                                 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x\n",dev->name,intstatus);
1102                                 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1103                                 printk(KERN_WARNING "%s: Resetting hardware:\n", dev->name);
1104                                 netif_stop_queue(dev) ;
1105                                 xl_freemem(dev) ; 
1106                                 free_irq(dev->irq,dev);         
1107                                 xl_reset(dev) ; 
1108                                 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1109                                 spin_unlock(&xl_priv->xl_lock) ; 
1110                                 return IRQ_HANDLED;
1111                         } /* Host Error */
1112
1113                         if (intstatus & SRBRINT ) {  /* Srbc interrupt */
1114                                 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1115                                 if (xl_priv->srb_queued)
1116                                         xl_srb_bh(dev) ; 
1117                         } /* SRBR Interrupt */
1118
1119                         if (intstatus & TXUNDERRUN) { /* Issue DnReset command */
1120                                 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1121                                 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */
1122                                         /* !!! FIX-ME !!!! 
1123                                         Must put a timeout check here ! */
1124                                         /* Empty Loop */
1125                                 } 
1126                                 printk(KERN_WARNING "%s: TX Underrun received\n",dev->name);
1127                                 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1128                         } /* TxUnderRun */
1129         
1130                         if (intstatus & ARBCINT ) { /* Arbc interrupt */
1131                                 xl_arb_cmd(dev) ; 
1132                         } /* Arbc */
1133
1134                         if (intstatus & ASBFINT) { 
1135                                 if (xl_priv->asb_queued == 1) {
1136                                         xl_asb_cmd(dev) ; 
1137                                 } else if (xl_priv->asb_queued == 2) {
1138                                         xl_asb_bh(dev) ; 
1139                                 } else { 
1140                                         writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; 
1141                                 }  
1142                         } /* Asbf */
1143
1144                         if (intstatus & UPCOMPINT ) /* UpComplete */
1145                                 xl_rx(dev) ; 
1146
1147                         if (intstatus & DNCOMPINT )  /* DnComplete */
1148                                 xl_dn_comp(dev) ; 
1149
1150                         if (intstatus & HARDERRINT ) { /* Hardware error */
1151                                 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1152                                 macstatus = readw(xl_mmio + MMIO_MACDATA) ; 
1153                                 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name);
1154                                 if (macstatus & (1<<14)) 
1155                                         printk(KERN_WARNING "tchk error: Unrecoverable error\n");
1156                                 if (macstatus & (1<<3))
1157                                         printk(KERN_WARNING "eint error: Internal watchdog timer expired\n");
1158                                 if (macstatus & (1<<2))
1159                                         printk(KERN_WARNING "aint error: Host tried to perform invalid operation\n");
1160                                 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ; 
1161                                 printk(KERN_WARNING "%s: Resetting hardware:\n", dev->name);
1162                                 netif_stop_queue(dev) ;
1163                                 xl_freemem(dev) ; 
1164                                 free_irq(dev->irq,dev); 
1165                                 unregister_netdev(dev) ; 
1166                                 free_netdev(dev) ;  
1167                                 xl_reset(dev) ; 
1168                                 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1169                                 spin_unlock(&xl_priv->xl_lock) ; 
1170                                 return IRQ_HANDLED;
1171                         }
1172                 } else { 
1173                         printk(KERN_WARNING "%s: Received Unknown interrupt : %04x\n", dev->name, intstatus);
1174                         writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;     
1175                 }
1176         } 
1177
1178         /* Turn interrupts back on */
1179
1180         writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 
1181         writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 
1182
1183         spin_unlock(&xl_priv->xl_lock) ;
1184         return IRQ_HANDLED;
1185 }       
1186
1187 /*
1188  *      Tx - Polling configuration
1189  */
1190         
1191 static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev)
1192 {
1193         struct xl_private *xl_priv=netdev_priv(dev);
1194         struct xl_tx_desc *txd ; 
1195         int tx_head, tx_tail, tx_prev ; 
1196         unsigned long flags ;   
1197
1198         spin_lock_irqsave(&xl_priv->xl_lock,flags) ; 
1199
1200         netif_stop_queue(dev) ; 
1201
1202         if (xl_priv->free_ring_entries > 1 ) {  
1203                 /*
1204                  * Set up the descriptor for the packet 
1205                  */
1206                 tx_head = xl_priv->tx_ring_head ; 
1207                 tx_tail = xl_priv->tx_ring_tail ; 
1208
1209                 txd = &(xl_priv->xl_tx_ring[tx_head]) ; 
1210                 txd->dnnextptr = 0 ; 
1211                 txd->framestartheader = cpu_to_le32(skb->len) | TXDNINDICATE;
1212                 txd->buffer = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
1213                 txd->buffer_length = cpu_to_le32(skb->len) | TXDNFRAGLAST;
1214                 xl_priv->tx_ring_skb[tx_head] = skb ; 
1215                 dev->stats.tx_packets++ ; 
1216                 dev->stats.tx_bytes += skb->len ;
1217
1218                 /* 
1219                  * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1 
1220                  * to ensure no negative numbers in unsigned locations.
1221                  */ 
1222         
1223                 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ; 
1224
1225                 xl_priv->tx_ring_head++ ; 
1226                 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ;
1227                 xl_priv->free_ring_entries-- ; 
1228
1229                 xl_priv->xl_tx_ring[tx_prev].dnnextptr = cpu_to_le32(xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head));
1230
1231                 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */
1232                 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */
1233
1234                 netif_wake_queue(dev) ; 
1235
1236                 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; 
1237  
1238                 return NETDEV_TX_OK;
1239         } else {
1240                 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; 
1241                 return NETDEV_TX_BUSY;
1242         }
1243
1244 }
1245         
1246 /* 
1247  * The NIC has told us that a packet has been downloaded onto the card, we must
1248  * find out which packet it has done, clear the skb and information for the packet
1249  * then advance around the ring for all transmitted packets
1250  */
1251
1252 static void xl_dn_comp(struct net_device *dev) 
1253 {
1254         struct xl_private *xl_priv=netdev_priv(dev);
1255         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1256         struct xl_tx_desc *txd ; 
1257
1258
1259         if (xl_priv->tx_ring_tail == 255) {/* First time */
1260                 xl_priv->xl_tx_ring[0].framestartheader = 0 ; 
1261                 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;  
1262                 xl_priv->tx_ring_tail = 1 ; 
1263         }
1264
1265         while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) { 
1266                 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ;
1267                 pci_unmap_single(xl_priv->pdev, le32_to_cpu(txd->buffer), xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE);
1268                 txd->framestartheader = 0 ; 
1269                 txd->buffer = cpu_to_le32(0xdeadbeef);
1270                 txd->buffer_length  = 0 ;  
1271                 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ;
1272                 xl_priv->tx_ring_tail++ ; 
1273                 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ; 
1274                 xl_priv->free_ring_entries++ ; 
1275         }
1276
1277         netif_wake_queue(dev) ; 
1278
1279         writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 
1280 }
1281
1282 /*
1283  * Close the adapter properly.
1284  * This srb reply cannot be handled from interrupt context as we have
1285  * to free the interrupt from the driver. 
1286  */
1287
1288 static int xl_close(struct net_device *dev) 
1289 {
1290         struct xl_private *xl_priv = netdev_priv(dev);
1291         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1292         unsigned long t ; 
1293
1294         netif_stop_queue(dev) ; 
1295
1296         /*
1297          * Close the adapter, need to stall the rx and tx queues.
1298          */
1299
1300         writew(DNSTALL, xl_mmio + MMIO_COMMAND) ; 
1301         t=jiffies;
1302         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1303                 schedule();             
1304                 if (time_after(jiffies, t + 10 * HZ)) {
1305                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name);
1306                         break ; 
1307                 }
1308         }
1309         writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ; 
1310         t=jiffies;
1311         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1312                 schedule();             
1313                 if (time_after(jiffies, t + 10 * HZ)) {
1314                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name);
1315                         break ;
1316                 }
1317         }
1318         writew(UPSTALL, xl_mmio + MMIO_COMMAND) ; 
1319         t=jiffies;
1320         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1321                 schedule();             
1322                 if (time_after(jiffies, t + 10 * HZ)) {
1323                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name);
1324                         break ; 
1325                 }
1326         }
1327
1328         /* Turn off interrupts, we will still get the indication though
1329          * so we can trap it
1330          */
1331
1332         writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ; 
1333
1334         xl_srb_cmd(dev,CLOSE_NIC) ; 
1335
1336         t=jiffies;
1337         while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { 
1338                 schedule();             
1339                 if (time_after(jiffies, t + 10 * HZ)) {
1340                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name);
1341                         break ; 
1342                 }
1343         }
1344         /* Read the srb response from the adapter */
1345
1346         writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD);
1347         if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) { 
1348                 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response\n",dev->name);
1349         } else { 
1350                 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1351                 if (readb(xl_mmio + MMIO_MACDATA)==0) { 
1352                         printk(KERN_INFO "%s: Adapter has been closed\n",dev->name);
1353                         writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1354
1355                         xl_freemem(dev) ; 
1356                         free_irq(dev->irq,dev) ; 
1357                 } else { 
1358                         printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ;
1359                 } 
1360         }
1361
1362         /* Reset the upload and download logic */
1363  
1364         writew(UPRESET, xl_mmio + MMIO_COMMAND) ; 
1365         t=jiffies;
1366         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1367                 schedule();             
1368                 if (time_after(jiffies, t + 10 * HZ)) {
1369                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name);
1370                         break ; 
1371                 }
1372         }
1373         writew(DNRESET, xl_mmio + MMIO_COMMAND) ; 
1374         t=jiffies;
1375         while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 
1376                 schedule();             
1377                 if (time_after(jiffies, t + 10 * HZ)) {
1378                         printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name);
1379                         break ; 
1380                 }
1381         }
1382         xl_hw_reset(dev) ; 
1383         return 0 ;
1384 }
1385
1386 static void xl_set_rx_mode(struct net_device *dev) 
1387 {
1388         struct xl_private *xl_priv = netdev_priv(dev);
1389         struct netdev_hw_addr *ha;
1390         unsigned char dev_mc_address[4] ; 
1391         u16 options ; 
1392
1393         if (dev->flags & IFF_PROMISC)
1394                 options = 0x0004 ; 
1395         else
1396                 options = 0x0000 ; 
1397
1398         if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */
1399                 xl_priv->xl_copy_all_options = options ; 
1400                 xl_srb_cmd(dev, SET_RECEIVE_MODE) ;
1401                 return ;  
1402         }
1403
1404         dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1405
1406         netdev_for_each_mc_addr(ha, dev) {
1407                 dev_mc_address[0] |= ha->addr[2];
1408                 dev_mc_address[1] |= ha->addr[3];
1409                 dev_mc_address[2] |= ha->addr[4];
1410                 dev_mc_address[3] |= ha->addr[5];
1411         }
1412
1413         if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */
1414                 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ; 
1415                 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ; 
1416         }
1417         return ; 
1418 }
1419
1420
1421 /*
1422  *      We issued an srb command and now we must read
1423  *      the response from the completed command.
1424  */
1425
1426 static void xl_srb_bh(struct net_device *dev) 
1427
1428         struct xl_private *xl_priv = netdev_priv(dev);
1429         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1430         u8 srb_cmd, ret_code ; 
1431         int i ; 
1432
1433         writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1434         srb_cmd = readb(xl_mmio + MMIO_MACDATA) ; 
1435         writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1436         ret_code = readb(xl_mmio + MMIO_MACDATA) ; 
1437
1438         /* Ret_code is standard across all commands */
1439
1440         switch (ret_code) { 
1441         case 1:
1442                 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ; 
1443                 break ; 
1444         case 4:
1445                 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command\n",dev->name,srb_cmd);
1446                 break ;
1447         
1448         case 6:
1449                 printk(KERN_INFO "%s: Command: %d - Options Invalid for command\n",dev->name,srb_cmd);
1450                 break ;
1451
1452         case 0: /* Successful command execution */ 
1453                 switch (srb_cmd) { 
1454                 case READ_LOG: /* Returns 14 bytes of data from the NIC */
1455                         if(xl_priv->xl_message_level)
1456                                 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ; 
1457                         /* 
1458                          * We still have to read the log even if message_level = 0 and we don't want
1459                          * to see it
1460                          */
1461                         for (i=0;i<14;i++) { 
1462                                 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1463                                 if(xl_priv->xl_message_level) 
1464                                         printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ;         
1465                         } 
1466                         printk("\n") ; 
1467                         break ; 
1468                 case SET_FUNC_ADDRESS:
1469                         if(xl_priv->xl_message_level) 
1470                                 printk(KERN_INFO "%s: Functional Address Set\n",dev->name);
1471                         break ; 
1472                 case CLOSE_NIC:
1473                         if(xl_priv->xl_message_level)
1474                                 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler\n",dev->name);
1475                         break ; 
1476                 case SET_MULTICAST_MODE:
1477                         if(xl_priv->xl_message_level)
1478                                 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ; 
1479                         break ;
1480                 case SET_RECEIVE_MODE:
1481                         if(xl_priv->xl_message_level) {  
1482                                 if (xl_priv->xl_copy_all_options == 0x0004) 
1483                                         printk(KERN_INFO "%s: Entering promiscuous mode\n", dev->name);
1484                                 else
1485                                         printk(KERN_INFO "%s: Entering normal receive mode\n",dev->name);
1486                         }
1487                         break ; 
1488  
1489                 } /* switch */
1490                 break ; 
1491         } /* switch */
1492         return ;        
1493
1494
1495 static int xl_set_mac_address (struct net_device *dev, void *addr) 
1496 {
1497         struct sockaddr *saddr = addr ; 
1498         struct xl_private *xl_priv = netdev_priv(dev);
1499
1500         if (netif_running(dev)) { 
1501                 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ; 
1502                 return -EIO ; 
1503         }
1504
1505         memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ; 
1506         
1507         if (xl_priv->xl_message_level) { 
1508                 printk(KERN_INFO "%s: MAC/LAA Set to  = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0],
1509                 xl_priv->xl_laa[1], xl_priv->xl_laa[2],
1510                 xl_priv->xl_laa[3], xl_priv->xl_laa[4],
1511                 xl_priv->xl_laa[5]);
1512         } 
1513
1514         return 0 ; 
1515 }
1516
1517 static void xl_arb_cmd(struct net_device *dev)
1518 {
1519         struct xl_private *xl_priv = netdev_priv(dev);
1520         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1521         u8 arb_cmd ; 
1522         u16 lan_status, lan_status_diff ; 
1523
1524         writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1525         arb_cmd = readb(xl_mmio + MMIO_MACDATA) ; 
1526         
1527         if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */
1528                 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1529                  
1530                 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, swab16(readw(xl_mmio + MMIO_MACDATA) )) ;
1531
1532                 lan_status = swab16(readw(xl_mmio + MMIO_MACDATA));
1533         
1534                 /* Acknowledge interrupt, this tells nic we are done with the arb */
1535                 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1536                         
1537                 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ; 
1538
1539                 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) { 
1540                         if (lan_status_diff & LSC_LWF) 
1541                                 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1542                         if (lan_status_diff & LSC_ARW) 
1543                                 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1544                         if (lan_status_diff & LSC_FPE)
1545                                 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1546                         if (lan_status_diff & LSC_RR) 
1547                                 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1548                 
1549                         /* Adapter has been closed by the hardware */
1550
1551                         netif_stop_queue(dev);
1552                         xl_freemem(dev) ; 
1553                         free_irq(dev->irq,dev);
1554                         
1555                         printk(KERN_WARNING "%s: Adapter has been closed\n", dev->name);
1556                 } /* If serious error */
1557                 
1558                 if (xl_priv->xl_message_level) { 
1559                         if (lan_status_diff & LSC_SIG_LOSS) 
1560                                         printk(KERN_WARNING "%s: No receive signal detected\n", dev->name);
1561                         if (lan_status_diff & LSC_HARD_ERR)
1562                                         printk(KERN_INFO "%s: Beaconing\n",dev->name);
1563                         if (lan_status_diff & LSC_SOFT_ERR)
1564                                         printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame\n",dev->name);
1565                         if (lan_status_diff & LSC_TRAN_BCN) 
1566                                         printk(KERN_INFO "%s: We are transmitting the beacon, aaah\n",dev->name);
1567                         if (lan_status_diff & LSC_SS) 
1568                                         printk(KERN_INFO "%s: Single Station on the ring\n", dev->name);
1569                         if (lan_status_diff & LSC_RING_REC)
1570                                         printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1571                         if (lan_status_diff & LSC_FDX_MODE)
1572                                         printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1573                 }       
1574                 
1575                 if (lan_status_diff & LSC_CO) { 
1576                                 if (xl_priv->xl_message_level) 
1577                                         printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
1578                                 /* Issue READ.LOG command */
1579                                 xl_srb_cmd(dev, READ_LOG) ;     
1580                 }
1581
1582                 /* There is no command in the tech docs to issue the read_sr_counters */
1583                 if (lan_status_diff & LSC_SR_CO) { 
1584                         if (xl_priv->xl_message_level)
1585                                 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1586                 }
1587
1588                 xl_priv->xl_lan_status = lan_status ; 
1589         
1590         }  /* Lan.change.status */
1591         else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */
1592 #if XL_DEBUG
1593                 printk(KERN_INFO "Received.Data\n");
1594 #endif          
1595                 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1596                 xl_priv->mac_buffer = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
1597                 
1598                 /* Now we are going to be really basic here and not do anything
1599                  * with the data at all. The tech docs do not give me enough
1600                  * information to calculate the buffers properly so we're
1601                  * just going to tell the nic that we've dealt with the frame
1602                  * anyway.
1603                  */
1604
1605                 /* Acknowledge interrupt, this tells nic we are done with the arb */
1606                 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 
1607
1608                 /* Is the ASB free ? */         
1609                         
1610                 xl_priv->asb_queued = 0 ;                       
1611                 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1612                 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) { 
1613                         xl_priv->asb_queued = 1 ;
1614
1615                         xl_wait_misr_flags(dev) ;  
1616
1617                         writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD); 
1618                         writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1619                         writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1620                         writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ; 
1621                         return ;        
1622                         /* Drop out and wait for the bottom half to be run */
1623                 }
1624         
1625                 xl_asb_cmd(dev) ; 
1626                 
1627         } else {
1628                 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x\n",dev->name,arb_cmd);
1629         }
1630
1631         /* Acknowledge the arb interrupt */
1632
1633         writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 
1634
1635         return ; 
1636 }
1637
1638
1639 /*
1640  *      There is only one asb command, but we can get called from different
1641  *      places.
1642  */
1643
1644 static void xl_asb_cmd(struct net_device *dev)
1645 {
1646         struct xl_private *xl_priv = netdev_priv(dev);
1647         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1648
1649         if (xl_priv->asb_queued == 1) 
1650                 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; 
1651                 
1652         writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1653         writeb(0x81, xl_mmio + MMIO_MACDATA) ; 
1654
1655         writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1656         writew(swab16(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ;
1657
1658         xl_wait_misr_flags(dev) ;       
1659
1660         writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD); 
1661         writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1662
1663         writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1664         writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ; 
1665
1666         xl_priv->asb_queued = 2 ; 
1667
1668         return ; 
1669 }
1670
1671 /*
1672  *      This will only get called if there was an error
1673  *      from the asb cmd.
1674  */
1675 static void xl_asb_bh(struct net_device *dev) 
1676 {
1677         struct xl_private *xl_priv = netdev_priv(dev);
1678         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1679         u8 ret_code ; 
1680
1681         writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1682         ret_code = readb(xl_mmio + MMIO_MACDATA) ; 
1683         switch (ret_code) { 
1684                 case 0x01:
1685                         printk(KERN_INFO "%s: ASB Command, unrecognized command code\n",dev->name);
1686                         break ;
1687                 case 0x26:
1688                         printk(KERN_INFO "%s: ASB Command, unexpected receive buffer\n", dev->name);
1689                         break ; 
1690                 case 0x40:
1691                         printk(KERN_INFO "%s: ASB Command, Invalid Station ID\n", dev->name);
1692                         break ;  
1693         }
1694         xl_priv->asb_queued = 0 ; 
1695         writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1696         return ;  
1697 }
1698
1699 /*      
1700  *      Issue srb commands to the nic 
1701  */
1702
1703 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) 
1704 {
1705         struct xl_private *xl_priv = netdev_priv(dev);
1706         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1707
1708         switch (srb_cmd) { 
1709         case READ_LOG:
1710                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1711                 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ; 
1712                 break; 
1713
1714         case CLOSE_NIC:
1715                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1716                 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ; 
1717                 break ;
1718
1719         case SET_RECEIVE_MODE:
1720                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1721                 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ; 
1722                 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1723                 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ; 
1724                 break ;
1725
1726         case SET_FUNC_ADDRESS:
1727                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1728                 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ; 
1729                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1730                 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ; 
1731                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1732                 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ; 
1733                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1734                 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ; 
1735                 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1736                 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;
1737                 break ;  
1738         } /* switch */
1739
1740
1741         xl_wait_misr_flags(dev)  ; 
1742
1743         /* Write 0xff to the CSRB flag */
1744         writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1745         writeb(0xFF, xl_mmio + MMIO_MACDATA) ; 
1746         /* Set csrb bit in MISR register to process command */
1747         writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1748         writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ; 
1749         xl_priv->srb_queued = 1 ; 
1750
1751         return ; 
1752 }
1753
1754 /*
1755  * This is nasty, to use the MISR command you have to wait for 6 memory locations
1756  * to be zero. This is the way the driver does on other OS'es so we should be ok with 
1757  * the empty loop.
1758  */
1759
1760 static void xl_wait_misr_flags(struct net_device *dev) 
1761 {
1762         struct xl_private *xl_priv = netdev_priv(dev);
1763         u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 
1764         
1765         int i  ; 
1766         
1767         writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1768         if (readb(xl_mmio + MMIO_MACDATA) != 0) {  /* Misr not clear */
1769                 for (i=0; i<6; i++) { 
1770                         writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1771                         while (readb(xl_mmio + MMIO_MACDATA) != 0) {
1772                                 ;       /* Empty Loop */
1773                         }
1774                 } 
1775         }
1776
1777         writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
1778         writeb(0x80, xl_mmio + MMIO_MACDATA) ; 
1779
1780         return ; 
1781
1782
1783 /*
1784  *      Change mtu size, this should work the same as olympic
1785  */
1786
1787 static int xl_change_mtu(struct net_device *dev, int mtu) 
1788 {
1789         struct xl_private *xl_priv = netdev_priv(dev);
1790         u16 max_mtu ; 
1791
1792         if (xl_priv->xl_ring_speed == 4)
1793                 max_mtu = 4500 ; 
1794         else
1795                 max_mtu = 18000 ; 
1796         
1797         if (mtu > max_mtu)
1798                 return -EINVAL ; 
1799         if (mtu < 100) 
1800                 return -EINVAL ; 
1801
1802         dev->mtu = mtu ; 
1803         xl_priv->pkt_buf_sz = mtu + TR_HLEN ; 
1804
1805         return 0 ; 
1806 }
1807
1808 static void __devexit xl_remove_one (struct pci_dev *pdev)
1809 {
1810         struct net_device *dev = pci_get_drvdata(pdev);
1811         struct xl_private *xl_priv=netdev_priv(dev);
1812         
1813         release_firmware(xl_priv->fw);
1814         unregister_netdev(dev);
1815         iounmap(xl_priv->xl_mmio) ; 
1816         pci_release_regions(pdev) ; 
1817         pci_set_drvdata(pdev,NULL) ; 
1818         free_netdev(dev);
1819         return ; 
1820 }
1821
1822 static struct pci_driver xl_3c359_driver = {
1823         .name           = "3c359",
1824         .id_table       = xl_pci_tbl,
1825         .probe          = xl_probe,
1826         .remove         = __devexit_p(xl_remove_one),
1827 };
1828
1829 module_pci_driver(xl_3c359_driver);
1830
1831 MODULE_LICENSE("GPL") ;