1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
71 /* Interrupt mode names (see INT_MODE())) */
72 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
73 const char *efx_interrupt_mode_names[] = {
74 [EFX_INT_MODE_MSIX] = "MSI-X",
75 [EFX_INT_MODE_MSI] = "MSI",
76 [EFX_INT_MODE_LEGACY] = "legacy",
79 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
80 const char *efx_reset_type_names[] = {
81 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
82 [RESET_TYPE_ALL] = "ALL",
83 [RESET_TYPE_WORLD] = "WORLD",
84 [RESET_TYPE_DISABLE] = "DISABLE",
85 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
86 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
87 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
88 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
89 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
90 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
91 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
94 #define EFX_MAX_MTU (9 * 1024)
96 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
97 * queued onto this work queue. This is not a per-nic work queue, because
98 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
100 static struct workqueue_struct *reset_workqueue;
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static unsigned int separate_tx_channels;
117 module_param(separate_tx_channels, uint, 0644);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
127 * monitor, which checks for known hardware bugs and resets the
128 * hardware and driver as necessary.
130 unsigned int efx_monitor_interval = 1 * HZ;
132 /* This controls whether or not the driver will initialise devices
133 * with invalid MAC addresses stored in the EEPROM or flash. If true,
134 * such devices will be initialised with a random locally-generated
135 * MAC address. This allows for loading the sfc_mtd driver to
136 * reprogram the flash, even if the flash contents (including the MAC
137 * address) have previously been erased.
139 static unsigned int allow_bad_hwaddr;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * The default for RX should strike a balance between increasing the
145 * round-trip latency and reducing overhead.
147 static unsigned int rx_irq_mod_usec = 60;
149 /* Initial interrupt moderation settings. They can be modified after
150 * module load with ethtool.
152 * This default is chosen to ensure that a 10G link does not go idle
153 * while a TX queue is stopped after it has become full. A queue is
154 * restarted when it drops below half full. The time this takes (assuming
155 * worst case 3 descriptors per packet and 1024 descriptors) is
156 * 512 / 3 * 1.2 = 205 usec.
158 static unsigned int tx_irq_mod_usec = 150;
160 /* This is the first interrupt mode to try out of:
165 static unsigned int interrupt_mode;
167 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
168 * i.e. the number of CPUs among which we may distribute simultaneous
169 * interrupt handling.
171 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
172 * The default (0) means to assign an interrupt to each package (level II cache)
174 static unsigned int rss_cpus;
175 module_param(rss_cpus, uint, 0444);
176 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
178 static int phy_flash_cfg;
179 module_param(phy_flash_cfg, int, 0644);
180 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
182 static unsigned irq_adapt_low_thresh = 10000;
183 module_param(irq_adapt_low_thresh, uint, 0644);
184 MODULE_PARM_DESC(irq_adapt_low_thresh,
185 "Threshold score for reducing IRQ moderation");
187 static unsigned irq_adapt_high_thresh = 20000;
188 module_param(irq_adapt_high_thresh, uint, 0644);
189 MODULE_PARM_DESC(irq_adapt_high_thresh,
190 "Threshold score for increasing IRQ moderation");
192 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
193 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
194 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
195 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
196 module_param(debug, uint, 0);
197 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
199 /**************************************************************************
201 * Utility functions and prototypes
203 *************************************************************************/
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_port(struct efx_nic *efx);
206 static void efx_fini_napi(struct efx_nic *efx);
207 static void efx_fini_channels(struct efx_nic *efx);
209 #define EFX_ASSERT_RESET_SERIALISED(efx) \
211 if ((efx->state == STATE_RUNNING) || \
212 (efx->state == STATE_DISABLED)) \
216 /**************************************************************************
218 * Event queue processing
220 *************************************************************************/
222 /* Process channel's event queue
224 * This function is responsible for processing the event queue of a
225 * single channel. The caller must guarantee that this function will
226 * never be concurrently called more than once on the same channel,
227 * though different channels may be being processed concurrently.
229 static int efx_process_channel(struct efx_channel *channel, int budget)
231 struct efx_nic *efx = channel->efx;
234 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
238 spent = efx_nic_process_eventq(channel, budget);
242 /* Deliver last RX packet. */
243 if (channel->rx_pkt) {
244 __efx_rx_packet(channel, channel->rx_pkt,
245 channel->rx_pkt_csummed);
246 channel->rx_pkt = NULL;
249 efx_rx_strategy(channel);
251 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
256 /* Mark channel as finished processing
258 * Note that since we will not receive further interrupts for this
259 * channel before we finish processing and call the eventq_read_ack()
260 * method, there is no need to use the interrupt hold-off timers.
262 static inline void efx_channel_processed(struct efx_channel *channel)
264 /* The interrupt handler for this channel may set work_pending
265 * as soon as we acknowledge the events we've seen. Make sure
266 * it's cleared before then. */
267 channel->work_pending = false;
270 efx_nic_eventq_read_ack(channel);
275 * NAPI guarantees serialisation of polls of the same device, which
276 * provides the guarantee required by efx_process_channel().
278 static int efx_poll(struct napi_struct *napi, int budget)
280 struct efx_channel *channel =
281 container_of(napi, struct efx_channel, napi_str);
282 struct efx_nic *efx = channel->efx;
285 netif_vdbg(efx, intr, efx->net_dev,
286 "channel %d NAPI poll executing on CPU %d\n",
287 channel->channel, raw_smp_processor_id());
289 spent = efx_process_channel(channel, budget);
291 if (spent < budget) {
292 if (channel->channel < efx->n_rx_channels &&
293 efx->irq_rx_adaptive &&
294 unlikely(++channel->irq_count == 1000)) {
295 if (unlikely(channel->irq_mod_score <
296 irq_adapt_low_thresh)) {
297 if (channel->irq_moderation > 1) {
298 channel->irq_moderation -= 1;
299 efx->type->push_irq_moderation(channel);
301 } else if (unlikely(channel->irq_mod_score >
302 irq_adapt_high_thresh)) {
303 if (channel->irq_moderation <
304 efx->irq_rx_moderation) {
305 channel->irq_moderation += 1;
306 efx->type->push_irq_moderation(channel);
309 channel->irq_count = 0;
310 channel->irq_mod_score = 0;
313 /* There is no race here; although napi_disable() will
314 * only wait for napi_complete(), this isn't a problem
315 * since efx_channel_processed() will have no effect if
316 * interrupts have already been disabled.
319 efx_channel_processed(channel);
325 /* Process the eventq of the specified channel immediately on this CPU
327 * Disable hardware generated interrupts, wait for any existing
328 * processing to finish, then directly poll (and ack ) the eventq.
329 * Finally reenable NAPI and interrupts.
331 * Since we are touching interrupts the caller should hold the suspend lock
333 void efx_process_channel_now(struct efx_channel *channel)
335 struct efx_nic *efx = channel->efx;
337 BUG_ON(!channel->enabled);
339 /* Disable interrupts and wait for ISRs to complete */
340 efx_nic_disable_interrupts(efx);
342 synchronize_irq(efx->legacy_irq);
344 synchronize_irq(channel->irq);
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel->napi_str);
349 /* Poll the channel */
350 efx_process_channel(channel, EFX_EVQ_SIZE);
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel);
356 napi_enable(&channel->napi_str);
357 efx_nic_enable_interrupts(efx);
360 /* Create event queue
361 * Event queue memory allocations are done only once. If the channel
362 * is reset, the memory buffer will be reused; this guards against
363 * errors during channel reset and also simplifies interrupt handling.
365 static int efx_probe_eventq(struct efx_channel *channel)
367 netif_dbg(channel->efx, probe, channel->efx->net_dev,
368 "chan %d create event queue\n", channel->channel);
370 return efx_nic_probe_eventq(channel);
373 /* Prepare channel's event queue */
374 static void efx_init_eventq(struct efx_channel *channel)
376 netif_dbg(channel->efx, drv, channel->efx->net_dev,
377 "chan %d init event queue\n", channel->channel);
379 channel->eventq_read_ptr = 0;
381 efx_nic_init_eventq(channel);
384 static void efx_fini_eventq(struct efx_channel *channel)
386 netif_dbg(channel->efx, drv, channel->efx->net_dev,
387 "chan %d fini event queue\n", channel->channel);
389 efx_nic_fini_eventq(channel);
392 static void efx_remove_eventq(struct efx_channel *channel)
394 netif_dbg(channel->efx, drv, channel->efx->net_dev,
395 "chan %d remove event queue\n", channel->channel);
397 efx_nic_remove_eventq(channel);
400 /**************************************************************************
404 *************************************************************************/
406 static int efx_probe_channel(struct efx_channel *channel)
408 struct efx_tx_queue *tx_queue;
409 struct efx_rx_queue *rx_queue;
412 netif_dbg(channel->efx, probe, channel->efx->net_dev,
413 "creating channel %d\n", channel->channel);
415 rc = efx_probe_eventq(channel);
419 efx_for_each_channel_tx_queue(tx_queue, channel) {
420 rc = efx_probe_tx_queue(tx_queue);
425 efx_for_each_channel_rx_queue(rx_queue, channel) {
426 rc = efx_probe_rx_queue(rx_queue);
431 channel->n_rx_frm_trunc = 0;
436 efx_for_each_channel_rx_queue(rx_queue, channel)
437 efx_remove_rx_queue(rx_queue);
439 efx_for_each_channel_tx_queue(tx_queue, channel)
440 efx_remove_tx_queue(tx_queue);
446 static void efx_set_channel_names(struct efx_nic *efx)
448 struct efx_channel *channel;
449 const char *type = "";
452 efx_for_each_channel(channel, efx) {
453 number = channel->channel;
454 if (efx->n_channels > efx->n_rx_channels) {
455 if (channel->channel < efx->n_rx_channels) {
459 number -= efx->n_rx_channels;
462 snprintf(channel->name, sizeof(channel->name),
463 "%s%s-%d", efx->name, type, number);
467 /* Channels are shutdown and reinitialised whilst the NIC is running
468 * to propagate configuration changes (mtu, checksum offload), or
469 * to clear hardware error conditions
471 static void efx_init_channels(struct efx_nic *efx)
473 struct efx_tx_queue *tx_queue;
474 struct efx_rx_queue *rx_queue;
475 struct efx_channel *channel;
477 /* Calculate the rx buffer allocation parameters required to
478 * support the current MTU, including padding for header
479 * alignment and overruns.
481 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
482 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
483 efx->type->rx_buffer_hash_size +
484 efx->type->rx_buffer_padding);
485 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
486 sizeof(struct efx_rx_page_state));
488 /* Initialise the channels */
489 efx_for_each_channel(channel, efx) {
490 netif_dbg(channel->efx, drv, channel->efx->net_dev,
491 "init chan %d\n", channel->channel);
493 efx_init_eventq(channel);
495 efx_for_each_channel_tx_queue(tx_queue, channel)
496 efx_init_tx_queue(tx_queue);
498 /* The rx buffer allocation strategy is MTU dependent */
499 efx_rx_strategy(channel);
501 efx_for_each_channel_rx_queue(rx_queue, channel)
502 efx_init_rx_queue(rx_queue);
504 WARN_ON(channel->rx_pkt != NULL);
505 efx_rx_strategy(channel);
509 /* This enables event queue processing and packet transmission.
511 * Note that this function is not allowed to fail, since that would
512 * introduce too much complexity into the suspend/resume path.
514 static void efx_start_channel(struct efx_channel *channel)
516 struct efx_rx_queue *rx_queue;
518 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
519 "starting chan %d\n", channel->channel);
521 /* The interrupt handler for this channel may set work_pending
522 * as soon as we enable it. Make sure it's cleared before
523 * then. Similarly, make sure it sees the enabled flag set. */
524 channel->work_pending = false;
525 channel->enabled = true;
528 /* Fill the queues before enabling NAPI */
529 efx_for_each_channel_rx_queue(rx_queue, channel)
530 efx_fast_push_rx_descriptors(rx_queue);
532 napi_enable(&channel->napi_str);
535 /* This disables event queue processing and packet transmission.
536 * This function does not guarantee that all queue processing
537 * (e.g. RX refill) is complete.
539 static void efx_stop_channel(struct efx_channel *channel)
541 if (!channel->enabled)
544 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
545 "stop chan %d\n", channel->channel);
547 channel->enabled = false;
548 napi_disable(&channel->napi_str);
551 static void efx_fini_channels(struct efx_nic *efx)
553 struct efx_channel *channel;
554 struct efx_tx_queue *tx_queue;
555 struct efx_rx_queue *rx_queue;
558 EFX_ASSERT_RESET_SERIALISED(efx);
559 BUG_ON(efx->port_enabled);
561 rc = efx_nic_flush_queues(efx);
562 if (rc && EFX_WORKAROUND_7803(efx)) {
563 /* Schedule a reset to recover from the flush failure. The
564 * descriptor caches reference memory we're about to free,
565 * but falcon_reconfigure_mac_wrapper() won't reconnect
566 * the MACs because of the pending reset. */
567 netif_err(efx, drv, efx->net_dev,
568 "Resetting to recover from flush failure\n");
569 efx_schedule_reset(efx, RESET_TYPE_ALL);
571 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
573 netif_dbg(efx, drv, efx->net_dev,
574 "successfully flushed all queues\n");
577 efx_for_each_channel(channel, efx) {
578 netif_dbg(channel->efx, drv, channel->efx->net_dev,
579 "shut down chan %d\n", channel->channel);
581 efx_for_each_channel_rx_queue(rx_queue, channel)
582 efx_fini_rx_queue(rx_queue);
583 efx_for_each_channel_tx_queue(tx_queue, channel)
584 efx_fini_tx_queue(tx_queue);
585 efx_fini_eventq(channel);
589 static void efx_remove_channel(struct efx_channel *channel)
591 struct efx_tx_queue *tx_queue;
592 struct efx_rx_queue *rx_queue;
594 netif_dbg(channel->efx, drv, channel->efx->net_dev,
595 "destroy chan %d\n", channel->channel);
597 efx_for_each_channel_rx_queue(rx_queue, channel)
598 efx_remove_rx_queue(rx_queue);
599 efx_for_each_channel_tx_queue(tx_queue, channel)
600 efx_remove_tx_queue(tx_queue);
601 efx_remove_eventq(channel);
604 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
606 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
609 /**************************************************************************
613 **************************************************************************/
615 /* This ensures that the kernel is kept informed (via
616 * netif_carrier_on/off) of the link status, and also maintains the
617 * link status's stop on the port's TX queue.
619 void efx_link_status_changed(struct efx_nic *efx)
621 struct efx_link_state *link_state = &efx->link_state;
623 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
624 * that no events are triggered between unregister_netdev() and the
625 * driver unloading. A more general condition is that NETDEV_CHANGE
626 * can only be generated between NETDEV_UP and NETDEV_DOWN */
627 if (!netif_running(efx->net_dev))
630 if (efx->port_inhibited) {
631 netif_carrier_off(efx->net_dev);
635 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
636 efx->n_link_state_changes++;
639 netif_carrier_on(efx->net_dev);
641 netif_carrier_off(efx->net_dev);
644 /* Status message for kernel log */
645 if (link_state->up) {
646 netif_info(efx, link, efx->net_dev,
647 "link up at %uMbps %s-duplex (MTU %d)%s\n",
648 link_state->speed, link_state->fd ? "full" : "half",
650 (efx->promiscuous ? " [PROMISC]" : ""));
652 netif_info(efx, link, efx->net_dev, "link down\n");
657 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
659 efx->link_advertising = advertising;
661 if (advertising & ADVERTISED_Pause)
662 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
664 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
665 if (advertising & ADVERTISED_Asym_Pause)
666 efx->wanted_fc ^= EFX_FC_TX;
670 void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type wanted_fc)
672 efx->wanted_fc = wanted_fc;
673 if (efx->link_advertising) {
674 if (wanted_fc & EFX_FC_RX)
675 efx->link_advertising |= (ADVERTISED_Pause |
676 ADVERTISED_Asym_Pause);
678 efx->link_advertising &= ~(ADVERTISED_Pause |
679 ADVERTISED_Asym_Pause);
680 if (wanted_fc & EFX_FC_TX)
681 efx->link_advertising ^= ADVERTISED_Asym_Pause;
685 static void efx_fini_port(struct efx_nic *efx);
687 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
688 * the MAC appropriately. All other PHY configuration changes are pushed
689 * through phy_op->set_settings(), and pushed asynchronously to the MAC
690 * through efx_monitor().
692 * Callers must hold the mac_lock
694 int __efx_reconfigure_port(struct efx_nic *efx)
696 enum efx_phy_mode phy_mode;
699 WARN_ON(!mutex_is_locked(&efx->mac_lock));
701 /* Serialise the promiscuous flag with efx_set_multicast_list. */
702 if (efx_dev_registered(efx)) {
703 netif_addr_lock_bh(efx->net_dev);
704 netif_addr_unlock_bh(efx->net_dev);
707 /* Disable PHY transmit in mac level loopbacks */
708 phy_mode = efx->phy_mode;
709 if (LOOPBACK_INTERNAL(efx))
710 efx->phy_mode |= PHY_MODE_TX_DISABLED;
712 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
714 rc = efx->type->reconfigure_port(efx);
717 efx->phy_mode = phy_mode;
722 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
724 int efx_reconfigure_port(struct efx_nic *efx)
728 EFX_ASSERT_RESET_SERIALISED(efx);
730 mutex_lock(&efx->mac_lock);
731 rc = __efx_reconfigure_port(efx);
732 mutex_unlock(&efx->mac_lock);
737 /* Asynchronous work item for changing MAC promiscuity and multicast
738 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
740 static void efx_mac_work(struct work_struct *data)
742 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
744 mutex_lock(&efx->mac_lock);
745 if (efx->port_enabled) {
746 efx->type->push_multicast_hash(efx);
747 efx->mac_op->reconfigure(efx);
749 mutex_unlock(&efx->mac_lock);
752 static int efx_probe_port(struct efx_nic *efx)
756 netif_dbg(efx, probe, efx->net_dev, "create port\n");
759 efx->phy_mode = PHY_MODE_SPECIAL;
761 /* Connect up MAC/PHY operations table */
762 rc = efx->type->probe_port(efx);
766 /* Sanity check MAC address */
767 if (is_valid_ether_addr(efx->mac_address)) {
768 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
770 netif_err(efx, probe, efx->net_dev, "invalid MAC address %pM\n",
772 if (!allow_bad_hwaddr) {
776 random_ether_addr(efx->net_dev->dev_addr);
777 netif_info(efx, probe, efx->net_dev,
778 "using locally-generated MAC %pM\n",
779 efx->net_dev->dev_addr);
785 efx->type->remove_port(efx);
789 static int efx_init_port(struct efx_nic *efx)
793 netif_dbg(efx, drv, efx->net_dev, "init port\n");
795 mutex_lock(&efx->mac_lock);
797 rc = efx->phy_op->init(efx);
801 efx->port_initialized = true;
803 /* Reconfigure the MAC before creating dma queues (required for
804 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
805 efx->mac_op->reconfigure(efx);
807 /* Ensure the PHY advertises the correct flow control settings */
808 rc = efx->phy_op->reconfigure(efx);
812 mutex_unlock(&efx->mac_lock);
816 efx->phy_op->fini(efx);
818 mutex_unlock(&efx->mac_lock);
822 static void efx_start_port(struct efx_nic *efx)
824 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
825 BUG_ON(efx->port_enabled);
827 mutex_lock(&efx->mac_lock);
828 efx->port_enabled = true;
830 /* efx_mac_work() might have been scheduled after efx_stop_port(),
831 * and then cancelled by efx_flush_all() */
832 efx->type->push_multicast_hash(efx);
833 efx->mac_op->reconfigure(efx);
835 mutex_unlock(&efx->mac_lock);
838 /* Prevent efx_mac_work() and efx_monitor() from working */
839 static void efx_stop_port(struct efx_nic *efx)
841 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
843 mutex_lock(&efx->mac_lock);
844 efx->port_enabled = false;
845 mutex_unlock(&efx->mac_lock);
847 /* Serialise against efx_set_multicast_list() */
848 if (efx_dev_registered(efx)) {
849 netif_addr_lock_bh(efx->net_dev);
850 netif_addr_unlock_bh(efx->net_dev);
854 static void efx_fini_port(struct efx_nic *efx)
856 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
858 if (!efx->port_initialized)
861 efx->phy_op->fini(efx);
862 efx->port_initialized = false;
864 efx->link_state.up = false;
865 efx_link_status_changed(efx);
868 static void efx_remove_port(struct efx_nic *efx)
870 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
872 efx->type->remove_port(efx);
875 /**************************************************************************
879 **************************************************************************/
881 /* This configures the PCI device to enable I/O and DMA. */
882 static int efx_init_io(struct efx_nic *efx)
884 struct pci_dev *pci_dev = efx->pci_dev;
885 dma_addr_t dma_mask = efx->type->max_dma_mask;
888 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
890 rc = pci_enable_device(pci_dev);
892 netif_err(efx, probe, efx->net_dev,
893 "failed to enable PCI device\n");
897 pci_set_master(pci_dev);
899 /* Set the PCI DMA mask. Try all possibilities from our
900 * genuine mask down to 32 bits, because some architectures
901 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
902 * masks event though they reject 46 bit masks.
904 while (dma_mask > 0x7fffffffUL) {
905 if (pci_dma_supported(pci_dev, dma_mask) &&
906 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
911 netif_err(efx, probe, efx->net_dev,
912 "could not find a suitable DMA mask\n");
915 netif_dbg(efx, probe, efx->net_dev,
916 "using DMA mask %llx\n", (unsigned long long) dma_mask);
917 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
919 /* pci_set_consistent_dma_mask() is not *allowed* to
920 * fail with a mask that pci_set_dma_mask() accepted,
921 * but just in case...
923 netif_err(efx, probe, efx->net_dev,
924 "failed to set consistent DMA mask\n");
928 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
929 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
931 netif_err(efx, probe, efx->net_dev,
932 "request for memory BAR failed\n");
936 efx->membase = ioremap_nocache(efx->membase_phys,
937 efx->type->mem_map_size);
939 netif_err(efx, probe, efx->net_dev,
940 "could not map memory BAR at %llx+%x\n",
941 (unsigned long long)efx->membase_phys,
942 efx->type->mem_map_size);
946 netif_dbg(efx, probe, efx->net_dev,
947 "memory BAR at %llx+%x (virtual %p)\n",
948 (unsigned long long)efx->membase_phys,
949 efx->type->mem_map_size, efx->membase);
954 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
956 efx->membase_phys = 0;
958 pci_disable_device(efx->pci_dev);
963 static void efx_fini_io(struct efx_nic *efx)
965 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
968 iounmap(efx->membase);
972 if (efx->membase_phys) {
973 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
974 efx->membase_phys = 0;
977 pci_disable_device(efx->pci_dev);
980 /* Get number of channels wanted. Each channel will have its own IRQ,
981 * 1 RX queue and/or 2 TX queues. */
982 static int efx_wanted_channels(void)
984 cpumask_var_t core_mask;
988 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
990 "sfc: RSS disabled due to allocation failure\n");
995 for_each_online_cpu(cpu) {
996 if (!cpumask_test_cpu(cpu, core_mask)) {
998 cpumask_or(core_mask, core_mask,
999 topology_core_cpumask(cpu));
1003 free_cpumask_var(core_mask);
1007 /* Probe the number and type of interrupts we are able to obtain, and
1008 * the resulting numbers of channels and RX queues.
1010 static void efx_probe_interrupts(struct efx_nic *efx)
1013 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1016 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1017 struct msix_entry xentries[EFX_MAX_CHANNELS];
1020 n_channels = efx_wanted_channels();
1021 if (separate_tx_channels)
1023 n_channels = min(n_channels, max_channels);
1025 for (i = 0; i < n_channels; i++)
1026 xentries[i].entry = i;
1027 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1029 netif_err(efx, drv, efx->net_dev,
1030 "WARNING: Insufficient MSI-X vectors"
1031 " available (%d < %d).\n", rc, n_channels);
1032 netif_err(efx, drv, efx->net_dev,
1033 "WARNING: Performance may be reduced.\n");
1034 EFX_BUG_ON_PARANOID(rc >= n_channels);
1036 rc = pci_enable_msix(efx->pci_dev, xentries,
1041 efx->n_channels = n_channels;
1042 if (separate_tx_channels) {
1043 efx->n_tx_channels =
1044 max(efx->n_channels / 2, 1U);
1045 efx->n_rx_channels =
1046 max(efx->n_channels -
1047 efx->n_tx_channels, 1U);
1049 efx->n_tx_channels = efx->n_channels;
1050 efx->n_rx_channels = efx->n_channels;
1052 for (i = 0; i < n_channels; i++)
1053 efx_get_channel(efx, i)->irq =
1056 /* Fall back to single channel MSI */
1057 efx->interrupt_mode = EFX_INT_MODE_MSI;
1058 netif_err(efx, drv, efx->net_dev,
1059 "could not enable MSI-X\n");
1063 /* Try single interrupt MSI */
1064 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1065 efx->n_channels = 1;
1066 efx->n_rx_channels = 1;
1067 efx->n_tx_channels = 1;
1068 rc = pci_enable_msi(efx->pci_dev);
1070 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1072 netif_err(efx, drv, efx->net_dev,
1073 "could not enable MSI\n");
1074 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1078 /* Assume legacy interrupts */
1079 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1080 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1081 efx->n_rx_channels = 1;
1082 efx->n_tx_channels = 1;
1083 efx->legacy_irq = efx->pci_dev->irq;
1087 static void efx_remove_interrupts(struct efx_nic *efx)
1089 struct efx_channel *channel;
1091 /* Remove MSI/MSI-X interrupts */
1092 efx_for_each_channel(channel, efx)
1094 pci_disable_msi(efx->pci_dev);
1095 pci_disable_msix(efx->pci_dev);
1097 /* Remove legacy interrupt */
1098 efx->legacy_irq = 0;
1101 static void efx_set_channels(struct efx_nic *efx)
1103 struct efx_channel *channel;
1104 struct efx_tx_queue *tx_queue;
1105 struct efx_rx_queue *rx_queue;
1106 unsigned tx_channel_offset =
1107 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1109 efx_for_each_channel(channel, efx) {
1110 if (channel->channel - tx_channel_offset < efx->n_tx_channels) {
1111 channel->tx_queue = &efx->tx_queue[
1112 (channel->channel - tx_channel_offset) *
1114 efx_for_each_channel_tx_queue(tx_queue, channel)
1115 tx_queue->channel = channel;
1119 efx_for_each_rx_queue(rx_queue, efx)
1120 rx_queue->channel = &efx->channel[rx_queue->queue];
1123 static int efx_probe_nic(struct efx_nic *efx)
1128 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1130 /* Carry out hardware-type specific initialisation */
1131 rc = efx->type->probe(efx);
1135 /* Determine the number of channels and queues by trying to hook
1136 * in MSI-X interrupts. */
1137 efx_probe_interrupts(efx);
1139 if (efx->n_channels > 1)
1140 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1141 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1142 efx->rx_indir_table[i] = i % efx->n_rx_channels;
1144 efx_set_channels(efx);
1145 efx->net_dev->real_num_tx_queues = efx->n_tx_channels;
1147 /* Initialise the interrupt moderation settings */
1148 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1153 static void efx_remove_nic(struct efx_nic *efx)
1155 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1157 efx_remove_interrupts(efx);
1158 efx->type->remove(efx);
1161 /**************************************************************************
1163 * NIC startup/shutdown
1165 *************************************************************************/
1167 static int efx_probe_all(struct efx_nic *efx)
1169 struct efx_channel *channel;
1173 rc = efx_probe_nic(efx);
1175 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1180 rc = efx_probe_port(efx);
1182 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1186 /* Create channels */
1187 efx_for_each_channel(channel, efx) {
1188 rc = efx_probe_channel(channel);
1190 netif_err(efx, probe, efx->net_dev,
1191 "failed to create channel %d\n",
1196 efx_set_channel_names(efx);
1201 efx_for_each_channel(channel, efx)
1202 efx_remove_channel(channel);
1203 efx_remove_port(efx);
1205 efx_remove_nic(efx);
1210 /* Called after previous invocation(s) of efx_stop_all, restarts the
1211 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1212 * and ensures that the port is scheduled to be reconfigured.
1213 * This function is safe to call multiple times when the NIC is in any
1215 static void efx_start_all(struct efx_nic *efx)
1217 struct efx_channel *channel;
1219 EFX_ASSERT_RESET_SERIALISED(efx);
1221 /* Check that it is appropriate to restart the interface. All
1222 * of these flags are safe to read under just the rtnl lock */
1223 if (efx->port_enabled)
1225 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1227 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1230 /* Mark the port as enabled so port reconfigurations can start, then
1231 * restart the transmit interface early so the watchdog timer stops */
1232 efx_start_port(efx);
1234 efx_for_each_channel(channel, efx) {
1235 if (efx_dev_registered(efx))
1236 efx_wake_queue(channel);
1237 efx_start_channel(channel);
1240 efx_nic_enable_interrupts(efx);
1242 /* Switch to event based MCDI completions after enabling interrupts.
1243 * If a reset has been scheduled, then we need to stay in polled mode.
1244 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1245 * reset_pending [modified from an atomic context], we instead guarantee
1246 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1247 efx_mcdi_mode_event(efx);
1248 if (efx->reset_pending != RESET_TYPE_NONE)
1249 efx_mcdi_mode_poll(efx);
1251 /* Start the hardware monitor if there is one. Otherwise (we're link
1252 * event driven), we have to poll the PHY because after an event queue
1253 * flush, we could have a missed a link state change */
1254 if (efx->type->monitor != NULL) {
1255 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1256 efx_monitor_interval);
1258 mutex_lock(&efx->mac_lock);
1259 if (efx->phy_op->poll(efx))
1260 efx_link_status_changed(efx);
1261 mutex_unlock(&efx->mac_lock);
1264 efx->type->start_stats(efx);
1267 /* Flush all delayed work. Should only be called when no more delayed work
1268 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1269 * since we're holding the rtnl_lock at this point. */
1270 static void efx_flush_all(struct efx_nic *efx)
1272 /* Make sure the hardware monitor is stopped */
1273 cancel_delayed_work_sync(&efx->monitor_work);
1274 /* Stop scheduled port reconfigurations */
1275 cancel_work_sync(&efx->mac_work);
1278 /* Quiesce hardware and software without bringing the link down.
1279 * Safe to call multiple times, when the nic and interface is in any
1280 * state. The caller is guaranteed to subsequently be in a position
1281 * to modify any hardware and software state they see fit without
1283 static void efx_stop_all(struct efx_nic *efx)
1285 struct efx_channel *channel;
1287 EFX_ASSERT_RESET_SERIALISED(efx);
1289 /* port_enabled can be read safely under the rtnl lock */
1290 if (!efx->port_enabled)
1293 efx->type->stop_stats(efx);
1295 /* Switch to MCDI polling on Siena before disabling interrupts */
1296 efx_mcdi_mode_poll(efx);
1298 /* Disable interrupts and wait for ISR to complete */
1299 efx_nic_disable_interrupts(efx);
1300 if (efx->legacy_irq)
1301 synchronize_irq(efx->legacy_irq);
1302 efx_for_each_channel(channel, efx) {
1304 synchronize_irq(channel->irq);
1307 /* Stop all NAPI processing and synchronous rx refills */
1308 efx_for_each_channel(channel, efx)
1309 efx_stop_channel(channel);
1311 /* Stop all asynchronous port reconfigurations. Since all
1312 * event processing has already been stopped, there is no
1313 * window to loose phy events */
1316 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1319 /* Stop the kernel transmit interface late, so the watchdog
1320 * timer isn't ticking over the flush */
1321 if (efx_dev_registered(efx)) {
1322 struct efx_channel *channel;
1323 efx_for_each_channel(channel, efx)
1324 efx_stop_queue(channel);
1325 netif_tx_lock_bh(efx->net_dev);
1326 netif_tx_unlock_bh(efx->net_dev);
1330 static void efx_remove_all(struct efx_nic *efx)
1332 struct efx_channel *channel;
1334 efx_for_each_channel(channel, efx)
1335 efx_remove_channel(channel);
1336 efx_remove_port(efx);
1337 efx_remove_nic(efx);
1340 /**************************************************************************
1342 * Interrupt moderation
1344 **************************************************************************/
1346 static unsigned irq_mod_ticks(int usecs, int resolution)
1349 return 0; /* cannot receive interrupts ahead of time :-) */
1350 if (usecs < resolution)
1351 return 1; /* never round down to 0 */
1352 return usecs / resolution;
1355 /* Set interrupt moderation parameters */
1356 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1359 struct efx_channel *channel;
1360 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1361 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1363 EFX_ASSERT_RESET_SERIALISED(efx);
1365 efx->irq_rx_adaptive = rx_adaptive;
1366 efx->irq_rx_moderation = rx_ticks;
1367 efx_for_each_channel(channel, efx) {
1368 if (efx_channel_get_rx_queue(channel))
1369 channel->irq_moderation = rx_ticks;
1370 else if (efx_channel_get_tx_queue(channel, 0))
1371 channel->irq_moderation = tx_ticks;
1375 /**************************************************************************
1379 **************************************************************************/
1381 /* Run periodically off the general workqueue. Serialised against
1382 * efx_reconfigure_port via the mac_lock */
1383 static void efx_monitor(struct work_struct *data)
1385 struct efx_nic *efx = container_of(data, struct efx_nic,
1388 netif_vdbg(efx, timer, efx->net_dev,
1389 "hardware monitor executing on CPU %d\n",
1390 raw_smp_processor_id());
1391 BUG_ON(efx->type->monitor == NULL);
1393 /* If the mac_lock is already held then it is likely a port
1394 * reconfiguration is already in place, which will likely do
1395 * most of the work of check_hw() anyway. */
1396 if (!mutex_trylock(&efx->mac_lock))
1398 if (!efx->port_enabled)
1400 efx->type->monitor(efx);
1403 mutex_unlock(&efx->mac_lock);
1405 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1406 efx_monitor_interval);
1409 /**************************************************************************
1413 *************************************************************************/
1416 * Context: process, rtnl_lock() held.
1418 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1420 struct efx_nic *efx = netdev_priv(net_dev);
1421 struct mii_ioctl_data *data = if_mii(ifr);
1423 EFX_ASSERT_RESET_SERIALISED(efx);
1425 /* Convert phy_id from older PRTAD/DEVAD format */
1426 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1427 (data->phy_id & 0xfc00) == 0x0400)
1428 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1430 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1433 /**************************************************************************
1437 **************************************************************************/
1439 static int efx_init_napi(struct efx_nic *efx)
1441 struct efx_channel *channel;
1443 efx_for_each_channel(channel, efx) {
1444 channel->napi_dev = efx->net_dev;
1445 netif_napi_add(channel->napi_dev, &channel->napi_str,
1446 efx_poll, napi_weight);
1451 static void efx_fini_napi(struct efx_nic *efx)
1453 struct efx_channel *channel;
1455 efx_for_each_channel(channel, efx) {
1456 if (channel->napi_dev)
1457 netif_napi_del(&channel->napi_str);
1458 channel->napi_dev = NULL;
1462 /**************************************************************************
1464 * Kernel netpoll interface
1466 *************************************************************************/
1468 #ifdef CONFIG_NET_POLL_CONTROLLER
1470 /* Although in the common case interrupts will be disabled, this is not
1471 * guaranteed. However, all our work happens inside the NAPI callback,
1472 * so no locking is required.
1474 static void efx_netpoll(struct net_device *net_dev)
1476 struct efx_nic *efx = netdev_priv(net_dev);
1477 struct efx_channel *channel;
1479 efx_for_each_channel(channel, efx)
1480 efx_schedule_channel(channel);
1485 /**************************************************************************
1487 * Kernel net device interface
1489 *************************************************************************/
1491 /* Context: process, rtnl_lock() held. */
1492 static int efx_net_open(struct net_device *net_dev)
1494 struct efx_nic *efx = netdev_priv(net_dev);
1495 EFX_ASSERT_RESET_SERIALISED(efx);
1497 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1498 raw_smp_processor_id());
1500 if (efx->state == STATE_DISABLED)
1502 if (efx->phy_mode & PHY_MODE_SPECIAL)
1504 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1507 /* Notify the kernel of the link state polled during driver load,
1508 * before the monitor starts running */
1509 efx_link_status_changed(efx);
1515 /* Context: process, rtnl_lock() held.
1516 * Note that the kernel will ignore our return code; this method
1517 * should really be a void.
1519 static int efx_net_stop(struct net_device *net_dev)
1521 struct efx_nic *efx = netdev_priv(net_dev);
1523 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1524 raw_smp_processor_id());
1526 if (efx->state != STATE_DISABLED) {
1527 /* Stop the device and flush all the channels */
1529 efx_fini_channels(efx);
1530 efx_init_channels(efx);
1536 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1537 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1539 struct efx_nic *efx = netdev_priv(net_dev);
1540 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1542 spin_lock_bh(&efx->stats_lock);
1543 efx->type->update_stats(efx);
1544 spin_unlock_bh(&efx->stats_lock);
1546 stats->rx_packets = mac_stats->rx_packets;
1547 stats->tx_packets = mac_stats->tx_packets;
1548 stats->rx_bytes = mac_stats->rx_bytes;
1549 stats->tx_bytes = mac_stats->tx_bytes;
1550 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1551 stats->multicast = mac_stats->rx_multicast;
1552 stats->collisions = mac_stats->tx_collision;
1553 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1554 mac_stats->rx_length_error);
1555 stats->rx_crc_errors = mac_stats->rx_bad;
1556 stats->rx_frame_errors = mac_stats->rx_align_error;
1557 stats->rx_fifo_errors = mac_stats->rx_overflow;
1558 stats->rx_missed_errors = mac_stats->rx_missed;
1559 stats->tx_window_errors = mac_stats->tx_late_collision;
1561 stats->rx_errors = (stats->rx_length_errors +
1562 stats->rx_crc_errors +
1563 stats->rx_frame_errors +
1564 mac_stats->rx_symbol_error);
1565 stats->tx_errors = (stats->tx_window_errors +
1571 /* Context: netif_tx_lock held, BHs disabled. */
1572 static void efx_watchdog(struct net_device *net_dev)
1574 struct efx_nic *efx = netdev_priv(net_dev);
1576 netif_err(efx, tx_err, efx->net_dev,
1577 "TX stuck with port_enabled=%d: resetting channels\n",
1580 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1584 /* Context: process, rtnl_lock() held. */
1585 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1587 struct efx_nic *efx = netdev_priv(net_dev);
1590 EFX_ASSERT_RESET_SERIALISED(efx);
1592 if (new_mtu > EFX_MAX_MTU)
1597 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1599 efx_fini_channels(efx);
1601 mutex_lock(&efx->mac_lock);
1602 /* Reconfigure the MAC before enabling the dma queues so that
1603 * the RX buffers don't overflow */
1604 net_dev->mtu = new_mtu;
1605 efx->mac_op->reconfigure(efx);
1606 mutex_unlock(&efx->mac_lock);
1608 efx_init_channels(efx);
1614 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1616 struct efx_nic *efx = netdev_priv(net_dev);
1617 struct sockaddr *addr = data;
1618 char *new_addr = addr->sa_data;
1620 EFX_ASSERT_RESET_SERIALISED(efx);
1622 if (!is_valid_ether_addr(new_addr)) {
1623 netif_err(efx, drv, efx->net_dev,
1624 "invalid ethernet MAC address requested: %pM\n",
1629 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1631 /* Reconfigure the MAC */
1632 mutex_lock(&efx->mac_lock);
1633 efx->mac_op->reconfigure(efx);
1634 mutex_unlock(&efx->mac_lock);
1639 /* Context: netif_addr_lock held, BHs disabled. */
1640 static void efx_set_multicast_list(struct net_device *net_dev)
1642 struct efx_nic *efx = netdev_priv(net_dev);
1643 struct netdev_hw_addr *ha;
1644 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1648 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1650 /* Build multicast hash table */
1651 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1652 memset(mc_hash, 0xff, sizeof(*mc_hash));
1654 memset(mc_hash, 0x00, sizeof(*mc_hash));
1655 netdev_for_each_mc_addr(ha, net_dev) {
1656 crc = ether_crc_le(ETH_ALEN, ha->addr);
1657 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1658 set_bit_le(bit, mc_hash->byte);
1661 /* Broadcast packets go through the multicast hash filter.
1662 * ether_crc_le() of the broadcast address is 0xbe2612ff
1663 * so we always add bit 0xff to the mask.
1665 set_bit_le(0xff, mc_hash->byte);
1668 if (efx->port_enabled)
1669 queue_work(efx->workqueue, &efx->mac_work);
1670 /* Otherwise efx_start_port() will do this */
1673 static const struct net_device_ops efx_netdev_ops = {
1674 .ndo_open = efx_net_open,
1675 .ndo_stop = efx_net_stop,
1676 .ndo_get_stats64 = efx_net_stats,
1677 .ndo_tx_timeout = efx_watchdog,
1678 .ndo_start_xmit = efx_hard_start_xmit,
1679 .ndo_validate_addr = eth_validate_addr,
1680 .ndo_do_ioctl = efx_ioctl,
1681 .ndo_change_mtu = efx_change_mtu,
1682 .ndo_set_mac_address = efx_set_mac_address,
1683 .ndo_set_multicast_list = efx_set_multicast_list,
1684 #ifdef CONFIG_NET_POLL_CONTROLLER
1685 .ndo_poll_controller = efx_netpoll,
1689 static void efx_update_name(struct efx_nic *efx)
1691 strcpy(efx->name, efx->net_dev->name);
1692 efx_mtd_rename(efx);
1693 efx_set_channel_names(efx);
1696 static int efx_netdev_event(struct notifier_block *this,
1697 unsigned long event, void *ptr)
1699 struct net_device *net_dev = ptr;
1701 if (net_dev->netdev_ops == &efx_netdev_ops &&
1702 event == NETDEV_CHANGENAME)
1703 efx_update_name(netdev_priv(net_dev));
1708 static struct notifier_block efx_netdev_notifier = {
1709 .notifier_call = efx_netdev_event,
1713 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1715 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1716 return sprintf(buf, "%d\n", efx->phy_type);
1718 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1720 static int efx_register_netdev(struct efx_nic *efx)
1722 struct net_device *net_dev = efx->net_dev;
1725 net_dev->watchdog_timeo = 5 * HZ;
1726 net_dev->irq = efx->pci_dev->irq;
1727 net_dev->netdev_ops = &efx_netdev_ops;
1728 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1730 /* Clear MAC statistics */
1731 efx->mac_op->update_stats(efx);
1732 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1736 rc = dev_alloc_name(net_dev, net_dev->name);
1739 efx_update_name(efx);
1741 rc = register_netdevice(net_dev);
1745 /* Always start with carrier off; PHY events will detect the link */
1746 netif_carrier_off(efx->net_dev);
1750 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1752 netif_err(efx, drv, efx->net_dev,
1753 "failed to init net dev attributes\n");
1754 goto fail_registered;
1761 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1765 unregister_netdev(net_dev);
1769 static void efx_unregister_netdev(struct efx_nic *efx)
1771 struct efx_channel *channel;
1772 struct efx_tx_queue *tx_queue;
1777 BUG_ON(netdev_priv(efx->net_dev) != efx);
1779 /* Free up any skbs still remaining. This has to happen before
1780 * we try to unregister the netdev as running their destructors
1781 * may be needed to get the device ref. count to 0. */
1782 efx_for_each_channel(channel, efx) {
1783 efx_for_each_channel_tx_queue(tx_queue, channel)
1784 efx_release_tx_buffers(tx_queue);
1787 if (efx_dev_registered(efx)) {
1788 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1789 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1790 unregister_netdev(efx->net_dev);
1794 /**************************************************************************
1796 * Device reset and suspend
1798 **************************************************************************/
1800 /* Tears down the entire software state and most of the hardware state
1802 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
1804 EFX_ASSERT_RESET_SERIALISED(efx);
1807 mutex_lock(&efx->mac_lock);
1808 mutex_lock(&efx->spi_lock);
1810 efx_fini_channels(efx);
1811 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1812 efx->phy_op->fini(efx);
1813 efx->type->fini(efx);
1816 /* This function will always ensure that the locks acquired in
1817 * efx_reset_down() are released. A failure return code indicates
1818 * that we were unable to reinitialise the hardware, and the
1819 * driver should be disabled. If ok is false, then the rx and tx
1820 * engines are not restarted, pending a RESET_DISABLE. */
1821 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
1825 EFX_ASSERT_RESET_SERIALISED(efx);
1827 rc = efx->type->init(efx);
1829 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
1836 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1837 rc = efx->phy_op->init(efx);
1840 if (efx->phy_op->reconfigure(efx))
1841 netif_err(efx, drv, efx->net_dev,
1842 "could not restore PHY settings\n");
1845 efx->mac_op->reconfigure(efx);
1847 efx_init_channels(efx);
1849 mutex_unlock(&efx->spi_lock);
1850 mutex_unlock(&efx->mac_lock);
1857 efx->port_initialized = false;
1859 mutex_unlock(&efx->spi_lock);
1860 mutex_unlock(&efx->mac_lock);
1865 /* Reset the NIC using the specified method. Note that the reset may
1866 * fail, in which case the card will be left in an unusable state.
1868 * Caller must hold the rtnl_lock.
1870 int efx_reset(struct efx_nic *efx, enum reset_type method)
1875 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
1876 RESET_TYPE(method));
1878 efx_reset_down(efx, method);
1880 rc = efx->type->reset(efx, method);
1882 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
1886 /* Allow resets to be rescheduled. */
1887 efx->reset_pending = RESET_TYPE_NONE;
1889 /* Reinitialise bus-mastering, which may have been turned off before
1890 * the reset was scheduled. This is still appropriate, even in the
1891 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1892 * can respond to requests. */
1893 pci_set_master(efx->pci_dev);
1896 /* Leave device stopped if necessary */
1897 disabled = rc || method == RESET_TYPE_DISABLE;
1898 rc2 = efx_reset_up(efx, method, !disabled);
1906 dev_close(efx->net_dev);
1907 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
1908 efx->state = STATE_DISABLED;
1910 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
1915 /* The worker thread exists so that code that cannot sleep can
1916 * schedule a reset for later.
1918 static void efx_reset_work(struct work_struct *data)
1920 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
1922 if (efx->reset_pending == RESET_TYPE_NONE)
1925 /* If we're not RUNNING then don't reset. Leave the reset_pending
1926 * flag set so that efx_pci_probe_main will be retried */
1927 if (efx->state != STATE_RUNNING) {
1928 netif_info(efx, drv, efx->net_dev,
1929 "scheduled reset quenched. NIC not RUNNING\n");
1934 (void)efx_reset(efx, efx->reset_pending);
1938 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1940 enum reset_type method;
1942 if (efx->reset_pending != RESET_TYPE_NONE) {
1943 netif_info(efx, drv, efx->net_dev,
1944 "quenching already scheduled reset\n");
1949 case RESET_TYPE_INVISIBLE:
1950 case RESET_TYPE_ALL:
1951 case RESET_TYPE_WORLD:
1952 case RESET_TYPE_DISABLE:
1955 case RESET_TYPE_RX_RECOVERY:
1956 case RESET_TYPE_RX_DESC_FETCH:
1957 case RESET_TYPE_TX_DESC_FETCH:
1958 case RESET_TYPE_TX_SKIP:
1959 method = RESET_TYPE_INVISIBLE;
1961 case RESET_TYPE_MC_FAILURE:
1963 method = RESET_TYPE_ALL;
1968 netif_dbg(efx, drv, efx->net_dev,
1969 "scheduling %s reset for %s\n",
1970 RESET_TYPE(method), RESET_TYPE(type));
1972 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
1973 RESET_TYPE(method));
1975 efx->reset_pending = method;
1977 /* efx_process_channel() will no longer read events once a
1978 * reset is scheduled. So switch back to poll'd MCDI completions. */
1979 efx_mcdi_mode_poll(efx);
1981 queue_work(reset_workqueue, &efx->reset_work);
1984 /**************************************************************************
1986 * List of NICs we support
1988 **************************************************************************/
1990 /* PCI device ID table */
1991 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
1992 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1993 .driver_data = (unsigned long) &falcon_a1_nic_type},
1994 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1995 .driver_data = (unsigned long) &falcon_b0_nic_type},
1996 {PCI_DEVICE(EFX_VENDID_SFC, BETHPAGE_A_P_DEVID),
1997 .driver_data = (unsigned long) &siena_a0_nic_type},
1998 {PCI_DEVICE(EFX_VENDID_SFC, SIENA_A_P_DEVID),
1999 .driver_data = (unsigned long) &siena_a0_nic_type},
2000 {0} /* end of list */
2003 /**************************************************************************
2005 * Dummy PHY/MAC operations
2007 * Can be used for some unimplemented operations
2008 * Needed so all function pointers are valid and do not have to be tested
2011 **************************************************************************/
2012 int efx_port_dummy_op_int(struct efx_nic *efx)
2016 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2017 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
2020 bool efx_port_dummy_op_poll(struct efx_nic *efx)
2025 static struct efx_phy_operations efx_dummy_phy_operations = {
2026 .init = efx_port_dummy_op_int,
2027 .reconfigure = efx_port_dummy_op_int,
2028 .poll = efx_port_dummy_op_poll,
2029 .fini = efx_port_dummy_op_void,
2032 /**************************************************************************
2036 **************************************************************************/
2038 /* This zeroes out and then fills in the invariants in a struct
2039 * efx_nic (including all sub-structures).
2041 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
2042 struct pci_dev *pci_dev, struct net_device *net_dev)
2044 struct efx_channel *channel;
2045 struct efx_tx_queue *tx_queue;
2046 struct efx_rx_queue *rx_queue;
2049 /* Initialise common structures */
2050 memset(efx, 0, sizeof(*efx));
2051 spin_lock_init(&efx->biu_lock);
2052 mutex_init(&efx->mdio_lock);
2053 mutex_init(&efx->spi_lock);
2054 #ifdef CONFIG_SFC_MTD
2055 INIT_LIST_HEAD(&efx->mtd_list);
2057 INIT_WORK(&efx->reset_work, efx_reset_work);
2058 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2059 efx->pci_dev = pci_dev;
2060 efx->msg_enable = debug;
2061 efx->state = STATE_INIT;
2062 efx->reset_pending = RESET_TYPE_NONE;
2063 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2065 efx->net_dev = net_dev;
2066 efx->rx_checksum_enabled = true;
2067 spin_lock_init(&efx->stats_lock);
2068 mutex_init(&efx->mac_lock);
2069 efx->mac_op = type->default_mac_ops;
2070 efx->phy_op = &efx_dummy_phy_operations;
2071 efx->mdio.dev = net_dev;
2072 INIT_WORK(&efx->mac_work, efx_mac_work);
2074 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2075 channel = &efx->channel[i];
2077 channel->channel = i;
2078 channel->work_pending = false;
2079 spin_lock_init(&channel->tx_stop_lock);
2080 atomic_set(&channel->tx_stop_count, 1);
2082 for (i = 0; i < EFX_MAX_TX_QUEUES; i++) {
2083 tx_queue = &efx->tx_queue[i];
2084 tx_queue->efx = efx;
2085 tx_queue->queue = i;
2086 tx_queue->buffer = NULL;
2087 tx_queue->channel = &efx->channel[0]; /* for safety */
2088 tx_queue->tso_headers_free = NULL;
2090 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
2091 rx_queue = &efx->rx_queue[i];
2092 rx_queue->efx = efx;
2093 rx_queue->queue = i;
2094 rx_queue->channel = &efx->channel[0]; /* for safety */
2095 rx_queue->buffer = NULL;
2096 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
2097 (unsigned long)rx_queue);
2102 /* As close as we can get to guaranteeing that we don't overflow */
2103 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
2105 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2107 /* Higher numbered interrupt modes are less capable! */
2108 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2111 /* Would be good to use the net_dev name, but we're too early */
2112 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2114 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2115 if (!efx->workqueue)
2121 static void efx_fini_struct(struct efx_nic *efx)
2123 if (efx->workqueue) {
2124 destroy_workqueue(efx->workqueue);
2125 efx->workqueue = NULL;
2129 /**************************************************************************
2133 **************************************************************************/
2135 /* Main body of final NIC shutdown code
2136 * This is called only at module unload (or hotplug removal).
2138 static void efx_pci_remove_main(struct efx_nic *efx)
2140 efx_nic_fini_interrupt(efx);
2141 efx_fini_channels(efx);
2143 efx->type->fini(efx);
2145 efx_remove_all(efx);
2148 /* Final NIC shutdown
2149 * This is called only at module unload (or hotplug removal).
2151 static void efx_pci_remove(struct pci_dev *pci_dev)
2153 struct efx_nic *efx;
2155 efx = pci_get_drvdata(pci_dev);
2159 /* Mark the NIC as fini, then stop the interface */
2161 efx->state = STATE_FINI;
2162 dev_close(efx->net_dev);
2164 /* Allow any queued efx_resets() to complete */
2167 efx_unregister_netdev(efx);
2169 efx_mtd_remove(efx);
2171 /* Wait for any scheduled resets to complete. No more will be
2172 * scheduled from this point because efx_stop_all() has been
2173 * called, we are no longer registered with driverlink, and
2174 * the net_device's have been removed. */
2175 cancel_work_sync(&efx->reset_work);
2177 efx_pci_remove_main(efx);
2180 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2182 pci_set_drvdata(pci_dev, NULL);
2183 efx_fini_struct(efx);
2184 free_netdev(efx->net_dev);
2187 /* Main body of NIC initialisation
2188 * This is called at module load (or hotplug insertion, theoretically).
2190 static int efx_pci_probe_main(struct efx_nic *efx)
2194 /* Do start-of-day initialisation */
2195 rc = efx_probe_all(efx);
2199 rc = efx_init_napi(efx);
2203 rc = efx->type->init(efx);
2205 netif_err(efx, probe, efx->net_dev,
2206 "failed to initialise NIC\n");
2210 rc = efx_init_port(efx);
2212 netif_err(efx, probe, efx->net_dev,
2213 "failed to initialise port\n");
2217 efx_init_channels(efx);
2219 rc = efx_nic_init_interrupt(efx);
2226 efx_fini_channels(efx);
2229 efx->type->fini(efx);
2233 efx_remove_all(efx);
2238 /* NIC initialisation
2240 * This is called at module load (or hotplug insertion,
2241 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2242 * sets up and registers the network devices with the kernel and hooks
2243 * the interrupt service routine. It does not prepare the device for
2244 * transmission; this is left to the first time one of the network
2245 * interfaces is brought up (i.e. efx_net_open).
2247 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2248 const struct pci_device_id *entry)
2250 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2251 struct net_device *net_dev;
2252 struct efx_nic *efx;
2255 /* Allocate and initialise a struct net_device and struct efx_nic */
2256 net_dev = alloc_etherdev_mq(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES);
2259 net_dev->features |= (type->offload_features | NETIF_F_SG |
2260 NETIF_F_HIGHDMA | NETIF_F_TSO |
2262 if (type->offload_features & NETIF_F_V6_CSUM)
2263 net_dev->features |= NETIF_F_TSO6;
2264 /* Mask for features that also apply to VLAN devices */
2265 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2266 NETIF_F_HIGHDMA | NETIF_F_TSO);
2267 efx = netdev_priv(net_dev);
2268 pci_set_drvdata(pci_dev, efx);
2269 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2270 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2274 netif_info(efx, probe, efx->net_dev,
2275 "Solarflare Communications NIC detected\n");
2277 /* Set up basic I/O (BAR mappings etc) */
2278 rc = efx_init_io(efx);
2282 /* No serialisation is required with the reset path because
2283 * we're in STATE_INIT. */
2284 for (i = 0; i < 5; i++) {
2285 rc = efx_pci_probe_main(efx);
2287 /* Serialise against efx_reset(). No more resets will be
2288 * scheduled since efx_stop_all() has been called, and we
2289 * have not and never have been registered with either
2290 * the rtnetlink or driverlink layers. */
2291 cancel_work_sync(&efx->reset_work);
2294 if (efx->reset_pending != RESET_TYPE_NONE) {
2295 /* If there was a scheduled reset during
2296 * probe, the NIC is probably hosed anyway */
2297 efx_pci_remove_main(efx);
2304 /* Retry if a recoverably reset event has been scheduled */
2305 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2306 (efx->reset_pending != RESET_TYPE_ALL))
2309 efx->reset_pending = RESET_TYPE_NONE;
2313 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2317 /* Switch to the running state before we expose the device to the OS,
2318 * so that dev_open()|efx_start_all() will actually start the device */
2319 efx->state = STATE_RUNNING;
2321 rc = efx_register_netdev(efx);
2325 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2328 efx_mtd_probe(efx); /* allowed to fail */
2333 efx_pci_remove_main(efx);
2338 efx_fini_struct(efx);
2341 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2342 free_netdev(net_dev);
2346 static int efx_pm_freeze(struct device *dev)
2348 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2350 efx->state = STATE_FINI;
2352 netif_device_detach(efx->net_dev);
2355 efx_fini_channels(efx);
2360 static int efx_pm_thaw(struct device *dev)
2362 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2364 efx->state = STATE_INIT;
2366 efx_init_channels(efx);
2368 mutex_lock(&efx->mac_lock);
2369 efx->phy_op->reconfigure(efx);
2370 mutex_unlock(&efx->mac_lock);
2374 netif_device_attach(efx->net_dev);
2376 efx->state = STATE_RUNNING;
2378 efx->type->resume_wol(efx);
2380 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2381 queue_work(reset_workqueue, &efx->reset_work);
2386 static int efx_pm_poweroff(struct device *dev)
2388 struct pci_dev *pci_dev = to_pci_dev(dev);
2389 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2391 efx->type->fini(efx);
2393 efx->reset_pending = RESET_TYPE_NONE;
2395 pci_save_state(pci_dev);
2396 return pci_set_power_state(pci_dev, PCI_D3hot);
2399 /* Used for both resume and restore */
2400 static int efx_pm_resume(struct device *dev)
2402 struct pci_dev *pci_dev = to_pci_dev(dev);
2403 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2406 rc = pci_set_power_state(pci_dev, PCI_D0);
2409 pci_restore_state(pci_dev);
2410 rc = pci_enable_device(pci_dev);
2413 pci_set_master(efx->pci_dev);
2414 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2417 rc = efx->type->init(efx);
2424 static int efx_pm_suspend(struct device *dev)
2429 rc = efx_pm_poweroff(dev);
2435 static struct dev_pm_ops efx_pm_ops = {
2436 .suspend = efx_pm_suspend,
2437 .resume = efx_pm_resume,
2438 .freeze = efx_pm_freeze,
2439 .thaw = efx_pm_thaw,
2440 .poweroff = efx_pm_poweroff,
2441 .restore = efx_pm_resume,
2444 static struct pci_driver efx_pci_driver = {
2445 .name = KBUILD_MODNAME,
2446 .id_table = efx_pci_table,
2447 .probe = efx_pci_probe,
2448 .remove = efx_pci_remove,
2449 .driver.pm = &efx_pm_ops,
2452 /**************************************************************************
2454 * Kernel module interface
2456 *************************************************************************/
2458 module_param(interrupt_mode, uint, 0444);
2459 MODULE_PARM_DESC(interrupt_mode,
2460 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2462 static int __init efx_init_module(void)
2466 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2468 rc = register_netdevice_notifier(&efx_netdev_notifier);
2472 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2473 if (!reset_workqueue) {
2478 rc = pci_register_driver(&efx_pci_driver);
2485 destroy_workqueue(reset_workqueue);
2487 unregister_netdevice_notifier(&efx_netdev_notifier);
2492 static void __exit efx_exit_module(void)
2494 printk(KERN_INFO "Solarflare NET driver unloading\n");
2496 pci_unregister_driver(&efx_pci_driver);
2497 destroy_workqueue(reset_workqueue);
2498 unregister_netdevice_notifier(&efx_netdev_notifier);
2502 module_init(efx_init_module);
2503 module_exit(efx_exit_module);
2505 MODULE_AUTHOR("Solarflare Communications and "
2506 "Michael Brown <mbrown@fensystems.co.uk>");
2507 MODULE_DESCRIPTION("Solarflare Communications network driver");
2508 MODULE_LICENSE("GPL");
2509 MODULE_DEVICE_TABLE(pci, efx_pci_table);