1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "1.3.18-k2"
52 const char ixgbe_driver_version[] = DRV_VERSION;
53 static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
78 /* required last entry */
81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
86 static struct notifier_block dca_notifier = {
87 .notifier_call = ixgbe_notify_dca,
93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION);
98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
104 /* Let firmware take over control of h/w */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
114 /* Let firmware know the driver has taken over */
115 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
117 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
122 * ixgbe_get_hw_dev_name - return device name string
123 * used by hardware layer to print debugging information
125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
127 struct ixgbe_adapter *adapter = hw->back;
128 struct net_device *netdev = adapter->netdev;
133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
138 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
139 index = (int_alloc_entry >> 2) & 0x1F;
140 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
141 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
142 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
143 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
147 struct ixgbe_tx_buffer
150 if (tx_buffer_info->dma) {
151 pci_unmap_page(adapter->pdev,
153 tx_buffer_info->length, PCI_DMA_TODEVICE);
154 tx_buffer_info->dma = 0;
156 if (tx_buffer_info->skb) {
157 dev_kfree_skb_any(tx_buffer_info->skb);
158 tx_buffer_info->skb = NULL;
160 /* tx_buffer_info must be completely set up in the transmit path */
163 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
164 struct ixgbe_ring *tx_ring,
166 union ixgbe_adv_tx_desc *eop_desc)
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of i */
170 adapter->detect_tx_hung = false;
171 if (tx_ring->tx_buffer_info[eop].dma &&
172 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
173 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
174 /* detected Tx unit hang */
175 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
178 " next_to_use <%x>\n"
179 " next_to_clean <%x>\n"
180 "tx_buffer_info[next_to_clean]\n"
181 " time_stamp <%lx>\n"
182 " next_to_watch <%x>\n"
184 " next_to_watch.status <%x>\n",
185 readl(adapter->hw.hw_addr + tx_ring->head),
186 readl(adapter->hw.hw_addr + tx_ring->tail),
187 tx_ring->next_to_use,
188 tx_ring->next_to_clean,
189 tx_ring->tx_buffer_info[eop].time_stamp,
190 eop, jiffies, eop_desc->wb.status);
197 #define IXGBE_MAX_TXD_PWR 14
198 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
200 /* Tx Descriptors needed, worst case */
201 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
207 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
208 * @adapter: board private structure
210 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
211 struct ixgbe_ring *tx_ring)
213 struct net_device *netdev = adapter->netdev;
214 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
215 struct ixgbe_tx_buffer *tx_buffer_info;
217 bool cleaned = false;
218 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
220 i = tx_ring->next_to_clean;
221 eop = tx_ring->tx_buffer_info[i].next_to_watch;
222 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
223 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
226 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
227 tx_buffer_info = &tx_ring->tx_buffer_info[i];
228 cleaned = (i == eop);
230 tx_ring->stats.bytes += tx_buffer_info->length;
232 struct sk_buff *skb = tx_buffer_info->skb;
233 unsigned int segs, bytecount;
234 segs = skb_shinfo(skb)->gso_segs ?: 1;
235 /* multiply data chunks by size of headers */
236 bytecount = ((segs - 1) * skb_headlen(skb)) +
238 total_tx_packets += segs;
239 total_tx_bytes += bytecount;
241 ixgbe_unmap_and_free_tx_resource(adapter,
243 tx_desc->wb.status = 0;
246 if (i == tx_ring->count)
250 tx_ring->stats.packets++;
252 eop = tx_ring->tx_buffer_info[i].next_to_watch;
253 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
255 /* weight of a sort for tx, avoid endless transmit cleanup */
256 if (total_tx_packets >= tx_ring->work_limit)
260 tx_ring->next_to_clean = i;
262 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
263 if (total_tx_packets && netif_carrier_ok(netdev) &&
264 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
265 /* Make sure that anybody stopping the queue after this
266 * sees the new next_to_clean.
269 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
270 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
271 !test_bit(__IXGBE_DOWN, &adapter->state)) {
272 netif_wake_subqueue(netdev, tx_ring->queue_index);
273 adapter->restart_queue++;
276 if (netif_queue_stopped(netdev) &&
277 !test_bit(__IXGBE_DOWN, &adapter->state)) {
278 netif_wake_queue(netdev);
279 adapter->restart_queue++;
284 if (adapter->detect_tx_hung)
285 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
286 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
287 netif_stop_subqueue(netdev, tx_ring->queue_index);
289 netif_stop_queue(netdev);
292 if (total_tx_packets >= tx_ring->work_limit)
293 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
295 tx_ring->total_bytes += total_tx_bytes;
296 tx_ring->total_packets += total_tx_packets;
297 adapter->net_stats.tx_bytes += total_tx_bytes;
298 adapter->net_stats.tx_packets += total_tx_packets;
299 cleaned = total_tx_packets ? true : false;
304 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
305 struct ixgbe_ring *rxr)
309 int q = rxr - adapter->rx_ring;
311 if (rxr->cpu != cpu) {
312 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
313 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
314 rxctrl |= dca_get_tag(cpu);
315 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
316 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
317 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
323 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
324 struct ixgbe_ring *txr)
328 int q = txr - adapter->tx_ring;
330 if (txr->cpu != cpu) {
331 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
332 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
333 txctrl |= dca_get_tag(cpu);
334 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
335 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
341 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
345 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
348 for (i = 0; i < adapter->num_tx_queues; i++) {
349 adapter->tx_ring[i].cpu = -1;
350 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
352 for (i = 0; i < adapter->num_rx_queues; i++) {
353 adapter->rx_ring[i].cpu = -1;
354 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
358 static int __ixgbe_notify_dca(struct device *dev, void *data)
360 struct net_device *netdev = dev_get_drvdata(dev);
361 struct ixgbe_adapter *adapter = netdev_priv(netdev);
362 unsigned long event = *(unsigned long *)data;
365 case DCA_PROVIDER_ADD:
366 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
367 /* Always use CB2 mode, difference is masked
368 * in the CB driver. */
369 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
370 if (dca_add_requester(dev) == 0) {
371 ixgbe_setup_dca(adapter);
374 /* Fall Through since DCA is disabled. */
375 case DCA_PROVIDER_REMOVE:
376 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
377 dca_remove_requester(dev);
378 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
379 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
387 #endif /* CONFIG_DCA */
389 * ixgbe_receive_skb - Send a completed packet up the stack
390 * @adapter: board private structure
391 * @skb: packet to send up
392 * @status: hardware indication of status of receive
393 * @rx_ring: rx descriptor ring (for a specific queue) to setup
394 * @rx_desc: rx descriptor
396 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
397 struct sk_buff *skb, u8 status,
398 struct ixgbe_ring *ring,
399 union ixgbe_adv_rx_desc *rx_desc)
401 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
402 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
404 if (adapter->netdev->features & NETIF_F_LRO &&
405 skb->ip_summed == CHECKSUM_UNNECESSARY) {
406 if (adapter->vlgrp && is_vlan)
407 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
411 lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
412 ring->lro_used = true;
414 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
415 if (adapter->vlgrp && is_vlan)
416 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
418 netif_receive_skb(skb);
420 if (adapter->vlgrp && is_vlan)
421 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
429 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
430 * @adapter: address of board private structure
431 * @status_err: hardware indication of status of receive
432 * @skb: skb currently being received and modified
434 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
438 skb->ip_summed = CHECKSUM_NONE;
440 /* Ignore Checksum bit is set, or rx csum disabled */
441 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
442 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
445 /* if IP and error */
446 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
447 (status_err & IXGBE_RXDADV_ERR_IPE)) {
448 adapter->hw_csum_rx_error++;
452 if (!(status_err & IXGBE_RXD_STAT_L4CS))
455 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
456 adapter->hw_csum_rx_error++;
460 /* It must be a TCP or UDP packet with a valid checksum */
461 skb->ip_summed = CHECKSUM_UNNECESSARY;
462 adapter->hw_csum_rx_good++;
466 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
467 * @adapter: address of board private structure
469 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
470 struct ixgbe_ring *rx_ring,
473 struct net_device *netdev = adapter->netdev;
474 struct pci_dev *pdev = adapter->pdev;
475 union ixgbe_adv_rx_desc *rx_desc;
476 struct ixgbe_rx_buffer *rx_buffer_info;
479 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
481 i = rx_ring->next_to_use;
482 rx_buffer_info = &rx_ring->rx_buffer_info[i];
484 while (cleaned_count--) {
485 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
487 if (!rx_buffer_info->page &&
488 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
489 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
490 if (!rx_buffer_info->page) {
491 adapter->alloc_rx_page_failed++;
494 rx_buffer_info->page_dma =
495 pci_map_page(pdev, rx_buffer_info->page,
496 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
499 if (!rx_buffer_info->skb) {
500 skb = netdev_alloc_skb(netdev, bufsz);
503 adapter->alloc_rx_buff_failed++;
508 * Make buffer alignment 2 beyond a 16 byte boundary
509 * this will result in a 16 byte aligned IP header after
510 * the 14 byte MAC header is removed
512 skb_reserve(skb, NET_IP_ALIGN);
514 rx_buffer_info->skb = skb;
515 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
519 /* Refresh the desc even if buffer_addrs didn't change because
520 * each write-back erases this info. */
521 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
522 rx_desc->read.pkt_addr =
523 cpu_to_le64(rx_buffer_info->page_dma);
524 rx_desc->read.hdr_addr =
525 cpu_to_le64(rx_buffer_info->dma);
527 rx_desc->read.pkt_addr =
528 cpu_to_le64(rx_buffer_info->dma);
532 if (i == rx_ring->count)
534 rx_buffer_info = &rx_ring->rx_buffer_info[i];
537 if (rx_ring->next_to_use != i) {
538 rx_ring->next_to_use = i;
540 i = (rx_ring->count - 1);
543 * Force memory writes to complete before letting h/w
544 * know there are new descriptors to fetch. (Only
545 * applicable for weak-ordered memory model archs,
549 writel(i, adapter->hw.hw_addr + rx_ring->tail);
553 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
554 struct ixgbe_ring *rx_ring,
555 int *work_done, int work_to_do)
557 struct net_device *netdev = adapter->netdev;
558 struct pci_dev *pdev = adapter->pdev;
559 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
560 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
563 u32 upper_len, len, staterr;
565 bool cleaned = false;
566 int cleaned_count = 0;
567 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
569 i = rx_ring->next_to_clean;
571 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
572 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
573 rx_buffer_info = &rx_ring->rx_buffer_info[i];
575 while (staterr & IXGBE_RXD_STAT_DD) {
576 if (*work_done >= work_to_do)
580 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
582 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
584 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
585 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
586 if (hdr_info & IXGBE_RXDADV_SPH)
587 adapter->rx_hdr_split++;
588 if (len > IXGBE_RX_HDR_SIZE)
589 len = IXGBE_RX_HDR_SIZE;
590 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
592 len = le16_to_cpu(rx_desc->wb.upper.length);
595 skb = rx_buffer_info->skb;
596 prefetch(skb->data - NET_IP_ALIGN);
597 rx_buffer_info->skb = NULL;
599 if (len && !skb_shinfo(skb)->nr_frags) {
600 pci_unmap_single(pdev, rx_buffer_info->dma,
601 adapter->rx_buf_len + NET_IP_ALIGN,
607 pci_unmap_page(pdev, rx_buffer_info->page_dma,
608 PAGE_SIZE, PCI_DMA_FROMDEVICE);
609 rx_buffer_info->page_dma = 0;
610 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
611 rx_buffer_info->page, 0, upper_len);
612 rx_buffer_info->page = NULL;
614 skb->len += upper_len;
615 skb->data_len += upper_len;
616 skb->truesize += upper_len;
620 if (i == rx_ring->count)
622 next_buffer = &rx_ring->rx_buffer_info[i];
624 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
628 if (staterr & IXGBE_RXD_STAT_EOP) {
629 rx_ring->stats.packets++;
630 rx_ring->stats.bytes += skb->len;
632 rx_buffer_info->skb = next_buffer->skb;
633 rx_buffer_info->dma = next_buffer->dma;
634 next_buffer->skb = skb;
635 adapter->non_eop_descs++;
639 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
640 dev_kfree_skb_irq(skb);
644 ixgbe_rx_checksum(adapter, staterr, skb);
646 /* probably a little skewed due to removing CRC */
647 total_rx_bytes += skb->len;
650 skb->protocol = eth_type_trans(skb, netdev);
651 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
652 netdev->last_rx = jiffies;
655 rx_desc->wb.upper.status_error = 0;
657 /* return some buffers to hardware, one at a time is too slow */
658 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
659 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
663 /* use prefetched values */
665 rx_buffer_info = next_buffer;
667 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
670 if (rx_ring->lro_used) {
671 lro_flush_all(&rx_ring->lro_mgr);
672 rx_ring->lro_used = false;
675 rx_ring->next_to_clean = i;
676 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
679 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
681 adapter->net_stats.rx_bytes += total_rx_bytes;
682 adapter->net_stats.rx_packets += total_rx_packets;
684 rx_ring->total_packets += total_rx_packets;
685 rx_ring->total_bytes += total_rx_bytes;
686 adapter->net_stats.rx_bytes += total_rx_bytes;
687 adapter->net_stats.rx_packets += total_rx_packets;
692 static int ixgbe_clean_rxonly(struct napi_struct *, int);
694 * ixgbe_configure_msix - Configure MSI-X hardware
695 * @adapter: board private structure
697 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
700 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
702 struct ixgbe_q_vector *q_vector;
703 int i, j, q_vectors, v_idx, r_idx;
706 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
708 /* Populate the IVAR table and set the ITR values to the
709 * corresponding register.
711 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
712 q_vector = &adapter->q_vector[v_idx];
713 /* XXX for_each_bit(...) */
714 r_idx = find_first_bit(q_vector->rxr_idx,
715 adapter->num_rx_queues);
717 for (i = 0; i < q_vector->rxr_count; i++) {
718 j = adapter->rx_ring[r_idx].reg_idx;
719 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
720 r_idx = find_next_bit(q_vector->rxr_idx,
721 adapter->num_rx_queues,
724 r_idx = find_first_bit(q_vector->txr_idx,
725 adapter->num_tx_queues);
727 for (i = 0; i < q_vector->txr_count; i++) {
728 j = adapter->tx_ring[r_idx].reg_idx;
729 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
730 r_idx = find_next_bit(q_vector->txr_idx,
731 adapter->num_tx_queues,
735 /* if this is a tx only vector use half the irq (tx) rate */
736 if (q_vector->txr_count && !q_vector->rxr_count)
737 q_vector->eitr = adapter->tx_eitr;
739 /* rx only or mixed */
740 q_vector->eitr = adapter->rx_eitr;
742 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
743 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
746 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
747 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
749 /* set up to autoclear timer, lsc, and the vectors */
750 mask = IXGBE_EIMS_ENABLE_MASK;
751 mask &= ~IXGBE_EIMS_OTHER;
752 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
759 latency_invalid = 255
763 * ixgbe_update_itr - update the dynamic ITR value based on statistics
764 * @adapter: pointer to adapter
765 * @eitr: eitr setting (ints per sec) to give last timeslice
766 * @itr_setting: current throttle rate in ints/second
767 * @packets: the number of packets during this measurement interval
768 * @bytes: the number of bytes during this measurement interval
770 * Stores a new ITR value based on packets and byte
771 * counts during the last interrupt. The advantage of per interrupt
772 * computation is faster updates and more accurate ITR for the current
773 * traffic pattern. Constants in this function were computed
774 * based on theoretical maximum wire speed and thresholds were set based
775 * on testing data as well as attempting to minimize response time
776 * while increasing bulk throughput.
777 * this functionality is controlled by the InterruptThrottleRate module
778 * parameter (see ixgbe_param.c)
780 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
781 u32 eitr, u8 itr_setting,
782 int packets, int bytes)
784 unsigned int retval = itr_setting;
789 goto update_itr_done;
792 /* simple throttlerate management
793 * 0-20MB/s lowest (100000 ints/s)
794 * 20-100MB/s low (20000 ints/s)
795 * 100-1249MB/s bulk (8000 ints/s)
797 /* what was last interrupt timeslice? */
798 timepassed_us = 1000000/eitr;
799 bytes_perint = bytes / timepassed_us; /* bytes/usec */
801 switch (itr_setting) {
803 if (bytes_perint > adapter->eitr_low)
804 retval = low_latency;
807 if (bytes_perint > adapter->eitr_high)
808 retval = bulk_latency;
809 else if (bytes_perint <= adapter->eitr_low)
810 retval = lowest_latency;
813 if (bytes_perint <= adapter->eitr_high)
814 retval = low_latency;
822 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
824 struct ixgbe_adapter *adapter = q_vector->adapter;
825 struct ixgbe_hw *hw = &adapter->hw;
827 u8 current_itr, ret_itr;
828 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
829 sizeof(struct ixgbe_q_vector);
830 struct ixgbe_ring *rx_ring, *tx_ring;
832 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
833 for (i = 0; i < q_vector->txr_count; i++) {
834 tx_ring = &(adapter->tx_ring[r_idx]);
835 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
837 tx_ring->total_packets,
838 tx_ring->total_bytes);
839 /* if the result for this queue would decrease interrupt
840 * rate for this vector then use that result */
841 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
842 q_vector->tx_eitr - 1 : ret_itr);
843 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
847 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
848 for (i = 0; i < q_vector->rxr_count; i++) {
849 rx_ring = &(adapter->rx_ring[r_idx]);
850 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
852 rx_ring->total_packets,
853 rx_ring->total_bytes);
854 /* if the result for this queue would decrease interrupt
855 * rate for this vector then use that result */
856 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
857 q_vector->rx_eitr - 1 : ret_itr);
858 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
862 current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
864 switch (current_itr) {
865 /* counts and packets in update_itr are dependent on these numbers */
870 new_itr = 20000; /* aka hwitr = ~200 */
878 if (new_itr != q_vector->eitr) {
880 /* do an exponential smoothing */
881 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
882 q_vector->eitr = new_itr;
883 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
884 /* must write high and low 16 bits to reset counter */
885 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
887 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
893 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
895 struct net_device *netdev = data;
896 struct ixgbe_adapter *adapter = netdev_priv(netdev);
897 struct ixgbe_hw *hw = &adapter->hw;
898 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
900 if (eicr & IXGBE_EICR_LSC) {
902 if (!test_bit(__IXGBE_DOWN, &adapter->state))
903 mod_timer(&adapter->watchdog_timer, jiffies);
906 if (!test_bit(__IXGBE_DOWN, &adapter->state))
907 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
912 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
914 struct ixgbe_q_vector *q_vector = data;
915 struct ixgbe_adapter *adapter = q_vector->adapter;
916 struct ixgbe_ring *txr;
919 if (!q_vector->txr_count)
922 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
923 for (i = 0; i < q_vector->txr_count; i++) {
924 txr = &(adapter->tx_ring[r_idx]);
926 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
927 ixgbe_update_tx_dca(adapter, txr);
929 txr->total_bytes = 0;
930 txr->total_packets = 0;
931 ixgbe_clean_tx_irq(adapter, txr);
932 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
940 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
942 * @data: pointer to our q_vector struct for this interrupt vector
944 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
946 struct ixgbe_q_vector *q_vector = data;
947 struct ixgbe_adapter *adapter = q_vector->adapter;
948 struct ixgbe_ring *rxr;
951 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
952 if (!q_vector->rxr_count)
955 rxr = &(adapter->rx_ring[r_idx]);
956 /* disable interrupts on this vector only */
957 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->v_idx);
958 rxr->total_bytes = 0;
959 rxr->total_packets = 0;
960 netif_rx_schedule(adapter->netdev, &q_vector->napi);
965 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
967 ixgbe_msix_clean_rx(irq, data);
968 ixgbe_msix_clean_tx(irq, data);
974 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
975 * @napi: napi struct with our devices info in it
976 * @budget: amount of work driver is allowed to do this pass, in packets
979 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
981 struct ixgbe_q_vector *q_vector =
982 container_of(napi, struct ixgbe_q_vector, napi);
983 struct ixgbe_adapter *adapter = q_vector->adapter;
984 struct ixgbe_ring *rxr;
988 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
989 rxr = &(adapter->rx_ring[r_idx]);
991 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
992 ixgbe_update_rx_dca(adapter, rxr);
995 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
997 /* If all Rx work done, exit the polling mode */
998 if (work_done < budget) {
999 netif_rx_complete(adapter->netdev, napi);
1000 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1001 ixgbe_set_itr_msix(q_vector);
1002 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1003 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rxr->v_idx);
1009 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1012 a->q_vector[v_idx].adapter = a;
1013 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1014 a->q_vector[v_idx].rxr_count++;
1015 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1018 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1021 a->q_vector[v_idx].adapter = a;
1022 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1023 a->q_vector[v_idx].txr_count++;
1024 a->tx_ring[r_idx].v_idx = 1 << v_idx;
1028 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1029 * @adapter: board private structure to initialize
1030 * @vectors: allotted vector count for descriptor rings
1032 * This function maps descriptor rings to the queue-specific vectors
1033 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1034 * one vector per ring/queue, but on a constrained vector budget, we
1035 * group the rings as "efficiently" as possible. You would add new
1036 * mapping configurations in here.
1038 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1042 int rxr_idx = 0, txr_idx = 0;
1043 int rxr_remaining = adapter->num_rx_queues;
1044 int txr_remaining = adapter->num_tx_queues;
1049 /* No mapping required if MSI-X is disabled. */
1050 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1054 * The ideal configuration...
1055 * We have enough vectors to map one per queue.
1057 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1058 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1059 map_vector_to_rxq(adapter, v_start, rxr_idx);
1061 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1062 map_vector_to_txq(adapter, v_start, txr_idx);
1068 * If we don't have enough vectors for a 1-to-1
1069 * mapping, we'll have to group them so there are
1070 * multiple queues per vector.
1072 /* Re-adjusting *qpv takes care of the remainder. */
1073 for (i = v_start; i < vectors; i++) {
1074 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1075 for (j = 0; j < rqpv; j++) {
1076 map_vector_to_rxq(adapter, i, rxr_idx);
1081 for (i = v_start; i < vectors; i++) {
1082 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1083 for (j = 0; j < tqpv; j++) {
1084 map_vector_to_txq(adapter, i, txr_idx);
1095 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1096 * @adapter: board private structure
1098 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1099 * interrupts from the kernel.
1101 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1103 struct net_device *netdev = adapter->netdev;
1104 irqreturn_t (*handler)(int, void *);
1105 int i, vector, q_vectors, err;
1107 /* Decrement for Other and TCP Timer vectors */
1108 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1110 /* Map the Tx/Rx rings to the vectors we were allotted. */
1111 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1115 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1116 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1117 &ixgbe_msix_clean_many)
1118 for (vector = 0; vector < q_vectors; vector++) {
1119 handler = SET_HANDLER(&adapter->q_vector[vector]);
1120 sprintf(adapter->name[vector], "%s:v%d-%s",
1121 netdev->name, vector,
1122 (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1123 ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1124 err = request_irq(adapter->msix_entries[vector].vector,
1125 handler, 0, adapter->name[vector],
1126 &(adapter->q_vector[vector]));
1129 "request_irq failed for MSIX interrupt "
1130 "Error: %d\n", err);
1131 goto free_queue_irqs;
1135 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1136 err = request_irq(adapter->msix_entries[vector].vector,
1137 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1140 "request_irq for msix_lsc failed: %d\n", err);
1141 goto free_queue_irqs;
1147 for (i = vector - 1; i >= 0; i--)
1148 free_irq(adapter->msix_entries[--vector].vector,
1149 &(adapter->q_vector[i]));
1150 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1151 pci_disable_msix(adapter->pdev);
1152 kfree(adapter->msix_entries);
1153 adapter->msix_entries = NULL;
1158 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1160 struct ixgbe_hw *hw = &adapter->hw;
1161 struct ixgbe_q_vector *q_vector = adapter->q_vector;
1163 u32 new_itr = q_vector->eitr;
1164 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1165 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1167 q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1169 tx_ring->total_packets,
1170 tx_ring->total_bytes);
1171 q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1173 rx_ring->total_packets,
1174 rx_ring->total_bytes);
1176 current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1178 switch (current_itr) {
1179 /* counts and packets in update_itr are dependent on these numbers */
1180 case lowest_latency:
1184 new_itr = 20000; /* aka hwitr = ~200 */
1193 if (new_itr != q_vector->eitr) {
1195 /* do an exponential smoothing */
1196 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1197 q_vector->eitr = new_itr;
1198 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1199 /* must write high and low 16 bits to reset counter */
1200 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1206 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1209 * ixgbe_intr - legacy mode Interrupt Handler
1210 * @irq: interrupt number
1211 * @data: pointer to a network interface device structure
1212 * @pt_regs: CPU registers structure
1214 static irqreturn_t ixgbe_intr(int irq, void *data)
1216 struct net_device *netdev = data;
1217 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1218 struct ixgbe_hw *hw = &adapter->hw;
1222 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1223 * therefore no explict interrupt disable is necessary */
1224 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1226 return IRQ_NONE; /* Not our interrupt */
1228 if (eicr & IXGBE_EICR_LSC) {
1230 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1231 mod_timer(&adapter->watchdog_timer, jiffies);
1235 if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1236 adapter->tx_ring[0].total_packets = 0;
1237 adapter->tx_ring[0].total_bytes = 0;
1238 adapter->rx_ring[0].total_packets = 0;
1239 adapter->rx_ring[0].total_bytes = 0;
1240 /* would disable interrupts here but EIAM disabled it */
1241 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1247 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1249 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1251 for (i = 0; i < q_vectors; i++) {
1252 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1253 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1254 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1255 q_vector->rxr_count = 0;
1256 q_vector->txr_count = 0;
1261 * ixgbe_request_irq - initialize interrupts
1262 * @adapter: board private structure
1264 * Attempts to configure interrupts using the best available
1265 * capabilities of the hardware and kernel.
1267 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1269 struct net_device *netdev = adapter->netdev;
1272 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1273 err = ixgbe_request_msix_irqs(adapter);
1274 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1275 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1276 netdev->name, netdev);
1278 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1279 netdev->name, netdev);
1283 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1288 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1290 struct net_device *netdev = adapter->netdev;
1292 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1295 q_vectors = adapter->num_msix_vectors;
1298 free_irq(adapter->msix_entries[i].vector, netdev);
1301 for (; i >= 0; i--) {
1302 free_irq(adapter->msix_entries[i].vector,
1303 &(adapter->q_vector[i]));
1306 ixgbe_reset_q_vectors(adapter);
1308 free_irq(adapter->pdev->irq, netdev);
1313 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1314 * @adapter: board private structure
1316 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1318 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1319 IXGBE_WRITE_FLUSH(&adapter->hw);
1320 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1322 for (i = 0; i < adapter->num_msix_vectors; i++)
1323 synchronize_irq(adapter->msix_entries[i].vector);
1325 synchronize_irq(adapter->pdev->irq);
1330 * ixgbe_irq_enable - Enable default interrupt generation settings
1331 * @adapter: board private structure
1333 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1336 mask = IXGBE_EIMS_ENABLE_MASK;
1337 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1338 IXGBE_WRITE_FLUSH(&adapter->hw);
1342 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1345 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1347 struct ixgbe_hw *hw = &adapter->hw;
1349 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1350 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1352 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1353 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1355 map_vector_to_rxq(adapter, 0, 0);
1356 map_vector_to_txq(adapter, 0, 0);
1358 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1362 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
1363 * @adapter: board private structure
1365 * Configure the Tx unit of the MAC after a reset.
1367 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1370 struct ixgbe_hw *hw = &adapter->hw;
1371 u32 i, j, tdlen, txctrl;
1373 /* Setup the HW Tx Head and Tail descriptor pointers */
1374 for (i = 0; i < adapter->num_tx_queues; i++) {
1375 j = adapter->tx_ring[i].reg_idx;
1376 tdba = adapter->tx_ring[i].dma;
1377 tdlen = adapter->tx_ring[i].count *
1378 sizeof(union ixgbe_adv_tx_desc);
1379 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1380 (tdba & DMA_32BIT_MASK));
1381 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1382 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1383 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1384 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1385 adapter->tx_ring[i].head = IXGBE_TDH(j);
1386 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1387 /* Disable Tx Head Writeback RO bit, since this hoses
1388 * bookkeeping if things aren't delivered in order.
1390 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1391 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1392 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl);
1396 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1397 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1399 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1401 * ixgbe_get_skb_hdr - helper function for LRO header processing
1402 * @skb: pointer to sk_buff to be added to LRO packet
1403 * @iphdr: pointer to tcp header structure
1404 * @tcph: pointer to tcp header structure
1405 * @hdr_flags: pointer to header flags
1406 * @priv: private data
1408 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1409 u64 *hdr_flags, void *priv)
1411 union ixgbe_adv_rx_desc *rx_desc = priv;
1413 /* Verify that this is a valid IPv4 TCP packet */
1414 if (!(rx_desc->wb.lower.lo_dword.pkt_info &
1415 (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)))
1418 /* Set network headers */
1419 skb_reset_network_header(skb);
1420 skb_set_transport_header(skb, ip_hdrlen(skb));
1421 *iphdr = ip_hdr(skb);
1422 *tcph = tcp_hdr(skb);
1423 *hdr_flags = LRO_IPV4 | LRO_TCP;
1428 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
1429 * @adapter: board private structure
1431 * Configure the Rx unit of the MAC after a reset.
1433 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1436 struct ixgbe_hw *hw = &adapter->hw;
1437 struct net_device *netdev = adapter->netdev;
1438 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1440 u32 rdlen, rxctrl, rxcsum;
1444 u32 reta = 0, mrqc, srrctl;
1446 /* Decide whether to use packet split mode or not */
1447 if (netdev->mtu > ETH_DATA_LEN)
1448 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1450 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1452 /* Set the RX buffer length according to the mode */
1453 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1454 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
1456 if (netdev->mtu <= ETH_DATA_LEN)
1457 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1459 adapter->rx_buf_len = ALIGN(max_frame, 1024);
1462 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1463 fctrl |= IXGBE_FCTRL_BAM;
1464 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1465 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1467 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1468 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1469 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1471 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1472 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1474 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1476 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1477 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1478 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1480 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1481 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1482 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1483 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1484 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1485 IXGBE_SRRCTL_BSIZEHDR_MASK);
1487 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1489 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1491 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1494 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1496 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1498 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1499 /* disable receives while setting up the descriptors */
1500 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1501 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1503 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1504 * the Base and Length of the Rx Descriptor Ring */
1505 for (i = 0; i < adapter->num_rx_queues; i++) {
1506 rdba = adapter->rx_ring[i].dma;
1507 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1508 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1509 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1510 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1511 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1512 adapter->rx_ring[i].head = IXGBE_RDH(i);
1513 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1516 /* Intitial LRO Settings */
1517 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1518 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1519 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1520 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1521 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1522 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1523 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1524 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1525 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1527 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1528 /* Fill out redirection table */
1529 for (i = 0, j = 0; i < 128; i++, j++) {
1530 if (j == adapter->ring_feature[RING_F_RSS].indices)
1532 /* reta = 4-byte sliding window of
1533 * 0x00..(indices-1)(indices-1)00..etc. */
1534 reta = (reta << 8) | (j * 0x11);
1536 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1539 /* Fill out hash function seeds */
1540 /* XXX use a random constant here to glue certain flows */
1541 get_random_bytes(&random[0], 40);
1542 for (i = 0; i < 10; i++)
1543 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]);
1545 mrqc = IXGBE_MRQC_RSSEN
1546 /* Perform hash on these packet types */
1547 | IXGBE_MRQC_RSS_FIELD_IPV4
1548 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1549 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1550 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1551 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1552 | IXGBE_MRQC_RSS_FIELD_IPV6
1553 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1554 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1555 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1556 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1559 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1561 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1562 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1563 /* Disable indicating checksum in descriptor, enables
1565 rxcsum |= IXGBE_RXCSUM_PCSD;
1567 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1568 /* Enable IPv4 payload checksum for UDP fragments
1569 * if PCSD is not set */
1570 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1573 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1576 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1577 struct vlan_group *grp)
1579 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1582 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1583 ixgbe_irq_disable(adapter);
1584 adapter->vlgrp = grp;
1587 /* enable VLAN tag insert/strip */
1588 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1589 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1590 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1591 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1594 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1595 ixgbe_irq_enable(adapter);
1598 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1600 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1602 /* add VID to filter table */
1603 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1606 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1608 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1610 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1611 ixgbe_irq_disable(adapter);
1613 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1615 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1616 ixgbe_irq_enable(adapter);
1618 /* remove VID from filter table */
1619 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1622 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1624 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1626 if (adapter->vlgrp) {
1628 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1629 if (!vlan_group_get_device(adapter->vlgrp, vid))
1631 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1637 * ixgbe_set_multi - Multicast and Promiscuous mode set
1638 * @netdev: network interface device structure
1640 * The set_multi entry point is called whenever the multicast address
1641 * list or the network interface flags are updated. This routine is
1642 * responsible for configuring the hardware for proper multicast,
1643 * promiscuous mode, and all-multi behavior.
1645 static void ixgbe_set_multi(struct net_device *netdev)
1647 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1648 struct ixgbe_hw *hw = &adapter->hw;
1649 struct dev_mc_list *mc_ptr;
1654 /* Check for Promiscuous and All Multicast modes */
1656 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1658 if (netdev->flags & IFF_PROMISC) {
1659 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1660 } else if (netdev->flags & IFF_ALLMULTI) {
1661 fctrl |= IXGBE_FCTRL_MPE;
1662 fctrl &= ~IXGBE_FCTRL_UPE;
1664 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1667 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1669 if (netdev->mc_count) {
1670 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1674 /* Shared function expects packed array of only addresses. */
1675 mc_ptr = netdev->mc_list;
1677 for (i = 0; i < netdev->mc_count; i++) {
1680 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1682 mc_ptr = mc_ptr->next;
1685 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1688 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1693 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1696 struct ixgbe_q_vector *q_vector;
1697 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1699 /* legacy and MSI only use one vector */
1700 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1703 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1704 q_vector = &adapter->q_vector[q_idx];
1705 if (!q_vector->rxr_count)
1707 napi_enable(&q_vector->napi);
1711 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1714 struct ixgbe_q_vector *q_vector;
1715 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1717 /* legacy and MSI only use one vector */
1718 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1721 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1722 q_vector = &adapter->q_vector[q_idx];
1723 if (!q_vector->rxr_count)
1725 napi_disable(&q_vector->napi);
1729 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1731 struct net_device *netdev = adapter->netdev;
1734 ixgbe_set_multi(netdev);
1736 ixgbe_restore_vlan(adapter);
1738 ixgbe_configure_tx(adapter);
1739 ixgbe_configure_rx(adapter);
1740 for (i = 0; i < adapter->num_rx_queues; i++)
1741 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1742 (adapter->rx_ring[i].count - 1));
1745 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1747 struct net_device *netdev = adapter->netdev;
1748 struct ixgbe_hw *hw = &adapter->hw;
1750 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1751 u32 txdctl, rxdctl, mhadd;
1754 ixgbe_get_hw_control(adapter);
1756 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1757 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1758 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1759 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1760 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1765 /* XXX: to interrupt immediately for EICS writes, enable this */
1766 /* gpie |= IXGBE_GPIE_EIMEN; */
1767 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1770 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1771 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1772 * specifically only auto mask tx and rx interrupts */
1773 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1776 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1777 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1778 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1779 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1781 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1784 for (i = 0; i < adapter->num_tx_queues; i++) {
1785 j = adapter->tx_ring[i].reg_idx;
1786 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1787 txdctl |= IXGBE_TXDCTL_ENABLE;
1788 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1791 for (i = 0; i < adapter->num_rx_queues; i++) {
1792 j = adapter->rx_ring[i].reg_idx;
1793 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1794 /* enable PTHRESH=32 descriptors (half the internal cache)
1795 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1796 * this also removes a pesky rx_no_buffer_count increment */
1798 rxdctl |= IXGBE_RXDCTL_ENABLE;
1799 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1801 /* enable all receives */
1802 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1803 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1804 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1806 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1807 ixgbe_configure_msix(adapter);
1809 ixgbe_configure_msi_and_legacy(adapter);
1811 clear_bit(__IXGBE_DOWN, &adapter->state);
1812 ixgbe_napi_enable_all(adapter);
1814 /* clear any pending interrupts, may auto mask */
1815 IXGBE_READ_REG(hw, IXGBE_EICR);
1817 ixgbe_irq_enable(adapter);
1819 /* bring the link up in the watchdog, this could race with our first
1820 * link up interrupt but shouldn't be a problem */
1821 mod_timer(&adapter->watchdog_timer, jiffies);
1825 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1827 WARN_ON(in_interrupt());
1828 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1830 ixgbe_down(adapter);
1832 clear_bit(__IXGBE_RESETTING, &adapter->state);
1835 int ixgbe_up(struct ixgbe_adapter *adapter)
1837 /* hardware has been reset, we need to reload some things */
1838 ixgbe_configure(adapter);
1840 return ixgbe_up_complete(adapter);
1843 void ixgbe_reset(struct ixgbe_adapter *adapter)
1845 if (ixgbe_init_hw(&adapter->hw))
1846 DPRINTK(PROBE, ERR, "Hardware Error\n");
1848 /* reprogram the RAR[0] in case user changed it. */
1849 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1854 static int ixgbe_resume(struct pci_dev *pdev)
1856 struct net_device *netdev = pci_get_drvdata(pdev);
1857 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1860 pci_set_power_state(pdev, PCI_D0);
1861 pci_restore_state(pdev);
1862 err = pci_enable_device(pdev);
1864 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1868 pci_set_master(pdev);
1870 pci_enable_wake(pdev, PCI_D3hot, 0);
1871 pci_enable_wake(pdev, PCI_D3cold, 0);
1873 if (netif_running(netdev)) {
1874 err = ixgbe_request_irq(adapter);
1879 ixgbe_reset(adapter);
1881 if (netif_running(netdev))
1884 netif_device_attach(netdev);
1891 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1892 * @adapter: board private structure
1893 * @rx_ring: ring to free buffers from
1895 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1896 struct ixgbe_ring *rx_ring)
1898 struct pci_dev *pdev = adapter->pdev;
1902 /* Free all the Rx ring sk_buffs */
1904 for (i = 0; i < rx_ring->count; i++) {
1905 struct ixgbe_rx_buffer *rx_buffer_info;
1907 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1908 if (rx_buffer_info->dma) {
1909 pci_unmap_single(pdev, rx_buffer_info->dma,
1910 adapter->rx_buf_len,
1911 PCI_DMA_FROMDEVICE);
1912 rx_buffer_info->dma = 0;
1914 if (rx_buffer_info->skb) {
1915 dev_kfree_skb(rx_buffer_info->skb);
1916 rx_buffer_info->skb = NULL;
1918 if (!rx_buffer_info->page)
1920 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1921 PCI_DMA_FROMDEVICE);
1922 rx_buffer_info->page_dma = 0;
1924 put_page(rx_buffer_info->page);
1925 rx_buffer_info->page = NULL;
1928 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1929 memset(rx_ring->rx_buffer_info, 0, size);
1931 /* Zero out the descriptor ring */
1932 memset(rx_ring->desc, 0, rx_ring->size);
1934 rx_ring->next_to_clean = 0;
1935 rx_ring->next_to_use = 0;
1937 writel(0, adapter->hw.hw_addr + rx_ring->head);
1938 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1942 * ixgbe_clean_tx_ring - Free Tx Buffers
1943 * @adapter: board private structure
1944 * @tx_ring: ring to be cleaned
1946 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1947 struct ixgbe_ring *tx_ring)
1949 struct ixgbe_tx_buffer *tx_buffer_info;
1953 /* Free all the Tx ring sk_buffs */
1955 for (i = 0; i < tx_ring->count; i++) {
1956 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1957 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1960 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1961 memset(tx_ring->tx_buffer_info, 0, size);
1963 /* Zero out the descriptor ring */
1964 memset(tx_ring->desc, 0, tx_ring->size);
1966 tx_ring->next_to_use = 0;
1967 tx_ring->next_to_clean = 0;
1969 writel(0, adapter->hw.hw_addr + tx_ring->head);
1970 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1974 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1975 * @adapter: board private structure
1977 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1981 for (i = 0; i < adapter->num_rx_queues; i++)
1982 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1986 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1987 * @adapter: board private structure
1989 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1993 for (i = 0; i < adapter->num_tx_queues; i++)
1994 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1997 void ixgbe_down(struct ixgbe_adapter *adapter)
1999 struct net_device *netdev = adapter->netdev;
2002 /* signal that we are down to the interrupt handler */
2003 set_bit(__IXGBE_DOWN, &adapter->state);
2005 /* disable receives */
2006 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2007 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2008 rxctrl & ~IXGBE_RXCTRL_RXEN);
2010 netif_tx_disable(netdev);
2012 /* disable transmits in the hardware */
2014 /* flush both disables */
2015 IXGBE_WRITE_FLUSH(&adapter->hw);
2018 ixgbe_irq_disable(adapter);
2020 ixgbe_napi_disable_all(adapter);
2021 del_timer_sync(&adapter->watchdog_timer);
2023 netif_carrier_off(netdev);
2024 netif_stop_queue(netdev);
2026 ixgbe_reset(adapter);
2027 ixgbe_clean_all_tx_rings(adapter);
2028 ixgbe_clean_all_rx_rings(adapter);
2032 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2034 struct net_device *netdev = pci_get_drvdata(pdev);
2035 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2040 netif_device_detach(netdev);
2042 if (netif_running(netdev)) {
2043 ixgbe_down(adapter);
2044 ixgbe_free_irq(adapter);
2048 retval = pci_save_state(pdev);
2053 pci_enable_wake(pdev, PCI_D3hot, 0);
2054 pci_enable_wake(pdev, PCI_D3cold, 0);
2056 ixgbe_release_hw_control(adapter);
2058 pci_disable_device(pdev);
2060 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2065 static void ixgbe_shutdown(struct pci_dev *pdev)
2067 ixgbe_suspend(pdev, PMSG_SUSPEND);
2071 * ixgbe_poll - NAPI Rx polling callback
2072 * @napi: structure for representing this polling device
2073 * @budget: how many packets driver is allowed to clean
2075 * This function is used for legacy and MSI, NAPI mode
2077 static int ixgbe_poll(struct napi_struct *napi, int budget)
2079 struct ixgbe_q_vector *q_vector = container_of(napi,
2080 struct ixgbe_q_vector, napi);
2081 struct ixgbe_adapter *adapter = q_vector->adapter;
2082 int tx_cleaned = 0, work_done = 0;
2085 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2086 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2087 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2091 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2092 ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2097 /* If budget not fully consumed, exit the polling mode */
2098 if (work_done < budget) {
2099 netif_rx_complete(adapter->netdev, napi);
2100 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2101 ixgbe_set_itr(adapter);
2102 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2103 ixgbe_irq_enable(adapter);
2110 * ixgbe_tx_timeout - Respond to a Tx Hang
2111 * @netdev: network interface device structure
2113 static void ixgbe_tx_timeout(struct net_device *netdev)
2115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2117 /* Do the reset outside of interrupt context */
2118 schedule_work(&adapter->reset_task);
2121 static void ixgbe_reset_task(struct work_struct *work)
2123 struct ixgbe_adapter *adapter;
2124 adapter = container_of(work, struct ixgbe_adapter, reset_task);
2126 adapter->tx_timeout_count++;
2128 ixgbe_reinit_locked(adapter);
2131 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2134 int err, vector_threshold;
2136 /* We'll want at least 3 (vector_threshold):
2139 * 3) Other (Link Status Change, etc.)
2140 * 4) TCP Timer (optional)
2142 vector_threshold = MIN_MSIX_COUNT;
2144 /* The more we get, the more we will assign to Tx/Rx Cleanup
2145 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2146 * Right now, we simply care about how many we'll get; we'll
2147 * set them up later while requesting irq's.
2149 while (vectors >= vector_threshold) {
2150 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2152 if (!err) /* Success in acquiring all requested vectors. */
2155 vectors = 0; /* Nasty failure, quit now */
2156 else /* err == number of vectors we should try again with */
2160 if (vectors < vector_threshold) {
2161 /* Can't allocate enough MSI-X interrupts? Oh well.
2162 * This just means we'll go with either a single MSI
2163 * vector or fall back to legacy interrupts.
2165 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2166 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2167 kfree(adapter->msix_entries);
2168 adapter->msix_entries = NULL;
2169 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2170 adapter->num_tx_queues = 1;
2171 adapter->num_rx_queues = 1;
2173 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2174 adapter->num_msix_vectors = vectors;
2178 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2181 int feature_mask = 0, rss_i, rss_m;
2183 /* Number of supported queues */
2184 switch (adapter->hw.mac.type) {
2185 case ixgbe_mac_82598EB:
2186 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2188 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2190 switch (adapter->flags & feature_mask) {
2191 case (IXGBE_FLAG_RSS_ENABLED):
2194 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2209 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2210 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2218 adapter->num_rx_queues = nrq;
2219 adapter->num_tx_queues = ntq;
2223 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2224 * @adapter: board private structure to initialize
2226 * Once we know the feature-set enabled for the device, we'll cache
2227 * the register offset the descriptor ring is assigned to.
2229 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2231 /* TODO: Remove all uses of the indices in the cases where multiple
2232 * features are OR'd together, if the feature set makes sense.
2234 int feature_mask = 0, rss_i;
2235 int i, txr_idx, rxr_idx;
2237 /* Number of supported queues */
2238 switch (adapter->hw.mac.type) {
2239 case ixgbe_mac_82598EB:
2240 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2243 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2244 switch (adapter->flags & feature_mask) {
2245 case (IXGBE_FLAG_RSS_ENABLED):
2246 for (i = 0; i < adapter->num_rx_queues; i++)
2247 adapter->rx_ring[i].reg_idx = i;
2248 for (i = 0; i < adapter->num_tx_queues; i++)
2249 adapter->tx_ring[i].reg_idx = i;
2262 * ixgbe_alloc_queues - Allocate memory for all rings
2263 * @adapter: board private structure to initialize
2265 * We allocate one ring per queue at run-time since we don't know the
2266 * number of queues at compile-time. The polling_netdev array is
2267 * intended for Multiqueue, but should work fine with a single queue.
2269 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2273 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2274 sizeof(struct ixgbe_ring), GFP_KERNEL);
2275 if (!adapter->tx_ring)
2276 goto err_tx_ring_allocation;
2278 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2279 sizeof(struct ixgbe_ring), GFP_KERNEL);
2280 if (!adapter->rx_ring)
2281 goto err_rx_ring_allocation;
2283 for (i = 0; i < adapter->num_tx_queues; i++) {
2284 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2285 adapter->tx_ring[i].queue_index = i;
2287 for (i = 0; i < adapter->num_rx_queues; i++) {
2288 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2289 adapter->rx_ring[i].queue_index = i;
2292 ixgbe_cache_ring_register(adapter);
2296 err_rx_ring_allocation:
2297 kfree(adapter->tx_ring);
2298 err_tx_ring_allocation:
2303 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2304 * @adapter: board private structure to initialize
2306 * Attempt to configure the interrupts using the best available
2307 * capabilities of the hardware and the kernel.
2309 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2313 int vector, v_budget;
2316 * It's easy to be greedy for MSI-X vectors, but it really
2317 * doesn't do us much good if we have a lot more vectors
2318 * than CPU's. So let's be conservative and only ask for
2319 * (roughly) twice the number of vectors as there are CPU's.
2321 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2322 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2325 * At the same time, hardware can only support a maximum of
2326 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2327 * we can easily reach upwards of 64 Rx descriptor queues and
2328 * 32 Tx queues. Thus, we cap it off in those rare cases where
2329 * the cpu count also exceeds our vector limit.
2331 v_budget = min(v_budget, MAX_MSIX_COUNT);
2333 /* A failure in MSI-X entry allocation isn't fatal, but it does
2334 * mean we disable MSI-X capabilities of the adapter. */
2335 adapter->msix_entries = kcalloc(v_budget,
2336 sizeof(struct msix_entry), GFP_KERNEL);
2337 if (!adapter->msix_entries) {
2338 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2339 ixgbe_set_num_queues(adapter);
2340 kfree(adapter->tx_ring);
2341 kfree(adapter->rx_ring);
2342 err = ixgbe_alloc_queues(adapter);
2344 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2352 for (vector = 0; vector < v_budget; vector++)
2353 adapter->msix_entries[vector].entry = vector;
2355 ixgbe_acquire_msix_vectors(adapter, v_budget);
2357 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2361 err = pci_enable_msi(adapter->pdev);
2363 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2365 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2366 "falling back to legacy. Error: %d\n", err);
2372 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2373 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2374 adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
2380 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2382 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2383 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2384 pci_disable_msix(adapter->pdev);
2385 kfree(adapter->msix_entries);
2386 adapter->msix_entries = NULL;
2387 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2388 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2389 pci_disable_msi(adapter->pdev);
2395 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2396 * @adapter: board private structure to initialize
2398 * We determine which interrupt scheme to use based on...
2399 * - Kernel support (MSI, MSI-X)
2400 * - which can be user-defined (via MODULE_PARAM)
2401 * - Hardware queue count (num_*_queues)
2402 * - defined by miscellaneous hardware support/features (RSS, etc.)
2404 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2408 /* Number of supported queues */
2409 ixgbe_set_num_queues(adapter);
2411 err = ixgbe_alloc_queues(adapter);
2413 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2414 goto err_alloc_queues;
2417 err = ixgbe_set_interrupt_capability(adapter);
2419 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2420 goto err_set_interrupt;
2423 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2424 "Tx Queue count = %u\n",
2425 (adapter->num_rx_queues > 1) ? "Enabled" :
2426 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2428 set_bit(__IXGBE_DOWN, &adapter->state);
2433 kfree(adapter->tx_ring);
2434 kfree(adapter->rx_ring);
2440 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2441 * @adapter: board private structure to initialize
2443 * ixgbe_sw_init initializes the Adapter private data structure.
2444 * Fields are initialized based on PCI device information and
2445 * OS network device settings (MTU size).
2447 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2449 struct ixgbe_hw *hw = &adapter->hw;
2450 struct pci_dev *pdev = adapter->pdev;
2453 /* Set capability flags */
2454 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2455 adapter->ring_feature[RING_F_RSS].indices = rss;
2456 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2458 /* Enable Dynamic interrupt throttling by default */
2459 adapter->rx_eitr = 1;
2460 adapter->tx_eitr = 1;
2462 /* default flow control settings */
2463 hw->fc.original_type = ixgbe_fc_full;
2464 hw->fc.type = ixgbe_fc_full;
2466 /* select 10G link by default */
2467 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2468 if (hw->mac.ops.reset(hw)) {
2469 dev_err(&pdev->dev, "HW Init failed\n");
2472 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2474 dev_err(&pdev->dev, "Link Speed setup failed\n");
2478 /* initialize eeprom parameters */
2479 if (ixgbe_init_eeprom(hw)) {
2480 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2484 /* enable rx csum by default */
2485 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2487 set_bit(__IXGBE_DOWN, &adapter->state);
2493 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2494 * @adapter: board private structure
2495 * @txdr: tx descriptor ring (for a specific queue) to setup
2497 * Return 0 on success, negative on failure
2499 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2500 struct ixgbe_ring *txdr)
2502 struct pci_dev *pdev = adapter->pdev;
2505 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
2506 txdr->tx_buffer_info = vmalloc(size);
2507 if (!txdr->tx_buffer_info) {
2509 "Unable to allocate memory for the transmit descriptor ring\n");
2512 memset(txdr->tx_buffer_info, 0, size);
2514 /* round up to nearest 4K */
2515 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
2516 txdr->size = ALIGN(txdr->size, 4096);
2518 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2520 vfree(txdr->tx_buffer_info);
2522 "Memory allocation failed for the tx desc ring\n");
2526 txdr->next_to_use = 0;
2527 txdr->next_to_clean = 0;
2528 txdr->work_limit = txdr->count;
2534 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2535 * @adapter: board private structure
2536 * @rxdr: rx descriptor ring (for a specific queue) to setup
2538 * Returns 0 on success, negative on failure
2540 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2541 struct ixgbe_ring *rxdr)
2543 struct pci_dev *pdev = adapter->pdev;
2546 size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2547 rxdr->lro_mgr.lro_arr = vmalloc(size);
2548 if (!rxdr->lro_mgr.lro_arr)
2550 memset(rxdr->lro_mgr.lro_arr, 0, size);
2552 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
2553 rxdr->rx_buffer_info = vmalloc(size);
2554 if (!rxdr->rx_buffer_info) {
2556 "vmalloc allocation failed for the rx desc ring\n");
2559 memset(rxdr->rx_buffer_info, 0, size);
2561 /* Round up to nearest 4K */
2562 rxdr->size = rxdr->count * sizeof(union ixgbe_adv_rx_desc);
2563 rxdr->size = ALIGN(rxdr->size, 4096);
2565 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2569 "Memory allocation failed for the rx desc ring\n");
2570 vfree(rxdr->rx_buffer_info);
2574 rxdr->next_to_clean = 0;
2575 rxdr->next_to_use = 0;
2580 vfree(rxdr->lro_mgr.lro_arr);
2581 rxdr->lro_mgr.lro_arr = NULL;
2586 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2587 * @adapter: board private structure
2588 * @tx_ring: Tx descriptor ring for a specific queue
2590 * Free all transmit software resources
2592 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2593 struct ixgbe_ring *tx_ring)
2595 struct pci_dev *pdev = adapter->pdev;
2597 ixgbe_clean_tx_ring(adapter, tx_ring);
2599 vfree(tx_ring->tx_buffer_info);
2600 tx_ring->tx_buffer_info = NULL;
2602 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2604 tx_ring->desc = NULL;
2608 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2609 * @adapter: board private structure
2611 * Free all transmit software resources
2613 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2617 for (i = 0; i < adapter->num_tx_queues; i++)
2618 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2622 * ixgbe_free_rx_resources - Free Rx Resources
2623 * @adapter: board private structure
2624 * @rx_ring: ring to clean the resources from
2626 * Free all receive software resources
2628 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2629 struct ixgbe_ring *rx_ring)
2631 struct pci_dev *pdev = adapter->pdev;
2633 vfree(rx_ring->lro_mgr.lro_arr);
2634 rx_ring->lro_mgr.lro_arr = NULL;
2636 ixgbe_clean_rx_ring(adapter, rx_ring);
2638 vfree(rx_ring->rx_buffer_info);
2639 rx_ring->rx_buffer_info = NULL;
2641 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2643 rx_ring->desc = NULL;
2647 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2648 * @adapter: board private structure
2650 * Free all receive software resources
2652 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2656 for (i = 0; i < adapter->num_rx_queues; i++)
2657 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2661 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2662 * @adapter: board private structure
2664 * If this function returns with an error, then it's possible one or
2665 * more of the rings is populated (while the rest are not). It is the
2666 * callers duty to clean those orphaned rings.
2668 * Return 0 on success, negative on failure
2670 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2674 for (i = 0; i < adapter->num_tx_queues; i++) {
2675 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2678 "Allocation for Tx Queue %u failed\n", i);
2687 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2688 * @adapter: board private structure
2690 * If this function returns with an error, then it's possible one or
2691 * more of the rings is populated (while the rest are not). It is the
2692 * callers duty to clean those orphaned rings.
2694 * Return 0 on success, negative on failure
2697 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2701 for (i = 0; i < adapter->num_rx_queues; i++) {
2702 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2705 "Allocation for Rx Queue %u failed\n", i);
2714 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2715 * @netdev: network interface device structure
2716 * @new_mtu: new value for maximum frame size
2718 * Returns 0 on success, negative on failure
2720 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2722 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2723 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2725 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2726 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2729 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2730 netdev->mtu, new_mtu);
2731 /* must set new MTU before calling down or up */
2732 netdev->mtu = new_mtu;
2734 if (netif_running(netdev))
2735 ixgbe_reinit_locked(adapter);
2741 * ixgbe_open - Called when a network interface is made active
2742 * @netdev: network interface device structure
2744 * Returns 0 on success, negative value on failure
2746 * The open entry point is called when a network interface is made
2747 * active by the system (IFF_UP). At this point all resources needed
2748 * for transmit and receive operations are allocated, the interrupt
2749 * handler is registered with the OS, the watchdog timer is started,
2750 * and the stack is notified that the interface is ready.
2752 static int ixgbe_open(struct net_device *netdev)
2754 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2757 /* disallow open during test */
2758 if (test_bit(__IXGBE_TESTING, &adapter->state))
2761 /* allocate transmit descriptors */
2762 err = ixgbe_setup_all_tx_resources(adapter);
2766 /* allocate receive descriptors */
2767 err = ixgbe_setup_all_rx_resources(adapter);
2771 ixgbe_configure(adapter);
2773 err = ixgbe_request_irq(adapter);
2777 err = ixgbe_up_complete(adapter);
2784 ixgbe_release_hw_control(adapter);
2785 ixgbe_free_irq(adapter);
2787 ixgbe_free_all_rx_resources(adapter);
2789 ixgbe_free_all_tx_resources(adapter);
2791 ixgbe_reset(adapter);
2797 * ixgbe_close - Disables a network interface
2798 * @netdev: network interface device structure
2800 * Returns 0, this is not allowed to fail
2802 * The close entry point is called when an interface is de-activated
2803 * by the OS. The hardware is still under the drivers control, but
2804 * needs to be disabled. A global MAC reset is issued to stop the
2805 * hardware, and all transmit and receive resources are freed.
2807 static int ixgbe_close(struct net_device *netdev)
2809 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2811 ixgbe_down(adapter);
2812 ixgbe_free_irq(adapter);
2814 ixgbe_free_all_tx_resources(adapter);
2815 ixgbe_free_all_rx_resources(adapter);
2817 ixgbe_release_hw_control(adapter);
2823 * ixgbe_update_stats - Update the board statistics counters.
2824 * @adapter: board private structure
2826 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2828 struct ixgbe_hw *hw = &adapter->hw;
2830 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2832 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2833 for (i = 0; i < 8; i++) {
2834 /* for packet buffers not used, the register should read 0 */
2835 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2837 adapter->stats.mpc[i] += mpc;
2838 total_mpc += adapter->stats.mpc[i];
2839 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2841 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2842 /* work around hardware counting issue */
2843 adapter->stats.gprc -= missed_rx;
2845 /* 82598 hardware only has a 32 bit counter in the high register */
2846 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2847 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2848 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2849 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2850 adapter->stats.bprc += bprc;
2851 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2852 adapter->stats.mprc -= bprc;
2853 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2854 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2855 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2856 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2857 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2858 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2859 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2860 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2861 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2862 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2863 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2864 adapter->stats.lxontxc += lxon;
2865 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2866 adapter->stats.lxofftxc += lxoff;
2867 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2868 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2869 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2871 * 82598 errata - tx of flow control packets is included in tx counters
2873 xon_off_tot = lxon + lxoff;
2874 adapter->stats.gptc -= xon_off_tot;
2875 adapter->stats.mptc -= xon_off_tot;
2876 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2877 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2878 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2879 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2880 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2881 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2882 adapter->stats.ptc64 -= xon_off_tot;
2883 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2884 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2885 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2886 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2887 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2888 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2890 /* Fill out the OS statistics structure */
2891 adapter->net_stats.multicast = adapter->stats.mprc;
2894 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2895 adapter->stats.rlec;
2896 adapter->net_stats.rx_dropped = 0;
2897 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2898 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2899 adapter->net_stats.rx_missed_errors = total_mpc;
2903 * ixgbe_watchdog - Timer Call-back
2904 * @data: pointer to adapter cast into an unsigned long
2906 static void ixgbe_watchdog(unsigned long data)
2908 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2909 struct net_device *netdev = adapter->netdev;
2912 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2916 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2919 if (!netif_carrier_ok(netdev)) {
2920 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2921 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2922 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2923 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2924 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2925 "Flow Control: %s\n",
2926 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2928 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2929 "1 Gbps" : "unknown speed")),
2930 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2932 (FLOW_TX ? "TX" : "None"))));
2934 netif_carrier_on(netdev);
2935 netif_wake_queue(netdev);
2936 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2937 for (i = 0; i < adapter->num_tx_queues; i++)
2938 netif_wake_subqueue(netdev, i);
2941 /* Force detection of hung controller */
2942 adapter->detect_tx_hung = true;
2945 if (netif_carrier_ok(netdev)) {
2946 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2947 netif_carrier_off(netdev);
2948 netif_stop_queue(netdev);
2952 ixgbe_update_stats(adapter);
2954 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2955 /* Cause software interrupt to ensure rx rings are cleaned */
2956 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2958 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2959 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2961 /* for legacy and MSI interrupts don't set any bits that
2962 * are enabled for EIAM, because this operation would
2963 * set *both* EIMS and EICS for any bit in EIAM */
2964 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2965 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2967 /* Reset the timer */
2968 mod_timer(&adapter->watchdog_timer,
2969 round_jiffies(jiffies + 2 * HZ));
2973 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2974 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2975 u32 tx_flags, u8 *hdr_len)
2977 struct ixgbe_adv_tx_context_desc *context_desc;
2980 struct ixgbe_tx_buffer *tx_buffer_info;
2981 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2982 u32 mss_l4len_idx = 0, l4len;
2984 if (skb_is_gso(skb)) {
2985 if (skb_header_cloned(skb)) {
2986 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2990 l4len = tcp_hdrlen(skb);
2993 if (skb->protocol == htons(ETH_P_IP)) {
2994 struct iphdr *iph = ip_hdr(skb);
2997 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3001 adapter->hw_tso_ctxt++;
3002 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3003 ipv6_hdr(skb)->payload_len = 0;
3004 tcp_hdr(skb)->check =
3005 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3006 &ipv6_hdr(skb)->daddr,
3008 adapter->hw_tso6_ctxt++;
3011 i = tx_ring->next_to_use;
3013 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3014 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3016 /* VLAN MACLEN IPLEN */
3017 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3019 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3020 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3021 IXGBE_ADVTXD_MACLEN_SHIFT);
3022 *hdr_len += skb_network_offset(skb);
3024 (skb_transport_header(skb) - skb_network_header(skb));
3026 (skb_transport_header(skb) - skb_network_header(skb));
3027 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3028 context_desc->seqnum_seed = 0;
3030 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3031 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3032 IXGBE_ADVTXD_DTYP_CTXT);
3034 if (skb->protocol == htons(ETH_P_IP))
3035 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3036 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3037 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3041 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3042 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3043 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3045 tx_buffer_info->time_stamp = jiffies;
3046 tx_buffer_info->next_to_watch = i;
3049 if (i == tx_ring->count)
3051 tx_ring->next_to_use = i;
3058 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3059 struct ixgbe_ring *tx_ring,
3060 struct sk_buff *skb, u32 tx_flags)
3062 struct ixgbe_adv_tx_context_desc *context_desc;
3064 struct ixgbe_tx_buffer *tx_buffer_info;
3065 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3067 if (skb->ip_summed == CHECKSUM_PARTIAL ||
3068 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3069 i = tx_ring->next_to_use;
3070 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3071 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3073 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3075 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3076 vlan_macip_lens |= (skb_network_offset(skb) <<
3077 IXGBE_ADVTXD_MACLEN_SHIFT);
3078 if (skb->ip_summed == CHECKSUM_PARTIAL)
3079 vlan_macip_lens |= (skb_transport_header(skb) -
3080 skb_network_header(skb));
3082 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3083 context_desc->seqnum_seed = 0;
3085 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3086 IXGBE_ADVTXD_DTYP_CTXT);
3088 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3089 switch (skb->protocol) {
3090 case __constant_htons(ETH_P_IP):
3091 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3092 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3094 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3097 case __constant_htons(ETH_P_IPV6):
3098 /* XXX what about other V6 headers?? */
3099 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3101 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3105 if (unlikely(net_ratelimit())) {
3106 DPRINTK(PROBE, WARNING,
3107 "partial checksum but proto=%x!\n",
3114 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3115 context_desc->mss_l4len_idx = 0;
3117 tx_buffer_info->time_stamp = jiffies;
3118 tx_buffer_info->next_to_watch = i;
3119 adapter->hw_csum_tx_good++;
3121 if (i == tx_ring->count)
3123 tx_ring->next_to_use = i;
3130 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3131 struct ixgbe_ring *tx_ring,
3132 struct sk_buff *skb, unsigned int first)
3134 struct ixgbe_tx_buffer *tx_buffer_info;
3135 unsigned int len = skb->len;
3136 unsigned int offset = 0, size, count = 0, i;
3137 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3140 len -= skb->data_len;
3142 i = tx_ring->next_to_use;
3145 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3146 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3148 tx_buffer_info->length = size;
3149 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3151 size, PCI_DMA_TODEVICE);
3152 tx_buffer_info->time_stamp = jiffies;
3153 tx_buffer_info->next_to_watch = i;
3159 if (i == tx_ring->count)
3163 for (f = 0; f < nr_frags; f++) {
3164 struct skb_frag_struct *frag;
3166 frag = &skb_shinfo(skb)->frags[f];
3168 offset = frag->page_offset;
3171 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3172 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3174 tx_buffer_info->length = size;
3175 tx_buffer_info->dma = pci_map_page(adapter->pdev,
3178 size, PCI_DMA_TODEVICE);
3179 tx_buffer_info->time_stamp = jiffies;
3180 tx_buffer_info->next_to_watch = i;
3186 if (i == tx_ring->count)
3191 i = tx_ring->count - 1;
3194 tx_ring->tx_buffer_info[i].skb = skb;
3195 tx_ring->tx_buffer_info[first].next_to_watch = i;
3200 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3201 struct ixgbe_ring *tx_ring,
3202 int tx_flags, int count, u32 paylen, u8 hdr_len)
3204 union ixgbe_adv_tx_desc *tx_desc = NULL;
3205 struct ixgbe_tx_buffer *tx_buffer_info;
3206 u32 olinfo_status = 0, cmd_type_len = 0;
3208 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3210 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3212 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3214 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3215 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3217 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3218 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3220 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3221 IXGBE_ADVTXD_POPTS_SHIFT;
3223 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3224 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3225 IXGBE_ADVTXD_POPTS_SHIFT;
3227 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3228 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3229 IXGBE_ADVTXD_POPTS_SHIFT;
3231 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3233 i = tx_ring->next_to_use;
3235 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3236 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3237 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3238 tx_desc->read.cmd_type_len =
3239 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3240 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3243 if (i == tx_ring->count)
3247 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3250 * Force memory writes to complete before letting h/w
3251 * know there are new descriptors to fetch. (Only
3252 * applicable for weak-ordered memory model archs,
3257 tx_ring->next_to_use = i;
3258 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3261 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3262 struct ixgbe_ring *tx_ring, int size)
3264 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3266 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3267 netif_stop_subqueue(netdev, tx_ring->queue_index);
3269 netif_stop_queue(netdev);
3271 /* Herbert's original patch had:
3272 * smp_mb__after_netif_stop_queue();
3273 * but since that doesn't exist yet, just open code it. */
3276 /* We need to check again in a case another CPU has just
3277 * made room available. */
3278 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3281 /* A reprieve! - use start_queue because it doesn't call schedule */
3282 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3283 netif_wake_subqueue(netdev, tx_ring->queue_index);
3285 netif_wake_queue(netdev);
3287 ++adapter->restart_queue;
3291 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3292 struct ixgbe_ring *tx_ring, int size)
3294 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3296 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3300 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3302 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3303 struct ixgbe_ring *tx_ring;
3304 unsigned int len = skb->len;
3306 unsigned int tx_flags = 0;
3309 unsigned int mss = 0;
3312 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3313 len -= skb->data_len;
3314 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3315 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3317 tx_ring = &adapter->tx_ring[r_idx];
3320 if (skb->len <= 0) {
3322 return NETDEV_TX_OK;
3324 mss = skb_shinfo(skb)->gso_size;
3328 else if (skb->ip_summed == CHECKSUM_PARTIAL)
3331 count += TXD_USE_COUNT(len);
3332 for (f = 0; f < nr_frags; f++)
3333 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3335 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3337 return NETDEV_TX_BUSY;
3339 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3340 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3341 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3344 if (skb->protocol == htons(ETH_P_IP))
3345 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3346 first = tx_ring->next_to_use;
3347 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3349 dev_kfree_skb_any(skb);
3350 return NETDEV_TX_OK;
3354 tx_flags |= IXGBE_TX_FLAGS_TSO;
3355 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3356 (skb->ip_summed == CHECKSUM_PARTIAL))
3357 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3359 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3360 ixgbe_tx_map(adapter, tx_ring, skb, first),
3363 netdev->trans_start = jiffies;
3365 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3367 return NETDEV_TX_OK;
3371 * ixgbe_get_stats - Get System Network Statistics
3372 * @netdev: network interface device structure
3374 * Returns the address of the device statistics structure.
3375 * The statistics are actually updated from the timer callback.
3377 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3379 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3381 /* only return the current stats */
3382 return &adapter->net_stats;
3386 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3387 * @netdev: network interface device structure
3388 * @p: pointer to an address structure
3390 * Returns 0 on success, negative on failure
3392 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3394 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3395 struct sockaddr *addr = p;
3397 if (!is_valid_ether_addr(addr->sa_data))
3398 return -EADDRNOTAVAIL;
3400 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3401 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3403 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3408 #ifdef CONFIG_NET_POLL_CONTROLLER
3410 * Polling 'interrupt' - used by things like netconsole to send skbs
3411 * without having to re-enable interrupts. It's not called while
3412 * the interrupt routine is executing.
3414 static void ixgbe_netpoll(struct net_device *netdev)
3416 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3418 disable_irq(adapter->pdev->irq);
3419 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3420 ixgbe_intr(adapter->pdev->irq, netdev);
3421 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3422 enable_irq(adapter->pdev->irq);
3427 * ixgbe_napi_add_all - prep napi structs for use
3428 * @adapter: private struct
3429 * helper function to napi_add each possible q_vector->napi
3431 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3433 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3434 int (*poll)(struct napi_struct *, int);
3436 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3437 poll = &ixgbe_clean_rxonly;
3440 /* only one q_vector for legacy modes */
3444 for (i = 0; i < q_vectors; i++) {
3445 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3446 netif_napi_add(adapter->netdev, &q_vector->napi,
3452 * ixgbe_probe - Device Initialization Routine
3453 * @pdev: PCI device information struct
3454 * @ent: entry in ixgbe_pci_tbl
3456 * Returns 0 on success, negative on failure
3458 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3459 * The OS initialization, configuring of the adapter private structure,
3460 * and a hardware reset occur.
3462 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3463 const struct pci_device_id *ent)
3465 struct net_device *netdev;
3466 struct ixgbe_adapter *adapter = NULL;
3467 struct ixgbe_hw *hw;
3468 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3469 unsigned long mmio_start, mmio_len;
3470 static int cards_found;
3471 int i, err, pci_using_dac;
3472 u16 link_status, link_speed, link_width;
3475 err = pci_enable_device(pdev);
3479 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3480 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3483 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3485 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3487 dev_err(&pdev->dev, "No usable DMA "
3488 "configuration, aborting\n");
3495 err = pci_request_regions(pdev, ixgbe_driver_name);
3497 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3501 pci_set_master(pdev);
3502 pci_save_state(pdev);
3504 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3505 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3507 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
3511 goto err_alloc_etherdev;
3514 SET_NETDEV_DEV(netdev, &pdev->dev);
3516 pci_set_drvdata(pdev, netdev);
3517 adapter = netdev_priv(netdev);
3519 adapter->netdev = netdev;
3520 adapter->pdev = pdev;
3523 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3525 mmio_start = pci_resource_start(pdev, 0);
3526 mmio_len = pci_resource_len(pdev, 0);
3528 hw->hw_addr = ioremap(mmio_start, mmio_len);
3534 for (i = 1; i <= 5; i++) {
3535 if (pci_resource_len(pdev, i) == 0)
3539 netdev->open = &ixgbe_open;
3540 netdev->stop = &ixgbe_close;
3541 netdev->hard_start_xmit = &ixgbe_xmit_frame;
3542 netdev->get_stats = &ixgbe_get_stats;
3543 netdev->set_multicast_list = &ixgbe_set_multi;
3544 netdev->set_mac_address = &ixgbe_set_mac;
3545 netdev->change_mtu = &ixgbe_change_mtu;
3546 ixgbe_set_ethtool_ops(netdev);
3547 netdev->tx_timeout = &ixgbe_tx_timeout;
3548 netdev->watchdog_timeo = 5 * HZ;
3549 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3550 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3551 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3552 #ifdef CONFIG_NET_POLL_CONTROLLER
3553 netdev->poll_controller = ixgbe_netpoll;
3555 strcpy(netdev->name, pci_name(pdev));
3557 netdev->mem_start = mmio_start;
3558 netdev->mem_end = mmio_start + mmio_len;
3560 adapter->bd_number = cards_found;
3562 /* PCI config space info */
3563 hw->vendor_id = pdev->vendor;
3564 hw->device_id = pdev->device;
3565 hw->revision_id = pdev->revision;
3566 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3567 hw->subsystem_device_id = pdev->subsystem_device;
3570 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3571 hw->mac.type = ii->mac;
3573 err = ii->get_invariants(hw);
3577 /* setup the private structure */
3578 err = ixgbe_sw_init(adapter);
3582 netdev->features = NETIF_F_SG |
3584 NETIF_F_HW_VLAN_TX |
3585 NETIF_F_HW_VLAN_RX |
3586 NETIF_F_HW_VLAN_FILTER;
3588 netdev->features |= NETIF_F_LRO;
3589 netdev->features |= NETIF_F_TSO;
3590 netdev->features |= NETIF_F_TSO6;
3592 netdev->vlan_features |= NETIF_F_TSO;
3593 netdev->vlan_features |= NETIF_F_TSO6;
3594 netdev->vlan_features |= NETIF_F_HW_CSUM;
3595 netdev->vlan_features |= NETIF_F_SG;
3598 netdev->features |= NETIF_F_HIGHDMA;
3600 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3601 netdev->features |= NETIF_F_MULTI_QUEUE;
3604 /* make sure the EEPROM is good */
3605 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3606 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3611 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3612 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3614 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3619 init_timer(&adapter->watchdog_timer);
3620 adapter->watchdog_timer.function = &ixgbe_watchdog;
3621 adapter->watchdog_timer.data = (unsigned long)adapter;
3623 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3625 /* initialize default flow control settings */
3626 hw->fc.original_type = ixgbe_fc_full;
3627 hw->fc.type = ixgbe_fc_full;
3628 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3629 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3630 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3632 err = ixgbe_init_interrupt_scheme(adapter);
3636 /* print bus type/speed/width info */
3637 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3638 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3639 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3640 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3641 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3642 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3643 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3645 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3646 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3647 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3648 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3650 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3651 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3652 ixgbe_read_part_num(hw, &part_num);
3653 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3654 hw->mac.type, hw->phy.type,
3655 (part_num >> 8), (part_num & 0xff));
3657 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3658 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3659 "this card is not sufficient for optimal "
3661 dev_warn(&pdev->dev, "For optimal performance a x8 "
3662 "PCI-Express slot is required.\n");
3665 /* reset the hardware with the new settings */
3668 netif_carrier_off(netdev);
3669 netif_stop_queue(netdev);
3670 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3671 for (i = 0; i < adapter->num_tx_queues; i++)
3672 netif_stop_subqueue(netdev, i);
3675 ixgbe_napi_add_all(adapter);
3677 strcpy(netdev->name, "eth%d");
3678 err = register_netdev(netdev);
3683 if (dca_add_requester(&pdev->dev) == 0) {
3684 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3685 /* always use CB2 mode, difference is masked
3686 * in the CB driver */
3687 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3688 ixgbe_setup_dca(adapter);
3692 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3697 ixgbe_release_hw_control(adapter);
3700 ixgbe_reset_interrupt_capability(adapter);
3702 iounmap(hw->hw_addr);
3704 free_netdev(netdev);
3706 pci_release_regions(pdev);
3709 pci_disable_device(pdev);
3714 * ixgbe_remove - Device Removal Routine
3715 * @pdev: PCI device information struct
3717 * ixgbe_remove is called by the PCI subsystem to alert the driver
3718 * that it should release a PCI device. The could be caused by a
3719 * Hot-Plug event, or because the driver is going to be removed from
3722 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3724 struct net_device *netdev = pci_get_drvdata(pdev);
3725 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3727 set_bit(__IXGBE_DOWN, &adapter->state);
3728 del_timer_sync(&adapter->watchdog_timer);
3730 flush_scheduled_work();
3733 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3734 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3735 dca_remove_requester(&pdev->dev);
3736 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3740 unregister_netdev(netdev);
3742 ixgbe_reset_interrupt_capability(adapter);
3744 ixgbe_release_hw_control(adapter);
3746 iounmap(adapter->hw.hw_addr);
3747 pci_release_regions(pdev);
3749 DPRINTK(PROBE, INFO, "complete\n");
3750 kfree(adapter->tx_ring);
3751 kfree(adapter->rx_ring);
3753 free_netdev(netdev);
3755 pci_disable_device(pdev);
3759 * ixgbe_io_error_detected - called when PCI error is detected
3760 * @pdev: Pointer to PCI device
3761 * @state: The current pci connection state
3763 * This function is called after a PCI bus error affecting
3764 * this device has been detected.
3766 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3767 pci_channel_state_t state)
3769 struct net_device *netdev = pci_get_drvdata(pdev);
3770 struct ixgbe_adapter *adapter = netdev->priv;
3772 netif_device_detach(netdev);
3774 if (netif_running(netdev))
3775 ixgbe_down(adapter);
3776 pci_disable_device(pdev);
3778 /* Request a slot slot reset. */
3779 return PCI_ERS_RESULT_NEED_RESET;
3783 * ixgbe_io_slot_reset - called after the pci bus has been reset.
3784 * @pdev: Pointer to PCI device
3786 * Restart the card from scratch, as if from a cold-boot.
3788 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3790 struct net_device *netdev = pci_get_drvdata(pdev);
3791 struct ixgbe_adapter *adapter = netdev->priv;
3793 if (pci_enable_device(pdev)) {
3795 "Cannot re-enable PCI device after reset.\n");
3796 return PCI_ERS_RESULT_DISCONNECT;
3798 pci_set_master(pdev);
3799 pci_restore_state(pdev);
3801 pci_enable_wake(pdev, PCI_D3hot, 0);
3802 pci_enable_wake(pdev, PCI_D3cold, 0);
3804 ixgbe_reset(adapter);
3806 return PCI_ERS_RESULT_RECOVERED;
3810 * ixgbe_io_resume - called when traffic can start flowing again.
3811 * @pdev: Pointer to PCI device
3813 * This callback is called when the error recovery driver tells us that
3814 * its OK to resume normal operation.
3816 static void ixgbe_io_resume(struct pci_dev *pdev)
3818 struct net_device *netdev = pci_get_drvdata(pdev);
3819 struct ixgbe_adapter *adapter = netdev->priv;
3821 if (netif_running(netdev)) {
3822 if (ixgbe_up(adapter)) {
3823 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3828 netif_device_attach(netdev);
3832 static struct pci_error_handlers ixgbe_err_handler = {
3833 .error_detected = ixgbe_io_error_detected,
3834 .slot_reset = ixgbe_io_slot_reset,
3835 .resume = ixgbe_io_resume,
3838 static struct pci_driver ixgbe_driver = {
3839 .name = ixgbe_driver_name,
3840 .id_table = ixgbe_pci_tbl,
3841 .probe = ixgbe_probe,
3842 .remove = __devexit_p(ixgbe_remove),
3844 .suspend = ixgbe_suspend,
3845 .resume = ixgbe_resume,
3847 .shutdown = ixgbe_shutdown,
3848 .err_handler = &ixgbe_err_handler
3852 * ixgbe_init_module - Driver Registration Routine
3854 * ixgbe_init_module is the first routine called when the driver is
3855 * loaded. All it does is register with the PCI subsystem.
3857 static int __init ixgbe_init_module(void)
3860 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3861 ixgbe_driver_string, ixgbe_driver_version);
3863 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3866 dca_register_notify(&dca_notifier);
3869 ret = pci_register_driver(&ixgbe_driver);
3872 module_init(ixgbe_init_module);
3875 * ixgbe_exit_module - Driver Exit Cleanup Routine
3877 * ixgbe_exit_module is called just before the driver is removed
3880 static void __exit ixgbe_exit_module(void)
3883 dca_unregister_notify(&dca_notifier);
3885 pci_unregister_driver(&ixgbe_driver);
3889 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3894 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3895 __ixgbe_notify_dca);
3897 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3899 #endif /* CONFIG_DCA */
3901 module_exit(ixgbe_exit_module);