Pileus Git - ~andy/linux/blob - drivers/net/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2008 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/types.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/vmalloc.h>
  33 #include <linux/string.h>
  34 #include <linux/in.h>
  35 #include <linux/ip.h>
  36 #include <linux/tcp.h>
  37 #include <linux/ipv6.h>
  38 #include <net/checksum.h>
  39 #include <net/ip6_checksum.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_vlan.h>
  42
  43 #include "ixgbe.h"
  44 #include "ixgbe_common.h"
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 static const char ixgbe_driver_string[] =
  48                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  49
  50 #define DRV_VERSION "1.3.30-k2"
  51 const char ixgbe_driver_version[] = DRV_VERSION;
  52 static char ixgbe_copyright[] = "Copyright (c) 1999-2007 Intel Corporation.";
  53
  54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  55         [board_82598] = &ixgbe_82598_info,
  56 };
  57
  58 /* ixgbe_pci_tbl - PCI Device ID Table
  59  *
  60  * Wildcard entries (PCI_ANY_ID) should come last
  61  * Last entry must be all 0s
  62  *
  63  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  64  *   Class, Class Mask, private data (not used) }
  65  */
  66 static struct pci_device_id ixgbe_pci_tbl[] = {
  67         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  68          board_82598 },
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
  78          board_82598 },
  79         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
  80          board_82598 },
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
  82          board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
  84          board_82598 },
  85
  86         /* required last entry */
  87         {0, }
  88 };
  89 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  90
  91 #ifdef CONFIG_IXGBE_DCA
  92 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  93                             void *p);
  94 static struct notifier_block dca_notifier = {
  95         .notifier_call = ixgbe_notify_dca,
  96         .next          = NULL,
  97         .priority      = 0
  98 };
  99 #endif
 100
 101 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 102 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 103 MODULE_LICENSE("GPL");
 104 MODULE_VERSION(DRV_VERSION);
 105
 106 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 107
 108 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 109 {
 110         u32 ctrl_ext;
 111
 112         /* Let firmware take over control of h/w */
 113         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 114         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 115                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 116 }
 117
 118 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 119 {
 120         u32 ctrl_ext;
 121
 122         /* Let firmware know the driver has taken over */
 123         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 124         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 125                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 126 }
 127
 128 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 129                            u8 msix_vector)
 130 {
 131         u32 ivar, index;
 132
 133         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 134         index = (int_alloc_entry >> 2) & 0x1F;
 135         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 136         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 137         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 138         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 139 }
 140
 141 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 142                                              struct ixgbe_tx_buffer
 143                                              *tx_buffer_info)
 144 {
 145         if (tx_buffer_info->dma) {
 146                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 147                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 148                 tx_buffer_info->dma = 0;
 149         }
 150         if (tx_buffer_info->skb) {
 151                 dev_kfree_skb_any(tx_buffer_info->skb);
 152                 tx_buffer_info->skb = NULL;
 153         }
 154         /* tx_buffer_info must be completely set up in the transmit path */
 155 }
 156
 157 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 158                                        struct ixgbe_ring *tx_ring,
 159                                        unsigned int eop)
 160 {
 161         struct ixgbe_hw *hw = &adapter->hw;
 162         u32 head, tail;
 163
 164         /* Detect a transmit hang in hardware, this serializes the
 165          * check with the clearing of time_stamp and movement of eop */
 166         head = IXGBE_READ_REG(hw, tx_ring->head);
 167         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 168         adapter->detect_tx_hung = false;
 169         if ((head != tail) &&
 170             tx_ring->tx_buffer_info[eop].time_stamp &&
 171             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 172             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 173                 /* detected Tx unit hang */
 174                 union ixgbe_adv_tx_desc *tx_desc;
 175                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 176                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 177                         "  Tx Queue             <%d>\n"
 178                         "  TDH, TDT             <%x>, <%x>\n"
 179                         "  next_to_use          <%x>\n"
 180                         "  next_to_clean        <%x>\n"
 181                         "tx_buffer_info[next_to_clean]\n"
 182                         "  time_stamp           <%lx>\n"
 183                         "  jiffies              <%lx>\n",
 184                         tx_ring->queue_index,
 185                         head, tail,
 186                         tx_ring->next_to_use, eop,
 187                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 188                 return true;
 189         }
 190
 191         return false;
 192 }
 193
 194 #define IXGBE_MAX_TXD_PWR       14
 195 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 196
 197 /* Tx Descriptors needed, worst case */
 198 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 199                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 200 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 201         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
 202
 203 #define GET_TX_HEAD_FROM_RING(ring) (\
 204         *(volatile u32 *) \
 205         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 206 static void ixgbe_tx_timeout(struct net_device *netdev);
 207
 208 /**
 209  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 210  * @adapter: board private structure
 211  * @tx_ring: tx ring to clean
 212  **/
 213 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 214                                struct ixgbe_ring *tx_ring)
 215 {
 216         union ixgbe_adv_tx_desc *tx_desc;
 217         struct ixgbe_tx_buffer *tx_buffer_info;
 218         struct net_device *netdev = adapter->netdev;
 219         struct sk_buff *skb;
 220         unsigned int i;
 221         u32 head, oldhead;
 222         unsigned int count = 0;
 223         unsigned int total_bytes = 0, total_packets = 0;
 224
 225         rmb();
 226         head = GET_TX_HEAD_FROM_RING(tx_ring);
 227         head = le32_to_cpu(head);
 228         i = tx_ring->next_to_clean;
 229         while (1) {
 230                 while (i != head) {
 231                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 232                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 233                         skb = tx_buffer_info->skb;
 234
 235                         if (skb) {
 236                                 unsigned int segs, bytecount;
 237
 238                                 /* gso_segs is currently only valid for tcp */
 239                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 240                                 /* multiply data chunks by size of headers */
 241                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 242                                             skb->len;
 243                                 total_packets += segs;
 244                                 total_bytes += bytecount;
 245                         }
 246
 247                         ixgbe_unmap_and_free_tx_resource(adapter,
 248                                                          tx_buffer_info);
 249
 250                         i++;
 251                         if (i == tx_ring->count)
 252                                 i = 0;
 253
 254                         count++;
 255                         if (count == tx_ring->count)
 256                                 goto done_cleaning;
 257                 }
 258                 oldhead = head;
 259                 rmb();
 260                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 261                 head = le32_to_cpu(head);
 262                 if (head == oldhead)
 263                         goto done_cleaning;
 264         } /* while (1) */
 265
 266 done_cleaning:
 267         tx_ring->next_to_clean = i;
 268
 269 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 270         if (unlikely(count && netif_carrier_ok(netdev) &&
 271                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 272                 /* Make sure that anybody stopping the queue after this
 273                  * sees the new next_to_clean.
 274                  */
 275                 smp_mb();
 276                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 277                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 278                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 279                         ++adapter->restart_queue;
 280                 }
 281         }
 282
 283         if (adapter->detect_tx_hung) {
 284                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 285                         /* schedule immediate reset if we believe we hung */
 286                         DPRINTK(PROBE, INFO,
 287                                 "tx hang %d detected, resetting adapter\n",
 288                                 adapter->tx_timeout_count + 1);
 289                         ixgbe_tx_timeout(adapter->netdev);
 290                 }
 291         }
 292
 293         /* re-arm the interrupt */
 294         if ((total_packets >= tx_ring->work_limit) ||
 295             (count == tx_ring->count))
 296                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 297
 298         tx_ring->total_bytes += total_bytes;
 299         tx_ring->total_packets += total_packets;
 300         tx_ring->stats.bytes += total_bytes;
 301         tx_ring->stats.packets += total_packets;
 302         adapter->net_stats.tx_bytes += total_bytes;
 303         adapter->net_stats.tx_packets += total_packets;
 304         return (total_packets ? true : false);
 305 }
 306
 307 #ifdef CONFIG_IXGBE_DCA
 308 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 309                                 struct ixgbe_ring *rx_ring)
 310 {
 311         u32 rxctrl;
 312         int cpu = get_cpu();
 313         int q = rx_ring - adapter->rx_ring;
 314
 315         if (rx_ring->cpu != cpu) {
 316                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 317                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 318                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 319                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 320                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 321                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
 322                 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
 323                             IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
 324                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 325                 rx_ring->cpu = cpu;
 326         }
 327         put_cpu();
 328 }
 329
 330 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 331                                 struct ixgbe_ring *tx_ring)
 332 {
 333         u32 txctrl;
 334         int cpu = get_cpu();
 335         int q = tx_ring - adapter->tx_ring;
 336
 337         if (tx_ring->cpu != cpu) {
 338                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 339                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 340                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 341                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 342                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 343                 tx_ring->cpu = cpu;
 344         }
 345         put_cpu();
 346 }
 347
 348 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 349 {
 350         int i;
 351
 352         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 353                 return;
 354
 355         for (i = 0; i < adapter->num_tx_queues; i++) {
 356                 adapter->tx_ring[i].cpu = -1;
 357                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 358         }
 359         for (i = 0; i < adapter->num_rx_queues; i++) {
 360                 adapter->rx_ring[i].cpu = -1;
 361                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 362         }
 363 }
 364
 365 static int __ixgbe_notify_dca(struct device *dev, void *data)
 366 {
 367         struct net_device *netdev = dev_get_drvdata(dev);
 368         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 369         unsigned long event = *(unsigned long *)data;
 370
 371         switch (event) {
 372         case DCA_PROVIDER_ADD:
 373                 /* if we're already enabled, don't do it again */
 374                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 375                         break;
 376                 /* Always use CB2 mode, difference is masked
 377                  * in the CB driver. */
 378                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 379                 if (dca_add_requester(dev) == 0) {
 380                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 381                         ixgbe_setup_dca(adapter);
 382                         break;
 383                 }
 384                 /* Fall Through since DCA is disabled. */
 385         case DCA_PROVIDER_REMOVE:
 386                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 387                         dca_remove_requester(dev);
 388                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 389                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 390                 }
 391                 break;
 392         }
 393
 394         return 0;
 395 }
 396
 397 #endif /* CONFIG_IXGBE_DCA */
 398 /**
 399  * ixgbe_receive_skb - Send a completed packet up the stack
 400  * @adapter: board private structure
 401  * @skb: packet to send up
 402  * @status: hardware indication of status of receive
 403  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 404  * @rx_desc: rx descriptor
 405  **/
 406 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 407                               struct sk_buff *skb, u8 status,
 408                               struct ixgbe_ring *ring,
 409                               union ixgbe_adv_rx_desc *rx_desc)
 410 {
 411         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 412         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 413
 414         if (adapter->netdev->features & NETIF_F_LRO &&
 415             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 416                 if (adapter->vlgrp && is_vlan && (tag != 0))
 417                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 418                                                      adapter->vlgrp, tag,
 419                                                      rx_desc);
 420                 else
 421                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 422                 ring->lro_used = true;
 423         } else {
 424                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 425                         if (adapter->vlgrp && is_vlan && (tag != 0))
 426                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 427                         else
 428                                 netif_receive_skb(skb);
 429                 } else {
 430                         if (adapter->vlgrp && is_vlan && (tag != 0))
 431                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 432                         else
 433                                 netif_rx(skb);
 434                 }
 435         }
 436 }
 437
 438 /**
 439  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 440  * @adapter: address of board private structure
 441  * @status_err: hardware indication of status of receive
 442  * @skb: skb currently being received and modified
 443  **/
 444 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 445                                      u32 status_err, struct sk_buff *skb)
 446 {
 447         skb->ip_summed = CHECKSUM_NONE;
 448
 449         /* Rx csum disabled */
 450         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 451                 return;
 452
 453         /* if IP and error */
 454         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 455             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 456                 adapter->hw_csum_rx_error++;
 457                 return;
 458         }
 459
 460         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 461                 return;
 462
 463         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 464                 adapter->hw_csum_rx_error++;
 465                 return;
 466         }
 467
 468         /* It must be a TCP or UDP packet with a valid checksum */
 469         skb->ip_summed = CHECKSUM_UNNECESSARY;
 470         adapter->hw_csum_rx_good++;
 471 }
 472
 473 /**
 474  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 475  * @adapter: address of board private structure
 476  **/
 477 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 478                                    struct ixgbe_ring *rx_ring,
 479                                    int cleaned_count)
 480 {
 481         struct pci_dev *pdev = adapter->pdev;
 482         union ixgbe_adv_rx_desc *rx_desc;
 483         struct ixgbe_rx_buffer *bi;
 484         unsigned int i;
 485
 486         i = rx_ring->next_to_use;
 487         bi = &rx_ring->rx_buffer_info[i];
 488
 489         while (cleaned_count--) {
 490                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 491
 492                 if (!bi->page_dma &&
 493                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 494                         if (!bi->page) {
 495                                 bi->page = alloc_page(GFP_ATOMIC);
 496                                 if (!bi->page) {
 497                                         adapter->alloc_rx_page_failed++;
 498                                         goto no_buffers;
 499                                 }
 500                                 bi->page_offset = 0;
 501                         } else {
 502                                 /* use a half page if we're re-using */
 503                                 bi->page_offset ^= (PAGE_SIZE / 2);
 504                         }
 505
 506                         bi->page_dma = pci_map_page(pdev, bi->page,
 507                                                     bi->page_offset,
 508                                                     (PAGE_SIZE / 2),
 509                                                     PCI_DMA_FROMDEVICE);
 510                 }
 511
 512                 if (!bi->skb) {
 513                         struct sk_buff *skb;
 514                         skb = netdev_alloc_skb(adapter->netdev,
 515                                                (rx_ring->rx_buf_len +
 516                                                 NET_IP_ALIGN));
 517
 518                         if (!skb) {
 519                                 adapter->alloc_rx_buff_failed++;
 520                                 goto no_buffers;
 521                         }
 522
 523                         /*
 524                          * Make buffer alignment 2 beyond a 16 byte boundary
 525                          * this will result in a 16 byte aligned IP header after
 526                          * the 14 byte MAC header is removed
 527                          */
 528                         skb_reserve(skb, NET_IP_ALIGN);
 529
 530                         bi->skb = skb;
 531                         bi->dma = pci_map_single(pdev, skb->data,
 532                                                  rx_ring->rx_buf_len,
 533                                                  PCI_DMA_FROMDEVICE);
 534                 }
 535                 /* Refresh the desc even if buffer_addrs didn't change because
 536                  * each write-back erases this info. */
 537                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 538                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 539                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 540                 } else {
 541                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 542                 }
 543
 544                 i++;
 545                 if (i == rx_ring->count)
 546                         i = 0;
 547                 bi = &rx_ring->rx_buffer_info[i];
 548         }
 549
 550 no_buffers:
 551         if (rx_ring->next_to_use != i) {
 552                 rx_ring->next_to_use = i;
 553                 if (i-- == 0)
 554                         i = (rx_ring->count - 1);
 555
 556                 /*
 557                  * Force memory writes to complete before letting h/w
 558                  * know there are new descriptors to fetch.  (Only
 559                  * applicable for weak-ordered memory model archs,
 560                  * such as IA-64).
 561                  */
 562                 wmb();
 563                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 564         }
 565 }
 566
 567 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 568 {
 569         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 570 }
 571
 572 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 573 {
 574         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 575 }
 576
 577 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 578                                struct ixgbe_ring *rx_ring,
 579                                int *work_done, int work_to_do)
 580 {
 581         struct pci_dev *pdev = adapter->pdev;
 582         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 583         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 584         struct sk_buff *skb;
 585         unsigned int i;
 586         u32 len, staterr;
 587         u16 hdr_info;
 588         bool cleaned = false;
 589         int cleaned_count = 0;
 590         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 591
 592         i = rx_ring->next_to_clean;
 593         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 594         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 595         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 596
 597         while (staterr & IXGBE_RXD_STAT_DD) {
 598                 u32 upper_len = 0;
 599                 if (*work_done >= work_to_do)
 600                         break;
 601                 (*work_done)++;
 602
 603                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 604                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 605                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 606                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 607                         if (hdr_info & IXGBE_RXDADV_SPH)
 608                                 adapter->rx_hdr_split++;
 609                         if (len > IXGBE_RX_HDR_SIZE)
 610                                 len = IXGBE_RX_HDR_SIZE;
 611                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 612                 } else {
 613                         len = le16_to_cpu(rx_desc->wb.upper.length);
 614                 }
 615
 616                 cleaned = true;
 617                 skb = rx_buffer_info->skb;
 618                 prefetch(skb->data - NET_IP_ALIGN);
 619                 rx_buffer_info->skb = NULL;
 620
 621                 if (len && !skb_shinfo(skb)->nr_frags) {
 622                         pci_unmap_single(pdev, rx_buffer_info->dma,
 623                                          rx_ring->rx_buf_len,
 624                                          PCI_DMA_FROMDEVICE);
 625                         skb_put(skb, len);
 626                 }
 627
 628                 if (upper_len) {
 629                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 630                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
 631                         rx_buffer_info->page_dma = 0;
 632                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 633                                            rx_buffer_info->page,
 634                                            rx_buffer_info->page_offset,
 635                                            upper_len);
 636
 637                         if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
 638                             (page_count(rx_buffer_info->page) != 1))
 639                                 rx_buffer_info->page = NULL;
 640                         else
 641                                 get_page(rx_buffer_info->page);
 642
 643                         skb->len += upper_len;
 644                         skb->data_len += upper_len;
 645                         skb->truesize += upper_len;
 646                 }
 647
 648                 i++;
 649                 if (i == rx_ring->count)
 650                         i = 0;
 651                 next_buffer = &rx_ring->rx_buffer_info[i];
 652
 653                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 654                 prefetch(next_rxd);
 655
 656                 cleaned_count++;
 657                 if (staterr & IXGBE_RXD_STAT_EOP) {
 658                         rx_ring->stats.packets++;
 659                         rx_ring->stats.bytes += skb->len;
 660                 } else {
 661                         rx_buffer_info->skb = next_buffer->skb;
 662                         rx_buffer_info->dma = next_buffer->dma;
 663                         next_buffer->skb = skb;
 664                         next_buffer->dma = 0;
 665                         adapter->non_eop_descs++;
 666                         goto next_desc;
 667                 }
 668
 669                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 670                         dev_kfree_skb_irq(skb);
 671                         goto next_desc;
 672                 }
 673
 674                 ixgbe_rx_checksum(adapter, staterr, skb);
 675
 676                 /* probably a little skewed due to removing CRC */
 677                 total_rx_bytes += skb->len;
 678                 total_rx_packets++;
 679
 680                 skb->protocol = eth_type_trans(skb, adapter->netdev);
 681                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 682
 683 next_desc:
 684                 rx_desc->wb.upper.status_error = 0;
 685
 686                 /* return some buffers to hardware, one at a time is too slow */
 687                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 688                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 689                         cleaned_count = 0;
 690                 }
 691
 692                 /* use prefetched values */
 693                 rx_desc = next_rxd;
 694                 rx_buffer_info = next_buffer;
 695
 696                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 697         }
 698
 699         if (rx_ring->lro_used) {
 700                 lro_flush_all(&rx_ring->lro_mgr);
 701                 rx_ring->lro_used = false;
 702         }
 703
 704         rx_ring->next_to_clean = i;
 705         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 706
 707         if (cleaned_count)
 708                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 709
 710         rx_ring->total_packets += total_rx_packets;
 711         rx_ring->total_bytes += total_rx_bytes;
 712         adapter->net_stats.rx_bytes += total_rx_bytes;
 713         adapter->net_stats.rx_packets += total_rx_packets;
 714
 715         return cleaned;
 716 }
 717
 718 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 719 /**
 720  * ixgbe_configure_msix - Configure MSI-X hardware
 721  * @adapter: board private structure
 722  *
 723  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 724  * interrupts.
 725  **/
 726 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 727 {
 728         struct ixgbe_q_vector *q_vector;
 729         int i, j, q_vectors, v_idx, r_idx;
 730         u32 mask;
 731
 732         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 733
 734         /* Populate the IVAR table and set the ITR values to the
 735          * corresponding register.
 736          */
 737         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 738                 q_vector = &adapter->q_vector[v_idx];
 739                 /* XXX for_each_bit(...) */
 740                 r_idx = find_first_bit(q_vector->rxr_idx,
 741                                        adapter->num_rx_queues);
 742
 743                 for (i = 0; i < q_vector->rxr_count; i++) {
 744                         j = adapter->rx_ring[r_idx].reg_idx;
 745                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 746                         r_idx = find_next_bit(q_vector->rxr_idx,
 747                                               adapter->num_rx_queues,
 748                                               r_idx + 1);
 749                 }
 750                 r_idx = find_first_bit(q_vector->txr_idx,
 751                                        adapter->num_tx_queues);
 752
 753                 for (i = 0; i < q_vector->txr_count; i++) {
 754                         j = adapter->tx_ring[r_idx].reg_idx;
 755                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 756                         r_idx = find_next_bit(q_vector->txr_idx,
 757                                               adapter->num_tx_queues,
 758                                               r_idx + 1);
 759                 }
 760
 761                 /* if this is a tx only vector halve the interrupt rate */
 762                 if (q_vector->txr_count && !q_vector->rxr_count)
 763                         q_vector->eitr = (adapter->eitr_param >> 1);
 764                 else
 765                         /* rx only */
 766                         q_vector->eitr = adapter->eitr_param;
 767
 768                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 769                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 770         }
 771
 772         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 773         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 774
 775         /* set up to autoclear timer, and the vectors */
 776         mask = IXGBE_EIMS_ENABLE_MASK;
 777         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 778         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 779 }
 780
 781 enum latency_range {
 782         lowest_latency = 0,
 783         low_latency = 1,
 784         bulk_latency = 2,
 785         latency_invalid = 255
 786 };
 787
 788 /**
 789  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 790  * @adapter: pointer to adapter
 791  * @eitr: eitr setting (ints per sec) to give last timeslice
 792  * @itr_setting: current throttle rate in ints/second
 793  * @packets: the number of packets during this measurement interval
 794  * @bytes: the number of bytes during this measurement interval
 795  *
 796  *      Stores a new ITR value based on packets and byte
 797  *      counts during the last interrupt.  The advantage of per interrupt
 798  *      computation is faster updates and more accurate ITR for the current
 799  *      traffic pattern.  Constants in this function were computed
 800  *      based on theoretical maximum wire speed and thresholds were set based
 801  *      on testing data as well as attempting to minimize response time
 802  *      while increasing bulk throughput.
 803  *      this functionality is controlled by the InterruptThrottleRate module
 804  *      parameter (see ixgbe_param.c)
 805  **/
 806 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 807                            u32 eitr, u8 itr_setting,
 808                            int packets, int bytes)
 809 {
 810         unsigned int retval = itr_setting;
 811         u32 timepassed_us;
 812         u64 bytes_perint;
 813
 814         if (packets == 0)
 815                 goto update_itr_done;
 816
 817
 818         /* simple throttlerate management
 819          *    0-20MB/s lowest (100000 ints/s)
 820          *   20-100MB/s low   (20000 ints/s)
 821          *  100-1249MB/s bulk (8000 ints/s)
 822          */
 823         /* what was last interrupt timeslice? */
 824         timepassed_us = 1000000/eitr;
 825         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 826
 827         switch (itr_setting) {
 828         case lowest_latency:
 829                 if (bytes_perint > adapter->eitr_low)
 830                         retval = low_latency;
 831                 break;
 832         case low_latency:
 833                 if (bytes_perint > adapter->eitr_high)
 834                         retval = bulk_latency;
 835                 else if (bytes_perint <= adapter->eitr_low)
 836                         retval = lowest_latency;
 837                 break;
 838         case bulk_latency:
 839                 if (bytes_perint <= adapter->eitr_high)
 840                         retval = low_latency;
 841                 break;
 842         }
 843
 844 update_itr_done:
 845         return retval;
 846 }
 847
 848 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 849 {
 850         struct ixgbe_adapter *adapter = q_vector->adapter;
 851         struct ixgbe_hw *hw = &adapter->hw;
 852         u32 new_itr;
 853         u8 current_itr, ret_itr;
 854         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 855                                sizeof(struct ixgbe_q_vector);
 856         struct ixgbe_ring *rx_ring, *tx_ring;
 857
 858         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 859         for (i = 0; i < q_vector->txr_count; i++) {
 860                 tx_ring = &(adapter->tx_ring[r_idx]);
 861                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 862                                            q_vector->tx_itr,
 863                                            tx_ring->total_packets,
 864                                            tx_ring->total_bytes);
 865                 /* if the result for this queue would decrease interrupt
 866                  * rate for this vector then use that result */
 867                 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
 868                                     q_vector->tx_itr - 1 : ret_itr);
 869                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 870                                       r_idx + 1);
 871         }
 872
 873         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 874         for (i = 0; i < q_vector->rxr_count; i++) {
 875                 rx_ring = &(adapter->rx_ring[r_idx]);
 876                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 877                                            q_vector->rx_itr,
 878                                            rx_ring->total_packets,
 879                                            rx_ring->total_bytes);
 880                 /* if the result for this queue would decrease interrupt
 881                  * rate for this vector then use that result */
 882                 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
 883                                     q_vector->rx_itr - 1 : ret_itr);
 884                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 885                                       r_idx + 1);
 886         }
 887
 888         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
 889
 890         switch (current_itr) {
 891         /* counts and packets in update_itr are dependent on these numbers */
 892         case lowest_latency:
 893                 new_itr = 100000;
 894                 break;
 895         case low_latency:
 896                 new_itr = 20000; /* aka hwitr = ~200 */
 897                 break;
 898         case bulk_latency:
 899         default:
 900                 new_itr = 8000;
 901                 break;
 902         }
 903
 904         if (new_itr != q_vector->eitr) {
 905                 u32 itr_reg;
 906                 /* do an exponential smoothing */
 907                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 908                 q_vector->eitr = new_itr;
 909                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 910                 /* must write high and low 16 bits to reset counter */
 911                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 912                         itr_reg);
 913                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 914         }
 915
 916         return;
 917 }
 918
 919 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
 920 {
 921         struct ixgbe_hw *hw = &adapter->hw;
 922
 923         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
 924             (eicr & IXGBE_EICR_GPI_SDP1)) {
 925                 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
 926                 /* write to clear the interrupt */
 927                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
 928         }
 929 }
 930
 931 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 932 {
 933         struct ixgbe_hw *hw = &adapter->hw;
 934
 935         adapter->lsc_int++;
 936         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 937         adapter->link_check_timeout = jiffies;
 938         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 939                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 940                 schedule_work(&adapter->watchdog_task);
 941         }
 942 }
 943
 944 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 945 {
 946         struct net_device *netdev = data;
 947         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 948         struct ixgbe_hw *hw = &adapter->hw;
 949         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 950
 951         if (eicr & IXGBE_EICR_LSC)
 952                 ixgbe_check_lsc(adapter);
 953
 954         ixgbe_check_fan_failure(adapter, eicr);
 955
 956         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 957                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 958
 959         return IRQ_HANDLED;
 960 }
 961
 962 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 963 {
 964         struct ixgbe_q_vector *q_vector = data;
 965         struct ixgbe_adapter  *adapter = q_vector->adapter;
 966         struct ixgbe_ring     *tx_ring;
 967         int i, r_idx;
 968
 969         if (!q_vector->txr_count)
 970                 return IRQ_HANDLED;
 971
 972         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 973         for (i = 0; i < q_vector->txr_count; i++) {
 974                 tx_ring = &(adapter->tx_ring[r_idx]);
 975 #ifdef CONFIG_IXGBE_DCA
 976                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 977                         ixgbe_update_tx_dca(adapter, tx_ring);
 978 #endif
 979                 tx_ring->total_bytes = 0;
 980                 tx_ring->total_packets = 0;
 981                 ixgbe_clean_tx_irq(adapter, tx_ring);
 982                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 983                                       r_idx + 1);
 984         }
 985
 986         return IRQ_HANDLED;
 987 }
 988
 989 /**
 990  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 991  * @irq: unused
 992  * @data: pointer to our q_vector struct for this interrupt vector
 993  **/
 994 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 995 {
 996         struct ixgbe_q_vector *q_vector = data;
 997         struct ixgbe_adapter  *adapter = q_vector->adapter;
 998         struct ixgbe_ring  *rx_ring;
 999         int r_idx;
1000         int i;
1001
1002         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1003         for (i = 0;  i < q_vector->rxr_count; i++) {
1004                 rx_ring = &(adapter->rx_ring[r_idx]);
1005                 rx_ring->total_bytes = 0;
1006                 rx_ring->total_packets = 0;
1007                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1008                                       r_idx + 1);
1009         }
1010
1011         if (!q_vector->rxr_count)
1012                 return IRQ_HANDLED;
1013
1014         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1015         rx_ring = &(adapter->rx_ring[r_idx]);
1016         /* disable interrupts on this vector only */
1017         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1018         netif_rx_schedule(&q_vector->napi);
1019
1020         return IRQ_HANDLED;
1021 }
1022
1023 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1024 {
1025         ixgbe_msix_clean_rx(irq, data);
1026         ixgbe_msix_clean_tx(irq, data);
1027
1028         return IRQ_HANDLED;
1029 }
1030
1031 /**
1032  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1033  * @napi: napi struct with our devices info in it
1034  * @budget: amount of work driver is allowed to do this pass, in packets
1035  *
1036  * This function is optimized for cleaning one queue only on a single
1037  * q_vector!!!
1038  **/
1039 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1040 {
1041         struct ixgbe_q_vector *q_vector =
1042                                container_of(napi, struct ixgbe_q_vector, napi);
1043         struct ixgbe_adapter *adapter = q_vector->adapter;
1044         struct ixgbe_ring *rx_ring = NULL;
1045         int work_done = 0;
1046         long r_idx;
1047
1048         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1049         rx_ring = &(adapter->rx_ring[r_idx]);
1050 #ifdef CONFIG_IXGBE_DCA
1051         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1052                 ixgbe_update_rx_dca(adapter, rx_ring);
1053 #endif
1054
1055         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1056
1057         /* If all Rx work done, exit the polling mode */
1058         if (work_done < budget) {
1059                 netif_rx_complete(napi);
1060                 if (adapter->itr_setting & 3)
1061                         ixgbe_set_itr_msix(q_vector);
1062                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1063                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1064         }
1065
1066         return work_done;
1067 }
1068
1069 /**
1070  * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1071  * @napi: napi struct with our devices info in it
1072  * @budget: amount of work driver is allowed to do this pass, in packets
1073  *
1074  * This function will clean more than one rx queue associated with a
1075  * q_vector.
1076  **/
1077 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1078 {
1079         struct ixgbe_q_vector *q_vector =
1080                                container_of(napi, struct ixgbe_q_vector, napi);
1081         struct ixgbe_adapter *adapter = q_vector->adapter;
1082         struct ixgbe_ring *rx_ring = NULL;
1083         int work_done = 0, i;
1084         long r_idx;
1085         u16 enable_mask = 0;
1086
1087         /* attempt to distribute budget to each queue fairly, but don't allow
1088          * the budget to go below 1 because we'll exit polling */
1089         budget /= (q_vector->rxr_count ?: 1);
1090         budget = max(budget, 1);
1091         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1092         for (i = 0; i < q_vector->rxr_count; i++) {
1093                 rx_ring = &(adapter->rx_ring[r_idx]);
1094 #ifdef CONFIG_IXGBE_DCA
1095                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1096                         ixgbe_update_rx_dca(adapter, rx_ring);
1097 #endif
1098                 ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1099                 enable_mask |= rx_ring->v_idx;
1100                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1101                                       r_idx + 1);
1102         }
1103
1104         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1105         rx_ring = &(adapter->rx_ring[r_idx]);
1106         /* If all Rx work done, exit the polling mode */
1107         if (work_done < budget) {
1108                 netif_rx_complete(napi);
1109                 if (adapter->itr_setting & 3)
1110                         ixgbe_set_itr_msix(q_vector);
1111                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1112                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1113                 return 0;
1114         }
1115
1116         return work_done;
1117 }
1118 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1119                                      int r_idx)
1120 {
1121         a->q_vector[v_idx].adapter = a;
1122         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1123         a->q_vector[v_idx].rxr_count++;
1124         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1125 }
1126
1127 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1128                                      int r_idx)
1129 {
1130         a->q_vector[v_idx].adapter = a;
1131         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1132         a->q_vector[v_idx].txr_count++;
1133         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1134 }
1135
1136 /**
1137  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1138  * @adapter: board private structure to initialize
1139  * @vectors: allotted vector count for descriptor rings
1140  *
1141  * This function maps descriptor rings to the queue-specific vectors
1142  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1143  * one vector per ring/queue, but on a constrained vector budget, we
1144  * group the rings as "efficiently" as possible.  You would add new
1145  * mapping configurations in here.
1146  **/
1147 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1148                                       int vectors)
1149 {
1150         int v_start = 0;
1151         int rxr_idx = 0, txr_idx = 0;
1152         int rxr_remaining = adapter->num_rx_queues;
1153         int txr_remaining = adapter->num_tx_queues;
1154         int i, j;
1155         int rqpv, tqpv;
1156         int err = 0;
1157
1158         /* No mapping required if MSI-X is disabled. */
1159         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1160                 goto out;
1161
1162         /*
1163          * The ideal configuration...
1164          * We have enough vectors to map one per queue.
1165          */
1166         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1167                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1168                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1169
1170                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1171                         map_vector_to_txq(adapter, v_start, txr_idx);
1172
1173                 goto out;
1174         }
1175
1176         /*
1177          * If we don't have enough vectors for a 1-to-1
1178          * mapping, we'll have to group them so there are
1179          * multiple queues per vector.
1180          */
1181         /* Re-adjusting *qpv takes care of the remainder. */
1182         for (i = v_start; i < vectors; i++) {
1183                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1184                 for (j = 0; j < rqpv; j++) {
1185                         map_vector_to_rxq(adapter, i, rxr_idx);
1186                         rxr_idx++;
1187                         rxr_remaining--;
1188                 }
1189         }
1190         for (i = v_start; i < vectors; i++) {
1191                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1192                 for (j = 0; j < tqpv; j++) {
1193                         map_vector_to_txq(adapter, i, txr_idx);
1194                         txr_idx++;
1195                         txr_remaining--;
1196                 }
1197         }
1198
1199 out:
1200         return err;
1201 }
1202
1203 /**
1204  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1205  * @adapter: board private structure
1206  *
1207  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1208  * interrupts from the kernel.
1209  **/
1210 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1211 {
1212         struct net_device *netdev = adapter->netdev;
1213         irqreturn_t (*handler)(int, void *);
1214         int i, vector, q_vectors, err;
1215         int ri=0, ti=0;
1216
1217         /* Decrement for Other and TCP Timer vectors */
1218         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1219
1220         /* Map the Tx/Rx rings to the vectors we were allotted. */
1221         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1222         if (err)
1223                 goto out;
1224
1225 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1226                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1227                          &ixgbe_msix_clean_many)
1228         for (vector = 0; vector < q_vectors; vector++) {
1229                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1230
1231                 if(handler == &ixgbe_msix_clean_rx) {
1232                         sprintf(adapter->name[vector], "%s-%s-%d",
1233                                 netdev->name, "rx", ri++);
1234                 }
1235                 else if(handler == &ixgbe_msix_clean_tx) {
1236                         sprintf(adapter->name[vector], "%s-%s-%d",
1237                                 netdev->name, "tx", ti++);
1238                 }
1239                 else
1240                         sprintf(adapter->name[vector], "%s-%s-%d",
1241                                 netdev->name, "TxRx", vector);
1242
1243                 err = request_irq(adapter->msix_entries[vector].vector,
1244                                   handler, 0, adapter->name[vector],
1245                                   &(adapter->q_vector[vector]));
1246                 if (err) {
1247                         DPRINTK(PROBE, ERR,
1248                                 "request_irq failed for MSIX interrupt "
1249                                 "Error: %d\n", err);
1250                         goto free_queue_irqs;
1251                 }
1252         }
1253
1254         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1255         err = request_irq(adapter->msix_entries[vector].vector,
1256                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1257         if (err) {
1258                 DPRINTK(PROBE, ERR,
1259                         "request_irq for msix_lsc failed: %d\n", err);
1260                 goto free_queue_irqs;
1261         }
1262
1263         return 0;
1264
1265 free_queue_irqs:
1266         for (i = vector - 1; i >= 0; i--)
1267                 free_irq(adapter->msix_entries[--vector].vector,
1268                          &(adapter->q_vector[i]));
1269         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1270         pci_disable_msix(adapter->pdev);
1271         kfree(adapter->msix_entries);
1272         adapter->msix_entries = NULL;
1273 out:
1274         return err;
1275 }
1276
1277 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1278 {
1279         struct ixgbe_hw *hw = &adapter->hw;
1280         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1281         u8 current_itr;
1282         u32 new_itr = q_vector->eitr;
1283         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1284         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1285
1286         q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1287                                             q_vector->tx_itr,
1288                                             tx_ring->total_packets,
1289                                             tx_ring->total_bytes);
1290         q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1291                                             q_vector->rx_itr,
1292                                             rx_ring->total_packets,
1293                                             rx_ring->total_bytes);
1294
1295         current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1296
1297         switch (current_itr) {
1298         /* counts and packets in update_itr are dependent on these numbers */
1299         case lowest_latency:
1300                 new_itr = 100000;
1301                 break;
1302         case low_latency:
1303                 new_itr = 20000; /* aka hwitr = ~200 */
1304                 break;
1305         case bulk_latency:
1306                 new_itr = 8000;
1307                 break;
1308         default:
1309                 break;
1310         }
1311
1312         if (new_itr != q_vector->eitr) {
1313                 u32 itr_reg;
1314                 /* do an exponential smoothing */
1315                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1316                 q_vector->eitr = new_itr;
1317                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1318                 /* must write high and low 16 bits to reset counter */
1319                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1320         }
1321
1322         return;
1323 }
1324
1325 /**
1326  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1327  * @adapter: board private structure
1328  **/
1329 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1330 {
1331         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1332         IXGBE_WRITE_FLUSH(&adapter->hw);
1333         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1334                 int i;
1335                 for (i = 0; i < adapter->num_msix_vectors; i++)
1336                         synchronize_irq(adapter->msix_entries[i].vector);
1337         } else {
1338                 synchronize_irq(adapter->pdev->irq);
1339         }
1340 }
1341
1342 /**
1343  * ixgbe_irq_enable - Enable default interrupt generation settings
1344  * @adapter: board private structure
1345  **/
1346 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1347 {
1348         u32 mask;
1349         mask = IXGBE_EIMS_ENABLE_MASK;
1350         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1351                 mask |= IXGBE_EIMS_GPI_SDP1;
1352         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1353         IXGBE_WRITE_FLUSH(&adapter->hw);
1354 }
1355
1356 /**
1357  * ixgbe_intr - legacy mode Interrupt Handler
1358  * @irq: interrupt number
1359  * @data: pointer to a network interface device structure
1360  **/
1361 static irqreturn_t ixgbe_intr(int irq, void *data)
1362 {
1363         struct net_device *netdev = data;
1364         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1365         struct ixgbe_hw *hw = &adapter->hw;
1366         u32 eicr;
1367
1368         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1369          * therefore no explict interrupt disable is necessary */
1370         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1371         if (!eicr) {
1372                 /* shared interrupt alert!
1373                  * make sure interrupts are enabled because the read will
1374                  * have disabled interrupts due to EIAM */
1375                 ixgbe_irq_enable(adapter);
1376                 return IRQ_NONE;        /* Not our interrupt */
1377         }
1378
1379         if (eicr & IXGBE_EICR_LSC)
1380                 ixgbe_check_lsc(adapter);
1381
1382         ixgbe_check_fan_failure(adapter, eicr);
1383
1384         if (netif_rx_schedule_prep(&adapter->q_vector[0].napi)) {
1385                 adapter->tx_ring[0].total_packets = 0;
1386                 adapter->tx_ring[0].total_bytes = 0;
1387                 adapter->rx_ring[0].total_packets = 0;
1388                 adapter->rx_ring[0].total_bytes = 0;
1389                 /* would disable interrupts here but EIAM disabled it */
1390                 __netif_rx_schedule(&adapter->q_vector[0].napi);
1391         }
1392
1393         return IRQ_HANDLED;
1394 }
1395
1396 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1397 {
1398         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1399
1400         for (i = 0; i < q_vectors; i++) {
1401                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1402                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1403                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1404                 q_vector->rxr_count = 0;
1405                 q_vector->txr_count = 0;
1406         }
1407 }
1408
1409 /**
1410  * ixgbe_request_irq - initialize interrupts
1411  * @adapter: board private structure
1412  *
1413  * Attempts to configure interrupts using the best available
1414  * capabilities of the hardware and kernel.
1415  **/
1416 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1417 {
1418         struct net_device *netdev = adapter->netdev;
1419         int err;
1420
1421         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1422                 err = ixgbe_request_msix_irqs(adapter);
1423         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1424                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1425                                   netdev->name, netdev);
1426         } else {
1427                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1428                                   netdev->name, netdev);
1429         }
1430
1431         if (err)
1432                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1433
1434         return err;
1435 }
1436
1437 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1438 {
1439         struct net_device *netdev = adapter->netdev;
1440
1441         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1442                 int i, q_vectors;
1443
1444                 q_vectors = adapter->num_msix_vectors;
1445
1446                 i = q_vectors - 1;
1447                 free_irq(adapter->msix_entries[i].vector, netdev);
1448
1449                 i--;
1450                 for (; i >= 0; i--) {
1451                         free_irq(adapter->msix_entries[i].vector,
1452                                  &(adapter->q_vector[i]));
1453                 }
1454
1455                 ixgbe_reset_q_vectors(adapter);
1456         } else {
1457                 free_irq(adapter->pdev->irq, netdev);
1458         }
1459 }
1460
1461 /**
1462  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1463  *
1464  **/
1465 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1466 {
1467         struct ixgbe_hw *hw = &adapter->hw;
1468
1469         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1470                         EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1471
1472         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1473         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1474
1475         map_vector_to_rxq(adapter, 0, 0);
1476         map_vector_to_txq(adapter, 0, 0);
1477
1478         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1479 }
1480
1481 /**
1482  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1483  * @adapter: board private structure
1484  *
1485  * Configure the Tx unit of the MAC after a reset.
1486  **/
1487 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1488 {
1489         u64 tdba, tdwba;
1490         struct ixgbe_hw *hw = &adapter->hw;
1491         u32 i, j, tdlen, txctrl;
1492
1493         /* Setup the HW Tx Head and Tail descriptor pointers */
1494         for (i = 0; i < adapter->num_tx_queues; i++) {
1495                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1496                 j = ring->reg_idx;
1497                 tdba = ring->dma;
1498                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1499                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1500                                 (tdba & DMA_32BIT_MASK));
1501                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1502                 tdwba = ring->dma +
1503                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1504                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1505                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1506                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1507                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1508                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1509                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1510                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1511                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1512                 /* Disable Tx Head Writeback RO bit, since this hoses
1513                  * bookkeeping if things aren't delivered in order.
1514                  */
1515                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1516                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1517                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1518         }
1519 }
1520
1521 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1522
1523 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1524 {
1525         struct ixgbe_ring *rx_ring;
1526         u32 srrctl;
1527         int queue0;
1528         unsigned long mask;
1529
1530         /* program one srrctl register per VMDq index */
1531         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1532                 long shift, len;
1533                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1534                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1535                 shift = find_first_bit(&mask, len);
1536                 queue0 = index & mask;
1537                 index = (index & mask) >> shift;
1538         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1539         } else {
1540                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1541                 queue0 = index & mask;
1542                 index = index & mask;
1543         }
1544
1545         rx_ring = &adapter->rx_ring[queue0];
1546
1547         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1548
1549         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1550         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1551
1552         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1553                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1554                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1555                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1556                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1557                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1558         } else {
1559                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1560
1561                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1562                         srrctl |= IXGBE_RXBUFFER_2048 >>
1563                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1564                 else
1565                         srrctl |= rx_ring->rx_buf_len >>
1566                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1567         }
1568         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1569 }
1570
1571 /**
1572  * ixgbe_get_skb_hdr - helper function for LRO header processing
1573  * @skb: pointer to sk_buff to be added to LRO packet
1574  * @iphdr: pointer to ip header structure
1575  * @tcph: pointer to tcp header structure
1576  * @hdr_flags: pointer to header flags
1577  * @priv: private data
1578  **/
1579 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1580                              u64 *hdr_flags, void *priv)
1581 {
1582         union ixgbe_adv_rx_desc *rx_desc = priv;
1583
1584         /* Verify that this is a valid IPv4 TCP packet */
1585         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1586              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1587                 return -1;
1588
1589         /* Set network headers */
1590         skb_reset_network_header(skb);
1591         skb_set_transport_header(skb, ip_hdrlen(skb));
1592         *iphdr = ip_hdr(skb);
1593         *tcph = tcp_hdr(skb);
1594         *hdr_flags = LRO_IPV4 | LRO_TCP;
1595         return 0;
1596 }
1597
1598 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1599                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1600
1601 /**
1602  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1603  * @adapter: board private structure
1604  *
1605  * Configure the Rx unit of the MAC after a reset.
1606  **/
1607 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1608 {
1609         u64 rdba;
1610         struct ixgbe_hw *hw = &adapter->hw;
1611         struct net_device *netdev = adapter->netdev;
1612         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1613         int i, j;
1614         u32 rdlen, rxctrl, rxcsum;
1615         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1616                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1617                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1618         u32 fctrl, hlreg0;
1619         u32 pages;
1620         u32 reta = 0, mrqc;
1621         u32 rdrxctl;
1622         int rx_buf_len;
1623
1624         /* Decide whether to use packet split mode or not */
1625         adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1626
1627         /* Set the RX buffer length according to the mode */
1628         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1629                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1630         } else {
1631                 if (netdev->mtu <= ETH_DATA_LEN)
1632                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1633                 else
1634                         rx_buf_len = ALIGN(max_frame, 1024);
1635         }
1636
1637         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1638         fctrl |= IXGBE_FCTRL_BAM;
1639         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1640         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1641
1642         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1643         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1644                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1645         else
1646                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1647         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1648
1649         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1650
1651         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1652         /* disable receives while setting up the descriptors */
1653         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1654         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1655
1656         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1657          * the Base and Length of the Rx Descriptor Ring */
1658         for (i = 0; i < adapter->num_rx_queues; i++) {
1659                 rdba = adapter->rx_ring[i].dma;
1660                 j = adapter->rx_ring[i].reg_idx;
1661                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1662                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1663                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1664                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1665                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1666                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1667                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1668                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1669                 /* Intitial LRO Settings */
1670                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1671                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1672                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1673                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1674                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1675                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1676                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1677                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1678                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1679
1680                 ixgbe_configure_srrctl(adapter, j);
1681         }
1682
1683         /*
1684          * For VMDq support of different descriptor types or
1685          * buffer sizes through the use of multiple SRRCTL
1686          * registers, RDRXCTL.MVMEN must be set to 1
1687          *
1688          * also, the manual doesn't mention it clearly but DCA hints
1689          * will only use queue 0's tags unless this bit is set.  Side
1690          * effects of setting this bit are only that SRRCTL must be
1691          * fully programmed [0..15]
1692          */
1693         if (adapter->flags &
1694             (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1695                 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1696                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1697                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1698         }
1699
1700         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1701                 /* Fill out redirection table */
1702                 for (i = 0, j = 0; i < 128; i++, j++) {
1703                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1704                                 j = 0;
1705                         /* reta = 4-byte sliding window of
1706                          * 0x00..(indices-1)(indices-1)00..etc. */
1707                         reta = (reta << 8) | (j * 0x11);
1708                         if ((i & 3) == 3)
1709                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1710                 }
1711
1712                 /* Fill out hash function seeds */
1713                 for (i = 0; i < 10; i++)
1714                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1715
1716                 mrqc = IXGBE_MRQC_RSSEN
1717                     /* Perform hash on these packet types */
1718                        | IXGBE_MRQC_RSS_FIELD_IPV4
1719                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1720                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1721                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1722                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1723                        | IXGBE_MRQC_RSS_FIELD_IPV6
1724                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1725                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1726                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1727                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1728         }
1729
1730         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1731
1732         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1733             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1734                 /* Disable indicating checksum in descriptor, enables
1735                  * RSS hash */
1736                 rxcsum |= IXGBE_RXCSUM_PCSD;
1737         }
1738         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1739                 /* Enable IPv4 payload checksum for UDP fragments
1740                  * if PCSD is not set */
1741                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1742         }
1743
1744         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1745 }
1746
1747 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1748 {
1749         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1750         struct ixgbe_hw *hw = &adapter->hw;
1751
1752         /* add VID to filter table */
1753         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1754 }
1755
1756 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1757 {
1758         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1759         struct ixgbe_hw *hw = &adapter->hw;
1760
1761         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1762                 ixgbe_irq_disable(adapter);
1763
1764         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1765
1766         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1767                 ixgbe_irq_enable(adapter);
1768
1769         /* remove VID from filter table */
1770         hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1771 }
1772
1773 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1774                                    struct vlan_group *grp)
1775 {
1776         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1777         u32 ctrl;
1778
1779         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1780                 ixgbe_irq_disable(adapter);
1781         adapter->vlgrp = grp;
1782
1783         /*
1784          * For a DCB driver, always enable VLAN tag stripping so we can
1785          * still receive traffic from a DCB-enabled host even if we're
1786          * not in DCB mode.
1787          */
1788         ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1789         ctrl |= IXGBE_VLNCTRL_VME;
1790         ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1791         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1792         ixgbe_vlan_rx_add_vid(netdev, 0);
1793
1794         if (grp) {
1795                 /* enable VLAN tag insert/strip */
1796                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1797                 ctrl |= IXGBE_VLNCTRL_VME;
1798                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1799                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1800         }
1801
1802         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1803                 ixgbe_irq_enable(adapter);
1804 }
1805
1806 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1807 {
1808         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1809
1810         if (adapter->vlgrp) {
1811                 u16 vid;
1812                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1813                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1814                                 continue;
1815                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1816                 }
1817         }
1818 }
1819
1820 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1821 {
1822         struct dev_mc_list *mc_ptr;
1823         u8 *addr = *mc_addr_ptr;
1824         *vmdq = 0;
1825
1826         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1827         if (mc_ptr->next)
1828                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1829         else
1830                 *mc_addr_ptr = NULL;
1831
1832         return addr;
1833 }
1834
1835 /**
1836  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1837  * @netdev: network interface device structure
1838  *
1839  * The set_rx_method entry point is called whenever the unicast/multicast
1840  * address list or the network interface flags are updated.  This routine is
1841  * responsible for configuring the hardware for proper unicast, multicast and
1842  * promiscuous mode.
1843  **/
1844 static void ixgbe_set_rx_mode(struct net_device *netdev)
1845 {
1846         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1847         struct ixgbe_hw *hw = &adapter->hw;
1848         u32 fctrl, vlnctrl;
1849         u8 *addr_list = NULL;
1850         int addr_count = 0;
1851
1852         /* Check for Promiscuous and All Multicast modes */
1853
1854         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1855         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1856
1857         if (netdev->flags & IFF_PROMISC) {
1858                 hw->addr_ctrl.user_set_promisc = 1;
1859                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1860                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1861         } else {
1862                 if (netdev->flags & IFF_ALLMULTI) {
1863                         fctrl |= IXGBE_FCTRL_MPE;
1864                         fctrl &= ~IXGBE_FCTRL_UPE;
1865                 } else {
1866                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1867                 }
1868                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1869                 hw->addr_ctrl.user_set_promisc = 0;
1870         }
1871
1872         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1873         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1874
1875         /* reprogram secondary unicast list */
1876         addr_count = netdev->uc_count;
1877         if (addr_count)
1878                 addr_list = netdev->uc_list->dmi_addr;
1879         hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1880                                           ixgbe_addr_list_itr);
1881
1882         /* reprogram multicast list */
1883         addr_count = netdev->mc_count;
1884         if (addr_count)
1885                 addr_list = netdev->mc_list->dmi_addr;
1886         hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1887                                         ixgbe_addr_list_itr);
1888 }
1889
1890 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1891 {
1892         int q_idx;
1893         struct ixgbe_q_vector *q_vector;
1894         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1895
1896         /* legacy and MSI only use one vector */
1897         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1898                 q_vectors = 1;
1899
1900         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1901                 struct napi_struct *napi;
1902                 q_vector = &adapter->q_vector[q_idx];
1903                 if (!q_vector->rxr_count)
1904                         continue;
1905                 napi = &q_vector->napi;
1906                 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1907                     (q_vector->rxr_count > 1))
1908                         napi->poll = &ixgbe_clean_rxonly_many;
1909
1910                 napi_enable(napi);
1911         }
1912 }
1913
1914 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1915 {
1916         int q_idx;
1917         struct ixgbe_q_vector *q_vector;
1918         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1919
1920         /* legacy and MSI only use one vector */
1921         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1922                 q_vectors = 1;
1923
1924         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1925                 q_vector = &adapter->q_vector[q_idx];
1926                 if (!q_vector->rxr_count)
1927                         continue;
1928                 napi_disable(&q_vector->napi);
1929         }
1930 }
1931
1932 #ifdef CONFIG_IXGBE_DCB
1933 /*
1934  * ixgbe_configure_dcb - Configure DCB hardware
1935  * @adapter: ixgbe adapter struct
1936  *
1937  * This is called by the driver on open to configure the DCB hardware.
1938  * This is also called by the gennetlink interface when reconfiguring
1939  * the DCB state.
1940  */
1941 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1942 {
1943         struct ixgbe_hw *hw = &adapter->hw;
1944         u32 txdctl, vlnctrl;
1945         int i, j;
1946
1947         ixgbe_dcb_check_config(&adapter->dcb_cfg);
1948         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1949         ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1950
1951         /* reconfigure the hardware */
1952         ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1953
1954         for (i = 0; i < adapter->num_tx_queues; i++) {
1955                 j = adapter->tx_ring[i].reg_idx;
1956                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1957                 /* PThresh workaround for Tx hang with DFP enabled. */
1958                 txdctl |= 32;
1959                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1960         }
1961         /* Enable VLAN tag insert/strip */
1962         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1963         vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1964         vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1965         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1966         hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1967 }
1968
1969 #endif
1970 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1971 {
1972         struct net_device *netdev = adapter->netdev;
1973         int i;
1974
1975         ixgbe_set_rx_mode(netdev);
1976
1977         ixgbe_restore_vlan(adapter);
1978 #ifdef CONFIG_IXGBE_DCB
1979         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1980                 netif_set_gso_max_size(netdev, 32768);
1981                 ixgbe_configure_dcb(adapter);
1982         } else {
1983                 netif_set_gso_max_size(netdev, 65536);
1984         }
1985 #else
1986         netif_set_gso_max_size(netdev, 65536);
1987 #endif
1988
1989         ixgbe_configure_tx(adapter);
1990         ixgbe_configure_rx(adapter);
1991         for (i = 0; i < adapter->num_rx_queues; i++)
1992                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1993                                        (adapter->rx_ring[i].count - 1));
1994 }
1995
1996 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1997 {
1998         struct net_device *netdev = adapter->netdev;
1999         struct ixgbe_hw *hw = &adapter->hw;
2000         int i, j = 0;
2001         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2002         u32 txdctl, rxdctl, mhadd;
2003         u32 gpie;
2004
2005         ixgbe_get_hw_control(adapter);
2006
2007         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2008             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2009                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2010                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2011                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2012                 } else {
2013                         /* MSI only */
2014                         gpie = 0;
2015                 }
2016                 /* XXX: to interrupt immediately for EICS writes, enable this */
2017                 /* gpie |= IXGBE_GPIE_EIMEN; */
2018                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2019         }
2020
2021         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2022                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2023                  * specifically only auto mask tx and rx interrupts */
2024                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2025         }
2026
2027         /* Enable fan failure interrupt if media type is copper */
2028         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2029                 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2030                 gpie |= IXGBE_SDP1_GPIEN;
2031                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2032         }
2033
2034         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2035         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2036                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2037                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2038
2039                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2040         }
2041
2042         for (i = 0; i < adapter->num_tx_queues; i++) {
2043                 j = adapter->tx_ring[i].reg_idx;
2044                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2045                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2046                 txdctl |= (8 << 16);
2047                 txdctl |= IXGBE_TXDCTL_ENABLE;
2048                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2049         }
2050
2051         for (i = 0; i < adapter->num_rx_queues; i++) {
2052                 j = adapter->rx_ring[i].reg_idx;
2053                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2054                 /* enable PTHRESH=32 descriptors (half the internal cache)
2055                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
2056                  * this also removes a pesky rx_no_buffer_count increment */
2057                 rxdctl |= 0x0020;
2058                 rxdctl |= IXGBE_RXDCTL_ENABLE;
2059                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2060         }
2061         /* enable all receives */
2062         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2063         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2064         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2065
2066         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2067                 ixgbe_configure_msix(adapter);
2068         else
2069                 ixgbe_configure_msi_and_legacy(adapter);
2070
2071         ixgbe_napi_add_all(adapter);
2072
2073         clear_bit(__IXGBE_DOWN, &adapter->state);
2074         ixgbe_napi_enable_all(adapter);
2075
2076         /* clear any pending interrupts, may auto mask */
2077         IXGBE_READ_REG(hw, IXGBE_EICR);
2078
2079         ixgbe_irq_enable(adapter);
2080
2081         /* bring the link up in the watchdog, this could race with our first
2082          * link up interrupt but shouldn't be a problem */
2083         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2084         adapter->link_check_timeout = jiffies;
2085         mod_timer(&adapter->watchdog_timer, jiffies);
2086         return 0;
2087 }
2088
2089 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2090 {
2091         WARN_ON(in_interrupt());
2092         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2093                 msleep(1);
2094         ixgbe_down(adapter);
2095         ixgbe_up(adapter);
2096         clear_bit(__IXGBE_RESETTING, &adapter->state);
2097 }
2098
2099 int ixgbe_up(struct ixgbe_adapter *adapter)
2100 {
2101         /* hardware has been reset, we need to reload some things */
2102         ixgbe_configure(adapter);
2103
2104         return ixgbe_up_complete(adapter);
2105 }
2106
2107 void ixgbe_reset(struct ixgbe_adapter *adapter)
2108 {
2109         struct ixgbe_hw *hw = &adapter->hw;
2110         if (hw->mac.ops.init_hw(hw))
2111                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2112
2113         /* reprogram the RAR[0] in case user changed it. */
2114         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2115
2116 }
2117
2118 /**
2119  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2120  * @adapter: board private structure
2121  * @rx_ring: ring to free buffers from
2122  **/
2123 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2124                                 struct ixgbe_ring *rx_ring)
2125 {
2126         struct pci_dev *pdev = adapter->pdev;
2127         unsigned long size;
2128         unsigned int i;
2129
2130         /* Free all the Rx ring sk_buffs */
2131
2132         for (i = 0; i < rx_ring->count; i++) {
2133                 struct ixgbe_rx_buffer *rx_buffer_info;
2134
2135                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2136                 if (rx_buffer_info->dma) {
2137                         pci_unmap_single(pdev, rx_buffer_info->dma,
2138                                          rx_ring->rx_buf_len,
2139                                          PCI_DMA_FROMDEVICE);
2140                         rx_buffer_info->dma = 0;
2141                 }
2142                 if (rx_buffer_info->skb) {
2143                         dev_kfree_skb(rx_buffer_info->skb);
2144                         rx_buffer_info->skb = NULL;
2145                 }
2146                 if (!rx_buffer_info->page)
2147                         continue;
2148                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2149                                PCI_DMA_FROMDEVICE);
2150                 rx_buffer_info->page_dma = 0;
2151                 put_page(rx_buffer_info->page);
2152                 rx_buffer_info->page = NULL;
2153                 rx_buffer_info->page_offset = 0;
2154         }
2155
2156         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2157         memset(rx_ring->rx_buffer_info, 0, size);
2158
2159         /* Zero out the descriptor ring */
2160         memset(rx_ring->desc, 0, rx_ring->size);
2161
2162         rx_ring->next_to_clean = 0;
2163         rx_ring->next_to_use = 0;
2164
2165         writel(0, adapter->hw.hw_addr + rx_ring->head);
2166         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2167 }
2168
2169 /**
2170  * ixgbe_clean_tx_ring - Free Tx Buffers
2171  * @adapter: board private structure
2172  * @tx_ring: ring to be cleaned
2173  **/
2174 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2175                                 struct ixgbe_ring *tx_ring)
2176 {
2177         struct ixgbe_tx_buffer *tx_buffer_info;
2178         unsigned long size;
2179         unsigned int i;
2180
2181         /* Free all the Tx ring sk_buffs */
2182
2183         for (i = 0; i < tx_ring->count; i++) {
2184                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2185                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2186         }
2187
2188         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2189         memset(tx_ring->tx_buffer_info, 0, size);
2190
2191         /* Zero out the descriptor ring */
2192         memset(tx_ring->desc, 0, tx_ring->size);
2193
2194         tx_ring->next_to_use = 0;
2195         tx_ring->next_to_clean = 0;
2196
2197         writel(0, adapter->hw.hw_addr + tx_ring->head);
2198         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2199 }
2200
2201 /**
2202  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2203  * @adapter: board private structure
2204  **/
2205 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2206 {
2207         int i;
2208
2209         for (i = 0; i < adapter->num_rx_queues; i++)
2210                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2211 }
2212
2213 /**
2214  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2215  * @adapter: board private structure
2216  **/
2217 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2218 {
2219         int i;
2220
2221         for (i = 0; i < adapter->num_tx_queues; i++)
2222                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2223 }
2224
2225 void ixgbe_down(struct ixgbe_adapter *adapter)
2226 {
2227         struct net_device *netdev = adapter->netdev;
2228         struct ixgbe_hw *hw = &adapter->hw;
2229         u32 rxctrl;
2230         u32 txdctl;
2231         int i, j;
2232
2233         /* signal that we are down to the interrupt handler */
2234         set_bit(__IXGBE_DOWN, &adapter->state);
2235
2236         /* disable receives */
2237         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2238         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2239
2240         netif_tx_disable(netdev);
2241
2242         IXGBE_WRITE_FLUSH(hw);
2243         msleep(10);
2244
2245         netif_tx_stop_all_queues(netdev);
2246
2247         ixgbe_irq_disable(adapter);
2248
2249         ixgbe_napi_disable_all(adapter);
2250
2251         del_timer_sync(&adapter->watchdog_timer);
2252         cancel_work_sync(&adapter->watchdog_task);
2253
2254         /* disable transmits in the hardware now that interrupts are off */
2255         for (i = 0; i < adapter->num_tx_queues; i++) {
2256                 j = adapter->tx_ring[i].reg_idx;
2257                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2258                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2259                                 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2260         }
2261
2262         netif_carrier_off(netdev);
2263
2264 #ifdef CONFIG_IXGBE_DCA
2265         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2266                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2267                 dca_remove_requester(&adapter->pdev->dev);
2268         }
2269
2270 #endif
2271         if (!pci_channel_offline(adapter->pdev))
2272                 ixgbe_reset(adapter);
2273         ixgbe_clean_all_tx_rings(adapter);
2274         ixgbe_clean_all_rx_rings(adapter);
2275
2276 #ifdef CONFIG_IXGBE_DCA
2277         /* since we reset the hardware DCA settings were cleared */
2278         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2279                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2280                 /* always use CB2 mode, difference is masked
2281                  * in the CB driver */
2282                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2283                 ixgbe_setup_dca(adapter);
2284         }
2285 #endif
2286 }
2287
2288 /**
2289  * ixgbe_poll - NAPI Rx polling callback
2290  * @napi: structure for representing this polling device
2291  * @budget: how many packets driver is allowed to clean
2292  *
2293  * This function is used for legacy and MSI, NAPI mode
2294  **/
2295 static int ixgbe_poll(struct napi_struct *napi, int budget)
2296 {
2297         struct ixgbe_q_vector *q_vector = container_of(napi,
2298                                                   struct ixgbe_q_vector, napi);
2299         struct ixgbe_adapter *adapter = q_vector->adapter;
2300         int tx_cleaned, work_done = 0;
2301
2302 #ifdef CONFIG_IXGBE_DCA
2303         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2304                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2305                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2306         }
2307 #endif
2308
2309         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2310         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2311
2312         if (tx_cleaned)
2313                 work_done = budget;
2314
2315         /* If budget not fully consumed, exit the polling mode */
2316         if (work_done < budget) {
2317                 netif_rx_complete(napi);
2318                 if (adapter->itr_setting & 3)
2319                         ixgbe_set_itr(adapter);
2320                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2321                         ixgbe_irq_enable(adapter);
2322         }
2323         return work_done;
2324 }
2325
2326 /**
2327  * ixgbe_tx_timeout - Respond to a Tx Hang
2328  * @netdev: network interface device structure
2329  **/
2330 static void ixgbe_tx_timeout(struct net_device *netdev)
2331 {
2332         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2333
2334         /* Do the reset outside of interrupt context */
2335         schedule_work(&adapter->reset_task);
2336 }
2337
2338 static void ixgbe_reset_task(struct work_struct *work)
2339 {
2340         struct ixgbe_adapter *adapter;
2341         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2342
2343         /* If we're already down or resetting, just bail */
2344         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2345             test_bit(__IXGBE_RESETTING, &adapter->state))
2346                 return;
2347
2348         adapter->tx_timeout_count++;
2349
2350         ixgbe_reinit_locked(adapter);
2351 }
2352
2353 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2354 {
2355         int nrq = 1, ntq = 1;
2356         int feature_mask = 0, rss_i, rss_m;
2357         int dcb_i, dcb_m;
2358
2359         /* Number of supported queues */
2360         switch (adapter->hw.mac.type) {
2361         case ixgbe_mac_82598EB:
2362                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2363                 dcb_m = 0;
2364                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2365                 rss_m = 0;
2366                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2367                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2368
2369                 switch (adapter->flags & feature_mask) {
2370                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2371                         dcb_m = 0x7 << 3;
2372                         rss_i = min(8, rss_i);
2373                         rss_m = 0x7;
2374                         nrq = dcb_i * rss_i;
2375                         ntq = min(MAX_TX_QUEUES, dcb_i * rss_i);
2376                         break;
2377                 case (IXGBE_FLAG_DCB_ENABLED):
2378                         dcb_m = 0x7 << 3;
2379                         nrq = dcb_i;
2380                         ntq = dcb_i;
2381                         break;
2382                 case (IXGBE_FLAG_RSS_ENABLED):
2383                         rss_m = 0xF;
2384                         nrq = rss_i;
2385                         ntq = rss_i;
2386                         break;
2387                 case 0:
2388                 default:
2389                         dcb_i = 0;
2390                         dcb_m = 0;
2391                         rss_i = 0;
2392                         rss_m = 0;
2393                         nrq = 1;
2394                         ntq = 1;
2395                         break;
2396                 }
2397
2398                 /* Sanity check, we should never have zero queues */
2399                 nrq = (nrq ?:1);
2400                 ntq = (ntq ?:1);
2401
2402                 adapter->ring_feature[RING_F_DCB].indices = dcb_i;
2403                 adapter->ring_feature[RING_F_DCB].mask = dcb_m;
2404                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2405                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2406                 break;
2407         default:
2408                 nrq = 1;
2409                 ntq = 1;
2410                 break;
2411         }
2412
2413         adapter->num_rx_queues = nrq;
2414         adapter->num_tx_queues = ntq;
2415 }
2416
2417 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2418                                        int vectors)
2419 {
2420         int err, vector_threshold;
2421
2422         /* We'll want at least 3 (vector_threshold):
2423          * 1) TxQ[0] Cleanup
2424          * 2) RxQ[0] Cleanup
2425          * 3) Other (Link Status Change, etc.)
2426          * 4) TCP Timer (optional)
2427          */
2428         vector_threshold = MIN_MSIX_COUNT;
2429
2430         /* The more we get, the more we will assign to Tx/Rx Cleanup
2431          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2432          * Right now, we simply care about how many we'll get; we'll
2433          * set them up later while requesting irq's.
2434          */
2435         while (vectors >= vector_threshold) {
2436                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2437                                       vectors);
2438                 if (!err) /* Success in acquiring all requested vectors. */
2439                         break;
2440                 else if (err < 0)
2441                         vectors = 0; /* Nasty failure, quit now */
2442                 else /* err == number of vectors we should try again with */
2443                         vectors = err;
2444         }
2445
2446         if (vectors < vector_threshold) {
2447                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2448                  * This just means we'll go with either a single MSI
2449                  * vector or fall back to legacy interrupts.
2450                  */
2451                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2452                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2453                 kfree(adapter->msix_entries);
2454                 adapter->msix_entries = NULL;
2455                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2456                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2457                 ixgbe_set_num_queues(adapter);
2458         } else {
2459                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2460                 adapter->num_msix_vectors = vectors;
2461         }
2462 }
2463
2464 /**
2465  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2466  * @adapter: board private structure to initialize
2467  *
2468  * Once we know the feature-set enabled for the device, we'll cache
2469  * the register offset the descriptor ring is assigned to.
2470  **/
2471 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2472 {
2473         int feature_mask = 0, rss_i;
2474         int i, txr_idx, rxr_idx;
2475         int dcb_i;
2476
2477         /* Number of supported queues */
2478         switch (adapter->hw.mac.type) {
2479         case ixgbe_mac_82598EB:
2480                 dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2481                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2482                 txr_idx = 0;
2483                 rxr_idx = 0;
2484                 feature_mask |= IXGBE_FLAG_DCB_ENABLED;
2485                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2486                 switch (adapter->flags & feature_mask) {
2487                 case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_DCB_ENABLED):
2488                         for (i = 0; i < dcb_i; i++) {
2489                                 int j;
2490                                 /* Rx first */
2491                                 for (j = 0; j < adapter->num_rx_queues; j++) {
2492                                         adapter->rx_ring[rxr_idx].reg_idx =
2493                                                 i << 3 | j;
2494                                         rxr_idx++;
2495                                 }
2496                                 /* Tx now */
2497                                 for (j = 0; j < adapter->num_tx_queues; j++) {
2498                                         adapter->tx_ring[txr_idx].reg_idx =
2499                                                 i << 2 | (j >> 1);
2500                                         if (j & 1)
2501                                                 txr_idx++;
2502                                 }
2503                         }
2504                 case (IXGBE_FLAG_DCB_ENABLED):
2505                         /* the number of queues is assumed to be symmetric */
2506                         for (i = 0; i < dcb_i; i++) {
2507                                 adapter->rx_ring[i].reg_idx = i << 3;
2508                                 adapter->tx_ring[i].reg_idx = i << 2;
2509                         }
2510                         break;
2511                 case (IXGBE_FLAG_RSS_ENABLED):
2512                         for (i = 0; i < adapter->num_rx_queues; i++)
2513                                 adapter->rx_ring[i].reg_idx = i;
2514                         for (i = 0; i < adapter->num_tx_queues; i++)
2515                                 adapter->tx_ring[i].reg_idx = i;
2516                         break;
2517                 case 0:
2518                 default:
2519                         break;
2520                 }
2521                 break;
2522         default:
2523                 break;
2524         }
2525 }
2526
2527 /**
2528  * ixgbe_alloc_queues - Allocate memory for all rings
2529  * @adapter: board private structure to initialize
2530  *
2531  * We allocate one ring per queue at run-time since we don't know the
2532  * number of queues at compile-time.
2533  **/
2534 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2535 {
2536         int i;
2537
2538         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2539                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2540         if (!adapter->tx_ring)
2541                 goto err_tx_ring_allocation;
2542
2543         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2544                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2545         if (!adapter->rx_ring)
2546                 goto err_rx_ring_allocation;
2547
2548         for (i = 0; i < adapter->num_tx_queues; i++) {
2549                 adapter->tx_ring[i].count = adapter->tx_ring_count;
2550                 adapter->tx_ring[i].queue_index = i;
2551         }
2552
2553         for (i = 0; i < adapter->num_rx_queues; i++) {
2554                 adapter->rx_ring[i].count = adapter->rx_ring_count;
2555                 adapter->rx_ring[i].queue_index = i;
2556         }
2557
2558         ixgbe_cache_ring_register(adapter);
2559
2560         return 0;
2561
2562 err_rx_ring_allocation:
2563         kfree(adapter->tx_ring);
2564 err_tx_ring_allocation:
2565         return -ENOMEM;
2566 }
2567
2568 /**
2569  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2570  * @adapter: board private structure to initialize
2571  *
2572  * Attempt to configure the interrupts using the best available
2573  * capabilities of the hardware and the kernel.
2574  **/
2575 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2576 {
2577         int err = 0;
2578         int vector, v_budget;
2579
2580         /*
2581          * It's easy to be greedy for MSI-X vectors, but it really
2582          * doesn't do us much good if we have a lot more vectors
2583          * than CPU's.  So let's be conservative and only ask for
2584          * (roughly) twice the number of vectors as there are CPU's.
2585          */
2586         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2587                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2588
2589         /*
2590          * At the same time, hardware can only support a maximum of
2591          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2592          * we can easily reach upwards of 64 Rx descriptor queues and
2593          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2594          * the cpu count also exceeds our vector limit.
2595          */
2596         v_budget = min(v_budget, MAX_MSIX_COUNT);
2597
2598         /* A failure in MSI-X entry allocation isn't fatal, but it does
2599          * mean we disable MSI-X capabilities of the adapter. */
2600         adapter->msix_entries = kcalloc(v_budget,
2601                                         sizeof(struct msix_entry), GFP_KERNEL);
2602         if (!adapter->msix_entries) {
2603                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2604                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2605                 ixgbe_set_num_queues(adapter);
2606                 kfree(adapter->tx_ring);
2607                 kfree(adapter->rx_ring);
2608                 err = ixgbe_alloc_queues(adapter);
2609                 if (err) {
2610                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2611                                 "for queues\n");
2612                         goto out;
2613                 }
2614
2615                 goto try_msi;
2616         }
2617
2618         for (vector = 0; vector < v_budget; vector++)
2619                 adapter->msix_entries[vector].entry = vector;
2620
2621         ixgbe_acquire_msix_vectors(adapter, v_budget);
2622
2623         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2624                 goto out;
2625
2626 try_msi:
2627         err = pci_enable_msi(adapter->pdev);
2628         if (!err) {
2629                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2630         } else {
2631                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2632                         "falling back to legacy.  Error: %d\n", err);
2633                 /* reset err */
2634                 err = 0;
2635         }
2636
2637 out:
2638         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2639         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2640
2641         return err;
2642 }
2643
2644 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2645 {
2646         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2647                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2648                 pci_disable_msix(adapter->pdev);
2649                 kfree(adapter->msix_entries);
2650                 adapter->msix_entries = NULL;
2651         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2652                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2653                 pci_disable_msi(adapter->pdev);
2654         }
2655         return;
2656 }
2657
2658 /**
2659  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2660  * @adapter: board private structure to initialize
2661  *
2662  * We determine which interrupt scheme to use based on...
2663  * - Kernel support (MSI, MSI-X)
2664  *   - which can be user-defined (via MODULE_PARAM)
2665  * - Hardware queue count (num_*_queues)
2666  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2667  **/
2668 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2669 {
2670         int err;
2671
2672         /* Number of supported queues */
2673         ixgbe_set_num_queues(adapter);
2674
2675         err = ixgbe_alloc_queues(adapter);
2676         if (err) {
2677                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2678                 goto err_alloc_queues;
2679         }
2680
2681         err = ixgbe_set_interrupt_capability(adapter);
2682         if (err) {
2683                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2684                 goto err_set_interrupt;
2685         }
2686
2687         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2688                 "Tx Queue count = %u\n",
2689                 (adapter->num_rx_queues > 1) ? "Enabled" :
2690                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2691
2692         set_bit(__IXGBE_DOWN, &adapter->state);
2693
2694         return 0;
2695
2696 err_set_interrupt:
2697         kfree(adapter->tx_ring);
2698         kfree(adapter->rx_ring);
2699 err_alloc_queues:
2700         return err;
2701 }
2702
2703 /**
2704  * ixgbe_sfp_timer - worker thread to find a missing module
2705  * @data: pointer to our adapter struct
2706  **/
2707 static void ixgbe_sfp_timer(unsigned long data)
2708 {
2709         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2710
2711         /* Do the sfp_timer outside of interrupt context due to the
2712          * delays that sfp+ detection requires
2713          */
2714         schedule_work(&adapter->sfp_task);
2715 }
2716
2717 /**
2718  * ixgbe_sfp_task - worker thread to find a missing module
2719  * @work: pointer to work_struct containing our data
2720  **/
2721 static void ixgbe_sfp_task(struct work_struct *work)
2722 {
2723         struct ixgbe_adapter *adapter = container_of(work,
2724                                                      struct ixgbe_adapter,
2725                                                      sfp_task);
2726         struct ixgbe_hw *hw = &adapter->hw;
2727
2728         if ((hw->phy.type == ixgbe_phy_nl) &&
2729             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2730                 s32 ret = hw->phy.ops.identify_sfp(hw);
2731                 if (ret)
2732                         goto reschedule;
2733                 ret = hw->phy.ops.reset(hw);
2734                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2735                         DPRINTK(PROBE, ERR, "failed to initialize because an "
2736                                 "unsupported SFP+ module type was detected.\n"
2737                                 "Reload the driver after installing a "
2738                                 "supported module.\n");
2739                         unregister_netdev(adapter->netdev);
2740                 } else {
2741                         DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2742                                 hw->phy.sfp_type);
2743                 }
2744                 /* don't need this routine any more */
2745                 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2746         }
2747         return;
2748 reschedule:
2749         if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2750                 mod_timer(&adapter->sfp_timer,
2751                           round_jiffies(jiffies + (2 * HZ)));
2752 }
2753
2754 /**
2755  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2756  * @adapter: board private structure to initialize
2757  *
2758  * ixgbe_sw_init initializes the Adapter private data structure.
2759  * Fields are initialized based on PCI device information and
2760  * OS network device settings (MTU size).
2761  **/
2762 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2763 {
2764         struct ixgbe_hw *hw = &adapter->hw;
2765         struct pci_dev *pdev = adapter->pdev;
2766         unsigned int rss;
2767 #ifdef CONFIG_IXGBE_DCB
2768         int j;
2769         struct tc_configuration *tc;
2770 #endif
2771
2772         /* PCI config space info */
2773
2774         hw->vendor_id = pdev->vendor;
2775         hw->device_id = pdev->device;
2776         hw->revision_id = pdev->revision;
2777         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2778         hw->subsystem_device_id = pdev->subsystem_device;
2779
2780         /* Set capability flags */
2781         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2782         adapter->ring_feature[RING_F_RSS].indices = rss;
2783         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2784         adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2785
2786 #ifdef CONFIG_IXGBE_DCB
2787         /* Configure DCB traffic classes */
2788         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2789                 tc = &adapter->dcb_cfg.tc_config[j];
2790                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2791                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2792                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2793                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2794                 tc->dcb_pfc = pfc_disabled;
2795         }
2796         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2797         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2798         adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2799         adapter->dcb_cfg.round_robin_enable = false;
2800         adapter->dcb_set_bitmap = 0x00;
2801         ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2802                            adapter->ring_feature[RING_F_DCB].indices);
2803
2804 #endif
2805         if (hw->mac.ops.get_media_type &&
2806             (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2807                 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2808
2809         /* default flow control settings */
2810         hw->fc.original_type = ixgbe_fc_none;
2811         hw->fc.type = ixgbe_fc_none;
2812         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2813         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2814         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2815         hw->fc.send_xon = true;
2816
2817         /* select 10G link by default */
2818         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2819
2820         /* enable itr by default in dynamic mode */
2821         adapter->itr_setting = 1;
2822         adapter->eitr_param = 20000;
2823
2824         /* set defaults for eitr in MegaBytes */
2825         adapter->eitr_low = 10;
2826         adapter->eitr_high = 20;
2827
2828         /* set default ring sizes */
2829         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2830         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2831
2832         /* initialize eeprom parameters */
2833         if (ixgbe_init_eeprom_params_generic(hw)) {
2834                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2835                 return -EIO;
2836         }
2837
2838         /* enable rx csum by default */
2839         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2840
2841         set_bit(__IXGBE_DOWN, &adapter->state);
2842
2843         return 0;
2844 }
2845
2846 /**
2847  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2848  * @adapter: board private structure
2849  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2850  *
2851  * Return 0 on success, negative on failure
2852  **/
2853 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2854                              struct ixgbe_ring *tx_ring)
2855 {
2856         struct pci_dev *pdev = adapter->pdev;
2857         int size;
2858
2859         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2860         tx_ring->tx_buffer_info = vmalloc(size);
2861         if (!tx_ring->tx_buffer_info)
2862                 goto err;
2863         memset(tx_ring->tx_buffer_info, 0, size);
2864
2865         /* round up to nearest 4K */
2866         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2867                         sizeof(u32);
2868         tx_ring->size = ALIGN(tx_ring->size, 4096);
2869
2870         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2871                                              &tx_ring->dma);
2872         if (!tx_ring->desc)
2873                 goto err;
2874
2875         tx_ring->next_to_use = 0;
2876         tx_ring->next_to_clean = 0;
2877         tx_ring->work_limit = tx_ring->count;
2878         return 0;
2879
2880 err:
2881         vfree(tx_ring->tx_buffer_info);
2882         tx_ring->tx_buffer_info = NULL;
2883         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2884                             "descriptor ring\n");
2885         return -ENOMEM;
2886 }
2887
2888 /**
2889  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2890  * @adapter: board private structure
2891  *
2892  * If this function returns with an error, then it's possible one or
2893  * more of the rings is populated (while the rest are not).  It is the
2894  * callers duty to clean those orphaned rings.
2895  *
2896  * Return 0 on success, negative on failure
2897  **/
2898 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2899 {
2900         int i, err = 0;
2901
2902         for (i = 0; i < adapter->num_tx_queues; i++) {
2903                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2904                 if (!err)
2905                         continue;
2906                 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2907                 break;
2908         }
2909
2910         return err;
2911 }
2912
2913 /**
2914  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2915  * @adapter: board private structure
2916  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2917  *
2918  * Returns 0 on success, negative on failure
2919  **/
2920 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2921                              struct ixgbe_ring *rx_ring)
2922 {
2923         struct pci_dev *pdev = adapter->pdev;
2924         int size;
2925
2926         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2927         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2928         if (!rx_ring->lro_mgr.lro_arr)
2929                 return -ENOMEM;
2930         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2931
2932         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2933         rx_ring->rx_buffer_info = vmalloc(size);
2934         if (!rx_ring->rx_buffer_info) {
2935                 DPRINTK(PROBE, ERR,
2936                         "vmalloc allocation failed for the rx desc ring\n");
2937                 goto alloc_failed;
2938         }
2939         memset(rx_ring->rx_buffer_info, 0, size);
2940
2941         /* Round up to nearest 4K */
2942         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2943         rx_ring->size = ALIGN(rx_ring->size, 4096);
2944
2945         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2946
2947         if (!rx_ring->desc) {
2948                 DPRINTK(PROBE, ERR,
2949                         "Memory allocation failed for the rx desc ring\n");
2950                 vfree(rx_ring->rx_buffer_info);
2951                 goto alloc_failed;
2952         }
2953
2954         rx_ring->next_to_clean = 0;
2955         rx_ring->next_to_use = 0;
2956
2957         return 0;
2958
2959 alloc_failed:
2960         vfree(rx_ring->lro_mgr.lro_arr);
2961         rx_ring->lro_mgr.lro_arr = NULL;
2962         return -ENOMEM;
2963 }
2964
2965 /**
2966  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2967  * @adapter: board private structure
2968  *
2969  * If this function returns with an error, then it's possible one or
2970  * more of the rings is populated (while the rest are not).  It is the
2971  * callers duty to clean those orphaned rings.
2972  *
2973  * Return 0 on success, negative on failure
2974  **/
2975
2976 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2977 {
2978         int i, err = 0;
2979
2980         for (i = 0; i < adapter->num_rx_queues; i++) {
2981                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2982                 if (!err)
2983                         continue;
2984                 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2985                 break;
2986         }
2987
2988         return err;
2989 }
2990
2991 /**
2992  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2993  * @adapter: board private structure
2994  * @tx_ring: Tx descriptor ring for a specific queue
2995  *
2996  * Free all transmit software resources
2997  **/
2998 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2999                              struct ixgbe_ring *tx_ring)
3000 {
3001         struct pci_dev *pdev = adapter->pdev;
3002
3003         ixgbe_clean_tx_ring(adapter, tx_ring);
3004
3005         vfree(tx_ring->tx_buffer_info);
3006         tx_ring->tx_buffer_info = NULL;
3007
3008         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3009
3010         tx_ring->desc = NULL;
3011 }
3012
3013 /**
3014  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3015  * @adapter: board private structure
3016  *
3017  * Free all transmit software resources
3018  **/
3019 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3020 {
3021         int i;
3022
3023         for (i = 0; i < adapter->num_tx_queues; i++)
3024                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3025 }
3026
3027 /**
3028  * ixgbe_free_rx_resources - Free Rx Resources
3029  * @adapter: board private structure
3030  * @rx_ring: ring to clean the resources from
3031  *
3032  * Free all receive software resources
3033  **/
3034 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3035                              struct ixgbe_ring *rx_ring)
3036 {
3037         struct pci_dev *pdev = adapter->pdev;
3038
3039         vfree(rx_ring->lro_mgr.lro_arr);
3040         rx_ring->lro_mgr.lro_arr = NULL;
3041
3042         ixgbe_clean_rx_ring(adapter, rx_ring);
3043
3044         vfree(rx_ring->rx_buffer_info);
3045         rx_ring->rx_buffer_info = NULL;
3046
3047         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3048
3049         rx_ring->desc = NULL;
3050 }
3051
3052 /**
3053  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3054  * @adapter: board private structure
3055  *
3056  * Free all receive software resources
3057  **/
3058 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3059 {
3060         int i;
3061
3062         for (i = 0; i < adapter->num_rx_queues; i++)
3063                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3064 }
3065
3066 /**
3067  * ixgbe_change_mtu - Change the Maximum Transfer Unit
3068  * @netdev: network interface device structure
3069  * @new_mtu: new value for maximum frame size
3070  *
3071  * Returns 0 on success, negative on failure
3072  **/
3073 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3074 {
3075         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3076         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3077
3078         /* MTU < 68 is an error and causes problems on some kernels */
3079         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3080                 return -EINVAL;
3081
3082         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3083                 netdev->mtu, new_mtu);
3084         /* must set new MTU before calling down or up */
3085         netdev->mtu = new_mtu;
3086
3087         if (netif_running(netdev))
3088                 ixgbe_reinit_locked(adapter);
3089
3090         return 0;
3091 }
3092
3093 /**
3094  * ixgbe_open - Called when a network interface is made active
3095  * @netdev: network interface device structure
3096  *
3097  * Returns 0 on success, negative value on failure
3098  *
3099  * The open entry point is called when a network interface is made
3100  * active by the system (IFF_UP).  At this point all resources needed
3101  * for transmit and receive operations are allocated, the interrupt
3102  * handler is registered with the OS, the watchdog timer is started,
3103  * and the stack is notified that the interface is ready.
3104  **/
3105 static int ixgbe_open(struct net_device *netdev)
3106 {
3107         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3108         int err;
3109
3110         /* disallow open during test */
3111         if (test_bit(__IXGBE_TESTING, &adapter->state))
3112                 return -EBUSY;
3113
3114         /* allocate transmit descriptors */
3115         err = ixgbe_setup_all_tx_resources(adapter);
3116         if (err)
3117                 goto err_setup_tx;
3118
3119         /* allocate receive descriptors */
3120         err = ixgbe_setup_all_rx_resources(adapter);
3121         if (err)
3122                 goto err_setup_rx;
3123
3124         ixgbe_configure(adapter);
3125
3126         err = ixgbe_request_irq(adapter);
3127         if (err)
3128                 goto err_req_irq;
3129
3130         err = ixgbe_up_complete(adapter);
3131         if (err)
3132                 goto err_up;
3133
3134         netif_tx_start_all_queues(netdev);
3135
3136         return 0;
3137
3138 err_up:
3139         ixgbe_release_hw_control(adapter);
3140         ixgbe_free_irq(adapter);
3141 err_req_irq:
3142         ixgbe_free_all_rx_resources(adapter);
3143 err_setup_rx:
3144         ixgbe_free_all_tx_resources(adapter);
3145 err_setup_tx:
3146         ixgbe_reset(adapter);
3147
3148         return err;
3149 }
3150
3151 /**
3152  * ixgbe_close - Disables a network interface
3153  * @netdev: network interface device structure
3154  *
3155  * Returns 0, this is not allowed to fail
3156  *
3157  * The close entry point is called when an interface is de-activated
3158  * by the OS.  The hardware is still under the drivers control, but
3159  * needs to be disabled.  A global MAC reset is issued to stop the
3160  * hardware, and all transmit and receive resources are freed.
3161  **/
3162 static int ixgbe_close(struct net_device *netdev)
3163 {
3164         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3165
3166         ixgbe_down(adapter);
3167         ixgbe_free_irq(adapter);
3168
3169         ixgbe_free_all_tx_resources(adapter);
3170         ixgbe_free_all_rx_resources(adapter);
3171
3172         ixgbe_release_hw_control(adapter);
3173
3174         return 0;
3175 }
3176
3177 /**
3178  * ixgbe_napi_add_all - prep napi structs for use
3179  * @adapter: private struct
3180  * helper function to napi_add each possible q_vector->napi
3181  */
3182 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3183 {
3184         int q_idx, q_vectors;
3185         struct net_device *netdev = adapter->netdev;
3186         int (*poll)(struct napi_struct *, int);
3187
3188         /* check if we already have our netdev->napi_list populated */
3189         if (&netdev->napi_list != netdev->napi_list.next)
3190                 return;
3191
3192         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3193                 poll = &ixgbe_clean_rxonly;
3194                 /* Only enable as many vectors as we have rx queues. */
3195                 q_vectors = adapter->num_rx_queues;
3196         } else {
3197                 poll = &ixgbe_poll;
3198                 /* only one q_vector for legacy modes */
3199                 q_vectors = 1;
3200         }
3201
3202         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3203                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3204                 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3205         }
3206 }
3207
3208 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3209 {
3210         int q_idx;
3211         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3212
3213         /* legacy and MSI only use one vector */
3214         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3215                 q_vectors = 1;
3216
3217         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3218                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3219                 if (!q_vector->rxr_count)
3220                         continue;
3221                 netif_napi_del(&q_vector->napi);
3222         }
3223 }
3224
3225 #ifdef CONFIG_PM
3226 static int ixgbe_resume(struct pci_dev *pdev)
3227 {
3228         struct net_device *netdev = pci_get_drvdata(pdev);
3229         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3230         u32 err;
3231
3232         pci_set_power_state(pdev, PCI_D0);
3233         pci_restore_state(pdev);
3234         err = pci_enable_device(pdev);
3235         if (err) {
3236                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3237                                 "suspend\n");
3238                 return err;
3239         }
3240         pci_set_master(pdev);
3241
3242         pci_enable_wake(pdev, PCI_D3hot, 0);
3243         pci_enable_wake(pdev, PCI_D3cold, 0);
3244
3245         err = ixgbe_init_interrupt_scheme(adapter);
3246         if (err) {
3247                 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3248                                 "device\n");
3249                 return err;
3250         }
3251
3252         ixgbe_napi_add_all(adapter);
3253         ixgbe_reset(adapter);
3254
3255         if (netif_running(netdev)) {
3256                 err = ixgbe_open(adapter->netdev);
3257                 if (err)
3258                         return err;
3259         }
3260
3261         netif_device_attach(netdev);
3262
3263         return 0;
3264 }
3265
3266 #endif /* CONFIG_PM */
3267 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3268 {
3269         struct net_device *netdev = pci_get_drvdata(pdev);
3270         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3271 #ifdef CONFIG_PM
3272         int retval = 0;
3273 #endif
3274
3275         netif_device_detach(netdev);
3276
3277         if (netif_running(netdev)) {
3278                 ixgbe_down(adapter);
3279                 ixgbe_free_irq(adapter);
3280                 ixgbe_free_all_tx_resources(adapter);
3281                 ixgbe_free_all_rx_resources(adapter);
3282         }
3283         ixgbe_reset_interrupt_capability(adapter);
3284         ixgbe_napi_del_all(adapter);
3285         INIT_LIST_HEAD(&netdev->napi_list);
3286         kfree(adapter->tx_ring);
3287         kfree(adapter->rx_ring);
3288
3289 #ifdef CONFIG_PM
3290         retval = pci_save_state(pdev);
3291         if (retval)
3292                 return retval;
3293 #endif
3294
3295         pci_enable_wake(pdev, PCI_D3hot, 0);
3296         pci_enable_wake(pdev, PCI_D3cold, 0);
3297
3298         ixgbe_release_hw_control(adapter);
3299
3300         pci_disable_device(pdev);
3301
3302         pci_set_power_state(pdev, pci_choose_state(pdev, state));
3303
3304         return 0;
3305 }
3306
3307 static void ixgbe_shutdown(struct pci_dev *pdev)
3308 {
3309         ixgbe_suspend(pdev, PMSG_SUSPEND);
3310 }
3311
3312 /**
3313  * ixgbe_update_stats - Update the board statistics counters.
3314  * @adapter: board private structure
3315  **/
3316 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3317 {
3318         struct ixgbe_hw *hw = &adapter->hw;
3319         u64 total_mpc = 0;
3320         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3321
3322         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3323         for (i = 0; i < 8; i++) {
3324                 /* for packet buffers not used, the register should read 0 */
3325                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3326                 missed_rx += mpc;
3327                 adapter->stats.mpc[i] += mpc;
3328                 total_mpc += adapter->stats.mpc[i];
3329                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3330                 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3331                 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3332                 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3333                 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3334                 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3335                                                             IXGBE_PXONRXC(i));
3336                 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3337                                                             IXGBE_PXONTXC(i));
3338                 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3339                                                             IXGBE_PXOFFRXC(i));
3340                 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3341                                                             IXGBE_PXOFFTXC(i));
3342         }
3343         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3344         /* work around hardware counting issue */
3345         adapter->stats.gprc -= missed_rx;
3346
3347         /* 82598 hardware only has a 32 bit counter in the high register */
3348         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3349         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3350         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3351         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3352         adapter->stats.bprc += bprc;
3353         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3354         adapter->stats.mprc -= bprc;
3355         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3356         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3357         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3358         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3359         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3360         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3361         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3362         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3363         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3364         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3365         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3366         adapter->stats.lxontxc += lxon;
3367         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3368         adapter->stats.lxofftxc += lxoff;
3369         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3370         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3371         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3372         /*
3373          * 82598 errata - tx of flow control packets is included in tx counters
3374          */
3375         xon_off_tot = lxon + lxoff;
3376         adapter->stats.gptc -= xon_off_tot;
3377         adapter->stats.mptc -= xon_off_tot;
3378         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3379         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3380         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3381         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3382         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3383         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3384         adapter->stats.ptc64 -= xon_off_tot;
3385         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3386         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3387         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3388         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3389         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3390         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3391
3392         /* Fill out the OS statistics structure */
3393         adapter->net_stats.multicast = adapter->stats.mprc;
3394
3395         /* Rx Errors */
3396         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3397                                        adapter->stats.rlec;
3398         adapter->net_stats.rx_dropped = 0;
3399         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3400         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3401         adapter->net_stats.rx_missed_errors = total_mpc;
3402 }
3403
3404 /**
3405  * ixgbe_watchdog - Timer Call-back
3406  * @data: pointer to adapter cast into an unsigned long
3407  **/
3408 static void ixgbe_watchdog(unsigned long data)
3409 {
3410         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3411         struct ixgbe_hw *hw = &adapter->hw;
3412
3413         /* Do the watchdog outside of interrupt context due to the lovely
3414          * delays that some of the newer hardware requires */
3415         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3416                 /* Cause software interrupt to ensure rx rings are cleaned */
3417                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3418                         u32 eics =
3419                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3420                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3421                 } else {
3422                         /* For legacy and MSI interrupts don't set any bits that
3423                          * are enabled for EIAM, because this operation would
3424                          * set *both* EIMS and EICS for any bit in EIAM */
3425                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3426                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3427                 }
3428                 /* Reset the timer */
3429                 mod_timer(&adapter->watchdog_timer,
3430                           round_jiffies(jiffies + 2 * HZ));
3431         }
3432
3433         schedule_work(&adapter->watchdog_task);
3434 }
3435
3436 /**
3437  * ixgbe_watchdog_task - worker thread to bring link up
3438  * @work: pointer to work_struct containing our data
3439  **/
3440 static void ixgbe_watchdog_task(struct work_struct *work)
3441 {
3442         struct ixgbe_adapter *adapter = container_of(work,
3443                                                      struct ixgbe_adapter,
3444                                                      watchdog_task);
3445         struct net_device *netdev = adapter->netdev;
3446         struct ixgbe_hw *hw = &adapter->hw;
3447         u32 link_speed = adapter->link_speed;
3448         bool link_up = adapter->link_up;
3449
3450         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3451
3452         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3453                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3454                 if (link_up ||
3455                     time_after(jiffies, (adapter->link_check_timeout +
3456                                          IXGBE_TRY_LINK_TIMEOUT))) {
3457                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3458                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3459                 }
3460                 adapter->link_up = link_up;
3461                 adapter->link_speed = link_speed;
3462         }
3463
3464         if (link_up) {
3465                 if (!netif_carrier_ok(netdev)) {
3466                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3467                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3468 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3469 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3470                         printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3471                                "Flow Control: %s\n",
3472                                netdev->name,
3473                                (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3474                                 "10 Gbps" :
3475                                 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3476                                  "1 Gbps" : "unknown speed")),
3477                                ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3478                                 (FLOW_RX ? "RX" :
3479                                 (FLOW_TX ? "TX" : "None"))));
3480
3481                         netif_carrier_on(netdev);
3482                         netif_tx_wake_all_queues(netdev);
3483                 } else {
3484                         /* Force detection of hung controller */
3485                         adapter->detect_tx_hung = true;
3486                 }
3487         } else {
3488                 adapter->link_up = false;
3489                 adapter->link_speed = 0;
3490                 if (netif_carrier_ok(netdev)) {
3491                         printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3492                                netdev->name);
3493                         netif_carrier_off(netdev);
3494                         netif_tx_stop_all_queues(netdev);
3495                 }
3496         }
3497
3498         ixgbe_update_stats(adapter);
3499         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3500 }
3501
3502 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3503                      struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3504                      u32 tx_flags, u8 *hdr_len)
3505 {
3506         struct ixgbe_adv_tx_context_desc *context_desc;
3507         unsigned int i;
3508         int err;
3509         struct ixgbe_tx_buffer *tx_buffer_info;
3510         u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3511         u32 mss_l4len_idx, l4len;
3512
3513         if (skb_is_gso(skb)) {
3514                 if (skb_header_cloned(skb)) {
3515                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3516                         if (err)
3517                                 return err;
3518                 }
3519                 l4len = tcp_hdrlen(skb);
3520                 *hdr_len += l4len;
3521
3522                 if (skb->protocol == htons(ETH_P_IP)) {
3523                         struct iphdr *iph = ip_hdr(skb);
3524                         iph->tot_len = 0;
3525                         iph->check = 0;
3526                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3527                                                                  iph->daddr, 0,
3528                                                                  IPPROTO_TCP,
3529                                                                  0);
3530                         adapter->hw_tso_ctxt++;
3531                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3532                         ipv6_hdr(skb)->payload_len = 0;
3533                         tcp_hdr(skb)->check =
3534                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3535                                              &ipv6_hdr(skb)->daddr,
3536                                              0, IPPROTO_TCP, 0);
3537                         adapter->hw_tso6_ctxt++;
3538                 }
3539
3540                 i = tx_ring->next_to_use;
3541
3542                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3543                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3544
3545                 /* VLAN MACLEN IPLEN */
3546                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3547                         vlan_macip_lens |=
3548                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3549                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3550                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3551                 *hdr_len += skb_network_offset(skb);
3552                 vlan_macip_lens |=
3553                     (skb_transport_header(skb) - skb_network_header(skb));
3554                 *hdr_len +=
3555                     (skb_transport_header(skb) - skb_network_header(skb));
3556                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3557                 context_desc->seqnum_seed = 0;
3558
3559                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3560                 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3561                                    IXGBE_ADVTXD_DTYP_CTXT);
3562
3563                 if (skb->protocol == htons(ETH_P_IP))
3564                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3565                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3566                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3567
3568                 /* MSS L4LEN IDX */
3569                 mss_l4len_idx =
3570                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3571                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3572                 /* use index 1 for TSO */
3573                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3574                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3575
3576                 tx_buffer_info->time_stamp = jiffies;
3577                 tx_buffer_info->next_to_watch = i;
3578
3579                 i++;
3580                 if (i == tx_ring->count)
3581                         i = 0;
3582                 tx_ring->next_to_use = i;
3583
3584                 return true;
3585         }
3586         return false;
3587 }
3588
3589 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3590                           struct ixgbe_ring *tx_ring,
3591                           struct sk_buff *skb, u32 tx_flags)
3592 {
3593         struct ixgbe_adv_tx_context_desc *context_desc;
3594         unsigned int i;
3595         struct ixgbe_tx_buffer *tx_buffer_info;
3596         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3597
3598         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3599             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3600                 i = tx_ring->next_to_use;
3601                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3602                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3603
3604                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3605                         vlan_macip_lens |=
3606                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3607                 vlan_macip_lens |= (skb_network_offset(skb) <<
3608                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3609                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3610                         vlan_macip_lens |= (skb_transport_header(skb) -
3611                                             skb_network_header(skb));
3612
3613                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3614                 context_desc->seqnum_seed = 0;
3615
3616                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3617                                     IXGBE_ADVTXD_DTYP_CTXT);
3618
3619                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3620                         switch (skb->protocol) {
3621                         case __constant_htons(ETH_P_IP):
3622                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3623                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3624                                         type_tucmd_mlhl |=
3625                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3626                                 break;
3627                         case __constant_htons(ETH_P_IPV6):
3628                                 /* XXX what about other V6 headers?? */
3629                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3630                                         type_tucmd_mlhl |=
3631                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3632                                 break;
3633                         default:
3634                                 if (unlikely(net_ratelimit())) {
3635                                         DPRINTK(PROBE, WARNING,
3636                                          "partial checksum but proto=%x!\n",
3637                                          skb->protocol);
3638                                 }
3639                                 break;
3640                         }
3641                 }
3642
3643                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3644                 /* use index zero for tx checksum offload */
3645                 context_desc->mss_l4len_idx = 0;
3646
3647                 tx_buffer_info->time_stamp = jiffies;
3648                 tx_buffer_info->next_to_watch = i;
3649
3650                 adapter->hw_csum_tx_good++;
3651                 i++;
3652                 if (i == tx_ring->count)
3653                         i = 0;
3654                 tx_ring->next_to_use = i;
3655
3656                 return true;
3657         }
3658
3659         return false;
3660 }
3661
3662 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3663                         struct ixgbe_ring *tx_ring,
3664                         struct sk_buff *skb, unsigned int first)
3665 {
3666         struct ixgbe_tx_buffer *tx_buffer_info;
3667         unsigned int len = skb->len;
3668         unsigned int offset = 0, size, count = 0, i;
3669         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3670         unsigned int f;
3671
3672         len -= skb->data_len;
3673
3674         i = tx_ring->next_to_use;
3675
3676         while (len) {
3677                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3678                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3679
3680                 tx_buffer_info->length = size;
3681                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3682                                                      skb->data + offset,
3683                                                      size, PCI_DMA_TODEVICE);
3684                 tx_buffer_info->time_stamp = jiffies;
3685                 tx_buffer_info->next_to_watch = i;
3686
3687                 len -= size;
3688                 offset += size;
3689                 count++;
3690                 i++;
3691                 if (i == tx_ring->count)
3692                         i = 0;
3693         }
3694
3695         for (f = 0; f < nr_frags; f++) {
3696                 struct skb_frag_struct *frag;
3697
3698                 frag = &skb_shinfo(skb)->frags[f];
3699                 len = frag->size;
3700                 offset = frag->page_offset;
3701
3702                 while (len) {
3703                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3704                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3705
3706                         tx_buffer_info->length = size;
3707                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3708                                                            frag->page,
3709                                                            offset,
3710                                                            size,
3711                                                            PCI_DMA_TODEVICE);
3712                         tx_buffer_info->time_stamp = jiffies;
3713                         tx_buffer_info->next_to_watch = i;
3714
3715                         len -= size;
3716                         offset += size;
3717                         count++;
3718                         i++;
3719                         if (i == tx_ring->count)
3720                                 i = 0;
3721                 }
3722         }
3723         if (i == 0)
3724                 i = tx_ring->count - 1;
3725         else
3726                 i = i - 1;
3727         tx_ring->tx_buffer_info[i].skb = skb;
3728         tx_ring->tx_buffer_info[first].next_to_watch = i;
3729
3730         return count;
3731 }
3732
3733 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3734                            struct ixgbe_ring *tx_ring,
3735                            int tx_flags, int count, u32 paylen, u8 hdr_len)
3736 {
3737         union ixgbe_adv_tx_desc *tx_desc = NULL;
3738         struct ixgbe_tx_buffer *tx_buffer_info;
3739         u32 olinfo_status = 0, cmd_type_len = 0;
3740         unsigned int i;
3741         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3742
3743         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3744
3745         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3746
3747         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3748                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3749
3750         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3751                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3752
3753                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3754                                  IXGBE_ADVTXD_POPTS_SHIFT;
3755
3756                 /* use index 1 context for tso */
3757                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3758                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3759                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3760                                          IXGBE_ADVTXD_POPTS_SHIFT;
3761
3762         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3763                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3764                                  IXGBE_ADVTXD_POPTS_SHIFT;
3765
3766         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3767
3768         i = tx_ring->next_to_use;
3769         while (count--) {
3770                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3771                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3772                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3773                 tx_desc->read.cmd_type_len =
3774                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3775                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3776                 i++;
3777                 if (i == tx_ring->count)
3778                         i = 0;
3779         }
3780
3781         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3782
3783         /*
3784          * Force memory writes to complete before letting h/w
3785          * know there are new descriptors to fetch.  (Only
3786          * applicable for weak-ordered memory model archs,
3787          * such as IA-64).
3788          */
3789         wmb();
3790
3791         tx_ring->next_to_use = i;
3792         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3793 }
3794
3795 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3796                                  struct ixgbe_ring *tx_ring, int size)
3797 {
3798         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3799
3800         netif_stop_subqueue(netdev, tx_ring->queue_index);
3801         /* Herbert's original patch had:
3802          *  smp_mb__after_netif_stop_queue();
3803          * but since that doesn't exist yet, just open code it. */
3804         smp_mb();
3805
3806         /* We need to check again in a case another CPU has just
3807          * made room available. */
3808         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3809                 return -EBUSY;
3810
3811         /* A reprieve! - use start_queue because it doesn't call schedule */
3812         netif_start_subqueue(netdev, tx_ring->queue_index);
3813         ++adapter->restart_queue;
3814         return 0;
3815 }
3816
3817 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3818                               struct ixgbe_ring *tx_ring, int size)
3819 {
3820         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3821                 return 0;
3822         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3823 }
3824
3825 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3826 {
3827         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3828         struct ixgbe_ring *tx_ring;
3829         unsigned int first;
3830         unsigned int tx_flags = 0;
3831         u8 hdr_len = 0;
3832         int r_idx = 0, tso;
3833         int count = 0;
3834         unsigned int f;
3835
3836         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3837         tx_ring = &adapter->tx_ring[r_idx];
3838
3839         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3840                 tx_flags |= vlan_tx_tag_get(skb);
3841                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3842                         tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3843                         tx_flags |= (skb->queue_mapping << 13);
3844                 }
3845                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3846                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3847         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3848                 tx_flags |= (skb->queue_mapping << 13);
3849                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3850                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3851         }
3852         /* three things can cause us to need a context descriptor */
3853         if (skb_is_gso(skb) ||
3854             (skb->ip_summed == CHECKSUM_PARTIAL) ||
3855             (tx_flags & IXGBE_TX_FLAGS_VLAN))
3856                 count++;
3857
3858         count += TXD_USE_COUNT(skb_headlen(skb));
3859         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3860                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3861
3862         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3863                 adapter->tx_busy++;
3864                 return NETDEV_TX_BUSY;
3865         }
3866
3867         if (skb->protocol == htons(ETH_P_IP))
3868                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3869         first = tx_ring->next_to_use;
3870         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3871         if (tso < 0) {
3872                 dev_kfree_skb_any(skb);
3873                 return NETDEV_TX_OK;
3874         }
3875
3876         if (tso)
3877                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3878         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3879                  (skb->ip_summed == CHECKSUM_PARTIAL))
3880                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3881
3882         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3883                        ixgbe_tx_map(adapter, tx_ring, skb, first),
3884                        skb->len, hdr_len);
3885
3886         netdev->trans_start = jiffies;
3887
3888         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3889
3890         return NETDEV_TX_OK;
3891 }
3892
3893 /**
3894  * ixgbe_get_stats - Get System Network Statistics
3895  * @netdev: network interface device structure
3896  *
3897  * Returns the address of the device statistics structure.
3898  * The statistics are actually updated from the timer callback.
3899  **/
3900 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3901 {
3902         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3903
3904         /* only return the current stats */
3905         return &adapter->net_stats;
3906 }
3907
3908 /**
3909  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3910  * @netdev: network interface device structure
3911  * @p: pointer to an address structure
3912  *
3913  * Returns 0 on success, negative on failure
3914  **/
3915 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3916 {
3917         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3918         struct ixgbe_hw *hw = &adapter->hw;
3919         struct sockaddr *addr = p;
3920
3921         if (!is_valid_ether_addr(addr->sa_data))
3922                 return -EADDRNOTAVAIL;
3923
3924         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3925         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3926
3927         hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3928
3929         return 0;
3930 }
3931
3932 #ifdef CONFIG_NET_POLL_CONTROLLER
3933 /*
3934  * Polling 'interrupt' - used by things like netconsole to send skbs
3935  * without having to re-enable interrupts. It's not called while
3936  * the interrupt routine is executing.
3937  */
3938 static void ixgbe_netpoll(struct net_device *netdev)
3939 {
3940         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3941
3942         disable_irq(adapter->pdev->irq);
3943         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3944         ixgbe_intr(adapter->pdev->irq, netdev);
3945         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3946         enable_irq(adapter->pdev->irq);
3947 }
3948 #endif
3949
3950 /**
3951  * ixgbe_link_config - set up initial link with default speed and duplex
3952  * @hw: pointer to private hardware struct
3953  *
3954  * Returns 0 on success, negative on failure
3955  **/
3956 static int ixgbe_link_config(struct ixgbe_hw *hw)
3957 {
3958         u32 autoneg = IXGBE_LINK_SPEED_10GB_FULL;
3959
3960         /* must always autoneg for both 1G and 10G link */
3961         hw->mac.autoneg = true;
3962
3963         if ((hw->mac.type == ixgbe_mac_82598EB) &&
3964             (hw->phy.media_type == ixgbe_media_type_copper))
3965                 autoneg = IXGBE_LINK_SPEED_82598_AUTONEG;
3966
3967         return hw->mac.ops.setup_link_speed(hw, autoneg, true, true);
3968 }
3969
3970 static const struct net_device_ops ixgbe_netdev_ops = {
3971         .ndo_open               = ixgbe_open,
3972         .ndo_stop               = ixgbe_close,
3973         .ndo_start_xmit         = ixgbe_xmit_frame,
3974         .ndo_get_stats          = ixgbe_get_stats,
3975         .ndo_set_multicast_list = ixgbe_set_rx_mode,
3976         .ndo_validate_addr      = eth_validate_addr,
3977         .ndo_set_mac_address    = ixgbe_set_mac,
3978         .ndo_change_mtu         = ixgbe_change_mtu,
3979         .ndo_tx_timeout         = ixgbe_tx_timeout,
3980         .ndo_vlan_rx_register   = ixgbe_vlan_rx_register,
3981         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
3982         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
3983 #ifdef CONFIG_NET_POLL_CONTROLLER
3984         .ndo_poll_controller    = ixgbe_netpoll,
3985 #endif
3986 };
3987
3988 /**
3989  * ixgbe_probe - Device Initialization Routine
3990  * @pdev: PCI device information struct
3991  * @ent: entry in ixgbe_pci_tbl
3992  *
3993  * Returns 0 on success, negative on failure
3994  *
3995  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3996  * The OS initialization, configuring of the adapter private structure,
3997  * and a hardware reset occur.
3998  **/
3999 static int __devinit ixgbe_probe(struct pci_dev *pdev,
4000                                  const struct pci_device_id *ent)
4001 {
4002         struct net_device *netdev;
4003         struct ixgbe_adapter *adapter = NULL;
4004         struct ixgbe_hw *hw;
4005         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
4006         static int cards_found;
4007         int i, err, pci_using_dac;
4008         u16 link_status, link_speed, link_width;
4009         u32 part_num, eec;
4010
4011         err = pci_enable_device(pdev);
4012         if (err)
4013                 return err;
4014
4015         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4016             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4017                 pci_using_dac = 1;
4018         } else {
4019                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4020                 if (err) {
4021                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4022                         if (err) {
4023                                 dev_err(&pdev->dev, "No usable DMA "
4024                                         "configuration, aborting\n");
4025                                 goto err_dma;
4026                         }
4027                 }
4028                 pci_using_dac = 0;
4029         }
4030
4031         err = pci_request_regions(pdev, ixgbe_driver_name);
4032         if (err) {
4033                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4034                 goto err_pci_reg;
4035         }
4036
4037         err = pci_enable_pcie_error_reporting(pdev);
4038         if (err) {
4039                 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4040                                     "0x%x\n", err);
4041                 /* non-fatal, continue */
4042         }
4043
4044         pci_set_master(pdev);
4045         pci_save_state(pdev);
4046
4047         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4048         if (!netdev) {
4049                 err = -ENOMEM;
4050                 goto err_alloc_etherdev;
4051         }
4052
4053         SET_NETDEV_DEV(netdev, &pdev->dev);
4054
4055         pci_set_drvdata(pdev, netdev);
4056         adapter = netdev_priv(netdev);
4057
4058         adapter->netdev = netdev;
4059         adapter->pdev = pdev;
4060         hw = &adapter->hw;
4061         hw->back = adapter;
4062         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4063
4064         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4065                               pci_resource_len(pdev, 0));
4066         if (!hw->hw_addr) {
4067                 err = -EIO;
4068                 goto err_ioremap;
4069         }
4070
4071         for (i = 1; i <= 5; i++) {
4072                 if (pci_resource_len(pdev, i) == 0)
4073                         continue;
4074         }
4075
4076         netdev->netdev_ops = &ixgbe_netdev_ops;
4077         ixgbe_set_ethtool_ops(netdev);
4078         netdev->watchdog_timeo = 5 * HZ;
4079         strcpy(netdev->name, pci_name(pdev));
4080
4081         adapter->bd_number = cards_found;
4082
4083         /* Setup hw api */
4084         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4085         hw->mac.type  = ii->mac;
4086
4087         /* EEPROM */
4088         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4089         eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4090         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4091         if (!(eec & (1 << 8)))
4092                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4093
4094         /* PHY */
4095         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4096         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4097
4098         /* set up this timer and work struct before calling get_invariants
4099          * which might start the timer
4100          */
4101         init_timer(&adapter->sfp_timer);
4102         adapter->sfp_timer.function = &ixgbe_sfp_timer;
4103         adapter->sfp_timer.data = (unsigned long) adapter;
4104
4105         INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4106
4107         err = ii->get_invariants(hw);
4108         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4109                 /* start a kernel thread to watch for a module to arrive */
4110                 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4111                 mod_timer(&adapter->sfp_timer,
4112                           round_jiffies(jiffies + (2 * HZ)));
4113                 err = 0;
4114         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4115                 DPRINTK(PROBE, ERR, "failed to load because an "
4116                         "unsupported SFP+ module type was detected.\n");
4117                 goto err_hw_init;
4118         } else if (err) {
4119                 goto err_hw_init;
4120         }
4121
4122         /* setup the private structure */
4123         err = ixgbe_sw_init(adapter);
4124         if (err)
4125                 goto err_sw_init;
4126
4127         /* reset_hw fills in the perm_addr as well */
4128         err = hw->mac.ops.reset_hw(hw);
4129         if (err) {
4130                 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4131                 goto err_sw_init;
4132         }
4133
4134         netdev->features = NETIF_F_SG |
4135                            NETIF_F_IP_CSUM |
4136                            NETIF_F_HW_VLAN_TX |
4137                            NETIF_F_HW_VLAN_RX |
4138                            NETIF_F_HW_VLAN_FILTER;
4139
4140         netdev->features |= NETIF_F_IPV6_CSUM;
4141         netdev->features |= NETIF_F_TSO;
4142         netdev->features |= NETIF_F_TSO6;
4143         netdev->features |= NETIF_F_LRO;
4144
4145         netdev->vlan_features |= NETIF_F_TSO;
4146         netdev->vlan_features |= NETIF_F_TSO6;
4147         netdev->vlan_features |= NETIF_F_IP_CSUM;
4148         netdev->vlan_features |= NETIF_F_SG;
4149
4150         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4151                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4152
4153 #ifdef CONFIG_IXGBE_DCB
4154         netdev->dcbnl_ops = &dcbnl_ops;
4155 #endif
4156
4157         if (pci_using_dac)
4158                 netdev->features |= NETIF_F_HIGHDMA;
4159
4160         /* make sure the EEPROM is good */
4161         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4162                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4163                 err = -EIO;
4164                 goto err_eeprom;
4165         }
4166
4167         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4168         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4169
4170         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4171                 dev_err(&pdev->dev, "invalid MAC address\n");
4172                 err = -EIO;
4173                 goto err_eeprom;
4174         }
4175
4176         init_timer(&adapter->watchdog_timer);
4177         adapter->watchdog_timer.function = &ixgbe_watchdog;
4178         adapter->watchdog_timer.data = (unsigned long)adapter;
4179
4180         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4181         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4182
4183         err = ixgbe_init_interrupt_scheme(adapter);
4184         if (err)
4185                 goto err_sw_init;
4186
4187         /* print bus type/speed/width info */
4188         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4189         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4190         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4191         dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4192                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4193                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4194                  "Unknown"),
4195                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4196                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4197                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4198                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4199                  "Unknown"),
4200                 netdev->dev_addr);
4201         ixgbe_read_pba_num_generic(hw, &part_num);
4202         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4203                  hw->mac.type, hw->phy.type,
4204                  (part_num >> 8), (part_num & 0xff));
4205
4206         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4207                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4208                          "this card is not sufficient for optimal "
4209                          "performance.\n");
4210                 dev_warn(&pdev->dev, "For optimal performance a x8 "
4211                          "PCI-Express slot is required.\n");
4212         }
4213
4214         /* reset the hardware with the new settings */
4215         hw->mac.ops.start_hw(hw);
4216
4217         /* link_config depends on start_hw being called at least once */
4218         err = ixgbe_link_config(hw);
4219         if (err) {
4220                 dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err);
4221                 goto err_register;
4222         }
4223
4224         netif_carrier_off(netdev);
4225         netif_tx_stop_all_queues(netdev);
4226
4227         strcpy(netdev->name, "eth%d");
4228         err = register_netdev(netdev);
4229         if (err)
4230                 goto err_register;
4231
4232 #ifdef CONFIG_IXGBE_DCA
4233         if (dca_add_requester(&pdev->dev) == 0) {
4234                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4235                 /* always use CB2 mode, difference is masked
4236                  * in the CB driver */
4237                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4238                 ixgbe_setup_dca(adapter);
4239         }
4240 #endif
4241
4242         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4243         cards_found++;
4244         return 0;
4245
4246 err_register:
4247         ixgbe_release_hw_control(adapter);
4248 err_hw_init:
4249 err_sw_init:
4250         ixgbe_reset_interrupt_capability(adapter);
4251 err_eeprom:
4252         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4253         del_timer_sync(&adapter->sfp_timer);
4254         cancel_work_sync(&adapter->sfp_task);
4255         iounmap(hw->hw_addr);
4256 err_ioremap:
4257         free_netdev(netdev);
4258 err_alloc_etherdev:
4259         pci_release_regions(pdev);
4260 err_pci_reg:
4261 err_dma:
4262         pci_disable_device(pdev);
4263         return err;
4264 }
4265
4266 /**
4267  * ixgbe_remove - Device Removal Routine
4268  * @pdev: PCI device information struct
4269  *
4270  * ixgbe_remove is called by the PCI subsystem to alert the driver
4271  * that it should release a PCI device.  The could be caused by a
4272  * Hot-Plug event, or because the driver is going to be removed from
4273  * memory.
4274  **/
4275 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4276 {
4277         struct net_device *netdev = pci_get_drvdata(pdev);
4278         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4279         int err;
4280
4281         set_bit(__IXGBE_DOWN, &adapter->state);
4282         /* clear the module not found bit to make sure the worker won't
4283          * reschedule
4284          */
4285         clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4286         del_timer_sync(&adapter->watchdog_timer);
4287
4288         del_timer_sync(&adapter->sfp_timer);
4289         cancel_work_sync(&adapter->watchdog_task);
4290         cancel_work_sync(&adapter->sfp_task);
4291         flush_scheduled_work();
4292
4293 #ifdef CONFIG_IXGBE_DCA
4294         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4295                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4296                 dca_remove_requester(&pdev->dev);
4297                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4298         }
4299
4300 #endif
4301         if (netdev->reg_state == NETREG_REGISTERED)
4302                 unregister_netdev(netdev);
4303
4304         ixgbe_reset_interrupt_capability(adapter);
4305
4306         ixgbe_release_hw_control(adapter);
4307
4308         iounmap(adapter->hw.hw_addr);
4309         pci_release_regions(pdev);
4310
4311         DPRINTK(PROBE, INFO, "complete\n");
4312         kfree(adapter->tx_ring);
4313         kfree(adapter->rx_ring);
4314
4315         free_netdev(netdev);
4316
4317         err = pci_disable_pcie_error_reporting(pdev);
4318         if (err)
4319                 dev_err(&pdev->dev,
4320                         "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4321
4322         pci_disable_device(pdev);
4323 }
4324
4325 /**
4326  * ixgbe_io_error_detected - called when PCI error is detected
4327  * @pdev: Pointer to PCI device
4328  * @state: The current pci connection state
4329  *
4330  * This function is called after a PCI bus error affecting
4331  * this device has been detected.
4332  */
4333 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4334                                                 pci_channel_state_t state)
4335 {
4336         struct net_device *netdev = pci_get_drvdata(pdev);
4337         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4338
4339         netif_device_detach(netdev);
4340
4341         if (netif_running(netdev))
4342                 ixgbe_down(adapter);
4343         pci_disable_device(pdev);
4344
4345         /* Request a slot reset. */
4346         return PCI_ERS_RESULT_NEED_RESET;
4347 }
4348
4349 /**
4350  * ixgbe_io_slot_reset - called after the pci bus has been reset.
4351  * @pdev: Pointer to PCI device
4352  *
4353  * Restart the card from scratch, as if from a cold-boot.
4354  */
4355 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4356 {
4357         struct net_device *netdev = pci_get_drvdata(pdev);
4358         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4359         pci_ers_result_t result;
4360         int err;
4361
4362         if (pci_enable_device(pdev)) {
4363                 DPRINTK(PROBE, ERR,
4364                         "Cannot re-enable PCI device after reset.\n");
4365                 result = PCI_ERS_RESULT_DISCONNECT;
4366         } else {
4367                 pci_set_master(pdev);
4368                 pci_restore_state(pdev);
4369
4370                 pci_enable_wake(pdev, PCI_D3hot, 0);
4371                 pci_enable_wake(pdev, PCI_D3cold, 0);
4372
4373                 ixgbe_reset(adapter);
4374
4375                 result = PCI_ERS_RESULT_RECOVERED;
4376         }
4377
4378         err = pci_cleanup_aer_uncorrect_error_status(pdev);
4379         if (err) {
4380                 dev_err(&pdev->dev,
4381                   "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4382                 /* non-fatal, continue */
4383         }
4384
4385         return result;
4386 }
4387
4388 /**
4389  * ixgbe_io_resume - called when traffic can start flowing again.
4390  * @pdev: Pointer to PCI device
4391  *
4392  * This callback is called when the error recovery driver tells us that
4393  * its OK to resume normal operation.
4394  */
4395 static void ixgbe_io_resume(struct pci_dev *pdev)
4396 {
4397         struct net_device *netdev = pci_get_drvdata(pdev);
4398         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4399
4400         if (netif_running(netdev)) {
4401                 if (ixgbe_up(adapter)) {
4402                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4403                         return;
4404                 }
4405         }
4406
4407         netif_device_attach(netdev);
4408 }
4409
4410 static struct pci_error_handlers ixgbe_err_handler = {
4411         .error_detected = ixgbe_io_error_detected,
4412         .slot_reset = ixgbe_io_slot_reset,
4413         .resume = ixgbe_io_resume,
4414 };
4415
4416 static struct pci_driver ixgbe_driver = {
4417         .name     = ixgbe_driver_name,
4418         .id_table = ixgbe_pci_tbl,
4419         .probe    = ixgbe_probe,
4420         .remove   = __devexit_p(ixgbe_remove),
4421 #ifdef CONFIG_PM
4422         .suspend  = ixgbe_suspend,
4423         .resume   = ixgbe_resume,
4424 #endif
4425         .shutdown = ixgbe_shutdown,
4426         .err_handler = &ixgbe_err_handler
4427 };
4428
4429 /**
4430  * ixgbe_init_module - Driver Registration Routine
4431  *
4432  * ixgbe_init_module is the first routine called when the driver is
4433  * loaded. All it does is register with the PCI subsystem.
4434  **/
4435 static int __init ixgbe_init_module(void)
4436 {
4437         int ret;
4438         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4439                ixgbe_driver_string, ixgbe_driver_version);
4440
4441         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4442
4443 #ifdef CONFIG_IXGBE_DCA
4444         dca_register_notify(&dca_notifier);
4445 #endif
4446
4447         ret = pci_register_driver(&ixgbe_driver);
4448         return ret;
4449 }
4450
4451 module_init(ixgbe_init_module);
4452
4453 /**
4454  * ixgbe_exit_module - Driver Exit Cleanup Routine
4455  *
4456  * ixgbe_exit_module is called just before the driver is removed
4457  * from memory.
4458  **/
4459 static void __exit ixgbe_exit_module(void)
4460 {
4461 #ifdef CONFIG_IXGBE_DCA
4462         dca_unregister_notify(&dca_notifier);
4463 #endif
4464         pci_unregister_driver(&ixgbe_driver);
4465 }
4466
4467 #ifdef CONFIG_IXGBE_DCA
4468 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4469                             void *p)
4470 {
4471         int ret_val;
4472
4473         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4474                                          __ixgbe_notify_dca);
4475
4476         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4477 }
4478 #endif /* CONFIG_IXGBE_DCA */
4479
4480 module_exit(ixgbe_exit_module);
4481
4482 /* ixgbe_main.c */