Pileus Git - ~andy/linux/blob - drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39
  40 #include "igb.h"
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int sizeof_stat;
  45         int stat_offset;
  46 };
  47
  48 #define IGB_STAT(_name, _stat) { \
  49         .stat_string = _name, \
  50         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  51         .stat_offset = offsetof(struct igb_adapter, _stat) \
  52 }
  53 static const struct igb_stats igb_gstrings_stats[] = {
  54         IGB_STAT("rx_packets", stats.gprc),
  55         IGB_STAT("tx_packets", stats.gptc),
  56         IGB_STAT("rx_bytes", stats.gorc),
  57         IGB_STAT("tx_bytes", stats.gotc),
  58         IGB_STAT("rx_broadcast", stats.bprc),
  59         IGB_STAT("tx_broadcast", stats.bptc),
  60         IGB_STAT("rx_multicast", stats.mprc),
  61         IGB_STAT("tx_multicast", stats.mptc),
  62         IGB_STAT("multicast", stats.mprc),
  63         IGB_STAT("collisions", stats.colc),
  64         IGB_STAT("rx_crc_errors", stats.crcerrs),
  65         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  66         IGB_STAT("rx_missed_errors", stats.mpc),
  67         IGB_STAT("tx_aborted_errors", stats.ecol),
  68         IGB_STAT("tx_carrier_errors", stats.tncrs),
  69         IGB_STAT("tx_window_errors", stats.latecol),
  70         IGB_STAT("tx_abort_late_coll", stats.latecol),
  71         IGB_STAT("tx_deferred_ok", stats.dc),
  72         IGB_STAT("tx_single_coll_ok", stats.scc),
  73         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  74         IGB_STAT("tx_timeout_count", tx_timeout_count),
  75         IGB_STAT("rx_long_length_errors", stats.roc),
  76         IGB_STAT("rx_short_length_errors", stats.ruc),
  77         IGB_STAT("rx_align_errors", stats.algnerrc),
  78         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  79         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  80         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  81         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  82         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  83         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  84         IGB_STAT("rx_long_byte_count", stats.gorc),
  85         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  86         IGB_STAT("tx_smbus", stats.mgptc),
  87         IGB_STAT("rx_smbus", stats.mgprc),
  88         IGB_STAT("dropped_smbus", stats.mgpdc),
  89         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  90         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  91         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  92         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  93 };
  94
  95 #define IGB_NETDEV_STAT(_net_stat) { \
  96         .stat_string = __stringify(_net_stat), \
  97         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
  98         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
  99 }
 100 static const struct igb_stats igb_gstrings_net_stats[] = {
 101         IGB_NETDEV_STAT(rx_errors),
 102         IGB_NETDEV_STAT(tx_errors),
 103         IGB_NETDEV_STAT(tx_dropped),
 104         IGB_NETDEV_STAT(rx_length_errors),
 105         IGB_NETDEV_STAT(rx_over_errors),
 106         IGB_NETDEV_STAT(rx_frame_errors),
 107         IGB_NETDEV_STAT(rx_fifo_errors),
 108         IGB_NETDEV_STAT(tx_fifo_errors),
 109         IGB_NETDEV_STAT(tx_heartbeat_errors)
 110 };
 111
 112 #define IGB_GLOBAL_STATS_LEN    \
 113         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 114 #define IGB_NETDEV_STATS_LEN    \
 115         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 116 #define IGB_RX_QUEUE_STATS_LEN \
 117         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 118
 119 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 120
 121 #define IGB_QUEUE_STATS_LEN \
 122         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 123           IGB_RX_QUEUE_STATS_LEN) + \
 124          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 125           IGB_TX_QUEUE_STATS_LEN))
 126 #define IGB_STATS_LEN \
 127         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 128
 129 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 130         "Register test  (offline)", "Eeprom test    (offline)",
 131         "Interrupt test (offline)", "Loopback test  (offline)",
 132         "Link test   (on/offline)"
 133 };
 134 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 135
 136 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 137 {
 138         struct igb_adapter *adapter = netdev_priv(netdev);
 139         struct e1000_hw *hw = &adapter->hw;
 140         u32 status;
 141
 142         if (hw->phy.media_type == e1000_media_type_copper) {
 143
 144                 ecmd->supported = (SUPPORTED_10baseT_Half |
 145                                    SUPPORTED_10baseT_Full |
 146                                    SUPPORTED_100baseT_Half |
 147                                    SUPPORTED_100baseT_Full |
 148                                    SUPPORTED_1000baseT_Full|
 149                                    SUPPORTED_Autoneg |
 150                                    SUPPORTED_TP);
 151                 ecmd->advertising = ADVERTISED_TP;
 152
 153                 if (hw->mac.autoneg == 1) {
 154                         ecmd->advertising |= ADVERTISED_Autoneg;
 155                         /* the e1000 autoneg seems to match ethtool nicely */
 156                         ecmd->advertising |= hw->phy.autoneg_advertised;
 157                 }
 158
 159                 ecmd->port = PORT_TP;
 160                 ecmd->phy_address = hw->phy.addr;
 161         } else {
 162                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 163                                      SUPPORTED_FIBRE |
 164                                      SUPPORTED_Autoneg);
 165
 166                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 167                                      ADVERTISED_FIBRE |
 168                                      ADVERTISED_Autoneg);
 169
 170                 ecmd->port = PORT_FIBRE;
 171         }
 172
 173         ecmd->transceiver = XCVR_INTERNAL;
 174
 175         status = rd32(E1000_STATUS);
 176
 177         if (status & E1000_STATUS_LU) {
 178
 179                 if ((status & E1000_STATUS_SPEED_1000) ||
 180                     hw->phy.media_type != e1000_media_type_copper)
 181                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 182                 else if (status & E1000_STATUS_SPEED_100)
 183                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 184                 else
 185                         ethtool_cmd_speed_set(ecmd, SPEED_10);
 186
 187                 if ((status & E1000_STATUS_FD) ||
 188                     hw->phy.media_type != e1000_media_type_copper)
 189                         ecmd->duplex = DUPLEX_FULL;
 190                 else
 191                         ecmd->duplex = DUPLEX_HALF;
 192         } else {
 193                 ethtool_cmd_speed_set(ecmd, -1);
 194                 ecmd->duplex = -1;
 195         }
 196
 197         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 198         return 0;
 199 }
 200
 201 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 202 {
 203         struct igb_adapter *adapter = netdev_priv(netdev);
 204         struct e1000_hw *hw = &adapter->hw;
 205
 206         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 207          * cannot be changed */
 208         if (igb_check_reset_block(hw)) {
 209                 dev_err(&adapter->pdev->dev, "Cannot change link "
 210                         "characteristics when SoL/IDER is active.\n");
 211                 return -EINVAL;
 212         }
 213
 214         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 215                 msleep(1);
 216
 217         if (ecmd->autoneg == AUTONEG_ENABLE) {
 218                 hw->mac.autoneg = 1;
 219                 hw->phy.autoneg_advertised = ecmd->advertising |
 220                                              ADVERTISED_TP |
 221                                              ADVERTISED_Autoneg;
 222                 ecmd->advertising = hw->phy.autoneg_advertised;
 223                 if (adapter->fc_autoneg)
 224                         hw->fc.requested_mode = e1000_fc_default;
 225         } else {
 226                 u32 speed = ethtool_cmd_speed(ecmd);
 227                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 228                         clear_bit(__IGB_RESETTING, &adapter->state);
 229                         return -EINVAL;
 230                 }
 231         }
 232
 233         /* reset the link */
 234         if (netif_running(adapter->netdev)) {
 235                 igb_down(adapter);
 236                 igb_up(adapter);
 237         } else
 238                 igb_reset(adapter);
 239
 240         clear_bit(__IGB_RESETTING, &adapter->state);
 241         return 0;
 242 }
 243
 244 static u32 igb_get_link(struct net_device *netdev)
 245 {
 246         struct igb_adapter *adapter = netdev_priv(netdev);
 247         struct e1000_mac_info *mac = &adapter->hw.mac;
 248
 249         /*
 250          * If the link is not reported up to netdev, interrupts are disabled,
 251          * and so the physical link state may have changed since we last
 252          * looked. Set get_link_status to make sure that the true link
 253          * state is interrogated, rather than pulling a cached and possibly
 254          * stale link state from the driver.
 255          */
 256         if (!netif_carrier_ok(netdev))
 257                 mac->get_link_status = 1;
 258
 259         return igb_has_link(adapter);
 260 }
 261
 262 static void igb_get_pauseparam(struct net_device *netdev,
 263                                struct ethtool_pauseparam *pause)
 264 {
 265         struct igb_adapter *adapter = netdev_priv(netdev);
 266         struct e1000_hw *hw = &adapter->hw;
 267
 268         pause->autoneg =
 269                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 270
 271         if (hw->fc.current_mode == e1000_fc_rx_pause)
 272                 pause->rx_pause = 1;
 273         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 274                 pause->tx_pause = 1;
 275         else if (hw->fc.current_mode == e1000_fc_full) {
 276                 pause->rx_pause = 1;
 277                 pause->tx_pause = 1;
 278         }
 279 }
 280
 281 static int igb_set_pauseparam(struct net_device *netdev,
 282                               struct ethtool_pauseparam *pause)
 283 {
 284         struct igb_adapter *adapter = netdev_priv(netdev);
 285         struct e1000_hw *hw = &adapter->hw;
 286         int retval = 0;
 287
 288         adapter->fc_autoneg = pause->autoneg;
 289
 290         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 291                 msleep(1);
 292
 293         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 294                 hw->fc.requested_mode = e1000_fc_default;
 295                 if (netif_running(adapter->netdev)) {
 296                         igb_down(adapter);
 297                         igb_up(adapter);
 298                 } else {
 299                         igb_reset(adapter);
 300                 }
 301         } else {
 302                 if (pause->rx_pause && pause->tx_pause)
 303                         hw->fc.requested_mode = e1000_fc_full;
 304                 else if (pause->rx_pause && !pause->tx_pause)
 305                         hw->fc.requested_mode = e1000_fc_rx_pause;
 306                 else if (!pause->rx_pause && pause->tx_pause)
 307                         hw->fc.requested_mode = e1000_fc_tx_pause;
 308                 else if (!pause->rx_pause && !pause->tx_pause)
 309                         hw->fc.requested_mode = e1000_fc_none;
 310
 311                 hw->fc.current_mode = hw->fc.requested_mode;
 312
 313                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 314                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 315         }
 316
 317         clear_bit(__IGB_RESETTING, &adapter->state);
 318         return retval;
 319 }
 320
 321 static u32 igb_get_msglevel(struct net_device *netdev)
 322 {
 323         struct igb_adapter *adapter = netdev_priv(netdev);
 324         return adapter->msg_enable;
 325 }
 326
 327 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 328 {
 329         struct igb_adapter *adapter = netdev_priv(netdev);
 330         adapter->msg_enable = data;
 331 }
 332
 333 static int igb_get_regs_len(struct net_device *netdev)
 334 {
 335 #define IGB_REGS_LEN 551
 336         return IGB_REGS_LEN * sizeof(u32);
 337 }
 338
 339 static void igb_get_regs(struct net_device *netdev,
 340                          struct ethtool_regs *regs, void *p)
 341 {
 342         struct igb_adapter *adapter = netdev_priv(netdev);
 343         struct e1000_hw *hw = &adapter->hw;
 344         u32 *regs_buff = p;
 345         u8 i;
 346
 347         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 348
 349         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 350
 351         /* General Registers */
 352         regs_buff[0] = rd32(E1000_CTRL);
 353         regs_buff[1] = rd32(E1000_STATUS);
 354         regs_buff[2] = rd32(E1000_CTRL_EXT);
 355         regs_buff[3] = rd32(E1000_MDIC);
 356         regs_buff[4] = rd32(E1000_SCTL);
 357         regs_buff[5] = rd32(E1000_CONNSW);
 358         regs_buff[6] = rd32(E1000_VET);
 359         regs_buff[7] = rd32(E1000_LEDCTL);
 360         regs_buff[8] = rd32(E1000_PBA);
 361         regs_buff[9] = rd32(E1000_PBS);
 362         regs_buff[10] = rd32(E1000_FRTIMER);
 363         regs_buff[11] = rd32(E1000_TCPTIMER);
 364
 365         /* NVM Register */
 366         regs_buff[12] = rd32(E1000_EECD);
 367
 368         /* Interrupt */
 369         /* Reading EICS for EICR because they read the
 370          * same but EICS does not clear on read */
 371         regs_buff[13] = rd32(E1000_EICS);
 372         regs_buff[14] = rd32(E1000_EICS);
 373         regs_buff[15] = rd32(E1000_EIMS);
 374         regs_buff[16] = rd32(E1000_EIMC);
 375         regs_buff[17] = rd32(E1000_EIAC);
 376         regs_buff[18] = rd32(E1000_EIAM);
 377         /* Reading ICS for ICR because they read the
 378          * same but ICS does not clear on read */
 379         regs_buff[19] = rd32(E1000_ICS);
 380         regs_buff[20] = rd32(E1000_ICS);
 381         regs_buff[21] = rd32(E1000_IMS);
 382         regs_buff[22] = rd32(E1000_IMC);
 383         regs_buff[23] = rd32(E1000_IAC);
 384         regs_buff[24] = rd32(E1000_IAM);
 385         regs_buff[25] = rd32(E1000_IMIRVP);
 386
 387         /* Flow Control */
 388         regs_buff[26] = rd32(E1000_FCAL);
 389         regs_buff[27] = rd32(E1000_FCAH);
 390         regs_buff[28] = rd32(E1000_FCTTV);
 391         regs_buff[29] = rd32(E1000_FCRTL);
 392         regs_buff[30] = rd32(E1000_FCRTH);
 393         regs_buff[31] = rd32(E1000_FCRTV);
 394
 395         /* Receive */
 396         regs_buff[32] = rd32(E1000_RCTL);
 397         regs_buff[33] = rd32(E1000_RXCSUM);
 398         regs_buff[34] = rd32(E1000_RLPML);
 399         regs_buff[35] = rd32(E1000_RFCTL);
 400         regs_buff[36] = rd32(E1000_MRQC);
 401         regs_buff[37] = rd32(E1000_VT_CTL);
 402
 403         /* Transmit */
 404         regs_buff[38] = rd32(E1000_TCTL);
 405         regs_buff[39] = rd32(E1000_TCTL_EXT);
 406         regs_buff[40] = rd32(E1000_TIPG);
 407         regs_buff[41] = rd32(E1000_DTXCTL);
 408
 409         /* Wake Up */
 410         regs_buff[42] = rd32(E1000_WUC);
 411         regs_buff[43] = rd32(E1000_WUFC);
 412         regs_buff[44] = rd32(E1000_WUS);
 413         regs_buff[45] = rd32(E1000_IPAV);
 414         regs_buff[46] = rd32(E1000_WUPL);
 415
 416         /* MAC */
 417         regs_buff[47] = rd32(E1000_PCS_CFG0);
 418         regs_buff[48] = rd32(E1000_PCS_LCTL);
 419         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 420         regs_buff[50] = rd32(E1000_PCS_ANADV);
 421         regs_buff[51] = rd32(E1000_PCS_LPAB);
 422         regs_buff[52] = rd32(E1000_PCS_NPTX);
 423         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 424
 425         /* Statistics */
 426         regs_buff[54] = adapter->stats.crcerrs;
 427         regs_buff[55] = adapter->stats.algnerrc;
 428         regs_buff[56] = adapter->stats.symerrs;
 429         regs_buff[57] = adapter->stats.rxerrc;
 430         regs_buff[58] = adapter->stats.mpc;
 431         regs_buff[59] = adapter->stats.scc;
 432         regs_buff[60] = adapter->stats.ecol;
 433         regs_buff[61] = adapter->stats.mcc;
 434         regs_buff[62] = adapter->stats.latecol;
 435         regs_buff[63] = adapter->stats.colc;
 436         regs_buff[64] = adapter->stats.dc;
 437         regs_buff[65] = adapter->stats.tncrs;
 438         regs_buff[66] = adapter->stats.sec;
 439         regs_buff[67] = adapter->stats.htdpmc;
 440         regs_buff[68] = adapter->stats.rlec;
 441         regs_buff[69] = adapter->stats.xonrxc;
 442         regs_buff[70] = adapter->stats.xontxc;
 443         regs_buff[71] = adapter->stats.xoffrxc;
 444         regs_buff[72] = adapter->stats.xofftxc;
 445         regs_buff[73] = adapter->stats.fcruc;
 446         regs_buff[74] = adapter->stats.prc64;
 447         regs_buff[75] = adapter->stats.prc127;
 448         regs_buff[76] = adapter->stats.prc255;
 449         regs_buff[77] = adapter->stats.prc511;
 450         regs_buff[78] = adapter->stats.prc1023;
 451         regs_buff[79] = adapter->stats.prc1522;
 452         regs_buff[80] = adapter->stats.gprc;
 453         regs_buff[81] = adapter->stats.bprc;
 454         regs_buff[82] = adapter->stats.mprc;
 455         regs_buff[83] = adapter->stats.gptc;
 456         regs_buff[84] = adapter->stats.gorc;
 457         regs_buff[86] = adapter->stats.gotc;
 458         regs_buff[88] = adapter->stats.rnbc;
 459         regs_buff[89] = adapter->stats.ruc;
 460         regs_buff[90] = adapter->stats.rfc;
 461         regs_buff[91] = adapter->stats.roc;
 462         regs_buff[92] = adapter->stats.rjc;
 463         regs_buff[93] = adapter->stats.mgprc;
 464         regs_buff[94] = adapter->stats.mgpdc;
 465         regs_buff[95] = adapter->stats.mgptc;
 466         regs_buff[96] = adapter->stats.tor;
 467         regs_buff[98] = adapter->stats.tot;
 468         regs_buff[100] = adapter->stats.tpr;
 469         regs_buff[101] = adapter->stats.tpt;
 470         regs_buff[102] = adapter->stats.ptc64;
 471         regs_buff[103] = adapter->stats.ptc127;
 472         regs_buff[104] = adapter->stats.ptc255;
 473         regs_buff[105] = adapter->stats.ptc511;
 474         regs_buff[106] = adapter->stats.ptc1023;
 475         regs_buff[107] = adapter->stats.ptc1522;
 476         regs_buff[108] = adapter->stats.mptc;
 477         regs_buff[109] = adapter->stats.bptc;
 478         regs_buff[110] = adapter->stats.tsctc;
 479         regs_buff[111] = adapter->stats.iac;
 480         regs_buff[112] = adapter->stats.rpthc;
 481         regs_buff[113] = adapter->stats.hgptc;
 482         regs_buff[114] = adapter->stats.hgorc;
 483         regs_buff[116] = adapter->stats.hgotc;
 484         regs_buff[118] = adapter->stats.lenerrs;
 485         regs_buff[119] = adapter->stats.scvpc;
 486         regs_buff[120] = adapter->stats.hrmpc;
 487
 488         for (i = 0; i < 4; i++)
 489                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 490         for (i = 0; i < 4; i++)
 491                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 492         for (i = 0; i < 4; i++)
 493                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 494         for (i = 0; i < 4; i++)
 495                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 496         for (i = 0; i < 4; i++)
 497                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 498         for (i = 0; i < 4; i++)
 499                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 500         for (i = 0; i < 4; i++)
 501                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 502         for (i = 0; i < 4; i++)
 503                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 504
 505         for (i = 0; i < 10; i++)
 506                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 507         for (i = 0; i < 8; i++)
 508                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 509         for (i = 0; i < 8; i++)
 510                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 511         for (i = 0; i < 16; i++)
 512                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 513         for (i = 0; i < 16; i++)
 514                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 515
 516         for (i = 0; i < 4; i++)
 517                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 518         for (i = 0; i < 4; i++)
 519                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 520         for (i = 0; i < 4; i++)
 521                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 522         for (i = 0; i < 4; i++)
 523                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 524         for (i = 0; i < 4; i++)
 525                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 526         for (i = 0; i < 4; i++)
 527                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 528         for (i = 0; i < 4; i++)
 529                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 530         for (i = 0; i < 4; i++)
 531                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 532         for (i = 0; i < 4; i++)
 533                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 534
 535         for (i = 0; i < 4; i++)
 536                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 537         for (i = 0; i < 4; i++)
 538                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 539         for (i = 0; i < 32; i++)
 540                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 541         for (i = 0; i < 128; i++)
 542                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 543         for (i = 0; i < 128; i++)
 544                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 545         for (i = 0; i < 4; i++)
 546                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 547
 548         regs_buff[547] = rd32(E1000_TDFH);
 549         regs_buff[548] = rd32(E1000_TDFT);
 550         regs_buff[549] = rd32(E1000_TDFHS);
 551         regs_buff[550] = rd32(E1000_TDFPC);
 552         regs_buff[551] = adapter->stats.o2bgptc;
 553         regs_buff[552] = adapter->stats.b2ospc;
 554         regs_buff[553] = adapter->stats.o2bspc;
 555         regs_buff[554] = adapter->stats.b2ogprc;
 556 }
 557
 558 static int igb_get_eeprom_len(struct net_device *netdev)
 559 {
 560         struct igb_adapter *adapter = netdev_priv(netdev);
 561         return adapter->hw.nvm.word_size * 2;
 562 }
 563
 564 static int igb_get_eeprom(struct net_device *netdev,
 565                           struct ethtool_eeprom *eeprom, u8 *bytes)
 566 {
 567         struct igb_adapter *adapter = netdev_priv(netdev);
 568         struct e1000_hw *hw = &adapter->hw;
 569         u16 *eeprom_buff;
 570         int first_word, last_word;
 571         int ret_val = 0;
 572         u16 i;
 573
 574         if (eeprom->len == 0)
 575                 return -EINVAL;
 576
 577         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 578
 579         first_word = eeprom->offset >> 1;
 580         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 581
 582         eeprom_buff = kmalloc(sizeof(u16) *
 583                         (last_word - first_word + 1), GFP_KERNEL);
 584         if (!eeprom_buff)
 585                 return -ENOMEM;
 586
 587         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 588                 ret_val = hw->nvm.ops.read(hw, first_word,
 589                                             last_word - first_word + 1,
 590                                             eeprom_buff);
 591         else {
 592                 for (i = 0; i < last_word - first_word + 1; i++) {
 593                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 594                                                     &eeprom_buff[i]);
 595                         if (ret_val)
 596                                 break;
 597                 }
 598         }
 599
 600         /* Device's eeprom is always little-endian, word addressable */
 601         for (i = 0; i < last_word - first_word + 1; i++)
 602                 le16_to_cpus(&eeprom_buff[i]);
 603
 604         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 605                         eeprom->len);
 606         kfree(eeprom_buff);
 607
 608         return ret_val;
 609 }
 610
 611 static int igb_set_eeprom(struct net_device *netdev,
 612                           struct ethtool_eeprom *eeprom, u8 *bytes)
 613 {
 614         struct igb_adapter *adapter = netdev_priv(netdev);
 615         struct e1000_hw *hw = &adapter->hw;
 616         u16 *eeprom_buff;
 617         void *ptr;
 618         int max_len, first_word, last_word, ret_val = 0;
 619         u16 i;
 620
 621         if (eeprom->len == 0)
 622                 return -EOPNOTSUPP;
 623
 624         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 625                 return -EFAULT;
 626
 627         max_len = hw->nvm.word_size * 2;
 628
 629         first_word = eeprom->offset >> 1;
 630         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 631         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 632         if (!eeprom_buff)
 633                 return -ENOMEM;
 634
 635         ptr = (void *)eeprom_buff;
 636
 637         if (eeprom->offset & 1) {
 638                 /* need read/modify/write of first changed EEPROM word */
 639                 /* only the second byte of the word is being modified */
 640                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 641                                             &eeprom_buff[0]);
 642                 ptr++;
 643         }
 644         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 645                 /* need read/modify/write of last changed EEPROM word */
 646                 /* only the first byte of the word is being modified */
 647                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 648                                    &eeprom_buff[last_word - first_word]);
 649         }
 650
 651         /* Device's eeprom is always little-endian, word addressable */
 652         for (i = 0; i < last_word - first_word + 1; i++)
 653                 le16_to_cpus(&eeprom_buff[i]);
 654
 655         memcpy(ptr, bytes, eeprom->len);
 656
 657         for (i = 0; i < last_word - first_word + 1; i++)
 658                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 659
 660         ret_val = hw->nvm.ops.write(hw, first_word,
 661                                      last_word - first_word + 1, eeprom_buff);
 662
 663         /* Update the checksum over the first part of the EEPROM if needed
 664          * and flush shadow RAM for 82573 controllers */
 665         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 666                 hw->nvm.ops.update(hw);
 667
 668         kfree(eeprom_buff);
 669         return ret_val;
 670 }
 671
 672 static void igb_get_drvinfo(struct net_device *netdev,
 673                             struct ethtool_drvinfo *drvinfo)
 674 {
 675         struct igb_adapter *adapter = netdev_priv(netdev);
 676         char firmware_version[32];
 677         u16 eeprom_data;
 678
 679         strncpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver) - 1);
 680         strncpy(drvinfo->version, igb_driver_version,
 681                 sizeof(drvinfo->version) - 1);
 682
 683         /* EEPROM image version # is reported as firmware version # for
 684          * 82575 controllers */
 685         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 686         sprintf(firmware_version, "%d.%d-%d",
 687                 (eeprom_data & 0xF000) >> 12,
 688                 (eeprom_data & 0x0FF0) >> 4,
 689                 eeprom_data & 0x000F);
 690
 691         strncpy(drvinfo->fw_version, firmware_version,
 692                 sizeof(drvinfo->fw_version) - 1);
 693         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 694                 sizeof(drvinfo->bus_info) - 1);
 695         drvinfo->n_stats = IGB_STATS_LEN;
 696         drvinfo->testinfo_len = IGB_TEST_LEN;
 697         drvinfo->regdump_len = igb_get_regs_len(netdev);
 698         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 699 }
 700
 701 static void igb_get_ringparam(struct net_device *netdev,
 702                               struct ethtool_ringparam *ring)
 703 {
 704         struct igb_adapter *adapter = netdev_priv(netdev);
 705
 706         ring->rx_max_pending = IGB_MAX_RXD;
 707         ring->tx_max_pending = IGB_MAX_TXD;
 708         ring->rx_mini_max_pending = 0;
 709         ring->rx_jumbo_max_pending = 0;
 710         ring->rx_pending = adapter->rx_ring_count;
 711         ring->tx_pending = adapter->tx_ring_count;
 712         ring->rx_mini_pending = 0;
 713         ring->rx_jumbo_pending = 0;
 714 }
 715
 716 static int igb_set_ringparam(struct net_device *netdev,
 717                              struct ethtool_ringparam *ring)
 718 {
 719         struct igb_adapter *adapter = netdev_priv(netdev);
 720         struct igb_ring *temp_ring;
 721         int i, err = 0;
 722         u16 new_rx_count, new_tx_count;
 723
 724         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 725                 return -EINVAL;
 726
 727         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 728         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 729         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 730
 731         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 732         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 733         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 734
 735         if ((new_tx_count == adapter->tx_ring_count) &&
 736             (new_rx_count == adapter->rx_ring_count)) {
 737                 /* nothing to do */
 738                 return 0;
 739         }
 740
 741         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 742                 msleep(1);
 743
 744         if (!netif_running(adapter->netdev)) {
 745                 for (i = 0; i < adapter->num_tx_queues; i++)
 746                         adapter->tx_ring[i]->count = new_tx_count;
 747                 for (i = 0; i < adapter->num_rx_queues; i++)
 748                         adapter->rx_ring[i]->count = new_rx_count;
 749                 adapter->tx_ring_count = new_tx_count;
 750                 adapter->rx_ring_count = new_rx_count;
 751                 goto clear_reset;
 752         }
 753
 754         if (adapter->num_tx_queues > adapter->num_rx_queues)
 755                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 756         else
 757                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 758
 759         if (!temp_ring) {
 760                 err = -ENOMEM;
 761                 goto clear_reset;
 762         }
 763
 764         igb_down(adapter);
 765
 766         /*
 767          * We can't just free everything and then setup again,
 768          * because the ISRs in MSI-X mode get passed pointers
 769          * to the tx and rx ring structs.
 770          */
 771         if (new_tx_count != adapter->tx_ring_count) {
 772                 for (i = 0; i < adapter->num_tx_queues; i++) {
 773                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 774                                sizeof(struct igb_ring));
 775
 776                         temp_ring[i].count = new_tx_count;
 777                         err = igb_setup_tx_resources(&temp_ring[i]);
 778                         if (err) {
 779                                 while (i) {
 780                                         i--;
 781                                         igb_free_tx_resources(&temp_ring[i]);
 782                                 }
 783                                 goto err_setup;
 784                         }
 785                 }
 786
 787                 for (i = 0; i < adapter->num_tx_queues; i++) {
 788                         igb_free_tx_resources(adapter->tx_ring[i]);
 789
 790                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 791                                sizeof(struct igb_ring));
 792                 }
 793
 794                 adapter->tx_ring_count = new_tx_count;
 795         }
 796
 797         if (new_rx_count != adapter->rx_ring_count) {
 798                 for (i = 0; i < adapter->num_rx_queues; i++) {
 799                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 800                                sizeof(struct igb_ring));
 801
 802                         temp_ring[i].count = new_rx_count;
 803                         err = igb_setup_rx_resources(&temp_ring[i]);
 804                         if (err) {
 805                                 while (i) {
 806                                         i--;
 807                                         igb_free_rx_resources(&temp_ring[i]);
 808                                 }
 809                                 goto err_setup;
 810                         }
 811
 812                 }
 813
 814                 for (i = 0; i < adapter->num_rx_queues; i++) {
 815                         igb_free_rx_resources(adapter->rx_ring[i]);
 816
 817                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 818                                sizeof(struct igb_ring));
 819                 }
 820
 821                 adapter->rx_ring_count = new_rx_count;
 822         }
 823 err_setup:
 824         igb_up(adapter);
 825         vfree(temp_ring);
 826 clear_reset:
 827         clear_bit(__IGB_RESETTING, &adapter->state);
 828         return err;
 829 }
 830
 831 /* ethtool register test data */
 832 struct igb_reg_test {
 833         u16 reg;
 834         u16 reg_offset;
 835         u16 array_len;
 836         u16 test_type;
 837         u32 mask;
 838         u32 write;
 839 };
 840
 841 /* In the hardware, registers are laid out either singly, in arrays
 842  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 843  * most tests take place on arrays or single registers (handled
 844  * as a single-element array) and special-case the tables.
 845  * Table tests are always pattern tests.
 846  *
 847  * We also make provision for some required setup steps by specifying
 848  * registers to be written without any read-back testing.
 849  */
 850
 851 #define PATTERN_TEST    1
 852 #define SET_READ_TEST   2
 853 #define WRITE_NO_TEST   3
 854 #define TABLE32_TEST    4
 855 #define TABLE64_TEST_LO 5
 856 #define TABLE64_TEST_HI 6
 857
 858 /* i350 reg test */
 859 static struct igb_reg_test reg_test_i350[] = {
 860         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 861         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 862         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 863         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
 864         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 865         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 866         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 867         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 868         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 869         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 870         /* RDH is read-only for i350, only test RDT. */
 871         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 872         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 873         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 874         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 875         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 876         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 877         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 878         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 879         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 880         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 881         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 882         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 883         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 884         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 885         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 886         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 887         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 888         { E1000_RA,        0, 16, TABLE64_TEST_LO,
 889                                                 0xFFFFFFFF, 0xFFFFFFFF },
 890         { E1000_RA,        0, 16, TABLE64_TEST_HI,
 891                                                 0xC3FFFFFF, 0xFFFFFFFF },
 892         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
 893                                                 0xFFFFFFFF, 0xFFFFFFFF },
 894         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
 895                                                 0xC3FFFFFF, 0xFFFFFFFF },
 896         { E1000_MTA,       0, 128, TABLE32_TEST,
 897                                                 0xFFFFFFFF, 0xFFFFFFFF },
 898         { 0, 0, 0, 0 }
 899 };
 900
 901 /* 82580 reg test */
 902 static struct igb_reg_test reg_test_82580[] = {
 903         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 904         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 905         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 906         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 907         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 908         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 909         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 910         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 911         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 912         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 913         /* RDH is read-only for 82580, only test RDT. */
 914         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 915         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 916         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 917         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 918         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 919         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 920         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 921         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 922         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 923         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 924         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 925         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 926         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 927         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 928         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 929         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 930         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 931         { E1000_RA,        0, 16, TABLE64_TEST_LO,
 932                                                 0xFFFFFFFF, 0xFFFFFFFF },
 933         { E1000_RA,        0, 16, TABLE64_TEST_HI,
 934                                                 0x83FFFFFF, 0xFFFFFFFF },
 935         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
 936                                                 0xFFFFFFFF, 0xFFFFFFFF },
 937         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
 938                                                 0x83FFFFFF, 0xFFFFFFFF },
 939         { E1000_MTA,       0, 128, TABLE32_TEST,
 940                                                 0xFFFFFFFF, 0xFFFFFFFF },
 941         { 0, 0, 0, 0 }
 942 };
 943
 944 /* 82576 reg test */
 945 static struct igb_reg_test reg_test_82576[] = {
 946         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 947         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 948         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 949         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 950         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 951         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 952         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 953         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 954         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 955         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 956         /* Enable all RX queues before testing. */
 957         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 958         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 959         /* RDH is read-only for 82576, only test RDT. */
 960         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 961         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 962         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 963         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
 964         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 965         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 966         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 967         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 968         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 969         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 970         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 971         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 972         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 973         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 974         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 975         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 976         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 977         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 978         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 979         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 980         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 981         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 982         { 0, 0, 0, 0 }
 983 };
 984
 985 /* 82575 register test */
 986 static struct igb_reg_test reg_test_82575[] = {
 987         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 988         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 989         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 990         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 991         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 992         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 993         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 994         /* Enable all four RX queues before testing. */
 995         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 996         /* RDH is read-only for 82575, only test RDT. */
 997         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 998         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
 999         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1000         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1001         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1002         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1003         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1004         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1005         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1006         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1007         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1008         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1009         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1010         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1011         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1012         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1013         { 0, 0, 0, 0 }
1014 };
1015
1016 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1017                              int reg, u32 mask, u32 write)
1018 {
1019         struct e1000_hw *hw = &adapter->hw;
1020         u32 pat, val;
1021         static const u32 _test[] =
1022                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1023         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1024                 wr32(reg, (_test[pat] & write));
1025                 val = rd32(reg) & mask;
1026                 if (val != (_test[pat] & write & mask)) {
1027                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
1028                                 "failed: got 0x%08X expected 0x%08X\n",
1029                                 reg, val, (_test[pat] & write & mask));
1030                         *data = reg;
1031                         return 1;
1032                 }
1033         }
1034
1035         return 0;
1036 }
1037
1038 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1039                               int reg, u32 mask, u32 write)
1040 {
1041         struct e1000_hw *hw = &adapter->hw;
1042         u32 val;
1043         wr32(reg, write & mask);
1044         val = rd32(reg);
1045         if ((write & mask) != (val & mask)) {
1046                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
1047                         " got 0x%08X expected 0x%08X\n", reg,
1048                         (val & mask), (write & mask));
1049                 *data = reg;
1050                 return 1;
1051         }
1052
1053         return 0;
1054 }
1055
1056 #define REG_PATTERN_TEST(reg, mask, write) \
1057         do { \
1058                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1059                         return 1; \
1060         } while (0)
1061
1062 #define REG_SET_AND_CHECK(reg, mask, write) \
1063         do { \
1064                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1065                         return 1; \
1066         } while (0)
1067
1068 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1069 {
1070         struct e1000_hw *hw = &adapter->hw;
1071         struct igb_reg_test *test;
1072         u32 value, before, after;
1073         u32 i, toggle;
1074
1075         switch (adapter->hw.mac.type) {
1076         case e1000_i350:
1077                 test = reg_test_i350;
1078                 toggle = 0x7FEFF3FF;
1079                 break;
1080         case e1000_82580:
1081                 test = reg_test_82580;
1082                 toggle = 0x7FEFF3FF;
1083                 break;
1084         case e1000_82576:
1085                 test = reg_test_82576;
1086                 toggle = 0x7FFFF3FF;
1087                 break;
1088         default:
1089                 test = reg_test_82575;
1090                 toggle = 0x7FFFF3FF;
1091                 break;
1092         }
1093
1094         /* Because the status register is such a special case,
1095          * we handle it separately from the rest of the register
1096          * tests.  Some bits are read-only, some toggle, and some
1097          * are writable on newer MACs.
1098          */
1099         before = rd32(E1000_STATUS);
1100         value = (rd32(E1000_STATUS) & toggle);
1101         wr32(E1000_STATUS, toggle);
1102         after = rd32(E1000_STATUS) & toggle;
1103         if (value != after) {
1104                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1105                         "got: 0x%08X expected: 0x%08X\n", after, value);
1106                 *data = 1;
1107                 return 1;
1108         }
1109         /* restore previous status */
1110         wr32(E1000_STATUS, before);
1111
1112         /* Perform the remainder of the register test, looping through
1113          * the test table until we either fail or reach the null entry.
1114          */
1115         while (test->reg) {
1116                 for (i = 0; i < test->array_len; i++) {
1117                         switch (test->test_type) {
1118                         case PATTERN_TEST:
1119                                 REG_PATTERN_TEST(test->reg +
1120                                                 (i * test->reg_offset),
1121                                                 test->mask,
1122                                                 test->write);
1123                                 break;
1124                         case SET_READ_TEST:
1125                                 REG_SET_AND_CHECK(test->reg +
1126                                                 (i * test->reg_offset),
1127                                                 test->mask,
1128                                                 test->write);
1129                                 break;
1130                         case WRITE_NO_TEST:
1131                                 writel(test->write,
1132                                     (adapter->hw.hw_addr + test->reg)
1133                                         + (i * test->reg_offset));
1134                                 break;
1135                         case TABLE32_TEST:
1136                                 REG_PATTERN_TEST(test->reg + (i * 4),
1137                                                 test->mask,
1138                                                 test->write);
1139                                 break;
1140                         case TABLE64_TEST_LO:
1141                                 REG_PATTERN_TEST(test->reg + (i * 8),
1142                                                 test->mask,
1143                                                 test->write);
1144                                 break;
1145                         case TABLE64_TEST_HI:
1146                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1147                                                 test->mask,
1148                                                 test->write);
1149                                 break;
1150                         }
1151                 }
1152                 test++;
1153         }
1154
1155         *data = 0;
1156         return 0;
1157 }
1158
1159 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1160 {
1161         u16 temp;
1162         u16 checksum = 0;
1163         u16 i;
1164
1165         *data = 0;
1166         /* Read and add up the contents of the EEPROM */
1167         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1168                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp)) < 0) {
1169                         *data = 1;
1170                         break;
1171                 }
1172                 checksum += temp;
1173         }
1174
1175         /* If Checksum is not Correct return error else test passed */
1176         if ((checksum != (u16) NVM_SUM) && !(*data))
1177                 *data = 2;
1178
1179         return *data;
1180 }
1181
1182 static irqreturn_t igb_test_intr(int irq, void *data)
1183 {
1184         struct igb_adapter *adapter = (struct igb_adapter *) data;
1185         struct e1000_hw *hw = &adapter->hw;
1186
1187         adapter->test_icr |= rd32(E1000_ICR);
1188
1189         return IRQ_HANDLED;
1190 }
1191
1192 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1193 {
1194         struct e1000_hw *hw = &adapter->hw;
1195         struct net_device *netdev = adapter->netdev;
1196         u32 mask, ics_mask, i = 0, shared_int = true;
1197         u32 irq = adapter->pdev->irq;
1198
1199         *data = 0;
1200
1201         /* Hook up test interrupt handler just for this test */
1202         if (adapter->msix_entries) {
1203                 if (request_irq(adapter->msix_entries[0].vector,
1204                                 igb_test_intr, 0, netdev->name, adapter)) {
1205                         *data = 1;
1206                         return -1;
1207                 }
1208         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1209                 shared_int = false;
1210                 if (request_irq(irq,
1211                                 igb_test_intr, 0, netdev->name, adapter)) {
1212                         *data = 1;
1213                         return -1;
1214                 }
1215         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1216                                 netdev->name, adapter)) {
1217                 shared_int = false;
1218         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1219                  netdev->name, adapter)) {
1220                 *data = 1;
1221                 return -1;
1222         }
1223         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1224                 (shared_int ? "shared" : "unshared"));
1225
1226         /* Disable all the interrupts */
1227         wr32(E1000_IMC, ~0);
1228         wrfl();
1229         msleep(10);
1230
1231         /* Define all writable bits for ICS */
1232         switch (hw->mac.type) {
1233         case e1000_82575:
1234                 ics_mask = 0x37F47EDD;
1235                 break;
1236         case e1000_82576:
1237                 ics_mask = 0x77D4FBFD;
1238                 break;
1239         case e1000_82580:
1240                 ics_mask = 0x77DCFED5;
1241                 break;
1242         case e1000_i350:
1243                 ics_mask = 0x77DCFED5;
1244                 break;
1245         default:
1246                 ics_mask = 0x7FFFFFFF;
1247                 break;
1248         }
1249
1250         /* Test each interrupt */
1251         for (; i < 31; i++) {
1252                 /* Interrupt to test */
1253                 mask = 1 << i;
1254
1255                 if (!(mask & ics_mask))
1256                         continue;
1257
1258                 if (!shared_int) {
1259                         /* Disable the interrupt to be reported in
1260                          * the cause register and then force the same
1261                          * interrupt and see if one gets posted.  If
1262                          * an interrupt was posted to the bus, the
1263                          * test failed.
1264                          */
1265                         adapter->test_icr = 0;
1266
1267                         /* Flush any pending interrupts */
1268                         wr32(E1000_ICR, ~0);
1269
1270                         wr32(E1000_IMC, mask);
1271                         wr32(E1000_ICS, mask);
1272                         wrfl();
1273                         msleep(10);
1274
1275                         if (adapter->test_icr & mask) {
1276                                 *data = 3;
1277                                 break;
1278                         }
1279                 }
1280
1281                 /* Enable the interrupt to be reported in
1282                  * the cause register and then force the same
1283                  * interrupt and see if one gets posted.  If
1284                  * an interrupt was not posted to the bus, the
1285                  * test failed.
1286                  */
1287                 adapter->test_icr = 0;
1288
1289                 /* Flush any pending interrupts */
1290                 wr32(E1000_ICR, ~0);
1291
1292                 wr32(E1000_IMS, mask);
1293                 wr32(E1000_ICS, mask);
1294                 wrfl();
1295                 msleep(10);
1296
1297                 if (!(adapter->test_icr & mask)) {
1298                         *data = 4;
1299                         break;
1300                 }
1301
1302                 if (!shared_int) {
1303                         /* Disable the other interrupts to be reported in
1304                          * the cause register and then force the other
1305                          * interrupts and see if any get posted.  If
1306                          * an interrupt was posted to the bus, the
1307                          * test failed.
1308                          */
1309                         adapter->test_icr = 0;
1310
1311                         /* Flush any pending interrupts */
1312                         wr32(E1000_ICR, ~0);
1313
1314                         wr32(E1000_IMC, ~mask);
1315                         wr32(E1000_ICS, ~mask);
1316                         wrfl();
1317                         msleep(10);
1318
1319                         if (adapter->test_icr & mask) {
1320                                 *data = 5;
1321                                 break;
1322                         }
1323                 }
1324         }
1325
1326         /* Disable all the interrupts */
1327         wr32(E1000_IMC, ~0);
1328         wrfl();
1329         msleep(10);
1330
1331         /* Unhook test interrupt handler */
1332         if (adapter->msix_entries)
1333                 free_irq(adapter->msix_entries[0].vector, adapter);
1334         else
1335                 free_irq(irq, adapter);
1336
1337         return *data;
1338 }
1339
1340 static void igb_free_desc_rings(struct igb_adapter *adapter)
1341 {
1342         igb_free_tx_resources(&adapter->test_tx_ring);
1343         igb_free_rx_resources(&adapter->test_rx_ring);
1344 }
1345
1346 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1347 {
1348         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1349         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1350         struct e1000_hw *hw = &adapter->hw;
1351         int ret_val;
1352
1353         /* Setup Tx descriptor ring and Tx buffers */
1354         tx_ring->count = IGB_DEFAULT_TXD;
1355         tx_ring->dev = &adapter->pdev->dev;
1356         tx_ring->netdev = adapter->netdev;
1357         tx_ring->reg_idx = adapter->vfs_allocated_count;
1358
1359         if (igb_setup_tx_resources(tx_ring)) {
1360                 ret_val = 1;
1361                 goto err_nomem;
1362         }
1363
1364         igb_setup_tctl(adapter);
1365         igb_configure_tx_ring(adapter, tx_ring);
1366
1367         /* Setup Rx descriptor ring and Rx buffers */
1368         rx_ring->count = IGB_DEFAULT_RXD;
1369         rx_ring->dev = &adapter->pdev->dev;
1370         rx_ring->netdev = adapter->netdev;
1371         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1372         rx_ring->reg_idx = adapter->vfs_allocated_count;
1373
1374         if (igb_setup_rx_resources(rx_ring)) {
1375                 ret_val = 3;
1376                 goto err_nomem;
1377         }
1378
1379         /* set the default queue to queue 0 of PF */
1380         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1381
1382         /* enable receive ring */
1383         igb_setup_rctl(adapter);
1384         igb_configure_rx_ring(adapter, rx_ring);
1385
1386         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1387
1388         return 0;
1389
1390 err_nomem:
1391         igb_free_desc_rings(adapter);
1392         return ret_val;
1393 }
1394
1395 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1396 {
1397         struct e1000_hw *hw = &adapter->hw;
1398
1399         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1400         igb_write_phy_reg(hw, 29, 0x001F);
1401         igb_write_phy_reg(hw, 30, 0x8FFC);
1402         igb_write_phy_reg(hw, 29, 0x001A);
1403         igb_write_phy_reg(hw, 30, 0x8FF0);
1404 }
1405
1406 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1407 {
1408         struct e1000_hw *hw = &adapter->hw;
1409         u32 ctrl_reg = 0;
1410
1411         hw->mac.autoneg = false;
1412
1413         if (hw->phy.type == e1000_phy_m88) {
1414                 /* Auto-MDI/MDIX Off */
1415                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1416                 /* reset to update Auto-MDI/MDIX */
1417                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1418                 /* autoneg off */
1419                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1420         } else if (hw->phy.type == e1000_phy_82580) {
1421                 /* enable MII loopback */
1422                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1423         }
1424
1425         ctrl_reg = rd32(E1000_CTRL);
1426
1427         /* force 1000, set loopback */
1428         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1429
1430         /* Now set up the MAC to the same speed/duplex as the PHY. */
1431         ctrl_reg = rd32(E1000_CTRL);
1432         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1433         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1434                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1435                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1436                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1437                      E1000_CTRL_SLU);    /* Set link up enable bit */
1438
1439         if (hw->phy.type == e1000_phy_m88)
1440                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1441
1442         wr32(E1000_CTRL, ctrl_reg);
1443
1444         /* Disable the receiver on the PHY so when a cable is plugged in, the
1445          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1446          */
1447         if (hw->phy.type == e1000_phy_m88)
1448                 igb_phy_disable_receiver(adapter);
1449
1450         udelay(500);
1451
1452         return 0;
1453 }
1454
1455 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1456 {
1457         return igb_integrated_phy_loopback(adapter);
1458 }
1459
1460 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1461 {
1462         struct e1000_hw *hw = &adapter->hw;
1463         u32 reg;
1464
1465         reg = rd32(E1000_CTRL_EXT);
1466
1467         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1468         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1469                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1470                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1471                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1472                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1473
1474                         /* Enable DH89xxCC MPHY for near end loopback */
1475                         reg = rd32(E1000_MPHY_ADDR_CTL);
1476                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1477                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1478                         wr32(E1000_MPHY_ADDR_CTL, reg);
1479
1480                         reg = rd32(E1000_MPHY_DATA);
1481                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1482                         wr32(E1000_MPHY_DATA, reg);
1483                 }
1484
1485                 reg = rd32(E1000_RCTL);
1486                 reg |= E1000_RCTL_LBM_TCVR;
1487                 wr32(E1000_RCTL, reg);
1488
1489                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1490
1491                 reg = rd32(E1000_CTRL);
1492                 reg &= ~(E1000_CTRL_RFCE |
1493                          E1000_CTRL_TFCE |
1494                          E1000_CTRL_LRST);
1495                 reg |= E1000_CTRL_SLU |
1496                        E1000_CTRL_FD;
1497                 wr32(E1000_CTRL, reg);
1498
1499                 /* Unset switch control to serdes energy detect */
1500                 reg = rd32(E1000_CONNSW);
1501                 reg &= ~E1000_CONNSW_ENRGSRC;
1502                 wr32(E1000_CONNSW, reg);
1503
1504                 /* Set PCS register for forced speed */
1505                 reg = rd32(E1000_PCS_LCTL);
1506                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1507                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1508                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1509                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1510                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1511                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1512                 wr32(E1000_PCS_LCTL, reg);
1513
1514                 return 0;
1515         }
1516
1517         return igb_set_phy_loopback(adapter);
1518 }
1519
1520 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1521 {
1522         struct e1000_hw *hw = &adapter->hw;
1523         u32 rctl;
1524         u16 phy_reg;
1525
1526         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1527         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1528         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1529         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
1530                 u32 reg;
1531
1532                 /* Disable near end loopback on DH89xxCC */
1533                 reg = rd32(E1000_MPHY_ADDR_CTL);
1534                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1535                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1536                 wr32(E1000_MPHY_ADDR_CTL, reg);
1537
1538                 reg = rd32(E1000_MPHY_DATA);
1539                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1540                 wr32(E1000_MPHY_DATA, reg);
1541         }
1542
1543         rctl = rd32(E1000_RCTL);
1544         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1545         wr32(E1000_RCTL, rctl);
1546
1547         hw->mac.autoneg = true;
1548         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1549         if (phy_reg & MII_CR_LOOPBACK) {
1550                 phy_reg &= ~MII_CR_LOOPBACK;
1551                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1552                 igb_phy_sw_reset(hw);
1553         }
1554 }
1555
1556 static void igb_create_lbtest_frame(struct sk_buff *skb,
1557                                     unsigned int frame_size)
1558 {
1559         memset(skb->data, 0xFF, frame_size);
1560         frame_size /= 2;
1561         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1562         memset(&skb->data[frame_size + 10], 0xBE, 1);
1563         memset(&skb->data[frame_size + 12], 0xAF, 1);
1564 }
1565
1566 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1567 {
1568         frame_size /= 2;
1569         if (*(skb->data + 3) == 0xFF) {
1570                 if ((*(skb->data + frame_size + 10) == 0xBE) &&
1571                    (*(skb->data + frame_size + 12) == 0xAF)) {
1572                         return 0;
1573                 }
1574         }
1575         return 13;
1576 }
1577
1578 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1579                                 struct igb_ring *tx_ring,
1580                                 unsigned int size)
1581 {
1582         union e1000_adv_rx_desc *rx_desc;
1583         struct igb_buffer *buffer_info;
1584         int rx_ntc, tx_ntc, count = 0;
1585         u32 staterr;
1586
1587         /* initialize next to clean and descriptor values */
1588         rx_ntc = rx_ring->next_to_clean;
1589         tx_ntc = tx_ring->next_to_clean;
1590         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1591         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1592
1593         while (staterr & E1000_RXD_STAT_DD) {
1594                 /* check rx buffer */
1595                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1596
1597                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1598                 dma_unmap_single(rx_ring->dev,
1599                                  buffer_info->dma,
1600                                  rx_ring->rx_buffer_len,
1601                                  DMA_FROM_DEVICE);
1602                 buffer_info->dma = 0;
1603
1604                 /* verify contents of skb */
1605                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1606                         count++;
1607
1608                 /* unmap buffer on tx side */
1609                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1610                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1611
1612                 /* increment rx/tx next to clean counters */
1613                 rx_ntc++;
1614                 if (rx_ntc == rx_ring->count)
1615                         rx_ntc = 0;
1616                 tx_ntc++;
1617                 if (tx_ntc == tx_ring->count)
1618                         tx_ntc = 0;
1619
1620                 /* fetch next descriptor */
1621                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1622                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1623         }
1624
1625         /* re-map buffers to ring, store next to clean values */
1626         igb_alloc_rx_buffers_adv(rx_ring, count);
1627         rx_ring->next_to_clean = rx_ntc;
1628         tx_ring->next_to_clean = tx_ntc;
1629
1630         return count;
1631 }
1632
1633 static int igb_run_loopback_test(struct igb_adapter *adapter)
1634 {
1635         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1636         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1637         int i, j, lc, good_cnt, ret_val = 0;
1638         unsigned int size = 1024;
1639         netdev_tx_t tx_ret_val;
1640         struct sk_buff *skb;
1641
1642         /* allocate test skb */
1643         skb = alloc_skb(size, GFP_KERNEL);
1644         if (!skb)
1645                 return 11;
1646
1647         /* place data into test skb */
1648         igb_create_lbtest_frame(skb, size);
1649         skb_put(skb, size);
1650
1651         /*
1652          * Calculate the loop count based on the largest descriptor ring
1653          * The idea is to wrap the largest ring a number of times using 64
1654          * send/receive pairs during each loop
1655          */
1656
1657         if (rx_ring->count <= tx_ring->count)
1658                 lc = ((tx_ring->count / 64) * 2) + 1;
1659         else
1660                 lc = ((rx_ring->count / 64) * 2) + 1;
1661
1662         for (j = 0; j <= lc; j++) { /* loop count loop */
1663                 /* reset count of good packets */
1664                 good_cnt = 0;
1665
1666                 /* place 64 packets on the transmit queue*/
1667                 for (i = 0; i < 64; i++) {
1668                         skb_get(skb);
1669                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1670                         if (tx_ret_val == NETDEV_TX_OK)
1671                                 good_cnt++;
1672                 }
1673
1674                 if (good_cnt != 64) {
1675                         ret_val = 12;
1676                         break;
1677                 }
1678
1679                 /* allow 200 milliseconds for packets to go from tx to rx */
1680                 msleep(200);
1681
1682                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1683                 if (good_cnt != 64) {
1684                         ret_val = 13;
1685                         break;
1686                 }
1687         } /* end loop count loop */
1688
1689         /* free the original skb */
1690         kfree_skb(skb);
1691
1692         return ret_val;
1693 }
1694
1695 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1696 {
1697         /* PHY loopback cannot be performed if SoL/IDER
1698          * sessions are active */
1699         if (igb_check_reset_block(&adapter->hw)) {
1700                 dev_err(&adapter->pdev->dev,
1701                         "Cannot do PHY loopback test "
1702                         "when SoL/IDER is active.\n");
1703                 *data = 0;
1704                 goto out;
1705         }
1706         *data = igb_setup_desc_rings(adapter);
1707         if (*data)
1708                 goto out;
1709         *data = igb_setup_loopback_test(adapter);
1710         if (*data)
1711                 goto err_loopback;
1712         *data = igb_run_loopback_test(adapter);
1713         igb_loopback_cleanup(adapter);
1714
1715 err_loopback:
1716         igb_free_desc_rings(adapter);
1717 out:
1718         return *data;
1719 }
1720
1721 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1722 {
1723         struct e1000_hw *hw = &adapter->hw;
1724         *data = 0;
1725         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1726                 int i = 0;
1727                 hw->mac.serdes_has_link = false;
1728
1729                 /* On some blade server designs, link establishment
1730                  * could take as long as 2-3 minutes */
1731                 do {
1732                         hw->mac.ops.check_for_link(&adapter->hw);
1733                         if (hw->mac.serdes_has_link)
1734                                 return *data;
1735                         msleep(20);
1736                 } while (i++ < 3750);
1737
1738                 *data = 1;
1739         } else {
1740                 hw->mac.ops.check_for_link(&adapter->hw);
1741                 if (hw->mac.autoneg)
1742                         msleep(4000);
1743
1744                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1745                         *data = 1;
1746         }
1747         return *data;
1748 }
1749
1750 static void igb_diag_test(struct net_device *netdev,
1751                           struct ethtool_test *eth_test, u64 *data)
1752 {
1753         struct igb_adapter *adapter = netdev_priv(netdev);
1754         u16 autoneg_advertised;
1755         u8 forced_speed_duplex, autoneg;
1756         bool if_running = netif_running(netdev);
1757
1758         set_bit(__IGB_TESTING, &adapter->state);
1759         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1760                 /* Offline tests */
1761
1762                 /* save speed, duplex, autoneg settings */
1763                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1764                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1765                 autoneg = adapter->hw.mac.autoneg;
1766
1767                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1768
1769                 /* power up link for link test */
1770                 igb_power_up_link(adapter);
1771
1772                 /* Link test performed before hardware reset so autoneg doesn't
1773                  * interfere with test result */
1774                 if (igb_link_test(adapter, &data[4]))
1775                         eth_test->flags |= ETH_TEST_FL_FAILED;
1776
1777                 if (if_running)
1778                         /* indicate we're in test mode */
1779                         dev_close(netdev);
1780                 else
1781                         igb_reset(adapter);
1782
1783                 if (igb_reg_test(adapter, &data[0]))
1784                         eth_test->flags |= ETH_TEST_FL_FAILED;
1785
1786                 igb_reset(adapter);
1787                 if (igb_eeprom_test(adapter, &data[1]))
1788                         eth_test->flags |= ETH_TEST_FL_FAILED;
1789
1790                 igb_reset(adapter);
1791                 if (igb_intr_test(adapter, &data[2]))
1792                         eth_test->flags |= ETH_TEST_FL_FAILED;
1793
1794                 igb_reset(adapter);
1795                 /* power up link for loopback test */
1796                 igb_power_up_link(adapter);
1797                 if (igb_loopback_test(adapter, &data[3]))
1798                         eth_test->flags |= ETH_TEST_FL_FAILED;
1799
1800                 /* restore speed, duplex, autoneg settings */
1801                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1802                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1803                 adapter->hw.mac.autoneg = autoneg;
1804
1805                 /* force this routine to wait until autoneg complete/timeout */
1806                 adapter->hw.phy.autoneg_wait_to_complete = true;
1807                 igb_reset(adapter);
1808                 adapter->hw.phy.autoneg_wait_to_complete = false;
1809
1810                 clear_bit(__IGB_TESTING, &adapter->state);
1811                 if (if_running)
1812                         dev_open(netdev);
1813         } else {
1814                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1815
1816                 /* PHY is powered down when interface is down */
1817                 if (if_running && igb_link_test(adapter, &data[4]))
1818                         eth_test->flags |= ETH_TEST_FL_FAILED;
1819                 else
1820                         data[4] = 0;
1821
1822                 /* Online tests aren't run; pass by default */
1823                 data[0] = 0;
1824                 data[1] = 0;
1825                 data[2] = 0;
1826                 data[3] = 0;
1827
1828                 clear_bit(__IGB_TESTING, &adapter->state);
1829         }
1830         msleep_interruptible(4 * 1000);
1831 }
1832
1833 static int igb_wol_exclusion(struct igb_adapter *adapter,
1834                              struct ethtool_wolinfo *wol)
1835 {
1836         struct e1000_hw *hw = &adapter->hw;
1837         int retval = 1; /* fail by default */
1838
1839         switch (hw->device_id) {
1840         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1841                 /* WoL not supported */
1842                 wol->supported = 0;
1843                 break;
1844         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1845         case E1000_DEV_ID_82576_FIBER:
1846         case E1000_DEV_ID_82576_SERDES:
1847                 /* Wake events not supported on port B */
1848                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1849                         wol->supported = 0;
1850                         break;
1851                 }
1852                 /* return success for non excluded adapter ports */
1853                 retval = 0;
1854                 break;
1855         case E1000_DEV_ID_82576_QUAD_COPPER:
1856         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
1857                 /* quad port adapters only support WoL on port A */
1858                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1859                         wol->supported = 0;
1860                         break;
1861                 }
1862                 /* return success for non excluded adapter ports */
1863                 retval = 0;
1864                 break;
1865         default:
1866                 /* dual port cards only support WoL on port A from now on
1867                  * unless it was enabled in the eeprom for port B
1868                  * so exclude FUNC_1 ports from having WoL enabled */
1869                 if ((rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) &&
1870                     !adapter->eeprom_wol) {
1871                         wol->supported = 0;
1872                         break;
1873                 }
1874
1875                 retval = 0;
1876         }
1877
1878         return retval;
1879 }
1880
1881 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1882 {
1883         struct igb_adapter *adapter = netdev_priv(netdev);
1884
1885         wol->supported = WAKE_UCAST | WAKE_MCAST |
1886                          WAKE_BCAST | WAKE_MAGIC |
1887                          WAKE_PHY;
1888         wol->wolopts = 0;
1889
1890         /* this function will set ->supported = 0 and return 1 if wol is not
1891          * supported by this hardware */
1892         if (igb_wol_exclusion(adapter, wol) ||
1893             !device_can_wakeup(&adapter->pdev->dev))
1894                 return;
1895
1896         /* apply any specific unsupported masks here */
1897         switch (adapter->hw.device_id) {
1898         default:
1899                 break;
1900         }
1901
1902         if (adapter->wol & E1000_WUFC_EX)
1903                 wol->wolopts |= WAKE_UCAST;
1904         if (adapter->wol & E1000_WUFC_MC)
1905                 wol->wolopts |= WAKE_MCAST;
1906         if (adapter->wol & E1000_WUFC_BC)
1907                 wol->wolopts |= WAKE_BCAST;
1908         if (adapter->wol & E1000_WUFC_MAG)
1909                 wol->wolopts |= WAKE_MAGIC;
1910         if (adapter->wol & E1000_WUFC_LNKC)
1911                 wol->wolopts |= WAKE_PHY;
1912 }
1913
1914 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1915 {
1916         struct igb_adapter *adapter = netdev_priv(netdev);
1917
1918         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1919                 return -EOPNOTSUPP;
1920
1921         if (igb_wol_exclusion(adapter, wol) ||
1922             !device_can_wakeup(&adapter->pdev->dev))
1923                 return wol->wolopts ? -EOPNOTSUPP : 0;
1924
1925         /* these settings will always override what we currently have */
1926         adapter->wol = 0;
1927
1928         if (wol->wolopts & WAKE_UCAST)
1929                 adapter->wol |= E1000_WUFC_EX;
1930         if (wol->wolopts & WAKE_MCAST)
1931                 adapter->wol |= E1000_WUFC_MC;
1932         if (wol->wolopts & WAKE_BCAST)
1933                 adapter->wol |= E1000_WUFC_BC;
1934         if (wol->wolopts & WAKE_MAGIC)
1935                 adapter->wol |= E1000_WUFC_MAG;
1936         if (wol->wolopts & WAKE_PHY)
1937                 adapter->wol |= E1000_WUFC_LNKC;
1938         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1939
1940         return 0;
1941 }
1942
1943 /* bit defines for adapter->led_status */
1944 #define IGB_LED_ON              0
1945
1946 static int igb_set_phys_id(struct net_device *netdev,
1947                            enum ethtool_phys_id_state state)
1948 {
1949         struct igb_adapter *adapter = netdev_priv(netdev);
1950         struct e1000_hw *hw = &adapter->hw;
1951
1952         switch (state) {
1953         case ETHTOOL_ID_ACTIVE:
1954                 igb_blink_led(hw);
1955                 return 2;
1956         case ETHTOOL_ID_ON:
1957                 igb_blink_led(hw);
1958                 break;
1959         case ETHTOOL_ID_OFF:
1960                 igb_led_off(hw);
1961                 break;
1962         case ETHTOOL_ID_INACTIVE:
1963                 igb_led_off(hw);
1964                 clear_bit(IGB_LED_ON, &adapter->led_status);
1965                 igb_cleanup_led(hw);
1966                 break;
1967         }
1968
1969         return 0;
1970 }
1971
1972 static int igb_set_coalesce(struct net_device *netdev,
1973                             struct ethtool_coalesce *ec)
1974 {
1975         struct igb_adapter *adapter = netdev_priv(netdev);
1976         int i;
1977
1978         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1979             ((ec->rx_coalesce_usecs > 3) &&
1980              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1981             (ec->rx_coalesce_usecs == 2))
1982                 return -EINVAL;
1983
1984         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1985             ((ec->tx_coalesce_usecs > 3) &&
1986              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1987             (ec->tx_coalesce_usecs == 2))
1988                 return -EINVAL;
1989
1990         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1991                 return -EINVAL;
1992
1993         /* If ITR is disabled, disable DMAC */
1994         if (ec->rx_coalesce_usecs == 0) {
1995                 if (adapter->flags & IGB_FLAG_DMAC)
1996                         adapter->flags &= ~IGB_FLAG_DMAC;
1997         }
1998
1999         /* convert to rate of irq's per second */
2000         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2001                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2002         else
2003                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2004
2005         /* convert to rate of irq's per second */
2006         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2007                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2008         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2009                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2010         else
2011                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2012
2013         for (i = 0; i < adapter->num_q_vectors; i++) {
2014                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2015                 if (q_vector->rx_ring)
2016                         q_vector->itr_val = adapter->rx_itr_setting;
2017                 else
2018                         q_vector->itr_val = adapter->tx_itr_setting;
2019                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2020                         q_vector->itr_val = IGB_START_ITR;
2021                 q_vector->set_itr = 1;
2022         }
2023
2024         return 0;
2025 }
2026
2027 static int igb_get_coalesce(struct net_device *netdev,
2028                             struct ethtool_coalesce *ec)
2029 {
2030         struct igb_adapter *adapter = netdev_priv(netdev);
2031
2032         if (adapter->rx_itr_setting <= 3)
2033                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2034         else
2035                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2036
2037         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2038                 if (adapter->tx_itr_setting <= 3)
2039                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2040                 else
2041                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2042         }
2043
2044         return 0;
2045 }
2046
2047 static int igb_nway_reset(struct net_device *netdev)
2048 {
2049         struct igb_adapter *adapter = netdev_priv(netdev);
2050         if (netif_running(netdev))
2051                 igb_reinit_locked(adapter);
2052         return 0;
2053 }
2054
2055 static int igb_get_sset_count(struct net_device *netdev, int sset)
2056 {
2057         switch (sset) {
2058         case ETH_SS_STATS:
2059                 return IGB_STATS_LEN;
2060         case ETH_SS_TEST:
2061                 return IGB_TEST_LEN;
2062         default:
2063                 return -ENOTSUPP;
2064         }
2065 }
2066
2067 static void igb_get_ethtool_stats(struct net_device *netdev,
2068                                   struct ethtool_stats *stats, u64 *data)
2069 {
2070         struct igb_adapter *adapter = netdev_priv(netdev);
2071         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2072         unsigned int start;
2073         struct igb_ring *ring;
2074         int i, j;
2075         char *p;
2076
2077         spin_lock(&adapter->stats64_lock);
2078         igb_update_stats(adapter, net_stats);
2079
2080         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2081                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2082                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2083                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2084         }
2085         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2086                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2087                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2088                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2089         }
2090         for (j = 0; j < adapter->num_tx_queues; j++) {
2091                 u64     restart2;
2092
2093                 ring = adapter->tx_ring[j];
2094                 do {
2095                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
2096                         data[i]   = ring->tx_stats.packets;
2097                         data[i+1] = ring->tx_stats.bytes;
2098                         data[i+2] = ring->tx_stats.restart_queue;
2099                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
2100                 do {
2101                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp2);
2102                         restart2  = ring->tx_stats.restart_queue2;
2103                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start));
2104                 data[i+2] += restart2;
2105
2106                 i += IGB_TX_QUEUE_STATS_LEN;
2107         }
2108         for (j = 0; j < adapter->num_rx_queues; j++) {
2109                 ring = adapter->rx_ring[j];
2110                 do {
2111                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
2112                         data[i]   = ring->rx_stats.packets;
2113                         data[i+1] = ring->rx_stats.bytes;
2114                         data[i+2] = ring->rx_stats.drops;
2115                         data[i+3] = ring->rx_stats.csum_err;
2116                         data[i+4] = ring->rx_stats.alloc_failed;
2117                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
2118                 i += IGB_RX_QUEUE_STATS_LEN;
2119         }
2120         spin_unlock(&adapter->stats64_lock);
2121 }
2122
2123 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2124 {
2125         struct igb_adapter *adapter = netdev_priv(netdev);
2126         u8 *p = data;
2127         int i;
2128
2129         switch (stringset) {
2130         case ETH_SS_TEST:
2131                 memcpy(data, *igb_gstrings_test,
2132                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2133                 break;
2134         case ETH_SS_STATS:
2135                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2136                         memcpy(p, igb_gstrings_stats[i].stat_string,
2137                                ETH_GSTRING_LEN);
2138                         p += ETH_GSTRING_LEN;
2139                 }
2140                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2141                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2142                                ETH_GSTRING_LEN);
2143                         p += ETH_GSTRING_LEN;
2144                 }
2145                 for (i = 0; i < adapter->num_tx_queues; i++) {
2146                         sprintf(p, "tx_queue_%u_packets", i);
2147                         p += ETH_GSTRING_LEN;
2148                         sprintf(p, "tx_queue_%u_bytes", i);
2149                         p += ETH_GSTRING_LEN;
2150                         sprintf(p, "tx_queue_%u_restart", i);
2151                         p += ETH_GSTRING_LEN;
2152                 }
2153                 for (i = 0; i < adapter->num_rx_queues; i++) {
2154                         sprintf(p, "rx_queue_%u_packets", i);
2155                         p += ETH_GSTRING_LEN;
2156                         sprintf(p, "rx_queue_%u_bytes", i);
2157                         p += ETH_GSTRING_LEN;
2158                         sprintf(p, "rx_queue_%u_drops", i);
2159                         p += ETH_GSTRING_LEN;
2160                         sprintf(p, "rx_queue_%u_csum_err", i);
2161                         p += ETH_GSTRING_LEN;
2162                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2163                         p += ETH_GSTRING_LEN;
2164                 }
2165 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2166                 break;
2167         }
2168 }
2169
2170 static const struct ethtool_ops igb_ethtool_ops = {
2171         .get_settings           = igb_get_settings,
2172         .set_settings           = igb_set_settings,
2173         .get_drvinfo            = igb_get_drvinfo,
2174         .get_regs_len           = igb_get_regs_len,
2175         .get_regs               = igb_get_regs,
2176         .get_wol                = igb_get_wol,
2177         .set_wol                = igb_set_wol,
2178         .get_msglevel           = igb_get_msglevel,
2179         .set_msglevel           = igb_set_msglevel,
2180         .nway_reset             = igb_nway_reset,
2181         .get_link               = igb_get_link,
2182         .get_eeprom_len         = igb_get_eeprom_len,
2183         .get_eeprom             = igb_get_eeprom,
2184         .set_eeprom             = igb_set_eeprom,
2185         .get_ringparam          = igb_get_ringparam,
2186         .set_ringparam          = igb_set_ringparam,
2187         .get_pauseparam         = igb_get_pauseparam,
2188         .set_pauseparam         = igb_set_pauseparam,
2189         .self_test              = igb_diag_test,
2190         .get_strings            = igb_get_strings,
2191         .set_phys_id            = igb_set_phys_id,
2192         .get_sset_count         = igb_get_sset_count,
2193         .get_ethtool_stats      = igb_get_ethtool_stats,
2194         .get_coalesce           = igb_get_coalesce,
2195         .set_coalesce           = igb_set_coalesce,
2196 };
2197
2198 void igb_set_ethtool_ops(struct net_device *netdev)
2199 {
2200         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2201 }