2 * Texas Instruments 3-Port Ethernet Switch Address Lookup Engine
4 * Copyright (C) 2012 Texas Instruments
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/seq_file.h>
18 #include <linux/slab.h>
19 #include <linux/err.h>
21 #include <linux/stat.h>
22 #include <linux/sysfs.h>
23 #include <linux/etherdevice.h>
27 #define BITMASK(bits) (BIT(bits) - 1)
28 #define ALE_ENTRY_BITS 68
29 #define ALE_ENTRY_WORDS DIV_ROUND_UP(ALE_ENTRY_BITS, 32)
31 #define ALE_VERSION_MAJOR(rev) ((rev >> 8) & 0xff)
32 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
35 #define ALE_IDVER 0x00
36 #define ALE_CONTROL 0x08
37 #define ALE_PRESCALE 0x10
38 #define ALE_UNKNOWNVLAN 0x18
39 #define ALE_TABLE_CONTROL 0x20
40 #define ALE_TABLE 0x34
41 #define ALE_PORTCTL 0x40
43 #define ALE_TABLE_WRITE BIT(31)
45 #define ALE_TYPE_FREE 0
46 #define ALE_TYPE_ADDR 1
47 #define ALE_TYPE_VLAN 2
48 #define ALE_TYPE_VLAN_ADDR 3
50 #define ALE_UCAST_PERSISTANT 0
51 #define ALE_UCAST_UNTOUCHED 1
52 #define ALE_UCAST_OUI 2
53 #define ALE_UCAST_TOUCHED 3
55 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
61 idx = 2 - idx; /* flip */
62 return (ale_entry[idx] >> start) & BITMASK(bits);
65 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
70 value &= BITMASK(bits);
73 idx = 2 - idx; /* flip */
74 ale_entry[idx] &= ~(BITMASK(bits) << start);
75 ale_entry[idx] |= (value << start);
78 #define DEFINE_ALE_FIELD(name, start, bits) \
79 static inline int cpsw_ale_get_##name(u32 *ale_entry) \
81 return cpsw_ale_get_field(ale_entry, start, bits); \
83 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value) \
85 cpsw_ale_set_field(ale_entry, start, bits, value); \
88 DEFINE_ALE_FIELD(entry_type, 60, 2)
89 DEFINE_ALE_FIELD(vlan_id, 48, 12)
90 DEFINE_ALE_FIELD(mcast_state, 62, 2)
91 DEFINE_ALE_FIELD(port_mask, 66, 3)
92 DEFINE_ALE_FIELD(super, 65, 1)
93 DEFINE_ALE_FIELD(ucast_type, 62, 2)
94 DEFINE_ALE_FIELD(port_num, 66, 2)
95 DEFINE_ALE_FIELD(blocked, 65, 1)
96 DEFINE_ALE_FIELD(secure, 64, 1)
97 DEFINE_ALE_FIELD(vlan_untag_force, 24, 3)
98 DEFINE_ALE_FIELD(vlan_reg_mcast, 16, 3)
99 DEFINE_ALE_FIELD(vlan_unreg_mcast, 8, 3)
100 DEFINE_ALE_FIELD(vlan_member_list, 0, 3)
101 DEFINE_ALE_FIELD(mcast, 40, 1)
103 /* The MAC address field in the ALE entry cannot be macroized as above */
104 static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
108 for (i = 0; i < 6; i++)
109 addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8);
112 static inline void cpsw_ale_set_addr(u32 *ale_entry, u8 *addr)
116 for (i = 0; i < 6; i++)
117 cpsw_ale_set_field(ale_entry, 40 - 8*i, 8, addr[i]);
120 static int cpsw_ale_read(struct cpsw_ale *ale, int idx, u32 *ale_entry)
124 WARN_ON(idx > ale->params.ale_entries);
126 __raw_writel(idx, ale->params.ale_regs + ALE_TABLE_CONTROL);
128 for (i = 0; i < ALE_ENTRY_WORDS; i++)
129 ale_entry[i] = __raw_readl(ale->params.ale_regs +
135 static int cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry)
139 WARN_ON(idx > ale->params.ale_entries);
141 for (i = 0; i < ALE_ENTRY_WORDS; i++)
142 __raw_writel(ale_entry[i], ale->params.ale_regs +
145 __raw_writel(idx | ALE_TABLE_WRITE, ale->params.ale_regs +
151 static int cpsw_ale_match_addr(struct cpsw_ale *ale, u8 *addr)
153 u32 ale_entry[ALE_ENTRY_WORDS];
156 for (idx = 0; idx < ale->params.ale_entries; idx++) {
159 cpsw_ale_read(ale, idx, ale_entry);
160 type = cpsw_ale_get_entry_type(ale_entry);
161 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
163 cpsw_ale_get_addr(ale_entry, entry_addr);
164 if (memcmp(entry_addr, addr, 6) == 0)
170 static int cpsw_ale_match_free(struct cpsw_ale *ale)
172 u32 ale_entry[ALE_ENTRY_WORDS];
175 for (idx = 0; idx < ale->params.ale_entries; idx++) {
176 cpsw_ale_read(ale, idx, ale_entry);
177 type = cpsw_ale_get_entry_type(ale_entry);
178 if (type == ALE_TYPE_FREE)
184 static int cpsw_ale_find_ageable(struct cpsw_ale *ale)
186 u32 ale_entry[ALE_ENTRY_WORDS];
189 for (idx = 0; idx < ale->params.ale_entries; idx++) {
190 cpsw_ale_read(ale, idx, ale_entry);
191 type = cpsw_ale_get_entry_type(ale_entry);
192 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
194 if (cpsw_ale_get_mcast(ale_entry))
196 type = cpsw_ale_get_ucast_type(ale_entry);
197 if (type != ALE_UCAST_PERSISTANT &&
198 type != ALE_UCAST_OUI)
204 static void cpsw_ale_flush_mcast(struct cpsw_ale *ale, u32 *ale_entry,
209 mask = cpsw_ale_get_port_mask(ale_entry);
210 if ((mask & port_mask) == 0)
211 return; /* ports dont intersect, not interested */
214 /* free if only remaining port is host port */
216 cpsw_ale_set_port_mask(ale_entry, mask);
218 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
221 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask)
223 u32 ale_entry[ALE_ENTRY_WORDS];
226 for (idx = 0; idx < ale->params.ale_entries; idx++) {
227 cpsw_ale_read(ale, idx, ale_entry);
228 ret = cpsw_ale_get_entry_type(ale_entry);
229 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
232 if (cpsw_ale_get_mcast(ale_entry)) {
235 cpsw_ale_get_addr(ale_entry, addr);
236 if (!is_broadcast_ether_addr(addr))
237 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
240 cpsw_ale_write(ale, idx, ale_entry);
245 static void cpsw_ale_flush_ucast(struct cpsw_ale *ale, u32 *ale_entry,
250 port = cpsw_ale_get_port_num(ale_entry);
251 if ((BIT(port) & port_mask) == 0)
252 return; /* ports dont intersect, not interested */
253 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
256 int cpsw_ale_flush(struct cpsw_ale *ale, int port_mask)
258 u32 ale_entry[ALE_ENTRY_WORDS];
261 for (idx = 0; idx < ale->params.ale_entries; idx++) {
262 cpsw_ale_read(ale, idx, ale_entry);
263 ret = cpsw_ale_get_entry_type(ale_entry);
264 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
267 if (cpsw_ale_get_mcast(ale_entry))
268 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
270 cpsw_ale_flush_ucast(ale, ale_entry, port_mask);
272 cpsw_ale_write(ale, idx, ale_entry);
277 int cpsw_ale_add_ucast(struct cpsw_ale *ale, u8 *addr, int port, int flags)
279 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
282 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_ADDR);
283 cpsw_ale_set_addr(ale_entry, addr);
284 cpsw_ale_set_ucast_type(ale_entry, ALE_UCAST_PERSISTANT);
285 cpsw_ale_set_secure(ale_entry, (flags & ALE_SECURE) ? 1 : 0);
286 cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
287 cpsw_ale_set_port_num(ale_entry, port);
289 idx = cpsw_ale_match_addr(ale, addr);
291 idx = cpsw_ale_match_free(ale);
293 idx = cpsw_ale_find_ageable(ale);
297 cpsw_ale_write(ale, idx, ale_entry);
301 int cpsw_ale_del_ucast(struct cpsw_ale *ale, u8 *addr, int port)
303 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
306 idx = cpsw_ale_match_addr(ale, addr);
310 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
311 cpsw_ale_write(ale, idx, ale_entry);
315 int cpsw_ale_add_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask,
316 int super, int mcast_state)
318 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
321 idx = cpsw_ale_match_addr(ale, addr);
323 cpsw_ale_read(ale, idx, ale_entry);
325 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_ADDR);
326 cpsw_ale_set_addr(ale_entry, addr);
327 cpsw_ale_set_super(ale_entry, super);
328 cpsw_ale_set_mcast_state(ale_entry, mcast_state);
330 mask = cpsw_ale_get_port_mask(ale_entry);
332 cpsw_ale_set_port_mask(ale_entry, port_mask);
335 idx = cpsw_ale_match_free(ale);
337 idx = cpsw_ale_find_ageable(ale);
341 cpsw_ale_write(ale, idx, ale_entry);
345 int cpsw_ale_del_mcast(struct cpsw_ale *ale, u8 *addr, int port_mask)
347 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
350 idx = cpsw_ale_match_addr(ale, addr);
354 cpsw_ale_read(ale, idx, ale_entry);
357 cpsw_ale_set_port_mask(ale_entry, port_mask);
359 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
361 cpsw_ale_write(ale, idx, ale_entry);
365 struct ale_control_info {
367 int offset, port_offset;
368 int shift, port_shift;
372 static const struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
375 .offset = ALE_CONTROL,
383 .offset = ALE_CONTROL,
391 .offset = ALE_CONTROL,
397 [ALE_VLAN_NOLEARN] = {
398 .name = "vlan_nolearn",
399 .offset = ALE_CONTROL,
405 [ALE_NO_PORT_VLAN] = {
406 .name = "no_port_vlan",
407 .offset = ALE_CONTROL,
415 .offset = ALE_CONTROL,
423 .offset = ALE_CONTROL,
429 [ALE_RATE_LIMIT_TX] = {
430 .name = "rate_limit_tx",
431 .offset = ALE_CONTROL,
438 .name = "vlan_aware",
439 .offset = ALE_CONTROL,
445 [ALE_AUTH_ENABLE] = {
446 .name = "auth_enable",
447 .offset = ALE_CONTROL,
454 .name = "rate_limit",
455 .offset = ALE_CONTROL,
462 .name = "port_state",
463 .offset = ALE_PORTCTL,
469 [ALE_PORT_DROP_UNTAGGED] = {
470 .name = "drop_untagged",
471 .offset = ALE_PORTCTL,
477 [ALE_PORT_DROP_UNKNOWN_VLAN] = {
478 .name = "drop_unknown",
479 .offset = ALE_PORTCTL,
485 [ALE_PORT_NOLEARN] = {
487 .offset = ALE_PORTCTL,
493 [ALE_PORT_MCAST_LIMIT] = {
494 .name = "mcast_limit",
495 .offset = ALE_PORTCTL,
501 [ALE_PORT_BCAST_LIMIT] = {
502 .name = "bcast_limit",
503 .offset = ALE_PORTCTL,
509 [ALE_PORT_UNKNOWN_VLAN_MEMBER] = {
510 .name = "unknown_vlan_member",
511 .offset = ALE_UNKNOWNVLAN,
517 [ALE_PORT_UNKNOWN_MCAST_FLOOD] = {
518 .name = "unknown_mcast_flood",
519 .offset = ALE_UNKNOWNVLAN,
525 [ALE_PORT_UNKNOWN_REG_MCAST_FLOOD] = {
526 .name = "unknown_reg_flood",
527 .offset = ALE_UNKNOWNVLAN,
533 [ALE_PORT_UNTAGGED_EGRESS] = {
534 .name = "untagged_egress",
535 .offset = ALE_UNKNOWNVLAN,
543 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, int control,
546 const struct ale_control_info *info;
550 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
553 info = &ale_controls[control];
554 if (info->port_offset == 0 && info->port_shift == 0)
555 port = 0; /* global, port is a dont care */
557 if (port < 0 || port > ale->params.ale_ports)
560 mask = BITMASK(info->bits);
564 offset = info->offset + (port * info->port_offset);
565 shift = info->shift + (port * info->port_shift);
567 tmp = __raw_readl(ale->params.ale_regs + offset);
568 tmp = (tmp & ~(mask << shift)) | (value << shift);
569 __raw_writel(tmp, ale->params.ale_regs + offset);
574 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control)
576 const struct ale_control_info *info;
580 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
583 info = &ale_controls[control];
584 if (info->port_offset == 0 && info->port_shift == 0)
585 port = 0; /* global, port is a dont care */
587 if (port < 0 || port > ale->params.ale_ports)
590 offset = info->offset + (port * info->port_offset);
591 shift = info->shift + (port * info->port_shift);
593 tmp = __raw_readl(ale->params.ale_regs + offset) >> shift;
594 return tmp & BITMASK(info->bits);
597 static void cpsw_ale_timer(unsigned long arg)
599 struct cpsw_ale *ale = (struct cpsw_ale *)arg;
601 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
604 ale->timer.expires = jiffies + ale->ageout;
605 add_timer(&ale->timer);
609 int cpsw_ale_set_ageout(struct cpsw_ale *ale, int ageout)
611 del_timer_sync(&ale->timer);
612 ale->ageout = ageout * HZ;
614 ale->timer.expires = jiffies + ale->ageout;
615 add_timer(&ale->timer);
620 void cpsw_ale_start(struct cpsw_ale *ale)
624 rev = __raw_readl(ale->params.ale_regs + ALE_IDVER);
625 dev_dbg(ale->params.dev, "initialized cpsw ale revision %d.%d\n",
626 ALE_VERSION_MAJOR(rev), ALE_VERSION_MINOR(rev));
627 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 1);
628 cpsw_ale_control_set(ale, 0, ALE_CLEAR, 1);
630 init_timer(&ale->timer);
631 ale->timer.data = (unsigned long)ale;
632 ale->timer.function = cpsw_ale_timer;
634 ale->timer.expires = jiffies + ale->ageout;
635 add_timer(&ale->timer);
639 void cpsw_ale_stop(struct cpsw_ale *ale)
641 del_timer_sync(&ale->timer);
644 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params)
646 struct cpsw_ale *ale;
648 ale = kzalloc(sizeof(*ale), GFP_KERNEL);
652 ale->params = *params;
653 ale->ageout = ale->params.ale_ageout * HZ;
658 int cpsw_ale_destroy(struct cpsw_ale *ale)
663 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 0);