Pileus Git - ~andy/linux/blob - drivers/net/ethernet/ti/cpsw.c

   1 /*
   2  * Texas Instruments Ethernet Switch Driver
   3  *
   4  * Copyright (C) 2012 Texas Instruments
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation version 2.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/io.h>
  18 #include <linux/clk.h>
  19 #include <linux/timer.h>
  20 #include <linux/module.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/irqreturn.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/if_ether.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/netdevice.h>
  27 #include <linux/net_tstamp.h>
  28 #include <linux/phy.h>
  29 #include <linux/workqueue.h>
  30 #include <linux/delay.h>
  31 #include <linux/pm_runtime.h>
  32 #include <linux/of.h>
  33 #include <linux/of_net.h>
  34 #include <linux/of_device.h>
  35 #include <linux/if_vlan.h>
  36
  37 #include <linux/platform_data/cpsw.h>
  38
  39 #include "cpsw_ale.h"
  40 #include "cpts.h"
  41 #include "davinci_cpdma.h"
  42
  43 #define CPSW_DEBUG      (NETIF_MSG_HW           | NETIF_MSG_WOL         | \
  44                          NETIF_MSG_DRV          | NETIF_MSG_LINK        | \
  45                          NETIF_MSG_IFUP         | NETIF_MSG_INTR        | \
  46                          NETIF_MSG_PROBE        | NETIF_MSG_TIMER       | \
  47                          NETIF_MSG_IFDOWN       | NETIF_MSG_RX_ERR      | \
  48                          NETIF_MSG_TX_ERR       | NETIF_MSG_TX_DONE     | \
  49                          NETIF_MSG_PKTDATA      | NETIF_MSG_TX_QUEUED   | \
  50                          NETIF_MSG_RX_STATUS)
  51
  52 #define cpsw_info(priv, type, format, ...)              \
  53 do {                                                            \
  54         if (netif_msg_##type(priv) && net_ratelimit())          \
  55                 dev_info(priv->dev, format, ## __VA_ARGS__);    \
  56 } while (0)
  57
  58 #define cpsw_err(priv, type, format, ...)               \
  59 do {                                                            \
  60         if (netif_msg_##type(priv) && net_ratelimit())          \
  61                 dev_err(priv->dev, format, ## __VA_ARGS__);     \
  62 } while (0)
  63
  64 #define cpsw_dbg(priv, type, format, ...)               \
  65 do {                                                            \
  66         if (netif_msg_##type(priv) && net_ratelimit())          \
  67                 dev_dbg(priv->dev, format, ## __VA_ARGS__);     \
  68 } while (0)
  69
  70 #define cpsw_notice(priv, type, format, ...)            \
  71 do {                                                            \
  72         if (netif_msg_##type(priv) && net_ratelimit())          \
  73                 dev_notice(priv->dev, format, ## __VA_ARGS__);  \
  74 } while (0)
  75
  76 #define ALE_ALL_PORTS           0x7
  77
  78 #define CPSW_MAJOR_VERSION(reg)         (reg >> 8 & 0x7)
  79 #define CPSW_MINOR_VERSION(reg)         (reg & 0xff)
  80 #define CPSW_RTL_VERSION(reg)           ((reg >> 11) & 0x1f)
  81
  82 #define CPSW_VERSION_1          0x19010a
  83 #define CPSW_VERSION_2          0x19010c
  84
  85 #define HOST_PORT_NUM           0
  86 #define SLIVER_SIZE             0x40
  87
  88 #define CPSW1_HOST_PORT_OFFSET  0x028
  89 #define CPSW1_SLAVE_OFFSET      0x050
  90 #define CPSW1_SLAVE_SIZE        0x040
  91 #define CPSW1_CPDMA_OFFSET      0x100
  92 #define CPSW1_STATERAM_OFFSET   0x200
  93 #define CPSW1_CPTS_OFFSET       0x500
  94 #define CPSW1_ALE_OFFSET        0x600
  95 #define CPSW1_SLIVER_OFFSET     0x700
  96
  97 #define CPSW2_HOST_PORT_OFFSET  0x108
  98 #define CPSW2_SLAVE_OFFSET      0x200
  99 #define CPSW2_SLAVE_SIZE        0x100
 100 #define CPSW2_CPDMA_OFFSET      0x800
 101 #define CPSW2_STATERAM_OFFSET   0xa00
 102 #define CPSW2_CPTS_OFFSET       0xc00
 103 #define CPSW2_ALE_OFFSET        0xd00
 104 #define CPSW2_SLIVER_OFFSET     0xd80
 105 #define CPSW2_BD_OFFSET         0x2000
 106
 107 #define CPDMA_RXTHRESH          0x0c0
 108 #define CPDMA_RXFREE            0x0e0
 109 #define CPDMA_TXHDP             0x00
 110 #define CPDMA_RXHDP             0x20
 111 #define CPDMA_TXCP              0x40
 112 #define CPDMA_RXCP              0x60
 113
 114 #define CPSW_POLL_WEIGHT        64
 115 #define CPSW_MIN_PACKET_SIZE    60
 116 #define CPSW_MAX_PACKET_SIZE    (1500 + 14 + 4 + 4)
 117
 118 #define RX_PRIORITY_MAPPING     0x76543210
 119 #define TX_PRIORITY_MAPPING     0x33221100
 120 #define CPDMA_TX_PRIORITY_MAP   0x76543210
 121
 122 #define CPSW_VLAN_AWARE         BIT(1)
 123 #define CPSW_ALE_VLAN_AWARE     1
 124
 125 #define CPSW_FIFO_NORMAL_MODE           (0 << 15)
 126 #define CPSW_FIFO_DUAL_MAC_MODE         (1 << 15)
 127 #define CPSW_FIFO_RATE_LIMIT_MODE       (2 << 15)
 128
 129 #define CPSW_INTPACEEN          (0x3f << 16)
 130 #define CPSW_INTPRESCALE_MASK   (0x7FF << 0)
 131 #define CPSW_CMINTMAX_CNT       63
 132 #define CPSW_CMINTMIN_CNT       2
 133 #define CPSW_CMINTMAX_INTVL     (1000 / CPSW_CMINTMIN_CNT)
 134 #define CPSW_CMINTMIN_INTVL     ((1000 / CPSW_CMINTMAX_CNT) + 1)
 135
 136 #define cpsw_enable_irq(priv)   \
 137         do {                    \
 138                 u32 i;          \
 139                 for (i = 0; i < priv->num_irqs; i++) \
 140                         enable_irq(priv->irqs_table[i]); \
 141         } while (0);
 142 #define cpsw_disable_irq(priv)  \
 143         do {                    \
 144                 u32 i;          \
 145                 for (i = 0; i < priv->num_irqs; i++) \
 146                         disable_irq_nosync(priv->irqs_table[i]); \
 147         } while (0);
 148
 149 #define cpsw_slave_index(priv)                          \
 150                 ((priv->data.dual_emac) ? priv->emac_port :     \
 151                 priv->data.active_slave)
 152
 153 static int debug_level;
 154 module_param(debug_level, int, 0);
 155 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
 156
 157 static int ale_ageout = 10;
 158 module_param(ale_ageout, int, 0);
 159 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
 160
 161 static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
 162 module_param(rx_packet_max, int, 0);
 163 MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
 164
 165 struct cpsw_wr_regs {
 166         u32     id_ver;
 167         u32     soft_reset;
 168         u32     control;
 169         u32     int_control;
 170         u32     rx_thresh_en;
 171         u32     rx_en;
 172         u32     tx_en;
 173         u32     misc_en;
 174         u32     mem_allign1[8];
 175         u32     rx_thresh_stat;
 176         u32     rx_stat;
 177         u32     tx_stat;
 178         u32     misc_stat;
 179         u32     mem_allign2[8];
 180         u32     rx_imax;
 181         u32     tx_imax;
 182
 183 };
 184
 185 struct cpsw_ss_regs {
 186         u32     id_ver;
 187         u32     control;
 188         u32     soft_reset;
 189         u32     stat_port_en;
 190         u32     ptype;
 191         u32     soft_idle;
 192         u32     thru_rate;
 193         u32     gap_thresh;
 194         u32     tx_start_wds;
 195         u32     flow_control;
 196         u32     vlan_ltype;
 197         u32     ts_ltype;
 198         u32     dlr_ltype;
 199 };
 200
 201 /* CPSW_PORT_V1 */
 202 #define CPSW1_MAX_BLKS      0x00 /* Maximum FIFO Blocks */
 203 #define CPSW1_BLK_CNT       0x04 /* FIFO Block Usage Count (Read Only) */
 204 #define CPSW1_TX_IN_CTL     0x08 /* Transmit FIFO Control */
 205 #define CPSW1_PORT_VLAN     0x0c /* VLAN Register */
 206 #define CPSW1_TX_PRI_MAP    0x10 /* Tx Header Priority to Switch Pri Mapping */
 207 #define CPSW1_TS_CTL        0x14 /* Time Sync Control */
 208 #define CPSW1_TS_SEQ_LTYPE  0x18 /* Time Sync Sequence ID Offset and Msg Type */
 209 #define CPSW1_TS_VLAN       0x1c /* Time Sync VLAN1 and VLAN2 */
 210
 211 /* CPSW_PORT_V2 */
 212 #define CPSW2_CONTROL       0x00 /* Control Register */
 213 #define CPSW2_MAX_BLKS      0x08 /* Maximum FIFO Blocks */
 214 #define CPSW2_BLK_CNT       0x0c /* FIFO Block Usage Count (Read Only) */
 215 #define CPSW2_TX_IN_CTL     0x10 /* Transmit FIFO Control */
 216 #define CPSW2_PORT_VLAN     0x14 /* VLAN Register */
 217 #define CPSW2_TX_PRI_MAP    0x18 /* Tx Header Priority to Switch Pri Mapping */
 218 #define CPSW2_TS_SEQ_MTYPE  0x1c /* Time Sync Sequence ID Offset and Msg Type */
 219
 220 /* CPSW_PORT_V1 and V2 */
 221 #define SA_LO               0x20 /* CPGMAC_SL Source Address Low */
 222 #define SA_HI               0x24 /* CPGMAC_SL Source Address High */
 223 #define SEND_PERCENT        0x28 /* Transmit Queue Send Percentages */
 224
 225 /* CPSW_PORT_V2 only */
 226 #define RX_DSCP_PRI_MAP0    0x30 /* Rx DSCP Priority to Rx Packet Mapping */
 227 #define RX_DSCP_PRI_MAP1    0x34 /* Rx DSCP Priority to Rx Packet Mapping */
 228 #define RX_DSCP_PRI_MAP2    0x38 /* Rx DSCP Priority to Rx Packet Mapping */
 229 #define RX_DSCP_PRI_MAP3    0x3c /* Rx DSCP Priority to Rx Packet Mapping */
 230 #define RX_DSCP_PRI_MAP4    0x40 /* Rx DSCP Priority to Rx Packet Mapping */
 231 #define RX_DSCP_PRI_MAP5    0x44 /* Rx DSCP Priority to Rx Packet Mapping */
 232 #define RX_DSCP_PRI_MAP6    0x48 /* Rx DSCP Priority to Rx Packet Mapping */
 233 #define RX_DSCP_PRI_MAP7    0x4c /* Rx DSCP Priority to Rx Packet Mapping */
 234
 235 /* Bit definitions for the CPSW2_CONTROL register */
 236 #define PASS_PRI_TAGGED     (1<<24) /* Pass Priority Tagged */
 237 #define VLAN_LTYPE2_EN      (1<<21) /* VLAN LTYPE 2 enable */
 238 #define VLAN_LTYPE1_EN      (1<<20) /* VLAN LTYPE 1 enable */
 239 #define DSCP_PRI_EN         (1<<16) /* DSCP Priority Enable */
 240 #define TS_320              (1<<14) /* Time Sync Dest Port 320 enable */
 241 #define TS_319              (1<<13) /* Time Sync Dest Port 319 enable */
 242 #define TS_132              (1<<12) /* Time Sync Dest IP Addr 132 enable */
 243 #define TS_131              (1<<11) /* Time Sync Dest IP Addr 131 enable */
 244 #define TS_130              (1<<10) /* Time Sync Dest IP Addr 130 enable */
 245 #define TS_129              (1<<9)  /* Time Sync Dest IP Addr 129 enable */
 246 #define TS_BIT8             (1<<8)  /* ts_ttl_nonzero? */
 247 #define TS_ANNEX_D_EN       (1<<4)  /* Time Sync Annex D enable */
 248 #define TS_LTYPE2_EN        (1<<3)  /* Time Sync LTYPE 2 enable */
 249 #define TS_LTYPE1_EN        (1<<2)  /* Time Sync LTYPE 1 enable */
 250 #define TS_TX_EN            (1<<1)  /* Time Sync Transmit Enable */
 251 #define TS_RX_EN            (1<<0)  /* Time Sync Receive Enable */
 252
 253 #define CTRL_TS_BITS \
 254         (TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 | TS_BIT8 | \
 255          TS_ANNEX_D_EN | TS_LTYPE1_EN)
 256
 257 #define CTRL_ALL_TS_MASK (CTRL_TS_BITS | TS_TX_EN | TS_RX_EN)
 258 #define CTRL_TX_TS_BITS  (CTRL_TS_BITS | TS_TX_EN)
 259 #define CTRL_RX_TS_BITS  (CTRL_TS_BITS | TS_RX_EN)
 260
 261 /* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */
 262 #define TS_SEQ_ID_OFFSET_SHIFT   (16)    /* Time Sync Sequence ID Offset */
 263 #define TS_SEQ_ID_OFFSET_MASK    (0x3f)
 264 #define TS_MSG_TYPE_EN_SHIFT     (0)     /* Time Sync Message Type Enable */
 265 #define TS_MSG_TYPE_EN_MASK      (0xffff)
 266
 267 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
 268 #define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3))
 269
 270 /* Bit definitions for the CPSW1_TS_CTL register */
 271 #define CPSW_V1_TS_RX_EN                BIT(0)
 272 #define CPSW_V1_TS_TX_EN                BIT(4)
 273 #define CPSW_V1_MSG_TYPE_OFS            16
 274
 275 /* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */
 276 #define CPSW_V1_SEQ_ID_OFS_SHIFT        16
 277
 278 struct cpsw_host_regs {
 279         u32     max_blks;
 280         u32     blk_cnt;
 281         u32     tx_in_ctl;
 282         u32     port_vlan;
 283         u32     tx_pri_map;
 284         u32     cpdma_tx_pri_map;
 285         u32     cpdma_rx_chan_map;
 286 };
 287
 288 struct cpsw_sliver_regs {
 289         u32     id_ver;
 290         u32     mac_control;
 291         u32     mac_status;
 292         u32     soft_reset;
 293         u32     rx_maxlen;
 294         u32     __reserved_0;
 295         u32     rx_pause;
 296         u32     tx_pause;
 297         u32     __reserved_1;
 298         u32     rx_pri_map;
 299 };
 300
 301 struct cpsw_slave {
 302         void __iomem                    *regs;
 303         struct cpsw_sliver_regs __iomem *sliver;
 304         int                             slave_num;
 305         u32                             mac_control;
 306         struct cpsw_slave_data          *data;
 307         struct phy_device               *phy;
 308         struct net_device               *ndev;
 309         u32                             port_vlan;
 310         u32                             open_stat;
 311 };
 312
 313 static inline u32 slave_read(struct cpsw_slave *slave, u32 offset)
 314 {
 315         return __raw_readl(slave->regs + offset);
 316 }
 317
 318 static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset)
 319 {
 320         __raw_writel(val, slave->regs + offset);
 321 }
 322
 323 struct cpsw_priv {
 324         spinlock_t                      lock;
 325         struct platform_device          *pdev;
 326         struct net_device               *ndev;
 327         struct resource                 *cpsw_res;
 328         struct resource                 *cpsw_wr_res;
 329         struct napi_struct              napi;
 330         struct device                   *dev;
 331         struct cpsw_platform_data       data;
 332         struct cpsw_ss_regs __iomem     *regs;
 333         struct cpsw_wr_regs __iomem     *wr_regs;
 334         struct cpsw_host_regs __iomem   *host_port_regs;
 335         u32                             msg_enable;
 336         u32                             version;
 337         u32                             coal_intvl;
 338         u32                             bus_freq_mhz;
 339         struct net_device_stats         stats;
 340         int                             rx_packet_max;
 341         int                             host_port;
 342         struct clk                      *clk;
 343         u8                              mac_addr[ETH_ALEN];
 344         struct cpsw_slave               *slaves;
 345         struct cpdma_ctlr               *dma;
 346         struct cpdma_chan               *txch, *rxch;
 347         struct cpsw_ale                 *ale;
 348         /* snapshot of IRQ numbers */
 349         u32 irqs_table[4];
 350         u32 num_irqs;
 351         struct cpts *cpts;
 352         u32 emac_port;
 353 };
 354
 355 #define napi_to_priv(napi)      container_of(napi, struct cpsw_priv, napi)
 356 #define for_each_slave(priv, func, arg...)                              \
 357         do {                                                            \
 358                 int idx;                                                \
 359                 if (priv->data.dual_emac)                               \
 360                         (func)((priv)->slaves + priv->emac_port, ##arg);\
 361                 else                                                    \
 362                         for (idx = 0; idx < (priv)->data.slaves; idx++) \
 363                                 (func)((priv)->slaves + idx, ##arg);    \
 364         } while (0)
 365 #define cpsw_get_slave_ndev(priv, __slave_no__)                         \
 366         (priv->slaves[__slave_no__].ndev)
 367 #define cpsw_get_slave_priv(priv, __slave_no__)                         \
 368         ((priv->slaves[__slave_no__].ndev) ?                            \
 369                 netdev_priv(priv->slaves[__slave_no__].ndev) : NULL)    \
 370
 371 #define cpsw_dual_emac_src_port_detect(status, priv, ndev, skb)         \
 372         do {                                                            \
 373                 if (!priv->data.dual_emac)                              \
 374                         break;                                          \
 375                 if (CPDMA_RX_SOURCE_PORT(status) == 1) {                \
 376                         ndev = cpsw_get_slave_ndev(priv, 0);            \
 377                         priv = netdev_priv(ndev);                       \
 378                         skb->dev = ndev;                                \
 379                 } else if (CPDMA_RX_SOURCE_PORT(status) == 2) {         \
 380                         ndev = cpsw_get_slave_ndev(priv, 1);            \
 381                         priv = netdev_priv(ndev);                       \
 382                         skb->dev = ndev;                                \
 383                 }                                                       \
 384         } while (0)
 385 #define cpsw_add_mcast(priv, addr)                                      \
 386         do {                                                            \
 387                 if (priv->data.dual_emac) {                             \
 388                         struct cpsw_slave *slave = priv->slaves +       \
 389                                                 priv->emac_port;        \
 390                         int slave_port = cpsw_get_slave_port(priv,      \
 391                                                 slave->slave_num);      \
 392                         cpsw_ale_add_mcast(priv->ale, addr,             \
 393                                 1 << slave_port | 1 << priv->host_port, \
 394                                 ALE_VLAN, slave->port_vlan, 0);         \
 395                 } else {                                                \
 396                         cpsw_ale_add_mcast(priv->ale, addr,             \
 397                                 ALE_ALL_PORTS << priv->host_port,       \
 398                                 0, 0, 0);                               \
 399                 }                                                       \
 400         } while (0)
 401
 402 static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num)
 403 {
 404         if (priv->host_port == 0)
 405                 return slave_num + 1;
 406         else
 407                 return slave_num;
 408 }
 409
 410 static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
 411 {
 412         struct cpsw_priv *priv = netdev_priv(ndev);
 413
 414         if (ndev->flags & IFF_PROMISC) {
 415                 /* Enable promiscuous mode */
 416                 dev_err(priv->dev, "Ignoring Promiscuous mode\n");
 417                 return;
 418         }
 419
 420         /* Clear all mcast from ALE */
 421         cpsw_ale_flush_multicast(priv->ale, ALE_ALL_PORTS << priv->host_port);
 422
 423         if (!netdev_mc_empty(ndev)) {
 424                 struct netdev_hw_addr *ha;
 425
 426                 /* program multicast address list into ALE register */
 427                 netdev_for_each_mc_addr(ha, ndev) {
 428                         cpsw_add_mcast(priv, (u8 *)ha->addr);
 429                 }
 430         }
 431 }
 432
 433 static void cpsw_intr_enable(struct cpsw_priv *priv)
 434 {
 435         __raw_writel(0xFF, &priv->wr_regs->tx_en);
 436         __raw_writel(0xFF, &priv->wr_regs->rx_en);
 437
 438         cpdma_ctlr_int_ctrl(priv->dma, true);
 439         return;
 440 }
 441
 442 static void cpsw_intr_disable(struct cpsw_priv *priv)
 443 {
 444         __raw_writel(0, &priv->wr_regs->tx_en);
 445         __raw_writel(0, &priv->wr_regs->rx_en);
 446
 447         cpdma_ctlr_int_ctrl(priv->dma, false);
 448         return;
 449 }
 450
 451 void cpsw_tx_handler(void *token, int len, int status)
 452 {
 453         struct sk_buff          *skb = token;
 454         struct net_device       *ndev = skb->dev;
 455         struct cpsw_priv        *priv = netdev_priv(ndev);
 456
 457         /* Check whether the queue is stopped due to stalled tx dma, if the
 458          * queue is stopped then start the queue as we have free desc for tx
 459          */
 460         if (unlikely(netif_queue_stopped(ndev)))
 461                 netif_wake_queue(ndev);
 462         cpts_tx_timestamp(priv->cpts, skb);
 463         priv->stats.tx_packets++;
 464         priv->stats.tx_bytes += len;
 465         dev_kfree_skb_any(skb);
 466 }
 467
 468 void cpsw_rx_handler(void *token, int len, int status)
 469 {
 470         struct sk_buff          *skb = token;
 471         struct net_device       *ndev = skb->dev;
 472         struct cpsw_priv        *priv = netdev_priv(ndev);
 473         int                     ret = 0;
 474
 475         cpsw_dual_emac_src_port_detect(status, priv, ndev, skb);
 476
 477         /* free and bail if we are shutting down */
 478         if (unlikely(!netif_running(ndev)) ||
 479                         unlikely(!netif_carrier_ok(ndev))) {
 480                 dev_kfree_skb_any(skb);
 481                 return;
 482         }
 483         if (likely(status >= 0)) {
 484                 skb_put(skb, len);
 485                 cpts_rx_timestamp(priv->cpts, skb);
 486                 skb->protocol = eth_type_trans(skb, ndev);
 487                 netif_receive_skb(skb);
 488                 priv->stats.rx_bytes += len;
 489                 priv->stats.rx_packets++;
 490                 skb = NULL;
 491         }
 492
 493         if (unlikely(!netif_running(ndev))) {
 494                 if (skb)
 495                         dev_kfree_skb_any(skb);
 496                 return;
 497         }
 498
 499         if (likely(!skb)) {
 500                 skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max);
 501                 if (WARN_ON(!skb))
 502                         return;
 503
 504                 ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
 505                                         skb_tailroom(skb), 0, GFP_KERNEL);
 506         }
 507         WARN_ON(ret < 0);
 508 }
 509
 510 static irqreturn_t cpsw_interrupt(int irq, void *dev_id)
 511 {
 512         struct cpsw_priv *priv = dev_id;
 513
 514         if (likely(netif_running(priv->ndev))) {
 515                 cpsw_intr_disable(priv);
 516                 cpsw_disable_irq(priv);
 517                 napi_schedule(&priv->napi);
 518         } else {
 519                 priv = cpsw_get_slave_priv(priv, 1);
 520                 if (likely(priv) && likely(netif_running(priv->ndev))) {
 521                         cpsw_intr_disable(priv);
 522                         cpsw_disable_irq(priv);
 523                         napi_schedule(&priv->napi);
 524                 }
 525         }
 526         return IRQ_HANDLED;
 527 }
 528
 529 static int cpsw_poll(struct napi_struct *napi, int budget)
 530 {
 531         struct cpsw_priv        *priv = napi_to_priv(napi);
 532         int                     num_tx, num_rx;
 533
 534         num_tx = cpdma_chan_process(priv->txch, 128);
 535         if (num_tx)
 536                 cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
 537
 538         num_rx = cpdma_chan_process(priv->rxch, budget);
 539         if (num_rx < budget) {
 540                 napi_complete(napi);
 541                 cpsw_intr_enable(priv);
 542                 cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
 543                 cpsw_enable_irq(priv);
 544         }
 545
 546         if (num_rx || num_tx)
 547                 cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n",
 548                          num_rx, num_tx);
 549
 550         return num_rx;
 551 }
 552
 553 static inline void soft_reset(const char *module, void __iomem *reg)
 554 {
 555         unsigned long timeout = jiffies + HZ;
 556
 557         __raw_writel(1, reg);
 558         do {
 559                 cpu_relax();
 560         } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
 561
 562         WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
 563 }
 564
 565 #define mac_hi(mac)     (((mac)[0] << 0) | ((mac)[1] << 8) |    \
 566                          ((mac)[2] << 16) | ((mac)[3] << 24))
 567 #define mac_lo(mac)     (((mac)[4] << 0) | ((mac)[5] << 8))
 568
 569 static void cpsw_set_slave_mac(struct cpsw_slave *slave,
 570                                struct cpsw_priv *priv)
 571 {
 572         slave_write(slave, mac_hi(priv->mac_addr), SA_HI);
 573         slave_write(slave, mac_lo(priv->mac_addr), SA_LO);
 574 }
 575
 576 static void _cpsw_adjust_link(struct cpsw_slave *slave,
 577                               struct cpsw_priv *priv, bool *link)
 578 {
 579         struct phy_device       *phy = slave->phy;
 580         u32                     mac_control = 0;
 581         u32                     slave_port;
 582
 583         if (!phy)
 584                 return;
 585
 586         slave_port = cpsw_get_slave_port(priv, slave->slave_num);
 587
 588         if (phy->link) {
 589                 mac_control = priv->data.mac_control;
 590
 591                 /* enable forwarding */
 592                 cpsw_ale_control_set(priv->ale, slave_port,
 593                                      ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 594
 595                 if (phy->speed == 1000)
 596                         mac_control |= BIT(7);  /* GIGABITEN    */
 597                 if (phy->duplex)
 598                         mac_control |= BIT(0);  /* FULLDUPLEXEN */
 599
 600                 /* set speed_in input in case RMII mode is used in 100Mbps */
 601                 if (phy->speed == 100)
 602                         mac_control |= BIT(15);
 603
 604                 *link = true;
 605         } else {
 606                 mac_control = 0;
 607                 /* disable forwarding */
 608                 cpsw_ale_control_set(priv->ale, slave_port,
 609                                      ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 610         }
 611
 612         if (mac_control != slave->mac_control) {
 613                 phy_print_status(phy);
 614                 __raw_writel(mac_control, &slave->sliver->mac_control);
 615         }
 616
 617         slave->mac_control = mac_control;
 618 }
 619
 620 static void cpsw_adjust_link(struct net_device *ndev)
 621 {
 622         struct cpsw_priv        *priv = netdev_priv(ndev);
 623         bool                    link = false;
 624
 625         for_each_slave(priv, _cpsw_adjust_link, priv, &link);
 626
 627         if (link) {
 628                 netif_carrier_on(ndev);
 629                 if (netif_running(ndev))
 630                         netif_wake_queue(ndev);
 631         } else {
 632                 netif_carrier_off(ndev);
 633                 netif_stop_queue(ndev);
 634         }
 635 }
 636
 637 static int cpsw_get_coalesce(struct net_device *ndev,
 638                                 struct ethtool_coalesce *coal)
 639 {
 640         struct cpsw_priv *priv = netdev_priv(ndev);
 641
 642         coal->rx_coalesce_usecs = priv->coal_intvl;
 643         return 0;
 644 }
 645
 646 static int cpsw_set_coalesce(struct net_device *ndev,
 647                                 struct ethtool_coalesce *coal)
 648 {
 649         struct cpsw_priv *priv = netdev_priv(ndev);
 650         u32 int_ctrl;
 651         u32 num_interrupts = 0;
 652         u32 prescale = 0;
 653         u32 addnl_dvdr = 1;
 654         u32 coal_intvl = 0;
 655
 656         if (!coal->rx_coalesce_usecs)
 657                 return -EINVAL;
 658
 659         coal_intvl = coal->rx_coalesce_usecs;
 660
 661         int_ctrl =  readl(&priv->wr_regs->int_control);
 662         prescale = priv->bus_freq_mhz * 4;
 663
 664         if (coal_intvl < CPSW_CMINTMIN_INTVL)
 665                 coal_intvl = CPSW_CMINTMIN_INTVL;
 666
 667         if (coal_intvl > CPSW_CMINTMAX_INTVL) {
 668                 /* Interrupt pacer works with 4us Pulse, we can
 669                  * throttle further by dilating the 4us pulse.
 670                  */
 671                 addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale;
 672
 673                 if (addnl_dvdr > 1) {
 674                         prescale *= addnl_dvdr;
 675                         if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr))
 676                                 coal_intvl = (CPSW_CMINTMAX_INTVL
 677                                                 * addnl_dvdr);
 678                 } else {
 679                         addnl_dvdr = 1;
 680                         coal_intvl = CPSW_CMINTMAX_INTVL;
 681                 }
 682         }
 683
 684         num_interrupts = (1000 * addnl_dvdr) / coal_intvl;
 685         writel(num_interrupts, &priv->wr_regs->rx_imax);
 686         writel(num_interrupts, &priv->wr_regs->tx_imax);
 687
 688         int_ctrl |= CPSW_INTPACEEN;
 689         int_ctrl &= (~CPSW_INTPRESCALE_MASK);
 690         int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK);
 691         writel(int_ctrl, &priv->wr_regs->int_control);
 692
 693         cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl);
 694         if (priv->data.dual_emac) {
 695                 int i;
 696
 697                 for (i = 0; i < priv->data.slaves; i++) {
 698                         priv = netdev_priv(priv->slaves[i].ndev);
 699                         priv->coal_intvl = coal_intvl;
 700                 }
 701         } else {
 702                 priv->coal_intvl = coal_intvl;
 703         }
 704
 705         return 0;
 706 }
 707
 708 static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val)
 709 {
 710         static char *leader = "........................................";
 711
 712         if (!val)
 713                 return 0;
 714         else
 715                 return snprintf(buf, maxlen, "%s %s %10d\n", name,
 716                                 leader + strlen(name), val);
 717 }
 718
 719 static int cpsw_common_res_usage_state(struct cpsw_priv *priv)
 720 {
 721         u32 i;
 722         u32 usage_count = 0;
 723
 724         if (!priv->data.dual_emac)
 725                 return 0;
 726
 727         for (i = 0; i < priv->data.slaves; i++)
 728                 if (priv->slaves[i].open_stat)
 729                         usage_count++;
 730
 731         return usage_count;
 732 }
 733
 734 static inline int cpsw_tx_packet_submit(struct net_device *ndev,
 735                         struct cpsw_priv *priv, struct sk_buff *skb)
 736 {
 737         if (!priv->data.dual_emac)
 738                 return cpdma_chan_submit(priv->txch, skb, skb->data,
 739                                   skb->len, 0, GFP_KERNEL);
 740
 741         if (ndev == cpsw_get_slave_ndev(priv, 0))
 742                 return cpdma_chan_submit(priv->txch, skb, skb->data,
 743                                   skb->len, 1, GFP_KERNEL);
 744         else
 745                 return cpdma_chan_submit(priv->txch, skb, skb->data,
 746                                   skb->len, 2, GFP_KERNEL);
 747 }
 748
 749 static inline void cpsw_add_dual_emac_def_ale_entries(
 750                 struct cpsw_priv *priv, struct cpsw_slave *slave,
 751                 u32 slave_port)
 752 {
 753         u32 port_mask = 1 << slave_port | 1 << priv->host_port;
 754
 755         if (priv->version == CPSW_VERSION_1)
 756                 slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN);
 757         else
 758                 slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN);
 759         cpsw_ale_add_vlan(priv->ale, slave->port_vlan, port_mask,
 760                           port_mask, port_mask, 0);
 761         cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
 762                            port_mask, ALE_VLAN, slave->port_vlan, 0);
 763         cpsw_ale_add_ucast(priv->ale, priv->mac_addr,
 764                 priv->host_port, ALE_VLAN, slave->port_vlan);
 765 }
 766
 767 static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
 768 {
 769         char name[32];
 770         u32 slave_port;
 771
 772         sprintf(name, "slave-%d", slave->slave_num);
 773
 774         soft_reset(name, &slave->sliver->soft_reset);
 775
 776         /* setup priority mapping */
 777         __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map);
 778
 779         switch (priv->version) {
 780         case CPSW_VERSION_1:
 781                 slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP);
 782                 break;
 783         case CPSW_VERSION_2:
 784                 slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP);
 785                 break;
 786         }
 787
 788         /* setup max packet size, and mac address */
 789         __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen);
 790         cpsw_set_slave_mac(slave, priv);
 791
 792         slave->mac_control = 0; /* no link yet */
 793
 794         slave_port = cpsw_get_slave_port(priv, slave->slave_num);
 795
 796         if (priv->data.dual_emac)
 797                 cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port);
 798         else
 799                 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
 800                                    1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
 801
 802         slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
 803                                  &cpsw_adjust_link, slave->data->phy_if);
 804         if (IS_ERR(slave->phy)) {
 805                 dev_err(priv->dev, "phy %s not found on slave %d\n",
 806                         slave->data->phy_id, slave->slave_num);
 807                 slave->phy = NULL;
 808         } else {
 809                 dev_info(priv->dev, "phy found : id is : 0x%x\n",
 810                          slave->phy->phy_id);
 811                 phy_start(slave->phy);
 812         }
 813 }
 814
 815 static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
 816 {
 817         const int vlan = priv->data.default_vlan;
 818         const int port = priv->host_port;
 819         u32 reg;
 820         int i;
 821
 822         reg = (priv->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN :
 823                CPSW2_PORT_VLAN;
 824
 825         writel(vlan, &priv->host_port_regs->port_vlan);
 826
 827         for (i = 0; i < priv->data.slaves; i++)
 828                 slave_write(priv->slaves + i, vlan, reg);
 829
 830         cpsw_ale_add_vlan(priv->ale, vlan, ALE_ALL_PORTS << port,
 831                           ALE_ALL_PORTS << port, ALE_ALL_PORTS << port,
 832                           (ALE_PORT_1 | ALE_PORT_2) << port);
 833 }
 834
 835 static void cpsw_init_host_port(struct cpsw_priv *priv)
 836 {
 837         u32 control_reg;
 838         u32 fifo_mode;
 839
 840         /* soft reset the controller and initialize ale */
 841         soft_reset("cpsw", &priv->regs->soft_reset);
 842         cpsw_ale_start(priv->ale);
 843
 844         /* switch to vlan unaware mode */
 845         cpsw_ale_control_set(priv->ale, priv->host_port, ALE_VLAN_AWARE,
 846                              CPSW_ALE_VLAN_AWARE);
 847         control_reg = readl(&priv->regs->control);
 848         control_reg |= CPSW_VLAN_AWARE;
 849         writel(control_reg, &priv->regs->control);
 850         fifo_mode = (priv->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE :
 851                      CPSW_FIFO_NORMAL_MODE;
 852         writel(fifo_mode, &priv->host_port_regs->tx_in_ctl);
 853
 854         /* setup host port priority mapping */
 855         __raw_writel(CPDMA_TX_PRIORITY_MAP,
 856                      &priv->host_port_regs->cpdma_tx_pri_map);
 857         __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map);
 858
 859         cpsw_ale_control_set(priv->ale, priv->host_port,
 860                              ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 861
 862         if (!priv->data.dual_emac) {
 863                 cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port,
 864                                    0, 0);
 865                 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
 866                                    1 << priv->host_port, 0, 0, ALE_MCAST_FWD_2);
 867         }
 868 }
 869
 870 static int cpsw_ndo_open(struct net_device *ndev)
 871 {
 872         struct cpsw_priv *priv = netdev_priv(ndev);
 873         int i, ret;
 874         u32 reg;
 875
 876         if (!cpsw_common_res_usage_state(priv))
 877                 cpsw_intr_disable(priv);
 878         netif_carrier_off(ndev);
 879
 880         pm_runtime_get_sync(&priv->pdev->dev);
 881
 882         reg = priv->version;
 883
 884         dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
 885                  CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
 886                  CPSW_RTL_VERSION(reg));
 887
 888         /* initialize host and slave ports */
 889         if (!cpsw_common_res_usage_state(priv))
 890                 cpsw_init_host_port(priv);
 891         for_each_slave(priv, cpsw_slave_open, priv);
 892
 893         /* Add default VLAN */
 894         if (!priv->data.dual_emac)
 895                 cpsw_add_default_vlan(priv);
 896
 897         if (!cpsw_common_res_usage_state(priv)) {
 898                 /* setup tx dma to fixed prio and zero offset */
 899                 cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1);
 900                 cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0);
 901
 902                 /* disable priority elevation */
 903                 __raw_writel(0, &priv->regs->ptype);
 904
 905                 /* enable statistics collection only on all ports */
 906                 __raw_writel(0x7, &priv->regs->stat_port_en);
 907
 908                 if (WARN_ON(!priv->data.rx_descs))
 909                         priv->data.rx_descs = 128;
 910
 911                 for (i = 0; i < priv->data.rx_descs; i++) {
 912                         struct sk_buff *skb;
 913
 914                         ret = -ENOMEM;
 915                         skb = netdev_alloc_skb_ip_align(priv->ndev,
 916                                                         priv->rx_packet_max);
 917                         if (!skb)
 918                                 break;
 919                         ret = cpdma_chan_submit(priv->rxch, skb, skb->data,
 920                                         skb_tailroom(skb), 0, GFP_KERNEL);
 921                         if (WARN_ON(ret < 0))
 922                                 break;
 923                 }
 924                 /* continue even if we didn't manage to submit all
 925                  * receive descs
 926                  */
 927                 cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i);
 928         }
 929
 930         /* Enable Interrupt pacing if configured */
 931         if (priv->coal_intvl != 0) {
 932                 struct ethtool_coalesce coal;
 933
 934                 coal.rx_coalesce_usecs = (priv->coal_intvl << 4);
 935                 cpsw_set_coalesce(ndev, &coal);
 936         }
 937
 938         cpdma_ctlr_start(priv->dma);
 939         cpsw_intr_enable(priv);
 940         napi_enable(&priv->napi);
 941         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
 942         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
 943
 944         if (priv->data.dual_emac)
 945                 priv->slaves[priv->emac_port].open_stat = true;
 946         return 0;
 947 }
 948
 949 static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv)
 950 {
 951         if (!slave->phy)
 952                 return;
 953         phy_stop(slave->phy);
 954         phy_disconnect(slave->phy);
 955         slave->phy = NULL;
 956 }
 957
 958 static int cpsw_ndo_stop(struct net_device *ndev)
 959 {
 960         struct cpsw_priv *priv = netdev_priv(ndev);
 961
 962         cpsw_info(priv, ifdown, "shutting down cpsw device\n");
 963         netif_stop_queue(priv->ndev);
 964         napi_disable(&priv->napi);
 965         netif_carrier_off(priv->ndev);
 966
 967         if (cpsw_common_res_usage_state(priv) <= 1) {
 968                 cpsw_intr_disable(priv);
 969                 cpdma_ctlr_int_ctrl(priv->dma, false);
 970                 cpdma_ctlr_stop(priv->dma);
 971                 cpsw_ale_stop(priv->ale);
 972         }
 973         for_each_slave(priv, cpsw_slave_stop, priv);
 974         pm_runtime_put_sync(&priv->pdev->dev);
 975         if (priv->data.dual_emac)
 976                 priv->slaves[priv->emac_port].open_stat = false;
 977         return 0;
 978 }
 979
 980 static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
 981                                        struct net_device *ndev)
 982 {
 983         struct cpsw_priv *priv = netdev_priv(ndev);
 984         int ret;
 985
 986         ndev->trans_start = jiffies;
 987
 988         if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
 989                 cpsw_err(priv, tx_err, "packet pad failed\n");
 990                 priv->stats.tx_dropped++;
 991                 return NETDEV_TX_OK;
 992         }
 993
 994         if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
 995                                 priv->cpts->tx_enable)
 996                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 997
 998         skb_tx_timestamp(skb);
 999
1000         ret = cpsw_tx_packet_submit(ndev, priv, skb);
1001         if (unlikely(ret != 0)) {
1002                 cpsw_err(priv, tx_err, "desc submit failed\n");
1003                 goto fail;
1004         }
1005
1006         /* If there is no more tx desc left free then we need to
1007          * tell the kernel to stop sending us tx frames.
1008          */
1009         if (unlikely(!cpdma_check_free_tx_desc(priv->txch)))
1010                 netif_stop_queue(ndev);
1011
1012         return NETDEV_TX_OK;
1013 fail:
1014         priv->stats.tx_dropped++;
1015         netif_stop_queue(ndev);
1016         return NETDEV_TX_BUSY;
1017 }
1018
1019 static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags)
1020 {
1021         /*
1022          * The switch cannot operate in promiscuous mode without substantial
1023          * headache.  For promiscuous mode to work, we would need to put the
1024          * ALE in bypass mode and route all traffic to the host port.
1025          * Subsequently, the host will need to operate as a "bridge", learn,
1026          * and flood as needed.  For now, we simply complain here and
1027          * do nothing about it :-)
1028          */
1029         if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC))
1030                 dev_err(&ndev->dev, "promiscuity ignored!\n");
1031
1032         /*
1033          * The switch cannot filter multicast traffic unless it is configured
1034          * in "VLAN Aware" mode.  Unfortunately, VLAN awareness requires a
1035          * whole bunch of additional logic that this driver does not implement
1036          * at present.
1037          */
1038         if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI))
1039                 dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n");
1040 }
1041
1042 #ifdef CONFIG_TI_CPTS
1043
1044 static void cpsw_hwtstamp_v1(struct cpsw_priv *priv)
1045 {
1046         struct cpsw_slave *slave = &priv->slaves[priv->data.active_slave];
1047         u32 ts_en, seq_id;
1048
1049         if (!priv->cpts->tx_enable && !priv->cpts->rx_enable) {
1050                 slave_write(slave, 0, CPSW1_TS_CTL);
1051                 return;
1052         }
1053
1054         seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588;
1055         ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS;
1056
1057         if (priv->cpts->tx_enable)
1058                 ts_en |= CPSW_V1_TS_TX_EN;
1059
1060         if (priv->cpts->rx_enable)
1061                 ts_en |= CPSW_V1_TS_RX_EN;
1062
1063         slave_write(slave, ts_en, CPSW1_TS_CTL);
1064         slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE);
1065 }
1066
1067 static void cpsw_hwtstamp_v2(struct cpsw_priv *priv)
1068 {
1069         struct cpsw_slave *slave;
1070         u32 ctrl, mtype;
1071
1072         if (priv->data.dual_emac)
1073                 slave = &priv->slaves[priv->emac_port];
1074         else
1075                 slave = &priv->slaves[priv->data.active_slave];
1076
1077         ctrl = slave_read(slave, CPSW2_CONTROL);
1078         ctrl &= ~CTRL_ALL_TS_MASK;
1079
1080         if (priv->cpts->tx_enable)
1081                 ctrl |= CTRL_TX_TS_BITS;
1082
1083         if (priv->cpts->rx_enable)
1084                 ctrl |= CTRL_RX_TS_BITS;
1085
1086         mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS;
1087
1088         slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE);
1089         slave_write(slave, ctrl, CPSW2_CONTROL);
1090         __raw_writel(ETH_P_1588, &priv->regs->ts_ltype);
1091 }
1092
1093 static int cpsw_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
1094 {
1095         struct cpsw_priv *priv = netdev_priv(dev);
1096         struct cpts *cpts = priv->cpts;
1097         struct hwtstamp_config cfg;
1098
1099         if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1100                 return -EFAULT;
1101
1102         /* reserved for future extensions */
1103         if (cfg.flags)
1104                 return -EINVAL;
1105
1106         switch (cfg.tx_type) {
1107         case HWTSTAMP_TX_OFF:
1108                 cpts->tx_enable = 0;
1109                 break;
1110         case HWTSTAMP_TX_ON:
1111                 cpts->tx_enable = 1;
1112                 break;
1113         default:
1114                 return -ERANGE;
1115         }
1116
1117         switch (cfg.rx_filter) {
1118         case HWTSTAMP_FILTER_NONE:
1119                 cpts->rx_enable = 0;
1120                 break;
1121         case HWTSTAMP_FILTER_ALL:
1122         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1123         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1124         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1125                 return -ERANGE;
1126         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1127         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1128         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1129         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1130         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1131         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1132         case HWTSTAMP_FILTER_PTP_V2_EVENT:
1133         case HWTSTAMP_FILTER_PTP_V2_SYNC:
1134         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1135                 cpts->rx_enable = 1;
1136                 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
1137                 break;
1138         default:
1139                 return -ERANGE;
1140         }
1141
1142         switch (priv->version) {
1143         case CPSW_VERSION_1:
1144                 cpsw_hwtstamp_v1(priv);
1145                 break;
1146         case CPSW_VERSION_2:
1147                 cpsw_hwtstamp_v2(priv);
1148                 break;
1149         default:
1150                 return -ENOTSUPP;
1151         }
1152
1153         return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1154 }
1155
1156 #endif /*CONFIG_TI_CPTS*/
1157
1158 static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
1159 {
1160         struct cpsw_priv *priv = netdev_priv(dev);
1161         struct mii_ioctl_data *data = if_mii(req);
1162         int slave_no = cpsw_slave_index(priv);
1163
1164         if (!netif_running(dev))
1165                 return -EINVAL;
1166
1167         switch (cmd) {
1168 #ifdef CONFIG_TI_CPTS
1169         case SIOCSHWTSTAMP:
1170                 return cpsw_hwtstamp_ioctl(dev, req);
1171 #endif
1172         case SIOCGMIIPHY:
1173                 data->phy_id = priv->slaves[slave_no].phy->addr;
1174                 break;
1175         default:
1176                 return -ENOTSUPP;
1177         }
1178
1179         return 0;
1180 }
1181
1182 static void cpsw_ndo_tx_timeout(struct net_device *ndev)
1183 {
1184         struct cpsw_priv *priv = netdev_priv(ndev);
1185
1186         cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
1187         priv->stats.tx_errors++;
1188         cpsw_intr_disable(priv);
1189         cpdma_ctlr_int_ctrl(priv->dma, false);
1190         cpdma_chan_stop(priv->txch);
1191         cpdma_chan_start(priv->txch);
1192         cpdma_ctlr_int_ctrl(priv->dma, true);
1193         cpsw_intr_enable(priv);
1194         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
1195         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
1196
1197 }
1198
1199 static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev)
1200 {
1201         struct cpsw_priv *priv = netdev_priv(ndev);
1202         return &priv->stats;
1203 }
1204
1205 #ifdef CONFIG_NET_POLL_CONTROLLER
1206 static void cpsw_ndo_poll_controller(struct net_device *ndev)
1207 {
1208         struct cpsw_priv *priv = netdev_priv(ndev);
1209
1210         cpsw_intr_disable(priv);
1211         cpdma_ctlr_int_ctrl(priv->dma, false);
1212         cpsw_interrupt(ndev->irq, priv);
1213         cpdma_ctlr_int_ctrl(priv->dma, true);
1214         cpsw_intr_enable(priv);
1215         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_RX);
1216         cpdma_ctlr_eoi(priv->dma, CPDMA_EOI_TX);
1217
1218 }
1219 #endif
1220
1221 static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv,
1222                                 unsigned short vid)
1223 {
1224         int ret;
1225
1226         ret = cpsw_ale_add_vlan(priv->ale, vid,
1227                                 ALE_ALL_PORTS << priv->host_port,
1228                                 0, ALE_ALL_PORTS << priv->host_port,
1229                                 (ALE_PORT_1 | ALE_PORT_2) << priv->host_port);
1230         if (ret != 0)
1231                 return ret;
1232
1233         ret = cpsw_ale_add_ucast(priv->ale, priv->mac_addr,
1234                                  priv->host_port, ALE_VLAN, vid);
1235         if (ret != 0)
1236                 goto clean_vid;
1237
1238         ret = cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
1239                                  ALE_ALL_PORTS << priv->host_port,
1240                                  ALE_VLAN, vid, 0);
1241         if (ret != 0)
1242                 goto clean_vlan_ucast;
1243         return 0;
1244
1245 clean_vlan_ucast:
1246         cpsw_ale_del_ucast(priv->ale, priv->mac_addr,
1247                             priv->host_port, ALE_VLAN, vid);
1248 clean_vid:
1249         cpsw_ale_del_vlan(priv->ale, vid, 0);
1250         return ret;
1251 }
1252
1253 static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
1254                 unsigned short vid)
1255 {
1256         struct cpsw_priv *priv = netdev_priv(ndev);
1257
1258         if (vid == priv->data.default_vlan)
1259                 return 0;
1260
1261         dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid);
1262         return cpsw_add_vlan_ale_entry(priv, vid);
1263 }
1264
1265 static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev,
1266                 unsigned short vid)
1267 {
1268         struct cpsw_priv *priv = netdev_priv(ndev);
1269         int ret;
1270
1271         if (vid == priv->data.default_vlan)
1272                 return 0;
1273
1274         dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid);
1275         ret = cpsw_ale_del_vlan(priv->ale, vid, 0);
1276         if (ret != 0)
1277                 return ret;
1278
1279         ret = cpsw_ale_del_ucast(priv->ale, priv->mac_addr,
1280                                  priv->host_port, ALE_VLAN, vid);
1281         if (ret != 0)
1282                 return ret;
1283
1284         return cpsw_ale_del_mcast(priv->ale, priv->ndev->broadcast,
1285                                   0, ALE_VLAN, vid);
1286 }
1287
1288 static const struct net_device_ops cpsw_netdev_ops = {
1289         .ndo_open               = cpsw_ndo_open,
1290         .ndo_stop               = cpsw_ndo_stop,
1291         .ndo_start_xmit         = cpsw_ndo_start_xmit,
1292         .ndo_change_rx_flags    = cpsw_ndo_change_rx_flags,
1293         .ndo_do_ioctl           = cpsw_ndo_ioctl,
1294         .ndo_validate_addr      = eth_validate_addr,
1295         .ndo_change_mtu         = eth_change_mtu,
1296         .ndo_tx_timeout         = cpsw_ndo_tx_timeout,
1297         .ndo_get_stats          = cpsw_ndo_get_stats,
1298         .ndo_set_rx_mode        = cpsw_ndo_set_rx_mode,
1299 #ifdef CONFIG_NET_POLL_CONTROLLER
1300         .ndo_poll_controller    = cpsw_ndo_poll_controller,
1301 #endif
1302         .ndo_vlan_rx_add_vid    = cpsw_ndo_vlan_rx_add_vid,
1303         .ndo_vlan_rx_kill_vid   = cpsw_ndo_vlan_rx_kill_vid,
1304 };
1305
1306 static void cpsw_get_drvinfo(struct net_device *ndev,
1307                              struct ethtool_drvinfo *info)
1308 {
1309         struct cpsw_priv *priv = netdev_priv(ndev);
1310
1311         strlcpy(info->driver, "TI CPSW Driver v1.0", sizeof(info->driver));
1312         strlcpy(info->version, "1.0", sizeof(info->version));
1313         strlcpy(info->bus_info, priv->pdev->name, sizeof(info->bus_info));
1314 }
1315
1316 static u32 cpsw_get_msglevel(struct net_device *ndev)
1317 {
1318         struct cpsw_priv *priv = netdev_priv(ndev);
1319         return priv->msg_enable;
1320 }
1321
1322 static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
1323 {
1324         struct cpsw_priv *priv = netdev_priv(ndev);
1325         priv->msg_enable = value;
1326 }
1327
1328 static int cpsw_get_ts_info(struct net_device *ndev,
1329                             struct ethtool_ts_info *info)
1330 {
1331 #ifdef CONFIG_TI_CPTS
1332         struct cpsw_priv *priv = netdev_priv(ndev);
1333
1334         info->so_timestamping =
1335                 SOF_TIMESTAMPING_TX_HARDWARE |
1336                 SOF_TIMESTAMPING_TX_SOFTWARE |
1337                 SOF_TIMESTAMPING_RX_HARDWARE |
1338                 SOF_TIMESTAMPING_RX_SOFTWARE |
1339                 SOF_TIMESTAMPING_SOFTWARE |
1340                 SOF_TIMESTAMPING_RAW_HARDWARE;
1341         info->phc_index = priv->cpts->phc_index;
1342         info->tx_types =
1343                 (1 << HWTSTAMP_TX_OFF) |
1344                 (1 << HWTSTAMP_TX_ON);
1345         info->rx_filters =
1346                 (1 << HWTSTAMP_FILTER_NONE) |
1347                 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
1348 #else
1349         info->so_timestamping =
1350                 SOF_TIMESTAMPING_TX_SOFTWARE |
1351                 SOF_TIMESTAMPING_RX_SOFTWARE |
1352                 SOF_TIMESTAMPING_SOFTWARE;
1353         info->phc_index = -1;
1354         info->tx_types = 0;
1355         info->rx_filters = 0;
1356 #endif
1357         return 0;
1358 }
1359
1360 static int cpsw_get_settings(struct net_device *ndev,
1361                              struct ethtool_cmd *ecmd)
1362 {
1363         struct cpsw_priv *priv = netdev_priv(ndev);
1364         int slave_no = cpsw_slave_index(priv);
1365
1366         if (priv->slaves[slave_no].phy)
1367                 return phy_ethtool_gset(priv->slaves[slave_no].phy, ecmd);
1368         else
1369                 return -EOPNOTSUPP;
1370 }
1371
1372 static int cpsw_set_settings(struct net_device *ndev, struct ethtool_cmd *ecmd)
1373 {
1374         struct cpsw_priv *priv = netdev_priv(ndev);
1375         int slave_no = cpsw_slave_index(priv);
1376
1377         if (priv->slaves[slave_no].phy)
1378                 return phy_ethtool_sset(priv->slaves[slave_no].phy, ecmd);
1379         else
1380                 return -EOPNOTSUPP;
1381 }
1382
1383 static const struct ethtool_ops cpsw_ethtool_ops = {
1384         .get_drvinfo    = cpsw_get_drvinfo,
1385         .get_msglevel   = cpsw_get_msglevel,
1386         .set_msglevel   = cpsw_set_msglevel,
1387         .get_link       = ethtool_op_get_link,
1388         .get_ts_info    = cpsw_get_ts_info,
1389         .get_settings   = cpsw_get_settings,
1390         .set_settings   = cpsw_set_settings,
1391         .get_coalesce   = cpsw_get_coalesce,
1392         .set_coalesce   = cpsw_set_coalesce,
1393 };
1394
1395 static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv,
1396                             u32 slave_reg_ofs, u32 sliver_reg_ofs)
1397 {
1398         void __iomem            *regs = priv->regs;
1399         int                     slave_num = slave->slave_num;
1400         struct cpsw_slave_data  *data = priv->data.slave_data + slave_num;
1401
1402         slave->data     = data;
1403         slave->regs     = regs + slave_reg_ofs;
1404         slave->sliver   = regs + sliver_reg_ofs;
1405         slave->port_vlan = data->dual_emac_res_vlan;
1406 }
1407
1408 static int cpsw_probe_dt(struct cpsw_platform_data *data,
1409                          struct platform_device *pdev)
1410 {
1411         struct device_node *node = pdev->dev.of_node;
1412         struct device_node *slave_node;
1413         int i = 0, ret;
1414         u32 prop;
1415
1416         if (!node)
1417                 return -EINVAL;
1418
1419         if (of_property_read_u32(node, "slaves", &prop)) {
1420                 pr_err("Missing slaves property in the DT.\n");
1421                 return -EINVAL;
1422         }
1423         data->slaves = prop;
1424
1425         if (of_property_read_u32(node, "active_slave", &prop)) {
1426                 pr_err("Missing active_slave property in the DT.\n");
1427                 ret = -EINVAL;
1428                 goto error_ret;
1429         }
1430         data->active_slave = prop;
1431
1432         if (of_property_read_u32(node, "cpts_clock_mult", &prop)) {
1433                 pr_err("Missing cpts_clock_mult property in the DT.\n");
1434                 ret = -EINVAL;
1435                 goto error_ret;
1436         }
1437         data->cpts_clock_mult = prop;
1438
1439         if (of_property_read_u32(node, "cpts_clock_shift", &prop)) {
1440                 pr_err("Missing cpts_clock_shift property in the DT.\n");
1441                 ret = -EINVAL;
1442                 goto error_ret;
1443         }
1444         data->cpts_clock_shift = prop;
1445
1446         data->slave_data = kcalloc(data->slaves, sizeof(struct cpsw_slave_data),
1447                                    GFP_KERNEL);
1448         if (!data->slave_data)
1449                 return -EINVAL;
1450
1451         if (of_property_read_u32(node, "cpdma_channels", &prop)) {
1452                 pr_err("Missing cpdma_channels property in the DT.\n");
1453                 ret = -EINVAL;
1454                 goto error_ret;
1455         }
1456         data->channels = prop;
1457
1458         if (of_property_read_u32(node, "ale_entries", &prop)) {
1459                 pr_err("Missing ale_entries property in the DT.\n");
1460                 ret = -EINVAL;
1461                 goto error_ret;
1462         }
1463         data->ale_entries = prop;
1464
1465         if (of_property_read_u32(node, "bd_ram_size", &prop)) {
1466                 pr_err("Missing bd_ram_size property in the DT.\n");
1467                 ret = -EINVAL;
1468                 goto error_ret;
1469         }
1470         data->bd_ram_size = prop;
1471
1472         if (of_property_read_u32(node, "rx_descs", &prop)) {
1473                 pr_err("Missing rx_descs property in the DT.\n");
1474                 ret = -EINVAL;
1475                 goto error_ret;
1476         }
1477         data->rx_descs = prop;
1478
1479         if (of_property_read_u32(node, "mac_control", &prop)) {
1480                 pr_err("Missing mac_control property in the DT.\n");
1481                 ret = -EINVAL;
1482                 goto error_ret;
1483         }
1484         data->mac_control = prop;
1485
1486         if (!of_property_read_u32(node, "dual_emac", &prop))
1487                 data->dual_emac = prop;
1488
1489         /*
1490          * Populate all the child nodes here...
1491          */
1492         ret = of_platform_populate(node, NULL, NULL, &pdev->dev);
1493         /* We do not want to force this, as in some cases may not have child */
1494         if (ret)
1495                 pr_warn("Doesn't have any child node\n");
1496
1497         for_each_node_by_name(slave_node, "slave") {
1498                 struct cpsw_slave_data *slave_data = data->slave_data + i;
1499                 const void *mac_addr = NULL;
1500                 u32 phyid;
1501                 int lenp;
1502                 const __be32 *parp;
1503                 struct device_node *mdio_node;
1504                 struct platform_device *mdio;
1505
1506                 parp = of_get_property(slave_node, "phy_id", &lenp);
1507                 if ((parp == NULL) || (lenp != (sizeof(void *) * 2))) {
1508                         pr_err("Missing slave[%d] phy_id property\n", i);
1509                         ret = -EINVAL;
1510                         goto error_ret;
1511                 }
1512                 mdio_node = of_find_node_by_phandle(be32_to_cpup(parp));
1513                 phyid = be32_to_cpup(parp+1);
1514                 mdio = of_find_device_by_node(mdio_node);
1515                 snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
1516                          PHY_ID_FMT, mdio->name, phyid);
1517
1518                 mac_addr = of_get_mac_address(slave_node);
1519                 if (mac_addr)
1520                         memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
1521
1522                 if (data->dual_emac) {
1523                         if (of_property_read_u32(node, "dual_emac_res_vlan",
1524                                                  &prop)) {
1525                                 pr_err("Missing dual_emac_res_vlan in DT.\n");
1526                                 slave_data->dual_emac_res_vlan = i+1;
1527                                 pr_err("Using %d as Reserved VLAN for %d slave\n",
1528                                        slave_data->dual_emac_res_vlan, i);
1529                         } else {
1530                                 slave_data->dual_emac_res_vlan = prop;
1531                         }
1532                 }
1533
1534                 i++;
1535         }
1536
1537         return 0;
1538
1539 error_ret:
1540         kfree(data->slave_data);
1541         return ret;
1542 }
1543
1544 static int cpsw_probe_dual_emac(struct platform_device *pdev,
1545                                 struct cpsw_priv *priv)
1546 {
1547         struct cpsw_platform_data       *data = &priv->data;
1548         struct net_device               *ndev;
1549         struct cpsw_priv                *priv_sl2;
1550         int ret = 0, i;
1551
1552         ndev = alloc_etherdev(sizeof(struct cpsw_priv));
1553         if (!ndev) {
1554                 pr_err("cpsw: error allocating net_device\n");
1555                 return -ENOMEM;
1556         }
1557
1558         priv_sl2 = netdev_priv(ndev);
1559         spin_lock_init(&priv_sl2->lock);
1560         priv_sl2->data = *data;
1561         priv_sl2->pdev = pdev;
1562         priv_sl2->ndev = ndev;
1563         priv_sl2->dev  = &ndev->dev;
1564         priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
1565         priv_sl2->rx_packet_max = max(rx_packet_max, 128);
1566
1567         if (is_valid_ether_addr(data->slave_data[1].mac_addr)) {
1568                 memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr,
1569                         ETH_ALEN);
1570                 pr_info("cpsw: Detected MACID = %pM\n", priv_sl2->mac_addr);
1571         } else {
1572                 random_ether_addr(priv_sl2->mac_addr);
1573                 pr_info("cpsw: Random MACID = %pM\n", priv_sl2->mac_addr);
1574         }
1575         memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN);
1576
1577         priv_sl2->slaves = priv->slaves;
1578         priv_sl2->clk = priv->clk;
1579
1580         priv_sl2->coal_intvl = 0;
1581         priv_sl2->bus_freq_mhz = priv->bus_freq_mhz;
1582
1583         priv_sl2->cpsw_res = priv->cpsw_res;
1584         priv_sl2->regs = priv->regs;
1585         priv_sl2->host_port = priv->host_port;
1586         priv_sl2->host_port_regs = priv->host_port_regs;
1587         priv_sl2->wr_regs = priv->wr_regs;
1588         priv_sl2->dma = priv->dma;
1589         priv_sl2->txch = priv->txch;
1590         priv_sl2->rxch = priv->rxch;
1591         priv_sl2->ale = priv->ale;
1592         priv_sl2->emac_port = 1;
1593         priv->slaves[1].ndev = ndev;
1594         priv_sl2->cpts = priv->cpts;
1595         priv_sl2->version = priv->version;
1596
1597         for (i = 0; i < priv->num_irqs; i++) {
1598                 priv_sl2->irqs_table[i] = priv->irqs_table[i];
1599                 priv_sl2->num_irqs = priv->num_irqs;
1600         }
1601
1602         ndev->features |= NETIF_F_HW_VLAN_FILTER;
1603
1604         ndev->netdev_ops = &cpsw_netdev_ops;
1605         SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1606         netif_napi_add(ndev, &priv_sl2->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1607
1608         /* register the network device */
1609         SET_NETDEV_DEV(ndev, &pdev->dev);
1610         ret = register_netdev(ndev);
1611         if (ret) {
1612                 pr_err("cpsw: error registering net device\n");
1613                 free_netdev(ndev);
1614                 ret = -ENODEV;
1615         }
1616
1617         return ret;
1618 }
1619
1620 static int cpsw_probe(struct platform_device *pdev)
1621 {
1622         struct cpsw_platform_data       *data = pdev->dev.platform_data;
1623         struct net_device               *ndev;
1624         struct cpsw_priv                *priv;
1625         struct cpdma_params             dma_params;
1626         struct cpsw_ale_params          ale_params;
1627         void __iomem                    *ss_regs, *wr_regs;
1628         struct resource                 *res;
1629         u32 slave_offset, sliver_offset, slave_size;
1630         int ret = 0, i, k = 0;
1631
1632         ndev = alloc_etherdev(sizeof(struct cpsw_priv));
1633         if (!ndev) {
1634                 pr_err("error allocating net_device\n");
1635                 return -ENOMEM;
1636         }
1637
1638         platform_set_drvdata(pdev, ndev);
1639         priv = netdev_priv(ndev);
1640         spin_lock_init(&priv->lock);
1641         priv->pdev = pdev;
1642         priv->ndev = ndev;
1643         priv->dev  = &ndev->dev;
1644         priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
1645         priv->rx_packet_max = max(rx_packet_max, 128);
1646         priv->cpts = devm_kzalloc(&pdev->dev, sizeof(struct cpts), GFP_KERNEL);
1647         if (!ndev) {
1648                 pr_err("error allocating cpts\n");
1649                 goto clean_ndev_ret;
1650         }
1651
1652         /*
1653          * This may be required here for child devices.
1654          */
1655         pm_runtime_enable(&pdev->dev);
1656
1657         if (cpsw_probe_dt(&priv->data, pdev)) {
1658                 pr_err("cpsw: platform data missing\n");
1659                 ret = -ENODEV;
1660                 goto clean_ndev_ret;
1661         }
1662         data = &priv->data;
1663
1664         if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
1665                 memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
1666                 pr_info("Detected MACID = %pM", priv->mac_addr);
1667         } else {
1668                 eth_random_addr(priv->mac_addr);
1669                 pr_info("Random MACID = %pM", priv->mac_addr);
1670         }
1671
1672         memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
1673
1674         priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves,
1675                                GFP_KERNEL);
1676         if (!priv->slaves) {
1677                 ret = -EBUSY;
1678                 goto clean_ndev_ret;
1679         }
1680         for (i = 0; i < data->slaves; i++)
1681                 priv->slaves[i].slave_num = i;
1682
1683         priv->slaves[0].ndev = ndev;
1684         priv->emac_port = 0;
1685
1686         priv->clk = clk_get(&pdev->dev, "fck");
1687         if (IS_ERR(priv->clk)) {
1688                 dev_err(&pdev->dev, "fck is not found\n");
1689                 ret = -ENODEV;
1690                 goto clean_slave_ret;
1691         }
1692         priv->coal_intvl = 0;
1693         priv->bus_freq_mhz = clk_get_rate(priv->clk) / 1000000;
1694
1695         priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1696         if (!priv->cpsw_res) {
1697                 dev_err(priv->dev, "error getting i/o resource\n");
1698                 ret = -ENOENT;
1699                 goto clean_clk_ret;
1700         }
1701         if (!request_mem_region(priv->cpsw_res->start,
1702                                 resource_size(priv->cpsw_res), ndev->name)) {
1703                 dev_err(priv->dev, "failed request i/o region\n");
1704                 ret = -ENXIO;
1705                 goto clean_clk_ret;
1706         }
1707         ss_regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res));
1708         if (!ss_regs) {
1709                 dev_err(priv->dev, "unable to map i/o region\n");
1710                 goto clean_cpsw_iores_ret;
1711         }
1712         priv->regs = ss_regs;
1713         priv->version = __raw_readl(&priv->regs->id_ver);
1714         priv->host_port = HOST_PORT_NUM;
1715
1716         priv->cpsw_wr_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1717         if (!priv->cpsw_wr_res) {
1718                 dev_err(priv->dev, "error getting i/o resource\n");
1719                 ret = -ENOENT;
1720                 goto clean_iomap_ret;
1721         }
1722         if (!request_mem_region(priv->cpsw_wr_res->start,
1723                         resource_size(priv->cpsw_wr_res), ndev->name)) {
1724                 dev_err(priv->dev, "failed request i/o region\n");
1725                 ret = -ENXIO;
1726                 goto clean_iomap_ret;
1727         }
1728         wr_regs = ioremap(priv->cpsw_wr_res->start,
1729                                 resource_size(priv->cpsw_wr_res));
1730         if (!wr_regs) {
1731                 dev_err(priv->dev, "unable to map i/o region\n");
1732                 goto clean_cpsw_wr_iores_ret;
1733         }
1734         priv->wr_regs = wr_regs;
1735
1736         memset(&dma_params, 0, sizeof(dma_params));
1737         memset(&ale_params, 0, sizeof(ale_params));
1738
1739         switch (priv->version) {
1740         case CPSW_VERSION_1:
1741                 priv->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
1742                 priv->cpts->reg       = ss_regs + CPSW1_CPTS_OFFSET;
1743                 dma_params.dmaregs   = ss_regs + CPSW1_CPDMA_OFFSET;
1744                 dma_params.txhdp     = ss_regs + CPSW1_STATERAM_OFFSET;
1745                 ale_params.ale_regs  = ss_regs + CPSW1_ALE_OFFSET;
1746                 slave_offset         = CPSW1_SLAVE_OFFSET;
1747                 slave_size           = CPSW1_SLAVE_SIZE;
1748                 sliver_offset        = CPSW1_SLIVER_OFFSET;
1749                 dma_params.desc_mem_phys = 0;
1750                 break;
1751         case CPSW_VERSION_2:
1752                 priv->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
1753                 priv->cpts->reg       = ss_regs + CPSW2_CPTS_OFFSET;
1754                 dma_params.dmaregs   = ss_regs + CPSW2_CPDMA_OFFSET;
1755                 dma_params.txhdp     = ss_regs + CPSW2_STATERAM_OFFSET;
1756                 ale_params.ale_regs  = ss_regs + CPSW2_ALE_OFFSET;
1757                 slave_offset         = CPSW2_SLAVE_OFFSET;
1758                 slave_size           = CPSW2_SLAVE_SIZE;
1759                 sliver_offset        = CPSW2_SLIVER_OFFSET;
1760                 dma_params.desc_mem_phys =
1761                         (u32 __force) priv->cpsw_res->start + CPSW2_BD_OFFSET;
1762                 break;
1763         default:
1764                 dev_err(priv->dev, "unknown version 0x%08x\n", priv->version);
1765                 ret = -ENODEV;
1766                 goto clean_cpsw_wr_iores_ret;
1767         }
1768         for (i = 0; i < priv->data.slaves; i++) {
1769                 struct cpsw_slave *slave = &priv->slaves[i];
1770                 cpsw_slave_init(slave, priv, slave_offset, sliver_offset);
1771                 slave_offset  += slave_size;
1772                 sliver_offset += SLIVER_SIZE;
1773         }
1774
1775         dma_params.dev          = &pdev->dev;
1776         dma_params.rxthresh     = dma_params.dmaregs + CPDMA_RXTHRESH;
1777         dma_params.rxfree       = dma_params.dmaregs + CPDMA_RXFREE;
1778         dma_params.rxhdp        = dma_params.txhdp + CPDMA_RXHDP;
1779         dma_params.txcp         = dma_params.txhdp + CPDMA_TXCP;
1780         dma_params.rxcp         = dma_params.txhdp + CPDMA_RXCP;
1781
1782         dma_params.num_chan             = data->channels;
1783         dma_params.has_soft_reset       = true;
1784         dma_params.min_packet_size      = CPSW_MIN_PACKET_SIZE;
1785         dma_params.desc_mem_size        = data->bd_ram_size;
1786         dma_params.desc_align           = 16;
1787         dma_params.has_ext_regs         = true;
1788         dma_params.desc_hw_addr         = dma_params.desc_mem_phys;
1789
1790         priv->dma = cpdma_ctlr_create(&dma_params);
1791         if (!priv->dma) {
1792                 dev_err(priv->dev, "error initializing dma\n");
1793                 ret = -ENOMEM;
1794                 goto clean_wr_iomap_ret;
1795         }
1796
1797         priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0),
1798                                        cpsw_tx_handler);
1799         priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0),
1800                                        cpsw_rx_handler);
1801
1802         if (WARN_ON(!priv->txch || !priv->rxch)) {
1803                 dev_err(priv->dev, "error initializing dma channels\n");
1804                 ret = -ENOMEM;
1805                 goto clean_dma_ret;
1806         }
1807
1808         ale_params.dev                  = &ndev->dev;
1809         ale_params.ale_ageout           = ale_ageout;
1810         ale_params.ale_entries          = data->ale_entries;
1811         ale_params.ale_ports            = data->slaves;
1812
1813         priv->ale = cpsw_ale_create(&ale_params);
1814         if (!priv->ale) {
1815                 dev_err(priv->dev, "error initializing ale engine\n");
1816                 ret = -ENODEV;
1817                 goto clean_dma_ret;
1818         }
1819
1820         ndev->irq = platform_get_irq(pdev, 0);
1821         if (ndev->irq < 0) {
1822                 dev_err(priv->dev, "error getting irq resource\n");
1823                 ret = -ENOENT;
1824                 goto clean_ale_ret;
1825         }
1826
1827         while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) {
1828                 for (i = res->start; i <= res->end; i++) {
1829                         if (request_irq(i, cpsw_interrupt, IRQF_DISABLED,
1830                                         dev_name(&pdev->dev), priv)) {
1831                                 dev_err(priv->dev, "error attaching irq\n");
1832                                 goto clean_ale_ret;
1833                         }
1834                         priv->irqs_table[k] = i;
1835                         priv->num_irqs = k;
1836                 }
1837                 k++;
1838         }
1839
1840         ndev->features |= NETIF_F_HW_VLAN_FILTER;
1841
1842         ndev->netdev_ops = &cpsw_netdev_ops;
1843         SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops);
1844         netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT);
1845
1846         /* register the network device */
1847         SET_NETDEV_DEV(ndev, &pdev->dev);
1848         ret = register_netdev(ndev);
1849         if (ret) {
1850                 dev_err(priv->dev, "error registering net device\n");
1851                 ret = -ENODEV;
1852                 goto clean_irq_ret;
1853         }
1854
1855         if (cpts_register(&pdev->dev, priv->cpts,
1856                           data->cpts_clock_mult, data->cpts_clock_shift))
1857                 dev_err(priv->dev, "error registering cpts device\n");
1858
1859         cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n",
1860                   priv->cpsw_res->start, ndev->irq);
1861
1862         if (priv->data.dual_emac) {
1863                 ret = cpsw_probe_dual_emac(pdev, priv);
1864                 if (ret) {
1865                         cpsw_err(priv, probe, "error probe slave 2 emac interface\n");
1866                         goto clean_irq_ret;
1867                 }
1868         }
1869
1870         return 0;
1871
1872 clean_irq_ret:
1873         free_irq(ndev->irq, priv);
1874 clean_ale_ret:
1875         cpsw_ale_destroy(priv->ale);
1876 clean_dma_ret:
1877         cpdma_chan_destroy(priv->txch);
1878         cpdma_chan_destroy(priv->rxch);
1879         cpdma_ctlr_destroy(priv->dma);
1880 clean_wr_iomap_ret:
1881         iounmap(priv->wr_regs);
1882 clean_cpsw_wr_iores_ret:
1883         release_mem_region(priv->cpsw_wr_res->start,
1884                            resource_size(priv->cpsw_wr_res));
1885 clean_iomap_ret:
1886         iounmap(priv->regs);
1887 clean_cpsw_iores_ret:
1888         release_mem_region(priv->cpsw_res->start,
1889                            resource_size(priv->cpsw_res));
1890 clean_clk_ret:
1891         clk_put(priv->clk);
1892 clean_slave_ret:
1893         pm_runtime_disable(&pdev->dev);
1894         kfree(priv->slaves);
1895 clean_ndev_ret:
1896         free_netdev(ndev);
1897         return ret;
1898 }
1899
1900 static int cpsw_remove(struct platform_device *pdev)
1901 {
1902         struct net_device *ndev = platform_get_drvdata(pdev);
1903         struct cpsw_priv *priv = netdev_priv(ndev);
1904
1905         pr_info("removing device");
1906         platform_set_drvdata(pdev, NULL);
1907
1908         cpts_unregister(priv->cpts);
1909         free_irq(ndev->irq, priv);
1910         cpsw_ale_destroy(priv->ale);
1911         cpdma_chan_destroy(priv->txch);
1912         cpdma_chan_destroy(priv->rxch);
1913         cpdma_ctlr_destroy(priv->dma);
1914         iounmap(priv->regs);
1915         release_mem_region(priv->cpsw_res->start,
1916                            resource_size(priv->cpsw_res));
1917         iounmap(priv->wr_regs);
1918         release_mem_region(priv->cpsw_wr_res->start,
1919                            resource_size(priv->cpsw_wr_res));
1920         pm_runtime_disable(&pdev->dev);
1921         clk_put(priv->clk);
1922         kfree(priv->slaves);
1923         free_netdev(ndev);
1924
1925         return 0;
1926 }
1927
1928 static int cpsw_suspend(struct device *dev)
1929 {
1930         struct platform_device  *pdev = to_platform_device(dev);
1931         struct net_device       *ndev = platform_get_drvdata(pdev);
1932
1933         if (netif_running(ndev))
1934                 cpsw_ndo_stop(ndev);
1935         pm_runtime_put_sync(&pdev->dev);
1936
1937         return 0;
1938 }
1939
1940 static int cpsw_resume(struct device *dev)
1941 {
1942         struct platform_device  *pdev = to_platform_device(dev);
1943         struct net_device       *ndev = platform_get_drvdata(pdev);
1944
1945         pm_runtime_get_sync(&pdev->dev);
1946         if (netif_running(ndev))
1947                 cpsw_ndo_open(ndev);
1948         return 0;
1949 }
1950
1951 static const struct dev_pm_ops cpsw_pm_ops = {
1952         .suspend        = cpsw_suspend,
1953         .resume         = cpsw_resume,
1954 };
1955
1956 static const struct of_device_id cpsw_of_mtable[] = {
1957         { .compatible = "ti,cpsw", },
1958         { /* sentinel */ },
1959 };
1960
1961 static struct platform_driver cpsw_driver = {
1962         .driver = {
1963                 .name    = "cpsw",
1964                 .owner   = THIS_MODULE,
1965                 .pm      = &cpsw_pm_ops,
1966                 .of_match_table = of_match_ptr(cpsw_of_mtable),
1967         },
1968         .probe = cpsw_probe,
1969         .remove = cpsw_remove,
1970 };
1971
1972 static int __init cpsw_init(void)
1973 {
1974         return platform_driver_register(&cpsw_driver);
1975 }
1976 late_initcall(cpsw_init);
1977
1978 static void __exit cpsw_exit(void)
1979 {
1980         platform_driver_unregister(&cpsw_driver);
1981 }
1982 module_exit(cpsw_exit);
1983
1984 MODULE_LICENSE("GPL");
1985 MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
1986 MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
1987 MODULE_DESCRIPTION("TI CPSW Ethernet driver");