1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static bool separate_tx_channels;
109 module_param(separate_tx_channels, bool, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
120 * On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 * On Siena-based NICs for power systems with EEH support, this will give EEH a
126 static unsigned int efx_monitor_interval = 1 * HZ;
128 /* Initial interrupt moderation settings. They can be modified after
129 * module load with ethtool.
131 * The default for RX should strike a balance between increasing the
132 * round-trip latency and reducing overhead.
134 static unsigned int rx_irq_mod_usec = 60;
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
139 * This default is chosen to ensure that a 10G link does not go idle
140 * while a TX queue is stopped after it has become full. A queue is
141 * restarted when it drops below half full. The time this takes (assuming
142 * worst case 3 descriptors per packet and 1024 descriptors) is
143 * 512 / 3 * 1.2 = 205 usec.
145 static unsigned int tx_irq_mod_usec = 150;
147 /* This is the first interrupt mode to try out of:
152 static unsigned int interrupt_mode;
154 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
155 * i.e. the number of CPUs among which we may distribute simultaneous
156 * interrupt handling.
158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
159 * The default (0) means to assign an interrupt to each core.
161 static unsigned int rss_cpus;
162 module_param(rss_cpus, uint, 0444);
163 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
165 static bool phy_flash_cfg;
166 module_param(phy_flash_cfg, bool, 0644);
167 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
169 static unsigned irq_adapt_low_thresh = 8000;
170 module_param(irq_adapt_low_thresh, uint, 0644);
171 MODULE_PARM_DESC(irq_adapt_low_thresh,
172 "Threshold score for reducing IRQ moderation");
174 static unsigned irq_adapt_high_thresh = 16000;
175 module_param(irq_adapt_high_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_high_thresh,
177 "Threshold score for increasing IRQ moderation");
179 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
182 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
183 module_param(debug, uint, 0);
184 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
186 /**************************************************************************
188 * Utility functions and prototypes
190 *************************************************************************/
192 static int efx_soft_enable_interrupts(struct efx_nic *efx);
193 static void efx_soft_disable_interrupts(struct efx_nic *efx);
194 static void efx_remove_channel(struct efx_channel *channel);
195 static void efx_remove_channels(struct efx_nic *efx);
196 static const struct efx_channel_type efx_default_channel_type;
197 static void efx_remove_port(struct efx_nic *efx);
198 static void efx_init_napi_channel(struct efx_channel *channel);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_napi_channel(struct efx_channel *channel);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
207 if ((efx->state == STATE_READY) || \
208 (efx->state == STATE_RECOVERY) || \
209 (efx->state == STATE_DISABLED)) \
213 static int efx_check_disabled(struct efx_nic *efx)
215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
216 netif_err(efx, drv, efx->net_dev,
217 "device is disabled due to earlier errors\n");
223 /**************************************************************************
225 * Event queue processing
227 *************************************************************************/
229 /* Process channel's event queue
231 * This function is responsible for processing the event queue of a
232 * single channel. The caller must guarantee that this function will
233 * never be concurrently called more than once on the same channel,
234 * though different channels may be being processed concurrently.
236 static int efx_process_channel(struct efx_channel *channel, int budget)
240 if (unlikely(!channel->enabled))
243 spent = efx_nic_process_eventq(channel, budget);
244 if (spent && efx_channel_has_rx_queue(channel)) {
245 struct efx_rx_queue *rx_queue =
246 efx_channel_get_rx_queue(channel);
248 efx_rx_flush_packet(channel);
249 efx_fast_push_rx_descriptors(rx_queue);
257 * NAPI guarantees serialisation of polls of the same device, which
258 * provides the guarantee required by efx_process_channel().
260 static int efx_poll(struct napi_struct *napi, int budget)
262 struct efx_channel *channel =
263 container_of(napi, struct efx_channel, napi_str);
264 struct efx_nic *efx = channel->efx;
267 netif_vdbg(efx, intr, efx->net_dev,
268 "channel %d NAPI poll executing on CPU %d\n",
269 channel->channel, raw_smp_processor_id());
271 spent = efx_process_channel(channel, budget);
273 if (spent < budget) {
274 if (efx_channel_has_rx_queue(channel) &&
275 efx->irq_rx_adaptive &&
276 unlikely(++channel->irq_count == 1000)) {
277 if (unlikely(channel->irq_mod_score <
278 irq_adapt_low_thresh)) {
279 if (channel->irq_moderation > 1) {
280 channel->irq_moderation -= 1;
281 efx->type->push_irq_moderation(channel);
283 } else if (unlikely(channel->irq_mod_score >
284 irq_adapt_high_thresh)) {
285 if (channel->irq_moderation <
286 efx->irq_rx_moderation) {
287 channel->irq_moderation += 1;
288 efx->type->push_irq_moderation(channel);
291 channel->irq_count = 0;
292 channel->irq_mod_score = 0;
295 efx_filter_rfs_expire(channel);
297 /* There is no race here; although napi_disable() will
298 * only wait for napi_complete(), this isn't a problem
299 * since efx_nic_eventq_read_ack() will have no effect if
300 * interrupts have already been disabled.
303 efx_nic_eventq_read_ack(channel);
309 /* Create event queue
310 * Event queue memory allocations are done only once. If the channel
311 * is reset, the memory buffer will be reused; this guards against
312 * errors during channel reset and also simplifies interrupt handling.
314 static int efx_probe_eventq(struct efx_channel *channel)
316 struct efx_nic *efx = channel->efx;
317 unsigned long entries;
319 netif_dbg(efx, probe, efx->net_dev,
320 "chan %d create event queue\n", channel->channel);
322 /* Build an event queue with room for one event per tx and rx buffer,
323 * plus some extra for link state events and MCDI completions. */
324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
328 return efx_nic_probe_eventq(channel);
331 /* Prepare channel's event queue */
332 static int efx_init_eventq(struct efx_channel *channel)
336 EFX_WARN_ON_PARANOID(channel->eventq_init);
338 netif_dbg(channel->efx, drv, channel->efx->net_dev,
339 "chan %d init event queue\n", channel->channel);
341 rc = efx_nic_init_eventq(channel);
343 channel->eventq_read_ptr = 0;
344 channel->eventq_init = true;
349 /* Enable event queue processing and NAPI */
350 static void efx_start_eventq(struct efx_channel *channel)
352 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
353 "chan %d start event queue\n", channel->channel);
355 /* Make sure the NAPI handler sees the enabled flag set */
356 channel->enabled = true;
359 napi_enable(&channel->napi_str);
360 efx_nic_eventq_read_ack(channel);
363 /* Disable event queue processing and NAPI */
364 static void efx_stop_eventq(struct efx_channel *channel)
366 if (!channel->enabled)
369 napi_disable(&channel->napi_str);
370 channel->enabled = false;
373 static void efx_fini_eventq(struct efx_channel *channel)
375 if (!channel->eventq_init)
378 netif_dbg(channel->efx, drv, channel->efx->net_dev,
379 "chan %d fini event queue\n", channel->channel);
381 efx_nic_fini_eventq(channel);
382 channel->eventq_init = false;
385 static void efx_remove_eventq(struct efx_channel *channel)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d remove event queue\n", channel->channel);
390 efx_nic_remove_eventq(channel);
393 /**************************************************************************
397 *************************************************************************/
399 /* Allocate and initialise a channel structure. */
400 static struct efx_channel *
401 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
403 struct efx_channel *channel;
404 struct efx_rx_queue *rx_queue;
405 struct efx_tx_queue *tx_queue;
408 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
413 channel->channel = i;
414 channel->type = &efx_default_channel_type;
416 for (j = 0; j < EFX_TXQ_TYPES; j++) {
417 tx_queue = &channel->tx_queue[j];
419 tx_queue->queue = i * EFX_TXQ_TYPES + j;
420 tx_queue->channel = channel;
423 rx_queue = &channel->rx_queue;
425 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
426 (unsigned long)rx_queue);
431 /* Allocate and initialise a channel structure, copying parameters
432 * (but not resources) from an old channel structure.
434 static struct efx_channel *
435 efx_copy_channel(const struct efx_channel *old_channel)
437 struct efx_channel *channel;
438 struct efx_rx_queue *rx_queue;
439 struct efx_tx_queue *tx_queue;
442 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
446 *channel = *old_channel;
448 channel->napi_dev = NULL;
449 memset(&channel->eventq, 0, sizeof(channel->eventq));
451 for (j = 0; j < EFX_TXQ_TYPES; j++) {
452 tx_queue = &channel->tx_queue[j];
453 if (tx_queue->channel)
454 tx_queue->channel = channel;
455 tx_queue->buffer = NULL;
456 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
459 rx_queue = &channel->rx_queue;
460 rx_queue->buffer = NULL;
461 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
462 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
463 (unsigned long)rx_queue);
468 static int efx_probe_channel(struct efx_channel *channel)
470 struct efx_tx_queue *tx_queue;
471 struct efx_rx_queue *rx_queue;
474 netif_dbg(channel->efx, probe, channel->efx->net_dev,
475 "creating channel %d\n", channel->channel);
477 rc = channel->type->pre_probe(channel);
481 rc = efx_probe_eventq(channel);
485 efx_for_each_channel_tx_queue(tx_queue, channel) {
486 rc = efx_probe_tx_queue(tx_queue);
491 efx_for_each_channel_rx_queue(rx_queue, channel) {
492 rc = efx_probe_rx_queue(rx_queue);
497 channel->n_rx_frm_trunc = 0;
502 efx_remove_channel(channel);
507 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
509 struct efx_nic *efx = channel->efx;
513 number = channel->channel;
514 if (efx->tx_channel_offset == 0) {
516 } else if (channel->channel < efx->tx_channel_offset) {
520 number -= efx->tx_channel_offset;
522 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
525 static void efx_set_channel_names(struct efx_nic *efx)
527 struct efx_channel *channel;
529 efx_for_each_channel(channel, efx)
530 channel->type->get_name(channel,
531 efx->msi_context[channel->channel].name,
532 sizeof(efx->msi_context[0].name));
535 static int efx_probe_channels(struct efx_nic *efx)
537 struct efx_channel *channel;
540 /* Restart special buffer allocation */
541 efx->next_buffer_table = 0;
543 /* Probe channels in reverse, so that any 'extra' channels
544 * use the start of the buffer table. This allows the traffic
545 * channels to be resized without moving them or wasting the
546 * entries before them.
548 efx_for_each_channel_rev(channel, efx) {
549 rc = efx_probe_channel(channel);
551 netif_err(efx, probe, efx->net_dev,
552 "failed to create channel %d\n",
557 efx_set_channel_names(efx);
562 efx_remove_channels(efx);
566 /* Channels are shutdown and reinitialised whilst the NIC is running
567 * to propagate configuration changes (mtu, checksum offload), or
568 * to clear hardware error conditions
570 static void efx_start_datapath(struct efx_nic *efx)
572 bool old_rx_scatter = efx->rx_scatter;
573 struct efx_tx_queue *tx_queue;
574 struct efx_rx_queue *rx_queue;
575 struct efx_channel *channel;
578 /* Calculate the rx buffer allocation parameters required to
579 * support the current MTU, including padding for header
580 * alignment and overruns.
582 efx->rx_dma_len = (efx->rx_prefix_size +
583 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
584 efx->type->rx_buffer_padding);
585 rx_buf_len = (sizeof(struct efx_rx_page_state) +
586 NET_IP_ALIGN + efx->rx_dma_len);
587 if (rx_buf_len <= PAGE_SIZE) {
588 efx->rx_scatter = false;
589 efx->rx_buffer_order = 0;
590 } else if (efx->type->can_rx_scatter) {
591 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
592 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
593 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
594 EFX_RX_BUF_ALIGNMENT) >
596 efx->rx_scatter = true;
597 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
598 efx->rx_buffer_order = 0;
600 efx->rx_scatter = false;
601 efx->rx_buffer_order = get_order(rx_buf_len);
604 efx_rx_config_page_split(efx);
605 if (efx->rx_buffer_order)
606 netif_dbg(efx, drv, efx->net_dev,
607 "RX buf len=%u; page order=%u batch=%u\n",
608 efx->rx_dma_len, efx->rx_buffer_order,
609 efx->rx_pages_per_batch);
611 netif_dbg(efx, drv, efx->net_dev,
612 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
613 efx->rx_dma_len, efx->rx_page_buf_step,
614 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
616 /* RX filters also have scatter-enabled flags */
617 if (efx->rx_scatter != old_rx_scatter)
618 efx->type->filter_update_rx_scatter(efx);
620 /* We must keep at least one descriptor in a TX ring empty.
621 * We could avoid this when the queue size does not exactly
622 * match the hardware ring size, but it's not that important.
623 * Therefore we stop the queue when one more skb might fill
624 * the ring completely. We wake it when half way back to
627 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
628 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
630 /* Initialise the channels */
631 efx_for_each_channel(channel, efx) {
632 efx_for_each_channel_tx_queue(tx_queue, channel)
633 efx_init_tx_queue(tx_queue);
635 efx_for_each_channel_rx_queue(rx_queue, channel) {
636 efx_init_rx_queue(rx_queue);
637 efx_nic_generate_fill_event(rx_queue);
640 WARN_ON(channel->rx_pkt_n_frags);
643 if (netif_device_present(efx->net_dev))
644 netif_tx_wake_all_queues(efx->net_dev);
647 static void efx_stop_datapath(struct efx_nic *efx)
649 struct efx_channel *channel;
650 struct efx_tx_queue *tx_queue;
651 struct efx_rx_queue *rx_queue;
654 EFX_ASSERT_RESET_SERIALISED(efx);
655 BUG_ON(efx->port_enabled);
658 efx_for_each_channel(channel, efx) {
659 efx_for_each_channel_rx_queue(rx_queue, channel)
660 rx_queue->refill_enabled = false;
663 efx_for_each_channel(channel, efx) {
664 /* RX packet processing is pipelined, so wait for the
665 * NAPI handler to complete. At least event queue 0
666 * might be kept active by non-data events, so don't
667 * use napi_synchronize() but actually disable NAPI
670 if (efx_channel_has_rx_queue(channel)) {
671 efx_stop_eventq(channel);
672 efx_start_eventq(channel);
676 rc = efx->type->fini_dmaq(efx);
677 if (rc && EFX_WORKAROUND_7803(efx)) {
678 /* Schedule a reset to recover from the flush failure. The
679 * descriptor caches reference memory we're about to free,
680 * but falcon_reconfigure_mac_wrapper() won't reconnect
681 * the MACs because of the pending reset.
683 netif_err(efx, drv, efx->net_dev,
684 "Resetting to recover from flush failure\n");
685 efx_schedule_reset(efx, RESET_TYPE_ALL);
687 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
689 netif_dbg(efx, drv, efx->net_dev,
690 "successfully flushed all queues\n");
693 efx_for_each_channel(channel, efx) {
694 efx_for_each_channel_rx_queue(rx_queue, channel)
695 efx_fini_rx_queue(rx_queue);
696 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
697 efx_fini_tx_queue(tx_queue);
701 static void efx_remove_channel(struct efx_channel *channel)
703 struct efx_tx_queue *tx_queue;
704 struct efx_rx_queue *rx_queue;
706 netif_dbg(channel->efx, drv, channel->efx->net_dev,
707 "destroy chan %d\n", channel->channel);
709 efx_for_each_channel_rx_queue(rx_queue, channel)
710 efx_remove_rx_queue(rx_queue);
711 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
712 efx_remove_tx_queue(tx_queue);
713 efx_remove_eventq(channel);
714 channel->type->post_remove(channel);
717 static void efx_remove_channels(struct efx_nic *efx)
719 struct efx_channel *channel;
721 efx_for_each_channel(channel, efx)
722 efx_remove_channel(channel);
726 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
728 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
729 u32 old_rxq_entries, old_txq_entries;
730 unsigned i, next_buffer_table = 0;
733 rc = efx_check_disabled(efx);
737 /* Not all channels should be reallocated. We must avoid
738 * reallocating their buffer table entries.
740 efx_for_each_channel(channel, efx) {
741 struct efx_rx_queue *rx_queue;
742 struct efx_tx_queue *tx_queue;
744 if (channel->type->copy)
746 next_buffer_table = max(next_buffer_table,
747 channel->eventq.index +
748 channel->eventq.entries);
749 efx_for_each_channel_rx_queue(rx_queue, channel)
750 next_buffer_table = max(next_buffer_table,
751 rx_queue->rxd.index +
752 rx_queue->rxd.entries);
753 efx_for_each_channel_tx_queue(tx_queue, channel)
754 next_buffer_table = max(next_buffer_table,
755 tx_queue->txd.index +
756 tx_queue->txd.entries);
759 efx_device_detach_sync(efx);
761 efx_soft_disable_interrupts(efx);
763 /* Clone channels (where possible) */
764 memset(other_channel, 0, sizeof(other_channel));
765 for (i = 0; i < efx->n_channels; i++) {
766 channel = efx->channel[i];
767 if (channel->type->copy)
768 channel = channel->type->copy(channel);
773 other_channel[i] = channel;
776 /* Swap entry counts and channel pointers */
777 old_rxq_entries = efx->rxq_entries;
778 old_txq_entries = efx->txq_entries;
779 efx->rxq_entries = rxq_entries;
780 efx->txq_entries = txq_entries;
781 for (i = 0; i < efx->n_channels; i++) {
782 channel = efx->channel[i];
783 efx->channel[i] = other_channel[i];
784 other_channel[i] = channel;
787 /* Restart buffer table allocation */
788 efx->next_buffer_table = next_buffer_table;
790 for (i = 0; i < efx->n_channels; i++) {
791 channel = efx->channel[i];
792 if (!channel->type->copy)
794 rc = efx_probe_channel(channel);
797 efx_init_napi_channel(efx->channel[i]);
801 /* Destroy unused channel structures */
802 for (i = 0; i < efx->n_channels; i++) {
803 channel = other_channel[i];
804 if (channel && channel->type->copy) {
805 efx_fini_napi_channel(channel);
806 efx_remove_channel(channel);
811 rc2 = efx_soft_enable_interrupts(efx);
814 netif_err(efx, drv, efx->net_dev,
815 "unable to restart interrupts on channel reallocation\n");
816 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
819 netif_device_attach(efx->net_dev);
825 efx->rxq_entries = old_rxq_entries;
826 efx->txq_entries = old_txq_entries;
827 for (i = 0; i < efx->n_channels; i++) {
828 channel = efx->channel[i];
829 efx->channel[i] = other_channel[i];
830 other_channel[i] = channel;
835 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
837 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
840 static const struct efx_channel_type efx_default_channel_type = {
841 .pre_probe = efx_channel_dummy_op_int,
842 .post_remove = efx_channel_dummy_op_void,
843 .get_name = efx_get_channel_name,
844 .copy = efx_copy_channel,
845 .keep_eventq = false,
848 int efx_channel_dummy_op_int(struct efx_channel *channel)
853 void efx_channel_dummy_op_void(struct efx_channel *channel)
857 /**************************************************************************
861 **************************************************************************/
863 /* This ensures that the kernel is kept informed (via
864 * netif_carrier_on/off) of the link status, and also maintains the
865 * link status's stop on the port's TX queue.
867 void efx_link_status_changed(struct efx_nic *efx)
869 struct efx_link_state *link_state = &efx->link_state;
871 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
872 * that no events are triggered between unregister_netdev() and the
873 * driver unloading. A more general condition is that NETDEV_CHANGE
874 * can only be generated between NETDEV_UP and NETDEV_DOWN */
875 if (!netif_running(efx->net_dev))
878 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
879 efx->n_link_state_changes++;
882 netif_carrier_on(efx->net_dev);
884 netif_carrier_off(efx->net_dev);
887 /* Status message for kernel log */
889 netif_info(efx, link, efx->net_dev,
890 "link up at %uMbps %s-duplex (MTU %d)\n",
891 link_state->speed, link_state->fd ? "full" : "half",
894 netif_info(efx, link, efx->net_dev, "link down\n");
897 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
899 efx->link_advertising = advertising;
901 if (advertising & ADVERTISED_Pause)
902 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
904 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
905 if (advertising & ADVERTISED_Asym_Pause)
906 efx->wanted_fc ^= EFX_FC_TX;
910 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
912 efx->wanted_fc = wanted_fc;
913 if (efx->link_advertising) {
914 if (wanted_fc & EFX_FC_RX)
915 efx->link_advertising |= (ADVERTISED_Pause |
916 ADVERTISED_Asym_Pause);
918 efx->link_advertising &= ~(ADVERTISED_Pause |
919 ADVERTISED_Asym_Pause);
920 if (wanted_fc & EFX_FC_TX)
921 efx->link_advertising ^= ADVERTISED_Asym_Pause;
925 static void efx_fini_port(struct efx_nic *efx);
927 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
928 * the MAC appropriately. All other PHY configuration changes are pushed
929 * through phy_op->set_settings(), and pushed asynchronously to the MAC
930 * through efx_monitor().
932 * Callers must hold the mac_lock
934 int __efx_reconfigure_port(struct efx_nic *efx)
936 enum efx_phy_mode phy_mode;
939 WARN_ON(!mutex_is_locked(&efx->mac_lock));
941 /* Disable PHY transmit in mac level loopbacks */
942 phy_mode = efx->phy_mode;
943 if (LOOPBACK_INTERNAL(efx))
944 efx->phy_mode |= PHY_MODE_TX_DISABLED;
946 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
948 rc = efx->type->reconfigure_port(efx);
951 efx->phy_mode = phy_mode;
956 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
958 int efx_reconfigure_port(struct efx_nic *efx)
962 EFX_ASSERT_RESET_SERIALISED(efx);
964 mutex_lock(&efx->mac_lock);
965 rc = __efx_reconfigure_port(efx);
966 mutex_unlock(&efx->mac_lock);
971 /* Asynchronous work item for changing MAC promiscuity and multicast
972 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
974 static void efx_mac_work(struct work_struct *data)
976 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
978 mutex_lock(&efx->mac_lock);
979 if (efx->port_enabled)
980 efx->type->reconfigure_mac(efx);
981 mutex_unlock(&efx->mac_lock);
984 static int efx_probe_port(struct efx_nic *efx)
988 netif_dbg(efx, probe, efx->net_dev, "create port\n");
991 efx->phy_mode = PHY_MODE_SPECIAL;
993 /* Connect up MAC/PHY operations table */
994 rc = efx->type->probe_port(efx);
998 /* Initialise MAC address to permanent address */
999 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1004 static int efx_init_port(struct efx_nic *efx)
1008 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1010 mutex_lock(&efx->mac_lock);
1012 rc = efx->phy_op->init(efx);
1016 efx->port_initialized = true;
1018 /* Reconfigure the MAC before creating dma queues (required for
1019 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1020 efx->type->reconfigure_mac(efx);
1022 /* Ensure the PHY advertises the correct flow control settings */
1023 rc = efx->phy_op->reconfigure(efx);
1027 mutex_unlock(&efx->mac_lock);
1031 efx->phy_op->fini(efx);
1033 mutex_unlock(&efx->mac_lock);
1037 static void efx_start_port(struct efx_nic *efx)
1039 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1040 BUG_ON(efx->port_enabled);
1042 mutex_lock(&efx->mac_lock);
1043 efx->port_enabled = true;
1045 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1046 * and then cancelled by efx_flush_all() */
1047 efx->type->reconfigure_mac(efx);
1049 mutex_unlock(&efx->mac_lock);
1052 /* Prevent efx_mac_work() and efx_monitor() from working */
1053 static void efx_stop_port(struct efx_nic *efx)
1055 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1057 mutex_lock(&efx->mac_lock);
1058 efx->port_enabled = false;
1059 mutex_unlock(&efx->mac_lock);
1061 /* Serialise against efx_set_multicast_list() */
1062 netif_addr_lock_bh(efx->net_dev);
1063 netif_addr_unlock_bh(efx->net_dev);
1066 static void efx_fini_port(struct efx_nic *efx)
1068 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1070 if (!efx->port_initialized)
1073 efx->phy_op->fini(efx);
1074 efx->port_initialized = false;
1076 efx->link_state.up = false;
1077 efx_link_status_changed(efx);
1080 static void efx_remove_port(struct efx_nic *efx)
1082 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1084 efx->type->remove_port(efx);
1087 /**************************************************************************
1091 **************************************************************************/
1093 /* This configures the PCI device to enable I/O and DMA. */
1094 static int efx_init_io(struct efx_nic *efx)
1096 struct pci_dev *pci_dev = efx->pci_dev;
1097 dma_addr_t dma_mask = efx->type->max_dma_mask;
1098 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1101 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1103 rc = pci_enable_device(pci_dev);
1105 netif_err(efx, probe, efx->net_dev,
1106 "failed to enable PCI device\n");
1110 pci_set_master(pci_dev);
1112 /* Set the PCI DMA mask. Try all possibilities from our
1113 * genuine mask down to 32 bits, because some architectures
1114 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1115 * masks event though they reject 46 bit masks.
1117 while (dma_mask > 0x7fffffffUL) {
1118 if (dma_supported(&pci_dev->dev, dma_mask)) {
1119 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1126 netif_err(efx, probe, efx->net_dev,
1127 "could not find a suitable DMA mask\n");
1130 netif_dbg(efx, probe, efx->net_dev,
1131 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1132 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1134 /* dma_set_coherent_mask() is not *allowed* to
1135 * fail with a mask that dma_set_mask() accepted,
1136 * but just in case...
1138 netif_err(efx, probe, efx->net_dev,
1139 "failed to set consistent DMA mask\n");
1143 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1144 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1146 netif_err(efx, probe, efx->net_dev,
1147 "request for memory BAR failed\n");
1151 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1152 if (!efx->membase) {
1153 netif_err(efx, probe, efx->net_dev,
1154 "could not map memory BAR at %llx+%x\n",
1155 (unsigned long long)efx->membase_phys, mem_map_size);
1159 netif_dbg(efx, probe, efx->net_dev,
1160 "memory BAR at %llx+%x (virtual %p)\n",
1161 (unsigned long long)efx->membase_phys, mem_map_size,
1167 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1169 efx->membase_phys = 0;
1171 pci_disable_device(efx->pci_dev);
1176 static void efx_fini_io(struct efx_nic *efx)
1178 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1181 iounmap(efx->membase);
1182 efx->membase = NULL;
1185 if (efx->membase_phys) {
1186 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1187 efx->membase_phys = 0;
1190 pci_disable_device(efx->pci_dev);
1193 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1195 cpumask_var_t thread_mask;
1202 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1203 netif_warn(efx, probe, efx->net_dev,
1204 "RSS disabled due to allocation failure\n");
1209 for_each_online_cpu(cpu) {
1210 if (!cpumask_test_cpu(cpu, thread_mask)) {
1212 cpumask_or(thread_mask, thread_mask,
1213 topology_thread_cpumask(cpu));
1217 free_cpumask_var(thread_mask);
1220 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1221 * table entries that are inaccessible to VFs
1223 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1224 count > efx_vf_size(efx)) {
1225 netif_warn(efx, probe, efx->net_dev,
1226 "Reducing number of RSS channels from %u to %u for "
1227 "VF support. Increase vf-msix-limit to use more "
1228 "channels on the PF.\n",
1229 count, efx_vf_size(efx));
1230 count = efx_vf_size(efx);
1236 /* Probe the number and type of interrupts we are able to obtain, and
1237 * the resulting numbers of channels and RX queues.
1239 static int efx_probe_interrupts(struct efx_nic *efx)
1241 unsigned int extra_channels = 0;
1245 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1246 if (efx->extra_channel_type[i])
1249 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1250 struct msix_entry xentries[EFX_MAX_CHANNELS];
1251 unsigned int n_channels;
1253 n_channels = efx_wanted_parallelism(efx);
1254 if (separate_tx_channels)
1256 n_channels += extra_channels;
1257 n_channels = min(n_channels, efx->max_channels);
1259 for (i = 0; i < n_channels; i++)
1260 xentries[i].entry = i;
1261 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1263 netif_err(efx, drv, efx->net_dev,
1264 "WARNING: Insufficient MSI-X vectors"
1265 " available (%d < %u).\n", rc, n_channels);
1266 netif_err(efx, drv, efx->net_dev,
1267 "WARNING: Performance may be reduced.\n");
1268 EFX_BUG_ON_PARANOID(rc >= n_channels);
1270 rc = pci_enable_msix(efx->pci_dev, xentries,
1275 efx->n_channels = n_channels;
1276 if (n_channels > extra_channels)
1277 n_channels -= extra_channels;
1278 if (separate_tx_channels) {
1279 efx->n_tx_channels = max(n_channels / 2, 1U);
1280 efx->n_rx_channels = max(n_channels -
1284 efx->n_tx_channels = n_channels;
1285 efx->n_rx_channels = n_channels;
1287 for (i = 0; i < efx->n_channels; i++)
1288 efx_get_channel(efx, i)->irq =
1291 /* Fall back to single channel MSI */
1292 efx->interrupt_mode = EFX_INT_MODE_MSI;
1293 netif_err(efx, drv, efx->net_dev,
1294 "could not enable MSI-X\n");
1298 /* Try single interrupt MSI */
1299 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1300 efx->n_channels = 1;
1301 efx->n_rx_channels = 1;
1302 efx->n_tx_channels = 1;
1303 rc = pci_enable_msi(efx->pci_dev);
1305 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1307 netif_err(efx, drv, efx->net_dev,
1308 "could not enable MSI\n");
1309 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1313 /* Assume legacy interrupts */
1314 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1315 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1316 efx->n_rx_channels = 1;
1317 efx->n_tx_channels = 1;
1318 efx->legacy_irq = efx->pci_dev->irq;
1321 /* Assign extra channels if possible */
1322 j = efx->n_channels;
1323 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1324 if (!efx->extra_channel_type[i])
1326 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1327 efx->n_channels <= extra_channels) {
1328 efx->extra_channel_type[i]->handle_no_channel(efx);
1331 efx_get_channel(efx, j)->type =
1332 efx->extra_channel_type[i];
1336 /* RSS might be usable on VFs even if it is disabled on the PF */
1337 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1338 efx->n_rx_channels : efx_vf_size(efx));
1343 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1345 struct efx_channel *channel, *end_channel;
1348 BUG_ON(efx->state == STATE_DISABLED);
1350 efx->irq_soft_enabled = true;
1353 efx_for_each_channel(channel, efx) {
1354 if (!channel->type->keep_eventq) {
1355 rc = efx_init_eventq(channel);
1359 efx_start_eventq(channel);
1362 efx_mcdi_mode_event(efx);
1366 end_channel = channel;
1367 efx_for_each_channel(channel, efx) {
1368 if (channel == end_channel)
1370 efx_stop_eventq(channel);
1371 if (!channel->type->keep_eventq)
1372 efx_fini_eventq(channel);
1378 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1380 struct efx_channel *channel;
1382 if (efx->state == STATE_DISABLED)
1385 efx_mcdi_mode_poll(efx);
1387 efx->irq_soft_enabled = false;
1390 if (efx->legacy_irq)
1391 synchronize_irq(efx->legacy_irq);
1393 efx_for_each_channel(channel, efx) {
1395 synchronize_irq(channel->irq);
1397 efx_stop_eventq(channel);
1398 if (!channel->type->keep_eventq)
1399 efx_fini_eventq(channel);
1402 /* Flush the asynchronous MCDI request queue */
1403 efx_mcdi_flush_async(efx);
1406 static int efx_enable_interrupts(struct efx_nic *efx)
1408 struct efx_channel *channel, *end_channel;
1411 BUG_ON(efx->state == STATE_DISABLED);
1413 if (efx->eeh_disabled_legacy_irq) {
1414 enable_irq(efx->legacy_irq);
1415 efx->eeh_disabled_legacy_irq = false;
1418 efx->type->irq_enable_master(efx);
1420 efx_for_each_channel(channel, efx) {
1421 if (channel->type->keep_eventq) {
1422 rc = efx_init_eventq(channel);
1428 rc = efx_soft_enable_interrupts(efx);
1435 end_channel = channel;
1436 efx_for_each_channel(channel, efx) {
1437 if (channel == end_channel)
1439 if (channel->type->keep_eventq)
1440 efx_fini_eventq(channel);
1443 efx->type->irq_disable_non_ev(efx);
1448 static void efx_disable_interrupts(struct efx_nic *efx)
1450 struct efx_channel *channel;
1452 efx_soft_disable_interrupts(efx);
1454 efx_for_each_channel(channel, efx) {
1455 if (channel->type->keep_eventq)
1456 efx_fini_eventq(channel);
1459 efx->type->irq_disable_non_ev(efx);
1462 static void efx_remove_interrupts(struct efx_nic *efx)
1464 struct efx_channel *channel;
1466 /* Remove MSI/MSI-X interrupts */
1467 efx_for_each_channel(channel, efx)
1469 pci_disable_msi(efx->pci_dev);
1470 pci_disable_msix(efx->pci_dev);
1472 /* Remove legacy interrupt */
1473 efx->legacy_irq = 0;
1476 static void efx_set_channels(struct efx_nic *efx)
1478 struct efx_channel *channel;
1479 struct efx_tx_queue *tx_queue;
1481 efx->tx_channel_offset =
1482 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1484 /* We need to mark which channels really have RX and TX
1485 * queues, and adjust the TX queue numbers if we have separate
1486 * RX-only and TX-only channels.
1488 efx_for_each_channel(channel, efx) {
1489 if (channel->channel < efx->n_rx_channels)
1490 channel->rx_queue.core_index = channel->channel;
1492 channel->rx_queue.core_index = -1;
1494 efx_for_each_channel_tx_queue(tx_queue, channel)
1495 tx_queue->queue -= (efx->tx_channel_offset *
1500 static int efx_probe_nic(struct efx_nic *efx)
1505 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1507 /* Carry out hardware-type specific initialisation */
1508 rc = efx->type->probe(efx);
1512 /* Determine the number of channels and queues by trying to hook
1513 * in MSI-X interrupts. */
1514 rc = efx_probe_interrupts(efx);
1518 rc = efx->type->dimension_resources(efx);
1522 if (efx->n_channels > 1)
1523 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1524 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1525 efx->rx_indir_table[i] =
1526 ethtool_rxfh_indir_default(i, efx->rss_spread);
1528 efx_set_channels(efx);
1529 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1530 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1532 /* Initialise the interrupt moderation settings */
1533 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1539 efx_remove_interrupts(efx);
1541 efx->type->remove(efx);
1545 static void efx_remove_nic(struct efx_nic *efx)
1547 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1549 efx_remove_interrupts(efx);
1550 efx->type->remove(efx);
1553 static int efx_probe_filters(struct efx_nic *efx)
1557 spin_lock_init(&efx->filter_lock);
1559 rc = efx->type->filter_table_probe(efx);
1563 #ifdef CONFIG_RFS_ACCEL
1564 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1565 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1566 sizeof(*efx->rps_flow_id),
1568 if (!efx->rps_flow_id) {
1569 efx->type->filter_table_remove(efx);
1578 static void efx_remove_filters(struct efx_nic *efx)
1580 #ifdef CONFIG_RFS_ACCEL
1581 kfree(efx->rps_flow_id);
1583 efx->type->filter_table_remove(efx);
1586 static void efx_restore_filters(struct efx_nic *efx)
1588 efx->type->filter_table_restore(efx);
1591 /**************************************************************************
1593 * NIC startup/shutdown
1595 *************************************************************************/
1597 static int efx_probe_all(struct efx_nic *efx)
1601 rc = efx_probe_nic(efx);
1603 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1607 rc = efx_probe_port(efx);
1609 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1613 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1614 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1618 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1620 rc = efx_probe_filters(efx);
1622 netif_err(efx, probe, efx->net_dev,
1623 "failed to create filter tables\n");
1627 rc = efx_probe_channels(efx);
1634 efx_remove_filters(efx);
1636 efx_remove_port(efx);
1638 efx_remove_nic(efx);
1643 /* If the interface is supposed to be running but is not, start
1644 * the hardware and software data path, regular activity for the port
1645 * (MAC statistics, link polling, etc.) and schedule the port to be
1646 * reconfigured. Interrupts must already be enabled. This function
1647 * is safe to call multiple times, so long as the NIC is not disabled.
1648 * Requires the RTNL lock.
1650 static void efx_start_all(struct efx_nic *efx)
1652 EFX_ASSERT_RESET_SERIALISED(efx);
1653 BUG_ON(efx->state == STATE_DISABLED);
1655 /* Check that it is appropriate to restart the interface. All
1656 * of these flags are safe to read under just the rtnl lock */
1657 if (efx->port_enabled || !netif_running(efx->net_dev))
1660 efx_start_port(efx);
1661 efx_start_datapath(efx);
1663 /* Start the hardware monitor if there is one */
1664 if (efx->type->monitor != NULL)
1665 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1666 efx_monitor_interval);
1668 /* If link state detection is normally event-driven, we have
1669 * to poll now because we could have missed a change
1671 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1672 mutex_lock(&efx->mac_lock);
1673 if (efx->phy_op->poll(efx))
1674 efx_link_status_changed(efx);
1675 mutex_unlock(&efx->mac_lock);
1678 efx->type->start_stats(efx);
1681 /* Flush all delayed work. Should only be called when no more delayed work
1682 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1683 * since we're holding the rtnl_lock at this point. */
1684 static void efx_flush_all(struct efx_nic *efx)
1686 /* Make sure the hardware monitor and event self-test are stopped */
1687 cancel_delayed_work_sync(&efx->monitor_work);
1688 efx_selftest_async_cancel(efx);
1689 /* Stop scheduled port reconfigurations */
1690 cancel_work_sync(&efx->mac_work);
1693 /* Quiesce the hardware and software data path, and regular activity
1694 * for the port without bringing the link down. Safe to call multiple
1695 * times with the NIC in almost any state, but interrupts should be
1696 * enabled. Requires the RTNL lock.
1698 static void efx_stop_all(struct efx_nic *efx)
1700 EFX_ASSERT_RESET_SERIALISED(efx);
1702 /* port_enabled can be read safely under the rtnl lock */
1703 if (!efx->port_enabled)
1706 efx->type->stop_stats(efx);
1709 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1712 /* Stop the kernel transmit interface. This is only valid if
1713 * the device is stopped or detached; otherwise the watchdog
1714 * may fire immediately.
1716 WARN_ON(netif_running(efx->net_dev) &&
1717 netif_device_present(efx->net_dev));
1718 netif_tx_disable(efx->net_dev);
1720 efx_stop_datapath(efx);
1723 static void efx_remove_all(struct efx_nic *efx)
1725 efx_remove_channels(efx);
1726 efx_remove_filters(efx);
1727 efx_remove_port(efx);
1728 efx_remove_nic(efx);
1731 /**************************************************************************
1733 * Interrupt moderation
1735 **************************************************************************/
1737 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1741 if (usecs * 1000 < quantum_ns)
1742 return 1; /* never round down to 0 */
1743 return usecs * 1000 / quantum_ns;
1746 /* Set interrupt moderation parameters */
1747 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1748 unsigned int rx_usecs, bool rx_adaptive,
1749 bool rx_may_override_tx)
1751 struct efx_channel *channel;
1752 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1753 efx->timer_quantum_ns,
1755 unsigned int tx_ticks;
1756 unsigned int rx_ticks;
1758 EFX_ASSERT_RESET_SERIALISED(efx);
1760 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1763 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1764 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1766 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1767 !rx_may_override_tx) {
1768 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1769 "RX and TX IRQ moderation must be equal\n");
1773 efx->irq_rx_adaptive = rx_adaptive;
1774 efx->irq_rx_moderation = rx_ticks;
1775 efx_for_each_channel(channel, efx) {
1776 if (efx_channel_has_rx_queue(channel))
1777 channel->irq_moderation = rx_ticks;
1778 else if (efx_channel_has_tx_queues(channel))
1779 channel->irq_moderation = tx_ticks;
1785 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1786 unsigned int *rx_usecs, bool *rx_adaptive)
1788 /* We must round up when converting ticks to microseconds
1789 * because we round down when converting the other way.
1792 *rx_adaptive = efx->irq_rx_adaptive;
1793 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1794 efx->timer_quantum_ns,
1797 /* If channels are shared between RX and TX, so is IRQ
1798 * moderation. Otherwise, IRQ moderation is the same for all
1799 * TX channels and is not adaptive.
1801 if (efx->tx_channel_offset == 0)
1802 *tx_usecs = *rx_usecs;
1804 *tx_usecs = DIV_ROUND_UP(
1805 efx->channel[efx->tx_channel_offset]->irq_moderation *
1806 efx->timer_quantum_ns,
1810 /**************************************************************************
1814 **************************************************************************/
1816 /* Run periodically off the general workqueue */
1817 static void efx_monitor(struct work_struct *data)
1819 struct efx_nic *efx = container_of(data, struct efx_nic,
1822 netif_vdbg(efx, timer, efx->net_dev,
1823 "hardware monitor executing on CPU %d\n",
1824 raw_smp_processor_id());
1825 BUG_ON(efx->type->monitor == NULL);
1827 /* If the mac_lock is already held then it is likely a port
1828 * reconfiguration is already in place, which will likely do
1829 * most of the work of monitor() anyway. */
1830 if (mutex_trylock(&efx->mac_lock)) {
1831 if (efx->port_enabled)
1832 efx->type->monitor(efx);
1833 mutex_unlock(&efx->mac_lock);
1836 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1837 efx_monitor_interval);
1840 /**************************************************************************
1844 *************************************************************************/
1847 * Context: process, rtnl_lock() held.
1849 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1851 struct efx_nic *efx = netdev_priv(net_dev);
1852 struct mii_ioctl_data *data = if_mii(ifr);
1854 if (cmd == SIOCSHWTSTAMP)
1855 return efx_ptp_ioctl(efx, ifr, cmd);
1857 /* Convert phy_id from older PRTAD/DEVAD format */
1858 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1859 (data->phy_id & 0xfc00) == 0x0400)
1860 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1862 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1865 /**************************************************************************
1869 **************************************************************************/
1871 static void efx_init_napi_channel(struct efx_channel *channel)
1873 struct efx_nic *efx = channel->efx;
1875 channel->napi_dev = efx->net_dev;
1876 netif_napi_add(channel->napi_dev, &channel->napi_str,
1877 efx_poll, napi_weight);
1880 static void efx_init_napi(struct efx_nic *efx)
1882 struct efx_channel *channel;
1884 efx_for_each_channel(channel, efx)
1885 efx_init_napi_channel(channel);
1888 static void efx_fini_napi_channel(struct efx_channel *channel)
1890 if (channel->napi_dev)
1891 netif_napi_del(&channel->napi_str);
1892 channel->napi_dev = NULL;
1895 static void efx_fini_napi(struct efx_nic *efx)
1897 struct efx_channel *channel;
1899 efx_for_each_channel(channel, efx)
1900 efx_fini_napi_channel(channel);
1903 /**************************************************************************
1905 * Kernel netpoll interface
1907 *************************************************************************/
1909 #ifdef CONFIG_NET_POLL_CONTROLLER
1911 /* Although in the common case interrupts will be disabled, this is not
1912 * guaranteed. However, all our work happens inside the NAPI callback,
1913 * so no locking is required.
1915 static void efx_netpoll(struct net_device *net_dev)
1917 struct efx_nic *efx = netdev_priv(net_dev);
1918 struct efx_channel *channel;
1920 efx_for_each_channel(channel, efx)
1921 efx_schedule_channel(channel);
1926 /**************************************************************************
1928 * Kernel net device interface
1930 *************************************************************************/
1932 /* Context: process, rtnl_lock() held. */
1933 static int efx_net_open(struct net_device *net_dev)
1935 struct efx_nic *efx = netdev_priv(net_dev);
1938 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1939 raw_smp_processor_id());
1941 rc = efx_check_disabled(efx);
1944 if (efx->phy_mode & PHY_MODE_SPECIAL)
1946 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1949 /* Notify the kernel of the link state polled during driver load,
1950 * before the monitor starts running */
1951 efx_link_status_changed(efx);
1954 efx_selftest_async_start(efx);
1958 /* Context: process, rtnl_lock() held.
1959 * Note that the kernel will ignore our return code; this method
1960 * should really be a void.
1962 static int efx_net_stop(struct net_device *net_dev)
1964 struct efx_nic *efx = netdev_priv(net_dev);
1966 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1967 raw_smp_processor_id());
1969 /* Stop the device and flush all the channels */
1975 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1976 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1977 struct rtnl_link_stats64 *stats)
1979 struct efx_nic *efx = netdev_priv(net_dev);
1981 spin_lock_bh(&efx->stats_lock);
1982 efx->type->update_stats(efx, NULL, stats);
1983 spin_unlock_bh(&efx->stats_lock);
1988 /* Context: netif_tx_lock held, BHs disabled. */
1989 static void efx_watchdog(struct net_device *net_dev)
1991 struct efx_nic *efx = netdev_priv(net_dev);
1993 netif_err(efx, tx_err, efx->net_dev,
1994 "TX stuck with port_enabled=%d: resetting channels\n",
1997 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2001 /* Context: process, rtnl_lock() held. */
2002 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2004 struct efx_nic *efx = netdev_priv(net_dev);
2007 rc = efx_check_disabled(efx);
2010 if (new_mtu > EFX_MAX_MTU)
2013 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2015 efx_device_detach_sync(efx);
2018 mutex_lock(&efx->mac_lock);
2019 net_dev->mtu = new_mtu;
2020 efx->type->reconfigure_mac(efx);
2021 mutex_unlock(&efx->mac_lock);
2024 netif_device_attach(efx->net_dev);
2028 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2030 struct efx_nic *efx = netdev_priv(net_dev);
2031 struct sockaddr *addr = data;
2032 char *new_addr = addr->sa_data;
2034 if (!is_valid_ether_addr(new_addr)) {
2035 netif_err(efx, drv, efx->net_dev,
2036 "invalid ethernet MAC address requested: %pM\n",
2038 return -EADDRNOTAVAIL;
2041 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2042 efx_sriov_mac_address_changed(efx);
2044 /* Reconfigure the MAC */
2045 mutex_lock(&efx->mac_lock);
2046 efx->type->reconfigure_mac(efx);
2047 mutex_unlock(&efx->mac_lock);
2052 /* Context: netif_addr_lock held, BHs disabled. */
2053 static void efx_set_rx_mode(struct net_device *net_dev)
2055 struct efx_nic *efx = netdev_priv(net_dev);
2057 if (efx->port_enabled)
2058 queue_work(efx->workqueue, &efx->mac_work);
2059 /* Otherwise efx_start_port() will do this */
2062 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2064 struct efx_nic *efx = netdev_priv(net_dev);
2066 /* If disabling RX n-tuple filtering, clear existing filters */
2067 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2068 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2073 static const struct net_device_ops efx_netdev_ops = {
2074 .ndo_open = efx_net_open,
2075 .ndo_stop = efx_net_stop,
2076 .ndo_get_stats64 = efx_net_stats,
2077 .ndo_tx_timeout = efx_watchdog,
2078 .ndo_start_xmit = efx_hard_start_xmit,
2079 .ndo_validate_addr = eth_validate_addr,
2080 .ndo_do_ioctl = efx_ioctl,
2081 .ndo_change_mtu = efx_change_mtu,
2082 .ndo_set_mac_address = efx_set_mac_address,
2083 .ndo_set_rx_mode = efx_set_rx_mode,
2084 .ndo_set_features = efx_set_features,
2085 #ifdef CONFIG_SFC_SRIOV
2086 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2087 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2088 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2089 .ndo_get_vf_config = efx_sriov_get_vf_config,
2091 #ifdef CONFIG_NET_POLL_CONTROLLER
2092 .ndo_poll_controller = efx_netpoll,
2094 .ndo_setup_tc = efx_setup_tc,
2095 #ifdef CONFIG_RFS_ACCEL
2096 .ndo_rx_flow_steer = efx_filter_rfs,
2100 static void efx_update_name(struct efx_nic *efx)
2102 strcpy(efx->name, efx->net_dev->name);
2103 efx_mtd_rename(efx);
2104 efx_set_channel_names(efx);
2107 static int efx_netdev_event(struct notifier_block *this,
2108 unsigned long event, void *ptr)
2110 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2112 if (net_dev->netdev_ops == &efx_netdev_ops &&
2113 event == NETDEV_CHANGENAME)
2114 efx_update_name(netdev_priv(net_dev));
2119 static struct notifier_block efx_netdev_notifier = {
2120 .notifier_call = efx_netdev_event,
2124 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2126 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2127 return sprintf(buf, "%d\n", efx->phy_type);
2129 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2131 static int efx_register_netdev(struct efx_nic *efx)
2133 struct net_device *net_dev = efx->net_dev;
2134 struct efx_channel *channel;
2137 net_dev->watchdog_timeo = 5 * HZ;
2138 net_dev->irq = efx->pci_dev->irq;
2139 net_dev->netdev_ops = &efx_netdev_ops;
2140 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2141 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2145 /* Enable resets to be scheduled and check whether any were
2146 * already requested. If so, the NIC is probably hosed so we
2149 efx->state = STATE_READY;
2150 smp_mb(); /* ensure we change state before checking reset_pending */
2151 if (efx->reset_pending) {
2152 netif_err(efx, probe, efx->net_dev,
2153 "aborting probe due to scheduled reset\n");
2158 rc = dev_alloc_name(net_dev, net_dev->name);
2161 efx_update_name(efx);
2163 /* Always start with carrier off; PHY events will detect the link */
2164 netif_carrier_off(net_dev);
2166 rc = register_netdevice(net_dev);
2170 efx_for_each_channel(channel, efx) {
2171 struct efx_tx_queue *tx_queue;
2172 efx_for_each_channel_tx_queue(tx_queue, channel)
2173 efx_init_tx_queue_core_txq(tx_queue);
2178 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2180 netif_err(efx, drv, efx->net_dev,
2181 "failed to init net dev attributes\n");
2182 goto fail_registered;
2189 unregister_netdevice(net_dev);
2191 efx->state = STATE_UNINIT;
2193 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2197 static void efx_unregister_netdev(struct efx_nic *efx)
2202 BUG_ON(netdev_priv(efx->net_dev) != efx);
2204 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2205 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2208 unregister_netdevice(efx->net_dev);
2209 efx->state = STATE_UNINIT;
2213 /**************************************************************************
2215 * Device reset and suspend
2217 **************************************************************************/
2219 /* Tears down the entire software state and most of the hardware state
2221 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2223 EFX_ASSERT_RESET_SERIALISED(efx);
2226 efx_disable_interrupts(efx);
2228 mutex_lock(&efx->mac_lock);
2229 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2230 efx->phy_op->fini(efx);
2231 efx->type->fini(efx);
2234 /* This function will always ensure that the locks acquired in
2235 * efx_reset_down() are released. A failure return code indicates
2236 * that we were unable to reinitialise the hardware, and the
2237 * driver should be disabled. If ok is false, then the rx and tx
2238 * engines are not restarted, pending a RESET_DISABLE. */
2239 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2243 EFX_ASSERT_RESET_SERIALISED(efx);
2245 rc = efx->type->init(efx);
2247 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2254 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2255 rc = efx->phy_op->init(efx);
2258 if (efx->phy_op->reconfigure(efx))
2259 netif_err(efx, drv, efx->net_dev,
2260 "could not restore PHY settings\n");
2263 rc = efx_enable_interrupts(efx);
2266 efx_restore_filters(efx);
2267 efx_sriov_reset(efx);
2269 mutex_unlock(&efx->mac_lock);
2276 efx->port_initialized = false;
2278 mutex_unlock(&efx->mac_lock);
2283 /* Reset the NIC using the specified method. Note that the reset may
2284 * fail, in which case the card will be left in an unusable state.
2286 * Caller must hold the rtnl_lock.
2288 int efx_reset(struct efx_nic *efx, enum reset_type method)
2293 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2294 RESET_TYPE(method));
2296 efx_device_detach_sync(efx);
2297 efx_reset_down(efx, method);
2299 rc = efx->type->reset(efx, method);
2301 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2305 /* Clear flags for the scopes we covered. We assume the NIC and
2306 * driver are now quiescent so that there is no race here.
2308 efx->reset_pending &= -(1 << (method + 1));
2310 /* Reinitialise bus-mastering, which may have been turned off before
2311 * the reset was scheduled. This is still appropriate, even in the
2312 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2313 * can respond to requests. */
2314 pci_set_master(efx->pci_dev);
2317 /* Leave device stopped if necessary */
2319 method == RESET_TYPE_DISABLE ||
2320 method == RESET_TYPE_RECOVER_OR_DISABLE;
2321 rc2 = efx_reset_up(efx, method, !disabled);
2329 dev_close(efx->net_dev);
2330 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2331 efx->state = STATE_DISABLED;
2333 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2334 netif_device_attach(efx->net_dev);
2339 /* Try recovery mechanisms.
2340 * For now only EEH is supported.
2341 * Returns 0 if the recovery mechanisms are unsuccessful.
2342 * Returns a non-zero value otherwise.
2344 int efx_try_recovery(struct efx_nic *efx)
2347 /* A PCI error can occur and not be seen by EEH because nothing
2348 * happens on the PCI bus. In this case the driver may fail and
2349 * schedule a 'recover or reset', leading to this recovery handler.
2350 * Manually call the eeh failure check function.
2352 struct eeh_dev *eehdev =
2353 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2355 if (eeh_dev_check_failure(eehdev)) {
2356 /* The EEH mechanisms will handle the error and reset the
2357 * device if necessary.
2365 /* The worker thread exists so that code that cannot sleep can
2366 * schedule a reset for later.
2368 static void efx_reset_work(struct work_struct *data)
2370 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2371 unsigned long pending;
2372 enum reset_type method;
2374 pending = ACCESS_ONCE(efx->reset_pending);
2375 method = fls(pending) - 1;
2377 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2378 method == RESET_TYPE_RECOVER_OR_ALL) &&
2379 efx_try_recovery(efx))
2387 /* We checked the state in efx_schedule_reset() but it may
2388 * have changed by now. Now that we have the RTNL lock,
2389 * it cannot change again.
2391 if (efx->state == STATE_READY)
2392 (void)efx_reset(efx, method);
2397 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2399 enum reset_type method;
2401 if (efx->state == STATE_RECOVERY) {
2402 netif_dbg(efx, drv, efx->net_dev,
2403 "recovering: skip scheduling %s reset\n",
2409 case RESET_TYPE_INVISIBLE:
2410 case RESET_TYPE_ALL:
2411 case RESET_TYPE_RECOVER_OR_ALL:
2412 case RESET_TYPE_WORLD:
2413 case RESET_TYPE_DISABLE:
2414 case RESET_TYPE_RECOVER_OR_DISABLE:
2416 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2417 RESET_TYPE(method));
2420 method = efx->type->map_reset_reason(type);
2421 netif_dbg(efx, drv, efx->net_dev,
2422 "scheduling %s reset for %s\n",
2423 RESET_TYPE(method), RESET_TYPE(type));
2427 set_bit(method, &efx->reset_pending);
2428 smp_mb(); /* ensure we change reset_pending before checking state */
2430 /* If we're not READY then just leave the flags set as the cue
2431 * to abort probing or reschedule the reset later.
2433 if (ACCESS_ONCE(efx->state) != STATE_READY)
2436 /* efx_process_channel() will no longer read events once a
2437 * reset is scheduled. So switch back to poll'd MCDI completions. */
2438 efx_mcdi_mode_poll(efx);
2440 queue_work(reset_workqueue, &efx->reset_work);
2443 /**************************************************************************
2445 * List of NICs we support
2447 **************************************************************************/
2449 /* PCI device ID table */
2450 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2451 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2452 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2453 .driver_data = (unsigned long) &falcon_a1_nic_type},
2454 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2455 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2456 .driver_data = (unsigned long) &falcon_b0_nic_type},
2457 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2458 .driver_data = (unsigned long) &siena_a0_nic_type},
2459 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2460 .driver_data = (unsigned long) &siena_a0_nic_type},
2461 {0} /* end of list */
2464 /**************************************************************************
2466 * Dummy PHY/MAC operations
2468 * Can be used for some unimplemented operations
2469 * Needed so all function pointers are valid and do not have to be tested
2472 **************************************************************************/
2473 int efx_port_dummy_op_int(struct efx_nic *efx)
2477 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2479 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2484 static const struct efx_phy_operations efx_dummy_phy_operations = {
2485 .init = efx_port_dummy_op_int,
2486 .reconfigure = efx_port_dummy_op_int,
2487 .poll = efx_port_dummy_op_poll,
2488 .fini = efx_port_dummy_op_void,
2491 /**************************************************************************
2495 **************************************************************************/
2497 /* This zeroes out and then fills in the invariants in a struct
2498 * efx_nic (including all sub-structures).
2500 static int efx_init_struct(struct efx_nic *efx,
2501 struct pci_dev *pci_dev, struct net_device *net_dev)
2505 /* Initialise common structures */
2506 spin_lock_init(&efx->biu_lock);
2507 #ifdef CONFIG_SFC_MTD
2508 INIT_LIST_HEAD(&efx->mtd_list);
2510 INIT_WORK(&efx->reset_work, efx_reset_work);
2511 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2512 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2513 efx->pci_dev = pci_dev;
2514 efx->msg_enable = debug;
2515 efx->state = STATE_UNINIT;
2516 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2518 efx->net_dev = net_dev;
2519 efx->rx_prefix_size = efx->type->rx_prefix_size;
2520 efx->rx_packet_hash_offset =
2521 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2522 spin_lock_init(&efx->stats_lock);
2523 mutex_init(&efx->mac_lock);
2524 efx->phy_op = &efx_dummy_phy_operations;
2525 efx->mdio.dev = net_dev;
2526 INIT_WORK(&efx->mac_work, efx_mac_work);
2527 init_waitqueue_head(&efx->flush_wq);
2529 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2530 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2531 if (!efx->channel[i])
2533 efx->msi_context[i].efx = efx;
2534 efx->msi_context[i].index = i;
2537 /* Higher numbered interrupt modes are less capable! */
2538 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2541 /* Would be good to use the net_dev name, but we're too early */
2542 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2544 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2545 if (!efx->workqueue)
2551 efx_fini_struct(efx);
2555 static void efx_fini_struct(struct efx_nic *efx)
2559 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2560 kfree(efx->channel[i]);
2562 if (efx->workqueue) {
2563 destroy_workqueue(efx->workqueue);
2564 efx->workqueue = NULL;
2568 /**************************************************************************
2572 **************************************************************************/
2574 /* Main body of final NIC shutdown code
2575 * This is called only at module unload (or hotplug removal).
2577 static void efx_pci_remove_main(struct efx_nic *efx)
2579 /* Flush reset_work. It can no longer be scheduled since we
2582 BUG_ON(efx->state == STATE_READY);
2583 cancel_work_sync(&efx->reset_work);
2585 efx_disable_interrupts(efx);
2586 efx_nic_fini_interrupt(efx);
2588 efx->type->fini(efx);
2590 efx_remove_all(efx);
2593 /* Final NIC shutdown
2594 * This is called only at module unload (or hotplug removal).
2596 static void efx_pci_remove(struct pci_dev *pci_dev)
2598 struct efx_nic *efx;
2600 efx = pci_get_drvdata(pci_dev);
2604 /* Mark the NIC as fini, then stop the interface */
2606 dev_close(efx->net_dev);
2607 efx_disable_interrupts(efx);
2610 efx_sriov_fini(efx);
2611 efx_unregister_netdev(efx);
2613 efx_mtd_remove(efx);
2615 efx_pci_remove_main(efx);
2618 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2620 efx_fini_struct(efx);
2621 pci_set_drvdata(pci_dev, NULL);
2622 free_netdev(efx->net_dev);
2624 pci_disable_pcie_error_reporting(pci_dev);
2627 /* NIC VPD information
2628 * Called during probe to display the part number of the
2629 * installed NIC. VPD is potentially very large but this should
2630 * always appear within the first 512 bytes.
2632 #define SFC_VPD_LEN 512
2633 static void efx_print_product_vpd(struct efx_nic *efx)
2635 struct pci_dev *dev = efx->pci_dev;
2636 char vpd_data[SFC_VPD_LEN];
2640 /* Get the vpd data from the device */
2641 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2642 if (vpd_size <= 0) {
2643 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2647 /* Get the Read only section */
2648 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2650 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2654 j = pci_vpd_lrdt_size(&vpd_data[i]);
2655 i += PCI_VPD_LRDT_TAG_SIZE;
2656 if (i + j > vpd_size)
2659 /* Get the Part number */
2660 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2662 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2666 j = pci_vpd_info_field_size(&vpd_data[i]);
2667 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2668 if (i + j > vpd_size) {
2669 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2673 netif_info(efx, drv, efx->net_dev,
2674 "Part Number : %.*s\n", j, &vpd_data[i]);
2678 /* Main body of NIC initialisation
2679 * This is called at module load (or hotplug insertion, theoretically).
2681 static int efx_pci_probe_main(struct efx_nic *efx)
2685 /* Do start-of-day initialisation */
2686 rc = efx_probe_all(efx);
2692 rc = efx->type->init(efx);
2694 netif_err(efx, probe, efx->net_dev,
2695 "failed to initialise NIC\n");
2699 rc = efx_init_port(efx);
2701 netif_err(efx, probe, efx->net_dev,
2702 "failed to initialise port\n");
2706 rc = efx_nic_init_interrupt(efx);
2709 rc = efx_enable_interrupts(efx);
2716 efx_nic_fini_interrupt(efx);
2720 efx->type->fini(efx);
2723 efx_remove_all(efx);
2728 /* NIC initialisation
2730 * This is called at module load (or hotplug insertion,
2731 * theoretically). It sets up PCI mappings, resets the NIC,
2732 * sets up and registers the network devices with the kernel and hooks
2733 * the interrupt service routine. It does not prepare the device for
2734 * transmission; this is left to the first time one of the network
2735 * interfaces is brought up (i.e. efx_net_open).
2737 static int efx_pci_probe(struct pci_dev *pci_dev,
2738 const struct pci_device_id *entry)
2740 struct net_device *net_dev;
2741 struct efx_nic *efx;
2744 /* Allocate and initialise a struct net_device and struct efx_nic */
2745 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2749 efx = netdev_priv(net_dev);
2750 efx->type = (const struct efx_nic_type *) entry->driver_data;
2751 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2752 NETIF_F_HIGHDMA | NETIF_F_TSO |
2754 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2755 net_dev->features |= NETIF_F_TSO6;
2756 /* Mask for features that also apply to VLAN devices */
2757 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2758 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2760 /* All offloads can be toggled */
2761 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2762 pci_set_drvdata(pci_dev, efx);
2763 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2764 rc = efx_init_struct(efx, pci_dev, net_dev);
2768 netif_info(efx, probe, efx->net_dev,
2769 "Solarflare NIC detected\n");
2771 efx_print_product_vpd(efx);
2773 /* Set up basic I/O (BAR mappings etc) */
2774 rc = efx_init_io(efx);
2778 rc = efx_pci_probe_main(efx);
2782 rc = efx_register_netdev(efx);
2786 rc = efx_sriov_init(efx);
2788 netif_err(efx, probe, efx->net_dev,
2789 "SR-IOV can't be enabled rc %d\n", rc);
2791 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2793 /* Try to create MTDs, but allow this to fail */
2795 rc = efx_mtd_probe(efx);
2798 netif_warn(efx, probe, efx->net_dev,
2799 "failed to create MTDs (%d)\n", rc);
2801 rc = pci_enable_pcie_error_reporting(pci_dev);
2802 if (rc && rc != -EINVAL)
2803 netif_warn(efx, probe, efx->net_dev,
2804 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2809 efx_pci_remove_main(efx);
2813 efx_fini_struct(efx);
2815 pci_set_drvdata(pci_dev, NULL);
2817 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2818 free_netdev(net_dev);
2822 static int efx_pm_freeze(struct device *dev)
2824 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2828 if (efx->state != STATE_DISABLED) {
2829 efx->state = STATE_UNINIT;
2831 efx_device_detach_sync(efx);
2834 efx_disable_interrupts(efx);
2842 static int efx_pm_thaw(struct device *dev)
2845 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2849 if (efx->state != STATE_DISABLED) {
2850 rc = efx_enable_interrupts(efx);
2854 mutex_lock(&efx->mac_lock);
2855 efx->phy_op->reconfigure(efx);
2856 mutex_unlock(&efx->mac_lock);
2860 netif_device_attach(efx->net_dev);
2862 efx->state = STATE_READY;
2864 efx->type->resume_wol(efx);
2869 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2870 queue_work(reset_workqueue, &efx->reset_work);
2880 static int efx_pm_poweroff(struct device *dev)
2882 struct pci_dev *pci_dev = to_pci_dev(dev);
2883 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2885 efx->type->fini(efx);
2887 efx->reset_pending = 0;
2889 pci_save_state(pci_dev);
2890 return pci_set_power_state(pci_dev, PCI_D3hot);
2893 /* Used for both resume and restore */
2894 static int efx_pm_resume(struct device *dev)
2896 struct pci_dev *pci_dev = to_pci_dev(dev);
2897 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2900 rc = pci_set_power_state(pci_dev, PCI_D0);
2903 pci_restore_state(pci_dev);
2904 rc = pci_enable_device(pci_dev);
2907 pci_set_master(efx->pci_dev);
2908 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2911 rc = efx->type->init(efx);
2914 rc = efx_pm_thaw(dev);
2918 static int efx_pm_suspend(struct device *dev)
2923 rc = efx_pm_poweroff(dev);
2929 static const struct dev_pm_ops efx_pm_ops = {
2930 .suspend = efx_pm_suspend,
2931 .resume = efx_pm_resume,
2932 .freeze = efx_pm_freeze,
2933 .thaw = efx_pm_thaw,
2934 .poweroff = efx_pm_poweroff,
2935 .restore = efx_pm_resume,
2938 /* A PCI error affecting this device was detected.
2939 * At this point MMIO and DMA may be disabled.
2940 * Stop the software path and request a slot reset.
2942 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2943 enum pci_channel_state state)
2945 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2946 struct efx_nic *efx = pci_get_drvdata(pdev);
2948 if (state == pci_channel_io_perm_failure)
2949 return PCI_ERS_RESULT_DISCONNECT;
2953 if (efx->state != STATE_DISABLED) {
2954 efx->state = STATE_RECOVERY;
2955 efx->reset_pending = 0;
2957 efx_device_detach_sync(efx);
2960 efx_disable_interrupts(efx);
2962 status = PCI_ERS_RESULT_NEED_RESET;
2964 /* If the interface is disabled we don't want to do anything
2967 status = PCI_ERS_RESULT_RECOVERED;
2972 pci_disable_device(pdev);
2977 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
2978 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2980 struct efx_nic *efx = pci_get_drvdata(pdev);
2981 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2984 if (pci_enable_device(pdev)) {
2985 netif_err(efx, hw, efx->net_dev,
2986 "Cannot re-enable PCI device after reset.\n");
2987 status = PCI_ERS_RESULT_DISCONNECT;
2990 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
2992 netif_err(efx, hw, efx->net_dev,
2993 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
2994 /* Non-fatal error. Continue. */
3000 /* Perform the actual reset and resume I/O operations. */
3001 static void efx_io_resume(struct pci_dev *pdev)
3003 struct efx_nic *efx = pci_get_drvdata(pdev);
3008 if (efx->state == STATE_DISABLED)
3011 rc = efx_reset(efx, RESET_TYPE_ALL);
3013 netif_err(efx, hw, efx->net_dev,
3014 "efx_reset failed after PCI error (%d)\n", rc);
3016 efx->state = STATE_READY;
3017 netif_dbg(efx, hw, efx->net_dev,
3018 "Done resetting and resuming IO after PCI error.\n");
3025 /* For simplicity and reliability, we always require a slot reset and try to
3026 * reset the hardware when a pci error affecting the device is detected.
3027 * We leave both the link_reset and mmio_enabled callback unimplemented:
3028 * with our request for slot reset the mmio_enabled callback will never be
3029 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3031 static struct pci_error_handlers efx_err_handlers = {
3032 .error_detected = efx_io_error_detected,
3033 .slot_reset = efx_io_slot_reset,
3034 .resume = efx_io_resume,
3037 static struct pci_driver efx_pci_driver = {
3038 .name = KBUILD_MODNAME,
3039 .id_table = efx_pci_table,
3040 .probe = efx_pci_probe,
3041 .remove = efx_pci_remove,
3042 .driver.pm = &efx_pm_ops,
3043 .err_handler = &efx_err_handlers,
3046 /**************************************************************************
3048 * Kernel module interface
3050 *************************************************************************/
3052 module_param(interrupt_mode, uint, 0444);
3053 MODULE_PARM_DESC(interrupt_mode,
3054 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3056 static int __init efx_init_module(void)
3060 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3062 rc = register_netdevice_notifier(&efx_netdev_notifier);
3066 rc = efx_init_sriov();
3070 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3071 if (!reset_workqueue) {
3076 rc = pci_register_driver(&efx_pci_driver);
3083 destroy_workqueue(reset_workqueue);
3087 unregister_netdevice_notifier(&efx_netdev_notifier);
3092 static void __exit efx_exit_module(void)
3094 printk(KERN_INFO "Solarflare NET driver unloading\n");
3096 pci_unregister_driver(&efx_pci_driver);
3097 destroy_workqueue(reset_workqueue);
3099 unregister_netdevice_notifier(&efx_netdev_notifier);
3103 module_init(efx_init_module);
3104 module_exit(efx_exit_module);
3106 MODULE_AUTHOR("Solarflare Communications and "
3107 "Michael Brown <mbrown@fensystems.co.uk>");
3108 MODULE_DESCRIPTION("Solarflare Communications network driver");
3109 MODULE_LICENSE("GPL");
3110 MODULE_DEVICE_TABLE(pci, efx_pci_table);