Pileus Git - ~andy/linux/blob - drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  39
  40 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  41         .read_crb                       = qlcnic_83xx_read_crb,
  42         .write_crb                      = qlcnic_83xx_write_crb,
  43         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  44         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  45         .get_mac_address                = qlcnic_83xx_get_mac_address,
  46         .setup_intr                     = qlcnic_83xx_setup_intr,
  47         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  48         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  49         .get_func_no                    = qlcnic_83xx_get_func_no,
  50         .api_lock                       = qlcnic_83xx_cam_lock,
  51         .api_unlock                     = qlcnic_83xx_cam_unlock,
  52         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  53         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  54         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  55         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  56         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  57         .setup_link_event               = qlcnic_83xx_setup_link_event,
  58         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  59         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  60         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  61         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  62         .napi_enable                    = qlcnic_83xx_napi_enable,
  63         .napi_disable                   = qlcnic_83xx_napi_disable,
  64         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  65         .config_rss                     = qlcnic_83xx_config_rss,
  66         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  67         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  68         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  69         .get_board_info                 = qlcnic_83xx_get_port_info,
  70         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  71 };
  72
  73 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  74         .config_bridged_mode    = qlcnic_config_bridged_mode,
  75         .config_led             = qlcnic_config_led,
  76         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  77         .napi_add               = qlcnic_83xx_napi_add,
  78         .napi_del               = qlcnic_83xx_napi_del,
  79         .shutdown               = qlcnic_sriov_vf_shutdown,
  80         .resume                 = qlcnic_sriov_vf_resume,
  81         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  82         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  83 };
  84
  85 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  86         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  87         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  88         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  89         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  90 };
  91
  92 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  93 {
  94         return (val & (1 << QLC_BC_MSG)) ? true : false;
  95 }
  96
  97 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  98 {
  99         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 100 }
 101
 102 static inline bool qlcnic_sriov_flr_check(u32 val)
 103 {
 104         return (val & (1 << QLC_BC_FLR)) ? true : false;
 105 }
 106
 107 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 108 {
 109         return (val >> 4) & 0xff;
 110 }
 111
 112 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 113 {
 114         struct pci_dev *dev = adapter->pdev;
 115         int pos;
 116         u16 stride, offset;
 117
 118         if (qlcnic_sriov_vf_check(adapter))
 119                 return 0;
 120
 121         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 122         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 123         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 124
 125         return (dev->devfn + offset + stride * vf_id) & 0xff;
 126 }
 127
 128 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 129 {
 130         struct qlcnic_sriov *sriov;
 131         struct qlcnic_back_channel *bc;
 132         struct workqueue_struct *wq;
 133         struct qlcnic_vport *vp;
 134         struct qlcnic_vf_info *vf;
 135         int err, i;
 136
 137         if (!qlcnic_sriov_enable_check(adapter))
 138                 return -EIO;
 139
 140         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 141         if (!sriov)
 142                 return -ENOMEM;
 143
 144         adapter->ahw->sriov = sriov;
 145         sriov->num_vfs = num_vfs;
 146         bc = &sriov->bc;
 147         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 148                                  num_vfs, GFP_KERNEL);
 149         if (!sriov->vf_info) {
 150                 err = -ENOMEM;
 151                 goto qlcnic_free_sriov;
 152         }
 153
 154         wq = create_singlethread_workqueue("bc-trans");
 155         if (wq == NULL) {
 156                 err = -ENOMEM;
 157                 dev_err(&adapter->pdev->dev,
 158                         "Cannot create bc-trans workqueue\n");
 159                 goto qlcnic_free_vf_info;
 160         }
 161
 162         bc->bc_trans_wq = wq;
 163
 164         wq = create_singlethread_workqueue("async");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 168                 goto qlcnic_destroy_trans_wq;
 169         }
 170
 171         bc->bc_async_wq =  wq;
 172         INIT_LIST_HEAD(&bc->async_list);
 173
 174         for (i = 0; i < num_vfs; i++) {
 175                 vf = &sriov->vf_info[i];
 176                 vf->adapter = adapter;
 177                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 178                 mutex_init(&vf->send_cmd_lock);
 179                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 180                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 181                 spin_lock_init(&vf->rcv_act.lock);
 182                 spin_lock_init(&vf->rcv_pend.lock);
 183                 init_completion(&vf->ch_free_cmpl);
 184
 185                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 186
 187                 if (qlcnic_sriov_pf_check(adapter)) {
 188                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 189                         if (!vp) {
 190                                 err = -ENOMEM;
 191                                 goto qlcnic_destroy_async_wq;
 192                         }
 193                         sriov->vf_info[i].vp = vp;
 194                         vp->max_tx_bw = MAX_BW;
 195                         vp->spoofchk = true;
 196                         random_ether_addr(vp->mac);
 197                         dev_info(&adapter->pdev->dev,
 198                                  "MAC Address %pM is configured for VF %d\n",
 199                                  vp->mac, i);
 200                 }
 201         }
 202
 203         return 0;
 204
 205 qlcnic_destroy_async_wq:
 206         destroy_workqueue(bc->bc_async_wq);
 207
 208 qlcnic_destroy_trans_wq:
 209         destroy_workqueue(bc->bc_trans_wq);
 210
 211 qlcnic_free_vf_info:
 212         kfree(sriov->vf_info);
 213
 214 qlcnic_free_sriov:
 215         kfree(adapter->ahw->sriov);
 216         return err;
 217 }
 218
 219 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 220 {
 221         struct qlcnic_bc_trans *trans;
 222         struct qlcnic_cmd_args cmd;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&t_list->lock, flags);
 226
 227         while (!list_empty(&t_list->wait_list)) {
 228                 trans = list_first_entry(&t_list->wait_list,
 229                                          struct qlcnic_bc_trans, list);
 230                 list_del(&trans->list);
 231                 t_list->count--;
 232                 cmd.req.arg = (u32 *)trans->req_pay;
 233                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 234                 qlcnic_free_mbx_args(&cmd);
 235                 qlcnic_sriov_cleanup_transaction(trans);
 236         }
 237
 238         spin_unlock_irqrestore(&t_list->lock, flags);
 239 }
 240
 241 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 242 {
 243         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 244         struct qlcnic_back_channel *bc = &sriov->bc;
 245         struct qlcnic_vf_info *vf;
 246         int i;
 247
 248         if (!qlcnic_sriov_enable_check(adapter))
 249                 return;
 250
 251         qlcnic_sriov_cleanup_async_list(bc);
 252         destroy_workqueue(bc->bc_async_wq);
 253
 254         for (i = 0; i < sriov->num_vfs; i++) {
 255                 vf = &sriov->vf_info[i];
 256                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 257                 cancel_work_sync(&vf->trans_work);
 258                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 259         }
 260
 261         destroy_workqueue(bc->bc_trans_wq);
 262
 263         for (i = 0; i < sriov->num_vfs; i++)
 264                 kfree(sriov->vf_info[i].vp);
 265
 266         kfree(sriov->vf_info);
 267         kfree(adapter->ahw->sriov);
 268 }
 269
 270 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 271 {
 272         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 273         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 274         __qlcnic_sriov_cleanup(adapter);
 275 }
 276
 277 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 278 {
 279         if (qlcnic_sriov_pf_check(adapter))
 280                 qlcnic_sriov_pf_cleanup(adapter);
 281
 282         if (qlcnic_sriov_vf_check(adapter))
 283                 qlcnic_sriov_vf_cleanup(adapter);
 284 }
 285
 286 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 287                                     u32 *pay, u8 pci_func, u8 size)
 288 {
 289         struct qlcnic_hardware_context *ahw = adapter->ahw;
 290         struct qlcnic_mailbox *mbx = ahw->mailbox;
 291         struct qlcnic_cmd_args cmd;
 292         unsigned long timeout;
 293         int err;
 294
 295         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 296         cmd.hdr = hdr;
 297         cmd.pay = pay;
 298         cmd.pay_size = size;
 299         cmd.func_num = pci_func;
 300         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 301         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 302
 303         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 304         if (err) {
 305                 dev_err(&adapter->pdev->dev,
 306                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 307                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 308                         ahw->op_mode);
 309                 return err;
 310         }
 311
 312         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 313                 dev_err(&adapter->pdev->dev,
 314                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 315                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 316                         ahw->op_mode);
 317                 flush_workqueue(mbx->work_q);
 318         }
 319
 320         return cmd.rsp_opcode;
 321 }
 322
 323 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 324 {
 325         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 326         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 327         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 328         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 329         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 330         adapter->max_rds_rings = MAX_RDS_RINGS;
 331 }
 332
 333 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 334                                    struct qlcnic_info *npar_info, u16 vport_id)
 335 {
 336         struct device *dev = &adapter->pdev->dev;
 337         struct qlcnic_cmd_args cmd;
 338         int err;
 339         u32 status;
 340
 341         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 342         if (err)
 343                 return err;
 344
 345         cmd.req.arg[1] = vport_id << 16 | 0x1;
 346         err = qlcnic_issue_cmd(adapter, &cmd);
 347         if (err) {
 348                 dev_err(&adapter->pdev->dev,
 349                         "Failed to get vport info, err=%d\n", err);
 350                 qlcnic_free_mbx_args(&cmd);
 351                 return err;
 352         }
 353
 354         status = cmd.rsp.arg[2] & 0xffff;
 355         if (status & BIT_0)
 356                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 357         if (status & BIT_1)
 358                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 359         if (status & BIT_2)
 360                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 361         if (status & BIT_3)
 362                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 363         if (status & BIT_4)
 364                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 365         if (status & BIT_5)
 366                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 367         if (status & BIT_6)
 368                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 369         if (status & BIT_7)
 370                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 371         if (status & BIT_8)
 372                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 373         if (status & BIT_9)
 374                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 375
 376         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 377         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 378         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 379         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 380
 381         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 382                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 383                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 384                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 385                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 386                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 387                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 388                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 389                  npar_info->max_rx_mcast_mac_filters,
 390                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 391                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 392                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 393                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 394                  npar_info->max_remote_ipv6_addrs);
 395
 396         qlcnic_free_mbx_args(&cmd);
 397         return err;
 398 }
 399
 400 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 401                                       struct qlcnic_cmd_args *cmd)
 402 {
 403         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 404         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 405         return 0;
 406 }
 407
 408 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 409                                             struct qlcnic_cmd_args *cmd)
 410 {
 411         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 412         int i, num_vlans;
 413         u16 *vlans;
 414
 415         if (sriov->allowed_vlans)
 416                 return 0;
 417
 418         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 419         if (!sriov->any_vlan)
 420                 return 0;
 421
 422         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 423         num_vlans = sriov->num_allowed_vlans;
 424         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 425         if (!sriov->allowed_vlans)
 426                 return -ENOMEM;
 427
 428         vlans = (u16 *)&cmd->rsp.arg[3];
 429         for (i = 0; i < num_vlans; i++)
 430                 sriov->allowed_vlans[i] = vlans[i];
 431
 432         return 0;
 433 }
 434
 435 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter,
 436                                    struct qlcnic_info *info)
 437 {
 438         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 439         struct qlcnic_cmd_args cmd;
 440         int ret = 0;
 441
 442         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 443         if (ret)
 444                 return ret;
 445
 446         ret = qlcnic_issue_cmd(adapter, &cmd);
 447         if (ret) {
 448                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 449                         ret);
 450         } else {
 451                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 452                 switch (sriov->vlan_mode) {
 453                 case QLC_GUEST_VLAN_MODE:
 454                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 455                         break;
 456                 case QLC_PVID_MODE:
 457                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 458                         break;
 459                 }
 460         }
 461
 462         qlcnic_free_mbx_args(&cmd);
 463         return ret;
 464 }
 465
 466 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 467 {
 468         struct qlcnic_hardware_context *ahw = adapter->ahw;
 469         struct qlcnic_info nic_info;
 470         int err;
 471
 472         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 473         if (err)
 474                 return err;
 475
 476         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 477         if (err)
 478                 return -EIO;
 479
 480         err = qlcnic_sriov_get_vf_acl(adapter, &nic_info);
 481         if (err)
 482                 return err;
 483
 484         if (qlcnic_83xx_get_port_info(adapter))
 485                 return -EIO;
 486
 487         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 488         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 489         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 490                  adapter->ahw->fw_hal_version);
 491
 492         ahw->physical_port = (u8) nic_info.phys_port;
 493         ahw->switch_mode = nic_info.switch_mode;
 494         ahw->max_mtu = nic_info.max_mtu;
 495         ahw->op_mode = nic_info.op_mode;
 496         ahw->capabilities = nic_info.capabilities;
 497         return 0;
 498 }
 499
 500 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 501                                  int pci_using_dac)
 502 {
 503         struct qlcnic_dcb *dcb;
 504         int err;
 505
 506         INIT_LIST_HEAD(&adapter->vf_mc_list);
 507         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 508                 dev_warn(&adapter->pdev->dev,
 509                          "Device does not support MSI interrupts\n");
 510
 511         /* compute and set default and max tx/sds rings */
 512         qlcnic_set_tx_ring_count(adapter, QLCNIC_SINGLE_RING);
 513         qlcnic_set_sds_ring_count(adapter, QLCNIC_SINGLE_RING);
 514
 515         err = qlcnic_setup_intr(adapter);
 516         if (err) {
 517                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 518                 goto err_out_disable_msi;
 519         }
 520
 521         err = qlcnic_83xx_setup_mbx_intr(adapter);
 522         if (err)
 523                 goto err_out_disable_msi;
 524
 525         err = qlcnic_sriov_init(adapter, 1);
 526         if (err)
 527                 goto err_out_disable_mbx_intr;
 528
 529         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 530         if (err)
 531                 goto err_out_cleanup_sriov;
 532
 533         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 534         if (err)
 535                 goto err_out_disable_bc_intr;
 536
 537         err = qlcnic_sriov_vf_init_driver(adapter);
 538         if (err)
 539                 goto err_out_send_channel_term;
 540
 541         dcb = adapter->dcb;
 542
 543         if (dcb && qlcnic_dcb_attach(dcb))
 544                 qlcnic_clear_dcb_ops(dcb);
 545
 546         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 547         if (err)
 548                 goto err_out_send_channel_term;
 549
 550         pci_set_drvdata(adapter->pdev, adapter);
 551         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 552                  adapter->netdev->name);
 553
 554         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 555                              adapter->ahw->idc.delay);
 556         return 0;
 557
 558 err_out_send_channel_term:
 559         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 560
 561 err_out_disable_bc_intr:
 562         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 563
 564 err_out_cleanup_sriov:
 565         __qlcnic_sriov_cleanup(adapter);
 566
 567 err_out_disable_mbx_intr:
 568         qlcnic_83xx_free_mbx_intr(adapter);
 569
 570 err_out_disable_msi:
 571         qlcnic_teardown_intr(adapter);
 572         return err;
 573 }
 574
 575 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 576 {
 577         u32 state;
 578
 579         do {
 580                 msleep(20);
 581                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 582                         return -EIO;
 583                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 584         } while (state != QLC_83XX_IDC_DEV_READY);
 585
 586         return 0;
 587 }
 588
 589 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 590 {
 591         struct qlcnic_hardware_context *ahw = adapter->ahw;
 592         int err;
 593
 594         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 595         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 596         ahw->reset_context = 0;
 597         adapter->fw_fail_cnt = 0;
 598         ahw->msix_supported = 1;
 599         adapter->need_fw_reset = 0;
 600         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 601
 602         err = qlcnic_sriov_check_dev_ready(adapter);
 603         if (err)
 604                 return err;
 605
 606         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 607         if (err)
 608                 return err;
 609
 610         if (qlcnic_read_mac_addr(adapter))
 611                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 612
 613         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 614
 615         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 616         return 0;
 617 }
 618
 619 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 620 {
 621         struct qlcnic_hardware_context *ahw = adapter->ahw;
 622
 623         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 624         dev_info(&adapter->pdev->dev,
 625                  "HAL Version: %d Non Privileged SRIOV function\n",
 626                  ahw->fw_hal_version);
 627         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 628         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 629         return;
 630 }
 631
 632 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 633 {
 634         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 635         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 636         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 637 }
 638
 639 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 640 {
 641         u32 pay_size;
 642
 643         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 644
 645         if (pay_size)
 646                 pay_size = QLC_BC_PAYLOAD_SZ;
 647         else
 648                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 649
 650         return pay_size;
 651 }
 652
 653 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 654 {
 655         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 656         u8 i;
 657
 658         if (qlcnic_sriov_vf_check(adapter))
 659                 return 0;
 660
 661         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 662                 if (vf_info[i].pci_func == pci_func)
 663                         return i;
 664         }
 665
 666         return -EINVAL;
 667 }
 668
 669 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 670 {
 671         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 672         if (!*trans)
 673                 return -ENOMEM;
 674
 675         init_completion(&(*trans)->resp_cmpl);
 676         return 0;
 677 }
 678
 679 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 680                                             u32 size)
 681 {
 682         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 683         if (!*hdr)
 684                 return -ENOMEM;
 685
 686         return 0;
 687 }
 688
 689 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 690 {
 691         const struct qlcnic_mailbox_metadata *mbx_tbl;
 692         int i, size;
 693
 694         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 695         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 696
 697         for (i = 0; i < size; i++) {
 698                 if (type == mbx_tbl[i].cmd) {
 699                         mbx->op_type = QLC_BC_CMD;
 700                         mbx->req.num = mbx_tbl[i].in_args;
 701                         mbx->rsp.num = mbx_tbl[i].out_args;
 702                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 703                                                GFP_ATOMIC);
 704                         if (!mbx->req.arg)
 705                                 return -ENOMEM;
 706                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 707                                                GFP_ATOMIC);
 708                         if (!mbx->rsp.arg) {
 709                                 kfree(mbx->req.arg);
 710                                 mbx->req.arg = NULL;
 711                                 return -ENOMEM;
 712                         }
 713                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 714                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 715                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 716                                            (3 << 29));
 717                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 718                         return 0;
 719                 }
 720         }
 721         return -EINVAL;
 722 }
 723
 724 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 725                                        struct qlcnic_cmd_args *cmd,
 726                                        u16 seq, u8 msg_type)
 727 {
 728         struct qlcnic_bc_hdr *hdr;
 729         int i;
 730         u32 num_regs, bc_pay_sz;
 731         u16 remainder;
 732         u8 cmd_op, num_frags, t_num_frags;
 733
 734         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 735         if (msg_type == QLC_BC_COMMAND) {
 736                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 737                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 738                 num_regs = cmd->req.num;
 739                 trans->req_pay_size = (num_regs * 4);
 740                 num_regs = cmd->rsp.num;
 741                 trans->rsp_pay_size = (num_regs * 4);
 742                 cmd_op = cmd->req.arg[0] & 0xff;
 743                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 744                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 745                 if (remainder)
 746                         num_frags++;
 747                 t_num_frags = num_frags;
 748                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 749                         return -ENOMEM;
 750                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 751                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 752                 if (remainder)
 753                         num_frags++;
 754                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 755                         return -ENOMEM;
 756                 num_frags  = t_num_frags;
 757                 hdr = trans->req_hdr;
 758         }  else {
 759                 cmd->req.arg = (u32 *)trans->req_pay;
 760                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 761                 cmd_op = cmd->req.arg[0] & 0xff;
 762                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 763                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 764                 if (remainder)
 765                         num_frags++;
 766                 cmd->req.num = trans->req_pay_size / 4;
 767                 cmd->rsp.num = trans->rsp_pay_size / 4;
 768                 hdr = trans->rsp_hdr;
 769                 cmd->op_type = trans->req_hdr->op_type;
 770         }
 771
 772         trans->trans_id = seq;
 773         trans->cmd_id = cmd_op;
 774         for (i = 0; i < num_frags; i++) {
 775                 hdr[i].version = 2;
 776                 hdr[i].msg_type = msg_type;
 777                 hdr[i].op_type = cmd->op_type;
 778                 hdr[i].num_cmds = 1;
 779                 hdr[i].num_frags = num_frags;
 780                 hdr[i].frag_num = i + 1;
 781                 hdr[i].cmd_op = cmd_op;
 782                 hdr[i].seq_id = seq;
 783         }
 784         return 0;
 785 }
 786
 787 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 788 {
 789         if (!trans)
 790                 return;
 791         kfree(trans->req_hdr);
 792         kfree(trans->rsp_hdr);
 793         kfree(trans);
 794 }
 795
 796 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 797                                     struct qlcnic_bc_trans *trans, u8 type)
 798 {
 799         struct qlcnic_trans_list *t_list;
 800         unsigned long flags;
 801         int ret = 0;
 802
 803         if (type == QLC_BC_RESPONSE) {
 804                 t_list = &vf->rcv_act;
 805                 spin_lock_irqsave(&t_list->lock, flags);
 806                 t_list->count--;
 807                 list_del(&trans->list);
 808                 if (t_list->count > 0)
 809                         ret = 1;
 810                 spin_unlock_irqrestore(&t_list->lock, flags);
 811         }
 812         if (type == QLC_BC_COMMAND) {
 813                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 814                         msleep(100);
 815                 vf->send_cmd = NULL;
 816                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 817         }
 818         return ret;
 819 }
 820
 821 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 822                                          struct qlcnic_vf_info *vf,
 823                                          work_func_t func)
 824 {
 825         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 826             vf->adapter->need_fw_reset)
 827                 return;
 828
 829         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 830 }
 831
 832 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 833 {
 834         struct completion *cmpl = &trans->resp_cmpl;
 835
 836         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 837                 trans->trans_state = QLC_END;
 838         else
 839                 trans->trans_state = QLC_ABORT;
 840
 841         return;
 842 }
 843
 844 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 845                                             u8 type)
 846 {
 847         if (type == QLC_BC_RESPONSE) {
 848                 trans->curr_rsp_frag++;
 849                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 850                         trans->trans_state = QLC_INIT;
 851                 else
 852                         trans->trans_state = QLC_END;
 853         } else {
 854                 trans->curr_req_frag++;
 855                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 856                         trans->trans_state = QLC_INIT;
 857                 else
 858                         trans->trans_state = QLC_WAIT_FOR_RESP;
 859         }
 860 }
 861
 862 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 863                                                u8 type)
 864 {
 865         struct qlcnic_vf_info *vf = trans->vf;
 866         struct completion *cmpl = &vf->ch_free_cmpl;
 867
 868         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 869                 trans->trans_state = QLC_ABORT;
 870                 return;
 871         }
 872
 873         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 874         qlcnic_sriov_handle_multi_frags(trans, type);
 875 }
 876
 877 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 878                                      u32 *hdr, u32 *pay, u32 size)
 879 {
 880         struct qlcnic_hardware_context *ahw = adapter->ahw;
 881         u32 fw_mbx;
 882         u8 i, max = 2, hdr_size, j;
 883
 884         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 885         max = (size / sizeof(u32)) + hdr_size;
 886
 887         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 888         for (i = 2, j = 0; j < hdr_size; i++, j++)
 889                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 890         for (; j < max; i++, j++)
 891                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 892 }
 893
 894 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 895 {
 896         int ret = -EBUSY;
 897         u32 timeout = 10000;
 898
 899         do {
 900                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 901                         ret = 0;
 902                         break;
 903                 }
 904                 mdelay(1);
 905         } while (--timeout);
 906
 907         return ret;
 908 }
 909
 910 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 911 {
 912         struct qlcnic_vf_info *vf = trans->vf;
 913         u32 pay_size, hdr_size;
 914         u32 *hdr, *pay;
 915         int ret;
 916         u8 pci_func = trans->func_id;
 917
 918         if (__qlcnic_sriov_issue_bc_post(vf))
 919                 return -EBUSY;
 920
 921         if (type == QLC_BC_COMMAND) {
 922                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 923                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 924                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 925                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 926                                                        trans->curr_req_frag);
 927                 pay_size = (pay_size / sizeof(u32));
 928         } else {
 929                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 930                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 931                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 932                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 933                                                        trans->curr_rsp_frag);
 934                 pay_size = (pay_size / sizeof(u32));
 935         }
 936
 937         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 938                                        pci_func, pay_size);
 939         return ret;
 940 }
 941
 942 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 943                                       struct qlcnic_vf_info *vf, u8 type)
 944 {
 945         bool flag = true;
 946         int err = -EIO;
 947
 948         while (flag) {
 949                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 950                     vf->adapter->need_fw_reset)
 951                         trans->trans_state = QLC_ABORT;
 952
 953                 switch (trans->trans_state) {
 954                 case QLC_INIT:
 955                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 956                         if (qlcnic_sriov_issue_bc_post(trans, type))
 957                                 trans->trans_state = QLC_ABORT;
 958                         break;
 959                 case QLC_WAIT_FOR_CHANNEL_FREE:
 960                         qlcnic_sriov_wait_for_channel_free(trans, type);
 961                         break;
 962                 case QLC_WAIT_FOR_RESP:
 963                         qlcnic_sriov_wait_for_resp(trans);
 964                         break;
 965                 case QLC_END:
 966                         err = 0;
 967                         flag = false;
 968                         break;
 969                 case QLC_ABORT:
 970                         err = -EIO;
 971                         flag = false;
 972                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 973                         break;
 974                 default:
 975                         err = -EIO;
 976                         flag = false;
 977                 }
 978         }
 979         return err;
 980 }
 981
 982 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 983                                     struct qlcnic_bc_trans *trans, int pci_func)
 984 {
 985         struct qlcnic_vf_info *vf;
 986         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 987
 988         if (index < 0)
 989                 return -EIO;
 990
 991         vf = &adapter->ahw->sriov->vf_info[index];
 992         trans->vf = vf;
 993         trans->func_id = pci_func;
 994
 995         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 996                 if (qlcnic_sriov_pf_check(adapter))
 997                         return -EIO;
 998                 if (qlcnic_sriov_vf_check(adapter) &&
 999                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1000                         return -EIO;
1001         }
1002
1003         mutex_lock(&vf->send_cmd_lock);
1004         vf->send_cmd = trans;
1005         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1006         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1007         mutex_unlock(&vf->send_cmd_lock);
1008         return err;
1009 }
1010
1011 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1012                                           struct qlcnic_bc_trans *trans,
1013                                           struct qlcnic_cmd_args *cmd)
1014 {
1015 #ifdef CONFIG_QLCNIC_SRIOV
1016         if (qlcnic_sriov_pf_check(adapter)) {
1017                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1018                 return;
1019         }
1020 #endif
1021         cmd->rsp.arg[0] |= (0x9 << 25);
1022         return;
1023 }
1024
1025 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1026 {
1027         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1028                                                  trans_work);
1029         struct qlcnic_bc_trans *trans = NULL;
1030         struct qlcnic_adapter *adapter  = vf->adapter;
1031         struct qlcnic_cmd_args cmd;
1032         u8 req;
1033
1034         if (adapter->need_fw_reset)
1035                 return;
1036
1037         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1038                 return;
1039
1040         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1041         trans = list_first_entry(&vf->rcv_act.wait_list,
1042                                  struct qlcnic_bc_trans, list);
1043         adapter = vf->adapter;
1044
1045         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1046                                         QLC_BC_RESPONSE))
1047                 goto cleanup_trans;
1048
1049         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1050         trans->trans_state = QLC_INIT;
1051         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1052
1053 cleanup_trans:
1054         qlcnic_free_mbx_args(&cmd);
1055         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1056         qlcnic_sriov_cleanup_transaction(trans);
1057         if (req)
1058                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1059                                              qlcnic_sriov_process_bc_cmd);
1060 }
1061
1062 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1063                                         struct qlcnic_vf_info *vf)
1064 {
1065         struct qlcnic_bc_trans *trans;
1066         u32 pay_size;
1067
1068         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1069                 return;
1070
1071         trans = vf->send_cmd;
1072
1073         if (trans == NULL)
1074                 goto clear_send;
1075
1076         if (trans->trans_id != hdr->seq_id)
1077                 goto clear_send;
1078
1079         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1080                                                trans->curr_rsp_frag);
1081         qlcnic_sriov_pull_bc_msg(vf->adapter,
1082                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1083                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1084                                  pay_size);
1085         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1086                 goto clear_send;
1087
1088         complete(&trans->resp_cmpl);
1089
1090 clear_send:
1091         clear_bit(QLC_BC_VF_SEND, &vf->state);
1092 }
1093
1094 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1095                                 struct qlcnic_vf_info *vf,
1096                                 struct qlcnic_bc_trans *trans)
1097 {
1098         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1099
1100         t_list->count++;
1101         list_add_tail(&trans->list, &t_list->wait_list);
1102         if (t_list->count == 1)
1103                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1104                                              qlcnic_sriov_process_bc_cmd);
1105         return 0;
1106 }
1107
1108 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1109                                      struct qlcnic_vf_info *vf,
1110                                      struct qlcnic_bc_trans *trans)
1111 {
1112         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1113
1114         spin_lock(&t_list->lock);
1115
1116         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1117
1118         spin_unlock(&t_list->lock);
1119         return 0;
1120 }
1121
1122 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1123                                               struct qlcnic_vf_info *vf,
1124                                               struct qlcnic_bc_hdr *hdr)
1125 {
1126         struct qlcnic_bc_trans *trans = NULL;
1127         struct list_head *node;
1128         u32 pay_size, curr_frag;
1129         u8 found = 0, active = 0;
1130
1131         spin_lock(&vf->rcv_pend.lock);
1132         if (vf->rcv_pend.count > 0) {
1133                 list_for_each(node, &vf->rcv_pend.wait_list) {
1134                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1135                         if (trans->trans_id == hdr->seq_id) {
1136                                 found = 1;
1137                                 break;
1138                         }
1139                 }
1140         }
1141
1142         if (found) {
1143                 curr_frag = trans->curr_req_frag;
1144                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1145                                                        curr_frag);
1146                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1147                                          (u32 *)(trans->req_hdr + curr_frag),
1148                                          (u32 *)(trans->req_pay + curr_frag),
1149                                          pay_size);
1150                 trans->curr_req_frag++;
1151                 if (trans->curr_req_frag >= hdr->num_frags) {
1152                         vf->rcv_pend.count--;
1153                         list_del(&trans->list);
1154                         active = 1;
1155                 }
1156         }
1157         spin_unlock(&vf->rcv_pend.lock);
1158
1159         if (active)
1160                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1161                         qlcnic_sriov_cleanup_transaction(trans);
1162
1163         return;
1164 }
1165
1166 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1167                                        struct qlcnic_bc_hdr *hdr,
1168                                        struct qlcnic_vf_info *vf)
1169 {
1170         struct qlcnic_bc_trans *trans;
1171         struct qlcnic_adapter *adapter = vf->adapter;
1172         struct qlcnic_cmd_args cmd;
1173         u32 pay_size;
1174         int err;
1175         u8 cmd_op;
1176
1177         if (adapter->need_fw_reset)
1178                 return;
1179
1180         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1181             hdr->op_type != QLC_BC_CMD &&
1182             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1183                 return;
1184
1185         if (hdr->frag_num > 1) {
1186                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1187                 return;
1188         }
1189
1190         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1191         cmd_op = hdr->cmd_op;
1192         if (qlcnic_sriov_alloc_bc_trans(&trans))
1193                 return;
1194
1195         if (hdr->op_type == QLC_BC_CMD)
1196                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1197         else
1198                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1199
1200         if (err) {
1201                 qlcnic_sriov_cleanup_transaction(trans);
1202                 return;
1203         }
1204
1205         cmd.op_type = hdr->op_type;
1206         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1207                                         QLC_BC_COMMAND)) {
1208                 qlcnic_free_mbx_args(&cmd);
1209                 qlcnic_sriov_cleanup_transaction(trans);
1210                 return;
1211         }
1212
1213         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1214                                          trans->curr_req_frag);
1215         qlcnic_sriov_pull_bc_msg(vf->adapter,
1216                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1217                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1218                                  pay_size);
1219         trans->func_id = vf->pci_func;
1220         trans->vf = vf;
1221         trans->trans_id = hdr->seq_id;
1222         trans->curr_req_frag++;
1223
1224         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1225                 return;
1226
1227         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1228                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1229                         qlcnic_free_mbx_args(&cmd);
1230                         qlcnic_sriov_cleanup_transaction(trans);
1231                 }
1232         } else {
1233                 spin_lock(&vf->rcv_pend.lock);
1234                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1235                 vf->rcv_pend.count++;
1236                 spin_unlock(&vf->rcv_pend.lock);
1237         }
1238 }
1239
1240 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1241                                           struct qlcnic_vf_info *vf)
1242 {
1243         struct qlcnic_bc_hdr hdr;
1244         u32 *ptr = (u32 *)&hdr;
1245         u8 msg_type, i;
1246
1247         for (i = 2; i < 6; i++)
1248                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1249         msg_type = hdr.msg_type;
1250
1251         switch (msg_type) {
1252         case QLC_BC_COMMAND:
1253                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1254                 break;
1255         case QLC_BC_RESPONSE:
1256                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1257                 break;
1258         }
1259 }
1260
1261 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1262                                           struct qlcnic_vf_info *vf)
1263 {
1264         struct qlcnic_adapter *adapter = vf->adapter;
1265
1266         if (qlcnic_sriov_pf_check(adapter))
1267                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1268         else
1269                 dev_err(&adapter->pdev->dev,
1270                         "Invalid event to VF. VF should not get FLR event\n");
1271 }
1272
1273 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1274 {
1275         struct qlcnic_vf_info *vf;
1276         struct qlcnic_sriov *sriov;
1277         int index;
1278         u8 pci_func;
1279
1280         sriov = adapter->ahw->sriov;
1281         pci_func = qlcnic_sriov_target_func_id(event);
1282         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1283
1284         if (index < 0)
1285                 return;
1286
1287         vf = &sriov->vf_info[index];
1288         vf->pci_func = pci_func;
1289
1290         if (qlcnic_sriov_channel_free_check(event))
1291                 complete(&vf->ch_free_cmpl);
1292
1293         if (qlcnic_sriov_flr_check(event)) {
1294                 qlcnic_sriov_handle_flr_event(sriov, vf);
1295                 return;
1296         }
1297
1298         if (qlcnic_sriov_bc_msg_check(event))
1299                 qlcnic_sriov_handle_msg_event(sriov, vf);
1300 }
1301
1302 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1303 {
1304         struct qlcnic_cmd_args cmd;
1305         int err;
1306
1307         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1308                 return 0;
1309
1310         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1311                 return -ENOMEM;
1312
1313         if (enable)
1314                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1315
1316         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1317
1318         if (err != QLCNIC_RCODE_SUCCESS) {
1319                 dev_err(&adapter->pdev->dev,
1320                         "Failed to %s bc events, err=%d\n",
1321                         (enable ? "enable" : "disable"), err);
1322         }
1323
1324         qlcnic_free_mbx_args(&cmd);
1325         return err;
1326 }
1327
1328 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1329                                      struct qlcnic_bc_trans *trans)
1330 {
1331         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1332         u32 state;
1333
1334         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1335         if (state == QLC_83XX_IDC_DEV_READY) {
1336                 msleep(20);
1337                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1338                 trans->trans_state = QLC_INIT;
1339                 if (++adapter->fw_fail_cnt > max)
1340                         return -EIO;
1341                 else
1342                         return 0;
1343         }
1344
1345         return -EIO;
1346 }
1347
1348 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1349                                   struct qlcnic_cmd_args *cmd)
1350 {
1351         struct qlcnic_hardware_context *ahw = adapter->ahw;
1352         struct qlcnic_mailbox *mbx = ahw->mailbox;
1353         struct device *dev = &adapter->pdev->dev;
1354         struct qlcnic_bc_trans *trans;
1355         int err;
1356         u32 rsp_data, opcode, mbx_err_code, rsp;
1357         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1358         u8 func = ahw->pci_func;
1359
1360         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1361         if (rsp)
1362                 return rsp;
1363
1364         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1365         if (rsp)
1366                 goto cleanup_transaction;
1367
1368 retry:
1369         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1370                 rsp = -EIO;
1371                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1372                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1373                 goto err_out;
1374         }
1375
1376         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1377         if (err) {
1378                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1379                         (cmd->req.arg[0] & 0xffff), func);
1380                 rsp = QLCNIC_RCODE_TIMEOUT;
1381
1382                 /* After adapter reset PF driver may take some time to
1383                  * respond to VF's request. Retry request till maximum retries.
1384                  */
1385                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1386                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1387                         goto retry;
1388
1389                 goto err_out;
1390         }
1391
1392         rsp_data = cmd->rsp.arg[0];
1393         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1394         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1395
1396         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1397             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1398                 rsp = QLCNIC_RCODE_SUCCESS;
1399         } else {
1400                 rsp = mbx_err_code;
1401                 if (!rsp)
1402                         rsp = 1;
1403                 dev_err(dev,
1404                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1405                         opcode, mbx_err_code, func);
1406         }
1407
1408 err_out:
1409         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1410                 ahw->reset_context = 1;
1411                 adapter->need_fw_reset = 1;
1412                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1413         }
1414
1415 cleanup_transaction:
1416         qlcnic_sriov_cleanup_transaction(trans);
1417         return rsp;
1418 }
1419
1420 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1421 {
1422         struct qlcnic_cmd_args cmd;
1423         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1424         int ret;
1425
1426         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1427                 return -ENOMEM;
1428
1429         ret = qlcnic_issue_cmd(adapter, &cmd);
1430         if (ret) {
1431                 dev_err(&adapter->pdev->dev,
1432                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1433                         ret);
1434                 goto out;
1435         }
1436
1437         cmd_op = (cmd.rsp.arg[0] & 0xff);
1438         if (cmd.rsp.arg[0] >> 25 == 2)
1439                 return 2;
1440         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1441                 set_bit(QLC_BC_VF_STATE, &vf->state);
1442         else
1443                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1444
1445 out:
1446         qlcnic_free_mbx_args(&cmd);
1447         return ret;
1448 }
1449
1450 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1451 {
1452         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1453         struct qlcnic_mac_list_s *cur;
1454         struct list_head *head, tmp_list;
1455
1456         INIT_LIST_HEAD(&tmp_list);
1457         head = &adapter->vf_mc_list;
1458         netif_addr_lock_bh(netdev);
1459
1460         while (!list_empty(head)) {
1461                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1462                 list_move(&cur->list, &tmp_list);
1463         }
1464
1465         netif_addr_unlock_bh(netdev);
1466
1467         while (!list_empty(&tmp_list)) {
1468                 cur = list_entry((&tmp_list)->next,
1469                                  struct qlcnic_mac_list_s, list);
1470                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1471                 list_del(&cur->list);
1472                 kfree(cur);
1473         }
1474 }
1475
1476 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1477 {
1478         struct list_head *head = &bc->async_list;
1479         struct qlcnic_async_work_list *entry;
1480
1481         while (!list_empty(head)) {
1482                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1483                                    list);
1484                 cancel_work_sync(&entry->work);
1485                 list_del(&entry->list);
1486                 kfree(entry);
1487         }
1488 }
1489
1490 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1491 {
1492         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1493         u16 vlan;
1494
1495         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1496                 return;
1497
1498         vlan = adapter->ahw->sriov->vlan;
1499         __qlcnic_set_multi(netdev, vlan);
1500 }
1501
1502 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1503 {
1504         struct qlcnic_async_work_list *entry;
1505         struct net_device *netdev;
1506
1507         entry = container_of(work, struct qlcnic_async_work_list, work);
1508         netdev = (struct net_device *)entry->ptr;
1509
1510         qlcnic_sriov_vf_set_multi(netdev);
1511         return;
1512 }
1513
1514 static struct qlcnic_async_work_list *
1515 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1516 {
1517         struct list_head *node;
1518         struct qlcnic_async_work_list *entry = NULL;
1519         u8 empty = 0;
1520
1521         list_for_each(node, &bc->async_list) {
1522                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1523                 if (!work_pending(&entry->work)) {
1524                         empty = 1;
1525                         break;
1526                 }
1527         }
1528
1529         if (!empty) {
1530                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1531                                 GFP_ATOMIC);
1532                 if (entry == NULL)
1533                         return NULL;
1534                 list_add_tail(&entry->list, &bc->async_list);
1535         }
1536
1537         return entry;
1538 }
1539
1540 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1541                                                 work_func_t func, void *data)
1542 {
1543         struct qlcnic_async_work_list *entry = NULL;
1544
1545         entry = qlcnic_sriov_get_free_node_async_work(bc);
1546         if (!entry)
1547                 return;
1548
1549         entry->ptr = data;
1550         INIT_WORK(&entry->work, func);
1551         queue_work(bc->bc_async_wq, &entry->work);
1552 }
1553
1554 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1555 {
1556
1557         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1558         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1559
1560         if (adapter->need_fw_reset)
1561                 return;
1562
1563         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1564                                             netdev);
1565 }
1566
1567 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1568 {
1569         int err;
1570
1571         adapter->need_fw_reset = 0;
1572         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1573         qlcnic_83xx_enable_mbx_interrupt(adapter);
1574
1575         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1576         if (err)
1577                 return err;
1578
1579         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1580         if (err)
1581                 goto err_out_cleanup_bc_intr;
1582
1583         err = qlcnic_sriov_vf_init_driver(adapter);
1584         if (err)
1585                 goto err_out_term_channel;
1586
1587         qlcnic_dcb_get_info(adapter->dcb);
1588
1589         return 0;
1590
1591 err_out_term_channel:
1592         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1593
1594 err_out_cleanup_bc_intr:
1595         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1596         return err;
1597 }
1598
1599 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1600 {
1601         struct net_device *netdev = adapter->netdev;
1602
1603         if (netif_running(netdev)) {
1604                 if (!qlcnic_up(adapter, netdev))
1605                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1606         }
1607
1608         netif_device_attach(netdev);
1609 }
1610
1611 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1612 {
1613         struct qlcnic_hardware_context *ahw = adapter->ahw;
1614         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1615         struct net_device *netdev = adapter->netdev;
1616         u8 i, max_ints = ahw->num_msix - 1;
1617
1618         netif_device_detach(netdev);
1619         qlcnic_83xx_detach_mailbox_work(adapter);
1620         qlcnic_83xx_disable_mbx_intr(adapter);
1621
1622         if (netif_running(netdev))
1623                 qlcnic_down(adapter, netdev);
1624
1625         for (i = 0; i < max_ints; i++) {
1626                 intr_tbl[i].id = i;
1627                 intr_tbl[i].enabled = 0;
1628                 intr_tbl[i].src = 0;
1629         }
1630         ahw->reset_context = 0;
1631 }
1632
1633 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1634 {
1635         struct qlcnic_hardware_context *ahw = adapter->ahw;
1636         struct device *dev = &adapter->pdev->dev;
1637         struct qlc_83xx_idc *idc = &ahw->idc;
1638         u8 func = ahw->pci_func;
1639         u32 state;
1640
1641         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1642             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1643                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1644                         qlcnic_sriov_vf_attach(adapter);
1645                         adapter->fw_fail_cnt = 0;
1646                         dev_info(dev,
1647                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1648                                  __func__, func);
1649                 } else {
1650                         dev_err(dev,
1651                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1652                                 __func__, func);
1653                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1654                         dev_info(dev, "Current state 0x%x after FW reset\n",
1655                                  state);
1656                 }
1657         }
1658
1659         return 0;
1660 }
1661
1662 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1663 {
1664         struct qlcnic_hardware_context *ahw = adapter->ahw;
1665         struct qlcnic_mailbox *mbx = ahw->mailbox;
1666         struct device *dev = &adapter->pdev->dev;
1667         struct qlc_83xx_idc *idc = &ahw->idc;
1668         u8 func = ahw->pci_func;
1669         u32 state;
1670
1671         adapter->reset_ctx_cnt++;
1672
1673         /* Skip the context reset and check if FW is hung */
1674         if (adapter->reset_ctx_cnt < 3) {
1675                 adapter->need_fw_reset = 1;
1676                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1677                 dev_info(dev,
1678                          "Resetting context, wait here to check if FW is in failed state\n");
1679                 return 0;
1680         }
1681
1682         /* Check if number of resets exceed the threshold.
1683          * If it exceeds the threshold just fail the VF.
1684          */
1685         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1686                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1687                 adapter->tx_timeo_cnt = 0;
1688                 adapter->fw_fail_cnt = 0;
1689                 adapter->reset_ctx_cnt = 0;
1690                 qlcnic_sriov_vf_detach(adapter);
1691                 dev_err(dev,
1692                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1693                 return -EIO;
1694         }
1695
1696         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1697         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1698                  __func__, adapter->reset_ctx_cnt, func);
1699         set_bit(__QLCNIC_RESETTING, &adapter->state);
1700         adapter->need_fw_reset = 1;
1701         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1702         qlcnic_sriov_vf_detach(adapter);
1703         adapter->need_fw_reset = 0;
1704
1705         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1706                 qlcnic_sriov_vf_attach(adapter);
1707                 adapter->tx_timeo_cnt = 0;
1708                 adapter->reset_ctx_cnt = 0;
1709                 adapter->fw_fail_cnt = 0;
1710                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1711         } else {
1712                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1713                         __func__, func);
1714                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1715                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1716         }
1717
1718         return 0;
1719 }
1720
1721 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1722 {
1723         struct qlcnic_hardware_context *ahw = adapter->ahw;
1724         int ret = 0;
1725
1726         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1727                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1728         else if (ahw->reset_context)
1729                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1730
1731         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1732         return ret;
1733 }
1734
1735 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1736 {
1737         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1738
1739         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1740         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1741                 qlcnic_sriov_vf_detach(adapter);
1742
1743         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1744         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1745         return -EIO;
1746 }
1747
1748 static int
1749 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1750 {
1751         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1752         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1753
1754         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1755         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1756                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1757                 adapter->tx_timeo_cnt = 0;
1758                 adapter->reset_ctx_cnt = 0;
1759                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1760                 qlcnic_sriov_vf_detach(adapter);
1761         }
1762
1763         return 0;
1764 }
1765
1766 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1767 {
1768         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1769         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1770         u8 func = adapter->ahw->pci_func;
1771
1772         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1773                 dev_err(&adapter->pdev->dev,
1774                         "Firmware hang detected by VF 0x%x\n", func);
1775                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1776                 adapter->tx_timeo_cnt = 0;
1777                 adapter->reset_ctx_cnt = 0;
1778                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1779                 qlcnic_sriov_vf_detach(adapter);
1780         }
1781         return 0;
1782 }
1783
1784 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1785 {
1786         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1787         return 0;
1788 }
1789
1790 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1791 {
1792         struct qlcnic_adapter *adapter;
1793         struct qlc_83xx_idc *idc;
1794         int ret = 0;
1795
1796         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1797         idc = &adapter->ahw->idc;
1798         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1799
1800         switch (idc->curr_state) {
1801         case QLC_83XX_IDC_DEV_READY:
1802                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1803                 break;
1804         case QLC_83XX_IDC_DEV_NEED_RESET:
1805         case QLC_83XX_IDC_DEV_INIT:
1806                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1807                 break;
1808         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1809                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1810                 break;
1811         case QLC_83XX_IDC_DEV_FAILED:
1812                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1813                 break;
1814         case QLC_83XX_IDC_DEV_QUISCENT:
1815                 break;
1816         default:
1817                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1818         }
1819
1820         idc->prev_state = idc->curr_state;
1821         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1822                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1823                                      idc->delay);
1824 }
1825
1826 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1827 {
1828         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1829                 msleep(20);
1830
1831         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1832         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1833         cancel_delayed_work_sync(&adapter->fw_work);
1834 }
1835
1836 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1837                                           u16 vid, u8 enable)
1838 {
1839         u16 vlan = sriov->vlan;
1840         u8 allowed = 0;
1841         int i;
1842
1843         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1844                 return -EINVAL;
1845
1846         if (enable) {
1847                 if (vlan)
1848                         return -EINVAL;
1849
1850                 if (sriov->any_vlan) {
1851                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1852                                 if (sriov->allowed_vlans[i] == vid)
1853                                         allowed = 1;
1854                         }
1855
1856                         if (!allowed)
1857                                 return -EINVAL;
1858                 }
1859         } else {
1860                 if (!vlan || vlan != vid)
1861                         return -EINVAL;
1862         }
1863
1864         return 0;
1865 }
1866
1867 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1868                                    u16 vid, u8 enable)
1869 {
1870         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1871         struct qlcnic_cmd_args cmd;
1872         int ret;
1873
1874         if (vid == 0)
1875                 return 0;
1876
1877         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1878         if (ret)
1879                 return ret;
1880
1881         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1882                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1883         if (ret)
1884                 return ret;
1885
1886         cmd.req.arg[1] = (enable & 1) | vid << 16;
1887
1888         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1889         ret = qlcnic_issue_cmd(adapter, &cmd);
1890         if (ret) {
1891                 dev_err(&adapter->pdev->dev,
1892                         "Failed to configure guest VLAN, err=%d\n", ret);
1893         } else {
1894                 qlcnic_free_mac_list(adapter);
1895
1896                 if (enable)
1897                         sriov->vlan = vid;
1898                 else
1899                         sriov->vlan = 0;
1900
1901                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1902         }
1903
1904         qlcnic_free_mbx_args(&cmd);
1905         return ret;
1906 }
1907
1908 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1909 {
1910         struct list_head *head = &adapter->mac_list;
1911         struct qlcnic_mac_list_s *cur;
1912         u16 vlan;
1913
1914         vlan = adapter->ahw->sriov->vlan;
1915
1916         while (!list_empty(head)) {
1917                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1918                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1919                                           vlan, QLCNIC_MAC_DEL);
1920                 list_del(&cur->list);
1921                 kfree(cur);
1922         }
1923 }
1924
1925 int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
1926 {
1927         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1928         struct net_device *netdev = adapter->netdev;
1929         int retval;
1930
1931         netif_device_detach(netdev);
1932         qlcnic_cancel_idc_work(adapter);
1933
1934         if (netif_running(netdev))
1935                 qlcnic_down(adapter, netdev);
1936
1937         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1938         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1939         qlcnic_83xx_disable_mbx_intr(adapter);
1940         cancel_delayed_work_sync(&adapter->idc_aen_work);
1941
1942         retval = pci_save_state(pdev);
1943         if (retval)
1944                 return retval;
1945
1946         return 0;
1947 }
1948
1949 int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
1950 {
1951         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1952         struct net_device *netdev = adapter->netdev;
1953         int err;
1954
1955         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1956         qlcnic_83xx_enable_mbx_interrupt(adapter);
1957         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1958         if (err)
1959                 return err;
1960
1961         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1962         if (!err) {
1963                 if (netif_running(netdev)) {
1964                         err = qlcnic_up(adapter, netdev);
1965                         if (!err)
1966                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1967                 }
1968         }
1969
1970         netif_device_attach(netdev);
1971         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1972                              idc->delay);
1973         return err;
1974 }