Pileus Git - ~andy/linux/blob - drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  39
  40 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  41         .read_crb                       = qlcnic_83xx_read_crb,
  42         .write_crb                      = qlcnic_83xx_write_crb,
  43         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  44         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  45         .get_mac_address                = qlcnic_83xx_get_mac_address,
  46         .setup_intr                     = qlcnic_83xx_setup_intr,
  47         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  48         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  49         .get_func_no                    = qlcnic_83xx_get_func_no,
  50         .api_lock                       = qlcnic_83xx_cam_lock,
  51         .api_unlock                     = qlcnic_83xx_cam_unlock,
  52         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  53         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  54         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  55         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  56         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  57         .setup_link_event               = qlcnic_83xx_setup_link_event,
  58         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  59         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  60         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  61         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  62         .napi_enable                    = qlcnic_83xx_napi_enable,
  63         .napi_disable                   = qlcnic_83xx_napi_disable,
  64         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  65         .config_rss                     = qlcnic_83xx_config_rss,
  66         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  67         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  68         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  69         .get_board_info                 = qlcnic_83xx_get_port_info,
  70         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  71 };
  72
  73 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  74         .config_bridged_mode    = qlcnic_config_bridged_mode,
  75         .config_led             = qlcnic_config_led,
  76         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  77         .napi_add               = qlcnic_83xx_napi_add,
  78         .napi_del               = qlcnic_83xx_napi_del,
  79         .shutdown               = qlcnic_sriov_vf_shutdown,
  80         .resume                 = qlcnic_sriov_vf_resume,
  81         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  82         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  83 };
  84
  85 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  86         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  87         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  88         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  89         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  90 };
  91
  92 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  93 {
  94         return (val & (1 << QLC_BC_MSG)) ? true : false;
  95 }
  96
  97 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  98 {
  99         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 100 }
 101
 102 static inline bool qlcnic_sriov_flr_check(u32 val)
 103 {
 104         return (val & (1 << QLC_BC_FLR)) ? true : false;
 105 }
 106
 107 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 108 {
 109         return (val >> 4) & 0xff;
 110 }
 111
 112 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 113 {
 114         struct pci_dev *dev = adapter->pdev;
 115         int pos;
 116         u16 stride, offset;
 117
 118         if (qlcnic_sriov_vf_check(adapter))
 119                 return 0;
 120
 121         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 122         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 123         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 124
 125         return (dev->devfn + offset + stride * vf_id) & 0xff;
 126 }
 127
 128 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 129 {
 130         struct qlcnic_sriov *sriov;
 131         struct qlcnic_back_channel *bc;
 132         struct workqueue_struct *wq;
 133         struct qlcnic_vport *vp;
 134         struct qlcnic_vf_info *vf;
 135         int err, i;
 136
 137         if (!qlcnic_sriov_enable_check(adapter))
 138                 return -EIO;
 139
 140         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 141         if (!sriov)
 142                 return -ENOMEM;
 143
 144         adapter->ahw->sriov = sriov;
 145         sriov->num_vfs = num_vfs;
 146         bc = &sriov->bc;
 147         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 148                                  num_vfs, GFP_KERNEL);
 149         if (!sriov->vf_info) {
 150                 err = -ENOMEM;
 151                 goto qlcnic_free_sriov;
 152         }
 153
 154         wq = create_singlethread_workqueue("bc-trans");
 155         if (wq == NULL) {
 156                 err = -ENOMEM;
 157                 dev_err(&adapter->pdev->dev,
 158                         "Cannot create bc-trans workqueue\n");
 159                 goto qlcnic_free_vf_info;
 160         }
 161
 162         bc->bc_trans_wq = wq;
 163
 164         wq = create_singlethread_workqueue("async");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 168                 goto qlcnic_destroy_trans_wq;
 169         }
 170
 171         bc->bc_async_wq =  wq;
 172         INIT_LIST_HEAD(&bc->async_list);
 173
 174         for (i = 0; i < num_vfs; i++) {
 175                 vf = &sriov->vf_info[i];
 176                 vf->adapter = adapter;
 177                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 178                 mutex_init(&vf->send_cmd_lock);
 179                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 180                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 181                 spin_lock_init(&vf->rcv_act.lock);
 182                 spin_lock_init(&vf->rcv_pend.lock);
 183                 init_completion(&vf->ch_free_cmpl);
 184
 185                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 186
 187                 if (qlcnic_sriov_pf_check(adapter)) {
 188                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 189                         if (!vp) {
 190                                 err = -ENOMEM;
 191                                 goto qlcnic_destroy_async_wq;
 192                         }
 193                         sriov->vf_info[i].vp = vp;
 194                         vp->max_tx_bw = MAX_BW;
 195                         vp->spoofchk = true;
 196                         random_ether_addr(vp->mac);
 197                         dev_info(&adapter->pdev->dev,
 198                                  "MAC Address %pM is configured for VF %d\n",
 199                                  vp->mac, i);
 200                 }
 201         }
 202
 203         return 0;
 204
 205 qlcnic_destroy_async_wq:
 206         destroy_workqueue(bc->bc_async_wq);
 207
 208 qlcnic_destroy_trans_wq:
 209         destroy_workqueue(bc->bc_trans_wq);
 210
 211 qlcnic_free_vf_info:
 212         kfree(sriov->vf_info);
 213
 214 qlcnic_free_sriov:
 215         kfree(adapter->ahw->sriov);
 216         return err;
 217 }
 218
 219 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 220 {
 221         struct qlcnic_bc_trans *trans;
 222         struct qlcnic_cmd_args cmd;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&t_list->lock, flags);
 226
 227         while (!list_empty(&t_list->wait_list)) {
 228                 trans = list_first_entry(&t_list->wait_list,
 229                                          struct qlcnic_bc_trans, list);
 230                 list_del(&trans->list);
 231                 t_list->count--;
 232                 cmd.req.arg = (u32 *)trans->req_pay;
 233                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 234                 qlcnic_free_mbx_args(&cmd);
 235                 qlcnic_sriov_cleanup_transaction(trans);
 236         }
 237
 238         spin_unlock_irqrestore(&t_list->lock, flags);
 239 }
 240
 241 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 242 {
 243         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 244         struct qlcnic_back_channel *bc = &sriov->bc;
 245         struct qlcnic_vf_info *vf;
 246         int i;
 247
 248         if (!qlcnic_sriov_enable_check(adapter))
 249                 return;
 250
 251         qlcnic_sriov_cleanup_async_list(bc);
 252         destroy_workqueue(bc->bc_async_wq);
 253
 254         for (i = 0; i < sriov->num_vfs; i++) {
 255                 vf = &sriov->vf_info[i];
 256                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 257                 cancel_work_sync(&vf->trans_work);
 258                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 259         }
 260
 261         destroy_workqueue(bc->bc_trans_wq);
 262
 263         for (i = 0; i < sriov->num_vfs; i++)
 264                 kfree(sriov->vf_info[i].vp);
 265
 266         kfree(sriov->vf_info);
 267         kfree(adapter->ahw->sriov);
 268 }
 269
 270 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 271 {
 272         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 273         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 274         __qlcnic_sriov_cleanup(adapter);
 275 }
 276
 277 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 278 {
 279         if (qlcnic_sriov_pf_check(adapter))
 280                 qlcnic_sriov_pf_cleanup(adapter);
 281
 282         if (qlcnic_sriov_vf_check(adapter))
 283                 qlcnic_sriov_vf_cleanup(adapter);
 284 }
 285
 286 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 287                                     u32 *pay, u8 pci_func, u8 size)
 288 {
 289         struct qlcnic_hardware_context *ahw = adapter->ahw;
 290         struct qlcnic_mailbox *mbx = ahw->mailbox;
 291         struct qlcnic_cmd_args cmd;
 292         unsigned long timeout;
 293         int err;
 294
 295         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 296         cmd.hdr = hdr;
 297         cmd.pay = pay;
 298         cmd.pay_size = size;
 299         cmd.func_num = pci_func;
 300         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 301         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 302
 303         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 304         if (err) {
 305                 dev_err(&adapter->pdev->dev,
 306                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 307                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 308                         ahw->op_mode);
 309                 return err;
 310         }
 311
 312         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 313                 dev_err(&adapter->pdev->dev,
 314                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 315                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 316                         ahw->op_mode);
 317                 flush_workqueue(mbx->work_q);
 318         }
 319
 320         return cmd.rsp_opcode;
 321 }
 322
 323 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 324 {
 325         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 326         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 327         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 328         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 329         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 330         adapter->max_rds_rings = MAX_RDS_RINGS;
 331 }
 332
 333 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 334                                    struct qlcnic_info *npar_info, u16 vport_id)
 335 {
 336         struct device *dev = &adapter->pdev->dev;
 337         struct qlcnic_cmd_args cmd;
 338         int err;
 339         u32 status;
 340
 341         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 342         if (err)
 343                 return err;
 344
 345         cmd.req.arg[1] = vport_id << 16 | 0x1;
 346         err = qlcnic_issue_cmd(adapter, &cmd);
 347         if (err) {
 348                 dev_err(&adapter->pdev->dev,
 349                         "Failed to get vport info, err=%d\n", err);
 350                 qlcnic_free_mbx_args(&cmd);
 351                 return err;
 352         }
 353
 354         status = cmd.rsp.arg[2] & 0xffff;
 355         if (status & BIT_0)
 356                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 357         if (status & BIT_1)
 358                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 359         if (status & BIT_2)
 360                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 361         if (status & BIT_3)
 362                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 363         if (status & BIT_4)
 364                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 365         if (status & BIT_5)
 366                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 367         if (status & BIT_6)
 368                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 369         if (status & BIT_7)
 370                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 371         if (status & BIT_8)
 372                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 373         if (status & BIT_9)
 374                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 375
 376         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 377         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 378         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 379         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 380
 381         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 382                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 383                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 384                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 385                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 386                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 387                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 388                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 389                  npar_info->max_rx_mcast_mac_filters,
 390                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 391                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 392                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 393                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 394                  npar_info->max_remote_ipv6_addrs);
 395
 396         qlcnic_free_mbx_args(&cmd);
 397         return err;
 398 }
 399
 400 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 401                                       struct qlcnic_cmd_args *cmd)
 402 {
 403         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 404         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 405         return 0;
 406 }
 407
 408 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 409                                             struct qlcnic_cmd_args *cmd)
 410 {
 411         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 412         int i, num_vlans;
 413         u16 *vlans;
 414
 415         if (sriov->allowed_vlans)
 416                 return 0;
 417
 418         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 419         if (!sriov->any_vlan)
 420                 return 0;
 421
 422         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 423         num_vlans = sriov->num_allowed_vlans;
 424         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 425         if (!sriov->allowed_vlans)
 426                 return -ENOMEM;
 427
 428         vlans = (u16 *)&cmd->rsp.arg[3];
 429         for (i = 0; i < num_vlans; i++)
 430                 sriov->allowed_vlans[i] = vlans[i];
 431
 432         return 0;
 433 }
 434
 435 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter,
 436                                    struct qlcnic_info *info)
 437 {
 438         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 439         struct qlcnic_cmd_args cmd;
 440         int ret = 0;
 441
 442         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 443         if (ret)
 444                 return ret;
 445
 446         ret = qlcnic_issue_cmd(adapter, &cmd);
 447         if (ret) {
 448                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 449                         ret);
 450         } else {
 451                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 452                 switch (sriov->vlan_mode) {
 453                 case QLC_GUEST_VLAN_MODE:
 454                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 455                         break;
 456                 case QLC_PVID_MODE:
 457                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 458                         break;
 459                 }
 460         }
 461
 462         qlcnic_free_mbx_args(&cmd);
 463         return ret;
 464 }
 465
 466 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 467 {
 468         struct qlcnic_hardware_context *ahw = adapter->ahw;
 469         struct qlcnic_info nic_info;
 470         int err;
 471
 472         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 473         if (err)
 474                 return err;
 475
 476         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 477         if (err)
 478                 return -EIO;
 479
 480         err = qlcnic_sriov_get_vf_acl(adapter, &nic_info);
 481         if (err)
 482                 return err;
 483
 484         if (qlcnic_83xx_get_port_info(adapter))
 485                 return -EIO;
 486
 487         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 488         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 489         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 490                  adapter->ahw->fw_hal_version);
 491
 492         ahw->physical_port = (u8) nic_info.phys_port;
 493         ahw->switch_mode = nic_info.switch_mode;
 494         ahw->max_mtu = nic_info.max_mtu;
 495         ahw->op_mode = nic_info.op_mode;
 496         ahw->capabilities = nic_info.capabilities;
 497         return 0;
 498 }
 499
 500 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 501                                  int pci_using_dac)
 502 {
 503         int err;
 504
 505         INIT_LIST_HEAD(&adapter->vf_mc_list);
 506         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 507                 dev_warn(&adapter->pdev->dev,
 508                          "Device does not support MSI interrupts\n");
 509
 510         /* compute and set default and max tx/sds rings */
 511         qlcnic_set_tx_ring_count(adapter, QLCNIC_SINGLE_RING);
 512         qlcnic_set_sds_ring_count(adapter, QLCNIC_SINGLE_RING);
 513
 514         err = qlcnic_setup_intr(adapter);
 515         if (err) {
 516                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 517                 goto err_out_disable_msi;
 518         }
 519
 520         err = qlcnic_83xx_setup_mbx_intr(adapter);
 521         if (err)
 522                 goto err_out_disable_msi;
 523
 524         err = qlcnic_sriov_init(adapter, 1);
 525         if (err)
 526                 goto err_out_disable_mbx_intr;
 527
 528         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 529         if (err)
 530                 goto err_out_cleanup_sriov;
 531
 532         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 533         if (err)
 534                 goto err_out_disable_bc_intr;
 535
 536         err = qlcnic_sriov_vf_init_driver(adapter);
 537         if (err)
 538                 goto err_out_send_channel_term;
 539
 540         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 541         if (err)
 542                 goto err_out_send_channel_term;
 543
 544         pci_set_drvdata(adapter->pdev, adapter);
 545         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 546                  adapter->netdev->name);
 547
 548         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 549                              adapter->ahw->idc.delay);
 550         return 0;
 551
 552 err_out_send_channel_term:
 553         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 554
 555 err_out_disable_bc_intr:
 556         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 557
 558 err_out_cleanup_sriov:
 559         __qlcnic_sriov_cleanup(adapter);
 560
 561 err_out_disable_mbx_intr:
 562         qlcnic_83xx_free_mbx_intr(adapter);
 563
 564 err_out_disable_msi:
 565         qlcnic_teardown_intr(adapter);
 566         return err;
 567 }
 568
 569 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 570 {
 571         u32 state;
 572
 573         do {
 574                 msleep(20);
 575                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 576                         return -EIO;
 577                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 578         } while (state != QLC_83XX_IDC_DEV_READY);
 579
 580         return 0;
 581 }
 582
 583 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 584 {
 585         struct qlcnic_hardware_context *ahw = adapter->ahw;
 586         int err;
 587
 588         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 589         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 590         ahw->reset_context = 0;
 591         adapter->fw_fail_cnt = 0;
 592         ahw->msix_supported = 1;
 593         adapter->need_fw_reset = 0;
 594         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 595
 596         err = qlcnic_sriov_check_dev_ready(adapter);
 597         if (err)
 598                 return err;
 599
 600         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 601         if (err)
 602                 return err;
 603
 604         if (qlcnic_read_mac_addr(adapter))
 605                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 606
 607         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 608
 609         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 610         return 0;
 611 }
 612
 613 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 614 {
 615         struct qlcnic_hardware_context *ahw = adapter->ahw;
 616
 617         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 618         dev_info(&adapter->pdev->dev,
 619                  "HAL Version: %d Non Privileged SRIOV function\n",
 620                  ahw->fw_hal_version);
 621         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 622         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 623         return;
 624 }
 625
 626 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 627 {
 628         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 629         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 630         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 631 }
 632
 633 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 634 {
 635         u32 pay_size;
 636
 637         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 638
 639         if (pay_size)
 640                 pay_size = QLC_BC_PAYLOAD_SZ;
 641         else
 642                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 643
 644         return pay_size;
 645 }
 646
 647 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 648 {
 649         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 650         u8 i;
 651
 652         if (qlcnic_sriov_vf_check(adapter))
 653                 return 0;
 654
 655         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 656                 if (vf_info[i].pci_func == pci_func)
 657                         return i;
 658         }
 659
 660         return -EINVAL;
 661 }
 662
 663 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 664 {
 665         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 666         if (!*trans)
 667                 return -ENOMEM;
 668
 669         init_completion(&(*trans)->resp_cmpl);
 670         return 0;
 671 }
 672
 673 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 674                                             u32 size)
 675 {
 676         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 677         if (!*hdr)
 678                 return -ENOMEM;
 679
 680         return 0;
 681 }
 682
 683 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 684 {
 685         const struct qlcnic_mailbox_metadata *mbx_tbl;
 686         int i, size;
 687
 688         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 689         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 690
 691         for (i = 0; i < size; i++) {
 692                 if (type == mbx_tbl[i].cmd) {
 693                         mbx->op_type = QLC_BC_CMD;
 694                         mbx->req.num = mbx_tbl[i].in_args;
 695                         mbx->rsp.num = mbx_tbl[i].out_args;
 696                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 697                                                GFP_ATOMIC);
 698                         if (!mbx->req.arg)
 699                                 return -ENOMEM;
 700                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 701                                                GFP_ATOMIC);
 702                         if (!mbx->rsp.arg) {
 703                                 kfree(mbx->req.arg);
 704                                 mbx->req.arg = NULL;
 705                                 return -ENOMEM;
 706                         }
 707                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 708                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 709                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 710                                            (3 << 29));
 711                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 712                         return 0;
 713                 }
 714         }
 715         return -EINVAL;
 716 }
 717
 718 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 719                                        struct qlcnic_cmd_args *cmd,
 720                                        u16 seq, u8 msg_type)
 721 {
 722         struct qlcnic_bc_hdr *hdr;
 723         int i;
 724         u32 num_regs, bc_pay_sz;
 725         u16 remainder;
 726         u8 cmd_op, num_frags, t_num_frags;
 727
 728         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 729         if (msg_type == QLC_BC_COMMAND) {
 730                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 731                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 732                 num_regs = cmd->req.num;
 733                 trans->req_pay_size = (num_regs * 4);
 734                 num_regs = cmd->rsp.num;
 735                 trans->rsp_pay_size = (num_regs * 4);
 736                 cmd_op = cmd->req.arg[0] & 0xff;
 737                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 738                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 739                 if (remainder)
 740                         num_frags++;
 741                 t_num_frags = num_frags;
 742                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 743                         return -ENOMEM;
 744                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 745                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 746                 if (remainder)
 747                         num_frags++;
 748                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 749                         return -ENOMEM;
 750                 num_frags  = t_num_frags;
 751                 hdr = trans->req_hdr;
 752         }  else {
 753                 cmd->req.arg = (u32 *)trans->req_pay;
 754                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 755                 cmd_op = cmd->req.arg[0] & 0xff;
 756                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 757                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 758                 if (remainder)
 759                         num_frags++;
 760                 cmd->req.num = trans->req_pay_size / 4;
 761                 cmd->rsp.num = trans->rsp_pay_size / 4;
 762                 hdr = trans->rsp_hdr;
 763                 cmd->op_type = trans->req_hdr->op_type;
 764         }
 765
 766         trans->trans_id = seq;
 767         trans->cmd_id = cmd_op;
 768         for (i = 0; i < num_frags; i++) {
 769                 hdr[i].version = 2;
 770                 hdr[i].msg_type = msg_type;
 771                 hdr[i].op_type = cmd->op_type;
 772                 hdr[i].num_cmds = 1;
 773                 hdr[i].num_frags = num_frags;
 774                 hdr[i].frag_num = i + 1;
 775                 hdr[i].cmd_op = cmd_op;
 776                 hdr[i].seq_id = seq;
 777         }
 778         return 0;
 779 }
 780
 781 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 782 {
 783         if (!trans)
 784                 return;
 785         kfree(trans->req_hdr);
 786         kfree(trans->rsp_hdr);
 787         kfree(trans);
 788 }
 789
 790 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 791                                     struct qlcnic_bc_trans *trans, u8 type)
 792 {
 793         struct qlcnic_trans_list *t_list;
 794         unsigned long flags;
 795         int ret = 0;
 796
 797         if (type == QLC_BC_RESPONSE) {
 798                 t_list = &vf->rcv_act;
 799                 spin_lock_irqsave(&t_list->lock, flags);
 800                 t_list->count--;
 801                 list_del(&trans->list);
 802                 if (t_list->count > 0)
 803                         ret = 1;
 804                 spin_unlock_irqrestore(&t_list->lock, flags);
 805         }
 806         if (type == QLC_BC_COMMAND) {
 807                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 808                         msleep(100);
 809                 vf->send_cmd = NULL;
 810                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 811         }
 812         return ret;
 813 }
 814
 815 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 816                                          struct qlcnic_vf_info *vf,
 817                                          work_func_t func)
 818 {
 819         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 820             vf->adapter->need_fw_reset)
 821                 return;
 822
 823         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 824 }
 825
 826 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 827 {
 828         struct completion *cmpl = &trans->resp_cmpl;
 829
 830         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 831                 trans->trans_state = QLC_END;
 832         else
 833                 trans->trans_state = QLC_ABORT;
 834
 835         return;
 836 }
 837
 838 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 839                                             u8 type)
 840 {
 841         if (type == QLC_BC_RESPONSE) {
 842                 trans->curr_rsp_frag++;
 843                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 844                         trans->trans_state = QLC_INIT;
 845                 else
 846                         trans->trans_state = QLC_END;
 847         } else {
 848                 trans->curr_req_frag++;
 849                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 850                         trans->trans_state = QLC_INIT;
 851                 else
 852                         trans->trans_state = QLC_WAIT_FOR_RESP;
 853         }
 854 }
 855
 856 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 857                                                u8 type)
 858 {
 859         struct qlcnic_vf_info *vf = trans->vf;
 860         struct completion *cmpl = &vf->ch_free_cmpl;
 861
 862         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 863                 trans->trans_state = QLC_ABORT;
 864                 return;
 865         }
 866
 867         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 868         qlcnic_sriov_handle_multi_frags(trans, type);
 869 }
 870
 871 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 872                                      u32 *hdr, u32 *pay, u32 size)
 873 {
 874         struct qlcnic_hardware_context *ahw = adapter->ahw;
 875         u32 fw_mbx;
 876         u8 i, max = 2, hdr_size, j;
 877
 878         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 879         max = (size / sizeof(u32)) + hdr_size;
 880
 881         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 882         for (i = 2, j = 0; j < hdr_size; i++, j++)
 883                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 884         for (; j < max; i++, j++)
 885                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 886 }
 887
 888 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 889 {
 890         int ret = -EBUSY;
 891         u32 timeout = 10000;
 892
 893         do {
 894                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 895                         ret = 0;
 896                         break;
 897                 }
 898                 mdelay(1);
 899         } while (--timeout);
 900
 901         return ret;
 902 }
 903
 904 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 905 {
 906         struct qlcnic_vf_info *vf = trans->vf;
 907         u32 pay_size, hdr_size;
 908         u32 *hdr, *pay;
 909         int ret;
 910         u8 pci_func = trans->func_id;
 911
 912         if (__qlcnic_sriov_issue_bc_post(vf))
 913                 return -EBUSY;
 914
 915         if (type == QLC_BC_COMMAND) {
 916                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 917                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 918                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 919                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 920                                                        trans->curr_req_frag);
 921                 pay_size = (pay_size / sizeof(u32));
 922         } else {
 923                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 924                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 925                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 926                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 927                                                        trans->curr_rsp_frag);
 928                 pay_size = (pay_size / sizeof(u32));
 929         }
 930
 931         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 932                                        pci_func, pay_size);
 933         return ret;
 934 }
 935
 936 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 937                                       struct qlcnic_vf_info *vf, u8 type)
 938 {
 939         bool flag = true;
 940         int err = -EIO;
 941
 942         while (flag) {
 943                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 944                     vf->adapter->need_fw_reset)
 945                         trans->trans_state = QLC_ABORT;
 946
 947                 switch (trans->trans_state) {
 948                 case QLC_INIT:
 949                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 950                         if (qlcnic_sriov_issue_bc_post(trans, type))
 951                                 trans->trans_state = QLC_ABORT;
 952                         break;
 953                 case QLC_WAIT_FOR_CHANNEL_FREE:
 954                         qlcnic_sriov_wait_for_channel_free(trans, type);
 955                         break;
 956                 case QLC_WAIT_FOR_RESP:
 957                         qlcnic_sriov_wait_for_resp(trans);
 958                         break;
 959                 case QLC_END:
 960                         err = 0;
 961                         flag = false;
 962                         break;
 963                 case QLC_ABORT:
 964                         err = -EIO;
 965                         flag = false;
 966                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 967                         break;
 968                 default:
 969                         err = -EIO;
 970                         flag = false;
 971                 }
 972         }
 973         return err;
 974 }
 975
 976 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 977                                     struct qlcnic_bc_trans *trans, int pci_func)
 978 {
 979         struct qlcnic_vf_info *vf;
 980         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 981
 982         if (index < 0)
 983                 return -EIO;
 984
 985         vf = &adapter->ahw->sriov->vf_info[index];
 986         trans->vf = vf;
 987         trans->func_id = pci_func;
 988
 989         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 990                 if (qlcnic_sriov_pf_check(adapter))
 991                         return -EIO;
 992                 if (qlcnic_sriov_vf_check(adapter) &&
 993                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
 994                         return -EIO;
 995         }
 996
 997         mutex_lock(&vf->send_cmd_lock);
 998         vf->send_cmd = trans;
 999         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1000         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1001         mutex_unlock(&vf->send_cmd_lock);
1002         return err;
1003 }
1004
1005 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1006                                           struct qlcnic_bc_trans *trans,
1007                                           struct qlcnic_cmd_args *cmd)
1008 {
1009 #ifdef CONFIG_QLCNIC_SRIOV
1010         if (qlcnic_sriov_pf_check(adapter)) {
1011                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1012                 return;
1013         }
1014 #endif
1015         cmd->rsp.arg[0] |= (0x9 << 25);
1016         return;
1017 }
1018
1019 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1020 {
1021         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1022                                                  trans_work);
1023         struct qlcnic_bc_trans *trans = NULL;
1024         struct qlcnic_adapter *adapter  = vf->adapter;
1025         struct qlcnic_cmd_args cmd;
1026         u8 req;
1027
1028         if (adapter->need_fw_reset)
1029                 return;
1030
1031         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1032                 return;
1033
1034         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1035         trans = list_first_entry(&vf->rcv_act.wait_list,
1036                                  struct qlcnic_bc_trans, list);
1037         adapter = vf->adapter;
1038
1039         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1040                                         QLC_BC_RESPONSE))
1041                 goto cleanup_trans;
1042
1043         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1044         trans->trans_state = QLC_INIT;
1045         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1046
1047 cleanup_trans:
1048         qlcnic_free_mbx_args(&cmd);
1049         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1050         qlcnic_sriov_cleanup_transaction(trans);
1051         if (req)
1052                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1053                                              qlcnic_sriov_process_bc_cmd);
1054 }
1055
1056 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1057                                         struct qlcnic_vf_info *vf)
1058 {
1059         struct qlcnic_bc_trans *trans;
1060         u32 pay_size;
1061
1062         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1063                 return;
1064
1065         trans = vf->send_cmd;
1066
1067         if (trans == NULL)
1068                 goto clear_send;
1069
1070         if (trans->trans_id != hdr->seq_id)
1071                 goto clear_send;
1072
1073         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1074                                                trans->curr_rsp_frag);
1075         qlcnic_sriov_pull_bc_msg(vf->adapter,
1076                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1077                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1078                                  pay_size);
1079         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1080                 goto clear_send;
1081
1082         complete(&trans->resp_cmpl);
1083
1084 clear_send:
1085         clear_bit(QLC_BC_VF_SEND, &vf->state);
1086 }
1087
1088 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1089                                 struct qlcnic_vf_info *vf,
1090                                 struct qlcnic_bc_trans *trans)
1091 {
1092         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1093
1094         t_list->count++;
1095         list_add_tail(&trans->list, &t_list->wait_list);
1096         if (t_list->count == 1)
1097                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1098                                              qlcnic_sriov_process_bc_cmd);
1099         return 0;
1100 }
1101
1102 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1103                                      struct qlcnic_vf_info *vf,
1104                                      struct qlcnic_bc_trans *trans)
1105 {
1106         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1107
1108         spin_lock(&t_list->lock);
1109
1110         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1111
1112         spin_unlock(&t_list->lock);
1113         return 0;
1114 }
1115
1116 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1117                                               struct qlcnic_vf_info *vf,
1118                                               struct qlcnic_bc_hdr *hdr)
1119 {
1120         struct qlcnic_bc_trans *trans = NULL;
1121         struct list_head *node;
1122         u32 pay_size, curr_frag;
1123         u8 found = 0, active = 0;
1124
1125         spin_lock(&vf->rcv_pend.lock);
1126         if (vf->rcv_pend.count > 0) {
1127                 list_for_each(node, &vf->rcv_pend.wait_list) {
1128                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1129                         if (trans->trans_id == hdr->seq_id) {
1130                                 found = 1;
1131                                 break;
1132                         }
1133                 }
1134         }
1135
1136         if (found) {
1137                 curr_frag = trans->curr_req_frag;
1138                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1139                                                        curr_frag);
1140                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1141                                          (u32 *)(trans->req_hdr + curr_frag),
1142                                          (u32 *)(trans->req_pay + curr_frag),
1143                                          pay_size);
1144                 trans->curr_req_frag++;
1145                 if (trans->curr_req_frag >= hdr->num_frags) {
1146                         vf->rcv_pend.count--;
1147                         list_del(&trans->list);
1148                         active = 1;
1149                 }
1150         }
1151         spin_unlock(&vf->rcv_pend.lock);
1152
1153         if (active)
1154                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1155                         qlcnic_sriov_cleanup_transaction(trans);
1156
1157         return;
1158 }
1159
1160 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1161                                        struct qlcnic_bc_hdr *hdr,
1162                                        struct qlcnic_vf_info *vf)
1163 {
1164         struct qlcnic_bc_trans *trans;
1165         struct qlcnic_adapter *adapter = vf->adapter;
1166         struct qlcnic_cmd_args cmd;
1167         u32 pay_size;
1168         int err;
1169         u8 cmd_op;
1170
1171         if (adapter->need_fw_reset)
1172                 return;
1173
1174         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1175             hdr->op_type != QLC_BC_CMD &&
1176             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1177                 return;
1178
1179         if (hdr->frag_num > 1) {
1180                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1181                 return;
1182         }
1183
1184         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1185         cmd_op = hdr->cmd_op;
1186         if (qlcnic_sriov_alloc_bc_trans(&trans))
1187                 return;
1188
1189         if (hdr->op_type == QLC_BC_CMD)
1190                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1191         else
1192                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1193
1194         if (err) {
1195                 qlcnic_sriov_cleanup_transaction(trans);
1196                 return;
1197         }
1198
1199         cmd.op_type = hdr->op_type;
1200         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1201                                         QLC_BC_COMMAND)) {
1202                 qlcnic_free_mbx_args(&cmd);
1203                 qlcnic_sriov_cleanup_transaction(trans);
1204                 return;
1205         }
1206
1207         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1208                                          trans->curr_req_frag);
1209         qlcnic_sriov_pull_bc_msg(vf->adapter,
1210                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1211                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1212                                  pay_size);
1213         trans->func_id = vf->pci_func;
1214         trans->vf = vf;
1215         trans->trans_id = hdr->seq_id;
1216         trans->curr_req_frag++;
1217
1218         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1219                 return;
1220
1221         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1222                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1223                         qlcnic_free_mbx_args(&cmd);
1224                         qlcnic_sriov_cleanup_transaction(trans);
1225                 }
1226         } else {
1227                 spin_lock(&vf->rcv_pend.lock);
1228                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1229                 vf->rcv_pend.count++;
1230                 spin_unlock(&vf->rcv_pend.lock);
1231         }
1232 }
1233
1234 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1235                                           struct qlcnic_vf_info *vf)
1236 {
1237         struct qlcnic_bc_hdr hdr;
1238         u32 *ptr = (u32 *)&hdr;
1239         u8 msg_type, i;
1240
1241         for (i = 2; i < 6; i++)
1242                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1243         msg_type = hdr.msg_type;
1244
1245         switch (msg_type) {
1246         case QLC_BC_COMMAND:
1247                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1248                 break;
1249         case QLC_BC_RESPONSE:
1250                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1251                 break;
1252         }
1253 }
1254
1255 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1256                                           struct qlcnic_vf_info *vf)
1257 {
1258         struct qlcnic_adapter *adapter = vf->adapter;
1259
1260         if (qlcnic_sriov_pf_check(adapter))
1261                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1262         else
1263                 dev_err(&adapter->pdev->dev,
1264                         "Invalid event to VF. VF should not get FLR event\n");
1265 }
1266
1267 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1268 {
1269         struct qlcnic_vf_info *vf;
1270         struct qlcnic_sriov *sriov;
1271         int index;
1272         u8 pci_func;
1273
1274         sriov = adapter->ahw->sriov;
1275         pci_func = qlcnic_sriov_target_func_id(event);
1276         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1277
1278         if (index < 0)
1279                 return;
1280
1281         vf = &sriov->vf_info[index];
1282         vf->pci_func = pci_func;
1283
1284         if (qlcnic_sriov_channel_free_check(event))
1285                 complete(&vf->ch_free_cmpl);
1286
1287         if (qlcnic_sriov_flr_check(event)) {
1288                 qlcnic_sriov_handle_flr_event(sriov, vf);
1289                 return;
1290         }
1291
1292         if (qlcnic_sriov_bc_msg_check(event))
1293                 qlcnic_sriov_handle_msg_event(sriov, vf);
1294 }
1295
1296 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1297 {
1298         struct qlcnic_cmd_args cmd;
1299         int err;
1300
1301         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1302                 return 0;
1303
1304         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1305                 return -ENOMEM;
1306
1307         if (enable)
1308                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1309
1310         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1311
1312         if (err != QLCNIC_RCODE_SUCCESS) {
1313                 dev_err(&adapter->pdev->dev,
1314                         "Failed to %s bc events, err=%d\n",
1315                         (enable ? "enable" : "disable"), err);
1316         }
1317
1318         qlcnic_free_mbx_args(&cmd);
1319         return err;
1320 }
1321
1322 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1323                                      struct qlcnic_bc_trans *trans)
1324 {
1325         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1326         u32 state;
1327
1328         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1329         if (state == QLC_83XX_IDC_DEV_READY) {
1330                 msleep(20);
1331                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1332                 trans->trans_state = QLC_INIT;
1333                 if (++adapter->fw_fail_cnt > max)
1334                         return -EIO;
1335                 else
1336                         return 0;
1337         }
1338
1339         return -EIO;
1340 }
1341
1342 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1343                                   struct qlcnic_cmd_args *cmd)
1344 {
1345         struct qlcnic_hardware_context *ahw = adapter->ahw;
1346         struct qlcnic_mailbox *mbx = ahw->mailbox;
1347         struct device *dev = &adapter->pdev->dev;
1348         struct qlcnic_bc_trans *trans;
1349         int err;
1350         u32 rsp_data, opcode, mbx_err_code, rsp;
1351         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1352         u8 func = ahw->pci_func;
1353
1354         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1355         if (rsp)
1356                 return rsp;
1357
1358         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1359         if (rsp)
1360                 goto cleanup_transaction;
1361
1362 retry:
1363         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1364                 rsp = -EIO;
1365                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1366                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1367                 goto err_out;
1368         }
1369
1370         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1371         if (err) {
1372                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1373                         (cmd->req.arg[0] & 0xffff), func);
1374                 rsp = QLCNIC_RCODE_TIMEOUT;
1375
1376                 /* After adapter reset PF driver may take some time to
1377                  * respond to VF's request. Retry request till maximum retries.
1378                  */
1379                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1380                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1381                         goto retry;
1382
1383                 goto err_out;
1384         }
1385
1386         rsp_data = cmd->rsp.arg[0];
1387         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1388         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1389
1390         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1391             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1392                 rsp = QLCNIC_RCODE_SUCCESS;
1393         } else {
1394                 rsp = mbx_err_code;
1395                 if (!rsp)
1396                         rsp = 1;
1397                 dev_err(dev,
1398                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1399                         opcode, mbx_err_code, func);
1400         }
1401
1402 err_out:
1403         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1404                 ahw->reset_context = 1;
1405                 adapter->need_fw_reset = 1;
1406                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1407         }
1408
1409 cleanup_transaction:
1410         qlcnic_sriov_cleanup_transaction(trans);
1411         return rsp;
1412 }
1413
1414 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1415 {
1416         struct qlcnic_cmd_args cmd;
1417         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1418         int ret;
1419
1420         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1421                 return -ENOMEM;
1422
1423         ret = qlcnic_issue_cmd(adapter, &cmd);
1424         if (ret) {
1425                 dev_err(&adapter->pdev->dev,
1426                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1427                         ret);
1428                 goto out;
1429         }
1430
1431         cmd_op = (cmd.rsp.arg[0] & 0xff);
1432         if (cmd.rsp.arg[0] >> 25 == 2)
1433                 return 2;
1434         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1435                 set_bit(QLC_BC_VF_STATE, &vf->state);
1436         else
1437                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1438
1439 out:
1440         qlcnic_free_mbx_args(&cmd);
1441         return ret;
1442 }
1443
1444 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1445 {
1446         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1447         struct qlcnic_mac_list_s *cur;
1448         struct list_head *head, tmp_list;
1449
1450         INIT_LIST_HEAD(&tmp_list);
1451         head = &adapter->vf_mc_list;
1452         netif_addr_lock_bh(netdev);
1453
1454         while (!list_empty(head)) {
1455                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1456                 list_move(&cur->list, &tmp_list);
1457         }
1458
1459         netif_addr_unlock_bh(netdev);
1460
1461         while (!list_empty(&tmp_list)) {
1462                 cur = list_entry((&tmp_list)->next,
1463                                  struct qlcnic_mac_list_s, list);
1464                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1465                 list_del(&cur->list);
1466                 kfree(cur);
1467         }
1468 }
1469
1470 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1471 {
1472         struct list_head *head = &bc->async_list;
1473         struct qlcnic_async_work_list *entry;
1474
1475         while (!list_empty(head)) {
1476                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1477                                    list);
1478                 cancel_work_sync(&entry->work);
1479                 list_del(&entry->list);
1480                 kfree(entry);
1481         }
1482 }
1483
1484 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1485 {
1486         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1487         u16 vlan;
1488
1489         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1490                 return;
1491
1492         vlan = adapter->ahw->sriov->vlan;
1493         __qlcnic_set_multi(netdev, vlan);
1494 }
1495
1496 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1497 {
1498         struct qlcnic_async_work_list *entry;
1499         struct net_device *netdev;
1500
1501         entry = container_of(work, struct qlcnic_async_work_list, work);
1502         netdev = (struct net_device *)entry->ptr;
1503
1504         qlcnic_sriov_vf_set_multi(netdev);
1505         return;
1506 }
1507
1508 static struct qlcnic_async_work_list *
1509 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1510 {
1511         struct list_head *node;
1512         struct qlcnic_async_work_list *entry = NULL;
1513         u8 empty = 0;
1514
1515         list_for_each(node, &bc->async_list) {
1516                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1517                 if (!work_pending(&entry->work)) {
1518                         empty = 1;
1519                         break;
1520                 }
1521         }
1522
1523         if (!empty) {
1524                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1525                                 GFP_ATOMIC);
1526                 if (entry == NULL)
1527                         return NULL;
1528                 list_add_tail(&entry->list, &bc->async_list);
1529         }
1530
1531         return entry;
1532 }
1533
1534 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1535                                                 work_func_t func, void *data)
1536 {
1537         struct qlcnic_async_work_list *entry = NULL;
1538
1539         entry = qlcnic_sriov_get_free_node_async_work(bc);
1540         if (!entry)
1541                 return;
1542
1543         entry->ptr = data;
1544         INIT_WORK(&entry->work, func);
1545         queue_work(bc->bc_async_wq, &entry->work);
1546 }
1547
1548 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1549 {
1550
1551         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1552         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1553
1554         if (adapter->need_fw_reset)
1555                 return;
1556
1557         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1558                                             netdev);
1559 }
1560
1561 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1562 {
1563         int err;
1564
1565         adapter->need_fw_reset = 0;
1566         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1567         qlcnic_83xx_enable_mbx_interrupt(adapter);
1568
1569         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1570         if (err)
1571                 return err;
1572
1573         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1574         if (err)
1575                 goto err_out_cleanup_bc_intr;
1576
1577         err = qlcnic_sriov_vf_init_driver(adapter);
1578         if (err)
1579                 goto err_out_term_channel;
1580
1581         return 0;
1582
1583 err_out_term_channel:
1584         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1585
1586 err_out_cleanup_bc_intr:
1587         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1588         return err;
1589 }
1590
1591 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1592 {
1593         struct net_device *netdev = adapter->netdev;
1594
1595         if (netif_running(netdev)) {
1596                 if (!qlcnic_up(adapter, netdev))
1597                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1598         }
1599
1600         netif_device_attach(netdev);
1601 }
1602
1603 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1604 {
1605         struct qlcnic_hardware_context *ahw = adapter->ahw;
1606         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1607         struct net_device *netdev = adapter->netdev;
1608         u8 i, max_ints = ahw->num_msix - 1;
1609
1610         netif_device_detach(netdev);
1611         qlcnic_83xx_detach_mailbox_work(adapter);
1612         qlcnic_83xx_disable_mbx_intr(adapter);
1613
1614         if (netif_running(netdev))
1615                 qlcnic_down(adapter, netdev);
1616
1617         for (i = 0; i < max_ints; i++) {
1618                 intr_tbl[i].id = i;
1619                 intr_tbl[i].enabled = 0;
1620                 intr_tbl[i].src = 0;
1621         }
1622         ahw->reset_context = 0;
1623 }
1624
1625 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1626 {
1627         struct qlcnic_hardware_context *ahw = adapter->ahw;
1628         struct device *dev = &adapter->pdev->dev;
1629         struct qlc_83xx_idc *idc = &ahw->idc;
1630         u8 func = ahw->pci_func;
1631         u32 state;
1632
1633         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1634             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1635                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1636                         qlcnic_sriov_vf_attach(adapter);
1637                         adapter->fw_fail_cnt = 0;
1638                         dev_info(dev,
1639                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1640                                  __func__, func);
1641                 } else {
1642                         dev_err(dev,
1643                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1644                                 __func__, func);
1645                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1646                         dev_info(dev, "Current state 0x%x after FW reset\n",
1647                                  state);
1648                 }
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1655 {
1656         struct qlcnic_hardware_context *ahw = adapter->ahw;
1657         struct qlcnic_mailbox *mbx = ahw->mailbox;
1658         struct device *dev = &adapter->pdev->dev;
1659         struct qlc_83xx_idc *idc = &ahw->idc;
1660         u8 func = ahw->pci_func;
1661         u32 state;
1662
1663         adapter->reset_ctx_cnt++;
1664
1665         /* Skip the context reset and check if FW is hung */
1666         if (adapter->reset_ctx_cnt < 3) {
1667                 adapter->need_fw_reset = 1;
1668                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1669                 dev_info(dev,
1670                          "Resetting context, wait here to check if FW is in failed state\n");
1671                 return 0;
1672         }
1673
1674         /* Check if number of resets exceed the threshold.
1675          * If it exceeds the threshold just fail the VF.
1676          */
1677         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1678                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1679                 adapter->tx_timeo_cnt = 0;
1680                 adapter->fw_fail_cnt = 0;
1681                 adapter->reset_ctx_cnt = 0;
1682                 qlcnic_sriov_vf_detach(adapter);
1683                 dev_err(dev,
1684                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1685                 return -EIO;
1686         }
1687
1688         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1689         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1690                  __func__, adapter->reset_ctx_cnt, func);
1691         set_bit(__QLCNIC_RESETTING, &adapter->state);
1692         adapter->need_fw_reset = 1;
1693         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1694         qlcnic_sriov_vf_detach(adapter);
1695         adapter->need_fw_reset = 0;
1696
1697         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1698                 qlcnic_sriov_vf_attach(adapter);
1699                 adapter->tx_timeo_cnt = 0;
1700                 adapter->reset_ctx_cnt = 0;
1701                 adapter->fw_fail_cnt = 0;
1702                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1703         } else {
1704                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1705                         __func__, func);
1706                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1707                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1708         }
1709
1710         return 0;
1711 }
1712
1713 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1714 {
1715         struct qlcnic_hardware_context *ahw = adapter->ahw;
1716         int ret = 0;
1717
1718         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1719                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1720         else if (ahw->reset_context)
1721                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1722
1723         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1724         return ret;
1725 }
1726
1727 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1728 {
1729         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1730
1731         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1732         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1733                 qlcnic_sriov_vf_detach(adapter);
1734
1735         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1736         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1737         return -EIO;
1738 }
1739
1740 static int
1741 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1742 {
1743         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1744         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1745
1746         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1747         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1748                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1749                 adapter->tx_timeo_cnt = 0;
1750                 adapter->reset_ctx_cnt = 0;
1751                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1752                 qlcnic_sriov_vf_detach(adapter);
1753         }
1754
1755         return 0;
1756 }
1757
1758 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1759 {
1760         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1761         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1762         u8 func = adapter->ahw->pci_func;
1763
1764         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1765                 dev_err(&adapter->pdev->dev,
1766                         "Firmware hang detected by VF 0x%x\n", func);
1767                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1768                 adapter->tx_timeo_cnt = 0;
1769                 adapter->reset_ctx_cnt = 0;
1770                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1771                 qlcnic_sriov_vf_detach(adapter);
1772         }
1773         return 0;
1774 }
1775
1776 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1777 {
1778         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1779         return 0;
1780 }
1781
1782 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1783 {
1784         struct qlcnic_adapter *adapter;
1785         struct qlc_83xx_idc *idc;
1786         int ret = 0;
1787
1788         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1789         idc = &adapter->ahw->idc;
1790         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1791
1792         switch (idc->curr_state) {
1793         case QLC_83XX_IDC_DEV_READY:
1794                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1795                 break;
1796         case QLC_83XX_IDC_DEV_NEED_RESET:
1797         case QLC_83XX_IDC_DEV_INIT:
1798                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1799                 break;
1800         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1801                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1802                 break;
1803         case QLC_83XX_IDC_DEV_FAILED:
1804                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1805                 break;
1806         case QLC_83XX_IDC_DEV_QUISCENT:
1807                 break;
1808         default:
1809                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1810         }
1811
1812         idc->prev_state = idc->curr_state;
1813         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1814                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1815                                      idc->delay);
1816 }
1817
1818 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1819 {
1820         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1821                 msleep(20);
1822
1823         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1824         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1825         cancel_delayed_work_sync(&adapter->fw_work);
1826 }
1827
1828 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1829                                           u16 vid, u8 enable)
1830 {
1831         u16 vlan = sriov->vlan;
1832         u8 allowed = 0;
1833         int i;
1834
1835         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1836                 return -EINVAL;
1837
1838         if (enable) {
1839                 if (vlan)
1840                         return -EINVAL;
1841
1842                 if (sriov->any_vlan) {
1843                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1844                                 if (sriov->allowed_vlans[i] == vid)
1845                                         allowed = 1;
1846                         }
1847
1848                         if (!allowed)
1849                                 return -EINVAL;
1850                 }
1851         } else {
1852                 if (!vlan || vlan != vid)
1853                         return -EINVAL;
1854         }
1855
1856         return 0;
1857 }
1858
1859 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1860                                    u16 vid, u8 enable)
1861 {
1862         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1863         struct qlcnic_cmd_args cmd;
1864         int ret;
1865
1866         if (vid == 0)
1867                 return 0;
1868
1869         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1870         if (ret)
1871                 return ret;
1872
1873         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1874                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1875         if (ret)
1876                 return ret;
1877
1878         cmd.req.arg[1] = (enable & 1) | vid << 16;
1879
1880         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1881         ret = qlcnic_issue_cmd(adapter, &cmd);
1882         if (ret) {
1883                 dev_err(&adapter->pdev->dev,
1884                         "Failed to configure guest VLAN, err=%d\n", ret);
1885         } else {
1886                 qlcnic_free_mac_list(adapter);
1887
1888                 if (enable)
1889                         sriov->vlan = vid;
1890                 else
1891                         sriov->vlan = 0;
1892
1893                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1894         }
1895
1896         qlcnic_free_mbx_args(&cmd);
1897         return ret;
1898 }
1899
1900 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1901 {
1902         struct list_head *head = &adapter->mac_list;
1903         struct qlcnic_mac_list_s *cur;
1904         u16 vlan;
1905
1906         vlan = adapter->ahw->sriov->vlan;
1907
1908         while (!list_empty(head)) {
1909                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1910                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1911                                           vlan, QLCNIC_MAC_DEL);
1912                 list_del(&cur->list);
1913                 kfree(cur);
1914         }
1915 }
1916
1917 int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
1918 {
1919         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1920         struct net_device *netdev = adapter->netdev;
1921         int retval;
1922
1923         netif_device_detach(netdev);
1924         qlcnic_cancel_idc_work(adapter);
1925
1926         if (netif_running(netdev))
1927                 qlcnic_down(adapter, netdev);
1928
1929         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1930         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1931         qlcnic_83xx_disable_mbx_intr(adapter);
1932         cancel_delayed_work_sync(&adapter->idc_aen_work);
1933
1934         retval = pci_save_state(pdev);
1935         if (retval)
1936                 return retval;
1937
1938         return 0;
1939 }
1940
1941 int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
1942 {
1943         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1944         struct net_device *netdev = adapter->netdev;
1945         int err;
1946
1947         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1948         qlcnic_83xx_enable_mbx_interrupt(adapter);
1949         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1950         if (err)
1951                 return err;
1952
1953         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1954         if (!err) {
1955                 if (netif_running(netdev)) {
1956                         err = qlcnic_up(adapter, netdev);
1957                         if (!err)
1958                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1959                 }
1960         }
1961
1962         netif_device_attach(netdev);
1963         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1964                              idc->delay);
1965         return err;
1966 }