2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23 #include <linux/ethtool.h>
24 #include <linux/mii.h>
25 #include <linux/timer.h>
27 #include <linux/vmalloc.h>
30 #include <asm/byteorder.h>
31 #include <linux/bitops.h>
32 #include <linux/if_vlan.h>
34 #include "qlcnic_hdr.h"
35 #include "qlcnic_hw.h"
36 #include "qlcnic_83xx_hw.h"
37 #include "qlcnic_dcb.h"
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 3
41 #define _QLCNIC_LINUX_SUBVERSION 52
42 #define QLCNIC_LINUX_VERSIONID "5.3.52"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
52 /* version in image has weird encoding:
55 * 31:16 - build (little endian)
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
102 /* Driver will use 1 Tx ring in INT-x/MSI/SRIOV mode. */
103 #define QLCNIC_SINGLE_RING 1
104 #define QLCNIC_DEF_SDS_RINGS 4
105 #define QLCNIC_DEF_TX_RINGS 4
106 #define QLCNIC_MAX_VNIC_TX_RINGS 4
107 #define QLCNIC_MAX_VNIC_SDS_RINGS 4
109 enum qlcnic_queue_type {
114 /* Operational mode for driver */
115 #define QLCNIC_VNIC_MODE 0xFF
116 #define QLCNIC_DEFAULT_MODE 0x0
119 * Following are the states of the Phantom. Phantom will set them and
120 * Host will read to check if the fields are correct.
122 #define PHAN_INITIALIZE_FAILED 0xffff
123 #define PHAN_INITIALIZE_COMPLETE 0xff01
125 /* Host writes the following to notify that it has done the init-handshake */
126 #define PHAN_INITIALIZE_ACK 0xf00f
127 #define PHAN_PEG_RCV_INITIALIZED 0xff01
129 #define NUM_RCV_DESC_RINGS 3
131 #define RCV_RING_NORMAL 0
132 #define RCV_RING_JUMBO 1
134 #define MIN_CMD_DESCRIPTORS 64
135 #define MIN_RCV_DESCRIPTORS 64
136 #define MIN_JUMBO_DESCRIPTORS 32
138 #define MAX_CMD_DESCRIPTORS 1024
139 #define MAX_RCV_DESCRIPTORS_1G 4096
140 #define MAX_RCV_DESCRIPTORS_10G 8192
141 #define MAX_RCV_DESCRIPTORS_VF 2048
142 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
143 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
145 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
146 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
147 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
148 #define MAX_RDS_RINGS 2
150 #define get_next_index(index, length) \
151 (((index) + 1) & ((length) - 1))
154 * Following data structures describe the descriptors that will be used.
155 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
156 * we are doing LSO (above the 1500 size packet) only.
158 struct cmd_desc_type0 {
159 u8 tcp_hdr_offset; /* For LSO only */
160 u8 ip_hdr_offset; /* For LSO only */
161 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
162 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
166 __le16 reference_handle;
168 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
169 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
170 __le16 conn_id; /* IPSec offoad only */
175 __le16 buffer_length[4];
179 u8 eth_addr[ETH_ALEN];
182 } __attribute__ ((aligned(64)));
184 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
186 __le16 reference_handle;
188 __le32 buffer_length; /* allocated buffer length (usually 2K) */
193 __le64 status_desc_data[2];
194 } __attribute__ ((aligned(16)));
196 /* UNIFIED ROMIMAGE */
197 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
198 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
199 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
200 #define QLCNIC_UNI_DIR_SECT_FW 0x7
203 #define QLCNIC_UNI_CHIP_REV_OFF 10
204 #define QLCNIC_UNI_FLAGS_OFF 11
205 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
206 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
207 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
209 struct uni_table_desc{
216 struct uni_data_desc{
222 /* Flash Defines and Structures */
223 #define QLCNIC_FLT_LOCATION 0x3F1000
224 #define QLCNIC_FDT_LOCATION 0x3F0000
225 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
226 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
227 #define QLCNIC_BOOTLD_REGION 0X72
228 struct qlcnic_flt_header {
235 struct qlcnic_flt_entry {
245 /* Flash Descriptor Table */
259 u8 write_enable_bits;
260 u8 write_statusreg_cmd;
261 u8 unprotected_sec_cmd;
266 u32 write_enable_data;
268 u8 write_disable_bits;
272 u8 protected_sec_cmd;
275 /* Magic number to let user know flash is programmed */
276 #define QLCNIC_BDINFO_MAGIC 0x12345678
278 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
279 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
280 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
281 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
282 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
283 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
284 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
285 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
286 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
287 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
288 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
289 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
290 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
291 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
293 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
295 /* Flash memory map */
296 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
297 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
298 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
299 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
301 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
302 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
303 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
304 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
306 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
307 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
309 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
310 #define QLCNIC_UNIFIED_ROMIMAGE 0
311 #define QLCNIC_FLASH_ROMIMAGE 1
312 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
314 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
315 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
317 extern char qlcnic_driver_name[];
319 extern int qlcnic_use_msi;
320 extern int qlcnic_use_msi_x;
321 extern int qlcnic_auto_fw_reset;
322 extern int qlcnic_load_fw_file;
324 /* Number of status descriptors to handle per interrupt */
325 #define MAX_STATUS_HANDLE (64)
328 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
329 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
331 struct qlcnic_skb_frag {
336 /* Following defines are for the state of the buffers */
337 #define QLCNIC_BUFFER_FREE 0
338 #define QLCNIC_BUFFER_BUSY 1
341 * There will be one qlcnic_buffer per skb packet. These will be
342 * used to save the dma info for pci_unmap_page()
344 struct qlcnic_cmd_buffer {
346 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
350 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
351 struct qlcnic_rx_buffer {
354 struct list_head list;
359 #define QLCNIC_GBE 0x01
360 #define QLCNIC_XGBE 0x02
363 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
364 * adjusted based on configured MTU.
366 #define QLCNIC_INTR_COAL_TYPE_RX 1
367 #define QLCNIC_INTR_COAL_TYPE_TX 2
369 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
370 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
372 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
373 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
375 #define QLCNIC_INTR_DEFAULT 0x04
376 #define QLCNIC_CONFIG_INTR_COALESCE 3
377 #define QLCNIC_DEV_INFO_SIZE 1
379 struct qlcnic_nic_intr_coalesce {
390 struct qlcnic_dump_template_hdr {
407 struct qlcnic_fw_dump {
408 u8 clr; /* flag to indicate if dump is cleared */
409 bool enable; /* enable/disable dump */
410 u32 size; /* total size of the dump */
411 void *data; /* dump data area */
412 struct qlcnic_dump_template_hdr *tmpl_hdr;
413 dma_addr_t phys_addr;
419 * One hardware_context{} per adapter
420 * contains interrupt info as well shared hardware info.
422 struct qlcnic_hardware_context {
423 void __iomem *pci_base0;
424 void __iomem *ocm_win_crb;
426 unsigned long pci_len0;
429 struct mutex mem_lock;
469 u32 extra_capability[3];
474 struct qlcnic_hardware_ops *hw_ops;
475 struct qlcnic_nic_intr_coalesce coal;
476 struct qlcnic_fw_dump fw_dump;
477 struct qlcnic_fdt fdt;
478 struct qlc_83xx_reset reset;
479 struct qlc_83xx_idc idc;
480 struct qlc_83xx_fw_info *fw_info;
481 struct qlcnic_intrpt_config *intr_tbl;
482 struct qlcnic_sriov *sriov;
485 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
487 struct qlcnic_mailbox *mailbox;
489 u8 phys_port_id[ETH_ALEN];
493 struct qlcnic_adapter_stats {
507 u64 skb_alloc_failure;
509 u64 rx_dma_map_error;
510 u64 tx_dma_map_error;
512 u64 mac_filter_limit_overrun;
516 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
517 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
519 struct qlcnic_host_rds_ring {
520 void __iomem *crb_rcv_producer;
521 struct rcv_desc *desc_head;
522 struct qlcnic_rx_buffer *rx_buf_arr;
528 struct list_head free_list;
530 dma_addr_t phys_addr;
531 } ____cacheline_internodealigned_in_smp;
533 struct qlcnic_host_sds_ring {
536 void __iomem *crb_sts_consumer;
538 struct qlcnic_host_tx_ring *tx_ring;
539 struct status_desc *desc_head;
540 struct qlcnic_adapter *adapter;
541 struct napi_struct napi;
542 struct list_head free_list[NUM_RCV_DESC_RINGS];
544 void __iomem *crb_intr_mask;
547 dma_addr_t phys_addr;
548 char name[IFNAMSIZ + 12];
549 } ____cacheline_internodealigned_in_smp;
551 struct qlcnic_tx_queue_stats {
559 struct qlcnic_host_tx_ring {
561 void __iomem *crb_intr_mask;
562 char name[IFNAMSIZ + 12];
570 struct qlcnic_tx_queue_stats tx_stats;
572 void __iomem *crb_cmd_producer;
573 struct cmd_desc_type0 *desc_head;
574 struct qlcnic_adapter *adapter;
575 struct napi_struct napi;
576 struct qlcnic_cmd_buffer *cmd_buf_arr;
579 dma_addr_t phys_addr;
580 dma_addr_t hw_cons_phys_addr;
581 struct netdev_queue *txq;
582 /* Lock to protect Tx descriptors cleanup */
583 spinlock_t tx_clean_lock;
584 } ____cacheline_internodealigned_in_smp;
587 * Receive context. There is one such structure per instance of the
588 * receive processing. Any state information that is relevant to
589 * the receive, and is must be in this structure. The global data may be
592 struct qlcnic_recv_context {
593 struct qlcnic_host_rds_ring *rds_rings;
594 struct qlcnic_host_sds_ring *sds_rings;
600 /* HW context creation */
602 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
604 #define QLCNIC_CDRP_CMD_BIT 0x80000000
607 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
608 * in the crb QLCNIC_CDRP_CRB_OFFSET.
610 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
611 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
613 #define QLCNIC_CDRP_RSP_OK 0x00000001
614 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
615 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
618 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
619 * the crb QLCNIC_CDRP_CRB_OFFSET.
621 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
623 #define QLCNIC_RCODE_SUCCESS 0
624 #define QLCNIC_RCODE_INVALID_ARGS 6
625 #define QLCNIC_RCODE_NOT_SUPPORTED 9
626 #define QLCNIC_RCODE_NOT_PERMITTED 10
627 #define QLCNIC_RCODE_NOT_IMPL 15
628 #define QLCNIC_RCODE_INVALID 16
629 #define QLCNIC_RCODE_TIMEOUT 17
630 #define QLCNIC_DESTROY_CTX_RESET 0
633 * Capabilities Announced
635 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
636 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
637 #define QLCNIC_CAP0_LSO (1 << 6)
638 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
639 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
640 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
641 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
642 #define QLCNIC_CAP0_TX_MULTI (1 << 22)
647 #define QLCNIC_HOST_CTX_STATE_FREED 0
648 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
654 struct qlcnic_hostrq_sds_ring {
655 __le64 host_phys_addr; /* Ring base addr */
656 __le32 ring_size; /* Ring entries */
658 __le16 rsvd; /* Padding */
661 struct qlcnic_hostrq_rds_ring {
662 __le64 host_phys_addr; /* Ring base addr */
663 __le64 buff_size; /* Packet buffer size */
664 __le32 ring_size; /* Ring entries */
665 __le32 ring_kind; /* Class of ring */
668 struct qlcnic_hostrq_rx_ctx {
669 __le64 host_rsp_dma_addr; /* Response dma'd here */
670 __le32 capabilities[4]; /* Flag bit vector */
671 __le32 host_int_crb_mode; /* Interrupt crb usage */
672 __le32 host_rds_crb_mode; /* RDS crb usage */
673 /* These ring offsets are relative to data[0] below */
674 __le32 rds_ring_offset; /* Offset to RDS config */
675 __le32 sds_ring_offset; /* Offset to SDS config */
676 __le16 num_rds_rings; /* Count of RDS rings */
677 __le16 num_sds_rings; /* Count of SDS rings */
678 __le16 valid_field_offset;
681 u8 reserved[128]; /* reserve space for future expansion*/
682 /* MUST BE 64-bit aligned.
683 The following is packed:
685 - N hostrq_sds_rings */
689 struct qlcnic_cardrsp_rds_ring{
690 __le32 host_producer_crb; /* Crb to use */
691 __le32 rsvd1; /* Padding */
694 struct qlcnic_cardrsp_sds_ring {
695 __le32 host_consumer_crb; /* Crb to use */
696 __le32 interrupt_crb; /* Crb to use */
699 struct qlcnic_cardrsp_rx_ctx {
700 /* These ring offsets are relative to data[0] below */
701 __le32 rds_ring_offset; /* Offset to RDS config */
702 __le32 sds_ring_offset; /* Offset to SDS config */
703 __le32 host_ctx_state; /* Starting State */
704 __le32 num_fn_per_port; /* How many PCI fn share the port */
705 __le16 num_rds_rings; /* Count of RDS rings */
706 __le16 num_sds_rings; /* Count of SDS rings */
707 __le16 context_id; /* Handle for context */
708 u8 phys_port; /* Physical id of port */
709 u8 virt_port; /* Virtual/Logical id of port */
710 u8 reserved[128]; /* save space for future expansion */
711 /* MUST BE 64-bit aligned.
712 The following is packed:
713 - N cardrsp_rds_rings
714 - N cardrs_sds_rings */
718 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
719 (sizeof(HOSTRQ_RX) + \
720 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
721 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
723 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
724 (sizeof(CARDRSP_RX) + \
725 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
726 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
732 struct qlcnic_hostrq_cds_ring {
733 __le64 host_phys_addr; /* Ring base addr */
734 __le32 ring_size; /* Ring entries */
735 __le32 rsvd; /* Padding */
738 struct qlcnic_hostrq_tx_ctx {
739 __le64 host_rsp_dma_addr; /* Response dma'd here */
740 __le64 cmd_cons_dma_addr; /* */
741 __le64 dummy_dma_addr; /* */
742 __le32 capabilities[4]; /* Flag bit vector */
743 __le32 host_int_crb_mode; /* Interrupt crb usage */
744 __le32 rsvd1; /* Padding */
745 __le16 rsvd2; /* Padding */
746 __le16 interrupt_ctl;
748 __le16 rsvd3; /* Padding */
749 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
750 u8 reserved[128]; /* future expansion */
753 struct qlcnic_cardrsp_cds_ring {
754 __le32 host_producer_crb; /* Crb to use */
755 __le32 interrupt_crb; /* Crb to use */
758 struct qlcnic_cardrsp_tx_ctx {
759 __le32 host_ctx_state; /* Starting state */
760 __le16 context_id; /* Handle for context */
761 u8 phys_port; /* Physical id of port */
762 u8 virt_port; /* Virtual/Logical id of port */
763 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
764 u8 reserved[128]; /* future expansion */
767 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
768 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
772 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
773 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
774 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
775 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
777 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
778 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
779 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
780 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
781 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
786 #define MC_COUNT_P3P 38
788 #define QLCNIC_MAC_NOOP 0
789 #define QLCNIC_MAC_ADD 1
790 #define QLCNIC_MAC_DEL 2
791 #define QLCNIC_MAC_VLAN_ADD 3
792 #define QLCNIC_MAC_VLAN_DEL 4
794 struct qlcnic_mac_list_s {
795 struct list_head list;
796 uint8_t mac_addr[ETH_ALEN+2];
800 #define NO_MAC_LEARN 0
801 #define DRV_MAC_LEARN 1
802 #define FDB_MAC_LEARN 2
804 #define QLCNIC_HOST_REQUEST 0x13
805 #define QLCNIC_REQUEST 0x14
807 #define QLCNIC_MAC_EVENT 0x1
809 #define QLCNIC_IP_UP 2
810 #define QLCNIC_IP_DOWN 3
812 #define QLCNIC_ILB_MODE 0x1
813 #define QLCNIC_ELB_MODE 0x2
814 #define QLCNIC_LB_MODE_MASK 0x3
816 #define QLCNIC_LINKEVENT 0x1
817 #define QLCNIC_LB_RESPONSE 0x2
818 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
819 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
822 * Driver --> Firmware
824 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
825 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
826 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
827 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
828 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
829 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
831 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
832 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
833 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
834 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
837 * Firmware --> Driver
840 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
841 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
842 #define QLCNIC_C2H_OPCODE_GET_DCB_AEN 0x90
844 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
845 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
846 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
848 #define QLCNIC_LRO_REQUEST_CLEANUP 4
850 /* Capabilites received */
851 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
852 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
853 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
854 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
855 #define QLCNIC_FW_CAPABILITY_2_MULTI_TX BIT_4
856 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
857 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
859 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
860 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
861 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
862 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
863 #define QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG BIT_8
866 #define LINKEVENT_MODULE_NOT_PRESENT 1
867 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
868 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
869 #define LINKEVENT_MODULE_OPTICAL_LRM 4
870 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
871 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
872 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
873 #define LINKEVENT_MODULE_TWINAX 8
875 #define LINKSPEED_10GBPS 10000
876 #define LINKSPEED_1GBPS 1000
877 #define LINKSPEED_100MBPS 100
878 #define LINKSPEED_10MBPS 10
880 #define LINKSPEED_ENCODED_10MBPS 0
881 #define LINKSPEED_ENCODED_100MBPS 1
882 #define LINKSPEED_ENCODED_1GBPS 2
884 #define LINKEVENT_AUTONEG_DISABLED 0
885 #define LINKEVENT_AUTONEG_ENABLED 1
887 #define LINKEVENT_HALF_DUPLEX 0
888 #define LINKEVENT_FULL_DUPLEX 1
890 #define LINKEVENT_LINKSPEED_MBPS 0
891 #define LINKEVENT_LINKSPEED_ENCODED 1
893 /* firmware response header:
894 * 63:58 - message type
898 * 47:40 - completion id
903 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
904 ((msg_hdr >> 32) & 0xFF)
906 struct qlcnic_fw_msg {
916 struct qlcnic_nic_req {
922 struct qlcnic_mac_req {
928 struct qlcnic_vlan_req {
933 struct qlcnic_ipaddr {
938 #define QLCNIC_MSI_ENABLED 0x02
939 #define QLCNIC_MSIX_ENABLED 0x04
940 #define QLCNIC_LRO_ENABLED 0x01
941 #define QLCNIC_LRO_DISABLED 0x00
942 #define QLCNIC_BRIDGE_ENABLED 0X10
943 #define QLCNIC_DIAG_ENABLED 0x20
944 #define QLCNIC_ESWITCH_ENABLED 0x40
945 #define QLCNIC_ADAPTER_INITIALIZED 0x80
946 #define QLCNIC_TAGGING_ENABLED 0x100
947 #define QLCNIC_MACSPOOF 0x200
948 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
949 #define QLCNIC_PROMISC_DISABLED 0x800
950 #define QLCNIC_NEED_FLR 0x1000
951 #define QLCNIC_FW_RESET_OWNER 0x2000
952 #define QLCNIC_FW_HANG 0x4000
953 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
954 #define QLCNIC_TX_INTR_SHARED 0x10000
955 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
956 #define QLCNIC_HAS_PHYS_PORT_ID 0x40000
958 #define QLCNIC_IS_MSI_FAMILY(adapter) \
959 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
960 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
961 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
963 #define QLCNIC_BEACON_EANBLE 0xC
964 #define QLCNIC_BEACON_DISABLE 0xD
966 #define QLCNIC_MSIX_TBL_SPACE 8192
967 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
968 #define QLCNIC_MSIX_TBL_PGSIZE 4096
970 #define QLCNIC_ADAPTER_UP_MAGIC 777
972 #define __QLCNIC_FW_ATTACHED 0
973 #define __QLCNIC_DEV_UP 1
974 #define __QLCNIC_RESETTING 2
975 #define __QLCNIC_START_FW 4
976 #define __QLCNIC_AER 5
977 #define __QLCNIC_DIAG_RES_ALLOC 6
978 #define __QLCNIC_LED_ENABLE 7
979 #define __QLCNIC_ELB_INPROGRESS 8
980 #define __QLCNIC_MULTI_TX_UNIQUE 9
981 #define __QLCNIC_SRIOV_ENABLE 10
982 #define __QLCNIC_SRIOV_CAPABLE 11
983 #define __QLCNIC_MBX_POLL_ENABLE 12
984 #define __QLCNIC_DIAG_MODE 13
985 #define __QLCNIC_MAINTENANCE_MODE 16
987 #define QLCNIC_INTERRUPT_TEST 1
988 #define QLCNIC_LOOPBACK_TEST 2
989 #define QLCNIC_LED_TEST 3
991 #define QLCNIC_FILTER_AGE 80
992 #define QLCNIC_READD_AGE 20
993 #define QLCNIC_LB_MAX_FILTERS 64
994 #define QLCNIC_LB_BUCKET_SIZE 32
995 #define QLCNIC_ILB_MAX_RCV_LOOP 10
997 struct qlcnic_filter {
998 struct hlist_node fnode;
1001 unsigned long ftime;
1004 struct qlcnic_filter_hash {
1005 struct hlist_head *fhead;
1011 /* Mailbox specific data structures */
1012 struct qlcnic_mailbox {
1013 struct workqueue_struct *work_q;
1014 struct qlcnic_adapter *adapter;
1015 struct qlcnic_mbx_ops *ops;
1016 struct work_struct work;
1017 struct completion completion;
1018 struct list_head cmd_q;
1019 unsigned long status;
1020 spinlock_t queue_lock; /* Mailbox queue lock */
1021 spinlock_t aen_lock; /* Mailbox response/AEN lock */
1022 atomic_t rsp_status;
1026 struct qlcnic_adapter {
1027 struct qlcnic_hardware_context *ahw;
1028 struct qlcnic_recv_context *recv_ctx;
1029 struct qlcnic_host_tx_ring *tx_ring;
1030 struct net_device *netdev;
1031 struct pci_dev *pdev;
1033 unsigned long state;
1044 u8 max_sds_rings; /* max sds rings supported by adapter */
1045 u8 max_tx_rings; /* max tx rings supported by adapter */
1047 u8 drv_tx_rings; /* max tx rings supported by driver */
1048 u8 drv_sds_rings; /* max sds rings supported by driver */
1070 u8 mac_addr[ETH_ALEN];
1075 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1077 struct qlcnic_npar_info *npars;
1078 struct qlcnic_eswitch *eswitch;
1079 struct qlcnic_nic_template *nic_ops;
1081 struct qlcnic_adapter_stats stats;
1082 struct list_head mac_list;
1084 void __iomem *tgt_mask_reg;
1085 void __iomem *tgt_status_reg;
1086 void __iomem *crb_int_state_reg;
1087 void __iomem *isr_int_vec;
1089 struct msix_entry *msix_entries;
1090 struct workqueue_struct *qlcnic_wq;
1091 struct delayed_work fw_work;
1092 struct delayed_work idc_aen_work;
1093 struct delayed_work mbx_poll_work;
1094 struct qlcnic_dcb *dcb;
1096 struct qlcnic_filter_hash fhash;
1097 struct qlcnic_filter_hash rx_fhash;
1098 struct list_head vf_mc_list;
1100 spinlock_t mac_learn_lock;
1101 /* spinlock for catching rcv filters for eswitch traffic */
1102 spinlock_t rx_mac_learn_lock;
1103 u32 file_prd_off; /*File fw product offset*/
1106 const struct firmware *fw;
1109 struct qlcnic_info_le {
1111 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1113 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1115 __le32 capabilities;
1125 __le16 max_bw_reg_offset;
1126 __le16 max_linkspeed_reg_offset;
1130 __le16 max_tx_mac_filters;
1131 __le16 max_rx_mcast_mac_filters;
1132 __le16 max_rx_ucast_mac_filters;
1133 __le16 max_rx_ip_addr;
1134 __le16 max_rx_lro_flow;
1135 __le16 max_rx_status_rings;
1136 __le16 max_rx_buf_rings;
1137 __le16 max_tx_vlan_keys;
1139 u8 total_rss_engines;
1141 __le16 linkstate_reg_offset;
1143 __le16 max_local_ipv6_addrs;
1144 __le16 max_remote_ipv6_addrs;
1148 struct qlcnic_info {
1161 u16 max_bw_reg_offset;
1162 u16 max_linkspeed_reg_offset;
1166 u16 max_tx_mac_filters;
1167 u16 max_rx_mcast_mac_filters;
1168 u16 max_rx_ucast_mac_filters;
1170 u16 max_rx_lro_flow;
1171 u16 max_rx_status_rings;
1172 u16 max_rx_buf_rings;
1173 u16 max_tx_vlan_keys;
1175 u8 total_rss_engines;
1177 u16 linkstate_reg_offset;
1179 u16 max_local_ipv6_addrs;
1180 u16 max_remote_ipv6_addrs;
1183 struct qlcnic_pci_info_le {
1184 __le16 id; /* pci function id */
1185 __le16 active; /* 1 = Enabled */
1186 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1187 __le16 default_port; /* default port number */
1189 __le16 tx_min_bw; /* Multiple of 100mbpc */
1191 __le16 reserved1[2];
1199 struct qlcnic_pci_info {
1210 struct qlcnic_npar_info {
1211 bool eswitch_status;
1229 struct qlcnic_eswitch {
1233 u8 active_ucast_filters;
1234 u8 max_ucast_filters;
1235 u8 max_active_vlans;
1238 #define QLCNIC_SWITCH_ENABLE BIT_1
1239 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1240 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1241 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1245 /* Return codes for Error handling */
1246 #define QL_STATUS_INVALID_PARAM -1
1248 #define MAX_BW 100 /* % of link speed */
1249 #define MAX_VLAN_ID 4095
1250 #define MIN_VLAN_ID 2
1251 #define DEFAULT_MAC_LEARN 1
1253 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1254 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1256 struct qlcnic_pci_func_cfg {
1266 struct qlcnic_npar_func_cfg {
1277 struct qlcnic_pm_func_cfg {
1284 struct qlcnic_esw_func_cfg {
1298 #define QLCNIC_STATS_VERSION 1
1299 #define QLCNIC_STATS_PORT 1
1300 #define QLCNIC_STATS_ESWITCH 2
1301 #define QLCNIC_QUERY_RX_COUNTER 0
1302 #define QLCNIC_QUERY_TX_COUNTER 1
1303 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1304 #define QLCNIC_FILL_STATS(VAL1) \
1305 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1306 #define QLCNIC_MAC_STATS 1
1307 #define QLCNIC_ESW_STATS 2
1309 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1311 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1312 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1314 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1315 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1319 struct qlcnic_mac_statistics_le {
1320 __le64 mac_tx_frames;
1321 __le64 mac_tx_bytes;
1322 __le64 mac_tx_mcast_pkts;
1323 __le64 mac_tx_bcast_pkts;
1324 __le64 mac_tx_pause_cnt;
1325 __le64 mac_tx_ctrl_pkt;
1326 __le64 mac_tx_lt_64b_pkts;
1327 __le64 mac_tx_lt_127b_pkts;
1328 __le64 mac_tx_lt_255b_pkts;
1329 __le64 mac_tx_lt_511b_pkts;
1330 __le64 mac_tx_lt_1023b_pkts;
1331 __le64 mac_tx_lt_1518b_pkts;
1332 __le64 mac_tx_gt_1518b_pkts;
1335 __le64 mac_rx_frames;
1336 __le64 mac_rx_bytes;
1337 __le64 mac_rx_mcast_pkts;
1338 __le64 mac_rx_bcast_pkts;
1339 __le64 mac_rx_pause_cnt;
1340 __le64 mac_rx_ctrl_pkt;
1341 __le64 mac_rx_lt_64b_pkts;
1342 __le64 mac_rx_lt_127b_pkts;
1343 __le64 mac_rx_lt_255b_pkts;
1344 __le64 mac_rx_lt_511b_pkts;
1345 __le64 mac_rx_lt_1023b_pkts;
1346 __le64 mac_rx_lt_1518b_pkts;
1347 __le64 mac_rx_gt_1518b_pkts;
1350 __le64 mac_rx_length_error;
1351 __le64 mac_rx_length_small;
1352 __le64 mac_rx_length_large;
1353 __le64 mac_rx_jabber;
1354 __le64 mac_rx_dropped;
1355 __le64 mac_rx_crc_error;
1356 __le64 mac_align_error;
1359 struct qlcnic_mac_statistics {
1362 u64 mac_tx_mcast_pkts;
1363 u64 mac_tx_bcast_pkts;
1364 u64 mac_tx_pause_cnt;
1365 u64 mac_tx_ctrl_pkt;
1366 u64 mac_tx_lt_64b_pkts;
1367 u64 mac_tx_lt_127b_pkts;
1368 u64 mac_tx_lt_255b_pkts;
1369 u64 mac_tx_lt_511b_pkts;
1370 u64 mac_tx_lt_1023b_pkts;
1371 u64 mac_tx_lt_1518b_pkts;
1372 u64 mac_tx_gt_1518b_pkts;
1376 u64 mac_rx_mcast_pkts;
1377 u64 mac_rx_bcast_pkts;
1378 u64 mac_rx_pause_cnt;
1379 u64 mac_rx_ctrl_pkt;
1380 u64 mac_rx_lt_64b_pkts;
1381 u64 mac_rx_lt_127b_pkts;
1382 u64 mac_rx_lt_255b_pkts;
1383 u64 mac_rx_lt_511b_pkts;
1384 u64 mac_rx_lt_1023b_pkts;
1385 u64 mac_rx_lt_1518b_pkts;
1386 u64 mac_rx_gt_1518b_pkts;
1388 u64 mac_rx_length_error;
1389 u64 mac_rx_length_small;
1390 u64 mac_rx_length_large;
1393 u64 mac_rx_crc_error;
1394 u64 mac_align_error;
1397 struct qlcnic_esw_stats_le {
1402 __le64 unicast_frames;
1403 __le64 multicast_frames;
1404 __le64 broadcast_frames;
1405 __le64 dropped_frames;
1407 __le64 local_frames;
1412 struct __qlcnic_esw_statistics {
1418 u64 multicast_frames;
1419 u64 broadcast_frames;
1427 struct qlcnic_esw_statistics {
1428 struct __qlcnic_esw_statistics rx;
1429 struct __qlcnic_esw_statistics tx;
1432 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1433 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1434 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1435 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1436 #define QLCNIC_SET_QUIESCENT 0xadd00010
1437 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1444 struct qlcnic_cmd_args {
1445 struct completion completion;
1446 struct list_head list;
1447 struct _cdrp_cmd req;
1448 struct _cdrp_cmd rsp;
1449 atomic_t rsp_status;
1456 u32 *hdr; /* Back channel message header */
1457 u32 *pay; /* Back channel message payload */
1461 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1462 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1463 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1464 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1465 void qlcnic_pci_camqm_read_2M(struct qlcnic_adapter *, u64, u64 *);
1466 void qlcnic_pci_camqm_write_2M(struct qlcnic_adapter *, u64, u64);
1468 #define ADDR_IN_RANGE(addr, low, high) \
1469 (((addr) < (high)) && ((addr) >= (low)))
1471 #define QLCRD32(adapter, off, err) \
1472 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1474 #define QLCWR32(adapter, off, val) \
1475 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1477 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1478 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1480 #define qlcnic_rom_lock(a) \
1481 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1482 #define qlcnic_rom_unlock(a) \
1483 qlcnic_pcie_sem_unlock((a), 2)
1484 #define qlcnic_phy_lock(a) \
1485 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1486 #define qlcnic_phy_unlock(a) \
1487 qlcnic_pcie_sem_unlock((a), 3)
1488 #define qlcnic_sw_lock(a) \
1489 qlcnic_pcie_sem_lock((a), 6, 0)
1490 #define qlcnic_sw_unlock(a) \
1491 qlcnic_pcie_sem_unlock((a), 6)
1492 #define crb_win_lock(a) \
1493 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1494 #define crb_win_unlock(a) \
1495 qlcnic_pcie_sem_unlock((a), 7)
1497 #define __QLCNIC_MAX_LED_RATE 0xf
1498 #define __QLCNIC_MAX_LED_STATE 0x2
1500 #define MAX_CTL_CHECK 1000
1502 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
1503 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1504 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1505 int qlcnic_dump_fw(struct qlcnic_adapter *);
1506 int qlcnic_enable_fw_dump_state(struct qlcnic_adapter *);
1507 bool qlcnic_check_fw_dump_state(struct qlcnic_adapter *);
1508 pci_ers_result_t qlcnic_82xx_io_error_detected(struct pci_dev *,
1509 pci_channel_state_t);
1510 pci_ers_result_t qlcnic_82xx_io_slot_reset(struct pci_dev *);
1511 void qlcnic_82xx_io_resume(struct pci_dev *);
1513 /* Functions from qlcnic_init.c */
1514 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1515 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1516 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1517 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1518 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1519 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1520 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1521 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1523 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1524 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1525 u8 *bytes, size_t size);
1526 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1527 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1529 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1531 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1532 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1534 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1535 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1537 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1538 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1539 void qlcnic_release_tx_buffers(struct qlcnic_adapter *,
1540 struct qlcnic_host_tx_ring *);
1542 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1543 void qlcnic_watchdog_task(struct work_struct *work);
1544 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1545 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1546 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
1547 void qlcnic_set_multi(struct net_device *netdev);
1548 void __qlcnic_set_multi(struct net_device *, u16);
1549 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1550 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1551 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1552 int qlcnic_82xx_read_phys_port_id(struct qlcnic_adapter *);
1554 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1555 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1556 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1557 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1558 netdev_features_t features);
1559 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1560 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1561 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
1562 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1564 /* Functions from qlcnic_ethtool.c */
1565 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1566 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1567 int qlcnic_loopback_test(struct net_device *, u8);
1569 /* Functions from qlcnic_main.c */
1570 int qlcnic_reset_context(struct qlcnic_adapter *);
1571 void qlcnic_diag_free_res(struct net_device *netdev, int);
1572 int qlcnic_diag_alloc_res(struct net_device *netdev, int);
1573 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *, struct net_device *);
1574 void qlcnic_set_tx_ring_count(struct qlcnic_adapter *, u8);
1575 void qlcnic_set_sds_ring_count(struct qlcnic_adapter *, u8);
1576 int qlcnic_setup_rings(struct qlcnic_adapter *, u8, u8);
1577 int qlcnic_validate_rings(struct qlcnic_adapter *, __u32, int);
1578 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1579 void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *);
1580 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1581 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1583 /* eSwitch management functions */
1584 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1585 struct qlcnic_esw_func_cfg *);
1587 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1588 struct qlcnic_esw_func_cfg *);
1589 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1590 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1591 struct __qlcnic_esw_statistics *);
1592 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1593 struct __qlcnic_esw_statistics *);
1594 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1595 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1597 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1599 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1600 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1601 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1602 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1603 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1604 void qlcnic_dump_mbx(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1606 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1607 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1608 void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter);
1609 void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter);
1610 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1611 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1612 int qlcnic_82xx_get_settings(struct qlcnic_adapter *, struct ethtool_cmd *);
1614 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1615 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1616 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1617 struct qlcnic_esw_func_cfg *);
1618 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1619 struct qlcnic_esw_func_cfg *);
1621 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1622 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1623 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1624 void qlcnic_detach(struct qlcnic_adapter *);
1625 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1626 int qlcnic_attach(struct qlcnic_adapter *);
1627 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1628 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1630 int qlcnic_check_temp(struct qlcnic_adapter *);
1631 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1632 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1633 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1634 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1635 void qlcnic_add_lb_filter(struct qlcnic_adapter *, struct sk_buff *, int, u16);
1636 int qlcnic_get_beacon_state(struct qlcnic_adapter *, u8 *);
1637 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1638 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1639 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1640 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1641 struct qlcnic_esw_func_cfg *);
1642 void qlcnic_sriov_vf_schedule_multi(struct net_device *);
1643 void qlcnic_vf_add_mc_list(struct net_device *, u16);
1646 * QLOGIC Board information
1649 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1650 struct qlcnic_board_info {
1651 unsigned short vendor;
1652 unsigned short device;
1653 unsigned short sub_vendor;
1654 unsigned short sub_device;
1655 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1658 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1660 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1661 return tx_ring->sw_consumer - tx_ring->producer;
1663 return tx_ring->sw_consumer + tx_ring->num_desc -
1667 static inline int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter,
1668 struct net_device *netdev)
1672 netdev->num_tx_queues = adapter->drv_tx_rings;
1673 netdev->real_num_tx_queues = adapter->drv_tx_rings;
1675 err = netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings);
1677 dev_err(&adapter->pdev->dev, "failed to set %d Tx queues\n",
1678 adapter->drv_tx_rings);
1680 dev_info(&adapter->pdev->dev, "Set %d Tx queues\n",
1681 adapter->drv_tx_rings);
1686 struct qlcnic_nic_template {
1687 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1688 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1689 int (*start_firmware) (struct qlcnic_adapter *);
1690 int (*init_driver) (struct qlcnic_adapter *);
1691 void (*request_reset) (struct qlcnic_adapter *, u32);
1692 void (*cancel_idc_work) (struct qlcnic_adapter *);
1693 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1694 void (*napi_del)(struct qlcnic_adapter *);
1695 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1696 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1697 int (*shutdown)(struct pci_dev *);
1698 int (*resume)(struct qlcnic_adapter *);
1701 struct qlcnic_mbx_ops {
1702 int (*enqueue_cmd) (struct qlcnic_adapter *,
1703 struct qlcnic_cmd_args *, unsigned long *);
1704 void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1705 void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1706 void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1707 void (*nofity_fw) (struct qlcnic_adapter *, u8);
1710 int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
1711 void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
1712 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
1713 void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
1714 void qlcnic_update_stats(struct qlcnic_adapter *);
1716 /* Adapter hardware abstraction */
1717 struct qlcnic_hardware_ops {
1718 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1719 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1720 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1721 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1722 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1723 int (*get_mac_address) (struct qlcnic_adapter *, u8 *, u8);
1724 int (*setup_intr) (struct qlcnic_adapter *);
1725 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1726 struct qlcnic_adapter *, u32);
1727 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1728 void (*get_func_no) (struct qlcnic_adapter *);
1729 int (*api_lock) (struct qlcnic_adapter *);
1730 void (*api_unlock) (struct qlcnic_adapter *);
1731 void (*add_sysfs) (struct qlcnic_adapter *);
1732 void (*remove_sysfs) (struct qlcnic_adapter *);
1733 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1734 int (*create_rx_ctx) (struct qlcnic_adapter *);
1735 int (*create_tx_ctx) (struct qlcnic_adapter *,
1736 struct qlcnic_host_tx_ring *, int);
1737 void (*del_rx_ctx) (struct qlcnic_adapter *);
1738 void (*del_tx_ctx) (struct qlcnic_adapter *,
1739 struct qlcnic_host_tx_ring *);
1740 int (*setup_link_event) (struct qlcnic_adapter *, int);
1741 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1742 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1743 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1744 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1745 void (*napi_enable) (struct qlcnic_adapter *);
1746 void (*napi_disable) (struct qlcnic_adapter *);
1747 void (*config_intr_coal) (struct qlcnic_adapter *);
1748 int (*config_rss) (struct qlcnic_adapter *, int);
1749 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1750 int (*config_loopback) (struct qlcnic_adapter *, u8);
1751 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1752 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1753 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1754 int (*get_board_info) (struct qlcnic_adapter *);
1755 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1756 void (*free_mac_list) (struct qlcnic_adapter *);
1757 int (*read_phys_port_id) (struct qlcnic_adapter *);
1758 pci_ers_result_t (*io_error_detected) (struct pci_dev *,
1759 pci_channel_state_t);
1760 pci_ers_result_t (*io_slot_reset) (struct pci_dev *);
1761 void (*io_resume) (struct pci_dev *);
1764 extern struct qlcnic_nic_template qlcnic_vf_ops;
1766 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1768 return adapter->nic_ops->start_firmware(adapter);
1771 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1772 loff_t offset, size_t size)
1774 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1777 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1778 loff_t offset, size_t size)
1780 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1783 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1784 ulong off, u32 data)
1786 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1789 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1790 u8 *mac, u8 function)
1792 return adapter->ahw->hw_ops->get_mac_address(adapter, mac, function);
1795 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter)
1797 return adapter->ahw->hw_ops->setup_intr(adapter);
1800 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1801 struct qlcnic_adapter *adapter, u32 arg)
1803 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1806 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1807 struct qlcnic_cmd_args *cmd)
1809 if (adapter->ahw->hw_ops->mbx_cmd)
1810 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1815 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1817 adapter->ahw->hw_ops->get_func_no(adapter);
1820 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1822 return adapter->ahw->hw_ops->api_lock(adapter);
1825 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1827 adapter->ahw->hw_ops->api_unlock(adapter);
1830 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1832 if (adapter->ahw->hw_ops->add_sysfs)
1833 adapter->ahw->hw_ops->add_sysfs(adapter);
1836 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1838 if (adapter->ahw->hw_ops->remove_sysfs)
1839 adapter->ahw->hw_ops->remove_sysfs(adapter);
1843 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1845 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1848 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1850 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1853 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1854 struct qlcnic_host_tx_ring *ptr,
1857 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1860 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1862 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1865 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1866 struct qlcnic_host_tx_ring *ptr)
1868 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1871 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1874 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1877 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1878 struct qlcnic_info *info, u8 id)
1880 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1883 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1884 struct qlcnic_pci_info *info)
1886 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1889 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1890 struct qlcnic_info *info)
1892 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1895 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1896 u8 *addr, u16 id, u8 cmd)
1898 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1901 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1902 struct net_device *netdev)
1904 return adapter->nic_ops->napi_add(adapter, netdev);
1907 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1909 adapter->nic_ops->napi_del(adapter);
1912 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1914 adapter->ahw->hw_ops->napi_enable(adapter);
1917 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1919 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1921 return adapter->nic_ops->shutdown(pdev);
1924 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
1926 return adapter->nic_ops->resume(adapter);
1929 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1931 adapter->ahw->hw_ops->napi_disable(adapter);
1934 static inline void qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter)
1936 adapter->ahw->hw_ops->config_intr_coal(adapter);
1939 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1941 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1944 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1947 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1950 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1952 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1955 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1957 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
1960 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1963 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1966 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1969 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1972 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1974 return adapter->ahw->hw_ops->get_board_info(adapter);
1977 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
1979 return adapter->ahw->hw_ops->free_mac_list(adapter);
1982 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
1984 if (adapter->ahw->hw_ops->set_mac_filter_count)
1985 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
1988 static inline void qlcnic_read_phys_port_id(struct qlcnic_adapter *adapter)
1990 if (adapter->ahw->hw_ops->read_phys_port_id)
1991 adapter->ahw->hw_ops->read_phys_port_id(adapter);
1994 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
1997 if (adapter->nic_ops->request_reset)
1998 adapter->nic_ops->request_reset(adapter, key);
2001 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
2003 if (adapter->nic_ops->cancel_idc_work)
2004 adapter->nic_ops->cancel_idc_work(adapter);
2007 static inline irqreturn_t
2008 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
2010 return adapter->nic_ops->clear_legacy_intr(adapter);
2013 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
2016 return adapter->nic_ops->config_led(adapter, state, rate);
2019 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
2022 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
2025 static inline bool qlcnic_check_multi_tx(struct qlcnic_adapter *adapter)
2027 return test_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2030 static inline void qlcnic_disable_multi_tx(struct qlcnic_adapter *adapter)
2032 test_and_clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2033 adapter->drv_tx_rings = QLCNIC_SINGLE_RING;
2036 /* When operating in a muti tx mode, driver needs to write 0x1
2037 * to src register, instead of 0x0 to disable receiving interrupt.
2039 static inline void qlcnic_disable_int(struct qlcnic_host_sds_ring *sds_ring)
2041 struct qlcnic_adapter *adapter = sds_ring->adapter;
2043 if (qlcnic_check_multi_tx(adapter) &&
2044 !adapter->ahw->diag_test &&
2045 (adapter->flags & QLCNIC_MSIX_ENABLED))
2046 writel(0x1, sds_ring->crb_intr_mask);
2048 writel(0, sds_ring->crb_intr_mask);
2051 /* When operating in a muti tx mode, driver needs to write 0x0
2052 * to src register, instead of 0x1 to enable receiving interrupts.
2054 static inline void qlcnic_enable_int(struct qlcnic_host_sds_ring *sds_ring)
2056 struct qlcnic_adapter *adapter = sds_ring->adapter;
2058 if (qlcnic_check_multi_tx(adapter) &&
2059 !adapter->ahw->diag_test &&
2060 (adapter->flags & QLCNIC_MSIX_ENABLED))
2061 writel(0, sds_ring->crb_intr_mask);
2063 writel(0x1, sds_ring->crb_intr_mask);
2065 if (!QLCNIC_IS_MSI_FAMILY(adapter))
2066 writel(0xfbff, adapter->tgt_mask_reg);
2069 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
2071 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2074 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
2076 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2079 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
2081 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2084 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
2085 extern const struct ethtool_ops qlcnic_ethtool_ops;
2086 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
2088 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
2089 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
2090 printk(KERN_INFO "%s: %s: " _fmt, \
2091 dev_name(&adapter->pdev->dev), \
2092 __func__, ##_args); \
2095 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
2096 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
2097 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
2098 #define PCI_DEVICE_ID_QLOGIC_QLE844X 0x8040
2099 #define PCI_DEVICE_ID_QLOGIC_VF_QLE844X 0x8440
2101 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
2103 unsigned short device = adapter->pdev->device;
2104 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
2107 static inline bool qlcnic_84xx_check(struct qlcnic_adapter *adapter)
2109 unsigned short device = adapter->pdev->device;
2111 return ((device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2112 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2115 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
2117 unsigned short device = adapter->pdev->device;
2120 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
2121 (device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2122 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2123 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
2128 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
2130 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
2133 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
2135 unsigned short device = adapter->pdev->device;
2138 status = ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2139 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2143 #endif /* __QLCNIC_H_ */