Pileus Git - ~andy/linux/blob - drivers/net/ethernet/mellanox/mlx4/en_tx.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <asm/page.h>
  35 #include <linux/mlx4/cq.h>
  36 #include <linux/slab.h>
  37 #include <linux/mlx4/qp.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/vmalloc.h>
  41 #include <linux/tcp.h>
  42 #include <linux/moduleparam.h>
  43
  44 #include "mlx4_en.h"
  45
  46 enum {
  47         MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
  48         MAX_BF = 256,
  49 };
  50
  51 static int inline_thold __read_mostly = MAX_INLINE;
  52
  53 module_param_named(inline_thold, inline_thold, int, 0444);
  54 MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
  55
  56 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
  57                            struct mlx4_en_tx_ring *ring, int qpn, u32 size,
  58                            u16 stride)
  59 {
  60         struct mlx4_en_dev *mdev = priv->mdev;
  61         int tmp;
  62         int err;
  63
  64         ring->size = size;
  65         ring->size_mask = size - 1;
  66         ring->stride = stride;
  67
  68         inline_thold = min(inline_thold, MAX_INLINE);
  69
  70         tmp = size * sizeof(struct mlx4_en_tx_info);
  71         ring->tx_info = vmalloc(tmp);
  72         if (!ring->tx_info)
  73                 return -ENOMEM;
  74
  75         en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
  76                  ring->tx_info, tmp);
  77
  78         ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
  79         if (!ring->bounce_buf) {
  80                 err = -ENOMEM;
  81                 goto err_tx;
  82         }
  83         ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE);
  84
  85         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
  86                                  2 * PAGE_SIZE);
  87         if (err) {
  88                 en_err(priv, "Failed allocating hwq resources\n");
  89                 goto err_bounce;
  90         }
  91
  92         err = mlx4_en_map_buffer(&ring->wqres.buf);
  93         if (err) {
  94                 en_err(priv, "Failed to map TX buffer\n");
  95                 goto err_hwq_res;
  96         }
  97
  98         ring->buf = ring->wqres.buf.direct.buf;
  99
 100         en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d "
 101                "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size,
 102                ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map);
 103
 104         ring->qpn = qpn;
 105         err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp);
 106         if (err) {
 107                 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
 108                 goto err_map;
 109         }
 110         ring->qp.event = mlx4_en_sqp_event;
 111
 112         err = mlx4_bf_alloc(mdev->dev, &ring->bf);
 113         if (err) {
 114                 en_dbg(DRV, priv, "working without blueflame (%d)", err);
 115                 ring->bf.uar = &mdev->priv_uar;
 116                 ring->bf.uar->map = mdev->uar_map;
 117                 ring->bf_enabled = false;
 118         } else
 119                 ring->bf_enabled = true;
 120
 121         return 0;
 122
 123 err_map:
 124         mlx4_en_unmap_buffer(&ring->wqres.buf);
 125 err_hwq_res:
 126         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 127 err_bounce:
 128         kfree(ring->bounce_buf);
 129         ring->bounce_buf = NULL;
 130 err_tx:
 131         vfree(ring->tx_info);
 132         ring->tx_info = NULL;
 133         return err;
 134 }
 135
 136 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
 137                              struct mlx4_en_tx_ring *ring)
 138 {
 139         struct mlx4_en_dev *mdev = priv->mdev;
 140         en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
 141
 142         if (ring->bf_enabled)
 143                 mlx4_bf_free(mdev->dev, &ring->bf);
 144         mlx4_qp_remove(mdev->dev, &ring->qp);
 145         mlx4_qp_free(mdev->dev, &ring->qp);
 146         mlx4_en_unmap_buffer(&ring->wqres.buf);
 147         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 148         kfree(ring->bounce_buf);
 149         ring->bounce_buf = NULL;
 150         vfree(ring->tx_info);
 151         ring->tx_info = NULL;
 152 }
 153
 154 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
 155                              struct mlx4_en_tx_ring *ring,
 156                              int cq, int user_prio)
 157 {
 158         struct mlx4_en_dev *mdev = priv->mdev;
 159         int err;
 160
 161         ring->cqn = cq;
 162         ring->prod = 0;
 163         ring->cons = 0xffffffff;
 164         ring->last_nr_txbb = 1;
 165         ring->poll_cnt = 0;
 166         memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info));
 167         memset(ring->buf, 0, ring->buf_size);
 168
 169         ring->qp_state = MLX4_QP_STATE_RST;
 170         ring->doorbell_qpn = ring->qp.qpn << 8;
 171
 172         mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
 173                                 ring->cqn, user_prio, &ring->context);
 174         if (ring->bf_enabled)
 175                 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
 176
 177         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
 178                                &ring->qp, &ring->qp_state);
 179
 180         return err;
 181 }
 182
 183 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
 184                                 struct mlx4_en_tx_ring *ring)
 185 {
 186         struct mlx4_en_dev *mdev = priv->mdev;
 187
 188         mlx4_qp_modify(mdev->dev, NULL, ring->qp_state,
 189                        MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp);
 190 }
 191
 192
 193 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 194                                 struct mlx4_en_tx_ring *ring,
 195                                 int index, u8 owner)
 196 {
 197         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 198         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 199         struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
 200         struct sk_buff *skb = tx_info->skb;
 201         struct skb_frag_struct *frag;
 202         void *end = ring->buf + ring->buf_size;
 203         int frags = skb_shinfo(skb)->nr_frags;
 204         int i;
 205         __be32 *ptr = (__be32 *)tx_desc;
 206         __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
 207
 208         /* Optimize the common case when there are no wraparounds */
 209         if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 210                 if (!tx_info->inl) {
 211                         if (tx_info->linear) {
 212                                 dma_unmap_single(priv->ddev,
 213                                         (dma_addr_t) be64_to_cpu(data->addr),
 214                                          be32_to_cpu(data->byte_count),
 215                                          PCI_DMA_TODEVICE);
 216                                 ++data;
 217                         }
 218
 219                         for (i = 0; i < frags; i++) {
 220                                 frag = &skb_shinfo(skb)->frags[i];
 221                                 dma_unmap_page(priv->ddev,
 222                                         (dma_addr_t) be64_to_cpu(data[i].addr),
 223                                         skb_frag_size(frag), PCI_DMA_TODEVICE);
 224                         }
 225                 }
 226                 /* Stamp the freed descriptor */
 227                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) {
 228                         *ptr = stamp;
 229                         ptr += STAMP_DWORDS;
 230                 }
 231
 232         } else {
 233                 if (!tx_info->inl) {
 234                         if ((void *) data >= end) {
 235                                 data = ring->buf + ((void *)data - end);
 236                         }
 237
 238                         if (tx_info->linear) {
 239                                 dma_unmap_single(priv->ddev,
 240                                         (dma_addr_t) be64_to_cpu(data->addr),
 241                                          be32_to_cpu(data->byte_count),
 242                                          PCI_DMA_TODEVICE);
 243                                 ++data;
 244                         }
 245
 246                         for (i = 0; i < frags; i++) {
 247                                 /* Check for wraparound before unmapping */
 248                                 if ((void *) data >= end)
 249                                         data = ring->buf;
 250                                 frag = &skb_shinfo(skb)->frags[i];
 251                                 dma_unmap_page(priv->ddev,
 252                                         (dma_addr_t) be64_to_cpu(data->addr),
 253                                          skb_frag_size(frag), PCI_DMA_TODEVICE);
 254                                 ++data;
 255                         }
 256                 }
 257                 /* Stamp the freed descriptor */
 258                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) {
 259                         *ptr = stamp;
 260                         ptr += STAMP_DWORDS;
 261                         if ((void *) ptr >= end) {
 262                                 ptr = ring->buf;
 263                                 stamp ^= cpu_to_be32(0x80000000);
 264                         }
 265                 }
 266
 267         }
 268         dev_kfree_skb_any(skb);
 269         return tx_info->nr_txbb;
 270 }
 271
 272
 273 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
 274 {
 275         struct mlx4_en_priv *priv = netdev_priv(dev);
 276         int cnt = 0;
 277
 278         /* Skip last polled descriptor */
 279         ring->cons += ring->last_nr_txbb;
 280         en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
 281                  ring->cons, ring->prod);
 282
 283         if ((u32) (ring->prod - ring->cons) > ring->size) {
 284                 if (netif_msg_tx_err(priv))
 285                         en_warn(priv, "Tx consumer passed producer!\n");
 286                 return 0;
 287         }
 288
 289         while (ring->cons != ring->prod) {
 290                 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
 291                                                 ring->cons & ring->size_mask,
 292                                                 !!(ring->cons & ring->size));
 293                 ring->cons += ring->last_nr_txbb;
 294                 cnt++;
 295         }
 296
 297         netdev_tx_reset_queue(ring->tx_queue);
 298
 299         if (cnt)
 300                 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
 301
 302         return cnt;
 303 }
 304
 305 static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
 306 {
 307         struct mlx4_en_priv *priv = netdev_priv(dev);
 308         struct mlx4_cq *mcq = &cq->mcq;
 309         struct mlx4_en_tx_ring *ring = &priv->tx_ring[cq->ring];
 310         struct mlx4_cqe *cqe;
 311         u16 index;
 312         u16 new_index, ring_index;
 313         u32 txbbs_skipped = 0;
 314         u32 cons_index = mcq->cons_index;
 315         int size = cq->size;
 316         u32 size_mask = ring->size_mask;
 317         struct mlx4_cqe *buf = cq->buf;
 318         u32 packets = 0;
 319         u32 bytes = 0;
 320         int factor = priv->cqe_factor;
 321
 322         if (!priv->port_up)
 323                 return;
 324
 325         index = cons_index & size_mask;
 326         cqe = &buf[(index << factor) + factor];
 327         ring_index = ring->cons & size_mask;
 328
 329         /* Process all completed CQEs */
 330         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 331                         cons_index & size)) {
 332                 /*
 333                  * make sure we read the CQE after we read the
 334                  * ownership bit
 335                  */
 336                 rmb();
 337
 338                 /* Skip over last polled CQE */
 339                 new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
 340
 341                 do {
 342                         txbbs_skipped += ring->last_nr_txbb;
 343                         ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
 344                         /* free next descriptor */
 345                         ring->last_nr_txbb = mlx4_en_free_tx_desc(
 346                                         priv, ring, ring_index,
 347                                         !!((ring->cons + txbbs_skipped) &
 348                                                         ring->size));
 349                         packets++;
 350                         bytes += ring->tx_info[ring_index].nr_bytes;
 351                 } while (ring_index != new_index);
 352
 353                 ++cons_index;
 354                 index = cons_index & size_mask;
 355                 cqe = &buf[(index << factor) + factor];
 356         }
 357
 358
 359         /*
 360          * To prevent CQ overflow we first update CQ consumer and only then
 361          * the ring consumer.
 362          */
 363         mcq->cons_index = cons_index;
 364         mlx4_cq_set_ci(mcq);
 365         wmb();
 366         ring->cons += txbbs_skipped;
 367         netdev_tx_completed_queue(ring->tx_queue, packets, bytes);
 368
 369         /*
 370          * Wakeup Tx queue if this stopped, and at least 1 packet
 371          * was completed
 372          */
 373         if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) {
 374                 netif_tx_wake_queue(ring->tx_queue);
 375                 priv->port_stats.wake_queue++;
 376         }
 377 }
 378
 379 void mlx4_en_tx_irq(struct mlx4_cq *mcq)
 380 {
 381         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 382         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 383
 384         mlx4_en_process_tx_cq(cq->dev, cq);
 385         mlx4_en_arm_cq(priv, cq);
 386 }
 387
 388
 389 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
 390                                                       struct mlx4_en_tx_ring *ring,
 391                                                       u32 index,
 392                                                       unsigned int desc_size)
 393 {
 394         u32 copy = (ring->size - index) * TXBB_SIZE;
 395         int i;
 396
 397         for (i = desc_size - copy - 4; i >= 0; i -= 4) {
 398                 if ((i & (TXBB_SIZE - 1)) == 0)
 399                         wmb();
 400
 401                 *((u32 *) (ring->buf + i)) =
 402                         *((u32 *) (ring->bounce_buf + copy + i));
 403         }
 404
 405         for (i = copy - 4; i >= 4 ; i -= 4) {
 406                 if ((i & (TXBB_SIZE - 1)) == 0)
 407                         wmb();
 408
 409                 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) =
 410                         *((u32 *) (ring->bounce_buf + i));
 411         }
 412
 413         /* Return real descriptor location */
 414         return ring->buf + index * TXBB_SIZE;
 415 }
 416
 417 static int is_inline(struct sk_buff *skb, void **pfrag)
 418 {
 419         void *ptr;
 420
 421         if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) {
 422                 if (skb_shinfo(skb)->nr_frags == 1) {
 423                         ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]);
 424                         if (unlikely(!ptr))
 425                                 return 0;
 426
 427                         if (pfrag)
 428                                 *pfrag = ptr;
 429
 430                         return 1;
 431                 } else if (unlikely(skb_shinfo(skb)->nr_frags))
 432                         return 0;
 433                 else
 434                         return 1;
 435         }
 436
 437         return 0;
 438 }
 439
 440 static int inline_size(struct sk_buff *skb)
 441 {
 442         if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg)
 443             <= MLX4_INLINE_ALIGN)
 444                 return ALIGN(skb->len + CTRL_SIZE +
 445                              sizeof(struct mlx4_wqe_inline_seg), 16);
 446         else
 447                 return ALIGN(skb->len + CTRL_SIZE + 2 *
 448                              sizeof(struct mlx4_wqe_inline_seg), 16);
 449 }
 450
 451 static int get_real_size(struct sk_buff *skb, struct net_device *dev,
 452                          int *lso_header_size)
 453 {
 454         struct mlx4_en_priv *priv = netdev_priv(dev);
 455         int real_size;
 456
 457         if (skb_is_gso(skb)) {
 458                 *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb);
 459                 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE +
 460                         ALIGN(*lso_header_size + 4, DS_SIZE);
 461                 if (unlikely(*lso_header_size != skb_headlen(skb))) {
 462                         /* We add a segment for the skb linear buffer only if
 463                          * it contains data */
 464                         if (*lso_header_size < skb_headlen(skb))
 465                                 real_size += DS_SIZE;
 466                         else {
 467                                 if (netif_msg_tx_err(priv))
 468                                         en_warn(priv, "Non-linear headers\n");
 469                                 return 0;
 470                         }
 471                 }
 472         } else {
 473                 *lso_header_size = 0;
 474                 if (!is_inline(skb, NULL))
 475                         real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
 476                 else
 477                         real_size = inline_size(skb);
 478         }
 479
 480         return real_size;
 481 }
 482
 483 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb,
 484                              int real_size, u16 *vlan_tag, int tx_ind, void *fragptr)
 485 {
 486         struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
 487         int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
 488
 489         if (skb->len <= spc) {
 490                 inl->byte_count = cpu_to_be32(1 << 31 | skb->len);
 491                 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 492                 if (skb_shinfo(skb)->nr_frags)
 493                         memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr,
 494                                skb_frag_size(&skb_shinfo(skb)->frags[0]));
 495
 496         } else {
 497                 inl->byte_count = cpu_to_be32(1 << 31 | spc);
 498                 if (skb_headlen(skb) <= spc) {
 499                         skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 500                         if (skb_headlen(skb) < spc) {
 501                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb),
 502                                         fragptr, spc - skb_headlen(skb));
 503                                 fragptr +=  spc - skb_headlen(skb);
 504                         }
 505                         inl = (void *) (inl + 1) + spc;
 506                         memcpy(((void *)(inl + 1)), fragptr, skb->len - spc);
 507                 } else {
 508                         skb_copy_from_linear_data(skb, inl + 1, spc);
 509                         inl = (void *) (inl + 1) + spc;
 510                         skb_copy_from_linear_data_offset(skb, spc, inl + 1,
 511                                         skb_headlen(skb) - spc);
 512                         if (skb_shinfo(skb)->nr_frags)
 513                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc,
 514                                         fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0]));
 515                 }
 516
 517                 wmb();
 518                 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc));
 519         }
 520 }
 521
 522 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
 523 {
 524         struct mlx4_en_priv *priv = netdev_priv(dev);
 525         u16 rings_p_up = priv->num_tx_rings_p_up;
 526         u8 up = 0;
 527
 528         if (dev->num_tc)
 529                 return skb_tx_hash(dev, skb);
 530
 531         if (vlan_tx_tag_present(skb))
 532                 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT;
 533
 534         return __skb_tx_hash(dev, skb, rings_p_up) + up * rings_p_up;
 535 }
 536
 537 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)
 538 {
 539         __iowrite64_copy(dst, src, bytecnt / 8);
 540 }
 541
 542 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
 543 {
 544         struct mlx4_en_priv *priv = netdev_priv(dev);
 545         struct mlx4_en_dev *mdev = priv->mdev;
 546         struct mlx4_en_tx_ring *ring;
 547         struct mlx4_en_tx_desc *tx_desc;
 548         struct mlx4_wqe_data_seg *data;
 549         struct skb_frag_struct *frag;
 550         struct mlx4_en_tx_info *tx_info;
 551         struct ethhdr *ethh;
 552         int tx_ind = 0;
 553         int nr_txbb;
 554         int desc_size;
 555         int real_size;
 556         dma_addr_t dma;
 557         u32 index, bf_index;
 558         __be32 op_own;
 559         u16 vlan_tag = 0;
 560         int i;
 561         int lso_header_size;
 562         void *fragptr;
 563         bool bounce = false;
 564
 565         if (!priv->port_up)
 566                 goto tx_drop;
 567
 568         real_size = get_real_size(skb, dev, &lso_header_size);
 569         if (unlikely(!real_size))
 570                 goto tx_drop;
 571
 572         /* Align descriptor to TXBB size */
 573         desc_size = ALIGN(real_size, TXBB_SIZE);
 574         nr_txbb = desc_size / TXBB_SIZE;
 575         if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
 576                 if (netif_msg_tx_err(priv))
 577                         en_warn(priv, "Oversized header or SG list\n");
 578                 goto tx_drop;
 579         }
 580
 581         tx_ind = skb->queue_mapping;
 582         ring = &priv->tx_ring[tx_ind];
 583         if (vlan_tx_tag_present(skb))
 584                 vlan_tag = vlan_tx_tag_get(skb);
 585
 586         /* Check available TXBBs And 2K spare for prefetch */
 587         if (unlikely(((int)(ring->prod - ring->cons)) >
 588                      ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 589                 /* every full Tx ring stops queue */
 590                 netif_tx_stop_queue(ring->tx_queue);
 591                 priv->port_stats.queue_stopped++;
 592
 593                 /* If queue was emptied after the if, and before the
 594                  * stop_queue - need to wake the queue, or else it will remain
 595                  * stopped forever.
 596                  * Need a memory barrier to make sure ring->cons was not
 597                  * updated before queue was stopped.
 598                  */
 599                 wmb();
 600
 601                 if (unlikely(((int)(ring->prod - ring->cons)) <=
 602                              ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 603                         netif_tx_wake_queue(ring->tx_queue);
 604                         priv->port_stats.wake_queue++;
 605                 } else {
 606                         return NETDEV_TX_BUSY;
 607                 }
 608         }
 609
 610         /* Track current inflight packets for performance analysis */
 611         AVG_PERF_COUNTER(priv->pstats.inflight_avg,
 612                          (u32) (ring->prod - ring->cons - 1));
 613
 614         /* Packet is good - grab an index and transmit it */
 615         index = ring->prod & ring->size_mask;
 616         bf_index = ring->prod;
 617
 618         /* See if we have enough space for whole descriptor TXBB for setting
 619          * SW ownership on next descriptor; if not, use a bounce buffer. */
 620         if (likely(index + nr_txbb <= ring->size))
 621                 tx_desc = ring->buf + index * TXBB_SIZE;
 622         else {
 623                 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
 624                 bounce = true;
 625         }
 626
 627         /* Save skb in tx_info ring */
 628         tx_info = &ring->tx_info[index];
 629         tx_info->skb = skb;
 630         tx_info->nr_txbb = nr_txbb;
 631
 632         /* Prepare ctrl segement apart opcode+ownership, which depends on
 633          * whether LSO is used */
 634         tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
 635         tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN *
 636                 !!vlan_tx_tag_present(skb);
 637         tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
 638         tx_desc->ctrl.srcrb_flags = priv->ctrl_flags;
 639         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
 640                 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM |
 641                                                          MLX4_WQE_CTRL_TCP_UDP_CSUM);
 642                 ring->tx_csum++;
 643         }
 644
 645         if (priv->flags & MLX4_EN_FLAG_ENABLE_HW_LOOPBACK) {
 646                 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
 647                  * so that VFs and PF can communicate with each other
 648                  */
 649                 ethh = (struct ethhdr *)skb->data;
 650                 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
 651                 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
 652         }
 653
 654         /* Handle LSO (TSO) packets */
 655         if (lso_header_size) {
 656                 /* Mark opcode as LSO */
 657                 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) |
 658                         ((ring->prod & ring->size) ?
 659                                 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 660
 661                 /* Fill in the LSO prefix */
 662                 tx_desc->lso.mss_hdr_size = cpu_to_be32(
 663                         skb_shinfo(skb)->gso_size << 16 | lso_header_size);
 664
 665                 /* Copy headers;
 666                  * note that we already verified that it is linear */
 667                 memcpy(tx_desc->lso.header, skb->data, lso_header_size);
 668                 data = ((void *) &tx_desc->lso +
 669                         ALIGN(lso_header_size + 4, DS_SIZE));
 670
 671                 priv->port_stats.tso_packets++;
 672                 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) +
 673                         !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size);
 674                 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size;
 675                 ring->packets += i;
 676         } else {
 677                 /* Normal (Non LSO) packet */
 678                 op_own = cpu_to_be32(MLX4_OPCODE_SEND) |
 679                         ((ring->prod & ring->size) ?
 680                          cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 681                 data = &tx_desc->data;
 682                 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
 683                 ring->packets++;
 684
 685         }
 686         ring->bytes += tx_info->nr_bytes;
 687         netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes);
 688         AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
 689
 690
 691         /* valid only for none inline segments */
 692         tx_info->data_offset = (void *) data - (void *) tx_desc;
 693
 694         tx_info->linear = (lso_header_size < skb_headlen(skb) && !is_inline(skb, NULL)) ? 1 : 0;
 695         data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
 696
 697         if (!is_inline(skb, &fragptr)) {
 698                 /* Map fragments */
 699                 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) {
 700                         frag = &skb_shinfo(skb)->frags[i];
 701                         dma = skb_frag_dma_map(priv->ddev, frag,
 702                                                0, skb_frag_size(frag),
 703                                                DMA_TO_DEVICE);
 704                         data->addr = cpu_to_be64(dma);
 705                         data->lkey = cpu_to_be32(mdev->mr.key);
 706                         wmb();
 707                         data->byte_count = cpu_to_be32(skb_frag_size(frag));
 708                         --data;
 709                 }
 710
 711                 /* Map linear part */
 712                 if (tx_info->linear) {
 713                         dma = dma_map_single(priv->ddev, skb->data + lso_header_size,
 714                                              skb_headlen(skb) - lso_header_size, PCI_DMA_TODEVICE);
 715                         data->addr = cpu_to_be64(dma);
 716                         data->lkey = cpu_to_be32(mdev->mr.key);
 717                         wmb();
 718                         data->byte_count = cpu_to_be32(skb_headlen(skb) - lso_header_size);
 719                 }
 720                 tx_info->inl = 0;
 721         } else {
 722                 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr);
 723                 tx_info->inl = 1;
 724         }
 725
 726         ring->prod += nr_txbb;
 727
 728         /* If we used a bounce buffer then copy descriptor back into place */
 729         if (bounce)
 730                 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
 731
 732         if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
 733                 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn);
 734                 op_own |= htonl((bf_index & 0xffff) << 8);
 735                 /* Ensure new descirptor hits memory
 736                 * before setting ownership of this descriptor to HW */
 737                 wmb();
 738                 tx_desc->ctrl.owner_opcode = op_own;
 739
 740                 wmb();
 741
 742                 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl,
 743                      desc_size);
 744
 745                 wmb();
 746
 747                 ring->bf.offset ^= ring->bf.buf_size;
 748         } else {
 749                 /* Ensure new descirptor hits memory
 750                 * before setting ownership of this descriptor to HW */
 751                 wmb();
 752                 tx_desc->ctrl.owner_opcode = op_own;
 753                 wmb();
 754                 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL);
 755         }
 756
 757         return NETDEV_TX_OK;
 758
 759 tx_drop:
 760         dev_kfree_skb_any(skb);
 761         priv->stats.tx_dropped++;
 762         return NETDEV_TX_OK;
 763 }
 764