1 /*******************************************************************************
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/bitops.h>
33 #include <linux/timer.h>
35 #include <linux/netdevice.h>
36 #include <linux/if_vlan.h>
37 #include <linux/u64_stats_sync.h>
41 #ifdef CONFIG_NET_RX_BUSY_POLL
42 #include <net/busy_poll.h>
45 /* wrapper around a pointer to a socket buffer,
46 * so a DMA handle can be stored along with the buffer */
47 struct ixgbevf_tx_buffer {
50 unsigned long time_stamp;
51 union ixgbe_adv_tx_desc *next_to_watch;
56 struct ixgbevf_rx_buffer {
62 struct ixgbevf_ring *next;
63 struct net_device *netdev;
65 void *desc; /* descriptor ring memory */
66 dma_addr_t dma; /* phys. address of descriptor ring */
67 unsigned int size; /* length in bytes */
68 unsigned int count; /* amount of descriptors */
69 unsigned int next_to_use;
70 unsigned int next_to_clean;
72 int queue_index; /* needed for multiqueue queue management */
74 struct ixgbevf_tx_buffer *tx_buffer_info;
75 struct ixgbevf_rx_buffer *rx_buffer_info;
80 struct u64_stats_sync syncp;
87 u16 reg_idx; /* holds the special value that gets the hardware register
88 * offset associated with this ring, which is different
89 * for DCB and RSS modes */
94 /* How many Rx Buffers do we bundle into one write to the hardware ? */
95 #define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
97 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
98 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
100 #define IXGBEVF_DEFAULT_TXD 1024
101 #define IXGBEVF_DEFAULT_RXD 512
102 #define IXGBEVF_MAX_TXD 4096
103 #define IXGBEVF_MIN_TXD 64
104 #define IXGBEVF_MAX_RXD 4096
105 #define IXGBEVF_MIN_RXD 64
107 /* Supported Rx Buffer Sizes */
108 #define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
109 #define IXGBEVF_RXBUFFER_2K 2048
110 #define IXGBEVF_RXBUFFER_4K 4096
111 #define IXGBEVF_RXBUFFER_8K 8192
112 #define IXGBEVF_RXBUFFER_10K 10240
114 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
116 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
118 #define IXGBE_TX_FLAGS_CSUM (u32)(1)
119 #define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
120 #define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
121 #define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
122 #define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
123 #define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
124 #define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
125 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
126 #define IXGBE_TX_FLAGS_VLAN_SHIFT 16
128 struct ixgbevf_ring_container {
129 struct ixgbevf_ring *ring; /* pointer to linked list of rings */
130 unsigned int total_bytes; /* total bytes processed this int */
131 unsigned int total_packets; /* total packets processed this int */
132 u8 count; /* total number of rings in vector */
133 u8 itr; /* current ITR setting for ring */
136 /* iterator for handling rings in ring container */
137 #define ixgbevf_for_each_ring(pos, head) \
138 for (pos = (head).ring; pos != NULL; pos = pos->next)
140 /* MAX_MSIX_Q_VECTORS of these are allocated,
141 * but we only use one per queue-specific vector.
143 struct ixgbevf_q_vector {
144 struct ixgbevf_adapter *adapter;
145 u16 v_idx; /* index of q_vector within array, also used for
146 * finding the bit in EICR and friends that
147 * represents the vector for this ring */
148 u16 itr; /* Interrupt throttle rate written to EITR */
149 struct napi_struct napi;
150 struct ixgbevf_ring_container rx, tx;
151 char name[IFNAMSIZ + 9];
152 #ifdef CONFIG_NET_RX_BUSY_POLL
154 #define IXGBEVF_QV_STATE_IDLE 0
155 #define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */
156 #define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */
157 #define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */
158 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
159 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
160 #define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */
161 #define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */
162 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | IXGBEVF_QV_STATE_POLL_YIELD)
163 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | IXGBEVF_QV_STATE_POLL_YIELD)
165 #endif /* CONFIG_NET_RX_BUSY_POLL */
167 #ifdef CONFIG_NET_RX_BUSY_POLL
168 static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector)
171 spin_lock_init(&q_vector->lock);
172 q_vector->state = IXGBEVF_QV_STATE_IDLE;
175 /* called from the device poll routine to get ownership of a q_vector */
176 static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector)
179 spin_lock_bh(&q_vector->lock);
180 if (q_vector->state & IXGBEVF_QV_LOCKED) {
181 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI);
182 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD;
185 /* we don't care if someone yielded */
186 q_vector->state = IXGBEVF_QV_STATE_NAPI;
188 spin_unlock_bh(&q_vector->lock);
192 /* returns true is someone tried to get the qv while napi had it */
193 static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector)
196 spin_lock_bh(&q_vector->lock);
197 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL |
198 IXGBEVF_QV_STATE_NAPI_YIELD));
200 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
202 /* reset state to idle, unless QV is disabled */
203 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
204 spin_unlock_bh(&q_vector->lock);
208 /* called from ixgbevf_low_latency_poll() */
209 static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector)
212 spin_lock_bh(&q_vector->lock);
213 if ((q_vector->state & IXGBEVF_QV_LOCKED)) {
214 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD;
217 /* preserve yield marks */
218 q_vector->state |= IXGBEVF_QV_STATE_POLL;
220 spin_unlock_bh(&q_vector->lock);
224 /* returns true if someone tried to get the qv while it was locked */
225 static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector)
228 spin_lock_bh(&q_vector->lock);
229 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI));
231 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
233 /* reset state to idle, unless QV is disabled */
234 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
235 spin_unlock_bh(&q_vector->lock);
239 /* true if a socket is polling, even if it did not get the lock */
240 static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector)
242 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED));
243 return q_vector->state & IXGBEVF_QV_USER_PEND;
246 /* false if QV is currently owned */
247 static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector)
250 spin_lock_bh(&q_vector->lock);
251 if (q_vector->state & IXGBEVF_QV_OWNED)
253 spin_unlock_bh(&q_vector->lock);
257 #endif /* CONFIG_NET_RX_BUSY_POLL */
260 * microsecond values for various ITR rates shifted by 2 to fit itr register
261 * with the first 3 bits reserved 0
263 #define IXGBE_MIN_RSC_ITR 24
264 #define IXGBE_100K_ITR 40
265 #define IXGBE_20K_ITR 200
266 #define IXGBE_10K_ITR 400
267 #define IXGBE_8K_ITR 500
269 /* Helper macros to switch between ints/sec and what the register uses.
270 * And yes, it's the same math going both ways. The lowest value
271 * supported by all of the ixgbe hardware is 8.
273 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \
274 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
275 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
277 #define IXGBE_DESC_UNUSED(R) \
278 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
279 (R)->next_to_clean - (R)->next_to_use - 1)
281 #define IXGBEVF_RX_DESC(R, i) \
282 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
283 #define IXGBEVF_TX_DESC(R, i) \
284 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
285 #define IXGBEVF_TX_CTXTDESC(R, i) \
286 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
288 #define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */
290 #define OTHER_VECTOR 1
291 #define NON_Q_VECTORS (OTHER_VECTOR)
293 #define MAX_MSIX_Q_VECTORS 2
295 #define MIN_MSIX_Q_VECTORS 1
296 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
298 /* board specific private data structure */
299 struct ixgbevf_adapter {
300 struct timer_list watchdog_timer;
301 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
303 struct work_struct reset_task;
304 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
306 /* Interrupt Throttle Rate */
310 /* interrupt masks */
311 u32 eims_enable_mask;
315 struct ixgbevf_ring *tx_ring; /* One per active queue */
322 u32 tx_timeout_count;
325 struct ixgbevf_ring *rx_ring; /* One per active queue */
327 u64 hw_csum_rx_error;
328 u64 hw_rx_no_dma_resources;
331 int num_msix_vectors;
332 struct msix_entry *msix_entries;
334 u32 alloc_rx_page_failed;
335 u32 alloc_rx_buff_failed;
337 /* Some features need tri-state capability,
338 * thus the additional *_CAPABLE flags.
341 #define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1)
342 #define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 1)
344 /* OS defined structs */
345 struct net_device *netdev;
346 struct pci_dev *pdev;
348 /* structs defined in ixgbe_vf.h */
351 struct ixgbevf_hw_stats stats;
353 /* Interrupt Throttle Rate */
358 unsigned int tx_ring_count;
359 unsigned int rx_ring_count;
364 struct work_struct watchdog_task;
369 enum ixbgevf_state_t {
376 struct sk_buff *prev;
378 #define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb)
380 enum ixgbevf_boards {
385 extern const struct ixgbevf_info ixgbevf_82599_vf_info;
386 extern const struct ixgbevf_info ixgbevf_X540_vf_info;
387 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
389 /* needed by ethtool.c */
390 extern const char ixgbevf_driver_name[];
391 extern const char ixgbevf_driver_version[];
393 void ixgbevf_up(struct ixgbevf_adapter *adapter);
394 void ixgbevf_down(struct ixgbevf_adapter *adapter);
395 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
396 void ixgbevf_reset(struct ixgbevf_adapter *adapter);
397 void ixgbevf_set_ethtool_ops(struct net_device *netdev);
398 int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
399 int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
400 void ixgbevf_free_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
401 void ixgbevf_free_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
402 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
403 int ethtool_ioctl(struct ifreq *ifr);
405 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
407 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
408 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
411 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
412 #define hw_dbg(hw, format, arg...) \
413 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
415 #define hw_dbg(hw, format, arg...) do {} while (0)
418 #endif /* _IXGBEVF_H_ */