1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name[] = "igb";
69 char igb_driver_version[] = DRV_VERSION;
70 static const char igb_driver_string[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info *igb_info_tbl[] = {
76 [board_82575] = &e1000_82575_info,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
113 /* required last entry */
117 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
119 void igb_reset(struct igb_adapter *);
120 static int igb_setup_all_tx_resources(struct igb_adapter *);
121 static int igb_setup_all_rx_resources(struct igb_adapter *);
122 static void igb_free_all_tx_resources(struct igb_adapter *);
123 static void igb_free_all_rx_resources(struct igb_adapter *);
124 static void igb_setup_mrqc(struct igb_adapter *);
125 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
126 static void igb_remove(struct pci_dev *pdev);
127 static int igb_sw_init(struct igb_adapter *);
128 static int igb_open(struct net_device *);
129 static int igb_close(struct net_device *);
130 static void igb_configure(struct igb_adapter *);
131 static void igb_configure_tx(struct igb_adapter *);
132 static void igb_configure_rx(struct igb_adapter *);
133 static void igb_clean_all_tx_rings(struct igb_adapter *);
134 static void igb_clean_all_rx_rings(struct igb_adapter *);
135 static void igb_clean_tx_ring(struct igb_ring *);
136 static void igb_clean_rx_ring(struct igb_ring *);
137 static void igb_set_rx_mode(struct net_device *);
138 static void igb_update_phy_info(unsigned long);
139 static void igb_watchdog(unsigned long);
140 static void igb_watchdog_task(struct work_struct *);
141 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
142 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
143 struct rtnl_link_stats64 *stats);
144 static int igb_change_mtu(struct net_device *, int);
145 static int igb_set_mac(struct net_device *, void *);
146 static void igb_set_uta(struct igb_adapter *adapter);
147 static irqreturn_t igb_intr(int irq, void *);
148 static irqreturn_t igb_intr_msi(int irq, void *);
149 static irqreturn_t igb_msix_other(int irq, void *);
150 static irqreturn_t igb_msix_ring(int irq, void *);
151 #ifdef CONFIG_IGB_DCA
152 static void igb_update_dca(struct igb_q_vector *);
153 static void igb_setup_dca(struct igb_adapter *);
154 #endif /* CONFIG_IGB_DCA */
155 static int igb_poll(struct napi_struct *, int);
156 static bool igb_clean_tx_irq(struct igb_q_vector *);
157 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
158 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
159 static void igb_tx_timeout(struct net_device *);
160 static void igb_reset_task(struct work_struct *);
161 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
162 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
163 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
164 static void igb_restore_vlan(struct igb_adapter *);
165 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
166 static void igb_ping_all_vfs(struct igb_adapter *);
167 static void igb_msg_task(struct igb_adapter *);
168 static void igb_vmm_control(struct igb_adapter *);
169 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
170 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
171 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
172 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
173 int vf, u16 vlan, u8 qos);
174 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
175 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
177 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
178 struct ifla_vf_info *ivi);
179 static void igb_check_vf_rate_limit(struct igb_adapter *);
181 #ifdef CONFIG_PCI_IOV
182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
183 static bool igb_vfs_are_assigned(struct igb_adapter *adapter);
187 #ifdef CONFIG_PM_SLEEP
188 static int igb_suspend(struct device *);
190 static int igb_resume(struct device *);
191 #ifdef CONFIG_PM_RUNTIME
192 static int igb_runtime_suspend(struct device *dev);
193 static int igb_runtime_resume(struct device *dev);
194 static int igb_runtime_idle(struct device *dev);
196 static const struct dev_pm_ops igb_pm_ops = {
197 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
198 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
202 static void igb_shutdown(struct pci_dev *);
203 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
204 #ifdef CONFIG_IGB_DCA
205 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
206 static struct notifier_block dca_notifier = {
207 .notifier_call = igb_notify_dca,
212 #ifdef CONFIG_NET_POLL_CONTROLLER
213 /* for netdump / net console */
214 static void igb_netpoll(struct net_device *);
216 #ifdef CONFIG_PCI_IOV
217 static unsigned int max_vfs = 0;
218 module_param(max_vfs, uint, 0);
219 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
220 "per physical function");
221 #endif /* CONFIG_PCI_IOV */
223 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
224 pci_channel_state_t);
225 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
226 static void igb_io_resume(struct pci_dev *);
228 static const struct pci_error_handlers igb_err_handler = {
229 .error_detected = igb_io_error_detected,
230 .slot_reset = igb_io_slot_reset,
231 .resume = igb_io_resume,
234 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
236 static struct pci_driver igb_driver = {
237 .name = igb_driver_name,
238 .id_table = igb_pci_tbl,
240 .remove = igb_remove,
242 .driver.pm = &igb_pm_ops,
244 .shutdown = igb_shutdown,
245 .sriov_configure = igb_pci_sriov_configure,
246 .err_handler = &igb_err_handler
249 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
250 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
251 MODULE_LICENSE("GPL");
252 MODULE_VERSION(DRV_VERSION);
254 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
255 static int debug = -1;
256 module_param(debug, int, 0);
257 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
259 struct igb_reg_info {
264 static const struct igb_reg_info igb_reg_info_tbl[] = {
266 /* General Registers */
267 {E1000_CTRL, "CTRL"},
268 {E1000_STATUS, "STATUS"},
269 {E1000_CTRL_EXT, "CTRL_EXT"},
271 /* Interrupt Registers */
275 {E1000_RCTL, "RCTL"},
276 {E1000_RDLEN(0), "RDLEN"},
277 {E1000_RDH(0), "RDH"},
278 {E1000_RDT(0), "RDT"},
279 {E1000_RXDCTL(0), "RXDCTL"},
280 {E1000_RDBAL(0), "RDBAL"},
281 {E1000_RDBAH(0), "RDBAH"},
284 {E1000_TCTL, "TCTL"},
285 {E1000_TDBAL(0), "TDBAL"},
286 {E1000_TDBAH(0), "TDBAH"},
287 {E1000_TDLEN(0), "TDLEN"},
288 {E1000_TDH(0), "TDH"},
289 {E1000_TDT(0), "TDT"},
290 {E1000_TXDCTL(0), "TXDCTL"},
291 {E1000_TDFH, "TDFH"},
292 {E1000_TDFT, "TDFT"},
293 {E1000_TDFHS, "TDFHS"},
294 {E1000_TDFPC, "TDFPC"},
296 /* List Terminator */
300 /* igb_regdump - register printout routine */
301 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
307 switch (reginfo->ofs) {
309 for (n = 0; n < 4; n++)
310 regs[n] = rd32(E1000_RDLEN(n));
313 for (n = 0; n < 4; n++)
314 regs[n] = rd32(E1000_RDH(n));
317 for (n = 0; n < 4; n++)
318 regs[n] = rd32(E1000_RDT(n));
320 case E1000_RXDCTL(0):
321 for (n = 0; n < 4; n++)
322 regs[n] = rd32(E1000_RXDCTL(n));
325 for (n = 0; n < 4; n++)
326 regs[n] = rd32(E1000_RDBAL(n));
329 for (n = 0; n < 4; n++)
330 regs[n] = rd32(E1000_RDBAH(n));
333 for (n = 0; n < 4; n++)
334 regs[n] = rd32(E1000_RDBAL(n));
337 for (n = 0; n < 4; n++)
338 regs[n] = rd32(E1000_TDBAH(n));
341 for (n = 0; n < 4; n++)
342 regs[n] = rd32(E1000_TDLEN(n));
345 for (n = 0; n < 4; n++)
346 regs[n] = rd32(E1000_TDH(n));
349 for (n = 0; n < 4; n++)
350 regs[n] = rd32(E1000_TDT(n));
352 case E1000_TXDCTL(0):
353 for (n = 0; n < 4; n++)
354 regs[n] = rd32(E1000_TXDCTL(n));
357 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
361 snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
362 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
366 /* igb_dump - Print registers, Tx-rings and Rx-rings */
367 static void igb_dump(struct igb_adapter *adapter)
369 struct net_device *netdev = adapter->netdev;
370 struct e1000_hw *hw = &adapter->hw;
371 struct igb_reg_info *reginfo;
372 struct igb_ring *tx_ring;
373 union e1000_adv_tx_desc *tx_desc;
374 struct my_u0 { u64 a; u64 b; } *u0;
375 struct igb_ring *rx_ring;
376 union e1000_adv_rx_desc *rx_desc;
380 if (!netif_msg_hw(adapter))
383 /* Print netdevice Info */
385 dev_info(&adapter->pdev->dev, "Net device Info\n");
386 pr_info("Device Name state trans_start "
388 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
389 netdev->state, netdev->trans_start, netdev->last_rx);
392 /* Print Registers */
393 dev_info(&adapter->pdev->dev, "Register Dump\n");
394 pr_info(" Register Name Value\n");
395 for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
396 reginfo->name; reginfo++) {
397 igb_regdump(hw, reginfo);
400 /* Print TX Ring Summary */
401 if (!netdev || !netif_running(netdev))
404 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
405 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
406 for (n = 0; n < adapter->num_tx_queues; n++) {
407 struct igb_tx_buffer *buffer_info;
408 tx_ring = adapter->tx_ring[n];
409 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
410 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
411 n, tx_ring->next_to_use, tx_ring->next_to_clean,
412 (u64)dma_unmap_addr(buffer_info, dma),
413 dma_unmap_len(buffer_info, len),
414 buffer_info->next_to_watch,
415 (u64)buffer_info->time_stamp);
419 if (!netif_msg_tx_done(adapter))
420 goto rx_ring_summary;
422 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
424 /* Transmit Descriptor Formats
426 * Advanced Transmit Descriptor
427 * +--------------------------------------------------------------+
428 * 0 | Buffer Address [63:0] |
429 * +--------------------------------------------------------------+
430 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
431 * +--------------------------------------------------------------+
432 * 63 46 45 40 39 38 36 35 32 31 24 15 0
435 for (n = 0; n < adapter->num_tx_queues; n++) {
436 tx_ring = adapter->tx_ring[n];
437 pr_info("------------------------------------\n");
438 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
439 pr_info("------------------------------------\n");
440 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
441 "[bi->dma ] leng ntw timestamp "
444 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
445 const char *next_desc;
446 struct igb_tx_buffer *buffer_info;
447 tx_desc = IGB_TX_DESC(tx_ring, i);
448 buffer_info = &tx_ring->tx_buffer_info[i];
449 u0 = (struct my_u0 *)tx_desc;
450 if (i == tx_ring->next_to_use &&
451 i == tx_ring->next_to_clean)
452 next_desc = " NTC/U";
453 else if (i == tx_ring->next_to_use)
455 else if (i == tx_ring->next_to_clean)
460 pr_info("T [0x%03X] %016llX %016llX %016llX"
461 " %04X %p %016llX %p%s\n", i,
464 (u64)dma_unmap_addr(buffer_info, dma),
465 dma_unmap_len(buffer_info, len),
466 buffer_info->next_to_watch,
467 (u64)buffer_info->time_stamp,
468 buffer_info->skb, next_desc);
470 if (netif_msg_pktdata(adapter) && buffer_info->skb)
471 print_hex_dump(KERN_INFO, "",
473 16, 1, buffer_info->skb->data,
474 dma_unmap_len(buffer_info, len),
479 /* Print RX Rings Summary */
481 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
482 pr_info("Queue [NTU] [NTC]\n");
483 for (n = 0; n < adapter->num_rx_queues; n++) {
484 rx_ring = adapter->rx_ring[n];
485 pr_info(" %5d %5X %5X\n",
486 n, rx_ring->next_to_use, rx_ring->next_to_clean);
490 if (!netif_msg_rx_status(adapter))
493 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
495 /* Advanced Receive Descriptor (Read) Format
497 * +-----------------------------------------------------+
498 * 0 | Packet Buffer Address [63:1] |A0/NSE|
499 * +----------------------------------------------+------+
500 * 8 | Header Buffer Address [63:1] | DD |
501 * +-----------------------------------------------------+
504 * Advanced Receive Descriptor (Write-Back) Format
506 * 63 48 47 32 31 30 21 20 17 16 4 3 0
507 * +------------------------------------------------------+
508 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
509 * | Checksum Ident | | | | Type | Type |
510 * +------------------------------------------------------+
511 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
512 * +------------------------------------------------------+
513 * 63 48 47 32 31 20 19 0
516 for (n = 0; n < adapter->num_rx_queues; n++) {
517 rx_ring = adapter->rx_ring[n];
518 pr_info("------------------------------------\n");
519 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
520 pr_info("------------------------------------\n");
521 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
522 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
523 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
524 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
526 for (i = 0; i < rx_ring->count; i++) {
527 const char *next_desc;
528 struct igb_rx_buffer *buffer_info;
529 buffer_info = &rx_ring->rx_buffer_info[i];
530 rx_desc = IGB_RX_DESC(rx_ring, i);
531 u0 = (struct my_u0 *)rx_desc;
532 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
534 if (i == rx_ring->next_to_use)
536 else if (i == rx_ring->next_to_clean)
541 if (staterr & E1000_RXD_STAT_DD) {
542 /* Descriptor Done */
543 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
549 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
553 (u64)buffer_info->dma,
556 if (netif_msg_pktdata(adapter) &&
557 buffer_info->dma && buffer_info->page) {
558 print_hex_dump(KERN_INFO, "",
561 page_address(buffer_info->page) +
562 buffer_info->page_offset,
574 * igb_get_i2c_data - Reads the I2C SDA data bit
575 * @hw: pointer to hardware structure
576 * @i2cctl: Current value of I2CCTL register
578 * Returns the I2C data bit value
580 static int igb_get_i2c_data(void *data)
582 struct igb_adapter *adapter = (struct igb_adapter *)data;
583 struct e1000_hw *hw = &adapter->hw;
584 s32 i2cctl = rd32(E1000_I2CPARAMS);
586 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
590 * igb_set_i2c_data - Sets the I2C data bit
591 * @data: pointer to hardware structure
592 * @state: I2C data value (0 or 1) to set
594 * Sets the I2C data bit
596 static void igb_set_i2c_data(void *data, int state)
598 struct igb_adapter *adapter = (struct igb_adapter *)data;
599 struct e1000_hw *hw = &adapter->hw;
600 s32 i2cctl = rd32(E1000_I2CPARAMS);
603 i2cctl |= E1000_I2C_DATA_OUT;
605 i2cctl &= ~E1000_I2C_DATA_OUT;
607 i2cctl &= ~E1000_I2C_DATA_OE_N;
608 i2cctl |= E1000_I2C_CLK_OE_N;
609 wr32(E1000_I2CPARAMS, i2cctl);
615 * igb_set_i2c_clk - Sets the I2C SCL clock
616 * @data: pointer to hardware structure
617 * @state: state to set clock
619 * Sets the I2C clock line to state
621 static void igb_set_i2c_clk(void *data, int state)
623 struct igb_adapter *adapter = (struct igb_adapter *)data;
624 struct e1000_hw *hw = &adapter->hw;
625 s32 i2cctl = rd32(E1000_I2CPARAMS);
628 i2cctl |= E1000_I2C_CLK_OUT;
629 i2cctl &= ~E1000_I2C_CLK_OE_N;
631 i2cctl &= ~E1000_I2C_CLK_OUT;
632 i2cctl &= ~E1000_I2C_CLK_OE_N;
634 wr32(E1000_I2CPARAMS, i2cctl);
639 * igb_get_i2c_clk - Gets the I2C SCL clock state
640 * @data: pointer to hardware structure
642 * Gets the I2C clock state
644 static int igb_get_i2c_clk(void *data)
646 struct igb_adapter *adapter = (struct igb_adapter *)data;
647 struct e1000_hw *hw = &adapter->hw;
648 s32 i2cctl = rd32(E1000_I2CPARAMS);
650 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
653 static const struct i2c_algo_bit_data igb_i2c_algo = {
654 .setsda = igb_set_i2c_data,
655 .setscl = igb_set_i2c_clk,
656 .getsda = igb_get_i2c_data,
657 .getscl = igb_get_i2c_clk,
663 * igb_get_hw_dev - return device
664 * @hw: pointer to hardware structure
666 * used by hardware layer to print debugging information
668 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
670 struct igb_adapter *adapter = hw->back;
671 return adapter->netdev;
675 * igb_init_module - Driver Registration Routine
677 * igb_init_module is the first routine called when the driver is
678 * loaded. All it does is register with the PCI subsystem.
680 static int __init igb_init_module(void)
683 pr_info("%s - version %s\n",
684 igb_driver_string, igb_driver_version);
686 pr_info("%s\n", igb_copyright);
688 #ifdef CONFIG_IGB_DCA
689 dca_register_notify(&dca_notifier);
691 ret = pci_register_driver(&igb_driver);
695 module_init(igb_init_module);
698 * igb_exit_module - Driver Exit Cleanup Routine
700 * igb_exit_module is called just before the driver is removed
703 static void __exit igb_exit_module(void)
705 #ifdef CONFIG_IGB_DCA
706 dca_unregister_notify(&dca_notifier);
708 pci_unregister_driver(&igb_driver);
711 module_exit(igb_exit_module);
713 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
715 * igb_cache_ring_register - Descriptor ring to register mapping
716 * @adapter: board private structure to initialize
718 * Once we know the feature-set enabled for the device, we'll cache
719 * the register offset the descriptor ring is assigned to.
721 static void igb_cache_ring_register(struct igb_adapter *adapter)
724 u32 rbase_offset = adapter->vfs_allocated_count;
726 switch (adapter->hw.mac.type) {
728 /* The queues are allocated for virtualization such that VF 0
729 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
730 * In order to avoid collision we start at the first free queue
731 * and continue consuming queues in the same sequence
733 if (adapter->vfs_allocated_count) {
734 for (; i < adapter->rss_queues; i++)
735 adapter->rx_ring[i]->reg_idx = rbase_offset +
745 for (; i < adapter->num_rx_queues; i++)
746 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
747 for (; j < adapter->num_tx_queues; j++)
748 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
754 * igb_write_ivar - configure ivar for given MSI-X vector
755 * @hw: pointer to the HW structure
756 * @msix_vector: vector number we are allocating to a given ring
757 * @index: row index of IVAR register to write within IVAR table
758 * @offset: column offset of in IVAR, should be multiple of 8
760 * This function is intended to handle the writing of the IVAR register
761 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
762 * each containing an cause allocation for an Rx and Tx ring, and a
763 * variable number of rows depending on the number of queues supported.
765 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
766 int index, int offset)
768 u32 ivar = array_rd32(E1000_IVAR0, index);
770 /* clear any bits that are currently set */
771 ivar &= ~((u32)0xFF << offset);
773 /* write vector and valid bit */
774 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
776 array_wr32(E1000_IVAR0, index, ivar);
779 #define IGB_N0_QUEUE -1
780 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
782 struct igb_adapter *adapter = q_vector->adapter;
783 struct e1000_hw *hw = &adapter->hw;
784 int rx_queue = IGB_N0_QUEUE;
785 int tx_queue = IGB_N0_QUEUE;
788 if (q_vector->rx.ring)
789 rx_queue = q_vector->rx.ring->reg_idx;
790 if (q_vector->tx.ring)
791 tx_queue = q_vector->tx.ring->reg_idx;
793 switch (hw->mac.type) {
795 /* The 82575 assigns vectors using a bitmask, which matches the
796 * bitmask for the EICR/EIMS/EIMC registers. To assign one
797 * or more queues to a vector, we write the appropriate bits
798 * into the MSIXBM register for that vector.
800 if (rx_queue > IGB_N0_QUEUE)
801 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
802 if (tx_queue > IGB_N0_QUEUE)
803 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
804 if (!adapter->msix_entries && msix_vector == 0)
805 msixbm |= E1000_EIMS_OTHER;
806 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
807 q_vector->eims_value = msixbm;
810 /* 82576 uses a table that essentially consists of 2 columns
811 * with 8 rows. The ordering is column-major so we use the
812 * lower 3 bits as the row index, and the 4th bit as the
815 if (rx_queue > IGB_N0_QUEUE)
816 igb_write_ivar(hw, msix_vector,
818 (rx_queue & 0x8) << 1);
819 if (tx_queue > IGB_N0_QUEUE)
820 igb_write_ivar(hw, msix_vector,
822 ((tx_queue & 0x8) << 1) + 8);
823 q_vector->eims_value = 1 << msix_vector;
830 /* On 82580 and newer adapters the scheme is similar to 82576
831 * however instead of ordering column-major we have things
832 * ordered row-major. So we traverse the table by using
833 * bit 0 as the column offset, and the remaining bits as the
836 if (rx_queue > IGB_N0_QUEUE)
837 igb_write_ivar(hw, msix_vector,
839 (rx_queue & 0x1) << 4);
840 if (tx_queue > IGB_N0_QUEUE)
841 igb_write_ivar(hw, msix_vector,
843 ((tx_queue & 0x1) << 4) + 8);
844 q_vector->eims_value = 1 << msix_vector;
851 /* add q_vector eims value to global eims_enable_mask */
852 adapter->eims_enable_mask |= q_vector->eims_value;
854 /* configure q_vector to set itr on first interrupt */
855 q_vector->set_itr = 1;
859 * igb_configure_msix - Configure MSI-X hardware
860 * @adapter: board private structure to initialize
862 * igb_configure_msix sets up the hardware to properly
863 * generate MSI-X interrupts.
865 static void igb_configure_msix(struct igb_adapter *adapter)
869 struct e1000_hw *hw = &adapter->hw;
871 adapter->eims_enable_mask = 0;
873 /* set vector for other causes, i.e. link changes */
874 switch (hw->mac.type) {
876 tmp = rd32(E1000_CTRL_EXT);
877 /* enable MSI-X PBA support*/
878 tmp |= E1000_CTRL_EXT_PBA_CLR;
880 /* Auto-Mask interrupts upon ICR read. */
881 tmp |= E1000_CTRL_EXT_EIAME;
882 tmp |= E1000_CTRL_EXT_IRCA;
884 wr32(E1000_CTRL_EXT, tmp);
886 /* enable msix_other interrupt */
887 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
888 adapter->eims_other = E1000_EIMS_OTHER;
898 /* Turn on MSI-X capability first, or our settings
899 * won't stick. And it will take days to debug.
901 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
902 E1000_GPIE_PBA | E1000_GPIE_EIAME |
905 /* enable msix_other interrupt */
906 adapter->eims_other = 1 << vector;
907 tmp = (vector++ | E1000_IVAR_VALID) << 8;
909 wr32(E1000_IVAR_MISC, tmp);
912 /* do nothing, since nothing else supports MSI-X */
914 } /* switch (hw->mac.type) */
916 adapter->eims_enable_mask |= adapter->eims_other;
918 for (i = 0; i < adapter->num_q_vectors; i++)
919 igb_assign_vector(adapter->q_vector[i], vector++);
925 * igb_request_msix - Initialize MSI-X interrupts
926 * @adapter: board private structure to initialize
928 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
931 static int igb_request_msix(struct igb_adapter *adapter)
933 struct net_device *netdev = adapter->netdev;
934 struct e1000_hw *hw = &adapter->hw;
935 int i, err = 0, vector = 0, free_vector = 0;
937 err = request_irq(adapter->msix_entries[vector].vector,
938 igb_msix_other, 0, netdev->name, adapter);
942 for (i = 0; i < adapter->num_q_vectors; i++) {
943 struct igb_q_vector *q_vector = adapter->q_vector[i];
947 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
949 if (q_vector->rx.ring && q_vector->tx.ring)
950 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
951 q_vector->rx.ring->queue_index);
952 else if (q_vector->tx.ring)
953 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
954 q_vector->tx.ring->queue_index);
955 else if (q_vector->rx.ring)
956 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
957 q_vector->rx.ring->queue_index);
959 sprintf(q_vector->name, "%s-unused", netdev->name);
961 err = request_irq(adapter->msix_entries[vector].vector,
962 igb_msix_ring, 0, q_vector->name,
968 igb_configure_msix(adapter);
972 /* free already assigned IRQs */
973 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
976 for (i = 0; i < vector; i++) {
977 free_irq(adapter->msix_entries[free_vector++].vector,
978 adapter->q_vector[i]);
984 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
986 if (adapter->msix_entries) {
987 pci_disable_msix(adapter->pdev);
988 kfree(adapter->msix_entries);
989 adapter->msix_entries = NULL;
990 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
991 pci_disable_msi(adapter->pdev);
996 * igb_free_q_vector - Free memory allocated for specific interrupt vector
997 * @adapter: board private structure to initialize
998 * @v_idx: Index of vector to be freed
1000 * This function frees the memory allocated to the q_vector. In addition if
1001 * NAPI is enabled it will delete any references to the NAPI struct prior
1002 * to freeing the q_vector.
1004 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1006 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1008 if (q_vector->tx.ring)
1009 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1011 if (q_vector->rx.ring)
1012 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1014 adapter->q_vector[v_idx] = NULL;
1015 netif_napi_del(&q_vector->napi);
1017 /* ixgbe_get_stats64() might access the rings on this vector,
1018 * we must wait a grace period before freeing it.
1020 kfree_rcu(q_vector, rcu);
1024 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1025 * @adapter: board private structure to initialize
1027 * This function frees the memory allocated to the q_vectors. In addition if
1028 * NAPI is enabled it will delete any references to the NAPI struct prior
1029 * to freeing the q_vector.
1031 static void igb_free_q_vectors(struct igb_adapter *adapter)
1033 int v_idx = adapter->num_q_vectors;
1035 adapter->num_tx_queues = 0;
1036 adapter->num_rx_queues = 0;
1037 adapter->num_q_vectors = 0;
1040 igb_free_q_vector(adapter, v_idx);
1044 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1045 * @adapter: board private structure to initialize
1047 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1048 * MSI-X interrupts allocated.
1050 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1052 igb_free_q_vectors(adapter);
1053 igb_reset_interrupt_capability(adapter);
1057 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1058 * @adapter: board private structure to initialize
1059 * @msix: boolean value of MSIX capability
1061 * Attempt to configure interrupts using the best available
1062 * capabilities of the hardware and kernel.
1064 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1072 /* Number of supported queues. */
1073 adapter->num_rx_queues = adapter->rss_queues;
1074 if (adapter->vfs_allocated_count)
1075 adapter->num_tx_queues = 1;
1077 adapter->num_tx_queues = adapter->rss_queues;
1079 /* start with one vector for every Rx queue */
1080 numvecs = adapter->num_rx_queues;
1082 /* if Tx handler is separate add 1 for every Tx queue */
1083 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1084 numvecs += adapter->num_tx_queues;
1086 /* store the number of vectors reserved for queues */
1087 adapter->num_q_vectors = numvecs;
1089 /* add 1 vector for link status interrupts */
1091 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1094 if (!adapter->msix_entries)
1097 for (i = 0; i < numvecs; i++)
1098 adapter->msix_entries[i].entry = i;
1100 err = pci_enable_msix(adapter->pdev,
1101 adapter->msix_entries,
1106 igb_reset_interrupt_capability(adapter);
1108 /* If we can't do MSI-X, try MSI */
1110 #ifdef CONFIG_PCI_IOV
1111 /* disable SR-IOV for non MSI-X configurations */
1112 if (adapter->vf_data) {
1113 struct e1000_hw *hw = &adapter->hw;
1114 /* disable iov and allow time for transactions to clear */
1115 pci_disable_sriov(adapter->pdev);
1118 kfree(adapter->vf_data);
1119 adapter->vf_data = NULL;
1120 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1123 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1126 adapter->vfs_allocated_count = 0;
1127 adapter->rss_queues = 1;
1128 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1129 adapter->num_rx_queues = 1;
1130 adapter->num_tx_queues = 1;
1131 adapter->num_q_vectors = 1;
1132 if (!pci_enable_msi(adapter->pdev))
1133 adapter->flags |= IGB_FLAG_HAS_MSI;
1136 static void igb_add_ring(struct igb_ring *ring,
1137 struct igb_ring_container *head)
1144 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1145 * @adapter: board private structure to initialize
1146 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1147 * @v_idx: index of vector in adapter struct
1148 * @txr_count: total number of Tx rings to allocate
1149 * @txr_idx: index of first Tx ring to allocate
1150 * @rxr_count: total number of Rx rings to allocate
1151 * @rxr_idx: index of first Rx ring to allocate
1153 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1155 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1156 int v_count, int v_idx,
1157 int txr_count, int txr_idx,
1158 int rxr_count, int rxr_idx)
1160 struct igb_q_vector *q_vector;
1161 struct igb_ring *ring;
1162 int ring_count, size;
1164 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1165 if (txr_count > 1 || rxr_count > 1)
1168 ring_count = txr_count + rxr_count;
1169 size = sizeof(struct igb_q_vector) +
1170 (sizeof(struct igb_ring) * ring_count);
1172 /* allocate q_vector and rings */
1173 q_vector = kzalloc(size, GFP_KERNEL);
1177 /* initialize NAPI */
1178 netif_napi_add(adapter->netdev, &q_vector->napi,
1181 /* tie q_vector and adapter together */
1182 adapter->q_vector[v_idx] = q_vector;
1183 q_vector->adapter = adapter;
1185 /* initialize work limits */
1186 q_vector->tx.work_limit = adapter->tx_work_limit;
1188 /* initialize ITR configuration */
1189 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1190 q_vector->itr_val = IGB_START_ITR;
1192 /* initialize pointer to rings */
1193 ring = q_vector->ring;
1197 /* rx or rx/tx vector */
1198 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1199 q_vector->itr_val = adapter->rx_itr_setting;
1201 /* tx only vector */
1202 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1203 q_vector->itr_val = adapter->tx_itr_setting;
1207 /* assign generic ring traits */
1208 ring->dev = &adapter->pdev->dev;
1209 ring->netdev = adapter->netdev;
1211 /* configure backlink on ring */
1212 ring->q_vector = q_vector;
1214 /* update q_vector Tx values */
1215 igb_add_ring(ring, &q_vector->tx);
1217 /* For 82575, context index must be unique per ring. */
1218 if (adapter->hw.mac.type == e1000_82575)
1219 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1221 /* apply Tx specific ring traits */
1222 ring->count = adapter->tx_ring_count;
1223 ring->queue_index = txr_idx;
1225 /* assign ring to adapter */
1226 adapter->tx_ring[txr_idx] = ring;
1228 /* push pointer to next ring */
1233 /* assign generic ring traits */
1234 ring->dev = &adapter->pdev->dev;
1235 ring->netdev = adapter->netdev;
1237 /* configure backlink on ring */
1238 ring->q_vector = q_vector;
1240 /* update q_vector Rx values */
1241 igb_add_ring(ring, &q_vector->rx);
1243 /* set flag indicating ring supports SCTP checksum offload */
1244 if (adapter->hw.mac.type >= e1000_82576)
1245 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1248 * On i350, i354, i210, and i211, loopback VLAN packets
1249 * have the tag byte-swapped.
1251 if (adapter->hw.mac.type >= e1000_i350)
1252 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1254 /* apply Rx specific ring traits */
1255 ring->count = adapter->rx_ring_count;
1256 ring->queue_index = rxr_idx;
1258 /* assign ring to adapter */
1259 adapter->rx_ring[rxr_idx] = ring;
1267 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1268 * @adapter: board private structure to initialize
1270 * We allocate one q_vector per queue interrupt. If allocation fails we
1273 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1275 int q_vectors = adapter->num_q_vectors;
1276 int rxr_remaining = adapter->num_rx_queues;
1277 int txr_remaining = adapter->num_tx_queues;
1278 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1281 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1282 for (; rxr_remaining; v_idx++) {
1283 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1289 /* update counts and index */
1295 for (; v_idx < q_vectors; v_idx++) {
1296 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1297 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1298 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1299 tqpv, txr_idx, rqpv, rxr_idx);
1304 /* update counts and index */
1305 rxr_remaining -= rqpv;
1306 txr_remaining -= tqpv;
1314 adapter->num_tx_queues = 0;
1315 adapter->num_rx_queues = 0;
1316 adapter->num_q_vectors = 0;
1319 igb_free_q_vector(adapter, v_idx);
1325 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1326 * @adapter: board private structure to initialize
1327 * @msix: boolean value of MSIX capability
1329 * This function initializes the interrupts and allocates all of the queues.
1331 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1333 struct pci_dev *pdev = adapter->pdev;
1336 igb_set_interrupt_capability(adapter, msix);
1338 err = igb_alloc_q_vectors(adapter);
1340 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1341 goto err_alloc_q_vectors;
1344 igb_cache_ring_register(adapter);
1348 err_alloc_q_vectors:
1349 igb_reset_interrupt_capability(adapter);
1354 * igb_request_irq - initialize interrupts
1355 * @adapter: board private structure to initialize
1357 * Attempts to configure interrupts using the best available
1358 * capabilities of the hardware and kernel.
1360 static int igb_request_irq(struct igb_adapter *adapter)
1362 struct net_device *netdev = adapter->netdev;
1363 struct pci_dev *pdev = adapter->pdev;
1366 if (adapter->msix_entries) {
1367 err = igb_request_msix(adapter);
1370 /* fall back to MSI */
1371 igb_free_all_tx_resources(adapter);
1372 igb_free_all_rx_resources(adapter);
1374 igb_clear_interrupt_scheme(adapter);
1375 err = igb_init_interrupt_scheme(adapter, false);
1379 igb_setup_all_tx_resources(adapter);
1380 igb_setup_all_rx_resources(adapter);
1381 igb_configure(adapter);
1384 igb_assign_vector(adapter->q_vector[0], 0);
1386 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1387 err = request_irq(pdev->irq, igb_intr_msi, 0,
1388 netdev->name, adapter);
1392 /* fall back to legacy interrupts */
1393 igb_reset_interrupt_capability(adapter);
1394 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1397 err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1398 netdev->name, adapter);
1401 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1408 static void igb_free_irq(struct igb_adapter *adapter)
1410 if (adapter->msix_entries) {
1413 free_irq(adapter->msix_entries[vector++].vector, adapter);
1415 for (i = 0; i < adapter->num_q_vectors; i++)
1416 free_irq(adapter->msix_entries[vector++].vector,
1417 adapter->q_vector[i]);
1419 free_irq(adapter->pdev->irq, adapter);
1424 * igb_irq_disable - Mask off interrupt generation on the NIC
1425 * @adapter: board private structure
1427 static void igb_irq_disable(struct igb_adapter *adapter)
1429 struct e1000_hw *hw = &adapter->hw;
1431 /* we need to be careful when disabling interrupts. The VFs are also
1432 * mapped into these registers and so clearing the bits can cause
1433 * issues on the VF drivers so we only need to clear what we set
1435 if (adapter->msix_entries) {
1436 u32 regval = rd32(E1000_EIAM);
1437 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1438 wr32(E1000_EIMC, adapter->eims_enable_mask);
1439 regval = rd32(E1000_EIAC);
1440 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1444 wr32(E1000_IMC, ~0);
1446 if (adapter->msix_entries) {
1448 for (i = 0; i < adapter->num_q_vectors; i++)
1449 synchronize_irq(adapter->msix_entries[i].vector);
1451 synchronize_irq(adapter->pdev->irq);
1456 * igb_irq_enable - Enable default interrupt generation settings
1457 * @adapter: board private structure
1459 static void igb_irq_enable(struct igb_adapter *adapter)
1461 struct e1000_hw *hw = &adapter->hw;
1463 if (adapter->msix_entries) {
1464 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1465 u32 regval = rd32(E1000_EIAC);
1466 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1467 regval = rd32(E1000_EIAM);
1468 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1469 wr32(E1000_EIMS, adapter->eims_enable_mask);
1470 if (adapter->vfs_allocated_count) {
1471 wr32(E1000_MBVFIMR, 0xFF);
1472 ims |= E1000_IMS_VMMB;
1474 wr32(E1000_IMS, ims);
1476 wr32(E1000_IMS, IMS_ENABLE_MASK |
1478 wr32(E1000_IAM, IMS_ENABLE_MASK |
1483 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1485 struct e1000_hw *hw = &adapter->hw;
1486 u16 vid = adapter->hw.mng_cookie.vlan_id;
1487 u16 old_vid = adapter->mng_vlan_id;
1489 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1490 /* add VID to filter table */
1491 igb_vfta_set(hw, vid, true);
1492 adapter->mng_vlan_id = vid;
1494 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1497 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1499 !test_bit(old_vid, adapter->active_vlans)) {
1500 /* remove VID from filter table */
1501 igb_vfta_set(hw, old_vid, false);
1506 * igb_release_hw_control - release control of the h/w to f/w
1507 * @adapter: address of board private structure
1509 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1510 * For ASF and Pass Through versions of f/w this means that the
1511 * driver is no longer loaded.
1513 static void igb_release_hw_control(struct igb_adapter *adapter)
1515 struct e1000_hw *hw = &adapter->hw;
1518 /* Let firmware take over control of h/w */
1519 ctrl_ext = rd32(E1000_CTRL_EXT);
1520 wr32(E1000_CTRL_EXT,
1521 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1525 * igb_get_hw_control - get control of the h/w from f/w
1526 * @adapter: address of board private structure
1528 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1529 * For ASF and Pass Through versions of f/w this means that
1530 * the driver is loaded.
1532 static void igb_get_hw_control(struct igb_adapter *adapter)
1534 struct e1000_hw *hw = &adapter->hw;
1537 /* Let firmware know the driver has taken over */
1538 ctrl_ext = rd32(E1000_CTRL_EXT);
1539 wr32(E1000_CTRL_EXT,
1540 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1544 * igb_configure - configure the hardware for RX and TX
1545 * @adapter: private board structure
1547 static void igb_configure(struct igb_adapter *adapter)
1549 struct net_device *netdev = adapter->netdev;
1552 igb_get_hw_control(adapter);
1553 igb_set_rx_mode(netdev);
1555 igb_restore_vlan(adapter);
1557 igb_setup_tctl(adapter);
1558 igb_setup_mrqc(adapter);
1559 igb_setup_rctl(adapter);
1561 igb_configure_tx(adapter);
1562 igb_configure_rx(adapter);
1564 igb_rx_fifo_flush_82575(&adapter->hw);
1566 /* call igb_desc_unused which always leaves
1567 * at least 1 descriptor unused to make sure
1568 * next_to_use != next_to_clean
1570 for (i = 0; i < adapter->num_rx_queues; i++) {
1571 struct igb_ring *ring = adapter->rx_ring[i];
1572 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1577 * igb_power_up_link - Power up the phy/serdes link
1578 * @adapter: address of board private structure
1580 void igb_power_up_link(struct igb_adapter *adapter)
1582 igb_reset_phy(&adapter->hw);
1584 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1585 igb_power_up_phy_copper(&adapter->hw);
1587 igb_power_up_serdes_link_82575(&adapter->hw);
1591 * igb_power_down_link - Power down the phy/serdes link
1592 * @adapter: address of board private structure
1594 static void igb_power_down_link(struct igb_adapter *adapter)
1596 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1597 igb_power_down_phy_copper_82575(&adapter->hw);
1599 igb_shutdown_serdes_link_82575(&adapter->hw);
1603 * igb_up - Open the interface and prepare it to handle traffic
1604 * @adapter: board private structure
1606 int igb_up(struct igb_adapter *adapter)
1608 struct e1000_hw *hw = &adapter->hw;
1611 /* hardware has been reset, we need to reload some things */
1612 igb_configure(adapter);
1614 clear_bit(__IGB_DOWN, &adapter->state);
1616 for (i = 0; i < adapter->num_q_vectors; i++)
1617 napi_enable(&(adapter->q_vector[i]->napi));
1619 if (adapter->msix_entries)
1620 igb_configure_msix(adapter);
1622 igb_assign_vector(adapter->q_vector[0], 0);
1624 /* Clear any pending interrupts. */
1626 igb_irq_enable(adapter);
1628 /* notify VFs that reset has been completed */
1629 if (adapter->vfs_allocated_count) {
1630 u32 reg_data = rd32(E1000_CTRL_EXT);
1631 reg_data |= E1000_CTRL_EXT_PFRSTD;
1632 wr32(E1000_CTRL_EXT, reg_data);
1635 netif_tx_start_all_queues(adapter->netdev);
1637 /* start the watchdog. */
1638 hw->mac.get_link_status = 1;
1639 schedule_work(&adapter->watchdog_task);
1644 void igb_down(struct igb_adapter *adapter)
1646 struct net_device *netdev = adapter->netdev;
1647 struct e1000_hw *hw = &adapter->hw;
1651 /* signal that we're down so the interrupt handler does not
1652 * reschedule our watchdog timer
1654 set_bit(__IGB_DOWN, &adapter->state);
1656 /* disable receives in the hardware */
1657 rctl = rd32(E1000_RCTL);
1658 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1659 /* flush and sleep below */
1661 netif_tx_stop_all_queues(netdev);
1663 /* disable transmits in the hardware */
1664 tctl = rd32(E1000_TCTL);
1665 tctl &= ~E1000_TCTL_EN;
1666 wr32(E1000_TCTL, tctl);
1667 /* flush both disables and wait for them to finish */
1671 for (i = 0; i < adapter->num_q_vectors; i++)
1672 napi_disable(&(adapter->q_vector[i]->napi));
1674 igb_irq_disable(adapter);
1676 del_timer_sync(&adapter->watchdog_timer);
1677 del_timer_sync(&adapter->phy_info_timer);
1679 netif_carrier_off(netdev);
1681 /* record the stats before reset*/
1682 spin_lock(&adapter->stats64_lock);
1683 igb_update_stats(adapter, &adapter->stats64);
1684 spin_unlock(&adapter->stats64_lock);
1686 adapter->link_speed = 0;
1687 adapter->link_duplex = 0;
1689 if (!pci_channel_offline(adapter->pdev))
1691 igb_clean_all_tx_rings(adapter);
1692 igb_clean_all_rx_rings(adapter);
1693 #ifdef CONFIG_IGB_DCA
1695 /* since we reset the hardware DCA settings were cleared */
1696 igb_setup_dca(adapter);
1700 void igb_reinit_locked(struct igb_adapter *adapter)
1702 WARN_ON(in_interrupt());
1703 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1707 clear_bit(__IGB_RESETTING, &adapter->state);
1710 void igb_reset(struct igb_adapter *adapter)
1712 struct pci_dev *pdev = adapter->pdev;
1713 struct e1000_hw *hw = &adapter->hw;
1714 struct e1000_mac_info *mac = &hw->mac;
1715 struct e1000_fc_info *fc = &hw->fc;
1716 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1718 /* Repartition Pba for greater than 9k mtu
1719 * To take effect CTRL.RST is required.
1721 switch (mac->type) {
1725 pba = rd32(E1000_RXPBS);
1726 pba = igb_rxpbs_adjust_82580(pba);
1729 pba = rd32(E1000_RXPBS);
1730 pba &= E1000_RXPBS_SIZE_MASK_82576;
1736 pba = E1000_PBA_34K;
1740 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1741 (mac->type < e1000_82576)) {
1742 /* adjust PBA for jumbo frames */
1743 wr32(E1000_PBA, pba);
1745 /* To maintain wire speed transmits, the Tx FIFO should be
1746 * large enough to accommodate two full transmit packets,
1747 * rounded up to the next 1KB and expressed in KB. Likewise,
1748 * the Rx FIFO should be large enough to accommodate at least
1749 * one full receive packet and is similarly rounded up and
1752 pba = rd32(E1000_PBA);
1753 /* upper 16 bits has Tx packet buffer allocation size in KB */
1754 tx_space = pba >> 16;
1755 /* lower 16 bits has Rx packet buffer allocation size in KB */
1757 /* the Tx fifo also stores 16 bytes of information about the Tx
1758 * but don't include ethernet FCS because hardware appends it
1760 min_tx_space = (adapter->max_frame_size +
1761 sizeof(union e1000_adv_tx_desc) -
1763 min_tx_space = ALIGN(min_tx_space, 1024);
1764 min_tx_space >>= 10;
1765 /* software strips receive CRC, so leave room for it */
1766 min_rx_space = adapter->max_frame_size;
1767 min_rx_space = ALIGN(min_rx_space, 1024);
1768 min_rx_space >>= 10;
1770 /* If current Tx allocation is less than the min Tx FIFO size,
1771 * and the min Tx FIFO size is less than the current Rx FIFO
1772 * allocation, take space away from current Rx allocation
1774 if (tx_space < min_tx_space &&
1775 ((min_tx_space - tx_space) < pba)) {
1776 pba = pba - (min_tx_space - tx_space);
1778 /* if short on Rx space, Rx wins and must trump Tx
1781 if (pba < min_rx_space)
1784 wr32(E1000_PBA, pba);
1787 /* flow control settings */
1788 /* The high water mark must be low enough to fit one full frame
1789 * (or the size used for early receive) above it in the Rx FIFO.
1790 * Set it to the lower of:
1791 * - 90% of the Rx FIFO size, or
1792 * - the full Rx FIFO size minus one full frame
1794 hwm = min(((pba << 10) * 9 / 10),
1795 ((pba << 10) - 2 * adapter->max_frame_size));
1797 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1798 fc->low_water = fc->high_water - 16;
1799 fc->pause_time = 0xFFFF;
1801 fc->current_mode = fc->requested_mode;
1803 /* disable receive for all VFs and wait one second */
1804 if (adapter->vfs_allocated_count) {
1806 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1807 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1809 /* ping all the active vfs to let them know we are going down */
1810 igb_ping_all_vfs(adapter);
1812 /* disable transmits and receives */
1813 wr32(E1000_VFRE, 0);
1814 wr32(E1000_VFTE, 0);
1817 /* Allow time for pending master requests to run */
1818 hw->mac.ops.reset_hw(hw);
1821 if (hw->mac.ops.init_hw(hw))
1822 dev_err(&pdev->dev, "Hardware Error\n");
1824 /* Flow control settings reset on hardware reset, so guarantee flow
1825 * control is off when forcing speed.
1827 if (!hw->mac.autoneg)
1828 igb_force_mac_fc(hw);
1830 igb_init_dmac(adapter, pba);
1831 #ifdef CONFIG_IGB_HWMON
1832 /* Re-initialize the thermal sensor on i350 devices. */
1833 if (!test_bit(__IGB_DOWN, &adapter->state)) {
1834 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1835 /* If present, re-initialize the external thermal sensor
1839 mac->ops.init_thermal_sensor_thresh(hw);
1843 if (!netif_running(adapter->netdev))
1844 igb_power_down_link(adapter);
1846 igb_update_mng_vlan(adapter);
1848 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1849 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1851 /* Re-enable PTP, where applicable. */
1852 igb_ptp_reset(adapter);
1854 igb_get_phy_info(hw);
1857 static netdev_features_t igb_fix_features(struct net_device *netdev,
1858 netdev_features_t features)
1860 /* Since there is no support for separate Rx/Tx vlan accel
1861 * enable/disable make sure Tx flag is always in same state as Rx.
1863 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1864 features |= NETIF_F_HW_VLAN_CTAG_TX;
1866 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1871 static int igb_set_features(struct net_device *netdev,
1872 netdev_features_t features)
1874 netdev_features_t changed = netdev->features ^ features;
1875 struct igb_adapter *adapter = netdev_priv(netdev);
1877 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1878 igb_vlan_mode(netdev, features);
1880 if (!(changed & NETIF_F_RXALL))
1883 netdev->features = features;
1885 if (netif_running(netdev))
1886 igb_reinit_locked(adapter);
1893 static const struct net_device_ops igb_netdev_ops = {
1894 .ndo_open = igb_open,
1895 .ndo_stop = igb_close,
1896 .ndo_start_xmit = igb_xmit_frame,
1897 .ndo_get_stats64 = igb_get_stats64,
1898 .ndo_set_rx_mode = igb_set_rx_mode,
1899 .ndo_set_mac_address = igb_set_mac,
1900 .ndo_change_mtu = igb_change_mtu,
1901 .ndo_do_ioctl = igb_ioctl,
1902 .ndo_tx_timeout = igb_tx_timeout,
1903 .ndo_validate_addr = eth_validate_addr,
1904 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1905 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1906 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
1907 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
1908 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
1909 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
1910 .ndo_get_vf_config = igb_ndo_get_vf_config,
1911 #ifdef CONFIG_NET_POLL_CONTROLLER
1912 .ndo_poll_controller = igb_netpoll,
1914 .ndo_fix_features = igb_fix_features,
1915 .ndo_set_features = igb_set_features,
1919 * igb_set_fw_version - Configure version string for ethtool
1920 * @adapter: adapter struct
1922 void igb_set_fw_version(struct igb_adapter *adapter)
1924 struct e1000_hw *hw = &adapter->hw;
1925 struct e1000_fw_version fw;
1927 igb_get_fw_version(hw, &fw);
1929 switch (hw->mac.type) {
1931 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1933 fw.invm_major, fw.invm_minor, fw.invm_img_type);
1937 /* if option is rom valid, display its version too */
1939 snprintf(adapter->fw_version,
1940 sizeof(adapter->fw_version),
1941 "%d.%d, 0x%08x, %d.%d.%d",
1942 fw.eep_major, fw.eep_minor, fw.etrack_id,
1943 fw.or_major, fw.or_build, fw.or_patch);
1946 snprintf(adapter->fw_version,
1947 sizeof(adapter->fw_version),
1949 fw.eep_major, fw.eep_minor, fw.etrack_id);
1957 * igb_init_i2c - Init I2C interface
1958 * @adapter: pointer to adapter structure
1960 static s32 igb_init_i2c(struct igb_adapter *adapter)
1962 s32 status = E1000_SUCCESS;
1964 /* I2C interface supported on i350 devices */
1965 if (adapter->hw.mac.type != e1000_i350)
1966 return E1000_SUCCESS;
1968 /* Initialize the i2c bus which is controlled by the registers.
1969 * This bus will use the i2c_algo_bit structue that implements
1970 * the protocol through toggling of the 4 bits in the register.
1972 adapter->i2c_adap.owner = THIS_MODULE;
1973 adapter->i2c_algo = igb_i2c_algo;
1974 adapter->i2c_algo.data = adapter;
1975 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1976 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1977 strlcpy(adapter->i2c_adap.name, "igb BB",
1978 sizeof(adapter->i2c_adap.name));
1979 status = i2c_bit_add_bus(&adapter->i2c_adap);
1984 * igb_probe - Device Initialization Routine
1985 * @pdev: PCI device information struct
1986 * @ent: entry in igb_pci_tbl
1988 * Returns 0 on success, negative on failure
1990 * igb_probe initializes an adapter identified by a pci_dev structure.
1991 * The OS initialization, configuring of the adapter private structure,
1992 * and a hardware reset occur.
1994 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1996 struct net_device *netdev;
1997 struct igb_adapter *adapter;
1998 struct e1000_hw *hw;
1999 u16 eeprom_data = 0;
2001 static int global_quad_port_a; /* global quad port a indication */
2002 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2003 unsigned long mmio_start, mmio_len;
2004 int err, pci_using_dac;
2005 u8 part_str[E1000_PBANUM_LENGTH];
2007 /* Catch broken hardware that put the wrong VF device ID in
2008 * the PCIe SR-IOV capability.
2010 if (pdev->is_virtfn) {
2011 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2012 pci_name(pdev), pdev->vendor, pdev->device);
2016 err = pci_enable_device_mem(pdev);
2021 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
2023 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
2027 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2029 err = dma_set_coherent_mask(&pdev->dev,
2033 "No usable DMA configuration, aborting\n");
2039 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2045 pci_enable_pcie_error_reporting(pdev);
2047 pci_set_master(pdev);
2048 pci_save_state(pdev);
2051 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2054 goto err_alloc_etherdev;
2056 SET_NETDEV_DEV(netdev, &pdev->dev);
2058 pci_set_drvdata(pdev, netdev);
2059 adapter = netdev_priv(netdev);
2060 adapter->netdev = netdev;
2061 adapter->pdev = pdev;
2064 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2066 mmio_start = pci_resource_start(pdev, 0);
2067 mmio_len = pci_resource_len(pdev, 0);
2070 hw->hw_addr = ioremap(mmio_start, mmio_len);
2074 netdev->netdev_ops = &igb_netdev_ops;
2075 igb_set_ethtool_ops(netdev);
2076 netdev->watchdog_timeo = 5 * HZ;
2078 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2080 netdev->mem_start = mmio_start;
2081 netdev->mem_end = mmio_start + mmio_len;
2083 /* PCI config space info */
2084 hw->vendor_id = pdev->vendor;
2085 hw->device_id = pdev->device;
2086 hw->revision_id = pdev->revision;
2087 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2088 hw->subsystem_device_id = pdev->subsystem_device;
2090 /* Copy the default MAC, PHY and NVM function pointers */
2091 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2092 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2093 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2094 /* Initialize skew-specific constants */
2095 err = ei->get_invariants(hw);
2099 /* setup the private structure */
2100 err = igb_sw_init(adapter);
2104 igb_get_bus_info_pcie(hw);
2106 hw->phy.autoneg_wait_to_complete = false;
2108 /* Copper options */
2109 if (hw->phy.media_type == e1000_media_type_copper) {
2110 hw->phy.mdix = AUTO_ALL_MODES;
2111 hw->phy.disable_polarity_correction = false;
2112 hw->phy.ms_type = e1000_ms_hw_default;
2115 if (igb_check_reset_block(hw))
2116 dev_info(&pdev->dev,
2117 "PHY reset is blocked due to SOL/IDER session.\n");
2119 /* features is initialized to 0 in allocation, it might have bits
2120 * set by igb_sw_init so we should use an or instead of an
2123 netdev->features |= NETIF_F_SG |
2130 NETIF_F_HW_VLAN_CTAG_RX |
2131 NETIF_F_HW_VLAN_CTAG_TX;
2133 /* copy netdev features into list of user selectable features */
2134 netdev->hw_features |= netdev->features;
2135 netdev->hw_features |= NETIF_F_RXALL;
2137 /* set this bit last since it cannot be part of hw_features */
2138 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2140 netdev->vlan_features |= NETIF_F_TSO |
2146 netdev->priv_flags |= IFF_SUPP_NOFCS;
2148 if (pci_using_dac) {
2149 netdev->features |= NETIF_F_HIGHDMA;
2150 netdev->vlan_features |= NETIF_F_HIGHDMA;
2153 if (hw->mac.type >= e1000_82576) {
2154 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2155 netdev->features |= NETIF_F_SCTP_CSUM;
2158 netdev->priv_flags |= IFF_UNICAST_FLT;
2160 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2162 /* before reading the NVM, reset the controller to put the device in a
2163 * known good starting state
2165 hw->mac.ops.reset_hw(hw);
2167 /* make sure the NVM is good , i211 parts have special NVM that
2168 * doesn't contain a checksum
2170 if (hw->mac.type != e1000_i211) {
2171 if (hw->nvm.ops.validate(hw) < 0) {
2172 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2178 /* copy the MAC address out of the NVM */
2179 if (hw->mac.ops.read_mac_addr(hw))
2180 dev_err(&pdev->dev, "NVM Read Error\n");
2182 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2184 if (!is_valid_ether_addr(netdev->dev_addr)) {
2185 dev_err(&pdev->dev, "Invalid MAC Address\n");
2190 /* get firmware version for ethtool -i */
2191 igb_set_fw_version(adapter);
2193 setup_timer(&adapter->watchdog_timer, igb_watchdog,
2194 (unsigned long) adapter);
2195 setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2196 (unsigned long) adapter);
2198 INIT_WORK(&adapter->reset_task, igb_reset_task);
2199 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2201 /* Initialize link properties that are user-changeable */
2202 adapter->fc_autoneg = true;
2203 hw->mac.autoneg = true;
2204 hw->phy.autoneg_advertised = 0x2f;
2206 hw->fc.requested_mode = e1000_fc_default;
2207 hw->fc.current_mode = e1000_fc_default;
2209 igb_validate_mdi_setting(hw);
2211 /* By default, support wake on port A */
2212 if (hw->bus.func == 0)
2213 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2215 /* Check the NVM for wake support on non-port A ports */
2216 if (hw->mac.type >= e1000_82580)
2217 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2218 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2220 else if (hw->bus.func == 1)
2221 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2223 if (eeprom_data & IGB_EEPROM_APME)
2224 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2226 /* now that we have the eeprom settings, apply the special cases where
2227 * the eeprom may be wrong or the board simply won't support wake on
2228 * lan on a particular port
2230 switch (pdev->device) {
2231 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2232 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2234 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2235 case E1000_DEV_ID_82576_FIBER:
2236 case E1000_DEV_ID_82576_SERDES:
2237 /* Wake events only supported on port A for dual fiber
2238 * regardless of eeprom setting
2240 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2241 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2243 case E1000_DEV_ID_82576_QUAD_COPPER:
2244 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2245 /* if quad port adapter, disable WoL on all but port A */
2246 if (global_quad_port_a != 0)
2247 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2249 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2250 /* Reset for multiple quad port adapters */
2251 if (++global_quad_port_a == 4)
2252 global_quad_port_a = 0;
2255 /* If the device can't wake, don't set software support */
2256 if (!device_can_wakeup(&adapter->pdev->dev))
2257 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2260 /* initialize the wol settings based on the eeprom settings */
2261 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2262 adapter->wol |= E1000_WUFC_MAG;
2264 /* Some vendors want WoL disabled by default, but still supported */
2265 if ((hw->mac.type == e1000_i350) &&
2266 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2267 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2271 device_set_wakeup_enable(&adapter->pdev->dev,
2272 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2274 /* reset the hardware with the new settings */
2277 /* Init the I2C interface */
2278 err = igb_init_i2c(adapter);
2280 dev_err(&pdev->dev, "failed to init i2c interface\n");
2284 /* let the f/w know that the h/w is now under the control of the
2286 igb_get_hw_control(adapter);
2288 strcpy(netdev->name, "eth%d");
2289 err = register_netdev(netdev);
2293 /* carrier off reporting is important to ethtool even BEFORE open */
2294 netif_carrier_off(netdev);
2296 #ifdef CONFIG_IGB_DCA
2297 if (dca_add_requester(&pdev->dev) == 0) {
2298 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2299 dev_info(&pdev->dev, "DCA enabled\n");
2300 igb_setup_dca(adapter);
2304 #ifdef CONFIG_IGB_HWMON
2305 /* Initialize the thermal sensor on i350 devices. */
2306 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2309 /* Read the NVM to determine if this i350 device supports an
2310 * external thermal sensor.
2312 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2313 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2314 adapter->ets = true;
2316 adapter->ets = false;
2317 if (igb_sysfs_init(adapter))
2319 "failed to allocate sysfs resources\n");
2321 adapter->ets = false;
2324 /* do hw tstamp init after resetting */
2325 igb_ptp_init(adapter);
2327 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2328 /* print bus type/speed/width info, not applicable to i354 */
2329 if (hw->mac.type != e1000_i354) {
2330 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2332 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2333 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2335 ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2337 (hw->bus.width == e1000_bus_width_pcie_x2) ?
2339 (hw->bus.width == e1000_bus_width_pcie_x1) ?
2340 "Width x1" : "unknown"), netdev->dev_addr);
2343 ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2345 strcpy(part_str, "Unknown");
2346 dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2347 dev_info(&pdev->dev,
2348 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2349 adapter->msix_entries ? "MSI-X" :
2350 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2351 adapter->num_rx_queues, adapter->num_tx_queues);
2352 switch (hw->mac.type) {
2356 igb_set_eee_i350(hw);
2359 if (hw->phy.media_type == e1000_media_type_copper) {
2360 if ((rd32(E1000_CTRL_EXT) &
2361 E1000_CTRL_EXT_LINK_MODE_SGMII))
2362 igb_set_eee_i354(hw);
2369 pm_runtime_put_noidle(&pdev->dev);
2373 igb_release_hw_control(adapter);
2374 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2376 if (!igb_check_reset_block(hw))
2379 if (hw->flash_address)
2380 iounmap(hw->flash_address);
2382 igb_clear_interrupt_scheme(adapter);
2383 iounmap(hw->hw_addr);
2385 free_netdev(netdev);
2387 pci_release_selected_regions(pdev,
2388 pci_select_bars(pdev, IORESOURCE_MEM));
2391 pci_disable_device(pdev);
2395 #ifdef CONFIG_PCI_IOV
2396 static int igb_disable_sriov(struct pci_dev *pdev)
2398 struct net_device *netdev = pci_get_drvdata(pdev);
2399 struct igb_adapter *adapter = netdev_priv(netdev);
2400 struct e1000_hw *hw = &adapter->hw;
2402 /* reclaim resources allocated to VFs */
2403 if (adapter->vf_data) {
2404 /* disable iov and allow time for transactions to clear */
2405 if (igb_vfs_are_assigned(adapter)) {
2406 dev_warn(&pdev->dev,
2407 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2410 pci_disable_sriov(pdev);
2414 kfree(adapter->vf_data);
2415 adapter->vf_data = NULL;
2416 adapter->vfs_allocated_count = 0;
2417 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2420 dev_info(&pdev->dev, "IOV Disabled\n");
2422 /* Re-enable DMA Coalescing flag since IOV is turned off */
2423 adapter->flags |= IGB_FLAG_DMAC;
2429 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2431 struct net_device *netdev = pci_get_drvdata(pdev);
2432 struct igb_adapter *adapter = netdev_priv(netdev);
2433 int old_vfs = pci_num_vf(pdev);
2439 else if (old_vfs && old_vfs == num_vfs)
2441 else if (old_vfs && old_vfs != num_vfs)
2442 err = igb_disable_sriov(pdev);
2452 adapter->vfs_allocated_count = num_vfs;
2454 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2455 sizeof(struct vf_data_storage), GFP_KERNEL);
2457 /* if allocation failed then we do not support SR-IOV */
2458 if (!adapter->vf_data) {
2459 adapter->vfs_allocated_count = 0;
2461 "Unable to allocate memory for VF Data Storage\n");
2466 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2470 dev_info(&pdev->dev, "%d VFs allocated\n",
2471 adapter->vfs_allocated_count);
2472 for (i = 0; i < adapter->vfs_allocated_count; i++)
2473 igb_vf_configure(adapter, i);
2475 /* DMA Coalescing is not supported in IOV mode. */
2476 adapter->flags &= ~IGB_FLAG_DMAC;
2480 kfree(adapter->vf_data);
2481 adapter->vf_data = NULL;
2482 adapter->vfs_allocated_count = 0;
2489 * igb_remove_i2c - Cleanup I2C interface
2490 * @adapter: pointer to adapter structure
2492 static void igb_remove_i2c(struct igb_adapter *adapter)
2494 /* free the adapter bus structure */
2495 i2c_del_adapter(&adapter->i2c_adap);
2499 * igb_remove - Device Removal Routine
2500 * @pdev: PCI device information struct
2502 * igb_remove is called by the PCI subsystem to alert the driver
2503 * that it should release a PCI device. The could be caused by a
2504 * Hot-Plug event, or because the driver is going to be removed from
2507 static void igb_remove(struct pci_dev *pdev)
2509 struct net_device *netdev = pci_get_drvdata(pdev);
2510 struct igb_adapter *adapter = netdev_priv(netdev);
2511 struct e1000_hw *hw = &adapter->hw;
2513 pm_runtime_get_noresume(&pdev->dev);
2514 #ifdef CONFIG_IGB_HWMON
2515 igb_sysfs_exit(adapter);
2517 igb_remove_i2c(adapter);
2518 igb_ptp_stop(adapter);
2519 /* The watchdog timer may be rescheduled, so explicitly
2520 * disable watchdog from being rescheduled.
2522 set_bit(__IGB_DOWN, &adapter->state);
2523 del_timer_sync(&adapter->watchdog_timer);
2524 del_timer_sync(&adapter->phy_info_timer);
2526 cancel_work_sync(&adapter->reset_task);
2527 cancel_work_sync(&adapter->watchdog_task);
2529 #ifdef CONFIG_IGB_DCA
2530 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2531 dev_info(&pdev->dev, "DCA disabled\n");
2532 dca_remove_requester(&pdev->dev);
2533 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2534 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2538 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2539 * would have already happened in close and is redundant.
2541 igb_release_hw_control(adapter);
2543 unregister_netdev(netdev);
2545 igb_clear_interrupt_scheme(adapter);
2547 #ifdef CONFIG_PCI_IOV
2548 igb_disable_sriov(pdev);
2551 iounmap(hw->hw_addr);
2552 if (hw->flash_address)
2553 iounmap(hw->flash_address);
2554 pci_release_selected_regions(pdev,
2555 pci_select_bars(pdev, IORESOURCE_MEM));
2557 kfree(adapter->shadow_vfta);
2558 free_netdev(netdev);
2560 pci_disable_pcie_error_reporting(pdev);
2562 pci_disable_device(pdev);
2566 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2567 * @adapter: board private structure to initialize
2569 * This function initializes the vf specific data storage and then attempts to
2570 * allocate the VFs. The reason for ordering it this way is because it is much
2571 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2572 * the memory for the VFs.
2574 static void igb_probe_vfs(struct igb_adapter *adapter)
2576 #ifdef CONFIG_PCI_IOV
2577 struct pci_dev *pdev = adapter->pdev;
2578 struct e1000_hw *hw = &adapter->hw;
2580 /* Virtualization features not supported on i210 family. */
2581 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2584 pci_sriov_set_totalvfs(pdev, 7);
2585 igb_enable_sriov(pdev, max_vfs);
2587 #endif /* CONFIG_PCI_IOV */
2590 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2592 struct e1000_hw *hw = &adapter->hw;
2595 /* Determine the maximum number of RSS queues supported. */
2596 switch (hw->mac.type) {
2598 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2602 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2605 /* I350 cannot do RSS and SR-IOV at the same time */
2606 if (!!adapter->vfs_allocated_count) {
2612 if (!!adapter->vfs_allocated_count) {
2620 max_rss_queues = IGB_MAX_RX_QUEUES;
2624 adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2626 /* Determine if we need to pair queues. */
2627 switch (hw->mac.type) {
2630 /* Device supports enough interrupts without queue pairing. */
2633 /* If VFs are going to be allocated with RSS queues then we
2634 * should pair the queues in order to conserve interrupts due
2635 * to limited supply.
2637 if ((adapter->rss_queues > 1) &&
2638 (adapter->vfs_allocated_count > 6))
2639 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2646 /* If rss_queues > half of max_rss_queues, pair the queues in
2647 * order to conserve interrupts due to limited supply.
2649 if (adapter->rss_queues > (max_rss_queues / 2))
2650 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2656 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2657 * @adapter: board private structure to initialize
2659 * igb_sw_init initializes the Adapter private data structure.
2660 * Fields are initialized based on PCI device information and
2661 * OS network device settings (MTU size).
2663 static int igb_sw_init(struct igb_adapter *adapter)
2665 struct e1000_hw *hw = &adapter->hw;
2666 struct net_device *netdev = adapter->netdev;
2667 struct pci_dev *pdev = adapter->pdev;
2669 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2671 /* set default ring sizes */
2672 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2673 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2675 /* set default ITR values */
2676 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2677 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2679 /* set default work limits */
2680 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2682 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2684 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2686 spin_lock_init(&adapter->stats64_lock);
2687 #ifdef CONFIG_PCI_IOV
2688 switch (hw->mac.type) {
2692 dev_warn(&pdev->dev,
2693 "Maximum of 7 VFs per PF, using max\n");
2694 max_vfs = adapter->vfs_allocated_count = 7;
2696 adapter->vfs_allocated_count = max_vfs;
2697 if (adapter->vfs_allocated_count)
2698 dev_warn(&pdev->dev,
2699 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2704 #endif /* CONFIG_PCI_IOV */
2706 igb_init_queue_configuration(adapter);
2708 /* Setup and initialize a copy of the hw vlan table array */
2709 adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2712 /* This call may decrease the number of queues */
2713 if (igb_init_interrupt_scheme(adapter, true)) {
2714 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2718 igb_probe_vfs(adapter);
2720 /* Explicitly disable IRQ since the NIC can be in any state. */
2721 igb_irq_disable(adapter);
2723 if (hw->mac.type >= e1000_i350)
2724 adapter->flags &= ~IGB_FLAG_DMAC;
2726 set_bit(__IGB_DOWN, &adapter->state);
2731 * igb_open - Called when a network interface is made active
2732 * @netdev: network interface device structure
2734 * Returns 0 on success, negative value on failure
2736 * The open entry point is called when a network interface is made
2737 * active by the system (IFF_UP). At this point all resources needed
2738 * for transmit and receive operations are allocated, the interrupt
2739 * handler is registered with the OS, the watchdog timer is started,
2740 * and the stack is notified that the interface is ready.
2742 static int __igb_open(struct net_device *netdev, bool resuming)
2744 struct igb_adapter *adapter = netdev_priv(netdev);
2745 struct e1000_hw *hw = &adapter->hw;
2746 struct pci_dev *pdev = adapter->pdev;
2750 /* disallow open during test */
2751 if (test_bit(__IGB_TESTING, &adapter->state)) {
2757 pm_runtime_get_sync(&pdev->dev);
2759 netif_carrier_off(netdev);
2761 /* allocate transmit descriptors */
2762 err = igb_setup_all_tx_resources(adapter);
2766 /* allocate receive descriptors */
2767 err = igb_setup_all_rx_resources(adapter);
2771 igb_power_up_link(adapter);
2773 /* before we allocate an interrupt, we must be ready to handle it.
2774 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2775 * as soon as we call pci_request_irq, so we have to setup our
2776 * clean_rx handler before we do so.
2778 igb_configure(adapter);
2780 err = igb_request_irq(adapter);
2784 /* Notify the stack of the actual queue counts. */
2785 err = netif_set_real_num_tx_queues(adapter->netdev,
2786 adapter->num_tx_queues);
2788 goto err_set_queues;
2790 err = netif_set_real_num_rx_queues(adapter->netdev,
2791 adapter->num_rx_queues);
2793 goto err_set_queues;
2795 /* From here on the code is the same as igb_up() */
2796 clear_bit(__IGB_DOWN, &adapter->state);
2798 for (i = 0; i < adapter->num_q_vectors; i++)
2799 napi_enable(&(adapter->q_vector[i]->napi));
2801 /* Clear any pending interrupts. */
2804 igb_irq_enable(adapter);
2806 /* notify VFs that reset has been completed */
2807 if (adapter->vfs_allocated_count) {
2808 u32 reg_data = rd32(E1000_CTRL_EXT);
2809 reg_data |= E1000_CTRL_EXT_PFRSTD;
2810 wr32(E1000_CTRL_EXT, reg_data);
2813 netif_tx_start_all_queues(netdev);
2816 pm_runtime_put(&pdev->dev);
2818 /* start the watchdog. */
2819 hw->mac.get_link_status = 1;
2820 schedule_work(&adapter->watchdog_task);
2825 igb_free_irq(adapter);
2827 igb_release_hw_control(adapter);
2828 igb_power_down_link(adapter);
2829 igb_free_all_rx_resources(adapter);
2831 igb_free_all_tx_resources(adapter);
2835 pm_runtime_put(&pdev->dev);
2840 static int igb_open(struct net_device *netdev)
2842 return __igb_open(netdev, false);
2846 * igb_close - Disables a network interface
2847 * @netdev: network interface device structure
2849 * Returns 0, this is not allowed to fail
2851 * The close entry point is called when an interface is de-activated
2852 * by the OS. The hardware is still under the driver's control, but
2853 * needs to be disabled. A global MAC reset is issued to stop the
2854 * hardware, and all transmit and receive resources are freed.
2856 static int __igb_close(struct net_device *netdev, bool suspending)
2858 struct igb_adapter *adapter = netdev_priv(netdev);
2859 struct pci_dev *pdev = adapter->pdev;
2861 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2864 pm_runtime_get_sync(&pdev->dev);
2867 igb_free_irq(adapter);
2869 igb_free_all_tx_resources(adapter);
2870 igb_free_all_rx_resources(adapter);
2873 pm_runtime_put_sync(&pdev->dev);
2877 static int igb_close(struct net_device *netdev)
2879 return __igb_close(netdev, false);
2883 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2884 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2886 * Return 0 on success, negative on failure
2888 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2890 struct device *dev = tx_ring->dev;
2893 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2895 tx_ring->tx_buffer_info = vzalloc(size);
2896 if (!tx_ring->tx_buffer_info)
2899 /* round up to nearest 4K */
2900 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2901 tx_ring->size = ALIGN(tx_ring->size, 4096);
2903 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2904 &tx_ring->dma, GFP_KERNEL);
2908 tx_ring->next_to_use = 0;
2909 tx_ring->next_to_clean = 0;
2914 vfree(tx_ring->tx_buffer_info);
2915 tx_ring->tx_buffer_info = NULL;
2916 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2921 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2922 * (Descriptors) for all queues
2923 * @adapter: board private structure
2925 * Return 0 on success, negative on failure
2927 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2929 struct pci_dev *pdev = adapter->pdev;
2932 for (i = 0; i < adapter->num_tx_queues; i++) {
2933 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2936 "Allocation for Tx Queue %u failed\n", i);
2937 for (i--; i >= 0; i--)
2938 igb_free_tx_resources(adapter->tx_ring[i]);
2947 * igb_setup_tctl - configure the transmit control registers
2948 * @adapter: Board private structure
2950 void igb_setup_tctl(struct igb_adapter *adapter)
2952 struct e1000_hw *hw = &adapter->hw;
2955 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2956 wr32(E1000_TXDCTL(0), 0);
2958 /* Program the Transmit Control Register */
2959 tctl = rd32(E1000_TCTL);
2960 tctl &= ~E1000_TCTL_CT;
2961 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2962 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2964 igb_config_collision_dist(hw);
2966 /* Enable transmits */
2967 tctl |= E1000_TCTL_EN;
2969 wr32(E1000_TCTL, tctl);
2973 * igb_configure_tx_ring - Configure transmit ring after Reset
2974 * @adapter: board private structure
2975 * @ring: tx ring to configure
2977 * Configure a transmit ring after a reset.
2979 void igb_configure_tx_ring(struct igb_adapter *adapter,
2980 struct igb_ring *ring)
2982 struct e1000_hw *hw = &adapter->hw;
2984 u64 tdba = ring->dma;
2985 int reg_idx = ring->reg_idx;
2987 /* disable the queue */
2988 wr32(E1000_TXDCTL(reg_idx), 0);
2992 wr32(E1000_TDLEN(reg_idx),
2993 ring->count * sizeof(union e1000_adv_tx_desc));
2994 wr32(E1000_TDBAL(reg_idx),
2995 tdba & 0x00000000ffffffffULL);
2996 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2998 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2999 wr32(E1000_TDH(reg_idx), 0);
3000 writel(0, ring->tail);
3002 txdctl |= IGB_TX_PTHRESH;
3003 txdctl |= IGB_TX_HTHRESH << 8;
3004 txdctl |= IGB_TX_WTHRESH << 16;
3006 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3007 wr32(E1000_TXDCTL(reg_idx), txdctl);
3011 * igb_configure_tx - Configure transmit Unit after Reset
3012 * @adapter: board private structure
3014 * Configure the Tx unit of the MAC after a reset.
3016 static void igb_configure_tx(struct igb_adapter *adapter)
3020 for (i = 0; i < adapter->num_tx_queues; i++)
3021 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3025 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3026 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3028 * Returns 0 on success, negative on failure
3030 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3032 struct device *dev = rx_ring->dev;
3035 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3037 rx_ring->rx_buffer_info = vzalloc(size);
3038 if (!rx_ring->rx_buffer_info)
3041 /* Round up to nearest 4K */
3042 rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3043 rx_ring->size = ALIGN(rx_ring->size, 4096);
3045 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3046 &rx_ring->dma, GFP_KERNEL);
3050 rx_ring->next_to_alloc = 0;
3051 rx_ring->next_to_clean = 0;
3052 rx_ring->next_to_use = 0;
3057 vfree(rx_ring->rx_buffer_info);
3058 rx_ring->rx_buffer_info = NULL;
3059 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3064 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3065 * (Descriptors) for all queues
3066 * @adapter: board private structure
3068 * Return 0 on success, negative on failure
3070 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3072 struct pci_dev *pdev = adapter->pdev;
3075 for (i = 0; i < adapter->num_rx_queues; i++) {
3076 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3079 "Allocation for Rx Queue %u failed\n", i);
3080 for (i--; i >= 0; i--)
3081 igb_free_rx_resources(adapter->rx_ring[i]);
3090 * igb_setup_mrqc - configure the multiple receive queue control registers
3091 * @adapter: Board private structure
3093 static void igb_setup_mrqc(struct igb_adapter *adapter)
3095 struct e1000_hw *hw = &adapter->hw;
3097 u32 j, num_rx_queues, shift = 0;
3098 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3099 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3100 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3103 /* Fill out hash function seeds */
3104 for (j = 0; j < 10; j++)
3105 wr32(E1000_RSSRK(j), rsskey[j]);
3107 num_rx_queues = adapter->rss_queues;
3109 switch (hw->mac.type) {
3114 /* 82576 supports 2 RSS queues for SR-IOV */
3115 if (adapter->vfs_allocated_count) {
3124 /* Populate the indirection table 4 entries at a time. To do this
3125 * we are generating the results for n and n+2 and then interleaving
3126 * those with the results with n+1 and n+3.
3128 for (j = 0; j < 32; j++) {
3129 /* first pass generates n and n+2 */
3130 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3131 u32 reta = (base & 0x07800780) >> (7 - shift);
3133 /* second pass generates n+1 and n+3 */
3134 base += 0x00010001 * num_rx_queues;
3135 reta |= (base & 0x07800780) << (1 + shift);
3137 wr32(E1000_RETA(j), reta);
3140 /* Disable raw packet checksumming so that RSS hash is placed in
3141 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3142 * offloads as they are enabled by default
3144 rxcsum = rd32(E1000_RXCSUM);
3145 rxcsum |= E1000_RXCSUM_PCSD;
3147 if (adapter->hw.mac.type >= e1000_82576)
3148 /* Enable Receive Checksum Offload for SCTP */
3149 rxcsum |= E1000_RXCSUM_CRCOFL;
3151 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3152 wr32(E1000_RXCSUM, rxcsum);
3154 /* Generate RSS hash based on packet types, TCP/UDP
3155 * port numbers and/or IPv4/v6 src and dst addresses
3157 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3158 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3159 E1000_MRQC_RSS_FIELD_IPV6 |
3160 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3161 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3163 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3164 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3165 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3166 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3168 /* If VMDq is enabled then we set the appropriate mode for that, else
3169 * we default to RSS so that an RSS hash is calculated per packet even
3170 * if we are only using one queue
3172 if (adapter->vfs_allocated_count) {
3173 if (hw->mac.type > e1000_82575) {
3174 /* Set the default pool for the PF's first queue */
3175 u32 vtctl = rd32(E1000_VT_CTL);
3176 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3177 E1000_VT_CTL_DISABLE_DEF_POOL);
3178 vtctl |= adapter->vfs_allocated_count <<
3179 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3180 wr32(E1000_VT_CTL, vtctl);
3182 if (adapter->rss_queues > 1)
3183 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3185 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3187 if (hw->mac.type != e1000_i211)
3188 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3190 igb_vmm_control(adapter);
3192 wr32(E1000_MRQC, mrqc);
3196 * igb_setup_rctl - configure the receive control registers
3197 * @adapter: Board private structure
3199 void igb_setup_rctl(struct igb_adapter *adapter)
3201 struct e1000_hw *hw = &adapter->hw;
3204 rctl = rd32(E1000_RCTL);
3206 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3207 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3209 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3210 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3212 /* enable stripping of CRC. It's unlikely this will break BMC
3213 * redirection as it did with e1000. Newer features require
3214 * that the HW strips the CRC.
3216 rctl |= E1000_RCTL_SECRC;
3218 /* disable store bad packets and clear size bits. */
3219 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3221 /* enable LPE to prevent packets larger than max_frame_size */
3222 rctl |= E1000_RCTL_LPE;
3224 /* disable queue 0 to prevent tail write w/o re-config */
3225 wr32(E1000_RXDCTL(0), 0);
3227 /* Attention!!! For SR-IOV PF driver operations you must enable
3228 * queue drop for all VF and PF queues to prevent head of line blocking
3229 * if an un-trusted VF does not provide descriptors to hardware.
3231 if (adapter->vfs_allocated_count) {
3232 /* set all queue drop enable bits */
3233 wr32(E1000_QDE, ALL_QUEUES);
3236 /* This is useful for sniffing bad packets. */
3237 if (adapter->netdev->features & NETIF_F_RXALL) {
3238 /* UPE and MPE will be handled by normal PROMISC logic
3239 * in e1000e_set_rx_mode
3241 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3242 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3243 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3245 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3246 E1000_RCTL_DPF | /* Allow filtered pause */
3247 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3248 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3249 * and that breaks VLANs.
3253 wr32(E1000_RCTL, rctl);
3256 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3259 struct e1000_hw *hw = &adapter->hw;
3262 /* if it isn't the PF check to see if VFs are enabled and
3263 * increase the size to support vlan tags
3265 if (vfn < adapter->vfs_allocated_count &&
3266 adapter->vf_data[vfn].vlans_enabled)
3267 size += VLAN_TAG_SIZE;
3269 vmolr = rd32(E1000_VMOLR(vfn));
3270 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3271 vmolr |= size | E1000_VMOLR_LPE;
3272 wr32(E1000_VMOLR(vfn), vmolr);
3278 * igb_rlpml_set - set maximum receive packet size
3279 * @adapter: board private structure
3281 * Configure maximum receivable packet size.
3283 static void igb_rlpml_set(struct igb_adapter *adapter)
3285 u32 max_frame_size = adapter->max_frame_size;
3286 struct e1000_hw *hw = &adapter->hw;
3287 u16 pf_id = adapter->vfs_allocated_count;
3290 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3291 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3292 * to our max jumbo frame size, in case we need to enable
3293 * jumbo frames on one of the rings later.
3294 * This will not pass over-length frames into the default
3295 * queue because it's gated by the VMOLR.RLPML.
3297 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3300 wr32(E1000_RLPML, max_frame_size);
3303 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3306 struct e1000_hw *hw = &adapter->hw;
3309 /* This register exists only on 82576 and newer so if we are older then
3310 * we should exit and do nothing
3312 if (hw->mac.type < e1000_82576)
3315 vmolr = rd32(E1000_VMOLR(vfn));
3316 vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3318 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3320 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3322 /* clear all bits that might not be set */
3323 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3325 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3326 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3327 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3330 if (vfn <= adapter->vfs_allocated_count)
3331 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3333 wr32(E1000_VMOLR(vfn), vmolr);
3337 * igb_configure_rx_ring - Configure a receive ring after Reset
3338 * @adapter: board private structure
3339 * @ring: receive ring to be configured
3341 * Configure the Rx unit of the MAC after a reset.
3343 void igb_configure_rx_ring(struct igb_adapter *adapter,
3344 struct igb_ring *ring)
3346 struct e1000_hw *hw = &adapter->hw;
3347 u64 rdba = ring->dma;
3348 int reg_idx = ring->reg_idx;
3349 u32 srrctl = 0, rxdctl = 0;
3351 /* disable the queue */
3352 wr32(E1000_RXDCTL(reg_idx), 0);
3354 /* Set DMA base address registers */
3355 wr32(E1000_RDBAL(reg_idx),
3356 rdba & 0x00000000ffffffffULL);
3357 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3358 wr32(E1000_RDLEN(reg_idx),
3359 ring->count * sizeof(union e1000_adv_rx_desc));
3361 /* initialize head and tail */
3362 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3363 wr32(E1000_RDH(reg_idx), 0);
3364 writel(0, ring->tail);
3366 /* set descriptor configuration */
3367 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3368 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3369 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3370 if (hw->mac.type >= e1000_82580)
3371 srrctl |= E1000_SRRCTL_TIMESTAMP;
3372 /* Only set Drop Enable if we are supporting multiple queues */
3373 if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3374 srrctl |= E1000_SRRCTL_DROP_EN;
3376 wr32(E1000_SRRCTL(reg_idx), srrctl);
3378 /* set filtering for VMDQ pools */
3379 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3381 rxdctl |= IGB_RX_PTHRESH;
3382 rxdctl |= IGB_RX_HTHRESH << 8;
3383 rxdctl |= IGB_RX_WTHRESH << 16;
3385 /* enable receive descriptor fetching */
3386 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3387 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3391 * igb_configure_rx - Configure receive Unit after Reset
3392 * @adapter: board private structure
3394 * Configure the Rx unit of the MAC after a reset.
3396 static void igb_configure_rx(struct igb_adapter *adapter)
3400 /* set UTA to appropriate mode */
3401 igb_set_uta(adapter);
3403 /* set the correct pool for the PF default MAC address in entry 0 */
3404 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3405 adapter->vfs_allocated_count);
3407 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3408 * the Base and Length of the Rx Descriptor Ring
3410 for (i = 0; i < adapter->num_rx_queues; i++)
3411 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3415 * igb_free_tx_resources - Free Tx Resources per Queue
3416 * @tx_ring: Tx descriptor ring for a specific queue
3418 * Free all transmit software resources
3420 void igb_free_tx_resources(struct igb_ring *tx_ring)
3422 igb_clean_tx_ring(tx_ring);
3424 vfree(tx_ring->tx_buffer_info);
3425 tx_ring->tx_buffer_info = NULL;
3427 /* if not set, then don't free */
3431 dma_free_coherent(tx_ring->dev, tx_ring->size,
3432 tx_ring->desc, tx_ring->dma);
3434 tx_ring->desc = NULL;
3438 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3439 * @adapter: board private structure
3441 * Free all transmit software resources
3443 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3447 for (i = 0; i < adapter->num_tx_queues; i++)
3448 igb_free_tx_resources(adapter->tx_ring[i]);
3451 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3452 struct igb_tx_buffer *tx_buffer)
3454 if (tx_buffer->skb) {
3455 dev_kfree_skb_any(tx_buffer->skb);
3456 if (dma_unmap_len(tx_buffer, len))
3457 dma_unmap_single(ring->dev,
3458 dma_unmap_addr(tx_buffer, dma),
3459 dma_unmap_len(tx_buffer, len),
3461 } else if (dma_unmap_len(tx_buffer, len)) {
3462 dma_unmap_page(ring->dev,
3463 dma_unmap_addr(tx_buffer, dma),
3464 dma_unmap_len(tx_buffer, len),
3467 tx_buffer->next_to_watch = NULL;
3468 tx_buffer->skb = NULL;
3469 dma_unmap_len_set(tx_buffer, len, 0);
3470 /* buffer_info must be completely set up in the transmit path */
3474 * igb_clean_tx_ring - Free Tx Buffers
3475 * @tx_ring: ring to be cleaned
3477 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3479 struct igb_tx_buffer *buffer_info;
3483 if (!tx_ring->tx_buffer_info)
3485 /* Free all the Tx ring sk_buffs */
3487 for (i = 0; i < tx_ring->count; i++) {
3488 buffer_info = &tx_ring->tx_buffer_info[i];
3489 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3492 netdev_tx_reset_queue(txring_txq(tx_ring));
3494 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3495 memset(tx_ring->tx_buffer_info, 0, size);
3497 /* Zero out the descriptor ring */
3498 memset(tx_ring->desc, 0, tx_ring->size);
3500 tx_ring->next_to_use = 0;
3501 tx_ring->next_to_clean = 0;
3505 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3506 * @adapter: board private structure
3508 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3512 for (i = 0; i < adapter->num_tx_queues; i++)
3513 igb_clean_tx_ring(adapter->tx_ring[i]);
3517 * igb_free_rx_resources - Free Rx Resources
3518 * @rx_ring: ring to clean the resources from
3520 * Free all receive software resources
3522 void igb_free_rx_resources(struct igb_ring *rx_ring)
3524 igb_clean_rx_ring(rx_ring);
3526 vfree(rx_ring->rx_buffer_info);
3527 rx_ring->rx_buffer_info = NULL;
3529 /* if not set, then don't free */
3533 dma_free_coherent(rx_ring->dev, rx_ring->size,
3534 rx_ring->desc, rx_ring->dma);
3536 rx_ring->desc = NULL;
3540 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3541 * @adapter: board private structure
3543 * Free all receive software resources
3545 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3549 for (i = 0; i < adapter->num_rx_queues; i++)
3550 igb_free_rx_resources(adapter->rx_ring[i]);
3554 * igb_clean_rx_ring - Free Rx Buffers per Queue
3555 * @rx_ring: ring to free buffers from
3557 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3563 dev_kfree_skb(rx_ring->skb);
3564 rx_ring->skb = NULL;
3566 if (!rx_ring->rx_buffer_info)
3569 /* Free all the Rx ring sk_buffs */
3570 for (i = 0; i < rx_ring->count; i++) {
3571 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3573 if (!buffer_info->page)
3576 dma_unmap_page(rx_ring->dev,
3580 __free_page(buffer_info->page);
3582 buffer_info->page = NULL;
3585 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3586 memset(rx_ring->rx_buffer_info, 0, size);
3588 /* Zero out the descriptor ring */
3589 memset(rx_ring->desc, 0, rx_ring->size);
3591 rx_ring->next_to_alloc = 0;
3592 rx_ring->next_to_clean = 0;
3593 rx_ring->next_to_use = 0;
3597 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3598 * @adapter: board private structure
3600 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3604 for (i = 0; i < adapter->num_rx_queues; i++)
3605 igb_clean_rx_ring(adapter->rx_ring[i]);
3609 * igb_set_mac - Change the Ethernet Address of the NIC
3610 * @netdev: network interface device structure
3611 * @p: pointer to an address structure
3613 * Returns 0 on success, negative on failure
3615 static int igb_set_mac(struct net_device *netdev, void *p)
3617 struct igb_adapter *adapter = netdev_priv(netdev);
3618 struct e1000_hw *hw = &adapter->hw;
3619 struct sockaddr *addr = p;
3621 if (!is_valid_ether_addr(addr->sa_data))
3622 return -EADDRNOTAVAIL;
3624 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3625 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3627 /* set the correct pool for the new PF MAC address in entry 0 */
3628 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3629 adapter->vfs_allocated_count);
3635 * igb_write_mc_addr_list - write multicast addresses to MTA
3636 * @netdev: network interface device structure
3638 * Writes multicast address list to the MTA hash table.
3639 * Returns: -ENOMEM on failure
3640 * 0 on no addresses written
3641 * X on writing X addresses to MTA
3643 static int igb_write_mc_addr_list(struct net_device *netdev)
3645 struct igb_adapter *adapter = netdev_priv(netdev);
3646 struct e1000_hw *hw = &adapter->hw;
3647 struct netdev_hw_addr *ha;
3651 if (netdev_mc_empty(netdev)) {
3652 /* nothing to program, so clear mc list */
3653 igb_update_mc_addr_list(hw, NULL, 0);
3654 igb_restore_vf_multicasts(adapter);
3658 mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3662 /* The shared function expects a packed array of only addresses. */
3664 netdev_for_each_mc_addr(ha, netdev)
3665 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3667 igb_update_mc_addr_list(hw, mta_list, i);
3670 return netdev_mc_count(netdev);
3674 * igb_write_uc_addr_list - write unicast addresses to RAR table
3675 * @netdev: network interface device structure
3677 * Writes unicast address list to the RAR table.
3678 * Returns: -ENOMEM on failure/insufficient address space
3679 * 0 on no addresses written
3680 * X on writing X addresses to the RAR table
3682 static int igb_write_uc_addr_list(struct net_device *netdev)
3684 struct igb_adapter *adapter = netdev_priv(netdev);
3685 struct e1000_hw *hw = &adapter->hw;
3686 unsigned int vfn = adapter->vfs_allocated_count;
3687 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3690 /* return ENOMEM indicating insufficient memory for addresses */
3691 if (netdev_uc_count(netdev) > rar_entries)
3694 if (!netdev_uc_empty(netdev) && rar_entries) {
3695 struct netdev_hw_addr *ha;
3697 netdev_for_each_uc_addr(ha, netdev) {
3700 igb_rar_set_qsel(adapter, ha->addr,
3706 /* write the addresses in reverse order to avoid write combining */
3707 for (; rar_entries > 0 ; rar_entries--) {
3708 wr32(E1000_RAH(rar_entries), 0);
3709 wr32(E1000_RAL(rar_entries), 0);
3717 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3718 * @netdev: network interface device structure
3720 * The set_rx_mode entry point is called whenever the unicast or multicast
3721 * address lists or the network interface flags are updated. This routine is
3722 * responsible for configuring the hardware for proper unicast, multicast,
3723 * promiscuous mode, and all-multi behavior.
3725 static void igb_set_rx_mode(struct net_device *netdev)
3727 struct igb_adapter *adapter = netdev_priv(netdev);
3728 struct e1000_hw *hw = &adapter->hw;
3729 unsigned int vfn = adapter->vfs_allocated_count;
3730 u32 rctl, vmolr = 0;
3733 /* Check for Promiscuous and All Multicast modes */
3734 rctl = rd32(E1000_RCTL);
3736 /* clear the effected bits */
3737 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3739 if (netdev->flags & IFF_PROMISC) {
3740 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3741 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3743 if (netdev->flags & IFF_ALLMULTI) {
3744 rctl |= E1000_RCTL_MPE;
3745 vmolr |= E1000_VMOLR_MPME;
3747 /* Write addresses to the MTA, if the attempt fails
3748 * then we should just turn on promiscuous mode so
3749 * that we can at least receive multicast traffic
3751 count = igb_write_mc_addr_list(netdev);
3753 rctl |= E1000_RCTL_MPE;
3754 vmolr |= E1000_VMOLR_MPME;
3756 vmolr |= E1000_VMOLR_ROMPE;
3759 /* Write addresses to available RAR registers, if there is not
3760 * sufficient space to store all the addresses then enable
3761 * unicast promiscuous mode
3763 count = igb_write_uc_addr_list(netdev);
3765 rctl |= E1000_RCTL_UPE;
3766 vmolr |= E1000_VMOLR_ROPE;
3768 rctl |= E1000_RCTL_VFE;
3770 wr32(E1000_RCTL, rctl);
3772 /* In order to support SR-IOV and eventually VMDq it is necessary to set
3773 * the VMOLR to enable the appropriate modes. Without this workaround
3774 * we will have issues with VLAN tag stripping not being done for frames
3775 * that are only arriving because we are the default pool
3777 if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3780 vmolr |= rd32(E1000_VMOLR(vfn)) &
3781 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3782 wr32(E1000_VMOLR(vfn), vmolr);
3783 igb_restore_vf_multicasts(adapter);
3786 static void igb_check_wvbr(struct igb_adapter *adapter)
3788 struct e1000_hw *hw = &adapter->hw;
3791 switch (hw->mac.type) {
3794 if (!(wvbr = rd32(E1000_WVBR)))
3801 adapter->wvbr |= wvbr;
3804 #define IGB_STAGGERED_QUEUE_OFFSET 8
3806 static void igb_spoof_check(struct igb_adapter *adapter)
3813 for(j = 0; j < adapter->vfs_allocated_count; j++) {
3814 if (adapter->wvbr & (1 << j) ||
3815 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3816 dev_warn(&adapter->pdev->dev,
3817 "Spoof event(s) detected on VF %d\n", j);
3820 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3825 /* Need to wait a few seconds after link up to get diagnostic information from
3828 static void igb_update_phy_info(unsigned long data)
3830 struct igb_adapter *adapter = (struct igb_adapter *) data;
3831 igb_get_phy_info(&adapter->hw);
3835 * igb_has_link - check shared code for link and determine up/down
3836 * @adapter: pointer to driver private info
3838 bool igb_has_link(struct igb_adapter *adapter)
3840 struct e1000_hw *hw = &adapter->hw;
3841 bool link_active = false;
3844 /* get_link_status is set on LSC (link status) interrupt or
3845 * rx sequence error interrupt. get_link_status will stay
3846 * false until the e1000_check_for_link establishes link
3847 * for copper adapters ONLY
3849 switch (hw->phy.media_type) {
3850 case e1000_media_type_copper:
3851 if (hw->mac.get_link_status) {
3852 ret_val = hw->mac.ops.check_for_link(hw);
3853 link_active = !hw->mac.get_link_status;
3858 case e1000_media_type_internal_serdes:
3859 ret_val = hw->mac.ops.check_for_link(hw);
3860 link_active = hw->mac.serdes_has_link;
3863 case e1000_media_type_unknown:
3870 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3873 u32 ctrl_ext, thstat;
3875 /* check for thermal sensor event on i350 copper only */
3876 if (hw->mac.type == e1000_i350) {
3877 thstat = rd32(E1000_THSTAT);
3878 ctrl_ext = rd32(E1000_CTRL_EXT);
3880 if ((hw->phy.media_type == e1000_media_type_copper) &&
3881 !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3882 ret = !!(thstat & event);
3889 * igb_watchdog - Timer Call-back
3890 * @data: pointer to adapter cast into an unsigned long
3892 static void igb_watchdog(unsigned long data)
3894 struct igb_adapter *adapter = (struct igb_adapter *)data;
3895 /* Do the rest outside of interrupt context */
3896 schedule_work(&adapter->watchdog_task);
3899 static void igb_watchdog_task(struct work_struct *work)
3901 struct igb_adapter *adapter = container_of(work,
3904 struct e1000_hw *hw = &adapter->hw;
3905 struct net_device *netdev = adapter->netdev;
3909 link = igb_has_link(adapter);
3911 /* Cancel scheduled suspend requests. */
3912 pm_runtime_resume(netdev->dev.parent);
3914 if (!netif_carrier_ok(netdev)) {
3916 hw->mac.ops.get_speed_and_duplex(hw,
3917 &adapter->link_speed,
3918 &adapter->link_duplex);
3920 ctrl = rd32(E1000_CTRL);
3921 /* Links status message must follow this format */
3922 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3923 "Duplex, Flow Control: %s\n",
3925 adapter->link_speed,
3926 adapter->link_duplex == FULL_DUPLEX ?
3928 (ctrl & E1000_CTRL_TFCE) &&
3929 (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3930 (ctrl & E1000_CTRL_RFCE) ? "RX" :
3931 (ctrl & E1000_CTRL_TFCE) ? "TX" : "None");
3933 /* check for thermal sensor event */
3934 if (igb_thermal_sensor_event(hw,
3935 E1000_THSTAT_LINK_THROTTLE)) {
3936 netdev_info(netdev, "The network adapter link "
3937 "speed was downshifted because it "
3941 /* adjust timeout factor according to speed/duplex */
3942 adapter->tx_timeout_factor = 1;
3943 switch (adapter->link_speed) {
3945 adapter->tx_timeout_factor = 14;
3948 /* maybe add some timeout factor ? */
3952 netif_carrier_on(netdev);
3954 igb_ping_all_vfs(adapter);
3955 igb_check_vf_rate_limit(adapter);
3957 /* link state has changed, schedule phy info update */
3958 if (!test_bit(__IGB_DOWN, &adapter->state))
3959 mod_timer(&adapter->phy_info_timer,
3960 round_jiffies(jiffies + 2 * HZ));
3963 if (netif_carrier_ok(netdev)) {
3964 adapter->link_speed = 0;
3965 adapter->link_duplex = 0;
3967 /* check for thermal sensor event */
3968 if (igb_thermal_sensor_event(hw,
3969 E1000_THSTAT_PWR_DOWN)) {
3970 netdev_err(netdev, "The network adapter was "
3971 "stopped because it overheated\n");
3974 /* Links status message must follow this format */
3975 printk(KERN_INFO "igb: %s NIC Link is Down\n",
3977 netif_carrier_off(netdev);
3979 igb_ping_all_vfs(adapter);
3981 /* link state has changed, schedule phy info update */
3982 if (!test_bit(__IGB_DOWN, &adapter->state))
3983 mod_timer(&adapter->phy_info_timer,
3984 round_jiffies(jiffies + 2 * HZ));
3986 pm_schedule_suspend(netdev->dev.parent,
3991 spin_lock(&adapter->stats64_lock);
3992 igb_update_stats(adapter, &adapter->stats64);
3993 spin_unlock(&adapter->stats64_lock);
3995 for (i = 0; i < adapter->num_tx_queues; i++) {
3996 struct igb_ring *tx_ring = adapter->tx_ring[i];
3997 if (!netif_carrier_ok(netdev)) {
3998 /* We've lost link, so the controller stops DMA,
3999 * but we've got queued Tx work that's never going
4000 * to get done, so reset controller to flush Tx.
4001 * (Do the reset outside of interrupt context).
4003 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4004 adapter->tx_timeout_count++;
4005 schedule_work(&adapter->reset_task);
4006 /* return immediately since reset is imminent */
4011 /* Force detection of hung controller every watchdog period */
4012 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4015 /* Cause software interrupt to ensure Rx ring is cleaned */
4016 if (adapter->msix_entries) {
4018 for (i = 0; i < adapter->num_q_vectors; i++)
4019 eics |= adapter->q_vector[i]->eims_value;
4020 wr32(E1000_EICS, eics);
4022 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4025 igb_spoof_check(adapter);
4026 igb_ptp_rx_hang(adapter);
4028 /* Reset the timer */
4029 if (!test_bit(__IGB_DOWN, &adapter->state))
4030 mod_timer(&adapter->watchdog_timer,
4031 round_jiffies(jiffies + 2 * HZ));
4034 enum latency_range {
4038 latency_invalid = 255
4042 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4043 * @q_vector: pointer to q_vector
4045 * Stores a new ITR value based on strictly on packet size. This
4046 * algorithm is less sophisticated than that used in igb_update_itr,
4047 * due to the difficulty of synchronizing statistics across multiple
4048 * receive rings. The divisors and thresholds used by this function
4049 * were determined based on theoretical maximum wire speed and testing
4050 * data, in order to minimize response time while increasing bulk
4052 * This functionality is controlled by the InterruptThrottleRate module
4053 * parameter (see igb_param.c)
4054 * NOTE: This function is called only when operating in a multiqueue
4055 * receive environment.
4057 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4059 int new_val = q_vector->itr_val;
4060 int avg_wire_size = 0;
4061 struct igb_adapter *adapter = q_vector->adapter;
4062 unsigned int packets;
4064 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4065 * ints/sec - ITR timer value of 120 ticks.
4067 if (adapter->link_speed != SPEED_1000) {
4068 new_val = IGB_4K_ITR;
4072 packets = q_vector->rx.total_packets;
4074 avg_wire_size = q_vector->rx.total_bytes / packets;
4076 packets = q_vector->tx.total_packets;
4078 avg_wire_size = max_t(u32, avg_wire_size,
4079 q_vector->tx.total_bytes / packets);
4081 /* if avg_wire_size isn't set no work was done */
4085 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4086 avg_wire_size += 24;
4088 /* Don't starve jumbo frames */
4089 avg_wire_size = min(avg_wire_size, 3000);
4091 /* Give a little boost to mid-size frames */
4092 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4093 new_val = avg_wire_size / 3;
4095 new_val = avg_wire_size / 2;
4097 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4098 if (new_val < IGB_20K_ITR &&
4099 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4100 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4101 new_val = IGB_20K_ITR;
4104 if (new_val != q_vector->itr_val) {
4105 q_vector->itr_val = new_val;
4106 q_vector->set_itr = 1;
4109 q_vector->rx.total_bytes = 0;
4110 q_vector->rx.total_packets = 0;
4111 q_vector->tx.total_bytes = 0;
4112 q_vector->tx.total_packets = 0;
4116 * igb_update_itr - update the dynamic ITR value based on statistics
4117 * @q_vector: pointer to q_vector
4118 * @ring_container: ring info to update the itr for
4120 * Stores a new ITR value based on packets and byte
4121 * counts during the last interrupt. The advantage of per interrupt
4122 * computation is faster updates and more accurate ITR for the current
4123 * traffic pattern. Constants in this function were computed
4124 * based on theoretical maximum wire speed and thresholds were set based
4125 * on testing data as well as attempting to minimize response time
4126 * while increasing bulk throughput.
4127 * this functionality is controlled by the InterruptThrottleRate module
4128 * parameter (see igb_param.c)
4129 * NOTE: These calculations are only valid when operating in a single-
4130 * queue environment.
4132 static void igb_update_itr(struct igb_q_vector *q_vector,
4133 struct igb_ring_container *ring_container)
4135 unsigned int packets = ring_container->total_packets;
4136 unsigned int bytes = ring_container->total_bytes;
4137 u8 itrval = ring_container->itr;
4139 /* no packets, exit with status unchanged */
4144 case lowest_latency:
4145 /* handle TSO and jumbo frames */
4146 if (bytes/packets > 8000)
4147 itrval = bulk_latency;
4148 else if ((packets < 5) && (bytes > 512))
4149 itrval = low_latency;
4151 case low_latency: /* 50 usec aka 20000 ints/s */
4152 if (bytes > 10000) {
4153 /* this if handles the TSO accounting */
4154 if (bytes/packets > 8000) {
4155 itrval = bulk_latency;
4156 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4157 itrval = bulk_latency;
4158 } else if ((packets > 35)) {
4159 itrval = lowest_latency;
4161 } else if (bytes/packets > 2000) {
4162 itrval = bulk_latency;
4163 } else if (packets <= 2 && bytes < 512) {
4164 itrval = lowest_latency;
4167 case bulk_latency: /* 250 usec aka 4000 ints/s */
4168 if (bytes > 25000) {
4170 itrval = low_latency;
4171 } else if (bytes < 1500) {
4172 itrval = low_latency;
4177 /* clear work counters since we have the values we need */
4178 ring_container->total_bytes = 0;
4179 ring_container->total_packets = 0;
4181 /* write updated itr to ring container */
4182 ring_container->itr = itrval;
4185 static void igb_set_itr(struct igb_q_vector *q_vector)
4187 struct igb_adapter *adapter = q_vector->adapter;
4188 u32 new_itr = q_vector->itr_val;
4191 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4192 if (adapter->link_speed != SPEED_1000) {
4194 new_itr = IGB_4K_ITR;
4198 igb_update_itr(q_vector, &q_vector->tx);
4199 igb_update_itr(q_vector, &q_vector->rx);
4201 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4203 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4204 if (current_itr == lowest_latency &&
4205 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4206 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4207 current_itr = low_latency;
4209 switch (current_itr) {
4210 /* counts and packets in update_itr are dependent on these numbers */
4211 case lowest_latency:
4212 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4215 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4218 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
4225 if (new_itr != q_vector->itr_val) {
4226 /* this attempts to bias the interrupt rate towards Bulk
4227 * by adding intermediate steps when interrupt rate is
4230 new_itr = new_itr > q_vector->itr_val ?
4231 max((new_itr * q_vector->itr_val) /
4232 (new_itr + (q_vector->itr_val >> 2)),
4234 /* Don't write the value here; it resets the adapter's
4235 * internal timer, and causes us to delay far longer than
4236 * we should between interrupts. Instead, we write the ITR
4237 * value at the beginning of the next interrupt so the timing
4238 * ends up being correct.
4240 q_vector->itr_val = new_itr;
4241 q_vector->set_itr = 1;
4245 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4246 u32 type_tucmd, u32 mss_l4len_idx)
4248 struct e1000_adv_tx_context_desc *context_desc;
4249 u16 i = tx_ring->next_to_use;
4251 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4254 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4256 /* set bits to identify this as an advanced context descriptor */
4257 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4259 /* For 82575, context index must be unique per ring. */
4260 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4261 mss_l4len_idx |= tx_ring->reg_idx << 4;
4263 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
4264 context_desc->seqnum_seed = 0;
4265 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
4266 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
4269 static int igb_tso(struct igb_ring *tx_ring,
4270 struct igb_tx_buffer *first,
4273 struct sk_buff *skb = first->skb;
4274 u32 vlan_macip_lens, type_tucmd;
4275 u32 mss_l4len_idx, l4len;
4277 if (skb->ip_summed != CHECKSUM_PARTIAL)
4280 if (!skb_is_gso(skb))
4283 if (skb_header_cloned(skb)) {
4284 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4289 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4290 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4292 if (first->protocol == __constant_htons(ETH_P_IP)) {
4293 struct iphdr *iph = ip_hdr(skb);
4296 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4300 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4301 first->tx_flags |= IGB_TX_FLAGS_TSO |
4304 } else if (skb_is_gso_v6(skb)) {
4305 ipv6_hdr(skb)->payload_len = 0;
4306 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4307 &ipv6_hdr(skb)->daddr,
4309 first->tx_flags |= IGB_TX_FLAGS_TSO |
4313 /* compute header lengths */
4314 l4len = tcp_hdrlen(skb);
4315 *hdr_len = skb_transport_offset(skb) + l4len;
4317 /* update gso size and bytecount with header size */
4318 first->gso_segs = skb_shinfo(skb)->gso_segs;
4319 first->bytecount += (first->gso_segs - 1) * *hdr_len;
4322 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4323 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4325 /* VLAN MACLEN IPLEN */
4326 vlan_macip_lens = skb_network_header_len(skb);
4327 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4328 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4330 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4335 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4337 struct sk_buff *skb = first->skb;
4338 u32 vlan_macip_lens = 0;
4339 u32 mss_l4len_idx = 0;
4342 if (skb->ip_summed != CHECKSUM_PARTIAL) {
4343 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4347 switch (first->protocol) {
4348 case __constant_htons(ETH_P_IP):
4349 vlan_macip_lens |= skb_network_header_len(skb);
4350 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4351 l4_hdr = ip_hdr(skb)->protocol;
4353 case __constant_htons(ETH_P_IPV6):
4354 vlan_macip_lens |= skb_network_header_len(skb);
4355 l4_hdr = ipv6_hdr(skb)->nexthdr;
4358 if (unlikely(net_ratelimit())) {
4359 dev_warn(tx_ring->dev,
4360 "partial checksum but proto=%x!\n",
4368 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4369 mss_l4len_idx = tcp_hdrlen(skb) <<
4370 E1000_ADVTXD_L4LEN_SHIFT;
4373 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4374 mss_l4len_idx = sizeof(struct sctphdr) <<
4375 E1000_ADVTXD_L4LEN_SHIFT;
4378 mss_l4len_idx = sizeof(struct udphdr) <<
4379 E1000_ADVTXD_L4LEN_SHIFT;
4382 if (unlikely(net_ratelimit())) {
4383 dev_warn(tx_ring->dev,
4384 "partial checksum but l4 proto=%x!\n",
4390 /* update TX checksum flag */
4391 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4394 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4395 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4397 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4400 #define IGB_SET_FLAG(_input, _flag, _result) \
4401 ((_flag <= _result) ? \
4402 ((u32)(_input & _flag) * (_result / _flag)) : \
4403 ((u32)(_input & _flag) / (_flag / _result)))
4405 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4407 /* set type for advanced descriptor with frame checksum insertion */
4408 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4409 E1000_ADVTXD_DCMD_DEXT |
4410 E1000_ADVTXD_DCMD_IFCS;
4412 /* set HW vlan bit if vlan is present */
4413 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4414 (E1000_ADVTXD_DCMD_VLE));
4416 /* set segmentation bits for TSO */
4417 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4418 (E1000_ADVTXD_DCMD_TSE));
4420 /* set timestamp bit if present */
4421 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4422 (E1000_ADVTXD_MAC_TSTAMP));
4424 /* insert frame checksum */
4425 cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4430 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4431 union e1000_adv_tx_desc *tx_desc,
4432 u32 tx_flags, unsigned int paylen)
4434 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4436 /* 82575 requires a unique index per ring */
4437 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4438 olinfo_status |= tx_ring->reg_idx << 4;
4440 /* insert L4 checksum */
4441 olinfo_status |= IGB_SET_FLAG(tx_flags,
4443 (E1000_TXD_POPTS_TXSM << 8));
4445 /* insert IPv4 checksum */
4446 olinfo_status |= IGB_SET_FLAG(tx_flags,
4448 (E1000_TXD_POPTS_IXSM << 8));
4450 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4453 static void igb_tx_map(struct igb_ring *tx_ring,
4454 struct igb_tx_buffer *first,
4457 struct sk_buff *skb = first->skb;
4458 struct igb_tx_buffer *tx_buffer;
4459 union e1000_adv_tx_desc *tx_desc;
4460 struct skb_frag_struct *frag;
4462 unsigned int data_len, size;
4463 u32 tx_flags = first->tx_flags;
4464 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4465 u16 i = tx_ring->next_to_use;
4467 tx_desc = IGB_TX_DESC(tx_ring, i);
4469 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4471 size = skb_headlen(skb);
4472 data_len = skb->data_len;
4474 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4478 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4479 if (dma_mapping_error(tx_ring->dev, dma))
4482 /* record length, and DMA address */
4483 dma_unmap_len_set(tx_buffer, len, size);
4484 dma_unmap_addr_set(tx_buffer, dma, dma);
4486 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4488 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4489 tx_desc->read.cmd_type_len =
4490 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4494 if (i == tx_ring->count) {
4495 tx_desc = IGB_TX_DESC(tx_ring, 0);
4498 tx_desc->read.olinfo_status = 0;
4500 dma += IGB_MAX_DATA_PER_TXD;
4501 size -= IGB_MAX_DATA_PER_TXD;
4503 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4506 if (likely(!data_len))
4509 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4513 if (i == tx_ring->count) {
4514 tx_desc = IGB_TX_DESC(tx_ring, 0);
4517 tx_desc->read.olinfo_status = 0;
4519 size = skb_frag_size(frag);
4522 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4523 size, DMA_TO_DEVICE);
4525 tx_buffer = &tx_ring->tx_buffer_info[i];
4528 /* write last descriptor with RS and EOP bits */
4529 cmd_type |= size | IGB_TXD_DCMD;
4530 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4532 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4534 /* set the timestamp */
4535 first->time_stamp = jiffies;
4537 /* Force memory writes to complete before letting h/w know there
4538 * are new descriptors to fetch. (Only applicable for weak-ordered
4539 * memory model archs, such as IA-64).
4541 * We also need this memory barrier to make certain all of the
4542 * status bits have been updated before next_to_watch is written.
4546 /* set next_to_watch value indicating a packet is present */
4547 first->next_to_watch = tx_desc;
4550 if (i == tx_ring->count)
4553 tx_ring->next_to_use = i;
4555 writel(i, tx_ring->tail);
4557 /* we need this if more than one processor can write to our tail
4558 * at a time, it synchronizes IO on IA64/Altix systems
4565 dev_err(tx_ring->dev, "TX DMA map failed\n");
4567 /* clear dma mappings for failed tx_buffer_info map */
4569 tx_buffer = &tx_ring->tx_buffer_info[i];
4570 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4571 if (tx_buffer == first)
4578 tx_ring->next_to_use = i;
4581 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4583 struct net_device *netdev = tx_ring->netdev;
4585 netif_stop_subqueue(netdev, tx_ring->queue_index);
4587 /* Herbert's original patch had:
4588 * smp_mb__after_netif_stop_queue();
4589 * but since that doesn't exist yet, just open code it.
4593 /* We need to check again in a case another CPU has just
4594 * made room available.
4596 if (igb_desc_unused(tx_ring) < size)
4600 netif_wake_subqueue(netdev, tx_ring->queue_index);
4602 u64_stats_update_begin(&tx_ring->tx_syncp2);
4603 tx_ring->tx_stats.restart_queue2++;
4604 u64_stats_update_end(&tx_ring->tx_syncp2);
4609 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4611 if (igb_desc_unused(tx_ring) >= size)
4613 return __igb_maybe_stop_tx(tx_ring, size);
4616 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4617 struct igb_ring *tx_ring)
4619 struct igb_tx_buffer *first;
4622 u16 count = TXD_USE_COUNT(skb_headlen(skb));
4623 __be16 protocol = vlan_get_protocol(skb);
4626 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4627 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4628 * + 2 desc gap to keep tail from touching head,
4629 * + 1 desc for context descriptor,
4630 * otherwise try next time
4632 if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4634 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4635 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4637 count += skb_shinfo(skb)->nr_frags;
4640 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4641 /* this is a hard error */
4642 return NETDEV_TX_BUSY;
4645 /* record the location of the first descriptor for this packet */
4646 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4648 first->bytecount = skb->len;
4649 first->gso_segs = 1;
4651 skb_tx_timestamp(skb);
4653 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4654 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4656 if (!(adapter->ptp_tx_skb)) {
4657 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4658 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4660 adapter->ptp_tx_skb = skb_get(skb);
4661 adapter->ptp_tx_start = jiffies;
4662 if (adapter->hw.mac.type == e1000_82576)
4663 schedule_work(&adapter->ptp_tx_work);
4667 if (vlan_tx_tag_present(skb)) {
4668 tx_flags |= IGB_TX_FLAGS_VLAN;
4669 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4672 /* record initial flags and protocol */
4673 first->tx_flags = tx_flags;
4674 first->protocol = protocol;
4676 tso = igb_tso(tx_ring, first, &hdr_len);
4680 igb_tx_csum(tx_ring, first);
4682 igb_tx_map(tx_ring, first, hdr_len);
4684 /* Make sure there is space in the ring for the next send. */
4685 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4687 return NETDEV_TX_OK;
4690 igb_unmap_and_free_tx_resource(tx_ring, first);
4692 return NETDEV_TX_OK;
4695 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4696 struct sk_buff *skb)
4698 unsigned int r_idx = skb->queue_mapping;
4700 if (r_idx >= adapter->num_tx_queues)
4701 r_idx = r_idx % adapter->num_tx_queues;
4703 return adapter->tx_ring[r_idx];
4706 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4707 struct net_device *netdev)
4709 struct igb_adapter *adapter = netdev_priv(netdev);
4711 if (test_bit(__IGB_DOWN, &adapter->state)) {
4712 dev_kfree_skb_any(skb);
4713 return NETDEV_TX_OK;
4716 if (skb->len <= 0) {
4717 dev_kfree_skb_any(skb);
4718 return NETDEV_TX_OK;
4721 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4722 * in order to meet this minimum size requirement.
4724 if (unlikely(skb->len < 17)) {
4725 if (skb_pad(skb, 17 - skb->len))
4726 return NETDEV_TX_OK;
4728 skb_set_tail_pointer(skb, 17);
4731 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4735 * igb_tx_timeout - Respond to a Tx Hang
4736 * @netdev: network interface device structure
4738 static void igb_tx_timeout(struct net_device *netdev)
4740 struct igb_adapter *adapter = netdev_priv(netdev);
4741 struct e1000_hw *hw = &adapter->hw;
4743 /* Do the reset outside of interrupt context */
4744 adapter->tx_timeout_count++;
4746 if (hw->mac.type >= e1000_82580)
4747 hw->dev_spec._82575.global_device_reset = true;
4749 schedule_work(&adapter->reset_task);
4751 (adapter->eims_enable_mask & ~adapter->eims_other));
4754 static void igb_reset_task(struct work_struct *work)
4756 struct igb_adapter *adapter;
4757 adapter = container_of(work, struct igb_adapter, reset_task);
4760 netdev_err(adapter->netdev, "Reset adapter\n");
4761 igb_reinit_locked(adapter);
4765 * igb_get_stats64 - Get System Network Statistics
4766 * @netdev: network interface device structure
4767 * @stats: rtnl_link_stats64 pointer
4769 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4770 struct rtnl_link_stats64 *stats)
4772 struct igb_adapter *adapter = netdev_priv(netdev);
4774 spin_lock(&adapter->stats64_lock);
4775 igb_update_stats(adapter, &adapter->stats64);
4776 memcpy(stats, &adapter->stats64, sizeof(*stats));
4777 spin_unlock(&adapter->stats64_lock);
4783 * igb_change_mtu - Change the Maximum Transfer Unit
4784 * @netdev: network interface device structure
4785 * @new_mtu: new value for maximum frame size
4787 * Returns 0 on success, negative on failure
4789 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4791 struct igb_adapter *adapter = netdev_priv(netdev);
4792 struct pci_dev *pdev = adapter->pdev;
4793 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4795 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4796 dev_err(&pdev->dev, "Invalid MTU setting\n");
4800 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4801 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4802 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4806 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4809 /* igb_down has a dependency on max_frame_size */
4810 adapter->max_frame_size = max_frame;
4812 if (netif_running(netdev))
4815 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4816 netdev->mtu, new_mtu);
4817 netdev->mtu = new_mtu;
4819 if (netif_running(netdev))
4824 clear_bit(__IGB_RESETTING, &adapter->state);
4830 * igb_update_stats - Update the board statistics counters
4831 * @adapter: board private structure
4833 void igb_update_stats(struct igb_adapter *adapter,
4834 struct rtnl_link_stats64 *net_stats)
4836 struct e1000_hw *hw = &adapter->hw;
4837 struct pci_dev *pdev = adapter->pdev;
4843 u64 _bytes, _packets;
4845 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4847 /* Prevent stats update while adapter is being reset, or if the pci
4848 * connection is down.
4850 if (adapter->link_speed == 0)
4852 if (pci_channel_offline(pdev))
4857 for (i = 0; i < adapter->num_rx_queues; i++) {
4858 u32 rqdpc = rd32(E1000_RQDPC(i));
4859 struct igb_ring *ring = adapter->rx_ring[i];
4862 ring->rx_stats.drops += rqdpc;
4863 net_stats->rx_fifo_errors += rqdpc;
4867 start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4868 _bytes = ring->rx_stats.bytes;
4869 _packets = ring->rx_stats.packets;
4870 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4872 packets += _packets;
4875 net_stats->rx_bytes = bytes;
4876 net_stats->rx_packets = packets;
4880 for (i = 0; i < adapter->num_tx_queues; i++) {
4881 struct igb_ring *ring = adapter->tx_ring[i];
4883 start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4884 _bytes = ring->tx_stats.bytes;
4885 _packets = ring->tx_stats.packets;
4886 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4888 packets += _packets;
4890 net_stats->tx_bytes = bytes;
4891 net_stats->tx_packets = packets;
4893 /* read stats registers */
4894 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4895 adapter->stats.gprc += rd32(E1000_GPRC);
4896 adapter->stats.gorc += rd32(E1000_GORCL);
4897 rd32(E1000_GORCH); /* clear GORCL */
4898 adapter->stats.bprc += rd32(E1000_BPRC);
4899 adapter->stats.mprc += rd32(E1000_MPRC);
4900 adapter->stats.roc += rd32(E1000_ROC);
4902 adapter->stats.prc64 += rd32(E1000_PRC64);
4903 adapter->stats.prc127 += rd32(E1000_PRC127);
4904 adapter->stats.prc255 += rd32(E1000_PRC255);
4905 adapter->stats.prc511 += rd32(E1000_PRC511);
4906 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4907 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4908 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4909 adapter->stats.sec += rd32(E1000_SEC);
4911 mpc = rd32(E1000_MPC);
4912 adapter->stats.mpc += mpc;
4913 net_stats->rx_fifo_errors += mpc;
4914 adapter->stats.scc += rd32(E1000_SCC);
4915 adapter->stats.ecol += rd32(E1000_ECOL);
4916 adapter->stats.mcc += rd32(E1000_MCC);
4917 adapter->stats.latecol += rd32(E1000_LATECOL);
4918 adapter->stats.dc += rd32(E1000_DC);
4919 adapter->stats.rlec += rd32(E1000_RLEC);
4920 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4921 adapter->stats.xontxc += rd32(E1000_XONTXC);
4922 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4923 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4924 adapter->stats.fcruc += rd32(E1000_FCRUC);
4925 adapter->stats.gptc += rd32(E1000_GPTC);
4926 adapter->stats.gotc += rd32(E1000_GOTCL);
4927 rd32(E1000_GOTCH); /* clear GOTCL */
4928 adapter->stats.rnbc += rd32(E1000_RNBC);
4929 adapter->stats.ruc += rd32(E1000_RUC);
4930 adapter->stats.rfc += rd32(E1000_RFC);
4931 adapter->stats.rjc += rd32(E1000_RJC);
4932 adapter->stats.tor += rd32(E1000_TORH);
4933 adapter->stats.tot += rd32(E1000_TOTH);
4934 adapter->stats.tpr += rd32(E1000_TPR);
4936 adapter->stats.ptc64 += rd32(E1000_PTC64);
4937 adapter->stats.ptc127 += rd32(E1000_PTC127);
4938 adapter->stats.ptc255 += rd32(E1000_PTC255);
4939 adapter->stats.ptc511 += rd32(E1000_PTC511);
4940 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4941 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4943 adapter->stats.mptc += rd32(E1000_MPTC);
4944 adapter->stats.bptc += rd32(E1000_BPTC);
4946 adapter->stats.tpt += rd32(E1000_TPT);
4947 adapter->stats.colc += rd32(E1000_COLC);
4949 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4950 /* read internal phy specific stats */
4951 reg = rd32(E1000_CTRL_EXT);
4952 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4953 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4955 /* this stat has invalid values on i210/i211 */
4956 if ((hw->mac.type != e1000_i210) &&
4957 (hw->mac.type != e1000_i211))
4958 adapter->stats.tncrs += rd32(E1000_TNCRS);
4961 adapter->stats.tsctc += rd32(E1000_TSCTC);
4962 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4964 adapter->stats.iac += rd32(E1000_IAC);
4965 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4966 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4967 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4968 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4969 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4970 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4971 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4972 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4974 /* Fill out the OS statistics structure */
4975 net_stats->multicast = adapter->stats.mprc;
4976 net_stats->collisions = adapter->stats.colc;
4980 /* RLEC on some newer hardware can be incorrect so build
4981 * our own version based on RUC and ROC
4983 net_stats->rx_errors = adapter->stats.rxerrc +
4984 adapter->stats.crcerrs + adapter->stats.algnerrc +
4985 adapter->stats.ruc + adapter->stats.roc +
4986 adapter->stats.cexterr;
4987 net_stats->rx_length_errors = adapter->stats.ruc +
4989 net_stats->rx_crc_errors = adapter->stats.crcerrs;
4990 net_stats->rx_frame_errors = adapter->stats.algnerrc;
4991 net_stats->rx_missed_errors = adapter->stats.mpc;
4994 net_stats->tx_errors = adapter->stats.ecol +
4995 adapter->stats.latecol;
4996 net_stats->tx_aborted_errors = adapter->stats.ecol;
4997 net_stats->tx_window_errors = adapter->stats.latecol;
4998 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5000 /* Tx Dropped needs to be maintained elsewhere */
5003 if (hw->phy.media_type == e1000_media_type_copper) {
5004 if ((adapter->link_speed == SPEED_1000) &&
5005 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5006 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5007 adapter->phy_stats.idle_errors += phy_tmp;
5011 /* Management Stats */
5012 adapter->stats.mgptc += rd32(E1000_MGTPTC);
5013 adapter->stats.mgprc += rd32(E1000_MGTPRC);
5014 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5017 reg = rd32(E1000_MANC);
5018 if (reg & E1000_MANC_EN_BMC2OS) {
5019 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5020 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5021 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5022 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5026 static irqreturn_t igb_msix_other(int irq, void *data)
5028 struct igb_adapter *adapter = data;
5029 struct e1000_hw *hw = &adapter->hw;
5030 u32 icr = rd32(E1000_ICR);
5031 /* reading ICR causes bit 31 of EICR to be cleared */
5033 if (icr & E1000_ICR_DRSTA)
5034 schedule_work(&adapter->reset_task);
5036 if (icr & E1000_ICR_DOUTSYNC) {
5037 /* HW is reporting DMA is out of sync */
5038 adapter->stats.doosync++;
5039 /* The DMA Out of Sync is also indication of a spoof event
5040 * in IOV mode. Check the Wrong VM Behavior register to
5041 * see if it is really a spoof event.
5043 igb_check_wvbr(adapter);
5046 /* Check for a mailbox event */
5047 if (icr & E1000_ICR_VMMB)
5048 igb_msg_task(adapter);
5050 if (icr & E1000_ICR_LSC) {
5051 hw->mac.get_link_status = 1;
5052 /* guard against interrupt when we're going down */
5053 if (!test_bit(__IGB_DOWN, &adapter->state))
5054 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5057 if (icr & E1000_ICR_TS) {
5058 u32 tsicr = rd32(E1000_TSICR);
5060 if (tsicr & E1000_TSICR_TXTS) {
5061 /* acknowledge the interrupt */
5062 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5063 /* retrieve hardware timestamp */
5064 schedule_work(&adapter->ptp_tx_work);
5068 wr32(E1000_EIMS, adapter->eims_other);
5073 static void igb_write_itr(struct igb_q_vector *q_vector)
5075 struct igb_adapter *adapter = q_vector->adapter;
5076 u32 itr_val = q_vector->itr_val & 0x7FFC;
5078 if (!q_vector->set_itr)
5084 if (adapter->hw.mac.type == e1000_82575)
5085 itr_val |= itr_val << 16;
5087 itr_val |= E1000_EITR_CNT_IGNR;
5089 writel(itr_val, q_vector->itr_register);
5090 q_vector->set_itr = 0;
5093 static irqreturn_t igb_msix_ring(int irq, void *data)
5095 struct igb_q_vector *q_vector = data;
5097 /* Write the ITR value calculated from the previous interrupt. */
5098 igb_write_itr(q_vector);
5100 napi_schedule(&q_vector->napi);
5105 #ifdef CONFIG_IGB_DCA
5106 static void igb_update_tx_dca(struct igb_adapter *adapter,
5107 struct igb_ring *tx_ring,
5110 struct e1000_hw *hw = &adapter->hw;
5111 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5113 if (hw->mac.type != e1000_82575)
5114 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5116 /* We can enable relaxed ordering for reads, but not writes when
5117 * DCA is enabled. This is due to a known issue in some chipsets
5118 * which will cause the DCA tag to be cleared.
5120 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5121 E1000_DCA_TXCTRL_DATA_RRO_EN |
5122 E1000_DCA_TXCTRL_DESC_DCA_EN;
5124 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5127 static void igb_update_rx_dca(struct igb_adapter *adapter,
5128 struct igb_ring *rx_ring,
5131 struct e1000_hw *hw = &adapter->hw;
5132 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5134 if (hw->mac.type != e1000_82575)
5135 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5137 /* We can enable relaxed ordering for reads, but not writes when
5138 * DCA is enabled. This is due to a known issue in some chipsets
5139 * which will cause the DCA tag to be cleared.
5141 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5142 E1000_DCA_RXCTRL_DESC_DCA_EN;
5144 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5147 static void igb_update_dca(struct igb_q_vector *q_vector)
5149 struct igb_adapter *adapter = q_vector->adapter;
5150 int cpu = get_cpu();
5152 if (q_vector->cpu == cpu)
5155 if (q_vector->tx.ring)
5156 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5158 if (q_vector->rx.ring)
5159 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5161 q_vector->cpu = cpu;
5166 static void igb_setup_dca(struct igb_adapter *adapter)
5168 struct e1000_hw *hw = &adapter->hw;
5171 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5174 /* Always use CB2 mode, difference is masked in the CB driver. */
5175 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5177 for (i = 0; i < adapter->num_q_vectors; i++) {
5178 adapter->q_vector[i]->cpu = -1;
5179 igb_update_dca(adapter->q_vector[i]);
5183 static int __igb_notify_dca(struct device *dev, void *data)
5185 struct net_device *netdev = dev_get_drvdata(dev);
5186 struct igb_adapter *adapter = netdev_priv(netdev);
5187 struct pci_dev *pdev = adapter->pdev;
5188 struct e1000_hw *hw = &adapter->hw;
5189 unsigned long event = *(unsigned long *)data;
5192 case DCA_PROVIDER_ADD:
5193 /* if already enabled, don't do it again */
5194 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5196 if (dca_add_requester(dev) == 0) {
5197 adapter->flags |= IGB_FLAG_DCA_ENABLED;
5198 dev_info(&pdev->dev, "DCA enabled\n");
5199 igb_setup_dca(adapter);
5202 /* Fall Through since DCA is disabled. */
5203 case DCA_PROVIDER_REMOVE:
5204 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5205 /* without this a class_device is left
5206 * hanging around in the sysfs model
5208 dca_remove_requester(dev);
5209 dev_info(&pdev->dev, "DCA disabled\n");
5210 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5211 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5219 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5224 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5227 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5229 #endif /* CONFIG_IGB_DCA */
5231 #ifdef CONFIG_PCI_IOV
5232 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5234 unsigned char mac_addr[ETH_ALEN];
5236 eth_zero_addr(mac_addr);
5237 igb_set_vf_mac(adapter, vf, mac_addr);
5239 /* By default spoof check is enabled for all VFs */
5240 adapter->vf_data[vf].spoofchk_enabled = true;
5245 static bool igb_vfs_are_assigned(struct igb_adapter *adapter)
5247 struct pci_dev *pdev = adapter->pdev;
5248 struct pci_dev *vfdev;
5251 switch (adapter->hw.mac.type) {
5253 dev_id = IGB_82576_VF_DEV_ID;
5256 dev_id = IGB_I350_VF_DEV_ID;
5262 /* loop through all the VFs to see if we own any that are assigned */
5263 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, NULL);
5265 /* if we don't own it we don't care */
5266 if (vfdev->is_virtfn && vfdev->physfn == pdev) {
5267 /* if it is assigned we cannot release it */
5268 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
5272 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, dev_id, vfdev);
5279 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5281 struct e1000_hw *hw = &adapter->hw;
5285 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5286 ping = E1000_PF_CONTROL_MSG;
5287 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5288 ping |= E1000_VT_MSGTYPE_CTS;
5289 igb_write_mbx(hw, &ping, 1, i);
5293 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5295 struct e1000_hw *hw = &adapter->hw;
5296 u32 vmolr = rd32(E1000_VMOLR(vf));
5297 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5299 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5300 IGB_VF_FLAG_MULTI_PROMISC);
5301 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5303 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5304 vmolr |= E1000_VMOLR_MPME;
5305 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5306 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5308 /* if we have hashes and we are clearing a multicast promisc
5309 * flag we need to write the hashes to the MTA as this step
5310 * was previously skipped
5312 if (vf_data->num_vf_mc_hashes > 30) {
5313 vmolr |= E1000_VMOLR_MPME;
5314 } else if (vf_data->num_vf_mc_hashes) {
5316 vmolr |= E1000_VMOLR_ROMPE;
5317 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5318 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5322 wr32(E1000_VMOLR(vf), vmolr);
5324 /* there are flags left unprocessed, likely not supported */
5325 if (*msgbuf & E1000_VT_MSGINFO_MASK)
5331 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5332 u32 *msgbuf, u32 vf)
5334 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5335 u16 *hash_list = (u16 *)&msgbuf[1];
5336 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5339 /* salt away the number of multicast addresses assigned
5340 * to this VF for later use to restore when the PF multi cast
5343 vf_data->num_vf_mc_hashes = n;
5345 /* only up to 30 hash values supported */
5349 /* store the hashes for later use */
5350 for (i = 0; i < n; i++)
5351 vf_data->vf_mc_hashes[i] = hash_list[i];
5353 /* Flush and reset the mta with the new values */
5354 igb_set_rx_mode(adapter->netdev);
5359 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5361 struct e1000_hw *hw = &adapter->hw;
5362 struct vf_data_storage *vf_data;
5365 for (i = 0; i < adapter->vfs_allocated_count; i++) {
5366 u32 vmolr = rd32(E1000_VMOLR(i));
5367 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5369 vf_data = &adapter->vf_data[i];
5371 if ((vf_data->num_vf_mc_hashes > 30) ||
5372 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5373 vmolr |= E1000_VMOLR_MPME;
5374 } else if (vf_data->num_vf_mc_hashes) {
5375 vmolr |= E1000_VMOLR_ROMPE;
5376 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5377 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5379 wr32(E1000_VMOLR(i), vmolr);
5383 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5385 struct e1000_hw *hw = &adapter->hw;
5386 u32 pool_mask, reg, vid;
5389 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5391 /* Find the vlan filter for this id */
5392 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5393 reg = rd32(E1000_VLVF(i));
5395 /* remove the vf from the pool */
5398 /* if pool is empty then remove entry from vfta */
5399 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5400 (reg & E1000_VLVF_VLANID_ENABLE)) {
5402 vid = reg & E1000_VLVF_VLANID_MASK;
5403 igb_vfta_set(hw, vid, false);
5406 wr32(E1000_VLVF(i), reg);
5409 adapter->vf_data[vf].vlans_enabled = 0;
5412 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5414 struct e1000_hw *hw = &adapter->hw;
5417 /* The vlvf table only exists on 82576 hardware and newer */
5418 if (hw->mac.type < e1000_82576)
5421 /* we only need to do this if VMDq is enabled */
5422 if (!adapter->vfs_allocated_count)
5425 /* Find the vlan filter for this id */
5426 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5427 reg = rd32(E1000_VLVF(i));
5428 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5429 vid == (reg & E1000_VLVF_VLANID_MASK))
5434 if (i == E1000_VLVF_ARRAY_SIZE) {
5435 /* Did not find a matching VLAN ID entry that was
5436 * enabled. Search for a free filter entry, i.e.
5437 * one without the enable bit set
5439 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5440 reg = rd32(E1000_VLVF(i));
5441 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5445 if (i < E1000_VLVF_ARRAY_SIZE) {
5446 /* Found an enabled/available entry */
5447 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5449 /* if !enabled we need to set this up in vfta */
5450 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5451 /* add VID to filter table */
5452 igb_vfta_set(hw, vid, true);
5453 reg |= E1000_VLVF_VLANID_ENABLE;
5455 reg &= ~E1000_VLVF_VLANID_MASK;
5457 wr32(E1000_VLVF(i), reg);
5459 /* do not modify RLPML for PF devices */
5460 if (vf >= adapter->vfs_allocated_count)
5463 if (!adapter->vf_data[vf].vlans_enabled) {
5465 reg = rd32(E1000_VMOLR(vf));
5466 size = reg & E1000_VMOLR_RLPML_MASK;
5468 reg &= ~E1000_VMOLR_RLPML_MASK;
5470 wr32(E1000_VMOLR(vf), reg);
5473 adapter->vf_data[vf].vlans_enabled++;
5476 if (i < E1000_VLVF_ARRAY_SIZE) {
5477 /* remove vf from the pool */
5478 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5479 /* if pool is empty then remove entry from vfta */
5480 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5482 igb_vfta_set(hw, vid, false);
5484 wr32(E1000_VLVF(i), reg);
5486 /* do not modify RLPML for PF devices */
5487 if (vf >= adapter->vfs_allocated_count)
5490 adapter->vf_data[vf].vlans_enabled--;
5491 if (!adapter->vf_data[vf].vlans_enabled) {
5493 reg = rd32(E1000_VMOLR(vf));
5494 size = reg & E1000_VMOLR_RLPML_MASK;
5496 reg &= ~E1000_VMOLR_RLPML_MASK;
5498 wr32(E1000_VMOLR(vf), reg);
5505 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5507 struct e1000_hw *hw = &adapter->hw;
5510 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5512 wr32(E1000_VMVIR(vf), 0);
5515 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5516 int vf, u16 vlan, u8 qos)
5519 struct igb_adapter *adapter = netdev_priv(netdev);
5521 if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5524 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5527 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5528 igb_set_vmolr(adapter, vf, !vlan);
5529 adapter->vf_data[vf].pf_vlan = vlan;
5530 adapter->vf_data[vf].pf_qos = qos;
5531 dev_info(&adapter->pdev->dev,
5532 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5533 if (test_bit(__IGB_DOWN, &adapter->state)) {
5534 dev_warn(&adapter->pdev->dev,
5535 "The VF VLAN has been set, but the PF device is not up.\n");
5536 dev_warn(&adapter->pdev->dev,
5537 "Bring the PF device up before attempting to use the VF device.\n");
5540 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5542 igb_set_vmvir(adapter, vlan, vf);
5543 igb_set_vmolr(adapter, vf, true);
5544 adapter->vf_data[vf].pf_vlan = 0;
5545 adapter->vf_data[vf].pf_qos = 0;
5551 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5553 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5554 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5556 return igb_vlvf_set(adapter, vid, add, vf);
5559 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5561 /* clear flags - except flag that indicates PF has set the MAC */
5562 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5563 adapter->vf_data[vf].last_nack = jiffies;
5565 /* reset offloads to defaults */
5566 igb_set_vmolr(adapter, vf, true);
5568 /* reset vlans for device */
5569 igb_clear_vf_vfta(adapter, vf);
5570 if (adapter->vf_data[vf].pf_vlan)
5571 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5572 adapter->vf_data[vf].pf_vlan,
5573 adapter->vf_data[vf].pf_qos);
5575 igb_clear_vf_vfta(adapter, vf);
5577 /* reset multicast table array for vf */
5578 adapter->vf_data[vf].num_vf_mc_hashes = 0;
5580 /* Flush and reset the mta with the new values */
5581 igb_set_rx_mode(adapter->netdev);
5584 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5586 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5588 /* clear mac address as we were hotplug removed/added */
5589 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5590 eth_zero_addr(vf_mac);
5592 /* process remaining reset events */
5593 igb_vf_reset(adapter, vf);
5596 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5598 struct e1000_hw *hw = &adapter->hw;
5599 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5600 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5602 u8 *addr = (u8 *)(&msgbuf[1]);
5604 /* process all the same items cleared in a function level reset */
5605 igb_vf_reset(adapter, vf);
5607 /* set vf mac address */
5608 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5610 /* enable transmit and receive for vf */
5611 reg = rd32(E1000_VFTE);
5612 wr32(E1000_VFTE, reg | (1 << vf));
5613 reg = rd32(E1000_VFRE);
5614 wr32(E1000_VFRE, reg | (1 << vf));
5616 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5618 /* reply to reset with ack and vf mac address */
5619 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5620 memcpy(addr, vf_mac, 6);
5621 igb_write_mbx(hw, msgbuf, 3, vf);
5624 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5626 /* The VF MAC Address is stored in a packed array of bytes
5627 * starting at the second 32 bit word of the msg array
5629 unsigned char *addr = (char *)&msg[1];
5632 if (is_valid_ether_addr(addr))
5633 err = igb_set_vf_mac(adapter, vf, addr);
5638 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5640 struct e1000_hw *hw = &adapter->hw;
5641 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5642 u32 msg = E1000_VT_MSGTYPE_NACK;
5644 /* if device isn't clear to send it shouldn't be reading either */
5645 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5646 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5647 igb_write_mbx(hw, &msg, 1, vf);
5648 vf_data->last_nack = jiffies;
5652 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5654 struct pci_dev *pdev = adapter->pdev;
5655 u32 msgbuf[E1000_VFMAILBOX_SIZE];
5656 struct e1000_hw *hw = &adapter->hw;
5657 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5660 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5663 /* if receive failed revoke VF CTS stats and restart init */
5664 dev_err(&pdev->dev, "Error receiving message from VF\n");
5665 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5666 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5671 /* this is a message we already processed, do nothing */
5672 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5675 /* until the vf completes a reset it should not be
5676 * allowed to start any configuration.
5678 if (msgbuf[0] == E1000_VF_RESET) {
5679 igb_vf_reset_msg(adapter, vf);
5683 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5684 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5690 switch ((msgbuf[0] & 0xFFFF)) {
5691 case E1000_VF_SET_MAC_ADDR:
5693 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5694 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5696 dev_warn(&pdev->dev,
5697 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5700 case E1000_VF_SET_PROMISC:
5701 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5703 case E1000_VF_SET_MULTICAST:
5704 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5706 case E1000_VF_SET_LPE:
5707 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5709 case E1000_VF_SET_VLAN:
5711 if (vf_data->pf_vlan)
5712 dev_warn(&pdev->dev,
5713 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5716 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5719 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5724 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5726 /* notify the VF of the results of what it sent us */
5728 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5730 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5732 igb_write_mbx(hw, msgbuf, 1, vf);
5735 static void igb_msg_task(struct igb_adapter *adapter)
5737 struct e1000_hw *hw = &adapter->hw;
5740 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5741 /* process any reset requests */
5742 if (!igb_check_for_rst(hw, vf))
5743 igb_vf_reset_event(adapter, vf);
5745 /* process any messages pending */
5746 if (!igb_check_for_msg(hw, vf))
5747 igb_rcv_msg_from_vf(adapter, vf);
5749 /* process any acks */
5750 if (!igb_check_for_ack(hw, vf))
5751 igb_rcv_ack_from_vf(adapter, vf);
5756 * igb_set_uta - Set unicast filter table address
5757 * @adapter: board private structure
5759 * The unicast table address is a register array of 32-bit registers.
5760 * The table is meant to be used in a way similar to how the MTA is used
5761 * however due to certain limitations in the hardware it is necessary to
5762 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5763 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5765 static void igb_set_uta(struct igb_adapter *adapter)
5767 struct e1000_hw *hw = &adapter->hw;
5770 /* The UTA table only exists on 82576 hardware and newer */
5771 if (hw->mac.type < e1000_82576)
5774 /* we only need to do this if VMDq is enabled */
5775 if (!adapter->vfs_allocated_count)
5778 for (i = 0; i < hw->mac.uta_reg_count; i++)
5779 array_wr32(E1000_UTA, i, ~0);
5783 * igb_intr_msi - Interrupt Handler
5784 * @irq: interrupt number
5785 * @data: pointer to a network interface device structure
5787 static irqreturn_t igb_intr_msi(int irq, void *data)
5789 struct igb_adapter *adapter = data;
5790 struct igb_q_vector *q_vector = adapter->q_vector[0];
5791 struct e1000_hw *hw = &adapter->hw;
5792 /* read ICR disables interrupts using IAM */
5793 u32 icr = rd32(E1000_ICR);
5795 igb_write_itr(q_vector);
5797 if (icr & E1000_ICR_DRSTA)
5798 schedule_work(&adapter->reset_task);
5800 if (icr & E1000_ICR_DOUTSYNC) {
5801 /* HW is reporting DMA is out of sync */
5802 adapter->stats.doosync++;
5805 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5806 hw->mac.get_link_status = 1;
5807 if (!test_bit(__IGB_DOWN, &adapter->state))
5808 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5811 if (icr & E1000_ICR_TS) {
5812 u32 tsicr = rd32(E1000_TSICR);
5814 if (tsicr & E1000_TSICR_TXTS) {
5815 /* acknowledge the interrupt */
5816 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5817 /* retrieve hardware timestamp */
5818 schedule_work(&adapter->ptp_tx_work);
5822 napi_schedule(&q_vector->napi);
5828 * igb_intr - Legacy Interrupt Handler
5829 * @irq: interrupt number
5830 * @data: pointer to a network interface device structure
5832 static irqreturn_t igb_intr(int irq, void *data)
5834 struct igb_adapter *adapter = data;
5835 struct igb_q_vector *q_vector = adapter->q_vector[0];
5836 struct e1000_hw *hw = &adapter->hw;
5837 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5838 * need for the IMC write
5840 u32 icr = rd32(E1000_ICR);
5842 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5843 * not set, then the adapter didn't send an interrupt
5845 if (!(icr & E1000_ICR_INT_ASSERTED))
5848 igb_write_itr(q_vector);
5850 if (icr & E1000_ICR_DRSTA)
5851 schedule_work(&adapter->reset_task);
5853 if (icr & E1000_ICR_DOUTSYNC) {
5854 /* HW is reporting DMA is out of sync */
5855 adapter->stats.doosync++;
5858 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5859 hw->mac.get_link_status = 1;
5860 /* guard against interrupt when we're going down */
5861 if (!test_bit(__IGB_DOWN, &adapter->state))
5862 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5865 if (icr & E1000_ICR_TS) {
5866 u32 tsicr = rd32(E1000_TSICR);
5868 if (tsicr & E1000_TSICR_TXTS) {
5869 /* acknowledge the interrupt */
5870 wr32(E1000_TSICR, E1000_TSICR_TXTS);
5871 /* retrieve hardware timestamp */
5872 schedule_work(&adapter->ptp_tx_work);
5876 napi_schedule(&q_vector->napi);
5881 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5883 struct igb_adapter *adapter = q_vector->adapter;
5884 struct e1000_hw *hw = &adapter->hw;
5886 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5887 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5888 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5889 igb_set_itr(q_vector);
5891 igb_update_ring_itr(q_vector);
5894 if (!test_bit(__IGB_DOWN, &adapter->state)) {
5895 if (adapter->msix_entries)
5896 wr32(E1000_EIMS, q_vector->eims_value);
5898 igb_irq_enable(adapter);
5903 * igb_poll - NAPI Rx polling callback
5904 * @napi: napi polling structure
5905 * @budget: count of how many packets we should handle
5907 static int igb_poll(struct napi_struct *napi, int budget)
5909 struct igb_q_vector *q_vector = container_of(napi,
5910 struct igb_q_vector,
5912 bool clean_complete = true;
5914 #ifdef CONFIG_IGB_DCA
5915 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5916 igb_update_dca(q_vector);
5918 if (q_vector->tx.ring)
5919 clean_complete = igb_clean_tx_irq(q_vector);
5921 if (q_vector->rx.ring)
5922 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5924 /* If all work not completed, return budget and keep polling */
5925 if (!clean_complete)
5928 /* If not enough Rx work done, exit the polling mode */
5929 napi_complete(napi);
5930 igb_ring_irq_enable(q_vector);
5936 * igb_clean_tx_irq - Reclaim resources after transmit completes
5937 * @q_vector: pointer to q_vector containing needed info
5939 * returns true if ring is completely cleaned
5941 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5943 struct igb_adapter *adapter = q_vector->adapter;
5944 struct igb_ring *tx_ring = q_vector->tx.ring;
5945 struct igb_tx_buffer *tx_buffer;
5946 union e1000_adv_tx_desc *tx_desc;
5947 unsigned int total_bytes = 0, total_packets = 0;
5948 unsigned int budget = q_vector->tx.work_limit;
5949 unsigned int i = tx_ring->next_to_clean;
5951 if (test_bit(__IGB_DOWN, &adapter->state))
5954 tx_buffer = &tx_ring->tx_buffer_info[i];
5955 tx_desc = IGB_TX_DESC(tx_ring, i);
5956 i -= tx_ring->count;
5959 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5961 /* if next_to_watch is not set then there is no work pending */
5965 /* prevent any other reads prior to eop_desc */
5966 read_barrier_depends();
5968 /* if DD is not set pending work has not been completed */
5969 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
5972 /* clear next_to_watch to prevent false hangs */
5973 tx_buffer->next_to_watch = NULL;
5975 /* update the statistics for this packet */
5976 total_bytes += tx_buffer->bytecount;
5977 total_packets += tx_buffer->gso_segs;
5980 dev_kfree_skb_any(tx_buffer->skb);
5982 /* unmap skb header data */
5983 dma_unmap_single(tx_ring->dev,
5984 dma_unmap_addr(tx_buffer, dma),
5985 dma_unmap_len(tx_buffer, len),
5988 /* clear tx_buffer data */
5989 tx_buffer->skb = NULL;
5990 dma_unmap_len_set(tx_buffer, len, 0);
5992 /* clear last DMA location and unmap remaining buffers */
5993 while (tx_desc != eop_desc) {
5998 i -= tx_ring->count;
5999 tx_buffer = tx_ring->tx_buffer_info;
6000 tx_desc = IGB_TX_DESC(tx_ring, 0);
6003 /* unmap any remaining paged data */
6004 if (dma_unmap_len(tx_buffer, len)) {
6005 dma_unmap_page(tx_ring->dev,
6006 dma_unmap_addr(tx_buffer, dma),
6007 dma_unmap_len(tx_buffer, len),
6009 dma_unmap_len_set(tx_buffer, len, 0);
6013 /* move us one more past the eop_desc for start of next pkt */
6018 i -= tx_ring->count;
6019 tx_buffer = tx_ring->tx_buffer_info;
6020 tx_desc = IGB_TX_DESC(tx_ring, 0);
6023 /* issue prefetch for next Tx descriptor */
6026 /* update budget accounting */
6028 } while (likely(budget));
6030 netdev_tx_completed_queue(txring_txq(tx_ring),
6031 total_packets, total_bytes);
6032 i += tx_ring->count;
6033 tx_ring->next_to_clean = i;
6034 u64_stats_update_begin(&tx_ring->tx_syncp);
6035 tx_ring->tx_stats.bytes += total_bytes;
6036 tx_ring->tx_stats.packets += total_packets;
6037 u64_stats_update_end(&tx_ring->tx_syncp);
6038 q_vector->tx.total_bytes += total_bytes;
6039 q_vector->tx.total_packets += total_packets;
6041 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6042 struct e1000_hw *hw = &adapter->hw;
6044 /* Detect a transmit hang in hardware, this serializes the
6045 * check with the clearing of time_stamp and movement of i
6047 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6048 if (tx_buffer->next_to_watch &&
6049 time_after(jiffies, tx_buffer->time_stamp +
6050 (adapter->tx_timeout_factor * HZ)) &&
6051 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6053 /* detected Tx unit hang */
6054 dev_err(tx_ring->dev,
6055 "Detected Tx Unit Hang\n"
6059 " next_to_use <%x>\n"
6060 " next_to_clean <%x>\n"
6061 "buffer_info[next_to_clean]\n"
6062 " time_stamp <%lx>\n"
6063 " next_to_watch <%p>\n"
6065 " desc.status <%x>\n",
6066 tx_ring->queue_index,
6067 rd32(E1000_TDH(tx_ring->reg_idx)),
6068 readl(tx_ring->tail),
6069 tx_ring->next_to_use,
6070 tx_ring->next_to_clean,
6071 tx_buffer->time_stamp,
6072 tx_buffer->next_to_watch,
6074 tx_buffer->next_to_watch->wb.status);
6075 netif_stop_subqueue(tx_ring->netdev,
6076 tx_ring->queue_index);
6078 /* we are about to reset, no point in enabling stuff */
6083 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6084 if (unlikely(total_packets &&
6085 netif_carrier_ok(tx_ring->netdev) &&
6086 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6087 /* Make sure that anybody stopping the queue after this
6088 * sees the new next_to_clean.
6091 if (__netif_subqueue_stopped(tx_ring->netdev,
6092 tx_ring->queue_index) &&
6093 !(test_bit(__IGB_DOWN, &adapter->state))) {
6094 netif_wake_subqueue(tx_ring->netdev,
6095 tx_ring->queue_index);
6097 u64_stats_update_begin(&tx_ring->tx_syncp);
6098 tx_ring->tx_stats.restart_queue++;
6099 u64_stats_update_end(&tx_ring->tx_syncp);
6107 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6108 * @rx_ring: rx descriptor ring to store buffers on
6109 * @old_buff: donor buffer to have page reused
6111 * Synchronizes page for reuse by the adapter
6113 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6114 struct igb_rx_buffer *old_buff)
6116 struct igb_rx_buffer *new_buff;
6117 u16 nta = rx_ring->next_to_alloc;
6119 new_buff = &rx_ring->rx_buffer_info[nta];
6121 /* update, and store next to alloc */
6123 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6125 /* transfer page from old buffer to new buffer */
6126 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6128 /* sync the buffer for use by the device */
6129 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6130 old_buff->page_offset,
6135 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6137 unsigned int truesize)
6139 /* avoid re-using remote pages */
6140 if (unlikely(page_to_nid(page) != numa_node_id()))
6143 #if (PAGE_SIZE < 8192)
6144 /* if we are only owner of page we can reuse it */
6145 if (unlikely(page_count(page) != 1))
6148 /* flip page offset to other buffer */
6149 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6151 /* since we are the only owner of the page and we need to
6152 * increment it, just set the value to 2 in order to avoid
6153 * an unnecessary locked operation
6155 atomic_set(&page->_count, 2);
6157 /* move offset up to the next cache line */
6158 rx_buffer->page_offset += truesize;
6160 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6163 /* bump ref count on page before it is given to the stack */
6171 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6172 * @rx_ring: rx descriptor ring to transact packets on
6173 * @rx_buffer: buffer containing page to add
6174 * @rx_desc: descriptor containing length of buffer written by hardware
6175 * @skb: sk_buff to place the data into
6177 * This function will add the data contained in rx_buffer->page to the skb.
6178 * This is done either through a direct copy if the data in the buffer is
6179 * less than the skb header size, otherwise it will just attach the page as
6180 * a frag to the skb.
6182 * The function will then update the page offset if necessary and return
6183 * true if the buffer can be reused by the adapter.
6185 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6186 struct igb_rx_buffer *rx_buffer,
6187 union e1000_adv_rx_desc *rx_desc,
6188 struct sk_buff *skb)
6190 struct page *page = rx_buffer->page;
6191 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6192 #if (PAGE_SIZE < 8192)
6193 unsigned int truesize = IGB_RX_BUFSZ;
6195 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6198 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6199 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6201 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6202 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6203 va += IGB_TS_HDR_LEN;
6204 size -= IGB_TS_HDR_LEN;
6207 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6209 /* we can reuse buffer as-is, just make sure it is local */
6210 if (likely(page_to_nid(page) == numa_node_id()))
6213 /* this page cannot be reused so discard it */
6218 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6219 rx_buffer->page_offset, size, truesize);
6221 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6224 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6225 union e1000_adv_rx_desc *rx_desc,
6226 struct sk_buff *skb)
6228 struct igb_rx_buffer *rx_buffer;
6231 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6233 page = rx_buffer->page;
6237 void *page_addr = page_address(page) +
6238 rx_buffer->page_offset;
6240 /* prefetch first cache line of first page */
6241 prefetch(page_addr);
6242 #if L1_CACHE_BYTES < 128
6243 prefetch(page_addr + L1_CACHE_BYTES);
6246 /* allocate a skb to store the frags */
6247 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6249 if (unlikely(!skb)) {
6250 rx_ring->rx_stats.alloc_failed++;
6254 /* we will be copying header into skb->data in
6255 * pskb_may_pull so it is in our interest to prefetch
6256 * it now to avoid a possible cache miss
6258 prefetchw(skb->data);
6261 /* we are reusing so sync this buffer for CPU use */
6262 dma_sync_single_range_for_cpu(rx_ring->dev,
6264 rx_buffer->page_offset,
6268 /* pull page into skb */
6269 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6270 /* hand second half of page back to the ring */
6271 igb_reuse_rx_page(rx_ring, rx_buffer);
6273 /* we are not reusing the buffer so unmap it */
6274 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6275 PAGE_SIZE, DMA_FROM_DEVICE);
6278 /* clear contents of rx_buffer */
6279 rx_buffer->page = NULL;
6284 static inline void igb_rx_checksum(struct igb_ring *ring,
6285 union e1000_adv_rx_desc *rx_desc,
6286 struct sk_buff *skb)
6288 skb_checksum_none_assert(skb);
6290 /* Ignore Checksum bit is set */
6291 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6294 /* Rx checksum disabled via ethtool */
6295 if (!(ring->netdev->features & NETIF_F_RXCSUM))
6298 /* TCP/UDP checksum error bit is set */
6299 if (igb_test_staterr(rx_desc,
6300 E1000_RXDEXT_STATERR_TCPE |
6301 E1000_RXDEXT_STATERR_IPE)) {
6302 /* work around errata with sctp packets where the TCPE aka
6303 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6304 * packets, (aka let the stack check the crc32c)
6306 if (!((skb->len == 60) &&
6307 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6308 u64_stats_update_begin(&ring->rx_syncp);
6309 ring->rx_stats.csum_err++;
6310 u64_stats_update_end(&ring->rx_syncp);
6312 /* let the stack verify checksum errors */
6315 /* It must be a TCP or UDP packet with a valid checksum */
6316 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6317 E1000_RXD_STAT_UDPCS))
6318 skb->ip_summed = CHECKSUM_UNNECESSARY;
6320 dev_dbg(ring->dev, "cksum success: bits %08X\n",
6321 le32_to_cpu(rx_desc->wb.upper.status_error));
6324 static inline void igb_rx_hash(struct igb_ring *ring,
6325 union e1000_adv_rx_desc *rx_desc,
6326 struct sk_buff *skb)
6328 if (ring->netdev->features & NETIF_F_RXHASH)
6329 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6333 * igb_is_non_eop - process handling of non-EOP buffers
6334 * @rx_ring: Rx ring being processed
6335 * @rx_desc: Rx descriptor for current buffer
6336 * @skb: current socket buffer containing buffer in progress
6338 * This function updates next to clean. If the buffer is an EOP buffer
6339 * this function exits returning false, otherwise it will place the
6340 * sk_buff in the next buffer to be chained and return true indicating
6341 * that this is in fact a non-EOP buffer.
6343 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6344 union e1000_adv_rx_desc *rx_desc)
6346 u32 ntc = rx_ring->next_to_clean + 1;
6348 /* fetch, update, and store next to clean */
6349 ntc = (ntc < rx_ring->count) ? ntc : 0;
6350 rx_ring->next_to_clean = ntc;
6352 prefetch(IGB_RX_DESC(rx_ring, ntc));
6354 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6361 * igb_get_headlen - determine size of header for LRO/GRO
6362 * @data: pointer to the start of the headers
6363 * @max_len: total length of section to find headers in
6365 * This function is meant to determine the length of headers that will
6366 * be recognized by hardware for LRO, and GRO offloads. The main
6367 * motivation of doing this is to only perform one pull for IPv4 TCP
6368 * packets so that we can do basic things like calculating the gso_size
6369 * based on the average data per packet.
6371 static unsigned int igb_get_headlen(unsigned char *data,
6372 unsigned int max_len)
6375 unsigned char *network;
6378 struct vlan_hdr *vlan;
6381 struct ipv6hdr *ipv6;
6384 u8 nexthdr = 0; /* default to not TCP */
6387 /* this should never happen, but better safe than sorry */
6388 if (max_len < ETH_HLEN)
6391 /* initialize network frame pointer */
6394 /* set first protocol and move network header forward */
6395 protocol = hdr.eth->h_proto;
6396 hdr.network += ETH_HLEN;
6398 /* handle any vlan tag if present */
6399 if (protocol == __constant_htons(ETH_P_8021Q)) {
6400 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6403 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6404 hdr.network += VLAN_HLEN;
6407 /* handle L3 protocols */
6408 if (protocol == __constant_htons(ETH_P_IP)) {
6409 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6412 /* access ihl as a u8 to avoid unaligned access on ia64 */
6413 hlen = (hdr.network[0] & 0x0F) << 2;
6415 /* verify hlen meets minimum size requirements */
6416 if (hlen < sizeof(struct iphdr))
6417 return hdr.network - data;
6419 /* record next protocol if header is present */
6420 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6421 nexthdr = hdr.ipv4->protocol;
6422 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6423 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6426 /* record next protocol */
6427 nexthdr = hdr.ipv6->nexthdr;
6428 hlen = sizeof(struct ipv6hdr);
6430 return hdr.network - data;
6433 /* relocate pointer to start of L4 header */
6434 hdr.network += hlen;
6436 /* finally sort out TCP */
6437 if (nexthdr == IPPROTO_TCP) {
6438 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6441 /* access doff as a u8 to avoid unaligned access on ia64 */
6442 hlen = (hdr.network[12] & 0xF0) >> 2;
6444 /* verify hlen meets minimum size requirements */
6445 if (hlen < sizeof(struct tcphdr))
6446 return hdr.network - data;
6448 hdr.network += hlen;
6449 } else if (nexthdr == IPPROTO_UDP) {
6450 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6453 hdr.network += sizeof(struct udphdr);
6456 /* If everything has gone correctly hdr.network should be the
6457 * data section of the packet and will be the end of the header.
6458 * If not then it probably represents the end of the last recognized
6461 if ((hdr.network - data) < max_len)
6462 return hdr.network - data;
6468 * igb_pull_tail - igb specific version of skb_pull_tail
6469 * @rx_ring: rx descriptor ring packet is being transacted on
6470 * @rx_desc: pointer to the EOP Rx descriptor
6471 * @skb: pointer to current skb being adjusted
6473 * This function is an igb specific version of __pskb_pull_tail. The
6474 * main difference between this version and the original function is that
6475 * this function can make several assumptions about the state of things
6476 * that allow for significant optimizations versus the standard function.
6477 * As a result we can do things like drop a frag and maintain an accurate
6478 * truesize for the skb.
6480 static void igb_pull_tail(struct igb_ring *rx_ring,
6481 union e1000_adv_rx_desc *rx_desc,
6482 struct sk_buff *skb)
6484 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6486 unsigned int pull_len;
6488 /* it is valid to use page_address instead of kmap since we are
6489 * working with pages allocated out of the lomem pool per
6490 * alloc_page(GFP_ATOMIC)
6492 va = skb_frag_address(frag);
6494 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6495 /* retrieve timestamp from buffer */
6496 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6498 /* update pointers to remove timestamp header */
6499 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6500 frag->page_offset += IGB_TS_HDR_LEN;
6501 skb->data_len -= IGB_TS_HDR_LEN;
6502 skb->len -= IGB_TS_HDR_LEN;
6504 /* move va to start of packet data */
6505 va += IGB_TS_HDR_LEN;
6508 /* we need the header to contain the greater of either ETH_HLEN or
6509 * 60 bytes if the skb->len is less than 60 for skb_pad.
6511 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6513 /* align pull length to size of long to optimize memcpy performance */
6514 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6516 /* update all of the pointers */
6517 skb_frag_size_sub(frag, pull_len);
6518 frag->page_offset += pull_len;
6519 skb->data_len -= pull_len;
6520 skb->tail += pull_len;
6524 * igb_cleanup_headers - Correct corrupted or empty headers
6525 * @rx_ring: rx descriptor ring packet is being transacted on
6526 * @rx_desc: pointer to the EOP Rx descriptor
6527 * @skb: pointer to current skb being fixed
6529 * Address the case where we are pulling data in on pages only
6530 * and as such no data is present in the skb header.
6532 * In addition if skb is not at least 60 bytes we need to pad it so that
6533 * it is large enough to qualify as a valid Ethernet frame.
6535 * Returns true if an error was encountered and skb was freed.
6537 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6538 union e1000_adv_rx_desc *rx_desc,
6539 struct sk_buff *skb)
6541 if (unlikely((igb_test_staterr(rx_desc,
6542 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6543 struct net_device *netdev = rx_ring->netdev;
6544 if (!(netdev->features & NETIF_F_RXALL)) {
6545 dev_kfree_skb_any(skb);
6550 /* place header in linear portion of buffer */
6551 if (skb_is_nonlinear(skb))
6552 igb_pull_tail(rx_ring, rx_desc, skb);
6554 /* if skb_pad returns an error the skb was freed */
6555 if (unlikely(skb->len < 60)) {
6556 int pad_len = 60 - skb->len;
6558 if (skb_pad(skb, pad_len))
6560 __skb_put(skb, pad_len);
6567 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6568 * @rx_ring: rx descriptor ring packet is being transacted on
6569 * @rx_desc: pointer to the EOP Rx descriptor
6570 * @skb: pointer to current skb being populated
6572 * This function checks the ring, descriptor, and packet information in
6573 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6574 * other fields within the skb.
6576 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6577 union e1000_adv_rx_desc *rx_desc,
6578 struct sk_buff *skb)
6580 struct net_device *dev = rx_ring->netdev;
6582 igb_rx_hash(rx_ring, rx_desc, skb);
6584 igb_rx_checksum(rx_ring, rx_desc, skb);
6586 igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6588 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6589 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6591 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6592 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6593 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6595 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6597 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6600 skb_record_rx_queue(skb, rx_ring->queue_index);
6602 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6605 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6607 struct igb_ring *rx_ring = q_vector->rx.ring;
6608 struct sk_buff *skb = rx_ring->skb;
6609 unsigned int total_bytes = 0, total_packets = 0;
6610 u16 cleaned_count = igb_desc_unused(rx_ring);
6613 union e1000_adv_rx_desc *rx_desc;
6615 /* return some buffers to hardware, one at a time is too slow */
6616 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6617 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6621 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6623 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6626 /* This memory barrier is needed to keep us from reading
6627 * any other fields out of the rx_desc until we know the
6628 * RXD_STAT_DD bit is set
6632 /* retrieve a buffer from the ring */
6633 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6635 /* exit if we failed to retrieve a buffer */
6641 /* fetch next buffer in frame if non-eop */
6642 if (igb_is_non_eop(rx_ring, rx_desc))
6645 /* verify the packet layout is correct */
6646 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6651 /* probably a little skewed due to removing CRC */
6652 total_bytes += skb->len;
6654 /* populate checksum, timestamp, VLAN, and protocol */
6655 igb_process_skb_fields(rx_ring, rx_desc, skb);
6657 napi_gro_receive(&q_vector->napi, skb);
6659 /* reset skb pointer */
6662 /* update budget accounting */
6664 } while (likely(total_packets < budget));
6666 /* place incomplete frames back on ring for completion */
6669 u64_stats_update_begin(&rx_ring->rx_syncp);
6670 rx_ring->rx_stats.packets += total_packets;
6671 rx_ring->rx_stats.bytes += total_bytes;
6672 u64_stats_update_end(&rx_ring->rx_syncp);
6673 q_vector->rx.total_packets += total_packets;
6674 q_vector->rx.total_bytes += total_bytes;
6677 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6679 return (total_packets < budget);
6682 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6683 struct igb_rx_buffer *bi)
6685 struct page *page = bi->page;
6688 /* since we are recycling buffers we should seldom need to alloc */
6692 /* alloc new page for storage */
6693 page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6694 if (unlikely(!page)) {
6695 rx_ring->rx_stats.alloc_failed++;
6699 /* map page for use */
6700 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6702 /* if mapping failed free memory back to system since
6703 * there isn't much point in holding memory we can't use
6705 if (dma_mapping_error(rx_ring->dev, dma)) {
6708 rx_ring->rx_stats.alloc_failed++;
6714 bi->page_offset = 0;
6720 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6721 * @adapter: address of board private structure
6723 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6725 union e1000_adv_rx_desc *rx_desc;
6726 struct igb_rx_buffer *bi;
6727 u16 i = rx_ring->next_to_use;
6733 rx_desc = IGB_RX_DESC(rx_ring, i);
6734 bi = &rx_ring->rx_buffer_info[i];
6735 i -= rx_ring->count;
6738 if (!igb_alloc_mapped_page(rx_ring, bi))
6741 /* Refresh the desc even if buffer_addrs didn't change
6742 * because each write-back erases this info.
6744 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6750 rx_desc = IGB_RX_DESC(rx_ring, 0);
6751 bi = rx_ring->rx_buffer_info;
6752 i -= rx_ring->count;
6755 /* clear the hdr_addr for the next_to_use descriptor */
6756 rx_desc->read.hdr_addr = 0;
6759 } while (cleaned_count);
6761 i += rx_ring->count;
6763 if (rx_ring->next_to_use != i) {
6764 /* record the next descriptor to use */
6765 rx_ring->next_to_use = i;
6767 /* update next to alloc since we have filled the ring */
6768 rx_ring->next_to_alloc = i;
6770 /* Force memory writes to complete before letting h/w
6771 * know there are new descriptors to fetch. (Only
6772 * applicable for weak-ordered memory model archs,
6776 writel(i, rx_ring->tail);
6786 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6788 struct igb_adapter *adapter = netdev_priv(netdev);
6789 struct mii_ioctl_data *data = if_mii(ifr);
6791 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6796 data->phy_id = adapter->hw.phy.addr;
6799 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6816 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6822 return igb_mii_ioctl(netdev, ifr, cmd);
6824 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6830 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6832 struct igb_adapter *adapter = hw->back;
6834 if (pcie_capability_read_word(adapter->pdev, reg, value))
6835 return -E1000_ERR_CONFIG;
6840 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6842 struct igb_adapter *adapter = hw->back;
6844 if (pcie_capability_write_word(adapter->pdev, reg, *value))
6845 return -E1000_ERR_CONFIG;
6850 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6852 struct igb_adapter *adapter = netdev_priv(netdev);
6853 struct e1000_hw *hw = &adapter->hw;
6855 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
6858 /* enable VLAN tag insert/strip */
6859 ctrl = rd32(E1000_CTRL);
6860 ctrl |= E1000_CTRL_VME;
6861 wr32(E1000_CTRL, ctrl);
6863 /* Disable CFI check */
6864 rctl = rd32(E1000_RCTL);
6865 rctl &= ~E1000_RCTL_CFIEN;
6866 wr32(E1000_RCTL, rctl);
6868 /* disable VLAN tag insert/strip */
6869 ctrl = rd32(E1000_CTRL);
6870 ctrl &= ~E1000_CTRL_VME;
6871 wr32(E1000_CTRL, ctrl);
6874 igb_rlpml_set(adapter);
6877 static int igb_vlan_rx_add_vid(struct net_device *netdev,
6878 __be16 proto, u16 vid)
6880 struct igb_adapter *adapter = netdev_priv(netdev);
6881 struct e1000_hw *hw = &adapter->hw;
6882 int pf_id = adapter->vfs_allocated_count;
6884 /* attempt to add filter to vlvf array */
6885 igb_vlvf_set(adapter, vid, true, pf_id);
6887 /* add the filter since PF can receive vlans w/o entry in vlvf */
6888 igb_vfta_set(hw, vid, true);
6890 set_bit(vid, adapter->active_vlans);
6895 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
6896 __be16 proto, u16 vid)
6898 struct igb_adapter *adapter = netdev_priv(netdev);
6899 struct e1000_hw *hw = &adapter->hw;
6900 int pf_id = adapter->vfs_allocated_count;
6903 /* remove vlan from VLVF table array */
6904 err = igb_vlvf_set(adapter, vid, false, pf_id);
6906 /* if vid was not present in VLVF just remove it from table */
6908 igb_vfta_set(hw, vid, false);
6910 clear_bit(vid, adapter->active_vlans);
6915 static void igb_restore_vlan(struct igb_adapter *adapter)
6919 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
6921 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6922 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
6925 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6927 struct pci_dev *pdev = adapter->pdev;
6928 struct e1000_mac_info *mac = &adapter->hw.mac;
6932 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6933 * for the switch() below to work
6935 if ((spd & 1) || (dplx & ~1))
6938 /* Fiber NIC's only allow 1000 gbps Full duplex
6939 * and 100Mbps Full duplex for 100baseFx sfp
6941 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
6942 switch (spd + dplx) {
6943 case SPEED_10 + DUPLEX_HALF:
6944 case SPEED_10 + DUPLEX_FULL:
6945 case SPEED_100 + DUPLEX_HALF:
6952 switch (spd + dplx) {
6953 case SPEED_10 + DUPLEX_HALF:
6954 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6956 case SPEED_10 + DUPLEX_FULL:
6957 mac->forced_speed_duplex = ADVERTISE_10_FULL;
6959 case SPEED_100 + DUPLEX_HALF:
6960 mac->forced_speed_duplex = ADVERTISE_100_HALF;
6962 case SPEED_100 + DUPLEX_FULL:
6963 mac->forced_speed_duplex = ADVERTISE_100_FULL;
6965 case SPEED_1000 + DUPLEX_FULL:
6967 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
6969 case SPEED_1000 + DUPLEX_HALF: /* not supported */
6974 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
6975 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6980 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
6984 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
6987 struct net_device *netdev = pci_get_drvdata(pdev);
6988 struct igb_adapter *adapter = netdev_priv(netdev);
6989 struct e1000_hw *hw = &adapter->hw;
6990 u32 ctrl, rctl, status;
6991 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6996 netif_device_detach(netdev);
6998 if (netif_running(netdev))
6999 __igb_close(netdev, true);
7001 igb_clear_interrupt_scheme(adapter);
7004 retval = pci_save_state(pdev);
7009 status = rd32(E1000_STATUS);
7010 if (status & E1000_STATUS_LU)
7011 wufc &= ~E1000_WUFC_LNKC;
7014 igb_setup_rctl(adapter);
7015 igb_set_rx_mode(netdev);
7017 /* turn on all-multi mode if wake on multicast is enabled */
7018 if (wufc & E1000_WUFC_MC) {
7019 rctl = rd32(E1000_RCTL);
7020 rctl |= E1000_RCTL_MPE;
7021 wr32(E1000_RCTL, rctl);
7024 ctrl = rd32(E1000_CTRL);
7025 /* advertise wake from D3Cold */
7026 #define E1000_CTRL_ADVD3WUC 0x00100000
7027 /* phy power management enable */
7028 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7029 ctrl |= E1000_CTRL_ADVD3WUC;
7030 wr32(E1000_CTRL, ctrl);
7032 /* Allow time for pending master requests to run */
7033 igb_disable_pcie_master(hw);
7035 wr32(E1000_WUC, E1000_WUC_PME_EN);
7036 wr32(E1000_WUFC, wufc);
7039 wr32(E1000_WUFC, 0);
7042 *enable_wake = wufc || adapter->en_mng_pt;
7044 igb_power_down_link(adapter);
7046 igb_power_up_link(adapter);
7048 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7049 * would have already happened in close and is redundant.
7051 igb_release_hw_control(adapter);
7053 pci_disable_device(pdev);
7059 #ifdef CONFIG_PM_SLEEP
7060 static int igb_suspend(struct device *dev)
7064 struct pci_dev *pdev = to_pci_dev(dev);
7066 retval = __igb_shutdown(pdev, &wake, 0);
7071 pci_prepare_to_sleep(pdev);
7073 pci_wake_from_d3(pdev, false);
7074 pci_set_power_state(pdev, PCI_D3hot);
7079 #endif /* CONFIG_PM_SLEEP */
7081 static int igb_resume(struct device *dev)
7083 struct pci_dev *pdev = to_pci_dev(dev);
7084 struct net_device *netdev = pci_get_drvdata(pdev);
7085 struct igb_adapter *adapter = netdev_priv(netdev);
7086 struct e1000_hw *hw = &adapter->hw;
7089 pci_set_power_state(pdev, PCI_D0);
7090 pci_restore_state(pdev);
7091 pci_save_state(pdev);
7093 err = pci_enable_device_mem(pdev);
7096 "igb: Cannot enable PCI device from suspend\n");
7099 pci_set_master(pdev);
7101 pci_enable_wake(pdev, PCI_D3hot, 0);
7102 pci_enable_wake(pdev, PCI_D3cold, 0);
7104 if (igb_init_interrupt_scheme(adapter, true)) {
7105 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7111 /* let the f/w know that the h/w is now under the control of the
7114 igb_get_hw_control(adapter);
7116 wr32(E1000_WUS, ~0);
7118 if (netdev->flags & IFF_UP) {
7120 err = __igb_open(netdev, true);
7126 netif_device_attach(netdev);
7130 #ifdef CONFIG_PM_RUNTIME
7131 static int igb_runtime_idle(struct device *dev)
7133 struct pci_dev *pdev = to_pci_dev(dev);
7134 struct net_device *netdev = pci_get_drvdata(pdev);
7135 struct igb_adapter *adapter = netdev_priv(netdev);
7137 if (!igb_has_link(adapter))
7138 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7143 static int igb_runtime_suspend(struct device *dev)
7145 struct pci_dev *pdev = to_pci_dev(dev);
7149 retval = __igb_shutdown(pdev, &wake, 1);
7154 pci_prepare_to_sleep(pdev);
7156 pci_wake_from_d3(pdev, false);
7157 pci_set_power_state(pdev, PCI_D3hot);
7163 static int igb_runtime_resume(struct device *dev)
7165 return igb_resume(dev);
7167 #endif /* CONFIG_PM_RUNTIME */
7170 static void igb_shutdown(struct pci_dev *pdev)
7174 __igb_shutdown(pdev, &wake, 0);
7176 if (system_state == SYSTEM_POWER_OFF) {
7177 pci_wake_from_d3(pdev, wake);
7178 pci_set_power_state(pdev, PCI_D3hot);
7182 #ifdef CONFIG_PCI_IOV
7183 static int igb_sriov_reinit(struct pci_dev *dev)
7185 struct net_device *netdev = pci_get_drvdata(dev);
7186 struct igb_adapter *adapter = netdev_priv(netdev);
7187 struct pci_dev *pdev = adapter->pdev;
7191 if (netif_running(netdev))
7194 igb_clear_interrupt_scheme(adapter);
7196 igb_init_queue_configuration(adapter);
7198 if (igb_init_interrupt_scheme(adapter, true)) {
7199 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7203 if (netif_running(netdev))
7211 static int igb_pci_disable_sriov(struct pci_dev *dev)
7213 int err = igb_disable_sriov(dev);
7216 err = igb_sriov_reinit(dev);
7221 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7223 int err = igb_enable_sriov(dev, num_vfs);
7228 err = igb_sriov_reinit(dev);
7237 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7239 #ifdef CONFIG_PCI_IOV
7241 return igb_pci_disable_sriov(dev);
7243 return igb_pci_enable_sriov(dev, num_vfs);
7248 #ifdef CONFIG_NET_POLL_CONTROLLER
7249 /* Polling 'interrupt' - used by things like netconsole to send skbs
7250 * without having to re-enable interrupts. It's not called while
7251 * the interrupt routine is executing.
7253 static void igb_netpoll(struct net_device *netdev)
7255 struct igb_adapter *adapter = netdev_priv(netdev);
7256 struct e1000_hw *hw = &adapter->hw;
7257 struct igb_q_vector *q_vector;
7260 for (i = 0; i < adapter->num_q_vectors; i++) {
7261 q_vector = adapter->q_vector[i];
7262 if (adapter->msix_entries)
7263 wr32(E1000_EIMC, q_vector->eims_value);
7265 igb_irq_disable(adapter);
7266 napi_schedule(&q_vector->napi);
7269 #endif /* CONFIG_NET_POLL_CONTROLLER */
7272 * igb_io_error_detected - called when PCI error is detected
7273 * @pdev: Pointer to PCI device
7274 * @state: The current pci connection state
7276 * This function is called after a PCI bus error affecting
7277 * this device has been detected.
7279 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7280 pci_channel_state_t state)
7282 struct net_device *netdev = pci_get_drvdata(pdev);
7283 struct igb_adapter *adapter = netdev_priv(netdev);
7285 netif_device_detach(netdev);
7287 if (state == pci_channel_io_perm_failure)
7288 return PCI_ERS_RESULT_DISCONNECT;
7290 if (netif_running(netdev))
7292 pci_disable_device(pdev);
7294 /* Request a slot slot reset. */
7295 return PCI_ERS_RESULT_NEED_RESET;
7299 * igb_io_slot_reset - called after the pci bus has been reset.
7300 * @pdev: Pointer to PCI device
7302 * Restart the card from scratch, as if from a cold-boot. Implementation
7303 * resembles the first-half of the igb_resume routine.
7305 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7307 struct net_device *netdev = pci_get_drvdata(pdev);
7308 struct igb_adapter *adapter = netdev_priv(netdev);
7309 struct e1000_hw *hw = &adapter->hw;
7310 pci_ers_result_t result;
7313 if (pci_enable_device_mem(pdev)) {
7315 "Cannot re-enable PCI device after reset.\n");
7316 result = PCI_ERS_RESULT_DISCONNECT;
7318 pci_set_master(pdev);
7319 pci_restore_state(pdev);
7320 pci_save_state(pdev);
7322 pci_enable_wake(pdev, PCI_D3hot, 0);
7323 pci_enable_wake(pdev, PCI_D3cold, 0);
7326 wr32(E1000_WUS, ~0);
7327 result = PCI_ERS_RESULT_RECOVERED;
7330 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7333 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7335 /* non-fatal, continue */
7342 * igb_io_resume - called when traffic can start flowing again.
7343 * @pdev: Pointer to PCI device
7345 * This callback is called when the error recovery driver tells us that
7346 * its OK to resume normal operation. Implementation resembles the
7347 * second-half of the igb_resume routine.
7349 static void igb_io_resume(struct pci_dev *pdev)
7351 struct net_device *netdev = pci_get_drvdata(pdev);
7352 struct igb_adapter *adapter = netdev_priv(netdev);
7354 if (netif_running(netdev)) {
7355 if (igb_up(adapter)) {
7356 dev_err(&pdev->dev, "igb_up failed after reset\n");
7361 netif_device_attach(netdev);
7363 /* let the f/w know that the h/w is now under the control of the
7366 igb_get_hw_control(adapter);
7369 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7372 u32 rar_low, rar_high;
7373 struct e1000_hw *hw = &adapter->hw;
7375 /* HW expects these in little endian so we reverse the byte order
7376 * from network order (big endian) to little endian
7378 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7379 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7380 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7382 /* Indicate to hardware the Address is Valid. */
7383 rar_high |= E1000_RAH_AV;
7385 if (hw->mac.type == e1000_82575)
7386 rar_high |= E1000_RAH_POOL_1 * qsel;
7388 rar_high |= E1000_RAH_POOL_1 << qsel;
7390 wr32(E1000_RAL(index), rar_low);
7392 wr32(E1000_RAH(index), rar_high);
7396 static int igb_set_vf_mac(struct igb_adapter *adapter,
7397 int vf, unsigned char *mac_addr)
7399 struct e1000_hw *hw = &adapter->hw;
7400 /* VF MAC addresses start at end of receive addresses and moves
7401 * towards the first, as a result a collision should not be possible
7403 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7405 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7407 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7412 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7414 struct igb_adapter *adapter = netdev_priv(netdev);
7415 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7417 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7418 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7419 dev_info(&adapter->pdev->dev,
7420 "Reload the VF driver to make this change effective.");
7421 if (test_bit(__IGB_DOWN, &adapter->state)) {
7422 dev_warn(&adapter->pdev->dev,
7423 "The VF MAC address has been set, but the PF device is not up.\n");
7424 dev_warn(&adapter->pdev->dev,
7425 "Bring the PF device up before attempting to use the VF device.\n");
7427 return igb_set_vf_mac(adapter, vf, mac);
7430 static int igb_link_mbps(int internal_link_speed)
7432 switch (internal_link_speed) {
7442 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7449 /* Calculate the rate factor values to set */
7450 rf_int = link_speed / tx_rate;
7451 rf_dec = (link_speed - (rf_int * tx_rate));
7452 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7455 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7456 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7457 E1000_RTTBCNRC_RF_INT_MASK);
7458 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7463 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7464 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7465 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7467 wr32(E1000_RTTBCNRM, 0x14);
7468 wr32(E1000_RTTBCNRC, bcnrc_val);
7471 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7473 int actual_link_speed, i;
7474 bool reset_rate = false;
7476 /* VF TX rate limit was not set or not supported */
7477 if ((adapter->vf_rate_link_speed == 0) ||
7478 (adapter->hw.mac.type != e1000_82576))
7481 actual_link_speed = igb_link_mbps(adapter->link_speed);
7482 if (actual_link_speed != adapter->vf_rate_link_speed) {
7484 adapter->vf_rate_link_speed = 0;
7485 dev_info(&adapter->pdev->dev,
7486 "Link speed has been changed. VF Transmit rate is disabled\n");
7489 for (i = 0; i < adapter->vfs_allocated_count; i++) {
7491 adapter->vf_data[i].tx_rate = 0;
7493 igb_set_vf_rate_limit(&adapter->hw, i,
7494 adapter->vf_data[i].tx_rate,
7499 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7501 struct igb_adapter *adapter = netdev_priv(netdev);
7502 struct e1000_hw *hw = &adapter->hw;
7503 int actual_link_speed;
7505 if (hw->mac.type != e1000_82576)
7508 actual_link_speed = igb_link_mbps(adapter->link_speed);
7509 if ((vf >= adapter->vfs_allocated_count) ||
7510 (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7511 (tx_rate < 0) || (tx_rate > actual_link_speed))
7514 adapter->vf_rate_link_speed = actual_link_speed;
7515 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7516 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7521 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7524 struct igb_adapter *adapter = netdev_priv(netdev);
7525 struct e1000_hw *hw = &adapter->hw;
7526 u32 reg_val, reg_offset;
7528 if (!adapter->vfs_allocated_count)
7531 if (vf >= adapter->vfs_allocated_count)
7534 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7535 reg_val = rd32(reg_offset);
7537 reg_val |= ((1 << vf) |
7538 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7540 reg_val &= ~((1 << vf) |
7541 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7542 wr32(reg_offset, reg_val);
7544 adapter->vf_data[vf].spoofchk_enabled = setting;
7545 return E1000_SUCCESS;
7548 static int igb_ndo_get_vf_config(struct net_device *netdev,
7549 int vf, struct ifla_vf_info *ivi)
7551 struct igb_adapter *adapter = netdev_priv(netdev);
7552 if (vf >= adapter->vfs_allocated_count)
7555 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7556 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7557 ivi->vlan = adapter->vf_data[vf].pf_vlan;
7558 ivi->qos = adapter->vf_data[vf].pf_qos;
7559 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7563 static void igb_vmm_control(struct igb_adapter *adapter)
7565 struct e1000_hw *hw = &adapter->hw;
7568 switch (hw->mac.type) {
7574 /* replication is not supported for 82575 */
7577 /* notify HW that the MAC is adding vlan tags */
7578 reg = rd32(E1000_DTXCTL);
7579 reg |= E1000_DTXCTL_VLAN_ADDED;
7580 wr32(E1000_DTXCTL, reg);
7582 /* enable replication vlan tag stripping */
7583 reg = rd32(E1000_RPLOLR);
7584 reg |= E1000_RPLOLR_STRVLAN;
7585 wr32(E1000_RPLOLR, reg);
7587 /* none of the above registers are supported by i350 */
7591 if (adapter->vfs_allocated_count) {
7592 igb_vmdq_set_loopback_pf(hw, true);
7593 igb_vmdq_set_replication_pf(hw, true);
7594 igb_vmdq_set_anti_spoofing_pf(hw, true,
7595 adapter->vfs_allocated_count);
7597 igb_vmdq_set_loopback_pf(hw, false);
7598 igb_vmdq_set_replication_pf(hw, false);
7602 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7604 struct e1000_hw *hw = &adapter->hw;
7608 if (hw->mac.type > e1000_82580) {
7609 if (adapter->flags & IGB_FLAG_DMAC) {
7612 /* force threshold to 0. */
7613 wr32(E1000_DMCTXTH, 0);
7615 /* DMA Coalescing high water mark needs to be greater
7616 * than the Rx threshold. Set hwm to PBA - max frame
7617 * size in 16B units, capping it at PBA - 6KB.
7619 hwm = 64 * pba - adapter->max_frame_size / 16;
7620 if (hwm < 64 * (pba - 6))
7621 hwm = 64 * (pba - 6);
7622 reg = rd32(E1000_FCRTC);
7623 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7624 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7625 & E1000_FCRTC_RTH_COAL_MASK);
7626 wr32(E1000_FCRTC, reg);
7628 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7629 * frame size, capping it at PBA - 10KB.
7631 dmac_thr = pba - adapter->max_frame_size / 512;
7632 if (dmac_thr < pba - 10)
7633 dmac_thr = pba - 10;
7634 reg = rd32(E1000_DMACR);
7635 reg &= ~E1000_DMACR_DMACTHR_MASK;
7636 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7637 & E1000_DMACR_DMACTHR_MASK);
7639 /* transition to L0x or L1 if available..*/
7640 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7642 /* watchdog timer= +-1000 usec in 32usec intervals */
7645 /* Disable BMC-to-OS Watchdog Enable */
7646 if (hw->mac.type != e1000_i354)
7647 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7649 wr32(E1000_DMACR, reg);
7651 /* no lower threshold to disable
7652 * coalescing(smart fifb)-UTRESH=0
7654 wr32(E1000_DMCRTRH, 0);
7656 reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7658 wr32(E1000_DMCTLX, reg);
7660 /* free space in tx packet buffer to wake from
7663 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7664 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7666 /* make low power state decision controlled
7669 reg = rd32(E1000_PCIEMISC);
7670 reg &= ~E1000_PCIEMISC_LX_DECISION;
7671 wr32(E1000_PCIEMISC, reg);
7672 } /* endif adapter->dmac is not disabled */
7673 } else if (hw->mac.type == e1000_82580) {
7674 u32 reg = rd32(E1000_PCIEMISC);
7675 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7676 wr32(E1000_DMACR, 0);
7681 * igb_read_i2c_byte - Reads 8 bit word over I2C
7682 * @hw: pointer to hardware structure
7683 * @byte_offset: byte offset to read
7684 * @dev_addr: device address
7687 * Performs byte read operation over I2C interface at
7688 * a specified device address.
7690 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7691 u8 dev_addr, u8 *data)
7693 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7694 struct i2c_client *this_client = adapter->i2c_client;
7699 return E1000_ERR_I2C;
7701 swfw_mask = E1000_SWFW_PHY0_SM;
7703 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7705 return E1000_ERR_SWFW_SYNC;
7707 status = i2c_smbus_read_byte_data(this_client, byte_offset);
7708 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7711 return E1000_ERR_I2C;
7714 return E1000_SUCCESS;
7719 * igb_write_i2c_byte - Writes 8 bit word over I2C
7720 * @hw: pointer to hardware structure
7721 * @byte_offset: byte offset to write
7722 * @dev_addr: device address
7723 * @data: value to write
7725 * Performs byte write operation over I2C interface at
7726 * a specified device address.
7728 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7729 u8 dev_addr, u8 data)
7731 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7732 struct i2c_client *this_client = adapter->i2c_client;
7734 u16 swfw_mask = E1000_SWFW_PHY0_SM;
7737 return E1000_ERR_I2C;
7739 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7740 return E1000_ERR_SWFW_SYNC;
7741 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7742 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7745 return E1000_ERR_I2C;
7747 return E1000_SUCCESS;