1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 ******************************************************************************/
32 #include <linux/types.h>
33 #include <linux/if_ether.h>
36 #include "e1000_i210.h"
38 static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw);
39 static void igb_put_hw_semaphore_i210(struct e1000_hw *hw);
40 static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
42 static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw);
45 * igb_acquire_nvm_i210 - Request for access to EEPROM
46 * @hw: pointer to the HW structure
48 * Acquire the necessary semaphores for exclusive access to the EEPROM.
49 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
50 * Return successful if access grant bit set, else clear the request for
51 * EEPROM access and return -E1000_ERR_NVM (-1).
53 s32 igb_acquire_nvm_i210(struct e1000_hw *hw)
55 return igb_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
59 * igb_release_nvm_i210 - Release exclusive access to EEPROM
60 * @hw: pointer to the HW structure
62 * Stop any current commands to the EEPROM and clear the EEPROM request bit,
63 * then release the semaphores acquired.
65 void igb_release_nvm_i210(struct e1000_hw *hw)
67 igb_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
71 * igb_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
72 * @hw: pointer to the HW structure
73 * @mask: specifies which semaphore to acquire
75 * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
76 * will also specify which port we're acquiring the lock for.
78 s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
82 u32 fwmask = mask << 16;
83 s32 ret_val = E1000_SUCCESS;
84 s32 i = 0, timeout = 200; /* FIXME: find real value to use here */
87 if (igb_get_hw_semaphore_i210(hw)) {
88 ret_val = -E1000_ERR_SWFW_SYNC;
92 swfw_sync = rd32(E1000_SW_FW_SYNC);
93 if (!(swfw_sync & fwmask))
97 * Firmware currently using resource (fwmask)
99 igb_put_hw_semaphore_i210(hw);
105 hw_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");
106 ret_val = -E1000_ERR_SWFW_SYNC;
111 wr32(E1000_SW_FW_SYNC, swfw_sync);
113 igb_put_hw_semaphore_i210(hw);
119 * igb_release_swfw_sync_i210 - Release SW/FW semaphore
120 * @hw: pointer to the HW structure
121 * @mask: specifies which semaphore to acquire
123 * Release the SW/FW semaphore used to access the PHY or NVM. The mask
124 * will also specify which port we're releasing the lock for.
126 void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
130 while (igb_get_hw_semaphore_i210(hw) != E1000_SUCCESS)
133 swfw_sync = rd32(E1000_SW_FW_SYNC);
135 wr32(E1000_SW_FW_SYNC, swfw_sync);
137 igb_put_hw_semaphore_i210(hw);
141 * igb_get_hw_semaphore_i210 - Acquire hardware semaphore
142 * @hw: pointer to the HW structure
144 * Acquire the HW semaphore to access the PHY or NVM
146 static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)
149 s32 ret_val = E1000_SUCCESS;
150 s32 timeout = hw->nvm.word_size + 1;
153 /* Get the FW semaphore. */
154 for (i = 0; i < timeout; i++) {
155 swsm = rd32(E1000_SWSM);
156 wr32(E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
158 /* Semaphore acquired if bit latched */
159 if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI)
166 /* Release semaphores */
167 igb_put_hw_semaphore(hw);
168 hw_dbg("Driver can't access the NVM\n");
169 ret_val = -E1000_ERR_NVM;
178 * igb_put_hw_semaphore_i210 - Release hardware semaphore
179 * @hw: pointer to the HW structure
181 * Release hardware semaphore used to access the PHY or NVM
183 static void igb_put_hw_semaphore_i210(struct e1000_hw *hw)
187 swsm = rd32(E1000_SWSM);
189 swsm &= ~E1000_SWSM_SWESMBI;
191 wr32(E1000_SWSM, swsm);
195 * igb_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
196 * @hw: pointer to the HW structure
197 * @offset: offset of word in the Shadow Ram to read
198 * @words: number of words to read
199 * @data: word read from the Shadow Ram
201 * Reads a 16 bit word from the Shadow Ram using the EERD register.
202 * Uses necessary synchronization semaphores.
204 s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,
207 s32 status = E1000_SUCCESS;
210 /* We cannot hold synchronization semaphores for too long,
211 * because of forceful takeover procedure. However it is more efficient
212 * to read in bursts than synchronizing access for each word. */
213 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
214 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
215 E1000_EERD_EEWR_MAX_COUNT : (words - i);
216 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
217 status = igb_read_nvm_eerd(hw, offset, count,
219 hw->nvm.ops.release(hw);
221 status = E1000_ERR_SWFW_SYNC;
224 if (status != E1000_SUCCESS)
232 * igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
233 * @hw: pointer to the HW structure
234 * @offset: offset within the Shadow RAM to be written to
235 * @words: number of words to write
236 * @data: 16 bit word(s) to be written to the Shadow RAM
238 * Writes data to Shadow RAM at offset using EEWR register.
240 * If e1000_update_nvm_checksum is not called after this function , the
241 * data will not be committed to FLASH and also Shadow RAM will most likely
242 * contain an invalid checksum.
244 * If error code is returned, data and Shadow RAM may be inconsistent - buffer
247 s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
250 s32 status = E1000_SUCCESS;
253 /* We cannot hold synchronization semaphores for too long,
254 * because of forceful takeover procedure. However it is more efficient
255 * to write in bursts than synchronizing access for each word. */
256 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
257 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
258 E1000_EERD_EEWR_MAX_COUNT : (words - i);
259 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
260 status = igb_write_nvm_srwr(hw, offset, count,
262 hw->nvm.ops.release(hw);
264 status = E1000_ERR_SWFW_SYNC;
267 if (status != E1000_SUCCESS)
275 * igb_write_nvm_srwr - Write to Shadow Ram using EEWR
276 * @hw: pointer to the HW structure
277 * @offset: offset within the Shadow Ram to be written to
278 * @words: number of words to write
279 * @data: 16 bit word(s) to be written to the Shadow Ram
281 * Writes data to Shadow Ram at offset using EEWR register.
283 * If igb_update_nvm_checksum is not called after this function , the
284 * Shadow Ram will most likely contain an invalid checksum.
286 static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
289 struct e1000_nvm_info *nvm = &hw->nvm;
291 u32 attempts = 100000;
292 s32 ret_val = E1000_SUCCESS;
295 * A check for invalid values: offset too large, too many words,
296 * too many words for the offset, and not enough words.
298 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
300 hw_dbg("nvm parameter(s) out of bounds\n");
301 ret_val = -E1000_ERR_NVM;
305 for (i = 0; i < words; i++) {
306 eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
307 (data[i] << E1000_NVM_RW_REG_DATA) |
308 E1000_NVM_RW_REG_START;
310 wr32(E1000_SRWR, eewr);
312 for (k = 0; k < attempts; k++) {
313 if (E1000_NVM_RW_REG_DONE &
315 ret_val = E1000_SUCCESS;
321 if (ret_val != E1000_SUCCESS) {
322 hw_dbg("Shadow RAM write EEWR timed out\n");
332 * igb_read_nvm_i211 - Read NVM wrapper function for I211
333 * @hw: pointer to the HW structure
334 * @address: the word address (aka eeprom offset) to read
335 * @data: pointer to the data read
337 * Wrapper function to return data formerly found in the NVM.
339 s32 igb_read_nvm_i211(struct e1000_hw *hw, u16 offset, u16 words,
342 s32 ret_val = E1000_SUCCESS;
344 /* Only the MAC addr is required to be present in the iNVM */
347 ret_val = igb_read_invm_i211(hw, offset, &data[0]);
348 ret_val |= igb_read_invm_i211(hw, offset+1, &data[1]);
349 ret_val |= igb_read_invm_i211(hw, offset+2, &data[2]);
350 if (ret_val != E1000_SUCCESS)
351 hw_dbg("MAC Addr not found in iNVM\n");
353 case NVM_ID_LED_SETTINGS:
354 case NVM_INIT_CTRL_2:
355 case NVM_INIT_CTRL_4:
357 case NVM_LED_0_2_CFG:
358 igb_read_invm_i211(hw, offset, data);
361 *data = ID_LED_DEFAULT_I210;
364 *data = hw->subsystem_device_id;
367 *data = hw->subsystem_vendor_id;
370 *data = hw->device_id;
373 *data = hw->vendor_id;
376 hw_dbg("NVM word 0x%02x is not mapped.\n", offset);
377 *data = NVM_RESERVED_WORD;
384 * igb_read_invm_i211 - Reads OTP
385 * @hw: pointer to the HW structure
386 * @address: the word address (aka eeprom offset) to read
387 * @data: pointer to the data read
389 * Reads 16-bit words from the OTP. Return error when the word is not
392 s32 igb_read_invm_i211(struct e1000_hw *hw, u16 address, u16 *data)
394 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
397 u8 record_type, word_address;
399 for (i = 0; i < E1000_INVM_SIZE; i++) {
400 invm_dword = rd32(E1000_INVM_DATA_REG(i));
401 /* Get record type */
402 record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
403 if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)
405 if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)
406 i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
407 if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)
408 i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
409 if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {
410 word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
411 if (word_address == (u8)address) {
412 *data = INVM_DWORD_TO_WORD_DATA(invm_dword);
413 hw_dbg("Read INVM Word 0x%02x = %x",
415 status = E1000_SUCCESS;
420 if (status != E1000_SUCCESS)
421 hw_dbg("Requested word 0x%02x not found in OTP\n", address);
426 * igb_validate_nvm_checksum_i210 - Validate EEPROM checksum
427 * @hw: pointer to the HW structure
429 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
430 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
432 s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw)
434 s32 status = E1000_SUCCESS;
435 s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);
437 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
440 * Replace the read function with semaphore grabbing with
441 * the one that skips this for a while.
442 * We have semaphore taken already here.
444 read_op_ptr = hw->nvm.ops.read;
445 hw->nvm.ops.read = igb_read_nvm_eerd;
447 status = igb_validate_nvm_checksum(hw);
449 /* Revert original read operation. */
450 hw->nvm.ops.read = read_op_ptr;
452 hw->nvm.ops.release(hw);
454 status = E1000_ERR_SWFW_SYNC;
462 * igb_update_nvm_checksum_i210 - Update EEPROM checksum
463 * @hw: pointer to the HW structure
465 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
466 * up to the checksum. Then calculates the EEPROM checksum and writes the
467 * value to the EEPROM. Next commit EEPROM data onto the Flash.
469 s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)
471 s32 ret_val = E1000_SUCCESS;
476 * Read the first word from the EEPROM. If this times out or fails, do
477 * not continue or we could be in for a very long wait while every
480 ret_val = igb_read_nvm_eerd(hw, 0, 1, &nvm_data);
481 if (ret_val != E1000_SUCCESS) {
482 hw_dbg("EEPROM read failed\n");
486 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
488 * Do not use hw->nvm.ops.write, hw->nvm.ops.read
489 * because we do not want to take the synchronization
490 * semaphores twice here.
493 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
494 ret_val = igb_read_nvm_eerd(hw, i, 1, &nvm_data);
496 hw->nvm.ops.release(hw);
497 hw_dbg("NVM Read Error while updating checksum.\n");
500 checksum += nvm_data;
502 checksum = (u16) NVM_SUM - checksum;
503 ret_val = igb_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
505 if (ret_val != E1000_SUCCESS) {
506 hw->nvm.ops.release(hw);
507 hw_dbg("NVM Write Error while updating checksum.\n");
511 hw->nvm.ops.release(hw);
513 ret_val = igb_update_flash_i210(hw);
515 ret_val = -E1000_ERR_SWFW_SYNC;
522 * igb_update_flash_i210 - Commit EEPROM to the flash
523 * @hw: pointer to the HW structure
526 s32 igb_update_flash_i210(struct e1000_hw *hw)
528 s32 ret_val = E1000_SUCCESS;
531 ret_val = igb_pool_flash_update_done_i210(hw);
532 if (ret_val == -E1000_ERR_NVM) {
533 hw_dbg("Flash update time out\n");
537 flup = rd32(E1000_EECD) | E1000_EECD_FLUPD_I210;
538 wr32(E1000_EECD, flup);
540 ret_val = igb_pool_flash_update_done_i210(hw);
541 if (ret_val == E1000_SUCCESS)
542 hw_dbg("Flash update complete\n");
544 hw_dbg("Flash update time out\n");
551 * igb_pool_flash_update_done_i210 - Pool FLUDONE status.
552 * @hw: pointer to the HW structure
555 s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)
557 s32 ret_val = -E1000_ERR_NVM;
560 for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
561 reg = rd32(E1000_EECD);
562 if (reg & E1000_EECD_FLUDONE_I210) {
563 ret_val = E1000_SUCCESS;
573 * igb_valid_led_default_i210 - Verify a valid default LED config
574 * @hw: pointer to the HW structure
575 * @data: pointer to the NVM (EEPROM)
577 * Read the EEPROM for the current default LED configuration. If the
578 * LED configuration is not valid, set to a valid LED configuration.
580 s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
584 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
586 hw_dbg("NVM Read Error\n");
590 if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
591 switch (hw->phy.media_type) {
592 case e1000_media_type_internal_serdes:
593 *data = ID_LED_DEFAULT_I210_SERDES;
595 case e1000_media_type_copper:
597 *data = ID_LED_DEFAULT_I210;