1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
34 #include <linux/netdevice.h>
36 #include "e1000_regs.h"
37 #include "e1000_defines.h"
41 #define E1000_DEV_ID_82576 0x10C9
42 #define E1000_DEV_ID_82576_FIBER 0x10E6
43 #define E1000_DEV_ID_82576_SERDES 0x10E7
44 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
45 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
46 #define E1000_DEV_ID_82576_NS 0x150A
47 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
48 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
49 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
50 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
51 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
52 #define E1000_DEV_ID_82580_COPPER 0x150E
53 #define E1000_DEV_ID_82580_FIBER 0x150F
54 #define E1000_DEV_ID_82580_SERDES 0x1510
55 #define E1000_DEV_ID_82580_SGMII 0x1511
56 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57 #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
58 #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
59 #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
60 #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
61 #define E1000_DEV_ID_DH89XXCC_SFP 0x0440
62 #define E1000_DEV_ID_I350_COPPER 0x1521
63 #define E1000_DEV_ID_I350_FIBER 0x1522
64 #define E1000_DEV_ID_I350_SERDES 0x1523
65 #define E1000_DEV_ID_I350_SGMII 0x1524
66 #define E1000_DEV_ID_I210_COPPER 0x1533
67 #define E1000_DEV_ID_I210_COPPER_OEM1 0x1534
68 #define E1000_DEV_ID_I210_COPPER_IT 0x1535
69 #define E1000_DEV_ID_I210_FIBER 0x1536
70 #define E1000_DEV_ID_I210_SERDES 0x1537
71 #define E1000_DEV_ID_I210_SGMII 0x1538
72 #define E1000_DEV_ID_I211_COPPER 0x1539
74 #define E1000_REVISION_2 2
75 #define E1000_REVISION_4 4
77 #define E1000_FUNC_0 0
78 #define E1000_FUNC_1 1
79 #define E1000_FUNC_2 2
80 #define E1000_FUNC_3 3
82 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
83 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
84 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
85 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
95 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
98 enum e1000_media_type {
99 e1000_media_type_unknown = 0,
100 e1000_media_type_copper = 1,
101 e1000_media_type_internal_serdes = 2,
102 e1000_num_media_types
105 enum e1000_nvm_type {
106 e1000_nvm_unknown = 0,
108 e1000_nvm_eeprom_spi,
113 enum e1000_nvm_override {
114 e1000_nvm_override_none = 0,
115 e1000_nvm_override_spi_small,
116 e1000_nvm_override_spi_large,
119 enum e1000_phy_type {
120 e1000_phy_unknown = 0,
132 enum e1000_bus_type {
133 e1000_bus_type_unknown = 0,
136 e1000_bus_type_pci_express,
137 e1000_bus_type_reserved
140 enum e1000_bus_speed {
141 e1000_bus_speed_unknown = 0,
147 e1000_bus_speed_2500,
148 e1000_bus_speed_5000,
149 e1000_bus_speed_reserved
152 enum e1000_bus_width {
153 e1000_bus_width_unknown = 0,
154 e1000_bus_width_pcie_x1,
155 e1000_bus_width_pcie_x2,
156 e1000_bus_width_pcie_x4 = 4,
157 e1000_bus_width_pcie_x8 = 8,
160 e1000_bus_width_reserved
163 enum e1000_1000t_rx_status {
164 e1000_1000t_rx_status_not_ok = 0,
165 e1000_1000t_rx_status_ok,
166 e1000_1000t_rx_status_undefined = 0xFF
169 enum e1000_rev_polarity {
170 e1000_rev_polarity_normal = 0,
171 e1000_rev_polarity_reversed,
172 e1000_rev_polarity_undefined = 0xFF
180 e1000_fc_default = 0xFF
183 /* Statistics counters collected by the MAC */
184 struct e1000_hw_stats {
267 struct e1000_phy_stats {
272 struct e1000_host_mng_dhcp_cookie {
283 /* Host Interface "Rev 1" */
284 struct e1000_host_command_header {
291 #define E1000_HI_MAX_DATA_LENGTH 252
292 struct e1000_host_command_info {
293 struct e1000_host_command_header command_header;
294 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
297 /* Host Interface "Rev 2" */
298 struct e1000_host_mng_command_header {
306 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
307 struct e1000_host_mng_command_info {
308 struct e1000_host_mng_command_header command_header;
309 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
312 #include "e1000_mac.h"
313 #include "e1000_phy.h"
314 #include "e1000_nvm.h"
315 #include "e1000_mbx.h"
317 struct e1000_mac_operations {
318 s32 (*check_for_link)(struct e1000_hw *);
319 s32 (*reset_hw)(struct e1000_hw *);
320 s32 (*init_hw)(struct e1000_hw *);
321 bool (*check_mng_mode)(struct e1000_hw *);
322 s32 (*setup_physical_interface)(struct e1000_hw *);
323 void (*rar_set)(struct e1000_hw *, u8 *, u32);
324 s32 (*read_mac_addr)(struct e1000_hw *);
325 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
326 s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
327 void (*release_swfw_sync)(struct e1000_hw *, u16);
331 struct e1000_phy_operations {
332 s32 (*acquire)(struct e1000_hw *);
333 s32 (*check_polarity)(struct e1000_hw *);
334 s32 (*check_reset_block)(struct e1000_hw *);
335 s32 (*force_speed_duplex)(struct e1000_hw *);
336 s32 (*get_cfg_done)(struct e1000_hw *hw);
337 s32 (*get_cable_length)(struct e1000_hw *);
338 s32 (*get_phy_info)(struct e1000_hw *);
339 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
340 void (*release)(struct e1000_hw *);
341 s32 (*reset)(struct e1000_hw *);
342 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
343 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
344 s32 (*write_reg)(struct e1000_hw *, u32, u16);
347 struct e1000_nvm_operations {
348 s32 (*acquire)(struct e1000_hw *);
349 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
350 void (*release)(struct e1000_hw *);
351 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
352 s32 (*update)(struct e1000_hw *);
353 s32 (*validate)(struct e1000_hw *);
354 s32 (*valid_led_default)(struct e1000_hw *, u16 *);
358 s32 (*get_invariants)(struct e1000_hw *);
359 struct e1000_mac_operations *mac_ops;
360 struct e1000_phy_operations *phy_ops;
361 struct e1000_nvm_operations *nvm_ops;
364 extern const struct e1000_info e1000_82575_info;
366 struct e1000_mac_info {
367 struct e1000_mac_operations ops;
372 enum e1000_mac_type type;
383 /* Maximum size of the MTA register table in all supported adapters */
384 #define MAX_MTA_REG 128
385 u32 mta_shadow[MAX_MTA_REG];
388 u8 forced_speed_duplex;
391 bool arc_subsystem_valid;
392 bool asf_firmware_present;
395 bool disable_hw_init_bits;
396 bool get_link_status;
397 bool ifs_params_forced;
399 bool report_tx_early;
400 bool serdes_has_link;
401 bool tx_pkt_filtering;
404 struct e1000_phy_info {
405 struct e1000_phy_operations ops;
407 enum e1000_phy_type type;
409 enum e1000_1000t_rx_status local_rx;
410 enum e1000_1000t_rx_status remote_rx;
411 enum e1000_ms_type ms_type;
412 enum e1000_ms_type original_ms_type;
413 enum e1000_rev_polarity cable_polarity;
414 enum e1000_smart_speed smart_speed;
418 u32 reset_delay_us; /* in usec */
421 enum e1000_media_type media_type;
423 u16 autoneg_advertised;
426 u16 max_cable_length;
427 u16 min_cable_length;
431 bool disable_polarity_correction;
433 bool polarity_correction;
435 bool speed_downgraded;
436 bool autoneg_wait_to_complete;
439 struct e1000_nvm_info {
440 struct e1000_nvm_operations ops;
441 enum e1000_nvm_type type;
442 enum e1000_nvm_override override;
454 struct e1000_bus_info {
455 enum e1000_bus_type type;
456 enum e1000_bus_speed speed;
457 enum e1000_bus_width width;
465 struct e1000_fc_info {
466 u32 high_water; /* Flow control high-water mark */
467 u32 low_water; /* Flow control low-water mark */
468 u16 pause_time; /* Flow control pause timer */
469 bool send_xon; /* Flow control send XON */
470 bool strict_ieee; /* Strict IEEE mode */
471 enum e1000_fc_mode current_mode; /* Type of flow control */
472 enum e1000_fc_mode requested_mode;
475 struct e1000_mbx_operations {
476 s32 (*init_params)(struct e1000_hw *hw);
477 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
478 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
479 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
480 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
481 s32 (*check_for_msg)(struct e1000_hw *, u16);
482 s32 (*check_for_ack)(struct e1000_hw *, u16);
483 s32 (*check_for_rst)(struct e1000_hw *, u16);
486 struct e1000_mbx_stats {
495 struct e1000_mbx_info {
496 struct e1000_mbx_operations ops;
497 struct e1000_mbx_stats stats;
503 struct e1000_dev_spec_82575 {
505 bool global_device_reset;
513 u8 __iomem *flash_address;
514 unsigned long io_base;
516 struct e1000_mac_info mac;
517 struct e1000_fc_info fc;
518 struct e1000_phy_info phy;
519 struct e1000_nvm_info nvm;
520 struct e1000_bus_info bus;
521 struct e1000_mbx_info mbx;
522 struct e1000_host_mng_dhcp_cookie mng_cookie;
525 struct e1000_dev_spec_82575 _82575;
529 u16 subsystem_vendor_id;
530 u16 subsystem_device_id;
536 extern struct net_device *igb_get_hw_dev(struct e1000_hw *hw);
537 #define hw_dbg(format, arg...) \
538 netdev_dbg(igb_get_hw_dev(hw), format, ##arg)
540 /* These functions must be implemented by drivers */
541 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
542 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
543 #endif /* _E1000_HW_H_ */