Pileus Git - ~andy/linux/blob - drivers/net/ethernet/intel/i40e/i40e_common.c

   1 /*******************************************************************************
   2  *
   3  * Intel Ethernet Controller XL710 Family Linux Driver
   4  * Copyright(c) 2013 - 2014 Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * The full GNU General Public License is included in this distribution in
  19  * the file called "COPYING".
  20  *
  21  * Contact Information:
  22  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  ******************************************************************************/
  26
  27 #include "i40e_type.h"
  28 #include "i40e_adminq.h"
  29 #include "i40e_prototype.h"
  30 #include "i40e_virtchnl.h"
  31
  32 /**
  33  * i40e_set_mac_type - Sets MAC type
  34  * @hw: pointer to the HW structure
  35  *
  36  * This function sets the mac type of the adapter based on the
  37  * vendor ID and device ID stored in the hw structure.
  38  **/
  39 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
  40 {
  41         i40e_status status = 0;
  42
  43         if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
  44                 switch (hw->device_id) {
  45                 case I40E_DEV_ID_SFP_XL710:
  46                 case I40E_DEV_ID_SFP_X710:
  47                 case I40E_DEV_ID_QEMU:
  48                 case I40E_DEV_ID_KX_A:
  49                 case I40E_DEV_ID_KX_B:
  50                 case I40E_DEV_ID_KX_C:
  51                 case I40E_DEV_ID_KX_D:
  52                 case I40E_DEV_ID_QSFP_A:
  53                 case I40E_DEV_ID_QSFP_B:
  54                 case I40E_DEV_ID_QSFP_C:
  55                         hw->mac.type = I40E_MAC_XL710;
  56                         break;
  57                 case I40E_DEV_ID_VF:
  58                 case I40E_DEV_ID_VF_HV:
  59                         hw->mac.type = I40E_MAC_VF;
  60                         break;
  61                 default:
  62                         hw->mac.type = I40E_MAC_GENERIC;
  63                         break;
  64                 }
  65         } else {
  66                 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
  67         }
  68
  69         hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
  70                   hw->mac.type, status);
  71         return status;
  72 }
  73
  74 /**
  75  * i40e_debug_aq
  76  * @hw: debug mask related to admin queue
  77  * @mask: debug mask
  78  * @desc: pointer to admin queue descriptor
  79  * @buffer: pointer to command buffer
  80  *
  81  * Dumps debug log about adminq command with descriptor contents.
  82  **/
  83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
  84                    void *buffer)
  85 {
  86         struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
  87         u8 *aq_buffer = (u8 *)buffer;
  88         u32 data[4];
  89         u32 i = 0;
  90
  91         if ((!(mask & hw->debug_mask)) || (desc == NULL))
  92                 return;
  93
  94         i40e_debug(hw, mask,
  95                    "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
  96                    aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
  97                    aq_desc->retval);
  98         i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
  99                    aq_desc->cookie_high, aq_desc->cookie_low);
 100         i40e_debug(hw, mask, "\tparam (0,1)  0x%08X 0x%08X\n",
 101                    aq_desc->params.internal.param0,
 102                    aq_desc->params.internal.param1);
 103         i40e_debug(hw, mask, "\taddr (h,l)   0x%08X 0x%08X\n",
 104                    aq_desc->params.external.addr_high,
 105                    aq_desc->params.external.addr_low);
 106
 107         if ((buffer != NULL) && (aq_desc->datalen != 0)) {
 108                 memset(data, 0, sizeof(data));
 109                 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
 110                 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
 111                         data[((i % 16) / 4)] |=
 112                                 ((u32)aq_buffer[i]) << (8 * (i % 4));
 113                         if ((i % 16) == 15) {
 114                                 i40e_debug(hw, mask,
 115                                            "\t0x%04X  %08X %08X %08X %08X\n",
 116                                            i - 15, data[0], data[1], data[2],
 117                                            data[3]);
 118                                 memset(data, 0, sizeof(data));
 119                         }
 120                 }
 121                 if ((i % 16) != 0)
 122                         i40e_debug(hw, mask, "\t0x%04X  %08X %08X %08X %08X\n",
 123                                    i - (i % 16), data[0], data[1], data[2],
 124                                    data[3]);
 125         }
 126 }
 127
 128 /**
 129  * i40e_check_asq_alive
 130  * @hw: pointer to the hw struct
 131  *
 132  * Returns true if Queue is enabled else false.
 133  **/
 134 bool i40e_check_asq_alive(struct i40e_hw *hw)
 135 {
 136         return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK);
 137 }
 138
 139 /**
 140  * i40e_aq_queue_shutdown
 141  * @hw: pointer to the hw struct
 142  * @unloading: is the driver unloading itself
 143  *
 144  * Tell the Firmware that we're shutting down the AdminQ and whether
 145  * or not the driver is unloading as well.
 146  **/
 147 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
 148                                              bool unloading)
 149 {
 150         struct i40e_aq_desc desc;
 151         struct i40e_aqc_queue_shutdown *cmd =
 152                 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
 153         i40e_status status;
 154
 155         i40e_fill_default_direct_cmd_desc(&desc,
 156                                           i40e_aqc_opc_queue_shutdown);
 157
 158         if (unloading)
 159                 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
 160         status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
 161
 162         return status;
 163 }
 164
 165 /**
 166  * i40e_init_shared_code - Initialize the shared code
 167  * @hw: pointer to hardware structure
 168  *
 169  * This assigns the MAC type and PHY code and inits the NVM.
 170  * Does not touch the hardware. This function must be called prior to any
 171  * other function in the shared code. The i40e_hw structure should be
 172  * memset to 0 prior to calling this function.  The following fields in
 173  * hw structure should be filled in prior to calling this function:
 174  * hw_addr, back, device_id, vendor_id, subsystem_device_id,
 175  * subsystem_vendor_id, and revision_id
 176  **/
 177 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
 178 {
 179         i40e_status status = 0;
 180         u32 reg;
 181
 182         i40e_set_mac_type(hw);
 183
 184         switch (hw->mac.type) {
 185         case I40E_MAC_XL710:
 186                 break;
 187         default:
 188                 return I40E_ERR_DEVICE_NOT_SUPPORTED;
 189                 break;
 190         }
 191
 192         hw->phy.get_link_info = true;
 193
 194         /* Determine port number */
 195         reg = rd32(hw, I40E_PFGEN_PORTNUM);
 196         reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
 197                I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
 198         hw->port = (u8)reg;
 199
 200         /* Determine the PF number based on the PCI fn */
 201         reg = rd32(hw, I40E_GLPCI_CAPSUP);
 202         if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
 203                 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
 204         else
 205                 hw->pf_id = (u8)hw->bus.func;
 206
 207         status = i40e_init_nvm(hw);
 208         return status;
 209 }
 210
 211 /**
 212  * i40e_aq_mac_address_read - Retrieve the MAC addresses
 213  * @hw: pointer to the hw struct
 214  * @flags: a return indicator of what addresses were added to the addr store
 215  * @addrs: the requestor's mac addr store
 216  * @cmd_details: pointer to command details structure or NULL
 217  **/
 218 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
 219                                    u16 *flags,
 220                                    struct i40e_aqc_mac_address_read_data *addrs,
 221                                    struct i40e_asq_cmd_details *cmd_details)
 222 {
 223         struct i40e_aq_desc desc;
 224         struct i40e_aqc_mac_address_read *cmd_data =
 225                 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
 226         i40e_status status;
 227
 228         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
 229         desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
 230
 231         status = i40e_asq_send_command(hw, &desc, addrs,
 232                                        sizeof(*addrs), cmd_details);
 233         *flags = le16_to_cpu(cmd_data->command_flags);
 234
 235         return status;
 236 }
 237
 238 /**
 239  * i40e_aq_mac_address_write - Change the MAC addresses
 240  * @hw: pointer to the hw struct
 241  * @flags: indicates which MAC to be written
 242  * @mac_addr: address to write
 243  * @cmd_details: pointer to command details structure or NULL
 244  **/
 245 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
 246                                     u16 flags, u8 *mac_addr,
 247                                     struct i40e_asq_cmd_details *cmd_details)
 248 {
 249         struct i40e_aq_desc desc;
 250         struct i40e_aqc_mac_address_write *cmd_data =
 251                 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
 252         i40e_status status;
 253
 254         i40e_fill_default_direct_cmd_desc(&desc,
 255                                           i40e_aqc_opc_mac_address_write);
 256         cmd_data->command_flags = cpu_to_le16(flags);
 257         cmd_data->mac_sah = cpu_to_le16((u16)mac_addr[0] << 8 | mac_addr[1]);
 258         cmd_data->mac_sal = cpu_to_le32(((u32)mac_addr[2] << 24) |
 259                                         ((u32)mac_addr[3] << 16) |
 260                                         ((u32)mac_addr[4] << 8) |
 261                                         mac_addr[5]);
 262
 263         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 264
 265         return status;
 266 }
 267
 268 /**
 269  * i40e_get_mac_addr - get MAC address
 270  * @hw: pointer to the HW structure
 271  * @mac_addr: pointer to MAC address
 272  *
 273  * Reads the adapter's MAC address from register
 274  **/
 275 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
 276 {
 277         struct i40e_aqc_mac_address_read_data addrs;
 278         i40e_status status;
 279         u16 flags = 0;
 280
 281         status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
 282
 283         if (flags & I40E_AQC_LAN_ADDR_VALID)
 284                 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
 285
 286         return status;
 287 }
 288
 289 /**
 290  * i40e_get_media_type - Gets media type
 291  * @hw: pointer to the hardware structure
 292  **/
 293 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
 294 {
 295         enum i40e_media_type media;
 296
 297         switch (hw->phy.link_info.phy_type) {
 298         case I40E_PHY_TYPE_10GBASE_SR:
 299         case I40E_PHY_TYPE_10GBASE_LR:
 300         case I40E_PHY_TYPE_40GBASE_SR4:
 301         case I40E_PHY_TYPE_40GBASE_LR4:
 302                 media = I40E_MEDIA_TYPE_FIBER;
 303                 break;
 304         case I40E_PHY_TYPE_100BASE_TX:
 305         case I40E_PHY_TYPE_1000BASE_T:
 306         case I40E_PHY_TYPE_10GBASE_T:
 307                 media = I40E_MEDIA_TYPE_BASET;
 308                 break;
 309         case I40E_PHY_TYPE_10GBASE_CR1_CU:
 310         case I40E_PHY_TYPE_40GBASE_CR4_CU:
 311         case I40E_PHY_TYPE_10GBASE_CR1:
 312         case I40E_PHY_TYPE_40GBASE_CR4:
 313         case I40E_PHY_TYPE_10GBASE_SFPP_CU:
 314                 media = I40E_MEDIA_TYPE_DA;
 315                 break;
 316         case I40E_PHY_TYPE_1000BASE_KX:
 317         case I40E_PHY_TYPE_10GBASE_KX4:
 318         case I40E_PHY_TYPE_10GBASE_KR:
 319         case I40E_PHY_TYPE_40GBASE_KR4:
 320                 media = I40E_MEDIA_TYPE_BACKPLANE;
 321                 break;
 322         case I40E_PHY_TYPE_SGMII:
 323         case I40E_PHY_TYPE_XAUI:
 324         case I40E_PHY_TYPE_XFI:
 325         case I40E_PHY_TYPE_XLAUI:
 326         case I40E_PHY_TYPE_XLPPI:
 327         default:
 328                 media = I40E_MEDIA_TYPE_UNKNOWN;
 329                 break;
 330         }
 331
 332         return media;
 333 }
 334
 335 #define I40E_PF_RESET_WAIT_COUNT_A0     200
 336 #define I40E_PF_RESET_WAIT_COUNT        10
 337 /**
 338  * i40e_pf_reset - Reset the PF
 339  * @hw: pointer to the hardware structure
 340  *
 341  * Assuming someone else has triggered a global reset,
 342  * assure the global reset is complete and then reset the PF
 343  **/
 344 i40e_status i40e_pf_reset(struct i40e_hw *hw)
 345 {
 346         u32 cnt = 0;
 347         u32 cnt1 = 0;
 348         u32 reg = 0;
 349         u32 grst_del;
 350
 351         /* Poll for Global Reset steady state in case of recent GRST.
 352          * The grst delay value is in 100ms units, and we'll wait a
 353          * couple counts longer to be sure we don't just miss the end.
 354          */
 355         grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
 356                         >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
 357         for (cnt = 0; cnt < grst_del + 2; cnt++) {
 358                 reg = rd32(hw, I40E_GLGEN_RSTAT);
 359                 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
 360                         break;
 361                 msleep(100);
 362         }
 363         if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
 364                 hw_dbg(hw, "Global reset polling failed to complete.\n");
 365                 return I40E_ERR_RESET_FAILED;
 366         }
 367
 368         /* Now Wait for the FW to be ready */
 369         for (cnt1 = 0; cnt1 < I40E_PF_RESET_WAIT_COUNT; cnt1++) {
 370                 reg = rd32(hw, I40E_GLNVM_ULD);
 371                 reg &= (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 372                         I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK);
 373                 if (reg == (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 374                             I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK)) {
 375                         hw_dbg(hw, "Core and Global modules ready %d\n", cnt1);
 376                         break;
 377                 }
 378                 usleep_range(10000, 20000);
 379         }
 380         if (!(reg & (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 381                      I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK))) {
 382                 hw_dbg(hw, "wait for FW Reset complete timedout\n");
 383                 hw_dbg(hw, "I40E_GLNVM_ULD = 0x%x\n", reg);
 384                 return I40E_ERR_RESET_FAILED;
 385         }
 386
 387         /* If there was a Global Reset in progress when we got here,
 388          * we don't need to do the PF Reset
 389          */
 390         if (!cnt) {
 391                 if (hw->revision_id == 0)
 392                         cnt = I40E_PF_RESET_WAIT_COUNT_A0;
 393                 else
 394                         cnt = I40E_PF_RESET_WAIT_COUNT;
 395                 reg = rd32(hw, I40E_PFGEN_CTRL);
 396                 wr32(hw, I40E_PFGEN_CTRL,
 397                      (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
 398                 for (; cnt; cnt--) {
 399                         reg = rd32(hw, I40E_PFGEN_CTRL);
 400                         if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
 401                                 break;
 402                         usleep_range(1000, 2000);
 403                 }
 404                 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
 405                         hw_dbg(hw, "PF reset polling failed to complete.\n");
 406                         return I40E_ERR_RESET_FAILED;
 407                 }
 408         }
 409
 410         i40e_clear_pxe_mode(hw);
 411
 412         return 0;
 413 }
 414
 415 /**
 416  * i40e_clear_pxe_mode - clear pxe operations mode
 417  * @hw: pointer to the hw struct
 418  *
 419  * Make sure all PXE mode settings are cleared, including things
 420  * like descriptor fetch/write-back mode.
 421  **/
 422 void i40e_clear_pxe_mode(struct i40e_hw *hw)
 423 {
 424         u32 reg;
 425
 426         /* Clear single descriptor fetch/write-back mode */
 427         reg = rd32(hw, I40E_GLLAN_RCTL_0);
 428
 429         if (hw->revision_id == 0) {
 430                 /* As a work around clear PXE_MODE instead of setting it */
 431                 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
 432         } else {
 433                 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
 434         }
 435 }
 436
 437 /**
 438  * i40e_led_is_mine - helper to find matching led
 439  * @hw: pointer to the hw struct
 440  * @idx: index into GPIO registers
 441  *
 442  * returns: 0 if no match, otherwise the value of the GPIO_CTL register
 443  */
 444 static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
 445 {
 446         u32 gpio_val = 0;
 447         u32 port;
 448
 449         if (!hw->func_caps.led[idx])
 450                 return 0;
 451
 452         gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
 453         port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) >>
 454                 I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
 455
 456         /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
 457          * if it is not our port then ignore
 458          */
 459         if ((gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK) ||
 460             (port != hw->port))
 461                 return 0;
 462
 463         return gpio_val;
 464 }
 465
 466 #define I40E_LED0 22
 467 #define I40E_LINK_ACTIVITY 0xC
 468
 469 /**
 470  * i40e_led_get - return current on/off mode
 471  * @hw: pointer to the hw struct
 472  *
 473  * The value returned is the 'mode' field as defined in the
 474  * GPIO register definitions: 0x0 = off, 0xf = on, and other
 475  * values are variations of possible behaviors relating to
 476  * blink, link, and wire.
 477  **/
 478 u32 i40e_led_get(struct i40e_hw *hw)
 479 {
 480         u32 mode = 0;
 481         int i;
 482
 483         /* as per the documentation GPIO 22-29 are the LED
 484          * GPIO pins named LED0..LED7
 485          */
 486         for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
 487                 u32 gpio_val = i40e_led_is_mine(hw, i);
 488
 489                 if (!gpio_val)
 490                         continue;
 491
 492                 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
 493                         I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
 494                 break;
 495         }
 496
 497         return mode;
 498 }
 499
 500 /**
 501  * i40e_led_set - set new on/off mode
 502  * @hw: pointer to the hw struct
 503  * @mode: 0=off, 0xf=on (else see manual for mode details)
 504  * @blink: true if the LED should blink when on, false if steady
 505  *
 506  * if this function is used to turn on the blink it should
 507  * be used to disable the blink when restoring the original state.
 508  **/
 509 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
 510 {
 511         int i;
 512
 513         if (mode & 0xfffffff0)
 514                 hw_dbg(hw, "invalid mode passed in %X\n", mode);
 515
 516         /* as per the documentation GPIO 22-29 are the LED
 517          * GPIO pins named LED0..LED7
 518          */
 519         for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
 520                 u32 gpio_val = i40e_led_is_mine(hw, i);
 521
 522                 if (!gpio_val)
 523                         continue;
 524
 525                 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
 526                 /* this & is a bit of paranoia, but serves as a range check */
 527                 gpio_val |= ((mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
 528                              I40E_GLGEN_GPIO_CTL_LED_MODE_MASK);
 529
 530                 if (mode == I40E_LINK_ACTIVITY)
 531                         blink = false;
 532
 533                 gpio_val |= (blink ? 1 : 0) <<
 534                             I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT;
 535
 536                 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
 537                 break;
 538         }
 539 }
 540
 541 /* Admin command wrappers */
 542
 543 /**
 544  * i40e_aq_set_link_restart_an
 545  * @hw: pointer to the hw struct
 546  * @cmd_details: pointer to command details structure or NULL
 547  *
 548  * Sets up the link and restarts the Auto-Negotiation over the link.
 549  **/
 550 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
 551                                 struct i40e_asq_cmd_details *cmd_details)
 552 {
 553         struct i40e_aq_desc desc;
 554         struct i40e_aqc_set_link_restart_an *cmd =
 555                 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
 556         i40e_status status;
 557
 558         i40e_fill_default_direct_cmd_desc(&desc,
 559                                           i40e_aqc_opc_set_link_restart_an);
 560
 561         cmd->command = I40E_AQ_PHY_RESTART_AN;
 562
 563         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 564
 565         return status;
 566 }
 567
 568 /**
 569  * i40e_aq_get_link_info
 570  * @hw: pointer to the hw struct
 571  * @enable_lse: enable/disable LinkStatusEvent reporting
 572  * @link: pointer to link status structure - optional
 573  * @cmd_details: pointer to command details structure or NULL
 574  *
 575  * Returns the link status of the adapter.
 576  **/
 577 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
 578                                 bool enable_lse, struct i40e_link_status *link,
 579                                 struct i40e_asq_cmd_details *cmd_details)
 580 {
 581         struct i40e_aq_desc desc;
 582         struct i40e_aqc_get_link_status *resp =
 583                 (struct i40e_aqc_get_link_status *)&desc.params.raw;
 584         struct i40e_link_status *hw_link_info = &hw->phy.link_info;
 585         i40e_status status;
 586         u16 command_flags;
 587
 588         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
 589
 590         if (enable_lse)
 591                 command_flags = I40E_AQ_LSE_ENABLE;
 592         else
 593                 command_flags = I40E_AQ_LSE_DISABLE;
 594         resp->command_flags = cpu_to_le16(command_flags);
 595
 596         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 597
 598         if (status)
 599                 goto aq_get_link_info_exit;
 600
 601         /* save off old link status information */
 602         hw->phy.link_info_old = *hw_link_info;
 603
 604         /* update link status */
 605         hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
 606         hw->phy.media_type = i40e_get_media_type(hw);
 607         hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
 608         hw_link_info->link_info = resp->link_info;
 609         hw_link_info->an_info = resp->an_info;
 610         hw_link_info->ext_info = resp->ext_info;
 611         hw_link_info->loopback = resp->loopback;
 612
 613         if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
 614                 hw_link_info->lse_enable = true;
 615         else
 616                 hw_link_info->lse_enable = false;
 617
 618         /* save link status information */
 619         if (link)
 620                 *link = *hw_link_info;
 621
 622         /* flag cleared so helper functions don't call AQ again */
 623         hw->phy.get_link_info = false;
 624
 625 aq_get_link_info_exit:
 626         return status;
 627 }
 628
 629 /**
 630  * i40e_aq_add_vsi
 631  * @hw: pointer to the hw struct
 632  * @vsi_ctx: pointer to a vsi context struct
 633  * @cmd_details: pointer to command details structure or NULL
 634  *
 635  * Add a VSI context to the hardware.
 636 **/
 637 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
 638                                 struct i40e_vsi_context *vsi_ctx,
 639                                 struct i40e_asq_cmd_details *cmd_details)
 640 {
 641         struct i40e_aq_desc desc;
 642         struct i40e_aqc_add_get_update_vsi *cmd =
 643                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 644         struct i40e_aqc_add_get_update_vsi_completion *resp =
 645                 (struct i40e_aqc_add_get_update_vsi_completion *)
 646                 &desc.params.raw;
 647         i40e_status status;
 648
 649         i40e_fill_default_direct_cmd_desc(&desc,
 650                                           i40e_aqc_opc_add_vsi);
 651
 652         cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
 653         cmd->connection_type = vsi_ctx->connection_type;
 654         cmd->vf_id = vsi_ctx->vf_num;
 655         cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
 656
 657         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 658         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 659                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 660
 661         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 662                                     sizeof(vsi_ctx->info), cmd_details);
 663
 664         if (status)
 665                 goto aq_add_vsi_exit;
 666
 667         vsi_ctx->seid = le16_to_cpu(resp->seid);
 668         vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
 669         vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
 670         vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
 671
 672 aq_add_vsi_exit:
 673         return status;
 674 }
 675
 676 /**
 677  * i40e_aq_set_vsi_unicast_promiscuous
 678  * @hw: pointer to the hw struct
 679  * @seid: vsi number
 680  * @set: set unicast promiscuous enable/disable
 681  * @cmd_details: pointer to command details structure or NULL
 682  **/
 683 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
 684                                 u16 seid, bool set,
 685                                 struct i40e_asq_cmd_details *cmd_details)
 686 {
 687         struct i40e_aq_desc desc;
 688         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 689                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 690         i40e_status status;
 691         u16 flags = 0;
 692
 693         i40e_fill_default_direct_cmd_desc(&desc,
 694                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 695
 696         if (set)
 697                 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
 698
 699         cmd->promiscuous_flags = cpu_to_le16(flags);
 700
 701         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
 702
 703         cmd->seid = cpu_to_le16(seid);
 704         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 705
 706         return status;
 707 }
 708
 709 /**
 710  * i40e_aq_set_vsi_multicast_promiscuous
 711  * @hw: pointer to the hw struct
 712  * @seid: vsi number
 713  * @set: set multicast promiscuous enable/disable
 714  * @cmd_details: pointer to command details structure or NULL
 715  **/
 716 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
 717                                 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
 718 {
 719         struct i40e_aq_desc desc;
 720         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 721                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 722         i40e_status status;
 723         u16 flags = 0;
 724
 725         i40e_fill_default_direct_cmd_desc(&desc,
 726                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 727
 728         if (set)
 729                 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
 730
 731         cmd->promiscuous_flags = cpu_to_le16(flags);
 732
 733         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
 734
 735         cmd->seid = cpu_to_le16(seid);
 736         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 737
 738         return status;
 739 }
 740
 741 /**
 742  * i40e_aq_set_vsi_broadcast
 743  * @hw: pointer to the hw struct
 744  * @seid: vsi number
 745  * @set_filter: true to set filter, false to clear filter
 746  * @cmd_details: pointer to command details structure or NULL
 747  *
 748  * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
 749  **/
 750 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
 751                                 u16 seid, bool set_filter,
 752                                 struct i40e_asq_cmd_details *cmd_details)
 753 {
 754         struct i40e_aq_desc desc;
 755         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 756                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 757         i40e_status status;
 758
 759         i40e_fill_default_direct_cmd_desc(&desc,
 760                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 761
 762         if (set_filter)
 763                 cmd->promiscuous_flags
 764                             |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 765         else
 766                 cmd->promiscuous_flags
 767                             &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 768
 769         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 770         cmd->seid = cpu_to_le16(seid);
 771         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 772
 773         return status;
 774 }
 775
 776 /**
 777  * i40e_get_vsi_params - get VSI configuration info
 778  * @hw: pointer to the hw struct
 779  * @vsi_ctx: pointer to a vsi context struct
 780  * @cmd_details: pointer to command details structure or NULL
 781  **/
 782 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
 783                                 struct i40e_vsi_context *vsi_ctx,
 784                                 struct i40e_asq_cmd_details *cmd_details)
 785 {
 786         struct i40e_aq_desc desc;
 787         struct i40e_aqc_add_get_update_vsi *cmd =
 788                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 789         struct i40e_aqc_add_get_update_vsi_completion *resp =
 790                 (struct i40e_aqc_add_get_update_vsi_completion *)
 791                 &desc.params.raw;
 792         i40e_status status;
 793
 794         i40e_fill_default_direct_cmd_desc(&desc,
 795                                           i40e_aqc_opc_get_vsi_parameters);
 796
 797         cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
 798
 799         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
 800         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 801                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 802
 803         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 804                                     sizeof(vsi_ctx->info), NULL);
 805
 806         if (status)
 807                 goto aq_get_vsi_params_exit;
 808
 809         vsi_ctx->seid = le16_to_cpu(resp->seid);
 810         vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
 811         vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
 812         vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
 813
 814 aq_get_vsi_params_exit:
 815         return status;
 816 }
 817
 818 /**
 819  * i40e_aq_update_vsi_params
 820  * @hw: pointer to the hw struct
 821  * @vsi_ctx: pointer to a vsi context struct
 822  * @cmd_details: pointer to command details structure or NULL
 823  *
 824  * Update a VSI context.
 825  **/
 826 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
 827                                 struct i40e_vsi_context *vsi_ctx,
 828                                 struct i40e_asq_cmd_details *cmd_details)
 829 {
 830         struct i40e_aq_desc desc;
 831         struct i40e_aqc_add_get_update_vsi *cmd =
 832                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 833         i40e_status status;
 834
 835         i40e_fill_default_direct_cmd_desc(&desc,
 836                                           i40e_aqc_opc_update_vsi_parameters);
 837         cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
 838
 839         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 840         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 841                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 842
 843         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 844                                     sizeof(vsi_ctx->info), cmd_details);
 845
 846         return status;
 847 }
 848
 849 /**
 850  * i40e_aq_get_switch_config
 851  * @hw: pointer to the hardware structure
 852  * @buf: pointer to the result buffer
 853  * @buf_size: length of input buffer
 854  * @start_seid: seid to start for the report, 0 == beginning
 855  * @cmd_details: pointer to command details structure or NULL
 856  *
 857  * Fill the buf with switch configuration returned from AdminQ command
 858  **/
 859 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
 860                                 struct i40e_aqc_get_switch_config_resp *buf,
 861                                 u16 buf_size, u16 *start_seid,
 862                                 struct i40e_asq_cmd_details *cmd_details)
 863 {
 864         struct i40e_aq_desc desc;
 865         struct i40e_aqc_switch_seid *scfg =
 866                 (struct i40e_aqc_switch_seid *)&desc.params.raw;
 867         i40e_status status;
 868
 869         i40e_fill_default_direct_cmd_desc(&desc,
 870                                           i40e_aqc_opc_get_switch_config);
 871         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
 872         if (buf_size > I40E_AQ_LARGE_BUF)
 873                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 874         scfg->seid = cpu_to_le16(*start_seid);
 875
 876         status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
 877         *start_seid = le16_to_cpu(scfg->seid);
 878
 879         return status;
 880 }
 881
 882 /**
 883  * i40e_aq_get_firmware_version
 884  * @hw: pointer to the hw struct
 885  * @fw_major_version: firmware major version
 886  * @fw_minor_version: firmware minor version
 887  * @api_major_version: major queue version
 888  * @api_minor_version: minor queue version
 889  * @cmd_details: pointer to command details structure or NULL
 890  *
 891  * Get the firmware version from the admin queue commands
 892  **/
 893 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
 894                                 u16 *fw_major_version, u16 *fw_minor_version,
 895                                 u16 *api_major_version, u16 *api_minor_version,
 896                                 struct i40e_asq_cmd_details *cmd_details)
 897 {
 898         struct i40e_aq_desc desc;
 899         struct i40e_aqc_get_version *resp =
 900                 (struct i40e_aqc_get_version *)&desc.params.raw;
 901         i40e_status status;
 902
 903         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
 904
 905         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 906
 907         if (!status) {
 908                 if (fw_major_version != NULL)
 909                         *fw_major_version = le16_to_cpu(resp->fw_major);
 910                 if (fw_minor_version != NULL)
 911                         *fw_minor_version = le16_to_cpu(resp->fw_minor);
 912                 if (api_major_version != NULL)
 913                         *api_major_version = le16_to_cpu(resp->api_major);
 914                 if (api_minor_version != NULL)
 915                         *api_minor_version = le16_to_cpu(resp->api_minor);
 916         }
 917
 918         return status;
 919 }
 920
 921 /**
 922  * i40e_aq_send_driver_version
 923  * @hw: pointer to the hw struct
 924  * @dv: driver's major, minor version
 925  * @cmd_details: pointer to command details structure or NULL
 926  *
 927  * Send the driver version to the firmware
 928  **/
 929 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
 930                                 struct i40e_driver_version *dv,
 931                                 struct i40e_asq_cmd_details *cmd_details)
 932 {
 933         struct i40e_aq_desc desc;
 934         struct i40e_aqc_driver_version *cmd =
 935                 (struct i40e_aqc_driver_version *)&desc.params.raw;
 936         i40e_status status;
 937
 938         if (dv == NULL)
 939                 return I40E_ERR_PARAM;
 940
 941         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
 942
 943         desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
 944         cmd->driver_major_ver = dv->major_version;
 945         cmd->driver_minor_ver = dv->minor_version;
 946         cmd->driver_build_ver = dv->build_version;
 947         cmd->driver_subbuild_ver = dv->subbuild_version;
 948         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 949
 950         return status;
 951 }
 952
 953 /**
 954  * i40e_get_link_status - get status of the HW network link
 955  * @hw: pointer to the hw struct
 956  *
 957  * Returns true if link is up, false if link is down.
 958  *
 959  * Side effect: LinkStatusEvent reporting becomes enabled
 960  **/
 961 bool i40e_get_link_status(struct i40e_hw *hw)
 962 {
 963         i40e_status status = 0;
 964         bool link_status = false;
 965
 966         if (hw->phy.get_link_info) {
 967                 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
 968
 969                 if (status)
 970                         goto i40e_get_link_status_exit;
 971         }
 972
 973         link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
 974
 975 i40e_get_link_status_exit:
 976         return link_status;
 977 }
 978
 979 /**
 980  * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
 981  * @hw: pointer to the hw struct
 982  * @uplink_seid: the MAC or other gizmo SEID
 983  * @downlink_seid: the VSI SEID
 984  * @enabled_tc: bitmap of TCs to be enabled
 985  * @default_port: true for default port VSI, false for control port
 986  * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
 987  * @veb_seid: pointer to where to put the resulting VEB SEID
 988  * @cmd_details: pointer to command details structure or NULL
 989  *
 990  * This asks the FW to add a VEB between the uplink and downlink
 991  * elements.  If the uplink SEID is 0, this will be a floating VEB.
 992  **/
 993 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
 994                                 u16 downlink_seid, u8 enabled_tc,
 995                                 bool default_port, bool enable_l2_filtering,
 996                                 u16 *veb_seid,
 997                                 struct i40e_asq_cmd_details *cmd_details)
 998 {
 999         struct i40e_aq_desc desc;
1000         struct i40e_aqc_add_veb *cmd =
1001                 (struct i40e_aqc_add_veb *)&desc.params.raw;
1002         struct i40e_aqc_add_veb_completion *resp =
1003                 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
1004         i40e_status status;
1005         u16 veb_flags = 0;
1006
1007         /* SEIDs need to either both be set or both be 0 for floating VEB */
1008         if (!!uplink_seid != !!downlink_seid)
1009                 return I40E_ERR_PARAM;
1010
1011         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
1012
1013         cmd->uplink_seid = cpu_to_le16(uplink_seid);
1014         cmd->downlink_seid = cpu_to_le16(downlink_seid);
1015         cmd->enable_tcs = enabled_tc;
1016         if (!uplink_seid)
1017                 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
1018         if (default_port)
1019                 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
1020         else
1021                 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
1022
1023         if (enable_l2_filtering)
1024                 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
1025
1026         cmd->veb_flags = cpu_to_le16(veb_flags);
1027
1028         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1029
1030         if (!status && veb_seid)
1031                 *veb_seid = le16_to_cpu(resp->veb_seid);
1032
1033         return status;
1034 }
1035
1036 /**
1037  * i40e_aq_get_veb_parameters - Retrieve VEB parameters
1038  * @hw: pointer to the hw struct
1039  * @veb_seid: the SEID of the VEB to query
1040  * @switch_id: the uplink switch id
1041  * @floating: set to true if the VEB is floating
1042  * @statistic_index: index of the stats counter block for this VEB
1043  * @vebs_used: number of VEB's used by function
1044  * @vebs_free: total VEB's not reserved by any function
1045  * @cmd_details: pointer to command details structure or NULL
1046  *
1047  * This retrieves the parameters for a particular VEB, specified by
1048  * uplink_seid, and returns them to the caller.
1049  **/
1050 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1051                                 u16 veb_seid, u16 *switch_id,
1052                                 bool *floating, u16 *statistic_index,
1053                                 u16 *vebs_used, u16 *vebs_free,
1054                                 struct i40e_asq_cmd_details *cmd_details)
1055 {
1056         struct i40e_aq_desc desc;
1057         struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1058                 (struct i40e_aqc_get_veb_parameters_completion *)
1059                 &desc.params.raw;
1060         i40e_status status;
1061
1062         if (veb_seid == 0)
1063                 return I40E_ERR_PARAM;
1064
1065         i40e_fill_default_direct_cmd_desc(&desc,
1066                                           i40e_aqc_opc_get_veb_parameters);
1067         cmd_resp->seid = cpu_to_le16(veb_seid);
1068
1069         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1070         if (status)
1071                 goto get_veb_exit;
1072
1073         if (switch_id)
1074                 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1075         if (statistic_index)
1076                 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1077         if (vebs_used)
1078                 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1079         if (vebs_free)
1080                 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1081         if (floating) {
1082                 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1083                 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1084                         *floating = true;
1085                 else
1086                         *floating = false;
1087         }
1088
1089 get_veb_exit:
1090         return status;
1091 }
1092
1093 /**
1094  * i40e_aq_add_macvlan
1095  * @hw: pointer to the hw struct
1096  * @seid: VSI for the mac address
1097  * @mv_list: list of macvlans to be added
1098  * @count: length of the list
1099  * @cmd_details: pointer to command details structure or NULL
1100  *
1101  * Add MAC/VLAN addresses to the HW filtering
1102  **/
1103 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1104                         struct i40e_aqc_add_macvlan_element_data *mv_list,
1105                         u16 count, struct i40e_asq_cmd_details *cmd_details)
1106 {
1107         struct i40e_aq_desc desc;
1108         struct i40e_aqc_macvlan *cmd =
1109                 (struct i40e_aqc_macvlan *)&desc.params.raw;
1110         i40e_status status;
1111         u16 buf_size;
1112
1113         if (count == 0 || !mv_list || !hw)
1114                 return I40E_ERR_PARAM;
1115
1116         buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1117
1118         /* prep the rest of the request */
1119         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1120         cmd->num_addresses = cpu_to_le16(count);
1121         cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1122         cmd->seid[1] = 0;
1123         cmd->seid[2] = 0;
1124
1125         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1126         if (buf_size > I40E_AQ_LARGE_BUF)
1127                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1128
1129         status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1130                                     cmd_details);
1131
1132         return status;
1133 }
1134
1135 /**
1136  * i40e_aq_remove_macvlan
1137  * @hw: pointer to the hw struct
1138  * @seid: VSI for the mac address
1139  * @mv_list: list of macvlans to be removed
1140  * @count: length of the list
1141  * @cmd_details: pointer to command details structure or NULL
1142  *
1143  * Remove MAC/VLAN addresses from the HW filtering
1144  **/
1145 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1146                         struct i40e_aqc_remove_macvlan_element_data *mv_list,
1147                         u16 count, struct i40e_asq_cmd_details *cmd_details)
1148 {
1149         struct i40e_aq_desc desc;
1150         struct i40e_aqc_macvlan *cmd =
1151                 (struct i40e_aqc_macvlan *)&desc.params.raw;
1152         i40e_status status;
1153         u16 buf_size;
1154
1155         if (count == 0 || !mv_list || !hw)
1156                 return I40E_ERR_PARAM;
1157
1158         buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1159
1160         /* prep the rest of the request */
1161         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1162         cmd->num_addresses = cpu_to_le16(count);
1163         cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1164         cmd->seid[1] = 0;
1165         cmd->seid[2] = 0;
1166
1167         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1168         if (buf_size > I40E_AQ_LARGE_BUF)
1169                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1170
1171         status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1172                                        cmd_details);
1173
1174         return status;
1175 }
1176
1177 /**
1178  * i40e_aq_send_msg_to_vf
1179  * @hw: pointer to the hardware structure
1180  * @vfid: vf id to send msg
1181  * @v_opcode: opcodes for VF-PF communication
1182  * @v_retval: return error code
1183  * @msg: pointer to the msg buffer
1184  * @msglen: msg length
1185  * @cmd_details: pointer to command details
1186  *
1187  * send msg to vf
1188  **/
1189 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1190                                 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1191                                 struct i40e_asq_cmd_details *cmd_details)
1192 {
1193         struct i40e_aq_desc desc;
1194         struct i40e_aqc_pf_vf_message *cmd =
1195                 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1196         i40e_status status;
1197
1198         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1199         cmd->id = cpu_to_le32(vfid);
1200         desc.cookie_high = cpu_to_le32(v_opcode);
1201         desc.cookie_low = cpu_to_le32(v_retval);
1202         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1203         if (msglen) {
1204                 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1205                                                 I40E_AQ_FLAG_RD));
1206                 if (msglen > I40E_AQ_LARGE_BUF)
1207                         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1208                 desc.datalen = cpu_to_le16(msglen);
1209         }
1210         status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1211
1212         return status;
1213 }
1214
1215 /**
1216  * i40e_aq_set_hmc_resource_profile
1217  * @hw: pointer to the hw struct
1218  * @profile: type of profile the HMC is to be set as
1219  * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1220  * @cmd_details: pointer to command details structure or NULL
1221  *
1222  * set the HMC profile of the device.
1223  **/
1224 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1225                                 enum i40e_aq_hmc_profile profile,
1226                                 u8 pe_vf_enabled_count,
1227                                 struct i40e_asq_cmd_details *cmd_details)
1228 {
1229         struct i40e_aq_desc desc;
1230         struct i40e_aq_get_set_hmc_resource_profile *cmd =
1231                 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1232         i40e_status status;
1233
1234         i40e_fill_default_direct_cmd_desc(&desc,
1235                                         i40e_aqc_opc_set_hmc_resource_profile);
1236
1237         cmd->pm_profile = (u8)profile;
1238         cmd->pe_vf_enabled = pe_vf_enabled_count;
1239
1240         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1241
1242         return status;
1243 }
1244
1245 /**
1246  * i40e_aq_request_resource
1247  * @hw: pointer to the hw struct
1248  * @resource: resource id
1249  * @access: access type
1250  * @sdp_number: resource number
1251  * @timeout: the maximum time in ms that the driver may hold the resource
1252  * @cmd_details: pointer to command details structure or NULL
1253  *
1254  * requests common resource using the admin queue commands
1255  **/
1256 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1257                                 enum i40e_aq_resources_ids resource,
1258                                 enum i40e_aq_resource_access_type access,
1259                                 u8 sdp_number, u64 *timeout,
1260                                 struct i40e_asq_cmd_details *cmd_details)
1261 {
1262         struct i40e_aq_desc desc;
1263         struct i40e_aqc_request_resource *cmd_resp =
1264                 (struct i40e_aqc_request_resource *)&desc.params.raw;
1265         i40e_status status;
1266
1267         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1268
1269         cmd_resp->resource_id = cpu_to_le16(resource);
1270         cmd_resp->access_type = cpu_to_le16(access);
1271         cmd_resp->resource_number = cpu_to_le32(sdp_number);
1272
1273         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1274         /* The completion specifies the maximum time in ms that the driver
1275          * may hold the resource in the Timeout field.
1276          * If the resource is held by someone else, the command completes with
1277          * busy return value and the timeout field indicates the maximum time
1278          * the current owner of the resource has to free it.
1279          */
1280         if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1281                 *timeout = le32_to_cpu(cmd_resp->timeout);
1282
1283         return status;
1284 }
1285
1286 /**
1287  * i40e_aq_release_resource
1288  * @hw: pointer to the hw struct
1289  * @resource: resource id
1290  * @sdp_number: resource number
1291  * @cmd_details: pointer to command details structure or NULL
1292  *
1293  * release common resource using the admin queue commands
1294  **/
1295 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1296                                 enum i40e_aq_resources_ids resource,
1297                                 u8 sdp_number,
1298                                 struct i40e_asq_cmd_details *cmd_details)
1299 {
1300         struct i40e_aq_desc desc;
1301         struct i40e_aqc_request_resource *cmd =
1302                 (struct i40e_aqc_request_resource *)&desc.params.raw;
1303         i40e_status status;
1304
1305         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1306
1307         cmd->resource_id = cpu_to_le16(resource);
1308         cmd->resource_number = cpu_to_le32(sdp_number);
1309
1310         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1311
1312         return status;
1313 }
1314
1315 /**
1316  * i40e_aq_read_nvm
1317  * @hw: pointer to the hw struct
1318  * @module_pointer: module pointer location in words from the NVM beginning
1319  * @offset: byte offset from the module beginning
1320  * @length: length of the section to be read (in bytes from the offset)
1321  * @data: command buffer (size [bytes] = length)
1322  * @last_command: tells if this is the last command in a series
1323  * @cmd_details: pointer to command details structure or NULL
1324  *
1325  * Read the NVM using the admin queue commands
1326  **/
1327 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1328                                 u32 offset, u16 length, void *data,
1329                                 bool last_command,
1330                                 struct i40e_asq_cmd_details *cmd_details)
1331 {
1332         struct i40e_aq_desc desc;
1333         struct i40e_aqc_nvm_update *cmd =
1334                 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1335         i40e_status status;
1336
1337         /* In offset the highest byte must be zeroed. */
1338         if (offset & 0xFF000000) {
1339                 status = I40E_ERR_PARAM;
1340                 goto i40e_aq_read_nvm_exit;
1341         }
1342
1343         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1344
1345         /* If this is the last command in a series, set the proper flag. */
1346         if (last_command)
1347                 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1348         cmd->module_pointer = module_pointer;
1349         cmd->offset = cpu_to_le32(offset);
1350         cmd->length = cpu_to_le16(length);
1351
1352         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1353         if (length > I40E_AQ_LARGE_BUF)
1354                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1355
1356         status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1357
1358 i40e_aq_read_nvm_exit:
1359         return status;
1360 }
1361
1362 #define I40E_DEV_FUNC_CAP_SWITCH_MODE   0x01
1363 #define I40E_DEV_FUNC_CAP_MGMT_MODE     0x02
1364 #define I40E_DEV_FUNC_CAP_NPAR          0x03
1365 #define I40E_DEV_FUNC_CAP_OS2BMC        0x04
1366 #define I40E_DEV_FUNC_CAP_VALID_FUNC    0x05
1367 #define I40E_DEV_FUNC_CAP_SRIOV_1_1     0x12
1368 #define I40E_DEV_FUNC_CAP_VF            0x13
1369 #define I40E_DEV_FUNC_CAP_VMDQ          0x14
1370 #define I40E_DEV_FUNC_CAP_802_1_QBG     0x15
1371 #define I40E_DEV_FUNC_CAP_802_1_QBH     0x16
1372 #define I40E_DEV_FUNC_CAP_VSI           0x17
1373 #define I40E_DEV_FUNC_CAP_DCB           0x18
1374 #define I40E_DEV_FUNC_CAP_FCOE          0x21
1375 #define I40E_DEV_FUNC_CAP_RSS           0x40
1376 #define I40E_DEV_FUNC_CAP_RX_QUEUES     0x41
1377 #define I40E_DEV_FUNC_CAP_TX_QUEUES     0x42
1378 #define I40E_DEV_FUNC_CAP_MSIX          0x43
1379 #define I40E_DEV_FUNC_CAP_MSIX_VF       0x44
1380 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1381 #define I40E_DEV_FUNC_CAP_IEEE_1588     0x46
1382 #define I40E_DEV_FUNC_CAP_MFP_MODE_1    0xF1
1383 #define I40E_DEV_FUNC_CAP_CEM           0xF2
1384 #define I40E_DEV_FUNC_CAP_IWARP         0x51
1385 #define I40E_DEV_FUNC_CAP_LED           0x61
1386 #define I40E_DEV_FUNC_CAP_SDP           0x62
1387 #define I40E_DEV_FUNC_CAP_MDIO          0x63
1388
1389 /**
1390  * i40e_parse_discover_capabilities
1391  * @hw: pointer to the hw struct
1392  * @buff: pointer to a buffer containing device/function capability records
1393  * @cap_count: number of capability records in the list
1394  * @list_type_opc: type of capabilities list to parse
1395  *
1396  * Parse the device/function capabilities list.
1397  **/
1398 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1399                                      u32 cap_count,
1400                                      enum i40e_admin_queue_opc list_type_opc)
1401 {
1402         struct i40e_aqc_list_capabilities_element_resp *cap;
1403         u32 number, logical_id, phys_id;
1404         struct i40e_hw_capabilities *p;
1405         u32 reg_val;
1406         u32 i = 0;
1407         u16 id;
1408
1409         cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1410
1411         if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1412                 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1413         else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1414                 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1415         else
1416                 return;
1417
1418         for (i = 0; i < cap_count; i++, cap++) {
1419                 id = le16_to_cpu(cap->id);
1420                 number = le32_to_cpu(cap->number);
1421                 logical_id = le32_to_cpu(cap->logical_id);
1422                 phys_id = le32_to_cpu(cap->phys_id);
1423
1424                 switch (id) {
1425                 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1426                         p->switch_mode = number;
1427                         break;
1428                 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1429                         p->management_mode = number;
1430                         break;
1431                 case I40E_DEV_FUNC_CAP_NPAR:
1432                         p->npar_enable = number;
1433                         break;
1434                 case I40E_DEV_FUNC_CAP_OS2BMC:
1435                         p->os2bmc = number;
1436                         break;
1437                 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1438                         p->valid_functions = number;
1439                         break;
1440                 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1441                         if (number == 1)
1442                                 p->sr_iov_1_1 = true;
1443                         break;
1444                 case I40E_DEV_FUNC_CAP_VF:
1445                         p->num_vfs = number;
1446                         p->vf_base_id = logical_id;
1447                         break;
1448                 case I40E_DEV_FUNC_CAP_VMDQ:
1449                         if (number == 1)
1450                                 p->vmdq = true;
1451                         break;
1452                 case I40E_DEV_FUNC_CAP_802_1_QBG:
1453                         if (number == 1)
1454                                 p->evb_802_1_qbg = true;
1455                         break;
1456                 case I40E_DEV_FUNC_CAP_802_1_QBH:
1457                         if (number == 1)
1458                                 p->evb_802_1_qbh = true;
1459                         break;
1460                 case I40E_DEV_FUNC_CAP_VSI:
1461                         p->num_vsis = number;
1462                         break;
1463                 case I40E_DEV_FUNC_CAP_DCB:
1464                         if (number == 1) {
1465                                 p->dcb = true;
1466                                 p->enabled_tcmap = logical_id;
1467                                 p->maxtc = phys_id;
1468                         }
1469                         break;
1470                 case I40E_DEV_FUNC_CAP_FCOE:
1471                         if (number == 1)
1472                                 p->fcoe = true;
1473                         break;
1474                 case I40E_DEV_FUNC_CAP_RSS:
1475                         p->rss = true;
1476                         reg_val = rd32(hw, I40E_PFQF_CTL_0);
1477                         if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1478                                 p->rss_table_size = number;
1479                         else
1480                                 p->rss_table_size = 128;
1481                         p->rss_table_entry_width = logical_id;
1482                         break;
1483                 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1484                         p->num_rx_qp = number;
1485                         p->base_queue = phys_id;
1486                         break;
1487                 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1488                         p->num_tx_qp = number;
1489                         p->base_queue = phys_id;
1490                         break;
1491                 case I40E_DEV_FUNC_CAP_MSIX:
1492                         p->num_msix_vectors = number;
1493                         break;
1494                 case I40E_DEV_FUNC_CAP_MSIX_VF:
1495                         p->num_msix_vectors_vf = number;
1496                         break;
1497                 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1498                         if (number == 1)
1499                                 p->mfp_mode_1 = true;
1500                         break;
1501                 case I40E_DEV_FUNC_CAP_CEM:
1502                         if (number == 1)
1503                                 p->mgmt_cem = true;
1504                         break;
1505                 case I40E_DEV_FUNC_CAP_IWARP:
1506                         if (number == 1)
1507                                 p->iwarp = true;
1508                         break;
1509                 case I40E_DEV_FUNC_CAP_LED:
1510                         if (phys_id < I40E_HW_CAP_MAX_GPIO)
1511                                 p->led[phys_id] = true;
1512                         break;
1513                 case I40E_DEV_FUNC_CAP_SDP:
1514                         if (phys_id < I40E_HW_CAP_MAX_GPIO)
1515                                 p->sdp[phys_id] = true;
1516                         break;
1517                 case I40E_DEV_FUNC_CAP_MDIO:
1518                         if (number == 1) {
1519                                 p->mdio_port_num = phys_id;
1520                                 p->mdio_port_mode = logical_id;
1521                         }
1522                         break;
1523                 case I40E_DEV_FUNC_CAP_IEEE_1588:
1524                         if (number == 1)
1525                                 p->ieee_1588 = true;
1526                         break;
1527                 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1528                         p->fd = true;
1529                         p->fd_filters_guaranteed = number;
1530                         p->fd_filters_best_effort = logical_id;
1531                         break;
1532                 default:
1533                         break;
1534                 }
1535         }
1536
1537         /* additional HW specific goodies that might
1538          * someday be HW version specific
1539          */
1540         p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1541 }
1542
1543 /**
1544  * i40e_aq_discover_capabilities
1545  * @hw: pointer to the hw struct
1546  * @buff: a virtual buffer to hold the capabilities
1547  * @buff_size: Size of the virtual buffer
1548  * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1549  * @list_type_opc: capabilities type to discover - pass in the command opcode
1550  * @cmd_details: pointer to command details structure or NULL
1551  *
1552  * Get the device capabilities descriptions from the firmware
1553  **/
1554 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1555                                 void *buff, u16 buff_size, u16 *data_size,
1556                                 enum i40e_admin_queue_opc list_type_opc,
1557                                 struct i40e_asq_cmd_details *cmd_details)
1558 {
1559         struct i40e_aqc_list_capabilites *cmd;
1560         struct i40e_aq_desc desc;
1561         i40e_status status = 0;
1562
1563         cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1564
1565         if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1566                 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1567                 status = I40E_ERR_PARAM;
1568                 goto exit;
1569         }
1570
1571         i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1572
1573         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1574         if (buff_size > I40E_AQ_LARGE_BUF)
1575                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1576
1577         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1578         *data_size = le16_to_cpu(desc.datalen);
1579
1580         if (status)
1581                 goto exit;
1582
1583         i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1584                                          list_type_opc);
1585
1586 exit:
1587         return status;
1588 }
1589
1590 /**
1591  * i40e_aq_get_lldp_mib
1592  * @hw: pointer to the hw struct
1593  * @bridge_type: type of bridge requested
1594  * @mib_type: Local, Remote or both Local and Remote MIBs
1595  * @buff: pointer to a user supplied buffer to store the MIB block
1596  * @buff_size: size of the buffer (in bytes)
1597  * @local_len : length of the returned Local LLDP MIB
1598  * @remote_len: length of the returned Remote LLDP MIB
1599  * @cmd_details: pointer to command details structure or NULL
1600  *
1601  * Requests the complete LLDP MIB (entire packet).
1602  **/
1603 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1604                                 u8 mib_type, void *buff, u16 buff_size,
1605                                 u16 *local_len, u16 *remote_len,
1606                                 struct i40e_asq_cmd_details *cmd_details)
1607 {
1608         struct i40e_aq_desc desc;
1609         struct i40e_aqc_lldp_get_mib *cmd =
1610                 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1611         struct i40e_aqc_lldp_get_mib *resp =
1612                 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1613         i40e_status status;
1614
1615         if (buff_size == 0 || !buff)
1616                 return I40E_ERR_PARAM;
1617
1618         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1619         /* Indirect Command */
1620         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1621
1622         cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1623         cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1624                        I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1625
1626         desc.datalen = cpu_to_le16(buff_size);
1627
1628         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1629         if (buff_size > I40E_AQ_LARGE_BUF)
1630                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1631
1632         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1633         if (!status) {
1634                 if (local_len != NULL)
1635                         *local_len = le16_to_cpu(resp->local_len);
1636                 if (remote_len != NULL)
1637                         *remote_len = le16_to_cpu(resp->remote_len);
1638         }
1639
1640         return status;
1641 }
1642
1643 /**
1644  * i40e_aq_cfg_lldp_mib_change_event
1645  * @hw: pointer to the hw struct
1646  * @enable_update: Enable or Disable event posting
1647  * @cmd_details: pointer to command details structure or NULL
1648  *
1649  * Enable or Disable posting of an event on ARQ when LLDP MIB
1650  * associated with the interface changes
1651  **/
1652 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1653                                 bool enable_update,
1654                                 struct i40e_asq_cmd_details *cmd_details)
1655 {
1656         struct i40e_aq_desc desc;
1657         struct i40e_aqc_lldp_update_mib *cmd =
1658                 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1659         i40e_status status;
1660
1661         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1662
1663         if (!enable_update)
1664                 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1665
1666         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1667
1668         return status;
1669 }
1670
1671 /**
1672  * i40e_aq_stop_lldp
1673  * @hw: pointer to the hw struct
1674  * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1675  * @cmd_details: pointer to command details structure or NULL
1676  *
1677  * Stop or Shutdown the embedded LLDP Agent
1678  **/
1679 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1680                                 struct i40e_asq_cmd_details *cmd_details)
1681 {
1682         struct i40e_aq_desc desc;
1683         struct i40e_aqc_lldp_stop *cmd =
1684                 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1685         i40e_status status;
1686
1687         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1688
1689         if (shutdown_agent)
1690                 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1691
1692         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1693
1694         return status;
1695 }
1696
1697 /**
1698  * i40e_aq_start_lldp
1699  * @hw: pointer to the hw struct
1700  * @cmd_details: pointer to command details structure or NULL
1701  *
1702  * Start the embedded LLDP Agent on all ports.
1703  **/
1704 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1705                                 struct i40e_asq_cmd_details *cmd_details)
1706 {
1707         struct i40e_aq_desc desc;
1708         struct i40e_aqc_lldp_start *cmd =
1709                 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1710         i40e_status status;
1711
1712         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1713
1714         cmd->command = I40E_AQ_LLDP_AGENT_START;
1715
1716         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1717
1718         return status;
1719 }
1720
1721 /**
1722  * i40e_aq_add_udp_tunnel
1723  * @hw: pointer to the hw struct
1724  * @udp_port: the UDP port to add
1725  * @header_len: length of the tunneling header length in DWords
1726  * @protocol_index: protocol index type
1727  * @filter_index: pointer to filter index
1728  * @cmd_details: pointer to command details structure or NULL
1729  **/
1730 i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
1731                                 u16 udp_port, u8 header_len,
1732                                 u8 protocol_index, u8 *filter_index,
1733                                 struct i40e_asq_cmd_details *cmd_details)
1734 {
1735         struct i40e_aq_desc desc;
1736         struct i40e_aqc_add_udp_tunnel *cmd =
1737                 (struct i40e_aqc_add_udp_tunnel *)&desc.params.raw;
1738         struct i40e_aqc_del_udp_tunnel_completion *resp =
1739                 (struct i40e_aqc_del_udp_tunnel_completion *)&desc.params.raw;
1740         i40e_status status;
1741
1742         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_udp_tunnel);
1743
1744         cmd->udp_port = cpu_to_le16(udp_port);
1745         cmd->protocol_type = protocol_index;
1746
1747         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1748
1749         if (!status)
1750                 *filter_index = resp->index;
1751
1752         return status;
1753 }
1754
1755 /**
1756  * i40e_aq_del_udp_tunnel
1757  * @hw: pointer to the hw struct
1758  * @index: filter index
1759  * @cmd_details: pointer to command details structure or NULL
1760  **/
1761 i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,
1762                                 struct i40e_asq_cmd_details *cmd_details)
1763 {
1764         struct i40e_aq_desc desc;
1765         struct i40e_aqc_remove_udp_tunnel *cmd =
1766                 (struct i40e_aqc_remove_udp_tunnel *)&desc.params.raw;
1767         i40e_status status;
1768
1769         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_del_udp_tunnel);
1770
1771         cmd->index = index;
1772
1773         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1774
1775         return status;
1776 }
1777
1778 /**
1779  * i40e_aq_delete_element - Delete switch element
1780  * @hw: pointer to the hw struct
1781  * @seid: the SEID to delete from the switch
1782  * @cmd_details: pointer to command details structure or NULL
1783  *
1784  * This deletes a switch element from the switch.
1785  **/
1786 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1787                                 struct i40e_asq_cmd_details *cmd_details)
1788 {
1789         struct i40e_aq_desc desc;
1790         struct i40e_aqc_switch_seid *cmd =
1791                 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1792         i40e_status status;
1793
1794         if (seid == 0)
1795                 return I40E_ERR_PARAM;
1796
1797         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1798
1799         cmd->seid = cpu_to_le16(seid);
1800
1801         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1802
1803         return status;
1804 }
1805
1806 /**
1807  * i40e_aq_dcb_updated - DCB Updated Command
1808  * @hw: pointer to the hw struct
1809  * @cmd_details: pointer to command details structure or NULL
1810  *
1811  * EMP will return when the shared RPB settings have been
1812  * recomputed and modified. The retval field in the descriptor
1813  * will be set to 0 when RPB is modified.
1814  **/
1815 i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw,
1816                                 struct i40e_asq_cmd_details *cmd_details)
1817 {
1818         struct i40e_aq_desc desc;
1819         i40e_status status;
1820
1821         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_dcb_updated);
1822
1823         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1824
1825         return status;
1826 }
1827
1828 /**
1829  * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1830  * @hw: pointer to the hw struct
1831  * @seid: seid for the physical port/switching component/vsi
1832  * @buff: Indirect buffer to hold data parameters and response
1833  * @buff_size: Indirect buffer size
1834  * @opcode: Tx scheduler AQ command opcode
1835  * @cmd_details: pointer to command details structure or NULL
1836  *
1837  * Generic command handler for Tx scheduler AQ commands
1838  **/
1839 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1840                                 void *buff, u16 buff_size,
1841                                  enum i40e_admin_queue_opc opcode,
1842                                 struct i40e_asq_cmd_details *cmd_details)
1843 {
1844         struct i40e_aq_desc desc;
1845         struct i40e_aqc_tx_sched_ind *cmd =
1846                 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1847         i40e_status status;
1848         bool cmd_param_flag = false;
1849
1850         switch (opcode) {
1851         case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1852         case i40e_aqc_opc_configure_vsi_tc_bw:
1853         case i40e_aqc_opc_enable_switching_comp_ets:
1854         case i40e_aqc_opc_modify_switching_comp_ets:
1855         case i40e_aqc_opc_disable_switching_comp_ets:
1856         case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1857         case i40e_aqc_opc_configure_switching_comp_bw_config:
1858                 cmd_param_flag = true;
1859                 break;
1860         case i40e_aqc_opc_query_vsi_bw_config:
1861         case i40e_aqc_opc_query_vsi_ets_sla_config:
1862         case i40e_aqc_opc_query_switching_comp_ets_config:
1863         case i40e_aqc_opc_query_port_ets_config:
1864         case i40e_aqc_opc_query_switching_comp_bw_config:
1865                 cmd_param_flag = false;
1866                 break;
1867         default:
1868                 return I40E_ERR_PARAM;
1869         }
1870
1871         i40e_fill_default_direct_cmd_desc(&desc, opcode);
1872
1873         /* Indirect command */
1874         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1875         if (cmd_param_flag)
1876                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1877         if (buff_size > I40E_AQ_LARGE_BUF)
1878                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1879
1880         desc.datalen = cpu_to_le16(buff_size);
1881
1882         cmd->vsi_seid = cpu_to_le16(seid);
1883
1884         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1885
1886         return status;
1887 }
1888
1889 /**
1890  * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1891  * @hw: pointer to the hw struct
1892  * @seid: VSI seid
1893  * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1894  * @cmd_details: pointer to command details structure or NULL
1895  **/
1896 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1897                         u16 seid,
1898                         struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1899                         struct i40e_asq_cmd_details *cmd_details)
1900 {
1901         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1902                                     i40e_aqc_opc_configure_vsi_tc_bw,
1903                                     cmd_details);
1904 }
1905
1906 /**
1907  * i40e_aq_config_switch_comp_ets - Enable/Disable/Modify ETS on the port
1908  * @hw: pointer to the hw struct
1909  * @seid: seid of the switching component connected to Physical Port
1910  * @ets_data: Buffer holding ETS parameters
1911  * @cmd_details: pointer to command details structure or NULL
1912  **/
1913 i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw,
1914                 u16 seid,
1915                 struct i40e_aqc_configure_switching_comp_ets_data *ets_data,
1916                 enum i40e_admin_queue_opc opcode,
1917                 struct i40e_asq_cmd_details *cmd_details)
1918 {
1919         return i40e_aq_tx_sched_cmd(hw, seid, (void *)ets_data,
1920                                     sizeof(*ets_data), opcode, cmd_details);
1921 }
1922
1923 /**
1924  * i40e_aq_config_switch_comp_bw_config - Config Switch comp BW Alloc per TC
1925  * @hw: pointer to the hw struct
1926  * @seid: seid of the switching component
1927  * @bw_data: Buffer holding enabled TCs, relative/absolute TC BW limit/credits
1928  * @cmd_details: pointer to command details structure or NULL
1929  **/
1930 i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw,
1931         u16 seid,
1932         struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data,
1933         struct i40e_asq_cmd_details *cmd_details)
1934 {
1935         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1936                             i40e_aqc_opc_configure_switching_comp_bw_config,
1937                             cmd_details);
1938 }
1939
1940 /**
1941  * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1942  * @hw: pointer to the hw struct
1943  * @seid: seid of the VSI
1944  * @bw_data: Buffer to hold VSI BW configuration
1945  * @cmd_details: pointer to command details structure or NULL
1946  **/
1947 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1948                         u16 seid,
1949                         struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1950                         struct i40e_asq_cmd_details *cmd_details)
1951 {
1952         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1953                                     i40e_aqc_opc_query_vsi_bw_config,
1954                                     cmd_details);
1955 }
1956
1957 /**
1958  * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1959  * @hw: pointer to the hw struct
1960  * @seid: seid of the VSI
1961  * @bw_data: Buffer to hold VSI BW configuration per TC
1962  * @cmd_details: pointer to command details structure or NULL
1963  **/
1964 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1965                         u16 seid,
1966                         struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1967                         struct i40e_asq_cmd_details *cmd_details)
1968 {
1969         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1970                                     i40e_aqc_opc_query_vsi_ets_sla_config,
1971                                     cmd_details);
1972 }
1973
1974 /**
1975  * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1976  * @hw: pointer to the hw struct
1977  * @seid: seid of the switching component
1978  * @bw_data: Buffer to hold switching component's per TC BW config
1979  * @cmd_details: pointer to command details structure or NULL
1980  **/
1981 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1982                 u16 seid,
1983                 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1984                 struct i40e_asq_cmd_details *cmd_details)
1985 {
1986         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1987                                    i40e_aqc_opc_query_switching_comp_ets_config,
1988                                    cmd_details);
1989 }
1990
1991 /**
1992  * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1993  * @hw: pointer to the hw struct
1994  * @seid: seid of the VSI or switching component connected to Physical Port
1995  * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1996  * @cmd_details: pointer to command details structure or NULL
1997  **/
1998 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1999                         u16 seid,
2000                         struct i40e_aqc_query_port_ets_config_resp *bw_data,
2001                         struct i40e_asq_cmd_details *cmd_details)
2002 {
2003         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
2004                                     i40e_aqc_opc_query_port_ets_config,
2005                                     cmd_details);
2006 }
2007
2008 /**
2009  * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
2010  * @hw: pointer to the hw struct
2011  * @seid: seid of the switching component
2012  * @bw_data: Buffer to hold switching component's BW configuration
2013  * @cmd_details: pointer to command details structure or NULL
2014  **/
2015 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
2016                 u16 seid,
2017                 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
2018                 struct i40e_asq_cmd_details *cmd_details)
2019 {
2020         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
2021                                     i40e_aqc_opc_query_switching_comp_bw_config,
2022                                     cmd_details);
2023 }
2024
2025 /**
2026  * i40e_validate_filter_settings
2027  * @hw: pointer to the hardware structure
2028  * @settings: Filter control settings
2029  *
2030  * Check and validate the filter control settings passed.
2031  * The function checks for the valid filter/context sizes being
2032  * passed for FCoE and PE.
2033  *
2034  * Returns 0 if the values passed are valid and within
2035  * range else returns an error.
2036  **/
2037 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
2038                                 struct i40e_filter_control_settings *settings)
2039 {
2040         u32 fcoe_cntx_size, fcoe_filt_size;
2041         u32 pe_cntx_size, pe_filt_size;
2042         u32 fcoe_fmax, pe_fmax;
2043         u32 val;
2044
2045         /* Validate FCoE settings passed */
2046         switch (settings->fcoe_filt_num) {
2047         case I40E_HASH_FILTER_SIZE_1K:
2048         case I40E_HASH_FILTER_SIZE_2K:
2049         case I40E_HASH_FILTER_SIZE_4K:
2050         case I40E_HASH_FILTER_SIZE_8K:
2051         case I40E_HASH_FILTER_SIZE_16K:
2052         case I40E_HASH_FILTER_SIZE_32K:
2053                 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2054                 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
2055                 break;
2056         default:
2057                 return I40E_ERR_PARAM;
2058         }
2059
2060         switch (settings->fcoe_cntx_num) {
2061         case I40E_DMA_CNTX_SIZE_512:
2062         case I40E_DMA_CNTX_SIZE_1K:
2063         case I40E_DMA_CNTX_SIZE_2K:
2064         case I40E_DMA_CNTX_SIZE_4K:
2065                 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2066                 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
2067                 break;
2068         default:
2069                 return I40E_ERR_PARAM;
2070         }
2071
2072         /* Validate PE settings passed */
2073         switch (settings->pe_filt_num) {
2074         case I40E_HASH_FILTER_SIZE_1K:
2075         case I40E_HASH_FILTER_SIZE_2K:
2076         case I40E_HASH_FILTER_SIZE_4K:
2077         case I40E_HASH_FILTER_SIZE_8K:
2078         case I40E_HASH_FILTER_SIZE_16K:
2079         case I40E_HASH_FILTER_SIZE_32K:
2080         case I40E_HASH_FILTER_SIZE_64K:
2081         case I40E_HASH_FILTER_SIZE_128K:
2082         case I40E_HASH_FILTER_SIZE_256K:
2083         case I40E_HASH_FILTER_SIZE_512K:
2084         case I40E_HASH_FILTER_SIZE_1M:
2085                 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2086                 pe_filt_size <<= (u32)settings->pe_filt_num;
2087                 break;
2088         default:
2089                 return I40E_ERR_PARAM;
2090         }
2091
2092         switch (settings->pe_cntx_num) {
2093         case I40E_DMA_CNTX_SIZE_512:
2094         case I40E_DMA_CNTX_SIZE_1K:
2095         case I40E_DMA_CNTX_SIZE_2K:
2096         case I40E_DMA_CNTX_SIZE_4K:
2097         case I40E_DMA_CNTX_SIZE_8K:
2098         case I40E_DMA_CNTX_SIZE_16K:
2099         case I40E_DMA_CNTX_SIZE_32K:
2100         case I40E_DMA_CNTX_SIZE_64K:
2101         case I40E_DMA_CNTX_SIZE_128K:
2102         case I40E_DMA_CNTX_SIZE_256K:
2103                 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2104                 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2105                 break;
2106         default:
2107                 return I40E_ERR_PARAM;
2108         }
2109
2110         /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2111         val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2112         fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2113                      >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2114         if (fcoe_filt_size + fcoe_cntx_size >  fcoe_fmax)
2115                 return I40E_ERR_INVALID_SIZE;
2116
2117         /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2118         val = rd32(hw, I40E_GLHMC_PEXFMAX);
2119         pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2120                    >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2121         if (pe_filt_size + pe_cntx_size >  pe_fmax)
2122                 return I40E_ERR_INVALID_SIZE;
2123
2124         return 0;
2125 }
2126
2127 /**
2128  * i40e_set_filter_control
2129  * @hw: pointer to the hardware structure
2130  * @settings: Filter control settings
2131  *
2132  * Set the Queue Filters for PE/FCoE and enable filters required
2133  * for a single PF. It is expected that these settings are programmed
2134  * at the driver initialization time.
2135  **/
2136 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2137                                 struct i40e_filter_control_settings *settings)
2138 {
2139         i40e_status ret = 0;
2140         u32 hash_lut_size = 0;
2141         u32 val;
2142
2143         if (!settings)
2144                 return I40E_ERR_PARAM;
2145
2146         /* Validate the input settings */
2147         ret = i40e_validate_filter_settings(hw, settings);
2148         if (ret)
2149                 return ret;
2150
2151         /* Read the PF Queue Filter control register */
2152         val = rd32(hw, I40E_PFQF_CTL_0);
2153
2154         /* Program required PE hash buckets for the PF */
2155         val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2156         val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2157                 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2158         /* Program required PE contexts for the PF */
2159         val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2160         val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2161                 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2162
2163         /* Program required FCoE hash buckets for the PF */
2164         val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2165         val |= ((u32)settings->fcoe_filt_num <<
2166                         I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2167                 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2168         /* Program required FCoE DDP contexts for the PF */
2169         val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2170         val |= ((u32)settings->fcoe_cntx_num <<
2171                         I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2172                 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2173
2174         /* Program Hash LUT size for the PF */
2175         val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2176         if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2177                 hash_lut_size = 1;
2178         val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2179                 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2180
2181         /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2182         if (settings->enable_fdir)
2183                 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2184         if (settings->enable_ethtype)
2185                 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2186         if (settings->enable_macvlan)
2187                 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2188
2189         wr32(hw, I40E_PFQF_CTL_0, val);
2190
2191         return 0;
2192 }
2193
2194 /**
2195  * i40e_aq_add_rem_control_packet_filter - Add or Remove Control Packet Filter
2196  * @hw: pointer to the hw struct
2197  * @mac_addr: MAC address to use in the filter
2198  * @ethtype: Ethertype to use in the filter
2199  * @flags: Flags that needs to be applied to the filter
2200  * @vsi_seid: seid of the control VSI
2201  * @queue: VSI queue number to send the packet to
2202  * @is_add: Add control packet filter if True else remove
2203  * @stats: Structure to hold information on control filter counts
2204  * @cmd_details: pointer to command details structure or NULL
2205  *
2206  * This command will Add or Remove control packet filter for a control VSI.
2207  * In return it will update the total number of perfect filter count in
2208  * the stats member.
2209  **/
2210 i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,
2211                                 u8 *mac_addr, u16 ethtype, u16 flags,
2212                                 u16 vsi_seid, u16 queue, bool is_add,
2213                                 struct i40e_control_filter_stats *stats,
2214                                 struct i40e_asq_cmd_details *cmd_details)
2215 {
2216         struct i40e_aq_desc desc;
2217         struct i40e_aqc_add_remove_control_packet_filter *cmd =
2218                 (struct i40e_aqc_add_remove_control_packet_filter *)
2219                 &desc.params.raw;
2220         struct i40e_aqc_add_remove_control_packet_filter_completion *resp =
2221                 (struct i40e_aqc_add_remove_control_packet_filter_completion *)
2222                 &desc.params.raw;
2223         i40e_status status;
2224
2225         if (vsi_seid == 0)
2226                 return I40E_ERR_PARAM;
2227
2228         if (is_add) {
2229                 i40e_fill_default_direct_cmd_desc(&desc,
2230                                 i40e_aqc_opc_add_control_packet_filter);
2231                 cmd->queue = cpu_to_le16(queue);
2232         } else {
2233                 i40e_fill_default_direct_cmd_desc(&desc,
2234                                 i40e_aqc_opc_remove_control_packet_filter);
2235         }
2236
2237         if (mac_addr)
2238                 memcpy(cmd->mac, mac_addr, ETH_ALEN);
2239
2240         cmd->etype = cpu_to_le16(ethtype);
2241         cmd->flags = cpu_to_le16(flags);
2242         cmd->seid = cpu_to_le16(vsi_seid);
2243
2244         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
2245
2246         if (!status && stats) {
2247                 stats->mac_etype_used = le16_to_cpu(resp->mac_etype_used);
2248                 stats->etype_used = le16_to_cpu(resp->etype_used);
2249                 stats->mac_etype_free = le16_to_cpu(resp->mac_etype_free);
2250                 stats->etype_free = le16_to_cpu(resp->etype_free);
2251         }
2252
2253         return status;
2254 }
2255
2256 /**
2257  * i40e_set_pci_config_data - store PCI bus info
2258  * @hw: pointer to hardware structure
2259  * @link_status: the link status word from PCI config space
2260  *
2261  * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
2262  **/
2263 void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)
2264 {
2265         hw->bus.type = i40e_bus_type_pci_express;
2266
2267         switch (link_status & PCI_EXP_LNKSTA_NLW) {
2268         case PCI_EXP_LNKSTA_NLW_X1:
2269                 hw->bus.width = i40e_bus_width_pcie_x1;
2270                 break;
2271         case PCI_EXP_LNKSTA_NLW_X2:
2272                 hw->bus.width = i40e_bus_width_pcie_x2;
2273                 break;
2274         case PCI_EXP_LNKSTA_NLW_X4:
2275                 hw->bus.width = i40e_bus_width_pcie_x4;
2276                 break;
2277         case PCI_EXP_LNKSTA_NLW_X8:
2278                 hw->bus.width = i40e_bus_width_pcie_x8;
2279                 break;
2280         default:
2281                 hw->bus.width = i40e_bus_width_unknown;
2282                 break;
2283         }
2284
2285         switch (link_status & PCI_EXP_LNKSTA_CLS) {
2286         case PCI_EXP_LNKSTA_CLS_2_5GB:
2287                 hw->bus.speed = i40e_bus_speed_2500;
2288                 break;
2289         case PCI_EXP_LNKSTA_CLS_5_0GB:
2290                 hw->bus.speed = i40e_bus_speed_5000;
2291                 break;
2292         case PCI_EXP_LNKSTA_CLS_8_0GB:
2293                 hw->bus.speed = i40e_bus_speed_8000;
2294                 break;
2295         default:
2296                 hw->bus.speed = i40e_bus_speed_unknown;
2297                 break;
2298         }
2299 }