Pileus Git - ~andy/linux/blob - drivers/net/ethernet/intel/i40e/i40e_common.c

   1 /*******************************************************************************
   2  *
   3  * Intel Ethernet Controller XL710 Family Linux Driver
   4  * Copyright(c) 2013 - 2014 Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * The full GNU General Public License is included in this distribution in
  19  * the file called "COPYING".
  20  *
  21  * Contact Information:
  22  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  ******************************************************************************/
  26
  27 #include "i40e_type.h"
  28 #include "i40e_adminq.h"
  29 #include "i40e_prototype.h"
  30 #include "i40e_virtchnl.h"
  31
  32 /**
  33  * i40e_set_mac_type - Sets MAC type
  34  * @hw: pointer to the HW structure
  35  *
  36  * This function sets the mac type of the adapter based on the
  37  * vendor ID and device ID stored in the hw structure.
  38  **/
  39 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
  40 {
  41         i40e_status status = 0;
  42
  43         if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
  44                 switch (hw->device_id) {
  45                 case I40E_SFP_XL710_DEVICE_ID:
  46                 case I40E_SFP_X710_DEVICE_ID:
  47                 case I40E_QEMU_DEVICE_ID:
  48                 case I40E_KX_A_DEVICE_ID:
  49                 case I40E_KX_B_DEVICE_ID:
  50                 case I40E_KX_C_DEVICE_ID:
  51                 case I40E_KX_D_DEVICE_ID:
  52                 case I40E_QSFP_A_DEVICE_ID:
  53                 case I40E_QSFP_B_DEVICE_ID:
  54                 case I40E_QSFP_C_DEVICE_ID:
  55                         hw->mac.type = I40E_MAC_XL710;
  56                         break;
  57                 case I40E_VF_DEVICE_ID:
  58                 case I40E_VF_HV_DEVICE_ID:
  59                         hw->mac.type = I40E_MAC_VF;
  60                         break;
  61                 default:
  62                         hw->mac.type = I40E_MAC_GENERIC;
  63                         break;
  64                 }
  65         } else {
  66                 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
  67         }
  68
  69         hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
  70                   hw->mac.type, status);
  71         return status;
  72 }
  73
  74 /**
  75  * i40e_debug_aq
  76  * @hw: debug mask related to admin queue
  77  * @mask: debug mask
  78  * @desc: pointer to admin queue descriptor
  79  * @buffer: pointer to command buffer
  80  *
  81  * Dumps debug log about adminq command with descriptor contents.
  82  **/
  83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
  84                    void *buffer)
  85 {
  86         struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
  87         u8 *aq_buffer = (u8 *)buffer;
  88         u32 data[4];
  89         u32 i = 0;
  90
  91         if ((!(mask & hw->debug_mask)) || (desc == NULL))
  92                 return;
  93
  94         i40e_debug(hw, mask,
  95                    "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
  96                    aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
  97                    aq_desc->retval);
  98         i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
  99                    aq_desc->cookie_high, aq_desc->cookie_low);
 100         i40e_debug(hw, mask, "\tparam (0,1)  0x%08X 0x%08X\n",
 101                    aq_desc->params.internal.param0,
 102                    aq_desc->params.internal.param1);
 103         i40e_debug(hw, mask, "\taddr (h,l)   0x%08X 0x%08X\n",
 104                    aq_desc->params.external.addr_high,
 105                    aq_desc->params.external.addr_low);
 106
 107         if ((buffer != NULL) && (aq_desc->datalen != 0)) {
 108                 memset(data, 0, sizeof(data));
 109                 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
 110                 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
 111                         data[((i % 16) / 4)] |=
 112                                 ((u32)aq_buffer[i]) << (8 * (i % 4));
 113                         if ((i % 16) == 15) {
 114                                 i40e_debug(hw, mask,
 115                                            "\t0x%04X  %08X %08X %08X %08X\n",
 116                                            i - 15, data[0], data[1], data[2],
 117                                            data[3]);
 118                                 memset(data, 0, sizeof(data));
 119                         }
 120                 }
 121                 if ((i % 16) != 0)
 122                         i40e_debug(hw, mask, "\t0x%04X  %08X %08X %08X %08X\n",
 123                                    i - (i % 16), data[0], data[1], data[2],
 124                                    data[3]);
 125         }
 126 }
 127
 128 /**
 129  * i40e_check_asq_alive
 130  * @hw: pointer to the hw struct
 131  *
 132  * Returns true if Queue is enabled else false.
 133  **/
 134 bool i40e_check_asq_alive(struct i40e_hw *hw)
 135 {
 136         return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK);
 137 }
 138
 139 /**
 140  * i40e_aq_queue_shutdown
 141  * @hw: pointer to the hw struct
 142  * @unloading: is the driver unloading itself
 143  *
 144  * Tell the Firmware that we're shutting down the AdminQ and whether
 145  * or not the driver is unloading as well.
 146  **/
 147 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
 148                                              bool unloading)
 149 {
 150         struct i40e_aq_desc desc;
 151         struct i40e_aqc_queue_shutdown *cmd =
 152                 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
 153         i40e_status status;
 154
 155         i40e_fill_default_direct_cmd_desc(&desc,
 156                                           i40e_aqc_opc_queue_shutdown);
 157
 158         if (unloading)
 159                 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
 160         status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
 161
 162         return status;
 163 }
 164
 165
 166 /**
 167  * i40e_init_shared_code - Initialize the shared code
 168  * @hw: pointer to hardware structure
 169  *
 170  * This assigns the MAC type and PHY code and inits the NVM.
 171  * Does not touch the hardware. This function must be called prior to any
 172  * other function in the shared code. The i40e_hw structure should be
 173  * memset to 0 prior to calling this function.  The following fields in
 174  * hw structure should be filled in prior to calling this function:
 175  * hw_addr, back, device_id, vendor_id, subsystem_device_id,
 176  * subsystem_vendor_id, and revision_id
 177  **/
 178 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
 179 {
 180         i40e_status status = 0;
 181         u32 reg;
 182
 183         i40e_set_mac_type(hw);
 184
 185         switch (hw->mac.type) {
 186         case I40E_MAC_XL710:
 187                 break;
 188         default:
 189                 return I40E_ERR_DEVICE_NOT_SUPPORTED;
 190                 break;
 191         }
 192
 193         hw->phy.get_link_info = true;
 194
 195         /* Determine port number */
 196         reg = rd32(hw, I40E_PFGEN_PORTNUM);
 197         reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
 198                I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
 199         hw->port = (u8)reg;
 200
 201         /* Determine the PF number based on the PCI fn */
 202         reg = rd32(hw, I40E_GLPCI_CAPSUP);
 203         if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
 204                 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
 205         else
 206                 hw->pf_id = (u8)hw->bus.func;
 207
 208         status = i40e_init_nvm(hw);
 209         return status;
 210 }
 211
 212 /**
 213  * i40e_aq_mac_address_read - Retrieve the MAC addresses
 214  * @hw: pointer to the hw struct
 215  * @flags: a return indicator of what addresses were added to the addr store
 216  * @addrs: the requestor's mac addr store
 217  * @cmd_details: pointer to command details structure or NULL
 218  **/
 219 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
 220                                    u16 *flags,
 221                                    struct i40e_aqc_mac_address_read_data *addrs,
 222                                    struct i40e_asq_cmd_details *cmd_details)
 223 {
 224         struct i40e_aq_desc desc;
 225         struct i40e_aqc_mac_address_read *cmd_data =
 226                 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
 227         i40e_status status;
 228
 229         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
 230         desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
 231
 232         status = i40e_asq_send_command(hw, &desc, addrs,
 233                                        sizeof(*addrs), cmd_details);
 234         *flags = le16_to_cpu(cmd_data->command_flags);
 235
 236         return status;
 237 }
 238
 239 /**
 240  * i40e_aq_mac_address_write - Change the MAC addresses
 241  * @hw: pointer to the hw struct
 242  * @flags: indicates which MAC to be written
 243  * @mac_addr: address to write
 244  * @cmd_details: pointer to command details structure or NULL
 245  **/
 246 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
 247                                     u16 flags, u8 *mac_addr,
 248                                     struct i40e_asq_cmd_details *cmd_details)
 249 {
 250         struct i40e_aq_desc desc;
 251         struct i40e_aqc_mac_address_write *cmd_data =
 252                 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
 253         i40e_status status;
 254
 255         i40e_fill_default_direct_cmd_desc(&desc,
 256                                           i40e_aqc_opc_mac_address_write);
 257         cmd_data->command_flags = cpu_to_le16(flags);
 258         cmd_data->mac_sah = cpu_to_le16((u16)mac_addr[0] << 8 | mac_addr[1]);
 259         cmd_data->mac_sal = cpu_to_le32(((u32)mac_addr[2] << 24) |
 260                                         ((u32)mac_addr[3] << 16) |
 261                                         ((u32)mac_addr[4] << 8) |
 262                                         mac_addr[5]);
 263
 264         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 265
 266         return status;
 267 }
 268
 269 /**
 270  * i40e_get_mac_addr - get MAC address
 271  * @hw: pointer to the HW structure
 272  * @mac_addr: pointer to MAC address
 273  *
 274  * Reads the adapter's MAC address from register
 275  **/
 276 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
 277 {
 278         struct i40e_aqc_mac_address_read_data addrs;
 279         i40e_status status;
 280         u16 flags = 0;
 281
 282         status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
 283
 284         if (flags & I40E_AQC_LAN_ADDR_VALID)
 285                 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
 286
 287         return status;
 288 }
 289
 290 /**
 291  * i40e_get_media_type - Gets media type
 292  * @hw: pointer to the hardware structure
 293  **/
 294 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
 295 {
 296         enum i40e_media_type media;
 297
 298         switch (hw->phy.link_info.phy_type) {
 299         case I40E_PHY_TYPE_10GBASE_SR:
 300         case I40E_PHY_TYPE_10GBASE_LR:
 301         case I40E_PHY_TYPE_40GBASE_SR4:
 302         case I40E_PHY_TYPE_40GBASE_LR4:
 303                 media = I40E_MEDIA_TYPE_FIBER;
 304                 break;
 305         case I40E_PHY_TYPE_100BASE_TX:
 306         case I40E_PHY_TYPE_1000BASE_T:
 307         case I40E_PHY_TYPE_10GBASE_T:
 308                 media = I40E_MEDIA_TYPE_BASET;
 309                 break;
 310         case I40E_PHY_TYPE_10GBASE_CR1_CU:
 311         case I40E_PHY_TYPE_40GBASE_CR4_CU:
 312         case I40E_PHY_TYPE_10GBASE_CR1:
 313         case I40E_PHY_TYPE_40GBASE_CR4:
 314         case I40E_PHY_TYPE_10GBASE_SFPP_CU:
 315                 media = I40E_MEDIA_TYPE_DA;
 316                 break;
 317         case I40E_PHY_TYPE_1000BASE_KX:
 318         case I40E_PHY_TYPE_10GBASE_KX4:
 319         case I40E_PHY_TYPE_10GBASE_KR:
 320         case I40E_PHY_TYPE_40GBASE_KR4:
 321                 media = I40E_MEDIA_TYPE_BACKPLANE;
 322                 break;
 323         case I40E_PHY_TYPE_SGMII:
 324         case I40E_PHY_TYPE_XAUI:
 325         case I40E_PHY_TYPE_XFI:
 326         case I40E_PHY_TYPE_XLAUI:
 327         case I40E_PHY_TYPE_XLPPI:
 328         default:
 329                 media = I40E_MEDIA_TYPE_UNKNOWN;
 330                 break;
 331         }
 332
 333         return media;
 334 }
 335
 336 #define I40E_PF_RESET_WAIT_COUNT_A0     200
 337 #define I40E_PF_RESET_WAIT_COUNT        10
 338 /**
 339  * i40e_pf_reset - Reset the PF
 340  * @hw: pointer to the hardware structure
 341  *
 342  * Assuming someone else has triggered a global reset,
 343  * assure the global reset is complete and then reset the PF
 344  **/
 345 i40e_status i40e_pf_reset(struct i40e_hw *hw)
 346 {
 347         u32 cnt = 0;
 348         u32 cnt1 = 0;
 349         u32 reg = 0;
 350         u32 grst_del;
 351
 352         /* Poll for Global Reset steady state in case of recent GRST.
 353          * The grst delay value is in 100ms units, and we'll wait a
 354          * couple counts longer to be sure we don't just miss the end.
 355          */
 356         grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
 357                         >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
 358         for (cnt = 0; cnt < grst_del + 2; cnt++) {
 359                 reg = rd32(hw, I40E_GLGEN_RSTAT);
 360                 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
 361                         break;
 362                 msleep(100);
 363         }
 364         if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
 365                 hw_dbg(hw, "Global reset polling failed to complete.\n");
 366                 return I40E_ERR_RESET_FAILED;
 367         }
 368
 369         /* Now Wait for the FW to be ready */
 370         for (cnt1 = 0; cnt1 < I40E_PF_RESET_WAIT_COUNT; cnt1++) {
 371                 reg = rd32(hw, I40E_GLNVM_ULD);
 372                 reg &= (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 373                         I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK);
 374                 if (reg == (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 375                             I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK)) {
 376                         hw_dbg(hw, "Core and Global modules ready %d\n", cnt1);
 377                         break;
 378                 }
 379                 usleep_range(10000, 20000);
 380         }
 381         if (!(reg & (I40E_GLNVM_ULD_CONF_CORE_DONE_MASK |
 382                      I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK))) {
 383                 hw_dbg(hw, "wait for FW Reset complete timedout\n");
 384                 hw_dbg(hw, "I40E_GLNVM_ULD = 0x%x\n", reg);
 385                 return I40E_ERR_RESET_FAILED;
 386         }
 387
 388         /* If there was a Global Reset in progress when we got here,
 389          * we don't need to do the PF Reset
 390          */
 391         if (!cnt) {
 392                 if (hw->revision_id == 0)
 393                         cnt = I40E_PF_RESET_WAIT_COUNT_A0;
 394                 else
 395                         cnt = I40E_PF_RESET_WAIT_COUNT;
 396                 reg = rd32(hw, I40E_PFGEN_CTRL);
 397                 wr32(hw, I40E_PFGEN_CTRL,
 398                      (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
 399                 for (; cnt; cnt--) {
 400                         reg = rd32(hw, I40E_PFGEN_CTRL);
 401                         if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
 402                                 break;
 403                         usleep_range(1000, 2000);
 404                 }
 405                 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
 406                         hw_dbg(hw, "PF reset polling failed to complete.\n");
 407                         return I40E_ERR_RESET_FAILED;
 408                 }
 409         }
 410
 411         i40e_clear_pxe_mode(hw);
 412
 413         return 0;
 414 }
 415
 416 /**
 417  * i40e_clear_pxe_mode - clear pxe operations mode
 418  * @hw: pointer to the hw struct
 419  *
 420  * Make sure all PXE mode settings are cleared, including things
 421  * like descriptor fetch/write-back mode.
 422  **/
 423 void i40e_clear_pxe_mode(struct i40e_hw *hw)
 424 {
 425         u32 reg;
 426
 427         /* Clear single descriptor fetch/write-back mode */
 428         reg = rd32(hw, I40E_GLLAN_RCTL_0);
 429
 430         if (hw->revision_id == 0) {
 431                 /* As a work around clear PXE_MODE instead of setting it */
 432                 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
 433         } else {
 434                 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
 435         }
 436 }
 437
 438 /**
 439  * i40e_led_is_mine - helper to find matching led
 440  * @hw: pointer to the hw struct
 441  * @idx: index into GPIO registers
 442  *
 443  * returns: 0 if no match, otherwise the value of the GPIO_CTL register
 444  */
 445 static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)
 446 {
 447         u32 gpio_val = 0;
 448         u32 port;
 449
 450         if (!hw->func_caps.led[idx])
 451                 return 0;
 452
 453         gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
 454         port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK) >>
 455                 I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
 456
 457         /* if PRT_NUM_NA is 1 then this LED is not port specific, OR
 458          * if it is not our port then ignore
 459          */
 460         if ((gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_MASK) ||
 461             (port != hw->port))
 462                 return 0;
 463
 464         return gpio_val;
 465 }
 466
 467 #define I40E_LED0 22
 468 #define I40E_LINK_ACTIVITY 0xC
 469
 470 /**
 471  * i40e_led_get - return current on/off mode
 472  * @hw: pointer to the hw struct
 473  *
 474  * The value returned is the 'mode' field as defined in the
 475  * GPIO register definitions: 0x0 = off, 0xf = on, and other
 476  * values are variations of possible behaviors relating to
 477  * blink, link, and wire.
 478  **/
 479 u32 i40e_led_get(struct i40e_hw *hw)
 480 {
 481         u32 mode = 0;
 482         int i;
 483
 484         /* as per the documentation GPIO 22-29 are the LED
 485          * GPIO pins named LED0..LED7
 486          */
 487         for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
 488                 u32 gpio_val = i40e_led_is_mine(hw, i);
 489
 490                 if (!gpio_val)
 491                         continue;
 492
 493                 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >>
 494                         I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT;
 495                 break;
 496         }
 497
 498         return mode;
 499 }
 500
 501 /**
 502  * i40e_led_set - set new on/off mode
 503  * @hw: pointer to the hw struct
 504  * @mode: 0=off, 0xf=on (else see manual for mode details)
 505  * @blink: true if the LED should blink when on, false if steady
 506  *
 507  * if this function is used to turn on the blink it should
 508  * be used to disable the blink when restoring the original state.
 509  **/
 510 void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
 511 {
 512         int i;
 513
 514         if (mode & 0xfffffff0)
 515                 hw_dbg(hw, "invalid mode passed in %X\n", mode);
 516
 517         /* as per the documentation GPIO 22-29 are the LED
 518          * GPIO pins named LED0..LED7
 519          */
 520         for (i = I40E_LED0; i <= I40E_GLGEN_GPIO_CTL_MAX_INDEX; i++) {
 521                 u32 gpio_val = i40e_led_is_mine(hw, i);
 522
 523                 if (!gpio_val)
 524                         continue;
 525
 526                 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
 527                 /* this & is a bit of paranoia, but serves as a range check */
 528                 gpio_val |= ((mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
 529                              I40E_GLGEN_GPIO_CTL_LED_MODE_MASK);
 530
 531                 if (mode == I40E_LINK_ACTIVITY)
 532                         blink = false;
 533
 534                 gpio_val |= (blink ? 1 : 0) <<
 535                             I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT;
 536
 537                 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
 538                 break;
 539         }
 540 }
 541
 542 /* Admin command wrappers */
 543
 544 /**
 545  * i40e_aq_set_link_restart_an
 546  * @hw: pointer to the hw struct
 547  * @cmd_details: pointer to command details structure or NULL
 548  *
 549  * Sets up the link and restarts the Auto-Negotiation over the link.
 550  **/
 551 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
 552                                 struct i40e_asq_cmd_details *cmd_details)
 553 {
 554         struct i40e_aq_desc desc;
 555         struct i40e_aqc_set_link_restart_an *cmd =
 556                 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
 557         i40e_status status;
 558
 559         i40e_fill_default_direct_cmd_desc(&desc,
 560                                           i40e_aqc_opc_set_link_restart_an);
 561
 562         cmd->command = I40E_AQ_PHY_RESTART_AN;
 563
 564         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 565
 566         return status;
 567 }
 568
 569 /**
 570  * i40e_aq_get_link_info
 571  * @hw: pointer to the hw struct
 572  * @enable_lse: enable/disable LinkStatusEvent reporting
 573  * @link: pointer to link status structure - optional
 574  * @cmd_details: pointer to command details structure or NULL
 575  *
 576  * Returns the link status of the adapter.
 577  **/
 578 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
 579                                 bool enable_lse, struct i40e_link_status *link,
 580                                 struct i40e_asq_cmd_details *cmd_details)
 581 {
 582         struct i40e_aq_desc desc;
 583         struct i40e_aqc_get_link_status *resp =
 584                 (struct i40e_aqc_get_link_status *)&desc.params.raw;
 585         struct i40e_link_status *hw_link_info = &hw->phy.link_info;
 586         i40e_status status;
 587         u16 command_flags;
 588
 589         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
 590
 591         if (enable_lse)
 592                 command_flags = I40E_AQ_LSE_ENABLE;
 593         else
 594                 command_flags = I40E_AQ_LSE_DISABLE;
 595         resp->command_flags = cpu_to_le16(command_flags);
 596
 597         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 598
 599         if (status)
 600                 goto aq_get_link_info_exit;
 601
 602         /* save off old link status information */
 603         hw->phy.link_info_old = *hw_link_info;
 604
 605         /* update link status */
 606         hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
 607         hw->phy.media_type = i40e_get_media_type(hw);
 608         hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
 609         hw_link_info->link_info = resp->link_info;
 610         hw_link_info->an_info = resp->an_info;
 611         hw_link_info->ext_info = resp->ext_info;
 612         hw_link_info->loopback = resp->loopback;
 613
 614         if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
 615                 hw_link_info->lse_enable = true;
 616         else
 617                 hw_link_info->lse_enable = false;
 618
 619         /* save link status information */
 620         if (link)
 621                 *link = *hw_link_info;
 622
 623         /* flag cleared so helper functions don't call AQ again */
 624         hw->phy.get_link_info = false;
 625
 626 aq_get_link_info_exit:
 627         return status;
 628 }
 629
 630 /**
 631  * i40e_aq_add_vsi
 632  * @hw: pointer to the hw struct
 633  * @vsi_ctx: pointer to a vsi context struct
 634  * @cmd_details: pointer to command details structure or NULL
 635  *
 636  * Add a VSI context to the hardware.
 637 **/
 638 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
 639                                 struct i40e_vsi_context *vsi_ctx,
 640                                 struct i40e_asq_cmd_details *cmd_details)
 641 {
 642         struct i40e_aq_desc desc;
 643         struct i40e_aqc_add_get_update_vsi *cmd =
 644                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 645         struct i40e_aqc_add_get_update_vsi_completion *resp =
 646                 (struct i40e_aqc_add_get_update_vsi_completion *)
 647                 &desc.params.raw;
 648         i40e_status status;
 649
 650         i40e_fill_default_direct_cmd_desc(&desc,
 651                                           i40e_aqc_opc_add_vsi);
 652
 653         cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
 654         cmd->connection_type = vsi_ctx->connection_type;
 655         cmd->vf_id = vsi_ctx->vf_num;
 656         cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
 657
 658         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 659         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 660                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 661
 662         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 663                                     sizeof(vsi_ctx->info), cmd_details);
 664
 665         if (status)
 666                 goto aq_add_vsi_exit;
 667
 668         vsi_ctx->seid = le16_to_cpu(resp->seid);
 669         vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
 670         vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
 671         vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
 672
 673 aq_add_vsi_exit:
 674         return status;
 675 }
 676
 677 /**
 678  * i40e_aq_set_vsi_unicast_promiscuous
 679  * @hw: pointer to the hw struct
 680  * @seid: vsi number
 681  * @set: set unicast promiscuous enable/disable
 682  * @cmd_details: pointer to command details structure or NULL
 683  **/
 684 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
 685                                 u16 seid, bool set,
 686                                 struct i40e_asq_cmd_details *cmd_details)
 687 {
 688         struct i40e_aq_desc desc;
 689         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 690                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 691         i40e_status status;
 692         u16 flags = 0;
 693
 694         i40e_fill_default_direct_cmd_desc(&desc,
 695                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 696
 697         if (set)
 698                 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
 699
 700         cmd->promiscuous_flags = cpu_to_le16(flags);
 701
 702         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
 703
 704         cmd->seid = cpu_to_le16(seid);
 705         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 706
 707         return status;
 708 }
 709
 710 /**
 711  * i40e_aq_set_vsi_multicast_promiscuous
 712  * @hw: pointer to the hw struct
 713  * @seid: vsi number
 714  * @set: set multicast promiscuous enable/disable
 715  * @cmd_details: pointer to command details structure or NULL
 716  **/
 717 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
 718                                 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
 719 {
 720         struct i40e_aq_desc desc;
 721         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 722                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 723         i40e_status status;
 724         u16 flags = 0;
 725
 726         i40e_fill_default_direct_cmd_desc(&desc,
 727                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 728
 729         if (set)
 730                 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
 731
 732         cmd->promiscuous_flags = cpu_to_le16(flags);
 733
 734         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
 735
 736         cmd->seid = cpu_to_le16(seid);
 737         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 738
 739         return status;
 740 }
 741
 742 /**
 743  * i40e_aq_set_vsi_broadcast
 744  * @hw: pointer to the hw struct
 745  * @seid: vsi number
 746  * @set_filter: true to set filter, false to clear filter
 747  * @cmd_details: pointer to command details structure or NULL
 748  *
 749  * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
 750  **/
 751 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
 752                                 u16 seid, bool set_filter,
 753                                 struct i40e_asq_cmd_details *cmd_details)
 754 {
 755         struct i40e_aq_desc desc;
 756         struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
 757                 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
 758         i40e_status status;
 759
 760         i40e_fill_default_direct_cmd_desc(&desc,
 761                                         i40e_aqc_opc_set_vsi_promiscuous_modes);
 762
 763         if (set_filter)
 764                 cmd->promiscuous_flags
 765                             |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 766         else
 767                 cmd->promiscuous_flags
 768                             &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 769
 770         cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
 771         cmd->seid = cpu_to_le16(seid);
 772         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 773
 774         return status;
 775 }
 776
 777 /**
 778  * i40e_get_vsi_params - get VSI configuration info
 779  * @hw: pointer to the hw struct
 780  * @vsi_ctx: pointer to a vsi context struct
 781  * @cmd_details: pointer to command details structure or NULL
 782  **/
 783 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
 784                                 struct i40e_vsi_context *vsi_ctx,
 785                                 struct i40e_asq_cmd_details *cmd_details)
 786 {
 787         struct i40e_aq_desc desc;
 788         struct i40e_aqc_add_get_update_vsi *cmd =
 789                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 790         struct i40e_aqc_add_get_update_vsi_completion *resp =
 791                 (struct i40e_aqc_add_get_update_vsi_completion *)
 792                 &desc.params.raw;
 793         i40e_status status;
 794
 795         i40e_fill_default_direct_cmd_desc(&desc,
 796                                           i40e_aqc_opc_get_vsi_parameters);
 797
 798         cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
 799
 800         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
 801         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 802                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 803
 804         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 805                                     sizeof(vsi_ctx->info), NULL);
 806
 807         if (status)
 808                 goto aq_get_vsi_params_exit;
 809
 810         vsi_ctx->seid = le16_to_cpu(resp->seid);
 811         vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
 812         vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
 813         vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
 814
 815 aq_get_vsi_params_exit:
 816         return status;
 817 }
 818
 819 /**
 820  * i40e_aq_update_vsi_params
 821  * @hw: pointer to the hw struct
 822  * @vsi_ctx: pointer to a vsi context struct
 823  * @cmd_details: pointer to command details structure or NULL
 824  *
 825  * Update a VSI context.
 826  **/
 827 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
 828                                 struct i40e_vsi_context *vsi_ctx,
 829                                 struct i40e_asq_cmd_details *cmd_details)
 830 {
 831         struct i40e_aq_desc desc;
 832         struct i40e_aqc_add_get_update_vsi *cmd =
 833                 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
 834         i40e_status status;
 835
 836         i40e_fill_default_direct_cmd_desc(&desc,
 837                                           i40e_aqc_opc_update_vsi_parameters);
 838         cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
 839
 840         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
 841         if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
 842                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 843
 844         status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
 845                                     sizeof(vsi_ctx->info), cmd_details);
 846
 847         return status;
 848 }
 849
 850 /**
 851  * i40e_aq_get_switch_config
 852  * @hw: pointer to the hardware structure
 853  * @buf: pointer to the result buffer
 854  * @buf_size: length of input buffer
 855  * @start_seid: seid to start for the report, 0 == beginning
 856  * @cmd_details: pointer to command details structure or NULL
 857  *
 858  * Fill the buf with switch configuration returned from AdminQ command
 859  **/
 860 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
 861                                 struct i40e_aqc_get_switch_config_resp *buf,
 862                                 u16 buf_size, u16 *start_seid,
 863                                 struct i40e_asq_cmd_details *cmd_details)
 864 {
 865         struct i40e_aq_desc desc;
 866         struct i40e_aqc_switch_seid *scfg =
 867                 (struct i40e_aqc_switch_seid *)&desc.params.raw;
 868         i40e_status status;
 869
 870         i40e_fill_default_direct_cmd_desc(&desc,
 871                                           i40e_aqc_opc_get_switch_config);
 872         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
 873         if (buf_size > I40E_AQ_LARGE_BUF)
 874                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
 875         scfg->seid = cpu_to_le16(*start_seid);
 876
 877         status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
 878         *start_seid = le16_to_cpu(scfg->seid);
 879
 880         return status;
 881 }
 882
 883 /**
 884  * i40e_aq_get_firmware_version
 885  * @hw: pointer to the hw struct
 886  * @fw_major_version: firmware major version
 887  * @fw_minor_version: firmware minor version
 888  * @api_major_version: major queue version
 889  * @api_minor_version: minor queue version
 890  * @cmd_details: pointer to command details structure or NULL
 891  *
 892  * Get the firmware version from the admin queue commands
 893  **/
 894 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
 895                                 u16 *fw_major_version, u16 *fw_minor_version,
 896                                 u16 *api_major_version, u16 *api_minor_version,
 897                                 struct i40e_asq_cmd_details *cmd_details)
 898 {
 899         struct i40e_aq_desc desc;
 900         struct i40e_aqc_get_version *resp =
 901                 (struct i40e_aqc_get_version *)&desc.params.raw;
 902         i40e_status status;
 903
 904         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
 905
 906         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 907
 908         if (!status) {
 909                 if (fw_major_version != NULL)
 910                         *fw_major_version = le16_to_cpu(resp->fw_major);
 911                 if (fw_minor_version != NULL)
 912                         *fw_minor_version = le16_to_cpu(resp->fw_minor);
 913                 if (api_major_version != NULL)
 914                         *api_major_version = le16_to_cpu(resp->api_major);
 915                 if (api_minor_version != NULL)
 916                         *api_minor_version = le16_to_cpu(resp->api_minor);
 917         }
 918
 919         return status;
 920 }
 921
 922 /**
 923  * i40e_aq_send_driver_version
 924  * @hw: pointer to the hw struct
 925  * @dv: driver's major, minor version
 926  * @cmd_details: pointer to command details structure or NULL
 927  *
 928  * Send the driver version to the firmware
 929  **/
 930 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
 931                                 struct i40e_driver_version *dv,
 932                                 struct i40e_asq_cmd_details *cmd_details)
 933 {
 934         struct i40e_aq_desc desc;
 935         struct i40e_aqc_driver_version *cmd =
 936                 (struct i40e_aqc_driver_version *)&desc.params.raw;
 937         i40e_status status;
 938
 939         if (dv == NULL)
 940                 return I40E_ERR_PARAM;
 941
 942         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
 943
 944         desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
 945         cmd->driver_major_ver = dv->major_version;
 946         cmd->driver_minor_ver = dv->minor_version;
 947         cmd->driver_build_ver = dv->build_version;
 948         cmd->driver_subbuild_ver = dv->subbuild_version;
 949         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
 950
 951         return status;
 952 }
 953
 954 /**
 955  * i40e_get_link_status - get status of the HW network link
 956  * @hw: pointer to the hw struct
 957  *
 958  * Returns true if link is up, false if link is down.
 959  *
 960  * Side effect: LinkStatusEvent reporting becomes enabled
 961  **/
 962 bool i40e_get_link_status(struct i40e_hw *hw)
 963 {
 964         i40e_status status = 0;
 965         bool link_status = false;
 966
 967         if (hw->phy.get_link_info) {
 968                 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
 969
 970                 if (status)
 971                         goto i40e_get_link_status_exit;
 972         }
 973
 974         link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
 975
 976 i40e_get_link_status_exit:
 977         return link_status;
 978 }
 979
 980 /**
 981  * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
 982  * @hw: pointer to the hw struct
 983  * @uplink_seid: the MAC or other gizmo SEID
 984  * @downlink_seid: the VSI SEID
 985  * @enabled_tc: bitmap of TCs to be enabled
 986  * @default_port: true for default port VSI, false for control port
 987  * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
 988  * @veb_seid: pointer to where to put the resulting VEB SEID
 989  * @cmd_details: pointer to command details structure or NULL
 990  *
 991  * This asks the FW to add a VEB between the uplink and downlink
 992  * elements.  If the uplink SEID is 0, this will be a floating VEB.
 993  **/
 994 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
 995                                 u16 downlink_seid, u8 enabled_tc,
 996                                 bool default_port, bool enable_l2_filtering,
 997                                 u16 *veb_seid,
 998                                 struct i40e_asq_cmd_details *cmd_details)
 999 {
1000         struct i40e_aq_desc desc;
1001         struct i40e_aqc_add_veb *cmd =
1002                 (struct i40e_aqc_add_veb *)&desc.params.raw;
1003         struct i40e_aqc_add_veb_completion *resp =
1004                 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
1005         i40e_status status;
1006         u16 veb_flags = 0;
1007
1008         /* SEIDs need to either both be set or both be 0 for floating VEB */
1009         if (!!uplink_seid != !!downlink_seid)
1010                 return I40E_ERR_PARAM;
1011
1012         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
1013
1014         cmd->uplink_seid = cpu_to_le16(uplink_seid);
1015         cmd->downlink_seid = cpu_to_le16(downlink_seid);
1016         cmd->enable_tcs = enabled_tc;
1017         if (!uplink_seid)
1018                 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
1019         if (default_port)
1020                 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
1021         else
1022                 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
1023
1024         if (enable_l2_filtering)
1025                 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
1026
1027         cmd->veb_flags = cpu_to_le16(veb_flags);
1028
1029         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1030
1031         if (!status && veb_seid)
1032                 *veb_seid = le16_to_cpu(resp->veb_seid);
1033
1034         return status;
1035 }
1036
1037 /**
1038  * i40e_aq_get_veb_parameters - Retrieve VEB parameters
1039  * @hw: pointer to the hw struct
1040  * @veb_seid: the SEID of the VEB to query
1041  * @switch_id: the uplink switch id
1042  * @floating: set to true if the VEB is floating
1043  * @statistic_index: index of the stats counter block for this VEB
1044  * @vebs_used: number of VEB's used by function
1045  * @vebs_free: total VEB's not reserved by any function
1046  * @cmd_details: pointer to command details structure or NULL
1047  *
1048  * This retrieves the parameters for a particular VEB, specified by
1049  * uplink_seid, and returns them to the caller.
1050  **/
1051 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1052                                 u16 veb_seid, u16 *switch_id,
1053                                 bool *floating, u16 *statistic_index,
1054                                 u16 *vebs_used, u16 *vebs_free,
1055                                 struct i40e_asq_cmd_details *cmd_details)
1056 {
1057         struct i40e_aq_desc desc;
1058         struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1059                 (struct i40e_aqc_get_veb_parameters_completion *)
1060                 &desc.params.raw;
1061         i40e_status status;
1062
1063         if (veb_seid == 0)
1064                 return I40E_ERR_PARAM;
1065
1066         i40e_fill_default_direct_cmd_desc(&desc,
1067                                           i40e_aqc_opc_get_veb_parameters);
1068         cmd_resp->seid = cpu_to_le16(veb_seid);
1069
1070         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1071         if (status)
1072                 goto get_veb_exit;
1073
1074         if (switch_id)
1075                 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1076         if (statistic_index)
1077                 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1078         if (vebs_used)
1079                 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1080         if (vebs_free)
1081                 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1082         if (floating) {
1083                 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1084                 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1085                         *floating = true;
1086                 else
1087                         *floating = false;
1088         }
1089
1090 get_veb_exit:
1091         return status;
1092 }
1093
1094 /**
1095  * i40e_aq_add_macvlan
1096  * @hw: pointer to the hw struct
1097  * @seid: VSI for the mac address
1098  * @mv_list: list of macvlans to be added
1099  * @count: length of the list
1100  * @cmd_details: pointer to command details structure or NULL
1101  *
1102  * Add MAC/VLAN addresses to the HW filtering
1103  **/
1104 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1105                         struct i40e_aqc_add_macvlan_element_data *mv_list,
1106                         u16 count, struct i40e_asq_cmd_details *cmd_details)
1107 {
1108         struct i40e_aq_desc desc;
1109         struct i40e_aqc_macvlan *cmd =
1110                 (struct i40e_aqc_macvlan *)&desc.params.raw;
1111         i40e_status status;
1112         u16 buf_size;
1113
1114         if (count == 0 || !mv_list || !hw)
1115                 return I40E_ERR_PARAM;
1116
1117         buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1118
1119         /* prep the rest of the request */
1120         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1121         cmd->num_addresses = cpu_to_le16(count);
1122         cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1123         cmd->seid[1] = 0;
1124         cmd->seid[2] = 0;
1125
1126         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1127         if (buf_size > I40E_AQ_LARGE_BUF)
1128                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1129
1130         status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1131                                     cmd_details);
1132
1133         return status;
1134 }
1135
1136 /**
1137  * i40e_aq_remove_macvlan
1138  * @hw: pointer to the hw struct
1139  * @seid: VSI for the mac address
1140  * @mv_list: list of macvlans to be removed
1141  * @count: length of the list
1142  * @cmd_details: pointer to command details structure or NULL
1143  *
1144  * Remove MAC/VLAN addresses from the HW filtering
1145  **/
1146 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1147                         struct i40e_aqc_remove_macvlan_element_data *mv_list,
1148                         u16 count, struct i40e_asq_cmd_details *cmd_details)
1149 {
1150         struct i40e_aq_desc desc;
1151         struct i40e_aqc_macvlan *cmd =
1152                 (struct i40e_aqc_macvlan *)&desc.params.raw;
1153         i40e_status status;
1154         u16 buf_size;
1155
1156         if (count == 0 || !mv_list || !hw)
1157                 return I40E_ERR_PARAM;
1158
1159         buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1160
1161         /* prep the rest of the request */
1162         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1163         cmd->num_addresses = cpu_to_le16(count);
1164         cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1165         cmd->seid[1] = 0;
1166         cmd->seid[2] = 0;
1167
1168         desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1169         if (buf_size > I40E_AQ_LARGE_BUF)
1170                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1171
1172         status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1173                                        cmd_details);
1174
1175         return status;
1176 }
1177
1178 /**
1179  * i40e_aq_send_msg_to_vf
1180  * @hw: pointer to the hardware structure
1181  * @vfid: vf id to send msg
1182  * @v_opcode: opcodes for VF-PF communication
1183  * @v_retval: return error code
1184  * @msg: pointer to the msg buffer
1185  * @msglen: msg length
1186  * @cmd_details: pointer to command details
1187  *
1188  * send msg to vf
1189  **/
1190 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1191                                 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1192                                 struct i40e_asq_cmd_details *cmd_details)
1193 {
1194         struct i40e_aq_desc desc;
1195         struct i40e_aqc_pf_vf_message *cmd =
1196                 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1197         i40e_status status;
1198
1199         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1200         cmd->id = cpu_to_le32(vfid);
1201         desc.cookie_high = cpu_to_le32(v_opcode);
1202         desc.cookie_low = cpu_to_le32(v_retval);
1203         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1204         if (msglen) {
1205                 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1206                                                 I40E_AQ_FLAG_RD));
1207                 if (msglen > I40E_AQ_LARGE_BUF)
1208                         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1209                 desc.datalen = cpu_to_le16(msglen);
1210         }
1211         status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1212
1213         return status;
1214 }
1215
1216 /**
1217  * i40e_aq_set_hmc_resource_profile
1218  * @hw: pointer to the hw struct
1219  * @profile: type of profile the HMC is to be set as
1220  * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1221  * @cmd_details: pointer to command details structure or NULL
1222  *
1223  * set the HMC profile of the device.
1224  **/
1225 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1226                                 enum i40e_aq_hmc_profile profile,
1227                                 u8 pe_vf_enabled_count,
1228                                 struct i40e_asq_cmd_details *cmd_details)
1229 {
1230         struct i40e_aq_desc desc;
1231         struct i40e_aq_get_set_hmc_resource_profile *cmd =
1232                 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1233         i40e_status status;
1234
1235         i40e_fill_default_direct_cmd_desc(&desc,
1236                                         i40e_aqc_opc_set_hmc_resource_profile);
1237
1238         cmd->pm_profile = (u8)profile;
1239         cmd->pe_vf_enabled = pe_vf_enabled_count;
1240
1241         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1242
1243         return status;
1244 }
1245
1246 /**
1247  * i40e_aq_request_resource
1248  * @hw: pointer to the hw struct
1249  * @resource: resource id
1250  * @access: access type
1251  * @sdp_number: resource number
1252  * @timeout: the maximum time in ms that the driver may hold the resource
1253  * @cmd_details: pointer to command details structure or NULL
1254  *
1255  * requests common resource using the admin queue commands
1256  **/
1257 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1258                                 enum i40e_aq_resources_ids resource,
1259                                 enum i40e_aq_resource_access_type access,
1260                                 u8 sdp_number, u64 *timeout,
1261                                 struct i40e_asq_cmd_details *cmd_details)
1262 {
1263         struct i40e_aq_desc desc;
1264         struct i40e_aqc_request_resource *cmd_resp =
1265                 (struct i40e_aqc_request_resource *)&desc.params.raw;
1266         i40e_status status;
1267
1268         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1269
1270         cmd_resp->resource_id = cpu_to_le16(resource);
1271         cmd_resp->access_type = cpu_to_le16(access);
1272         cmd_resp->resource_number = cpu_to_le32(sdp_number);
1273
1274         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1275         /* The completion specifies the maximum time in ms that the driver
1276          * may hold the resource in the Timeout field.
1277          * If the resource is held by someone else, the command completes with
1278          * busy return value and the timeout field indicates the maximum time
1279          * the current owner of the resource has to free it.
1280          */
1281         if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1282                 *timeout = le32_to_cpu(cmd_resp->timeout);
1283
1284         return status;
1285 }
1286
1287 /**
1288  * i40e_aq_release_resource
1289  * @hw: pointer to the hw struct
1290  * @resource: resource id
1291  * @sdp_number: resource number
1292  * @cmd_details: pointer to command details structure or NULL
1293  *
1294  * release common resource using the admin queue commands
1295  **/
1296 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1297                                 enum i40e_aq_resources_ids resource,
1298                                 u8 sdp_number,
1299                                 struct i40e_asq_cmd_details *cmd_details)
1300 {
1301         struct i40e_aq_desc desc;
1302         struct i40e_aqc_request_resource *cmd =
1303                 (struct i40e_aqc_request_resource *)&desc.params.raw;
1304         i40e_status status;
1305
1306         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1307
1308         cmd->resource_id = cpu_to_le16(resource);
1309         cmd->resource_number = cpu_to_le32(sdp_number);
1310
1311         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1312
1313         return status;
1314 }
1315
1316 /**
1317  * i40e_aq_read_nvm
1318  * @hw: pointer to the hw struct
1319  * @module_pointer: module pointer location in words from the NVM beginning
1320  * @offset: byte offset from the module beginning
1321  * @length: length of the section to be read (in bytes from the offset)
1322  * @data: command buffer (size [bytes] = length)
1323  * @last_command: tells if this is the last command in a series
1324  * @cmd_details: pointer to command details structure or NULL
1325  *
1326  * Read the NVM using the admin queue commands
1327  **/
1328 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1329                                 u32 offset, u16 length, void *data,
1330                                 bool last_command,
1331                                 struct i40e_asq_cmd_details *cmd_details)
1332 {
1333         struct i40e_aq_desc desc;
1334         struct i40e_aqc_nvm_update *cmd =
1335                 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1336         i40e_status status;
1337
1338         /* In offset the highest byte must be zeroed. */
1339         if (offset & 0xFF000000) {
1340                 status = I40E_ERR_PARAM;
1341                 goto i40e_aq_read_nvm_exit;
1342         }
1343
1344         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1345
1346         /* If this is the last command in a series, set the proper flag. */
1347         if (last_command)
1348                 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1349         cmd->module_pointer = module_pointer;
1350         cmd->offset = cpu_to_le32(offset);
1351         cmd->length = cpu_to_le16(length);
1352
1353         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1354         if (length > I40E_AQ_LARGE_BUF)
1355                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1356
1357         status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1358
1359 i40e_aq_read_nvm_exit:
1360         return status;
1361 }
1362
1363 #define I40E_DEV_FUNC_CAP_SWITCH_MODE   0x01
1364 #define I40E_DEV_FUNC_CAP_MGMT_MODE     0x02
1365 #define I40E_DEV_FUNC_CAP_NPAR          0x03
1366 #define I40E_DEV_FUNC_CAP_OS2BMC        0x04
1367 #define I40E_DEV_FUNC_CAP_VALID_FUNC    0x05
1368 #define I40E_DEV_FUNC_CAP_SRIOV_1_1     0x12
1369 #define I40E_DEV_FUNC_CAP_VF            0x13
1370 #define I40E_DEV_FUNC_CAP_VMDQ          0x14
1371 #define I40E_DEV_FUNC_CAP_802_1_QBG     0x15
1372 #define I40E_DEV_FUNC_CAP_802_1_QBH     0x16
1373 #define I40E_DEV_FUNC_CAP_VSI           0x17
1374 #define I40E_DEV_FUNC_CAP_DCB           0x18
1375 #define I40E_DEV_FUNC_CAP_FCOE          0x21
1376 #define I40E_DEV_FUNC_CAP_RSS           0x40
1377 #define I40E_DEV_FUNC_CAP_RX_QUEUES     0x41
1378 #define I40E_DEV_FUNC_CAP_TX_QUEUES     0x42
1379 #define I40E_DEV_FUNC_CAP_MSIX          0x43
1380 #define I40E_DEV_FUNC_CAP_MSIX_VF       0x44
1381 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1382 #define I40E_DEV_FUNC_CAP_IEEE_1588     0x46
1383 #define I40E_DEV_FUNC_CAP_MFP_MODE_1    0xF1
1384 #define I40E_DEV_FUNC_CAP_CEM           0xF2
1385 #define I40E_DEV_FUNC_CAP_IWARP         0x51
1386 #define I40E_DEV_FUNC_CAP_LED           0x61
1387 #define I40E_DEV_FUNC_CAP_SDP           0x62
1388 #define I40E_DEV_FUNC_CAP_MDIO          0x63
1389
1390 /**
1391  * i40e_parse_discover_capabilities
1392  * @hw: pointer to the hw struct
1393  * @buff: pointer to a buffer containing device/function capability records
1394  * @cap_count: number of capability records in the list
1395  * @list_type_opc: type of capabilities list to parse
1396  *
1397  * Parse the device/function capabilities list.
1398  **/
1399 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1400                                      u32 cap_count,
1401                                      enum i40e_admin_queue_opc list_type_opc)
1402 {
1403         struct i40e_aqc_list_capabilities_element_resp *cap;
1404         u32 number, logical_id, phys_id;
1405         struct i40e_hw_capabilities *p;
1406         u32 reg_val;
1407         u32 i = 0;
1408         u16 id;
1409
1410         cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1411
1412         if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1413                 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1414         else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1415                 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1416         else
1417                 return;
1418
1419         for (i = 0; i < cap_count; i++, cap++) {
1420                 id = le16_to_cpu(cap->id);
1421                 number = le32_to_cpu(cap->number);
1422                 logical_id = le32_to_cpu(cap->logical_id);
1423                 phys_id = le32_to_cpu(cap->phys_id);
1424
1425                 switch (id) {
1426                 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1427                         p->switch_mode = number;
1428                         break;
1429                 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1430                         p->management_mode = number;
1431                         break;
1432                 case I40E_DEV_FUNC_CAP_NPAR:
1433                         p->npar_enable = number;
1434                         break;
1435                 case I40E_DEV_FUNC_CAP_OS2BMC:
1436                         p->os2bmc = number;
1437                         break;
1438                 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1439                         p->valid_functions = number;
1440                         break;
1441                 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1442                         if (number == 1)
1443                                 p->sr_iov_1_1 = true;
1444                         break;
1445                 case I40E_DEV_FUNC_CAP_VF:
1446                         p->num_vfs = number;
1447                         p->vf_base_id = logical_id;
1448                         break;
1449                 case I40E_DEV_FUNC_CAP_VMDQ:
1450                         if (number == 1)
1451                                 p->vmdq = true;
1452                         break;
1453                 case I40E_DEV_FUNC_CAP_802_1_QBG:
1454                         if (number == 1)
1455                                 p->evb_802_1_qbg = true;
1456                         break;
1457                 case I40E_DEV_FUNC_CAP_802_1_QBH:
1458                         if (number == 1)
1459                                 p->evb_802_1_qbh = true;
1460                         break;
1461                 case I40E_DEV_FUNC_CAP_VSI:
1462                         p->num_vsis = number;
1463                         break;
1464                 case I40E_DEV_FUNC_CAP_DCB:
1465                         if (number == 1) {
1466                                 p->dcb = true;
1467                                 p->enabled_tcmap = logical_id;
1468                                 p->maxtc = phys_id;
1469                         }
1470                         break;
1471                 case I40E_DEV_FUNC_CAP_FCOE:
1472                         if (number == 1)
1473                                 p->fcoe = true;
1474                         break;
1475                 case I40E_DEV_FUNC_CAP_RSS:
1476                         p->rss = true;
1477                         reg_val = rd32(hw, I40E_PFQF_CTL_0);
1478                         if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1479                                 p->rss_table_size = number;
1480                         else
1481                                 p->rss_table_size = 128;
1482                         p->rss_table_entry_width = logical_id;
1483                         break;
1484                 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1485                         p->num_rx_qp = number;
1486                         p->base_queue = phys_id;
1487                         break;
1488                 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1489                         p->num_tx_qp = number;
1490                         p->base_queue = phys_id;
1491                         break;
1492                 case I40E_DEV_FUNC_CAP_MSIX:
1493                         p->num_msix_vectors = number;
1494                         break;
1495                 case I40E_DEV_FUNC_CAP_MSIX_VF:
1496                         p->num_msix_vectors_vf = number;
1497                         break;
1498                 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1499                         if (number == 1)
1500                                 p->mfp_mode_1 = true;
1501                         break;
1502                 case I40E_DEV_FUNC_CAP_CEM:
1503                         if (number == 1)
1504                                 p->mgmt_cem = true;
1505                         break;
1506                 case I40E_DEV_FUNC_CAP_IWARP:
1507                         if (number == 1)
1508                                 p->iwarp = true;
1509                         break;
1510                 case I40E_DEV_FUNC_CAP_LED:
1511                         if (phys_id < I40E_HW_CAP_MAX_GPIO)
1512                                 p->led[phys_id] = true;
1513                         break;
1514                 case I40E_DEV_FUNC_CAP_SDP:
1515                         if (phys_id < I40E_HW_CAP_MAX_GPIO)
1516                                 p->sdp[phys_id] = true;
1517                         break;
1518                 case I40E_DEV_FUNC_CAP_MDIO:
1519                         if (number == 1) {
1520                                 p->mdio_port_num = phys_id;
1521                                 p->mdio_port_mode = logical_id;
1522                         }
1523                         break;
1524                 case I40E_DEV_FUNC_CAP_IEEE_1588:
1525                         if (number == 1)
1526                                 p->ieee_1588 = true;
1527                         break;
1528                 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1529                         p->fd = true;
1530                         p->fd_filters_guaranteed = number;
1531                         p->fd_filters_best_effort = logical_id;
1532                         break;
1533                 default:
1534                         break;
1535                 }
1536         }
1537
1538         /* additional HW specific goodies that might
1539          * someday be HW version specific
1540          */
1541         p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1542 }
1543
1544 /**
1545  * i40e_aq_discover_capabilities
1546  * @hw: pointer to the hw struct
1547  * @buff: a virtual buffer to hold the capabilities
1548  * @buff_size: Size of the virtual buffer
1549  * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1550  * @list_type_opc: capabilities type to discover - pass in the command opcode
1551  * @cmd_details: pointer to command details structure or NULL
1552  *
1553  * Get the device capabilities descriptions from the firmware
1554  **/
1555 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1556                                 void *buff, u16 buff_size, u16 *data_size,
1557                                 enum i40e_admin_queue_opc list_type_opc,
1558                                 struct i40e_asq_cmd_details *cmd_details)
1559 {
1560         struct i40e_aqc_list_capabilites *cmd;
1561         i40e_status status = 0;
1562         struct i40e_aq_desc desc;
1563
1564         cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1565
1566         if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1567                 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1568                 status = I40E_ERR_PARAM;
1569                 goto exit;
1570         }
1571
1572         i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1573
1574         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1575         if (buff_size > I40E_AQ_LARGE_BUF)
1576                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1577
1578         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1579         *data_size = le16_to_cpu(desc.datalen);
1580
1581         if (status)
1582                 goto exit;
1583
1584         i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1585                                          list_type_opc);
1586
1587 exit:
1588         return status;
1589 }
1590
1591 /**
1592  * i40e_aq_get_lldp_mib
1593  * @hw: pointer to the hw struct
1594  * @bridge_type: type of bridge requested
1595  * @mib_type: Local, Remote or both Local and Remote MIBs
1596  * @buff: pointer to a user supplied buffer to store the MIB block
1597  * @buff_size: size of the buffer (in bytes)
1598  * @local_len : length of the returned Local LLDP MIB
1599  * @remote_len: length of the returned Remote LLDP MIB
1600  * @cmd_details: pointer to command details structure or NULL
1601  *
1602  * Requests the complete LLDP MIB (entire packet).
1603  **/
1604 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1605                                 u8 mib_type, void *buff, u16 buff_size,
1606                                 u16 *local_len, u16 *remote_len,
1607                                 struct i40e_asq_cmd_details *cmd_details)
1608 {
1609         struct i40e_aq_desc desc;
1610         struct i40e_aqc_lldp_get_mib *cmd =
1611                 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1612         struct i40e_aqc_lldp_get_mib *resp =
1613                 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1614         i40e_status status;
1615
1616         if (buff_size == 0 || !buff)
1617                 return I40E_ERR_PARAM;
1618
1619         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1620         /* Indirect Command */
1621         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1622
1623         cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1624         cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1625                        I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1626
1627         desc.datalen = cpu_to_le16(buff_size);
1628
1629         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1630         if (buff_size > I40E_AQ_LARGE_BUF)
1631                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1632
1633         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1634         if (!status) {
1635                 if (local_len != NULL)
1636                         *local_len = le16_to_cpu(resp->local_len);
1637                 if (remote_len != NULL)
1638                         *remote_len = le16_to_cpu(resp->remote_len);
1639         }
1640
1641         return status;
1642 }
1643
1644 /**
1645  * i40e_aq_cfg_lldp_mib_change_event
1646  * @hw: pointer to the hw struct
1647  * @enable_update: Enable or Disable event posting
1648  * @cmd_details: pointer to command details structure or NULL
1649  *
1650  * Enable or Disable posting of an event on ARQ when LLDP MIB
1651  * associated with the interface changes
1652  **/
1653 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1654                                 bool enable_update,
1655                                 struct i40e_asq_cmd_details *cmd_details)
1656 {
1657         struct i40e_aq_desc desc;
1658         struct i40e_aqc_lldp_update_mib *cmd =
1659                 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1660         i40e_status status;
1661
1662         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1663
1664         if (!enable_update)
1665                 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1666
1667         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1668
1669         return status;
1670 }
1671
1672 /**
1673  * i40e_aq_stop_lldp
1674  * @hw: pointer to the hw struct
1675  * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1676  * @cmd_details: pointer to command details structure or NULL
1677  *
1678  * Stop or Shutdown the embedded LLDP Agent
1679  **/
1680 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1681                                 struct i40e_asq_cmd_details *cmd_details)
1682 {
1683         struct i40e_aq_desc desc;
1684         struct i40e_aqc_lldp_stop *cmd =
1685                 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1686         i40e_status status;
1687
1688         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1689
1690         if (shutdown_agent)
1691                 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1692
1693         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1694
1695         return status;
1696 }
1697
1698 /**
1699  * i40e_aq_start_lldp
1700  * @hw: pointer to the hw struct
1701  * @cmd_details: pointer to command details structure or NULL
1702  *
1703  * Start the embedded LLDP Agent on all ports.
1704  **/
1705 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1706                                 struct i40e_asq_cmd_details *cmd_details)
1707 {
1708         struct i40e_aq_desc desc;
1709         struct i40e_aqc_lldp_start *cmd =
1710                 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1711         i40e_status status;
1712
1713         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1714
1715         cmd->command = I40E_AQ_LLDP_AGENT_START;
1716
1717         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1718
1719         return status;
1720 }
1721
1722 /**
1723  * i40e_aq_add_udp_tunnel
1724  * @hw: pointer to the hw struct
1725  * @udp_port: the UDP port to add
1726  * @header_len: length of the tunneling header length in DWords
1727  * @protocol_index: protocol index type
1728  * @filter_index: pointer to filter index
1729  * @cmd_details: pointer to command details structure or NULL
1730  **/
1731 i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
1732                                 u16 udp_port, u8 header_len,
1733                                 u8 protocol_index, u8 *filter_index,
1734                                 struct i40e_asq_cmd_details *cmd_details)
1735 {
1736         struct i40e_aq_desc desc;
1737         struct i40e_aqc_add_udp_tunnel *cmd =
1738                 (struct i40e_aqc_add_udp_tunnel *)&desc.params.raw;
1739         struct i40e_aqc_del_udp_tunnel_completion *resp =
1740                 (struct i40e_aqc_del_udp_tunnel_completion *)&desc.params.raw;
1741         i40e_status status;
1742
1743         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_udp_tunnel);
1744
1745         cmd->udp_port = cpu_to_le16(udp_port);
1746         cmd->header_len = header_len;
1747         cmd->protocol_type = protocol_index;
1748
1749         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1750
1751         if (!status)
1752                 *filter_index = resp->index;
1753
1754         return status;
1755 }
1756
1757 /**
1758  * i40e_aq_del_udp_tunnel
1759  * @hw: pointer to the hw struct
1760  * @index: filter index
1761  * @cmd_details: pointer to command details structure or NULL
1762  **/
1763 i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,
1764                                 struct i40e_asq_cmd_details *cmd_details)
1765 {
1766         struct i40e_aq_desc desc;
1767         struct i40e_aqc_remove_udp_tunnel *cmd =
1768                 (struct i40e_aqc_remove_udp_tunnel *)&desc.params.raw;
1769         i40e_status status;
1770
1771         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_del_udp_tunnel);
1772
1773         cmd->index = index;
1774
1775         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1776
1777         return status;
1778 }
1779
1780 /**
1781  * i40e_aq_delete_element - Delete switch element
1782  * @hw: pointer to the hw struct
1783  * @seid: the SEID to delete from the switch
1784  * @cmd_details: pointer to command details structure or NULL
1785  *
1786  * This deletes a switch element from the switch.
1787  **/
1788 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1789                                 struct i40e_asq_cmd_details *cmd_details)
1790 {
1791         struct i40e_aq_desc desc;
1792         struct i40e_aqc_switch_seid *cmd =
1793                 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1794         i40e_status status;
1795
1796         if (seid == 0)
1797                 return I40E_ERR_PARAM;
1798
1799         i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1800
1801         cmd->seid = cpu_to_le16(seid);
1802
1803         status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1804
1805         return status;
1806 }
1807
1808 /**
1809  * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1810  * @hw: pointer to the hw struct
1811  * @seid: seid for the physical port/switching component/vsi
1812  * @buff: Indirect buffer to hold data parameters and response
1813  * @buff_size: Indirect buffer size
1814  * @opcode: Tx scheduler AQ command opcode
1815  * @cmd_details: pointer to command details structure or NULL
1816  *
1817  * Generic command handler for Tx scheduler AQ commands
1818  **/
1819 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1820                                 void *buff, u16 buff_size,
1821                                  enum i40e_admin_queue_opc opcode,
1822                                 struct i40e_asq_cmd_details *cmd_details)
1823 {
1824         struct i40e_aq_desc desc;
1825         struct i40e_aqc_tx_sched_ind *cmd =
1826                 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1827         i40e_status status;
1828         bool cmd_param_flag = false;
1829
1830         switch (opcode) {
1831         case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1832         case i40e_aqc_opc_configure_vsi_tc_bw:
1833         case i40e_aqc_opc_enable_switching_comp_ets:
1834         case i40e_aqc_opc_modify_switching_comp_ets:
1835         case i40e_aqc_opc_disable_switching_comp_ets:
1836         case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1837         case i40e_aqc_opc_configure_switching_comp_bw_config:
1838                 cmd_param_flag = true;
1839                 break;
1840         case i40e_aqc_opc_query_vsi_bw_config:
1841         case i40e_aqc_opc_query_vsi_ets_sla_config:
1842         case i40e_aqc_opc_query_switching_comp_ets_config:
1843         case i40e_aqc_opc_query_port_ets_config:
1844         case i40e_aqc_opc_query_switching_comp_bw_config:
1845                 cmd_param_flag = false;
1846                 break;
1847         default:
1848                 return I40E_ERR_PARAM;
1849         }
1850
1851         i40e_fill_default_direct_cmd_desc(&desc, opcode);
1852
1853         /* Indirect command */
1854         desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1855         if (cmd_param_flag)
1856                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1857         if (buff_size > I40E_AQ_LARGE_BUF)
1858                 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1859
1860         desc.datalen = cpu_to_le16(buff_size);
1861
1862         cmd->vsi_seid = cpu_to_le16(seid);
1863
1864         status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1865
1866         return status;
1867 }
1868
1869 /**
1870  * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1871  * @hw: pointer to the hw struct
1872  * @seid: VSI seid
1873  * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1874  * @cmd_details: pointer to command details structure or NULL
1875  **/
1876 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1877                         u16 seid,
1878                         struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1879                         struct i40e_asq_cmd_details *cmd_details)
1880 {
1881         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1882                                     i40e_aqc_opc_configure_vsi_tc_bw,
1883                                     cmd_details);
1884 }
1885
1886 /**
1887  * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1888  * @hw: pointer to the hw struct
1889  * @seid: seid of the VSI
1890  * @bw_data: Buffer to hold VSI BW configuration
1891  * @cmd_details: pointer to command details structure or NULL
1892  **/
1893 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1894                         u16 seid,
1895                         struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1896                         struct i40e_asq_cmd_details *cmd_details)
1897 {
1898         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1899                                     i40e_aqc_opc_query_vsi_bw_config,
1900                                     cmd_details);
1901 }
1902
1903 /**
1904  * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1905  * @hw: pointer to the hw struct
1906  * @seid: seid of the VSI
1907  * @bw_data: Buffer to hold VSI BW configuration per TC
1908  * @cmd_details: pointer to command details structure or NULL
1909  **/
1910 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1911                         u16 seid,
1912                         struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1913                         struct i40e_asq_cmd_details *cmd_details)
1914 {
1915         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1916                                     i40e_aqc_opc_query_vsi_ets_sla_config,
1917                                     cmd_details);
1918 }
1919
1920 /**
1921  * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1922  * @hw: pointer to the hw struct
1923  * @seid: seid of the switching component
1924  * @bw_data: Buffer to hold switching component's per TC BW config
1925  * @cmd_details: pointer to command details structure or NULL
1926  **/
1927 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1928                 u16 seid,
1929                 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1930                 struct i40e_asq_cmd_details *cmd_details)
1931 {
1932         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1933                                    i40e_aqc_opc_query_switching_comp_ets_config,
1934                                    cmd_details);
1935 }
1936
1937 /**
1938  * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1939  * @hw: pointer to the hw struct
1940  * @seid: seid of the VSI or switching component connected to Physical Port
1941  * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1942  * @cmd_details: pointer to command details structure or NULL
1943  **/
1944 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1945                         u16 seid,
1946                         struct i40e_aqc_query_port_ets_config_resp *bw_data,
1947                         struct i40e_asq_cmd_details *cmd_details)
1948 {
1949         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1950                                     i40e_aqc_opc_query_port_ets_config,
1951                                     cmd_details);
1952 }
1953
1954 /**
1955  * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1956  * @hw: pointer to the hw struct
1957  * @seid: seid of the switching component
1958  * @bw_data: Buffer to hold switching component's BW configuration
1959  * @cmd_details: pointer to command details structure or NULL
1960  **/
1961 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1962                 u16 seid,
1963                 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1964                 struct i40e_asq_cmd_details *cmd_details)
1965 {
1966         return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1967                                     i40e_aqc_opc_query_switching_comp_bw_config,
1968                                     cmd_details);
1969 }
1970
1971 /**
1972  * i40e_validate_filter_settings
1973  * @hw: pointer to the hardware structure
1974  * @settings: Filter control settings
1975  *
1976  * Check and validate the filter control settings passed.
1977  * The function checks for the valid filter/context sizes being
1978  * passed for FCoE and PE.
1979  *
1980  * Returns 0 if the values passed are valid and within
1981  * range else returns an error.
1982  **/
1983 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1984                                 struct i40e_filter_control_settings *settings)
1985 {
1986         u32 fcoe_cntx_size, fcoe_filt_size;
1987         u32 pe_cntx_size, pe_filt_size;
1988         u32 fcoe_fmax, pe_fmax;
1989         u32 val;
1990
1991         /* Validate FCoE settings passed */
1992         switch (settings->fcoe_filt_num) {
1993         case I40E_HASH_FILTER_SIZE_1K:
1994         case I40E_HASH_FILTER_SIZE_2K:
1995         case I40E_HASH_FILTER_SIZE_4K:
1996         case I40E_HASH_FILTER_SIZE_8K:
1997         case I40E_HASH_FILTER_SIZE_16K:
1998         case I40E_HASH_FILTER_SIZE_32K:
1999                 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2000                 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
2001                 break;
2002         default:
2003                 return I40E_ERR_PARAM;
2004         }
2005
2006         switch (settings->fcoe_cntx_num) {
2007         case I40E_DMA_CNTX_SIZE_512:
2008         case I40E_DMA_CNTX_SIZE_1K:
2009         case I40E_DMA_CNTX_SIZE_2K:
2010         case I40E_DMA_CNTX_SIZE_4K:
2011                 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2012                 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
2013                 break;
2014         default:
2015                 return I40E_ERR_PARAM;
2016         }
2017
2018         /* Validate PE settings passed */
2019         switch (settings->pe_filt_num) {
2020         case I40E_HASH_FILTER_SIZE_1K:
2021         case I40E_HASH_FILTER_SIZE_2K:
2022         case I40E_HASH_FILTER_SIZE_4K:
2023         case I40E_HASH_FILTER_SIZE_8K:
2024         case I40E_HASH_FILTER_SIZE_16K:
2025         case I40E_HASH_FILTER_SIZE_32K:
2026         case I40E_HASH_FILTER_SIZE_64K:
2027         case I40E_HASH_FILTER_SIZE_128K:
2028         case I40E_HASH_FILTER_SIZE_256K:
2029         case I40E_HASH_FILTER_SIZE_512K:
2030         case I40E_HASH_FILTER_SIZE_1M:
2031                 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
2032                 pe_filt_size <<= (u32)settings->pe_filt_num;
2033                 break;
2034         default:
2035                 return I40E_ERR_PARAM;
2036         }
2037
2038         switch (settings->pe_cntx_num) {
2039         case I40E_DMA_CNTX_SIZE_512:
2040         case I40E_DMA_CNTX_SIZE_1K:
2041         case I40E_DMA_CNTX_SIZE_2K:
2042         case I40E_DMA_CNTX_SIZE_4K:
2043         case I40E_DMA_CNTX_SIZE_8K:
2044         case I40E_DMA_CNTX_SIZE_16K:
2045         case I40E_DMA_CNTX_SIZE_32K:
2046         case I40E_DMA_CNTX_SIZE_64K:
2047         case I40E_DMA_CNTX_SIZE_128K:
2048         case I40E_DMA_CNTX_SIZE_256K:
2049                 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2050                 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2051                 break;
2052         default:
2053                 return I40E_ERR_PARAM;
2054         }
2055
2056         /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2057         val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2058         fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2059                      >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2060         if (fcoe_filt_size + fcoe_cntx_size >  fcoe_fmax)
2061                 return I40E_ERR_INVALID_SIZE;
2062
2063         /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2064         val = rd32(hw, I40E_GLHMC_PEXFMAX);
2065         pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2066                    >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2067         if (pe_filt_size + pe_cntx_size >  pe_fmax)
2068                 return I40E_ERR_INVALID_SIZE;
2069
2070         return 0;
2071 }
2072
2073 /**
2074  * i40e_set_filter_control
2075  * @hw: pointer to the hardware structure
2076  * @settings: Filter control settings
2077  *
2078  * Set the Queue Filters for PE/FCoE and enable filters required
2079  * for a single PF. It is expected that these settings are programmed
2080  * at the driver initialization time.
2081  **/
2082 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2083                                 struct i40e_filter_control_settings *settings)
2084 {
2085         i40e_status ret = 0;
2086         u32 hash_lut_size = 0;
2087         u32 val;
2088
2089         if (!settings)
2090                 return I40E_ERR_PARAM;
2091
2092         /* Validate the input settings */
2093         ret = i40e_validate_filter_settings(hw, settings);
2094         if (ret)
2095                 return ret;
2096
2097         /* Read the PF Queue Filter control register */
2098         val = rd32(hw, I40E_PFQF_CTL_0);
2099
2100         /* Program required PE hash buckets for the PF */
2101         val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2102         val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2103                 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2104         /* Program required PE contexts for the PF */
2105         val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2106         val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2107                 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2108
2109         /* Program required FCoE hash buckets for the PF */
2110         val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2111         val |= ((u32)settings->fcoe_filt_num <<
2112                         I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2113                 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2114         /* Program required FCoE DDP contexts for the PF */
2115         val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2116         val |= ((u32)settings->fcoe_cntx_num <<
2117                         I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2118                 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2119
2120         /* Program Hash LUT size for the PF */
2121         val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2122         if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2123                 hash_lut_size = 1;
2124         val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2125                 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2126
2127         /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2128         if (settings->enable_fdir)
2129                 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2130         if (settings->enable_ethtype)
2131                 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2132         if (settings->enable_macvlan)
2133                 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2134
2135         wr32(hw, I40E_PFQF_CTL_0, val);
2136
2137         return 0;
2138 }
2139 /**
2140  * i40e_set_pci_config_data - store PCI bus info
2141  * @hw: pointer to hardware structure
2142  * @link_status: the link status word from PCI config space
2143  *
2144  * Stores the PCI bus info (speed, width, type) within the i40e_hw structure
2145  **/
2146 void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)
2147 {
2148         hw->bus.type = i40e_bus_type_pci_express;
2149
2150         switch (link_status & PCI_EXP_LNKSTA_NLW) {
2151         case PCI_EXP_LNKSTA_NLW_X1:
2152                 hw->bus.width = i40e_bus_width_pcie_x1;
2153                 break;
2154         case PCI_EXP_LNKSTA_NLW_X2:
2155                 hw->bus.width = i40e_bus_width_pcie_x2;
2156                 break;
2157         case PCI_EXP_LNKSTA_NLW_X4:
2158                 hw->bus.width = i40e_bus_width_pcie_x4;
2159                 break;
2160         case PCI_EXP_LNKSTA_NLW_X8:
2161                 hw->bus.width = i40e_bus_width_pcie_x8;
2162                 break;
2163         default:
2164                 hw->bus.width = i40e_bus_width_unknown;
2165                 break;
2166         }
2167
2168         switch (link_status & PCI_EXP_LNKSTA_CLS) {
2169         case PCI_EXP_LNKSTA_CLS_2_5GB:
2170                 hw->bus.speed = i40e_bus_speed_2500;
2171                 break;
2172         case PCI_EXP_LNKSTA_CLS_5_0GB:
2173                 hw->bus.speed = i40e_bus_speed_5000;
2174                 break;
2175         case PCI_EXP_LNKSTA_CLS_8_0GB:
2176                 hw->bus.speed = i40e_bus_speed_8000;
2177                 break;
2178         default:
2179                 hw->bus.speed = i40e_bus_speed_unknown;
2180                 break;
2181         }
2182 }