2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
23 /* IOC local definitions */
25 #define bfa_ioc_state_disabled(__sm) \
26 (((__sm) == BFI_IOC_UNINIT) || \
27 ((__sm) == BFI_IOC_INITING) || \
28 ((__sm) == BFI_IOC_HWINIT) || \
29 ((__sm) == BFI_IOC_DISABLED) || \
30 ((__sm) == BFI_IOC_FAIL) || \
31 ((__sm) == BFI_IOC_CFG_DISABLED))
33 /* Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details. */
35 #define bfa_ioc_firmware_lock(__ioc) \
36 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
37 #define bfa_ioc_firmware_unlock(__ioc) \
38 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
39 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
40 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
41 #define bfa_ioc_notify_fail(__ioc) \
42 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
43 #define bfa_ioc_sync_start(__ioc) \
44 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
45 #define bfa_ioc_sync_join(__ioc) \
46 ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
47 #define bfa_ioc_sync_leave(__ioc) \
48 ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
49 #define bfa_ioc_sync_ack(__ioc) \
50 ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
51 #define bfa_ioc_sync_complete(__ioc) \
52 ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
53 #define bfa_ioc_set_cur_ioc_fwstate(__ioc, __fwstate) \
54 ((__ioc)->ioc_hwif->ioc_set_fwstate(__ioc, __fwstate))
55 #define bfa_ioc_get_cur_ioc_fwstate(__ioc) \
56 ((__ioc)->ioc_hwif->ioc_get_fwstate(__ioc))
57 #define bfa_ioc_set_alt_ioc_fwstate(__ioc, __fwstate) \
58 ((__ioc)->ioc_hwif->ioc_set_alt_fwstate(__ioc, __fwstate))
59 #define bfa_ioc_get_alt_ioc_fwstate(__ioc) \
60 ((__ioc)->ioc_hwif->ioc_get_alt_fwstate(__ioc))
62 #define bfa_ioc_mbox_cmd_pending(__ioc) \
63 (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
64 readl((__ioc)->ioc_regs.hfn_mbox_cmd))
66 static bool bfa_nw_auto_recover = true;
69 * forward declarations
71 static void bfa_ioc_hw_sem_init(struct bfa_ioc *ioc);
72 static void bfa_ioc_hw_sem_get(struct bfa_ioc *ioc);
73 static void bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc);
74 static void bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force);
75 static void bfa_ioc_poll_fwinit(struct bfa_ioc *ioc);
76 static void bfa_ioc_send_enable(struct bfa_ioc *ioc);
77 static void bfa_ioc_send_disable(struct bfa_ioc *ioc);
78 static void bfa_ioc_send_getattr(struct bfa_ioc *ioc);
79 static void bfa_ioc_hb_monitor(struct bfa_ioc *ioc);
80 static void bfa_ioc_hb_stop(struct bfa_ioc *ioc);
81 static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);
82 static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);
83 static void bfa_ioc_mbox_flush(struct bfa_ioc *ioc);
84 static void bfa_ioc_recover(struct bfa_ioc *ioc);
85 static void bfa_ioc_event_notify(struct bfa_ioc *, enum bfa_ioc_event);
86 static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);
87 static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);
88 static void bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc *ioc);
89 static void bfa_ioc_fail_notify(struct bfa_ioc *ioc);
90 static void bfa_ioc_pf_enabled(struct bfa_ioc *ioc);
91 static void bfa_ioc_pf_disabled(struct bfa_ioc *ioc);
92 static void bfa_ioc_pf_failed(struct bfa_ioc *ioc);
93 static void bfa_ioc_pf_hwfailed(struct bfa_ioc *ioc);
94 static void bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc);
95 static enum bfa_status bfa_ioc_boot(struct bfa_ioc *ioc,
96 enum bfi_fwboot_type boot_type, u32 boot_param);
97 static u32 bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr);
98 static void bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc,
100 static void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc,
102 static void bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc,
104 static void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc,
106 static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc,
108 static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model);
109 static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc);
111 /* IOC state machine definitions/declarations */
113 IOC_E_RESET = 1, /*!< IOC reset request */
114 IOC_E_ENABLE = 2, /*!< IOC enable request */
115 IOC_E_DISABLE = 3, /*!< IOC disable request */
116 IOC_E_DETACH = 4, /*!< driver detach cleanup */
117 IOC_E_ENABLED = 5, /*!< f/w enabled */
118 IOC_E_FWRSP_GETATTR = 6, /*!< IOC get attribute response */
119 IOC_E_DISABLED = 7, /*!< f/w disabled */
120 IOC_E_PFFAILED = 8, /*!< failure notice by iocpf sm */
121 IOC_E_HBFAIL = 9, /*!< heartbeat failure */
122 IOC_E_HWERROR = 10, /*!< hardware error interrupt */
123 IOC_E_TIMEOUT = 11, /*!< timeout */
124 IOC_E_HWFAILED = 12, /*!< PCI mapping failure notice */
127 bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc, enum ioc_event);
128 bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc, enum ioc_event);
129 bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc, enum ioc_event);
130 bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc, enum ioc_event);
131 bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc, enum ioc_event);
132 bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc, enum ioc_event);
133 bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc, enum ioc_event);
134 bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc, enum ioc_event);
135 bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc, enum ioc_event);
136 bfa_fsm_state_decl(bfa_ioc, hwfail, struct bfa_ioc, enum ioc_event);
138 static struct bfa_sm_table ioc_sm_table[] = {
139 {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
140 {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
141 {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
142 {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
143 {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
144 {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
145 {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
146 {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
147 {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
148 {BFA_SM(bfa_ioc_sm_hwfail), BFA_IOC_HWFAIL},
152 * Forward declareations for iocpf state machine
154 static void bfa_iocpf_enable(struct bfa_ioc *ioc);
155 static void bfa_iocpf_disable(struct bfa_ioc *ioc);
156 static void bfa_iocpf_fail(struct bfa_ioc *ioc);
157 static void bfa_iocpf_initfail(struct bfa_ioc *ioc);
158 static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc);
159 static void bfa_iocpf_stop(struct bfa_ioc *ioc);
161 /* IOCPF state machine events */
163 IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */
164 IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */
165 IOCPF_E_STOP = 3, /*!< stop on driver detach */
166 IOCPF_E_FWREADY = 4, /*!< f/w initialization done */
167 IOCPF_E_FWRSP_ENABLE = 5, /*!< enable f/w response */
168 IOCPF_E_FWRSP_DISABLE = 6, /*!< disable f/w response */
169 IOCPF_E_FAIL = 7, /*!< failure notice by ioc sm */
170 IOCPF_E_INITFAIL = 8, /*!< init fail notice by ioc sm */
171 IOCPF_E_GETATTRFAIL = 9, /*!< init fail notice by ioc sm */
172 IOCPF_E_SEMLOCKED = 10, /*!< h/w semaphore is locked */
173 IOCPF_E_TIMEOUT = 11, /*!< f/w response timeout */
174 IOCPF_E_SEM_ERROR = 12, /*!< h/w sem mapping error */
178 enum bfa_iocpf_state {
179 BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */
180 BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */
181 BFA_IOCPF_HWINIT = 3, /*!< IOC h/w is being initialized */
182 BFA_IOCPF_READY = 4, /*!< IOCPF is initialized */
183 BFA_IOCPF_INITFAIL = 5, /*!< IOCPF failed */
184 BFA_IOCPF_FAIL = 6, /*!< IOCPF failed */
185 BFA_IOCPF_DISABLING = 7, /*!< IOCPF is being disabled */
186 BFA_IOCPF_DISABLED = 8, /*!< IOCPF is disabled */
187 BFA_IOCPF_FWMISMATCH = 9, /*!< IOC f/w different from drivers */
190 bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf, enum iocpf_event);
191 bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf, enum iocpf_event);
192 bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf, enum iocpf_event);
193 bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf, enum iocpf_event);
194 bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf, enum iocpf_event);
195 bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf, enum iocpf_event);
196 bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf, enum iocpf_event);
197 bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf,
199 bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf, enum iocpf_event);
200 bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf, enum iocpf_event);
201 bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf, enum iocpf_event);
202 bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf, enum iocpf_event);
203 bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf,
205 bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf, enum iocpf_event);
207 static struct bfa_sm_table iocpf_sm_table[] = {
208 {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
209 {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
210 {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
211 {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
212 {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
213 {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
214 {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
215 {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
216 {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
217 {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
218 {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
219 {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
220 {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
221 {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
224 /* IOC State Machine */
226 /* Beginning state. IOC uninit state. */
228 bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc)
232 /* IOC is in uninit state. */
234 bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
238 bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
246 /* Reset entry actions -- initialize state machine */
248 bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc)
250 bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
253 /* IOC is in reset state. */
255 bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event)
259 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
263 bfa_ioc_disable_comp(ioc);
267 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
276 bfa_ioc_sm_enabling_entry(struct bfa_ioc *ioc)
278 bfa_iocpf_enable(ioc);
281 /* Host IOC function is being enabled, awaiting response from firmware.
282 * Semaphore is acquired.
285 bfa_ioc_sm_enabling(struct bfa_ioc *ioc, enum ioc_event event)
289 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
293 /* !!! fall through !!! */
295 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
296 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
297 if (event != IOC_E_PFFAILED)
298 bfa_iocpf_initfail(ioc);
302 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
303 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
307 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
311 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
323 /* Semaphore should be acquired for version check. */
325 bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
327 mod_timer(&ioc->ioc_timer, jiffies +
328 msecs_to_jiffies(BFA_IOC_TOV));
329 bfa_ioc_send_getattr(ioc);
332 /* IOC configuration in progress. Timer is active. */
334 bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
337 case IOC_E_FWRSP_GETATTR:
338 del_timer(&ioc->ioc_timer);
339 bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
344 del_timer(&ioc->ioc_timer);
347 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
348 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
349 if (event != IOC_E_PFFAILED)
350 bfa_iocpf_getattrfail(ioc);
354 del_timer(&ioc->ioc_timer);
355 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
367 bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)
369 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
370 bfa_ioc_event_notify(ioc, BFA_IOC_E_ENABLED);
371 bfa_ioc_hb_monitor(ioc);
375 bfa_ioc_sm_op(struct bfa_ioc *ioc, enum ioc_event event)
382 bfa_ioc_hb_stop(ioc);
383 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
388 bfa_ioc_hb_stop(ioc);
389 /* !!! fall through !!! */
391 if (ioc->iocpf.auto_recover)
392 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
394 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
396 bfa_ioc_fail_notify(ioc);
398 if (event != IOC_E_PFFAILED)
408 bfa_ioc_sm_disabling_entry(struct bfa_ioc *ioc)
410 bfa_iocpf_disable(ioc);
413 /* IOC is being disabled */
415 bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
419 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
424 * No state change. Will move to disabled state
425 * after iocpf sm completes failure processing and
426 * moves to disabled state.
432 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
433 bfa_ioc_disable_comp(ioc);
441 /* IOC disable completion entry. */
443 bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc)
445 bfa_ioc_disable_comp(ioc);
449 bfa_ioc_sm_disabled(struct bfa_ioc *ioc, enum ioc_event event)
453 bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
457 ioc->cbfn->disable_cbfn(ioc->bfa);
461 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
471 bfa_ioc_sm_fail_retry_entry(struct bfa_ioc *ioc)
475 /* Hardware initialization retry. */
477 bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event)
481 bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
487 * Initialization retry failed.
489 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
490 bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
491 if (event != IOC_E_PFFAILED)
492 bfa_iocpf_initfail(ioc);
496 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
497 bfa_fsm_set_state(ioc, bfa_ioc_sm_hwfail);
504 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
508 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
518 bfa_ioc_sm_fail_entry(struct bfa_ioc *ioc)
524 bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event)
528 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
532 bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
536 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
541 /* HB failure notification, ignore. */
550 bfa_ioc_sm_hwfail_entry(struct bfa_ioc *ioc)
556 bfa_ioc_sm_hwfail(struct bfa_ioc *ioc, enum ioc_event event)
561 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
565 ioc->cbfn->disable_cbfn(ioc->bfa);
569 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
577 /* IOCPF State Machine */
579 /* Reset entry actions -- initialize state machine */
581 bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
583 iocpf->fw_mismatch_notified = false;
584 iocpf->auto_recover = bfa_nw_auto_recover;
587 /* Beginning state. IOC is in reset state. */
589 bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
593 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
604 /* Semaphore should be acquired for version check. */
606 bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
608 bfa_ioc_hw_sem_init(iocpf->ioc);
609 bfa_ioc_hw_sem_get(iocpf->ioc);
612 /* Awaiting h/w semaphore to continue with version check. */
614 bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
616 struct bfa_ioc *ioc = iocpf->ioc;
619 case IOCPF_E_SEMLOCKED:
620 if (bfa_ioc_firmware_lock(ioc)) {
621 if (bfa_ioc_sync_start(ioc)) {
622 bfa_ioc_sync_join(ioc);
623 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
625 bfa_ioc_firmware_unlock(ioc);
626 bfa_nw_ioc_hw_sem_release(ioc);
627 mod_timer(&ioc->sem_timer, jiffies +
628 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
631 bfa_nw_ioc_hw_sem_release(ioc);
632 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
636 case IOCPF_E_SEM_ERROR:
637 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
638 bfa_ioc_pf_hwfailed(ioc);
641 case IOCPF_E_DISABLE:
642 bfa_ioc_hw_sem_get_cancel(ioc);
643 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
644 bfa_ioc_pf_disabled(ioc);
648 bfa_ioc_hw_sem_get_cancel(ioc);
649 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
657 /* Notify enable completion callback */
659 bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
661 /* Call only the first time sm enters fwmismatch state. */
662 if (!iocpf->fw_mismatch_notified)
663 bfa_ioc_pf_fwmismatch(iocpf->ioc);
665 iocpf->fw_mismatch_notified = true;
666 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
667 msecs_to_jiffies(BFA_IOC_TOV));
670 /* Awaiting firmware version match. */
672 bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
674 struct bfa_ioc *ioc = iocpf->ioc;
677 case IOCPF_E_TIMEOUT:
678 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
681 case IOCPF_E_DISABLE:
682 del_timer(&ioc->iocpf_timer);
683 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
684 bfa_ioc_pf_disabled(ioc);
688 del_timer(&ioc->iocpf_timer);
689 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
697 /* Request for semaphore. */
699 bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf)
701 bfa_ioc_hw_sem_get(iocpf->ioc);
704 /* Awaiting semaphore for h/w initialzation. */
706 bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event)
708 struct bfa_ioc *ioc = iocpf->ioc;
711 case IOCPF_E_SEMLOCKED:
712 if (bfa_ioc_sync_complete(ioc)) {
713 bfa_ioc_sync_join(ioc);
714 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
716 bfa_nw_ioc_hw_sem_release(ioc);
717 mod_timer(&ioc->sem_timer, jiffies +
718 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
722 case IOCPF_E_SEM_ERROR:
723 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
724 bfa_ioc_pf_hwfailed(ioc);
727 case IOCPF_E_DISABLE:
728 bfa_ioc_hw_sem_get_cancel(ioc);
729 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
738 bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf *iocpf)
740 iocpf->poll_time = 0;
741 bfa_ioc_reset(iocpf->ioc, false);
744 /* Hardware is being initialized. Interrupts are enabled.
745 * Holding hardware semaphore lock.
748 bfa_iocpf_sm_hwinit(struct bfa_iocpf *iocpf, enum iocpf_event event)
750 struct bfa_ioc *ioc = iocpf->ioc;
753 case IOCPF_E_FWREADY:
754 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
757 case IOCPF_E_TIMEOUT:
758 bfa_nw_ioc_hw_sem_release(ioc);
759 bfa_ioc_pf_failed(ioc);
760 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
763 case IOCPF_E_DISABLE:
764 del_timer(&ioc->iocpf_timer);
765 bfa_ioc_sync_leave(ioc);
766 bfa_nw_ioc_hw_sem_release(ioc);
767 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
776 bfa_iocpf_sm_enabling_entry(struct bfa_iocpf *iocpf)
778 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
779 msecs_to_jiffies(BFA_IOC_TOV));
781 * Enable Interrupts before sending fw IOC ENABLE cmd.
783 iocpf->ioc->cbfn->reset_cbfn(iocpf->ioc->bfa);
784 bfa_ioc_send_enable(iocpf->ioc);
787 /* Host IOC function is being enabled, awaiting response from firmware.
788 * Semaphore is acquired.
791 bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
793 struct bfa_ioc *ioc = iocpf->ioc;
796 case IOCPF_E_FWRSP_ENABLE:
797 del_timer(&ioc->iocpf_timer);
798 bfa_nw_ioc_hw_sem_release(ioc);
799 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
802 case IOCPF_E_INITFAIL:
803 del_timer(&ioc->iocpf_timer);
805 * !!! fall through !!!
807 case IOCPF_E_TIMEOUT:
808 bfa_nw_ioc_hw_sem_release(ioc);
809 if (event == IOCPF_E_TIMEOUT)
810 bfa_ioc_pf_failed(ioc);
811 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
814 case IOCPF_E_DISABLE:
815 del_timer(&ioc->iocpf_timer);
816 bfa_nw_ioc_hw_sem_release(ioc);
817 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
826 bfa_iocpf_sm_ready_entry(struct bfa_iocpf *iocpf)
828 bfa_ioc_pf_enabled(iocpf->ioc);
832 bfa_iocpf_sm_ready(struct bfa_iocpf *iocpf, enum iocpf_event event)
835 case IOCPF_E_DISABLE:
836 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
839 case IOCPF_E_GETATTRFAIL:
840 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
844 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
853 bfa_iocpf_sm_disabling_entry(struct bfa_iocpf *iocpf)
855 mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
856 msecs_to_jiffies(BFA_IOC_TOV));
857 bfa_ioc_send_disable(iocpf->ioc);
860 /* IOC is being disabled */
862 bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
864 struct bfa_ioc *ioc = iocpf->ioc;
867 case IOCPF_E_FWRSP_DISABLE:
868 del_timer(&ioc->iocpf_timer);
869 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
873 del_timer(&ioc->iocpf_timer);
875 * !!! fall through !!!
878 case IOCPF_E_TIMEOUT:
879 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
880 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
883 case IOCPF_E_FWRSP_ENABLE:
892 bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf *iocpf)
894 bfa_ioc_hw_sem_get(iocpf->ioc);
897 /* IOC hb ack request is being removed. */
899 bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
901 struct bfa_ioc *ioc = iocpf->ioc;
904 case IOCPF_E_SEMLOCKED:
905 bfa_ioc_sync_leave(ioc);
906 bfa_nw_ioc_hw_sem_release(ioc);
907 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
910 case IOCPF_E_SEM_ERROR:
911 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
912 bfa_ioc_pf_hwfailed(ioc);
923 /* IOC disable completion entry. */
925 bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf)
927 bfa_ioc_mbox_flush(iocpf->ioc);
928 bfa_ioc_pf_disabled(iocpf->ioc);
932 bfa_iocpf_sm_disabled(struct bfa_iocpf *iocpf, enum iocpf_event event)
934 struct bfa_ioc *ioc = iocpf->ioc;
938 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
942 bfa_ioc_firmware_unlock(ioc);
943 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
952 bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf *iocpf)
954 bfa_nw_ioc_debug_save_ftrc(iocpf->ioc);
955 bfa_ioc_hw_sem_get(iocpf->ioc);
958 /* Hardware initialization failed. */
960 bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
962 struct bfa_ioc *ioc = iocpf->ioc;
965 case IOCPF_E_SEMLOCKED:
966 bfa_ioc_notify_fail(ioc);
967 bfa_ioc_sync_leave(ioc);
968 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
969 bfa_nw_ioc_hw_sem_release(ioc);
970 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
973 case IOCPF_E_SEM_ERROR:
974 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
975 bfa_ioc_pf_hwfailed(ioc);
978 case IOCPF_E_DISABLE:
979 bfa_ioc_hw_sem_get_cancel(ioc);
980 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
984 bfa_ioc_hw_sem_get_cancel(ioc);
985 bfa_ioc_firmware_unlock(ioc);
986 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
998 bfa_iocpf_sm_initfail_entry(struct bfa_iocpf *iocpf)
1002 /* Hardware initialization failed. */
1004 bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event)
1006 struct bfa_ioc *ioc = iocpf->ioc;
1009 case IOCPF_E_DISABLE:
1010 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1014 bfa_ioc_firmware_unlock(ioc);
1015 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
1019 bfa_sm_fault(event);
1024 bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf *iocpf)
1027 * Mark IOC as failed in hardware and stop firmware.
1029 bfa_ioc_lpu_stop(iocpf->ioc);
1032 * Flush any queued up mailbox requests.
1034 bfa_ioc_mbox_flush(iocpf->ioc);
1035 bfa_ioc_hw_sem_get(iocpf->ioc);
1038 /* IOC is in failed state. */
1040 bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
1042 struct bfa_ioc *ioc = iocpf->ioc;
1045 case IOCPF_E_SEMLOCKED:
1046 bfa_ioc_sync_ack(ioc);
1047 bfa_ioc_notify_fail(ioc);
1048 if (!iocpf->auto_recover) {
1049 bfa_ioc_sync_leave(ioc);
1050 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);
1051 bfa_nw_ioc_hw_sem_release(ioc);
1052 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1054 if (bfa_ioc_sync_complete(ioc))
1055 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
1057 bfa_nw_ioc_hw_sem_release(ioc);
1058 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
1063 case IOCPF_E_SEM_ERROR:
1064 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
1065 bfa_ioc_pf_hwfailed(ioc);
1068 case IOCPF_E_DISABLE:
1069 bfa_ioc_hw_sem_get_cancel(ioc);
1070 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
1077 bfa_sm_fault(event);
1082 bfa_iocpf_sm_fail_entry(struct bfa_iocpf *iocpf)
1086 /* IOC is in failed state. */
1088 bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
1091 case IOCPF_E_DISABLE:
1092 bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
1096 bfa_sm_fault(event);
1100 /* BFA IOC private functions */
1102 /* Notify common modules registered for notification. */
1104 bfa_ioc_event_notify(struct bfa_ioc *ioc, enum bfa_ioc_event event)
1106 struct bfa_ioc_notify *notify;
1107 struct list_head *qe;
1109 list_for_each(qe, &ioc->notify_q) {
1110 notify = (struct bfa_ioc_notify *)qe;
1111 notify->cbfn(notify->cbarg, event);
1116 bfa_ioc_disable_comp(struct bfa_ioc *ioc)
1118 ioc->cbfn->disable_cbfn(ioc->bfa);
1119 bfa_ioc_event_notify(ioc, BFA_IOC_E_DISABLED);
1123 bfa_nw_ioc_sem_get(void __iomem *sem_reg)
1127 #define BFA_SEM_SPINCNT 3000
1129 r32 = readl(sem_reg);
1131 while ((r32 & 1) && (cnt < BFA_SEM_SPINCNT)) {
1134 r32 = readl(sem_reg);
1144 bfa_nw_ioc_sem_release(void __iomem *sem_reg)
1150 /* Invalidate fwver signature */
1152 bfa_nw_ioc_fwsig_invalidate(struct bfa_ioc *ioc)
1156 enum bfi_ioc_state ioc_fwstate;
1158 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1159 if (!bfa_ioc_state_disabled(ioc_fwstate))
1160 return BFA_STATUS_ADAPTER_ENABLED;
1162 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
1163 pgoff = PSS_SMEM_PGOFF(loff);
1164 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1165 writel(BFI_IOC_FW_INV_SIGN, ioc->ioc_regs.smem_page_start + loff);
1166 return BFA_STATUS_OK;
1169 /* Clear fwver hdr */
1171 bfa_ioc_fwver_clear(struct bfa_ioc *ioc)
1173 u32 pgnum, pgoff, loff = 0;
1176 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, loff);
1177 pgoff = PSS_SMEM_PGOFF(loff);
1178 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1180 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32)); i++) {
1181 writel(0, ioc->ioc_regs.smem_page_start + loff);
1182 loff += sizeof(u32);
1188 bfa_ioc_hw_sem_init(struct bfa_ioc *ioc)
1190 struct bfi_ioc_image_hdr fwhdr;
1193 /* Spin on init semaphore to serialize. */
1194 r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
1197 r32 = readl(ioc->ioc_regs.ioc_init_sem_reg);
1200 fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1201 if (fwstate == BFI_IOC_UNINIT) {
1202 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1206 bfa_nw_ioc_fwver_get(ioc, &fwhdr);
1208 if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) {
1209 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1213 bfa_ioc_fwver_clear(ioc);
1214 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_UNINIT);
1215 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_UNINIT);
1218 * Try to lock and then unlock the semaphore.
1220 readl(ioc->ioc_regs.ioc_sem_reg);
1221 writel(1, ioc->ioc_regs.ioc_sem_reg);
1223 /* Unlock init semaphore */
1224 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
1228 bfa_ioc_hw_sem_get(struct bfa_ioc *ioc)
1233 * First read to the semaphore register will return 0, subsequent reads
1234 * will return 1. Semaphore is released by writing 1 to the register
1236 r32 = readl(ioc->ioc_regs.ioc_sem_reg);
1238 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEM_ERROR);
1242 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
1246 mod_timer(&ioc->sem_timer, jiffies +
1247 msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
1251 bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc)
1253 writel(1, ioc->ioc_regs.ioc_sem_reg);
1257 bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)
1259 del_timer(&ioc->sem_timer);
1262 /* Initialize LPU local memory (aka secondary memory / SRAM) */
1264 bfa_ioc_lmem_init(struct bfa_ioc *ioc)
1268 #define PSS_LMEM_INIT_TIME 10000
1270 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1271 pss_ctl &= ~__PSS_LMEM_RESET;
1272 pss_ctl |= __PSS_LMEM_INIT_EN;
1275 * i2c workaround 12.5khz clock
1277 pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
1278 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1281 * wait for memory initialization to be complete
1285 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1287 } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
1290 * If memory initialization is not successful, IOC timeout will catch
1293 BUG_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
1295 pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
1296 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1300 bfa_ioc_lpu_start(struct bfa_ioc *ioc)
1305 * Take processor out of reset.
1307 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1308 pss_ctl &= ~__PSS_LPU0_RESET;
1310 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1314 bfa_ioc_lpu_stop(struct bfa_ioc *ioc)
1319 * Put processors in reset.
1321 pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
1322 pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
1324 writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
1327 /* Get driver and firmware versions. */
1329 bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
1334 u32 *fwsig = (u32 *) fwhdr;
1336 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
1337 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
1339 for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32));
1342 swab32(readl((loff) + (ioc->ioc_regs.smem_page_start)));
1343 loff += sizeof(u32);
1348 bfa_ioc_fwver_md5_check(struct bfi_ioc_image_hdr *fwhdr_1,
1349 struct bfi_ioc_image_hdr *fwhdr_2)
1353 for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) {
1354 if (fwhdr_1->md5sum[i] != fwhdr_2->md5sum[i])
1361 /* Returns TRUE if major minor and maintainence are same.
1362 * If patch version are same, check for MD5 Checksum to be same.
1365 bfa_ioc_fw_ver_compatible(struct bfi_ioc_image_hdr *drv_fwhdr,
1366 struct bfi_ioc_image_hdr *fwhdr_to_cmp)
1368 if (drv_fwhdr->signature != fwhdr_to_cmp->signature)
1370 if (drv_fwhdr->fwver.major != fwhdr_to_cmp->fwver.major)
1372 if (drv_fwhdr->fwver.minor != fwhdr_to_cmp->fwver.minor)
1374 if (drv_fwhdr->fwver.maint != fwhdr_to_cmp->fwver.maint)
1376 if (drv_fwhdr->fwver.patch == fwhdr_to_cmp->fwver.patch &&
1377 drv_fwhdr->fwver.phase == fwhdr_to_cmp->fwver.phase &&
1378 drv_fwhdr->fwver.build == fwhdr_to_cmp->fwver.build)
1379 return bfa_ioc_fwver_md5_check(drv_fwhdr, fwhdr_to_cmp);
1385 bfa_ioc_flash_fwver_valid(struct bfi_ioc_image_hdr *flash_fwhdr)
1387 if (flash_fwhdr->fwver.major == 0 || flash_fwhdr->fwver.major == 0xFF)
1394 fwhdr_is_ga(struct bfi_ioc_image_hdr *fwhdr)
1396 if (fwhdr->fwver.phase == 0 &&
1397 fwhdr->fwver.build == 0)
1403 /* Returns TRUE if both are compatible and patch of fwhdr_to_cmp is better. */
1404 static enum bfi_ioc_img_ver_cmp
1405 bfa_ioc_fw_ver_patch_cmp(struct bfi_ioc_image_hdr *base_fwhdr,
1406 struct bfi_ioc_image_hdr *fwhdr_to_cmp)
1408 if (bfa_ioc_fw_ver_compatible(base_fwhdr, fwhdr_to_cmp) == false)
1409 return BFI_IOC_IMG_VER_INCOMP;
1411 if (fwhdr_to_cmp->fwver.patch > base_fwhdr->fwver.patch)
1412 return BFI_IOC_IMG_VER_BETTER;
1413 else if (fwhdr_to_cmp->fwver.patch < base_fwhdr->fwver.patch)
1414 return BFI_IOC_IMG_VER_OLD;
1416 /* GA takes priority over internal builds of the same patch stream.
1417 * At this point major minor maint and patch numbers are same.
1419 if (fwhdr_is_ga(base_fwhdr) == true)
1420 if (fwhdr_is_ga(fwhdr_to_cmp))
1421 return BFI_IOC_IMG_VER_SAME;
1423 return BFI_IOC_IMG_VER_OLD;
1425 if (fwhdr_is_ga(fwhdr_to_cmp))
1426 return BFI_IOC_IMG_VER_BETTER;
1428 if (fwhdr_to_cmp->fwver.phase > base_fwhdr->fwver.phase)
1429 return BFI_IOC_IMG_VER_BETTER;
1430 else if (fwhdr_to_cmp->fwver.phase < base_fwhdr->fwver.phase)
1431 return BFI_IOC_IMG_VER_OLD;
1433 if (fwhdr_to_cmp->fwver.build > base_fwhdr->fwver.build)
1434 return BFI_IOC_IMG_VER_BETTER;
1435 else if (fwhdr_to_cmp->fwver.build < base_fwhdr->fwver.build)
1436 return BFI_IOC_IMG_VER_OLD;
1438 /* All Version Numbers are equal.
1439 * Md5 check to be done as a part of compatibility check.
1441 return BFI_IOC_IMG_VER_SAME;
1444 /* register definitions */
1445 #define FLI_CMD_REG 0x0001d000
1446 #define FLI_WRDATA_REG 0x0001d00c
1447 #define FLI_RDDATA_REG 0x0001d010
1448 #define FLI_ADDR_REG 0x0001d004
1449 #define FLI_DEV_STATUS_REG 0x0001d014
1451 #define BFA_FLASH_FIFO_SIZE 128 /* fifo size */
1452 #define BFA_FLASH_CHECK_MAX 10000 /* max # of status check */
1453 #define BFA_FLASH_BLOCKING_OP_MAX 1000000 /* max # of blocking op check */
1454 #define BFA_FLASH_WIP_MASK 0x01 /* write in progress bit mask */
1456 #define NFC_STATE_RUNNING 0x20000001
1457 #define NFC_STATE_PAUSED 0x00004560
1458 #define NFC_VER_VALID 0x147
1460 enum bfa_flash_cmd {
1461 BFA_FLASH_FAST_READ = 0x0b, /* fast read */
1462 BFA_FLASH_WRITE_ENABLE = 0x06, /* write enable */
1463 BFA_FLASH_SECTOR_ERASE = 0xd8, /* sector erase */
1464 BFA_FLASH_WRITE = 0x02, /* write */
1465 BFA_FLASH_READ_STATUS = 0x05, /* read status */
1468 /* hardware error definition */
1469 enum bfa_flash_err {
1470 BFA_FLASH_NOT_PRESENT = -1, /*!< flash not present */
1471 BFA_FLASH_UNINIT = -2, /*!< flash not initialized */
1472 BFA_FLASH_BAD = -3, /*!< flash bad */
1473 BFA_FLASH_BUSY = -4, /*!< flash busy */
1474 BFA_FLASH_ERR_CMD_ACT = -5, /*!< command active never cleared */
1475 BFA_FLASH_ERR_FIFO_CNT = -6, /*!< fifo count never cleared */
1476 BFA_FLASH_ERR_WIP = -7, /*!< write-in-progress never cleared */
1477 BFA_FLASH_ERR_TIMEOUT = -8, /*!< fli timeout */
1478 BFA_FLASH_ERR_LEN = -9, /*!< invalid length */
1481 /* flash command register data structure */
1482 union bfa_flash_cmd_reg {
1503 /* flash device status register data structure */
1504 union bfa_flash_dev_status_reg {
1527 /* flash address register data structure */
1528 union bfa_flash_addr_reg {
1541 /* Flash raw private functions */
1543 bfa_flash_set_cmd(void __iomem *pci_bar, u8 wr_cnt,
1544 u8 rd_cnt, u8 ad_cnt, u8 op)
1546 union bfa_flash_cmd_reg cmd;
1550 cmd.r.write_cnt = wr_cnt;
1551 cmd.r.read_cnt = rd_cnt;
1552 cmd.r.addr_cnt = ad_cnt;
1554 writel(cmd.i, (pci_bar + FLI_CMD_REG));
1558 bfa_flash_set_addr(void __iomem *pci_bar, u32 address)
1560 union bfa_flash_addr_reg addr;
1562 addr.r.addr = address & 0x00ffffff;
1564 writel(addr.i, (pci_bar + FLI_ADDR_REG));
1568 bfa_flash_cmd_act_check(void __iomem *pci_bar)
1570 union bfa_flash_cmd_reg cmd;
1572 cmd.i = readl(pci_bar + FLI_CMD_REG);
1575 return BFA_FLASH_ERR_CMD_ACT;
1580 /* Flush FLI data fifo. */
1582 bfa_flash_fifo_flush(void __iomem *pci_bar)
1586 union bfa_flash_dev_status_reg dev_status;
1588 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1590 if (!dev_status.r.fifo_cnt)
1593 /* fifo counter in terms of words */
1594 for (i = 0; i < dev_status.r.fifo_cnt; i++)
1595 t = readl(pci_bar + FLI_RDDATA_REG);
1597 /* Check the device status. It may take some time. */
1598 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
1599 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1600 if (!dev_status.r.fifo_cnt)
1604 if (dev_status.r.fifo_cnt)
1605 return BFA_FLASH_ERR_FIFO_CNT;
1610 /* Read flash status. */
1612 bfa_flash_status_read(void __iomem *pci_bar)
1614 union bfa_flash_dev_status_reg dev_status;
1619 status = bfa_flash_fifo_flush(pci_bar);
1623 bfa_flash_set_cmd(pci_bar, 0, 4, 0, BFA_FLASH_READ_STATUS);
1625 for (i = 0; i < BFA_FLASH_CHECK_MAX; i++) {
1626 status = bfa_flash_cmd_act_check(pci_bar);
1634 dev_status.i = readl(pci_bar + FLI_DEV_STATUS_REG);
1635 if (!dev_status.r.fifo_cnt)
1636 return BFA_FLASH_BUSY;
1638 ret_status = readl(pci_bar + FLI_RDDATA_REG);
1641 status = bfa_flash_fifo_flush(pci_bar);
1648 /* Start flash read operation. */
1650 bfa_flash_read_start(void __iomem *pci_bar, u32 offset, u32 len,
1655 /* len must be mutiple of 4 and not exceeding fifo size */
1656 if (len == 0 || len > BFA_FLASH_FIFO_SIZE || (len & 0x03) != 0)
1657 return BFA_FLASH_ERR_LEN;
1660 status = bfa_flash_status_read(pci_bar);
1661 if (status == BFA_FLASH_BUSY)
1662 status = bfa_flash_status_read(pci_bar);
1667 /* check if write-in-progress bit is cleared */
1668 if (status & BFA_FLASH_WIP_MASK)
1669 return BFA_FLASH_ERR_WIP;
1671 bfa_flash_set_addr(pci_bar, offset);
1673 bfa_flash_set_cmd(pci_bar, 0, (u8)len, 4, BFA_FLASH_FAST_READ);
1678 /* Check flash read operation. */
1680 bfa_flash_read_check(void __iomem *pci_bar)
1682 if (bfa_flash_cmd_act_check(pci_bar))
1688 /* End flash read operation. */
1690 bfa_flash_read_end(void __iomem *pci_bar, u32 len, char *buf)
1694 /* read data fifo up to 32 words */
1695 for (i = 0; i < len; i += 4) {
1696 u32 w = readl(pci_bar + FLI_RDDATA_REG);
1697 *((u32 *)(buf + i)) = swab32(w);
1700 bfa_flash_fifo_flush(pci_bar);
1703 /* Perform flash raw read. */
1705 #define FLASH_BLOCKING_OP_MAX 500
1706 #define FLASH_SEM_LOCK_REG 0x18820
1709 bfa_raw_sem_get(void __iomem *bar)
1713 locked = readl((bar + FLASH_SEM_LOCK_REG));
1718 static enum bfa_status
1719 bfa_flash_sem_get(void __iomem *bar)
1721 u32 n = FLASH_BLOCKING_OP_MAX;
1723 while (!bfa_raw_sem_get(bar)) {
1725 return BFA_STATUS_BADFLASH;
1728 return BFA_STATUS_OK;
1732 bfa_flash_sem_put(void __iomem *bar)
1734 writel(0, (bar + FLASH_SEM_LOCK_REG));
1737 static enum bfa_status
1738 bfa_flash_raw_read(void __iomem *pci_bar, u32 offset, char *buf,
1742 u32 off, l, s, residue, fifo_sz;
1746 fifo_sz = BFA_FLASH_FIFO_SIZE;
1747 status = bfa_flash_sem_get(pci_bar);
1748 if (status != BFA_STATUS_OK)
1754 l = (n + 1) * fifo_sz - s;
1758 status = bfa_flash_read_start(pci_bar, offset + off, l,
1761 bfa_flash_sem_put(pci_bar);
1762 return BFA_STATUS_FAILED;
1765 n = BFA_FLASH_BLOCKING_OP_MAX;
1766 while (bfa_flash_read_check(pci_bar)) {
1768 bfa_flash_sem_put(pci_bar);
1769 return BFA_STATUS_FAILED;
1773 bfa_flash_read_end(pci_bar, l, &buf[off]);
1778 bfa_flash_sem_put(pci_bar);
1780 return BFA_STATUS_OK;
1784 bfa_nw_ioc_flash_img_get_size(struct bfa_ioc *ioc)
1786 return BFI_FLASH_IMAGE_SZ/sizeof(u32);
1789 #define BFA_FLASH_PART_FWIMG_ADDR 0x100000 /* fw image address */
1792 bfa_nw_ioc_flash_img_get_chnk(struct bfa_ioc *ioc, u32 off,
1795 return bfa_flash_raw_read(ioc->pcidev.pci_bar_kva,
1796 BFA_FLASH_PART_FWIMG_ADDR + (off * sizeof(u32)),
1797 (char *)fwimg, BFI_FLASH_CHUNK_SZ);
1800 static enum bfi_ioc_img_ver_cmp
1801 bfa_ioc_flash_fwver_cmp(struct bfa_ioc *ioc,
1802 struct bfi_ioc_image_hdr *base_fwhdr)
1804 struct bfi_ioc_image_hdr *flash_fwhdr;
1805 enum bfa_status status;
1806 u32 fwimg[BFI_FLASH_CHUNK_SZ_WORDS];
1808 status = bfa_nw_ioc_flash_img_get_chnk(ioc, 0, fwimg);
1809 if (status != BFA_STATUS_OK)
1810 return BFI_IOC_IMG_VER_INCOMP;
1812 flash_fwhdr = (struct bfi_ioc_image_hdr *)fwimg;
1813 if (bfa_ioc_flash_fwver_valid(flash_fwhdr))
1814 return bfa_ioc_fw_ver_patch_cmp(base_fwhdr, flash_fwhdr);
1816 return BFI_IOC_IMG_VER_INCOMP;
1820 * Returns TRUE if driver is willing to work with current smem f/w version.
1823 bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
1825 struct bfi_ioc_image_hdr *drv_fwhdr;
1826 enum bfi_ioc_img_ver_cmp smem_flash_cmp, drv_smem_cmp;
1828 drv_fwhdr = (struct bfi_ioc_image_hdr *)
1829 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
1831 /* If smem is incompatible or old, driver should not work with it. */
1832 drv_smem_cmp = bfa_ioc_fw_ver_patch_cmp(drv_fwhdr, fwhdr);
1833 if (drv_smem_cmp == BFI_IOC_IMG_VER_INCOMP ||
1834 drv_smem_cmp == BFI_IOC_IMG_VER_OLD) {
1838 /* IF Flash has a better F/W than smem do not work with smem.
1839 * If smem f/w == flash f/w, as smem f/w not old | incmp, work with it.
1840 * If Flash is old or incomp work with smem iff smem f/w == drv f/w.
1842 smem_flash_cmp = bfa_ioc_flash_fwver_cmp(ioc, fwhdr);
1844 if (smem_flash_cmp == BFI_IOC_IMG_VER_BETTER)
1846 else if (smem_flash_cmp == BFI_IOC_IMG_VER_SAME)
1849 return (drv_smem_cmp == BFI_IOC_IMG_VER_SAME) ?
1853 /* Return true if current running version is valid. Firmware signature and
1854 * execution context (driver/bios) must match.
1857 bfa_ioc_fwver_valid(struct bfa_ioc *ioc, u32 boot_env)
1859 struct bfi_ioc_image_hdr fwhdr;
1861 bfa_nw_ioc_fwver_get(ioc, &fwhdr);
1862 if (swab32(fwhdr.bootenv) != boot_env)
1865 return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr);
1868 /* Conditionally flush any pending message from firmware at start. */
1870 bfa_ioc_msgflush(struct bfa_ioc *ioc)
1874 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
1876 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
1880 bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force)
1882 enum bfi_ioc_state ioc_fwstate;
1886 ioc_fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
1889 ioc_fwstate = BFI_IOC_UNINIT;
1891 boot_env = BFI_FWBOOT_ENV_OS;
1894 * check if firmware is valid
1896 fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
1897 false : bfa_ioc_fwver_valid(ioc, boot_env);
1900 if (bfa_ioc_boot(ioc, BFI_FWBOOT_TYPE_NORMAL, boot_env) ==
1902 bfa_ioc_poll_fwinit(ioc);
1908 * If hardware initialization is in progress (initialized by other IOC),
1909 * just wait for an initialization completion interrupt.
1911 if (ioc_fwstate == BFI_IOC_INITING) {
1912 bfa_ioc_poll_fwinit(ioc);
1917 * If IOC function is disabled and firmware version is same,
1918 * just re-enable IOC.
1920 if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
1922 * When using MSI-X any pending firmware ready event should
1923 * be flushed. Otherwise MSI-X interrupts are not delivered.
1925 bfa_ioc_msgflush(ioc);
1926 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
1931 * Initialize the h/w for any other states.
1933 if (bfa_ioc_boot(ioc, BFI_FWBOOT_TYPE_NORMAL, boot_env) ==
1935 bfa_ioc_poll_fwinit(ioc);
1939 bfa_nw_ioc_timeout(void *ioc_arg)
1941 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
1943 bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
1947 bfa_ioc_mbox_send(struct bfa_ioc *ioc, void *ioc_msg, int len)
1949 u32 *msgp = (u32 *) ioc_msg;
1952 BUG_ON(!(len <= BFI_IOC_MSGLEN_MAX));
1955 * first write msg to mailbox registers
1957 for (i = 0; i < len / sizeof(u32); i++)
1958 writel(cpu_to_le32(msgp[i]),
1959 ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1961 for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
1962 writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
1965 * write 1 to mailbox CMD to trigger LPU event
1967 writel(1, ioc->ioc_regs.hfn_mbox_cmd);
1968 (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
1972 bfa_ioc_send_enable(struct bfa_ioc *ioc)
1974 struct bfi_ioc_ctrl_req enable_req;
1977 bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
1978 bfa_ioc_portid(ioc));
1979 enable_req.clscode = htons(ioc->clscode);
1980 do_gettimeofday(&tv);
1981 enable_req.tv_sec = ntohl(tv.tv_sec);
1982 bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req));
1986 bfa_ioc_send_disable(struct bfa_ioc *ioc)
1988 struct bfi_ioc_ctrl_req disable_req;
1990 bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
1991 bfa_ioc_portid(ioc));
1992 bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req));
1996 bfa_ioc_send_getattr(struct bfa_ioc *ioc)
1998 struct bfi_ioc_getattr_req attr_req;
2000 bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
2001 bfa_ioc_portid(ioc));
2002 bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
2003 bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
2007 bfa_nw_ioc_hb_check(void *cbarg)
2009 struct bfa_ioc *ioc = cbarg;
2012 hb_count = readl(ioc->ioc_regs.heartbeat);
2013 if (ioc->hb_count == hb_count) {
2014 bfa_ioc_recover(ioc);
2017 ioc->hb_count = hb_count;
2020 bfa_ioc_mbox_poll(ioc);
2021 mod_timer(&ioc->hb_timer, jiffies +
2022 msecs_to_jiffies(BFA_IOC_HB_TOV));
2026 bfa_ioc_hb_monitor(struct bfa_ioc *ioc)
2028 ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
2029 mod_timer(&ioc->hb_timer, jiffies +
2030 msecs_to_jiffies(BFA_IOC_HB_TOV));
2034 bfa_ioc_hb_stop(struct bfa_ioc *ioc)
2036 del_timer(&ioc->hb_timer);
2039 /* Initiate a full firmware download. */
2040 static enum bfa_status
2041 bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
2051 u32 fwimg_buf[BFI_FLASH_CHUNK_SZ_WORDS];
2052 enum bfa_status status;
2054 if (boot_env == BFI_FWBOOT_ENV_OS &&
2055 boot_type == BFI_FWBOOT_TYPE_FLASH) {
2056 fwimg_size = BFI_FLASH_IMAGE_SZ/sizeof(u32);
2058 status = bfa_nw_ioc_flash_img_get_chnk(ioc,
2059 BFA_IOC_FLASH_CHUNK_ADDR(chunkno), fwimg_buf);
2060 if (status != BFA_STATUS_OK)
2065 fwimg_size = bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc));
2066 fwimg = bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc),
2067 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
2070 pgnum = bfa_ioc_smem_pgnum(ioc, loff);
2072 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2074 for (i = 0; i < fwimg_size; i++) {
2075 if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
2076 chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
2077 if (boot_env == BFI_FWBOOT_ENV_OS &&
2078 boot_type == BFI_FWBOOT_TYPE_FLASH) {
2079 status = bfa_nw_ioc_flash_img_get_chnk(ioc,
2080 BFA_IOC_FLASH_CHUNK_ADDR(chunkno),
2082 if (status != BFA_STATUS_OK)
2087 fwimg = bfa_cb_image_get_chunk(
2088 bfa_ioc_asic_gen(ioc),
2089 BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
2096 writel((swab32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)])),
2097 ((ioc->ioc_regs.smem_page_start) + (loff)));
2099 loff += sizeof(u32);
2102 * handle page offset wrap around
2104 loff = PSS_SMEM_PGOFF(loff);
2108 ioc->ioc_regs.host_page_num_fn);
2112 writel(bfa_ioc_smem_pgnum(ioc, 0),
2113 ioc->ioc_regs.host_page_num_fn);
2116 * Set boot type, env and device mode at the end.
2118 if (boot_env == BFI_FWBOOT_ENV_OS &&
2119 boot_type == BFI_FWBOOT_TYPE_FLASH) {
2120 boot_type = BFI_FWBOOT_TYPE_NORMAL;
2122 asicmode = BFI_FWBOOT_DEVMODE(ioc->asic_gen, ioc->asic_mode,
2123 ioc->port0_mode, ioc->port1_mode);
2124 writel(asicmode, ((ioc->ioc_regs.smem_page_start)
2125 + BFI_FWBOOT_DEVMODE_OFF));
2126 writel(boot_type, ((ioc->ioc_regs.smem_page_start)
2127 + (BFI_FWBOOT_TYPE_OFF)));
2128 writel(boot_env, ((ioc->ioc_regs.smem_page_start)
2129 + (BFI_FWBOOT_ENV_OFF)));
2130 return BFA_STATUS_OK;
2134 bfa_ioc_reset(struct bfa_ioc *ioc, bool force)
2136 bfa_ioc_hwinit(ioc, force);
2139 /* BFA ioc enable reply by firmware */
2141 bfa_ioc_enable_reply(struct bfa_ioc *ioc, enum bfa_mode port_mode,
2144 struct bfa_iocpf *iocpf = &ioc->iocpf;
2146 ioc->port_mode = ioc->port_mode_cfg = port_mode;
2147 ioc->ad_cap_bm = cap_bm;
2148 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
2151 /* Update BFA configuration from firmware configuration. */
2153 bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
2155 struct bfi_ioc_attr *attr = ioc->attr;
2157 attr->adapter_prop = ntohl(attr->adapter_prop);
2158 attr->card_type = ntohl(attr->card_type);
2159 attr->maxfrsize = ntohs(attr->maxfrsize);
2161 bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
2164 /* Attach time initialization of mbox logic. */
2166 bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
2168 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2171 INIT_LIST_HEAD(&mod->cmd_q);
2172 for (mc = 0; mc < BFI_MC_MAX; mc++) {
2173 mod->mbhdlr[mc].cbfn = NULL;
2174 mod->mbhdlr[mc].cbarg = ioc->bfa;
2178 /* Mbox poll timer -- restarts any pending mailbox requests. */
2180 bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
2182 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2183 struct bfa_mbox_cmd *cmd;
2184 bfa_mbox_cmd_cbfn_t cbfn;
2189 * If no command pending, do nothing
2191 if (list_empty(&mod->cmd_q))
2195 * If previous command is not yet fetched by firmware, do nothing
2197 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2202 * Enqueue command to firmware.
2204 bfa_q_deq(&mod->cmd_q, &cmd);
2205 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2208 * Give a callback to the client, indicating that the command is sent
2218 /* Cleanup any pending requests. */
2220 bfa_ioc_mbox_flush(struct bfa_ioc *ioc)
2222 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2223 struct bfa_mbox_cmd *cmd;
2225 while (!list_empty(&mod->cmd_q))
2226 bfa_q_deq(&mod->cmd_q, &cmd);
2230 * bfa_nw_ioc_smem_read - Read data from SMEM to host through PCI memmap
2232 * @ioc: memory for IOC
2233 * @tbuf: app memory to store data from smem
2234 * @soff: smem offset
2235 * @sz: size of smem in bytes
2238 bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz)
2240 u32 pgnum, loff, r32;
2244 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff);
2245 loff = PSS_SMEM_PGOFF(soff);
2248 * Hold semaphore to serialize pll init and fwtrc.
2250 if (bfa_nw_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg) == 0)
2253 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2255 len = sz/sizeof(u32);
2256 for (i = 0; i < len; i++) {
2257 r32 = swab32(readl((loff) + (ioc->ioc_regs.smem_page_start)));
2258 buf[i] = be32_to_cpu(r32);
2259 loff += sizeof(u32);
2262 * handle page offset wrap around
2264 loff = PSS_SMEM_PGOFF(loff);
2267 writel(pgnum, ioc->ioc_regs.host_page_num_fn);
2271 writel(PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, 0),
2272 ioc->ioc_regs.host_page_num_fn);
2277 readl(ioc->ioc_regs.ioc_init_sem_reg);
2278 writel(1, ioc->ioc_regs.ioc_init_sem_reg);
2282 /* Retrieve saved firmware trace from a prior IOC failure. */
2284 bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen)
2286 u32 loff = BFI_IOC_TRC_OFF + BNA_DBG_FWTRC_LEN * ioc->port_id;
2287 int tlen, status = 0;
2290 if (tlen > BNA_DBG_FWTRC_LEN)
2291 tlen = BNA_DBG_FWTRC_LEN;
2293 status = bfa_nw_ioc_smem_read(ioc, trcdata, loff, tlen);
2298 /* Save firmware trace if configured. */
2300 bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc *ioc)
2304 if (ioc->dbg_fwsave_once) {
2305 ioc->dbg_fwsave_once = 0;
2306 if (ioc->dbg_fwsave_len) {
2307 tlen = ioc->dbg_fwsave_len;
2308 bfa_nw_ioc_debug_fwtrc(ioc, ioc->dbg_fwsave, &tlen);
2313 /* Retrieve saved firmware trace from a prior IOC failure. */
2315 bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen)
2319 if (ioc->dbg_fwsave_len == 0)
2320 return BFA_STATUS_ENOFSAVE;
2323 if (tlen > ioc->dbg_fwsave_len)
2324 tlen = ioc->dbg_fwsave_len;
2326 memcpy(trcdata, ioc->dbg_fwsave, tlen);
2328 return BFA_STATUS_OK;
2332 bfa_ioc_fail_notify(struct bfa_ioc *ioc)
2335 * Notify driver and common modules registered for notification.
2337 ioc->cbfn->hbfail_cbfn(ioc->bfa);
2338 bfa_ioc_event_notify(ioc, BFA_IOC_E_FAILED);
2339 bfa_nw_ioc_debug_save_ftrc(ioc);
2342 /* IOCPF to IOC interface */
2344 bfa_ioc_pf_enabled(struct bfa_ioc *ioc)
2346 bfa_fsm_send_event(ioc, IOC_E_ENABLED);
2350 bfa_ioc_pf_disabled(struct bfa_ioc *ioc)
2352 bfa_fsm_send_event(ioc, IOC_E_DISABLED);
2356 bfa_ioc_pf_failed(struct bfa_ioc *ioc)
2358 bfa_fsm_send_event(ioc, IOC_E_PFFAILED);
2362 bfa_ioc_pf_hwfailed(struct bfa_ioc *ioc)
2364 bfa_fsm_send_event(ioc, IOC_E_HWFAILED);
2368 bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc)
2371 * Provide enable completion callback and AEN notification.
2373 ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
2377 static enum bfa_status
2378 bfa_ioc_pll_init(struct bfa_ioc *ioc)
2381 * Hold semaphore so that nobody can access the chip during init.
2383 bfa_nw_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
2385 bfa_ioc_pll_init_asic(ioc);
2387 ioc->pllinit = true;
2389 /* Initialize LMEM */
2390 bfa_ioc_lmem_init(ioc);
2393 * release semaphore.
2395 bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_init_sem_reg);
2397 return BFA_STATUS_OK;
2400 /* Interface used by diag module to do firmware boot with memory test
2401 * as the entry vector.
2403 static enum bfa_status
2404 bfa_ioc_boot(struct bfa_ioc *ioc, enum bfi_fwboot_type boot_type,
2407 struct bfi_ioc_image_hdr *drv_fwhdr;
2408 enum bfa_status status;
2409 bfa_ioc_stats(ioc, ioc_boots);
2411 if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
2412 return BFA_STATUS_FAILED;
2413 if (boot_env == BFI_FWBOOT_ENV_OS &&
2414 boot_type == BFI_FWBOOT_TYPE_NORMAL) {
2415 drv_fwhdr = (struct bfi_ioc_image_hdr *)
2416 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc), 0);
2417 /* Work with Flash iff flash f/w is better than driver f/w.
2418 * Otherwise push drivers firmware.
2420 if (bfa_ioc_flash_fwver_cmp(ioc, drv_fwhdr) ==
2421 BFI_IOC_IMG_VER_BETTER)
2422 boot_type = BFI_FWBOOT_TYPE_FLASH;
2426 * Initialize IOC state of all functions on a chip reset.
2428 if (boot_type == BFI_FWBOOT_TYPE_MEMTEST) {
2429 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2430 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_MEMTEST);
2432 bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_INITING);
2433 bfa_ioc_set_alt_ioc_fwstate(ioc, BFI_IOC_INITING);
2436 bfa_ioc_msgflush(ioc);
2437 status = bfa_ioc_download_fw(ioc, boot_type, boot_env);
2438 if (status == BFA_STATUS_OK)
2439 bfa_ioc_lpu_start(ioc);
2441 bfa_nw_iocpf_timeout(ioc);
2446 /* Enable/disable IOC failure auto recovery. */
2448 bfa_nw_ioc_auto_recover(bool auto_recover)
2450 bfa_nw_auto_recover = auto_recover;
2454 bfa_ioc_msgget(struct bfa_ioc *ioc, void *mbmsg)
2460 r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
2467 for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
2469 r32 = readl(ioc->ioc_regs.lpu_mbox +
2471 msgp[i] = htonl(r32);
2475 * turn off mailbox interrupt by clearing mailbox status
2477 writel(1, ioc->ioc_regs.lpu_mbox_cmd);
2478 readl(ioc->ioc_regs.lpu_mbox_cmd);
2484 bfa_ioc_isr(struct bfa_ioc *ioc, struct bfi_mbmsg *m)
2486 union bfi_ioc_i2h_msg_u *msg;
2487 struct bfa_iocpf *iocpf = &ioc->iocpf;
2489 msg = (union bfi_ioc_i2h_msg_u *) m;
2491 bfa_ioc_stats(ioc, ioc_isrs);
2493 switch (msg->mh.msg_id) {
2494 case BFI_IOC_I2H_HBEAT:
2497 case BFI_IOC_I2H_ENABLE_REPLY:
2498 bfa_ioc_enable_reply(ioc,
2499 (enum bfa_mode)msg->fw_event.port_mode,
2500 msg->fw_event.cap_bm);
2503 case BFI_IOC_I2H_DISABLE_REPLY:
2504 bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
2507 case BFI_IOC_I2H_GETATTR_REPLY:
2508 bfa_ioc_getattr_reply(ioc);
2517 * bfa_nw_ioc_attach - IOC attach time initialization and setup.
2519 * @ioc: memory for IOC
2520 * @bfa: driver instance structure
2523 bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
2527 ioc->fcmode = false;
2528 ioc->pllinit = false;
2529 ioc->dbg_fwsave_once = true;
2530 ioc->iocpf.ioc = ioc;
2532 bfa_ioc_mbox_attach(ioc);
2533 INIT_LIST_HEAD(&ioc->notify_q);
2535 bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
2536 bfa_fsm_send_event(ioc, IOC_E_RESET);
2539 /* Driver detach time IOC cleanup. */
2541 bfa_nw_ioc_detach(struct bfa_ioc *ioc)
2543 bfa_fsm_send_event(ioc, IOC_E_DETACH);
2545 /* Done with detach, empty the notify_q. */
2546 INIT_LIST_HEAD(&ioc->notify_q);
2550 * bfa_nw_ioc_pci_init - Setup IOC PCI properties.
2552 * @pcidev: PCI device information for this IOC
2555 bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
2556 enum bfi_pcifn_class clscode)
2558 ioc->clscode = clscode;
2559 ioc->pcidev = *pcidev;
2562 * Initialize IOC and device personality
2564 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_FC;
2565 ioc->asic_mode = BFI_ASIC_MODE_FC;
2567 switch (pcidev->device_id) {
2568 case PCI_DEVICE_ID_BROCADE_CT:
2569 ioc->asic_gen = BFI_ASIC_GEN_CT;
2570 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2571 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2572 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_CNA;
2573 ioc->ad_cap_bm = BFA_CM_CNA;
2576 case BFA_PCI_DEVICE_ID_CT2:
2577 ioc->asic_gen = BFI_ASIC_GEN_CT2;
2578 if (clscode == BFI_PCIFN_CLASS_FC &&
2579 pcidev->ssid == BFA_PCI_CT2_SSID_FC) {
2580 ioc->asic_mode = BFI_ASIC_MODE_FC16;
2582 ioc->port_mode = ioc->port_mode_cfg = BFA_MODE_HBA;
2583 ioc->ad_cap_bm = BFA_CM_HBA;
2585 ioc->port0_mode = ioc->port1_mode = BFI_PORT_MODE_ETH;
2586 ioc->asic_mode = BFI_ASIC_MODE_ETH;
2587 if (pcidev->ssid == BFA_PCI_CT2_SSID_FCoE) {
2589 ioc->port_mode_cfg = BFA_MODE_CNA;
2590 ioc->ad_cap_bm = BFA_CM_CNA;
2593 ioc->port_mode_cfg = BFA_MODE_NIC;
2594 ioc->ad_cap_bm = BFA_CM_NIC;
2604 * Set asic specific interfaces.
2606 if (ioc->asic_gen == BFI_ASIC_GEN_CT)
2607 bfa_nw_ioc_set_ct_hwif(ioc);
2609 WARN_ON(ioc->asic_gen != BFI_ASIC_GEN_CT2);
2610 bfa_nw_ioc_set_ct2_hwif(ioc);
2611 bfa_nw_ioc_ct2_poweron(ioc);
2614 bfa_ioc_map_port(ioc);
2615 bfa_ioc_reg_init(ioc);
2619 * bfa_nw_ioc_mem_claim - Initialize IOC dma memory
2621 * @dm_kva: kernel virtual address of IOC dma memory
2622 * @dm_pa: physical address of IOC dma memory
2625 bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
2628 * dma memory for firmware attribute
2630 ioc->attr_dma.kva = dm_kva;
2631 ioc->attr_dma.pa = dm_pa;
2632 ioc->attr = (struct bfi_ioc_attr *) dm_kva;
2635 /* Return size of dma memory required. */
2637 bfa_nw_ioc_meminfo(void)
2639 return roundup(sizeof(struct bfi_ioc_attr), BFA_DMA_ALIGN_SZ);
2643 bfa_nw_ioc_enable(struct bfa_ioc *ioc)
2645 bfa_ioc_stats(ioc, ioc_enables);
2646 ioc->dbg_fwsave_once = true;
2648 bfa_fsm_send_event(ioc, IOC_E_ENABLE);
2652 bfa_nw_ioc_disable(struct bfa_ioc *ioc)
2654 bfa_ioc_stats(ioc, ioc_disables);
2655 bfa_fsm_send_event(ioc, IOC_E_DISABLE);
2658 /* Initialize memory for saving firmware trace. */
2660 bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave)
2662 ioc->dbg_fwsave = dbg_fwsave;
2663 ioc->dbg_fwsave_len = ioc->iocpf.auto_recover ? BNA_DBG_FWTRC_LEN : 0;
2667 bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr)
2669 return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr);
2672 /* Register mailbox message handler function, to be called by common modules */
2674 bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
2675 bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
2677 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2679 mod->mbhdlr[mc].cbfn = cbfn;
2680 mod->mbhdlr[mc].cbarg = cbarg;
2684 * bfa_nw_ioc_mbox_queue - Queue a mailbox command request to firmware.
2686 * @ioc: IOC instance
2687 * @cmd: Mailbox command
2689 * Waits if mailbox is busy. Responsibility of caller to serialize
2692 bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd,
2693 bfa_mbox_cmd_cbfn_t cbfn, void *cbarg)
2695 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2702 * If a previous command is pending, queue new command
2704 if (!list_empty(&mod->cmd_q)) {
2705 list_add_tail(&cmd->qe, &mod->cmd_q);
2710 * If mailbox is busy, queue command for poll timer
2712 stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
2714 list_add_tail(&cmd->qe, &mod->cmd_q);
2719 * mailbox is free -- queue command to firmware
2721 bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
2726 /* Handle mailbox interrupts */
2728 bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc)
2730 struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
2734 if (bfa_ioc_msgget(ioc, &m)) {
2736 * Treat IOC message class as special.
2738 mc = m.mh.msg_class;
2739 if (mc == BFI_MC_IOC) {
2740 bfa_ioc_isr(ioc, &m);
2744 if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
2747 mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
2750 bfa_ioc_lpu_read_stat(ioc);
2753 * Try to send pending mailbox commands
2755 bfa_ioc_mbox_poll(ioc);
2759 bfa_nw_ioc_error_isr(struct bfa_ioc *ioc)
2761 bfa_ioc_stats(ioc, ioc_hbfails);
2762 bfa_ioc_stats_hb_count(ioc, ioc->hb_count);
2763 bfa_fsm_send_event(ioc, IOC_E_HWERROR);
2766 /* return true if IOC is disabled */
2768 bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc)
2770 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabling) ||
2771 bfa_fsm_cmp_state(ioc, bfa_ioc_sm_disabled);
2774 /* return true if IOC is operational */
2776 bfa_nw_ioc_is_operational(struct bfa_ioc *ioc)
2778 return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
2781 /* Add to IOC heartbeat failure notification queue. To be used by common
2782 * modules such as cee, port, diag.
2785 bfa_nw_ioc_notify_register(struct bfa_ioc *ioc,
2786 struct bfa_ioc_notify *notify)
2788 list_add_tail(¬ify->qe, &ioc->notify_q);
2791 #define BFA_MFG_NAME "Brocade"
2793 bfa_ioc_get_adapter_attr(struct bfa_ioc *ioc,
2794 struct bfa_adapter_attr *ad_attr)
2796 struct bfi_ioc_attr *ioc_attr;
2798 ioc_attr = ioc->attr;
2800 bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
2801 bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
2802 bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
2803 bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
2804 memcpy(&ad_attr->vpd, &ioc_attr->vpd,
2805 sizeof(struct bfa_mfg_vpd));
2807 ad_attr->nports = bfa_ioc_get_nports(ioc);
2808 ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
2810 bfa_ioc_get_adapter_model(ioc, ad_attr->model);
2811 /* For now, model descr uses same model string */
2812 bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
2814 ad_attr->card_type = ioc_attr->card_type;
2815 ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
2817 if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
2818 ad_attr->prototype = 1;
2820 ad_attr->prototype = 0;
2822 ad_attr->pwwn = bfa_ioc_get_pwwn(ioc);
2823 ad_attr->mac = bfa_nw_ioc_get_mac(ioc);
2825 ad_attr->pcie_gen = ioc_attr->pcie_gen;
2826 ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
2827 ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
2828 ad_attr->asic_rev = ioc_attr->asic_rev;
2830 bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
2833 static enum bfa_ioc_type
2834 bfa_ioc_get_type(struct bfa_ioc *ioc)
2836 if (ioc->clscode == BFI_PCIFN_CLASS_ETH)
2837 return BFA_IOC_TYPE_LL;
2839 BUG_ON(!(ioc->clscode == BFI_PCIFN_CLASS_FC));
2841 return (ioc->attr->port_mode == BFI_PORT_MODE_FC)
2842 ? BFA_IOC_TYPE_FC : BFA_IOC_TYPE_FCoE;
2846 bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc, char *serial_num)
2849 (void *)ioc->attr->brcd_serialnum,
2850 BFA_ADAPTER_SERIAL_NUM_LEN);
2854 bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc, char *fw_ver)
2856 memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
2860 bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc, char *chip_rev)
2862 BUG_ON(!(chip_rev));
2864 memset(chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
2870 chip_rev[4] = ioc->attr->asic_rev;
2875 bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc, char *optrom_ver)
2877 memcpy(optrom_ver, ioc->attr->optrom_version,
2882 bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc, char *manufacturer)
2884 memcpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
2888 bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model)
2890 struct bfi_ioc_attr *ioc_attr;
2893 memset(model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
2895 ioc_attr = ioc->attr;
2897 snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
2898 BFA_MFG_NAME, ioc_attr->card_type);
2901 static enum bfa_ioc_state
2902 bfa_ioc_get_state(struct bfa_ioc *ioc)
2904 enum bfa_iocpf_state iocpf_st;
2905 enum bfa_ioc_state ioc_st = bfa_sm_to_state(ioc_sm_table, ioc->fsm);
2907 if (ioc_st == BFA_IOC_ENABLING ||
2908 ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
2910 iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
2913 case BFA_IOCPF_SEMWAIT:
2914 ioc_st = BFA_IOC_SEMWAIT;
2917 case BFA_IOCPF_HWINIT:
2918 ioc_st = BFA_IOC_HWINIT;
2921 case BFA_IOCPF_FWMISMATCH:
2922 ioc_st = BFA_IOC_FWMISMATCH;
2925 case BFA_IOCPF_FAIL:
2926 ioc_st = BFA_IOC_FAIL;
2929 case BFA_IOCPF_INITFAIL:
2930 ioc_st = BFA_IOC_INITFAIL;
2941 bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr)
2943 memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr));
2945 ioc_attr->state = bfa_ioc_get_state(ioc);
2946 ioc_attr->port_id = bfa_ioc_portid(ioc);
2947 ioc_attr->port_mode = ioc->port_mode;
2949 ioc_attr->port_mode_cfg = ioc->port_mode_cfg;
2950 ioc_attr->cap_bm = ioc->ad_cap_bm;
2952 ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
2954 bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
2956 ioc_attr->pci_attr.device_id = bfa_ioc_devid(ioc);
2957 ioc_attr->pci_attr.pcifn = bfa_ioc_pcifn(ioc);
2958 ioc_attr->def_fn = bfa_ioc_is_default(ioc);
2959 bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
2964 bfa_ioc_get_pwwn(struct bfa_ioc *ioc)
2966 return ioc->attr->pwwn;
2970 bfa_nw_ioc_get_mac(struct bfa_ioc *ioc)
2972 return ioc->attr->mac;
2975 /* Firmware failure detected. Start recovery actions. */
2977 bfa_ioc_recover(struct bfa_ioc *ioc)
2979 pr_crit("Heart Beat of IOC has failed\n");
2980 bfa_ioc_stats(ioc, ioc_hbfails);
2981 bfa_ioc_stats_hb_count(ioc, ioc->hb_count);
2982 bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
2985 /* BFA IOC PF private functions */
2988 bfa_iocpf_enable(struct bfa_ioc *ioc)
2990 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
2994 bfa_iocpf_disable(struct bfa_ioc *ioc)
2996 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
3000 bfa_iocpf_fail(struct bfa_ioc *ioc)
3002 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
3006 bfa_iocpf_initfail(struct bfa_ioc *ioc)
3008 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
3012 bfa_iocpf_getattrfail(struct bfa_ioc *ioc)
3014 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
3018 bfa_iocpf_stop(struct bfa_ioc *ioc)
3020 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
3024 bfa_nw_iocpf_timeout(void *ioc_arg)
3026 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
3027 enum bfa_iocpf_state iocpf_st;
3029 iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
3031 if (iocpf_st == BFA_IOCPF_HWINIT)
3032 bfa_ioc_poll_fwinit(ioc);
3034 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
3038 bfa_nw_iocpf_sem_timeout(void *ioc_arg)
3040 struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
3042 bfa_ioc_hw_sem_get(ioc);
3046 bfa_ioc_poll_fwinit(struct bfa_ioc *ioc)
3048 u32 fwstate = bfa_ioc_get_cur_ioc_fwstate(ioc);
3050 if (fwstate == BFI_IOC_DISABLED) {
3051 bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
3055 if (ioc->iocpf.poll_time >= BFA_IOC_TOV) {
3056 bfa_nw_iocpf_timeout(ioc);
3058 ioc->iocpf.poll_time += BFA_IOC_POLL_TOV;
3059 mod_timer(&ioc->iocpf_timer, jiffies +
3060 msecs_to_jiffies(BFA_IOC_POLL_TOV));
3065 * Flash module specific
3069 * FLASH DMA buffer should be big enough to hold both MFG block and
3070 * asic block(64k) at the same time and also should be 2k aligned to
3071 * avoid write segement to cross sector boundary.
3073 #define BFA_FLASH_SEG_SZ 2048
3074 #define BFA_FLASH_DMA_BUF_SZ \
3075 roundup(0x010000 + sizeof(struct bfa_mfg_block), BFA_FLASH_SEG_SZ)
3078 bfa_flash_cb(struct bfa_flash *flash)
3082 flash->cbfn(flash->cbarg, flash->status);
3086 bfa_flash_notify(void *cbarg, enum bfa_ioc_event event)
3088 struct bfa_flash *flash = cbarg;
3091 case BFA_IOC_E_DISABLED:
3092 case BFA_IOC_E_FAILED:
3093 if (flash->op_busy) {
3094 flash->status = BFA_STATUS_IOC_FAILURE;
3095 flash->cbfn(flash->cbarg, flash->status);
3105 * Send flash write request.
3108 bfa_flash_write_send(struct bfa_flash *flash)
3110 struct bfi_flash_write_req *msg =
3111 (struct bfi_flash_write_req *) flash->mb.msg;
3114 msg->type = be32_to_cpu(flash->type);
3115 msg->instance = flash->instance;
3116 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
3117 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
3118 flash->residue : BFA_FLASH_DMA_BUF_SZ;
3119 msg->length = be32_to_cpu(len);
3121 /* indicate if it's the last msg of the whole write operation */
3122 msg->last = (len == flash->residue) ? 1 : 0;
3124 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_WRITE_REQ,
3125 bfa_ioc_portid(flash->ioc));
3126 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
3127 memcpy(flash->dbuf_kva, flash->ubuf + flash->offset, len);
3128 bfa_nw_ioc_mbox_queue(flash->ioc, &flash->mb, NULL, NULL);
3130 flash->residue -= len;
3131 flash->offset += len;
3135 * bfa_flash_read_send - Send flash read request.
3137 * @cbarg: callback argument
3140 bfa_flash_read_send(void *cbarg)
3142 struct bfa_flash *flash = cbarg;
3143 struct bfi_flash_read_req *msg =
3144 (struct bfi_flash_read_req *) flash->mb.msg;
3147 msg->type = be32_to_cpu(flash->type);
3148 msg->instance = flash->instance;
3149 msg->offset = be32_to_cpu(flash->addr_off + flash->offset);
3150 len = (flash->residue < BFA_FLASH_DMA_BUF_SZ) ?
3151 flash->residue : BFA_FLASH_DMA_BUF_SZ;
3152 msg->length = be32_to_cpu(len);
3153 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_READ_REQ,
3154 bfa_ioc_portid(flash->ioc));
3155 bfa_alen_set(&msg->alen, len, flash->dbuf_pa);
3156 bfa_nw_ioc_mbox_queue(flash->ioc, &flash->mb, NULL, NULL);
3160 * bfa_flash_intr - Process flash response messages upon receiving interrupts.
3162 * @flasharg: flash structure
3163 * @msg: message structure
3166 bfa_flash_intr(void *flasharg, struct bfi_mbmsg *msg)
3168 struct bfa_flash *flash = flasharg;
3172 struct bfi_flash_query_rsp *query;
3173 struct bfi_flash_write_rsp *write;
3174 struct bfi_flash_read_rsp *read;
3175 struct bfi_mbmsg *msg;
3180 /* receiving response after ioc failure */
3181 if (!flash->op_busy && msg->mh.msg_id != BFI_FLASH_I2H_EVENT)
3184 switch (msg->mh.msg_id) {
3185 case BFI_FLASH_I2H_QUERY_RSP:
3186 status = be32_to_cpu(m.query->status);
3187 if (status == BFA_STATUS_OK) {
3189 struct bfa_flash_attr *attr, *f;
3191 attr = (struct bfa_flash_attr *) flash->ubuf;
3192 f = (struct bfa_flash_attr *) flash->dbuf_kva;
3193 attr->status = be32_to_cpu(f->status);
3194 attr->npart = be32_to_cpu(f->npart);
3195 for (i = 0; i < attr->npart; i++) {
3196 attr->part[i].part_type =
3197 be32_to_cpu(f->part[i].part_type);
3198 attr->part[i].part_instance =
3199 be32_to_cpu(f->part[i].part_instance);
3200 attr->part[i].part_off =
3201 be32_to_cpu(f->part[i].part_off);
3202 attr->part[i].part_size =
3203 be32_to_cpu(f->part[i].part_size);
3204 attr->part[i].part_len =
3205 be32_to_cpu(f->part[i].part_len);
3206 attr->part[i].part_status =
3207 be32_to_cpu(f->part[i].part_status);
3210 flash->status = status;
3211 bfa_flash_cb(flash);
3213 case BFI_FLASH_I2H_WRITE_RSP:
3214 status = be32_to_cpu(m.write->status);
3215 if (status != BFA_STATUS_OK || flash->residue == 0) {
3216 flash->status = status;
3217 bfa_flash_cb(flash);
3219 bfa_flash_write_send(flash);
3221 case BFI_FLASH_I2H_READ_RSP:
3222 status = be32_to_cpu(m.read->status);
3223 if (status != BFA_STATUS_OK) {
3224 flash->status = status;
3225 bfa_flash_cb(flash);
3227 u32 len = be32_to_cpu(m.read->length);
3228 memcpy(flash->ubuf + flash->offset,
3229 flash->dbuf_kva, len);
3230 flash->residue -= len;
3231 flash->offset += len;
3232 if (flash->residue == 0) {
3233 flash->status = status;
3234 bfa_flash_cb(flash);
3236 bfa_flash_read_send(flash);
3239 case BFI_FLASH_I2H_BOOT_VER_RSP:
3240 case BFI_FLASH_I2H_EVENT:
3248 * Flash memory info API.
3251 bfa_nw_flash_meminfo(void)
3253 return roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
3257 * bfa_nw_flash_attach - Flash attach API.
3259 * @flash: flash structure
3260 * @ioc: ioc structure
3261 * @dev: device structure
3264 bfa_nw_flash_attach(struct bfa_flash *flash, struct bfa_ioc *ioc, void *dev)
3268 flash->cbarg = NULL;
3271 bfa_nw_ioc_mbox_regisr(flash->ioc, BFI_MC_FLASH, bfa_flash_intr, flash);
3272 bfa_q_qe_init(&flash->ioc_notify);
3273 bfa_ioc_notify_init(&flash->ioc_notify, bfa_flash_notify, flash);
3274 list_add_tail(&flash->ioc_notify.qe, &flash->ioc->notify_q);
3278 * bfa_nw_flash_memclaim - Claim memory for flash
3280 * @flash: flash structure
3281 * @dm_kva: pointer to virtual memory address
3282 * @dm_pa: physical memory address
3285 bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa)
3287 flash->dbuf_kva = dm_kva;
3288 flash->dbuf_pa = dm_pa;
3289 memset(flash->dbuf_kva, 0, BFA_FLASH_DMA_BUF_SZ);
3290 dm_kva += roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
3291 dm_pa += roundup(BFA_FLASH_DMA_BUF_SZ, BFA_DMA_ALIGN_SZ);
3295 * bfa_nw_flash_get_attr - Get flash attribute.
3297 * @flash: flash structure
3298 * @attr: flash attribute structure
3299 * @cbfn: callback function
3300 * @cbarg: callback argument
3305 bfa_nw_flash_get_attr(struct bfa_flash *flash, struct bfa_flash_attr *attr,
3306 bfa_cb_flash cbfn, void *cbarg)
3308 struct bfi_flash_query_req *msg =
3309 (struct bfi_flash_query_req *) flash->mb.msg;
3311 if (!bfa_nw_ioc_is_operational(flash->ioc))
3312 return BFA_STATUS_IOC_NON_OP;
3315 return BFA_STATUS_DEVBUSY;
3319 flash->cbarg = cbarg;
3320 flash->ubuf = (u8 *) attr;
3322 bfi_h2i_set(msg->mh, BFI_MC_FLASH, BFI_FLASH_H2I_QUERY_REQ,
3323 bfa_ioc_portid(flash->ioc));
3324 bfa_alen_set(&msg->alen, sizeof(struct bfa_flash_attr), flash->dbuf_pa);
3325 bfa_nw_ioc_mbox_queue(flash->ioc, &flash->mb, NULL, NULL);
3327 return BFA_STATUS_OK;
3331 * bfa_nw_flash_update_part - Update flash partition.
3333 * @flash: flash structure
3334 * @type: flash partition type
3335 * @instance: flash partition instance
3336 * @buf: update data buffer
3337 * @len: data buffer length
3338 * @offset: offset relative to the partition starting address
3339 * @cbfn: callback function
3340 * @cbarg: callback argument
3345 bfa_nw_flash_update_part(struct bfa_flash *flash, u32 type, u8 instance,
3346 void *buf, u32 len, u32 offset,
3347 bfa_cb_flash cbfn, void *cbarg)
3349 if (!bfa_nw_ioc_is_operational(flash->ioc))
3350 return BFA_STATUS_IOC_NON_OP;
3353 * 'len' must be in word (4-byte) boundary
3355 if (!len || (len & 0x03))
3356 return BFA_STATUS_FLASH_BAD_LEN;
3358 if (type == BFA_FLASH_PART_MFG)
3359 return BFA_STATUS_EINVAL;
3362 return BFA_STATUS_DEVBUSY;
3366 flash->cbarg = cbarg;
3368 flash->instance = instance;
3369 flash->residue = len;
3371 flash->addr_off = offset;
3374 bfa_flash_write_send(flash);
3376 return BFA_STATUS_OK;
3380 * bfa_nw_flash_read_part - Read flash partition.
3382 * @flash: flash structure
3383 * @type: flash partition type
3384 * @instance: flash partition instance
3385 * @buf: read data buffer
3386 * @len: data buffer length
3387 * @offset: offset relative to the partition starting address
3388 * @cbfn: callback function
3389 * @cbarg: callback argument
3394 bfa_nw_flash_read_part(struct bfa_flash *flash, u32 type, u8 instance,
3395 void *buf, u32 len, u32 offset,
3396 bfa_cb_flash cbfn, void *cbarg)
3398 if (!bfa_nw_ioc_is_operational(flash->ioc))
3399 return BFA_STATUS_IOC_NON_OP;
3402 * 'len' must be in word (4-byte) boundary
3404 if (!len || (len & 0x03))
3405 return BFA_STATUS_FLASH_BAD_LEN;
3408 return BFA_STATUS_DEVBUSY;
3412 flash->cbarg = cbarg;
3414 flash->instance = instance;
3415 flash->residue = len;
3417 flash->addr_off = offset;
3420 bfa_flash_read_send(flash);
3422 return BFA_STATUS_OK;