Pileus Git - ~andy/linux/blob - drivers/net/ethernet/broadcom/cnic.c

   1 /* cnic.c: Broadcom CNIC core network driver.
   2  *
   3  * Copyright (c) 2006-2012 Broadcom Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  *
   9  * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10  * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11  */
  12
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/module.h>
  16
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/list.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/init.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/uio_driver.h>
  25 #include <linux/in.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/delay.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/if_vlan.h>
  30 #include <linux/prefetch.h>
  31 #include <linux/random.h>
  32 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  33 #define BCM_VLAN 1
  34 #endif
  35 #include <net/ip.h>
  36 #include <net/tcp.h>
  37 #include <net/route.h>
  38 #include <net/ipv6.h>
  39 #include <net/ip6_route.h>
  40 #include <net/ip6_checksum.h>
  41 #include <scsi/iscsi_if.h>
  42
  43 #include "cnic_if.h"
  44 #include "bnx2.h"
  45 #include "bnx2x/bnx2x_reg.h"
  46 #include "bnx2x/bnx2x_fw_defs.h"
  47 #include "bnx2x/bnx2x_hsi.h"
  48 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
  49 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
  50 #include "../../../scsi/bnx2fc/bnx2fc_constants.h"
  51 #include "cnic.h"
  52 #include "cnic_defs.h"
  53
  54 #define DRV_MODULE_NAME         "cnic"
  55
  56 static char version[] =
  57         "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  58
  59 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  60               "Chen (zongxi@broadcom.com");
  61 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  62 MODULE_LICENSE("GPL");
  63 MODULE_VERSION(CNIC_MODULE_VERSION);
  64
  65 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
  66 static LIST_HEAD(cnic_dev_list);
  67 static LIST_HEAD(cnic_udev_list);
  68 static DEFINE_RWLOCK(cnic_dev_lock);
  69 static DEFINE_MUTEX(cnic_lock);
  70
  71 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  72
  73 /* helper function, assuming cnic_lock is held */
  74 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
  75 {
  76         return rcu_dereference_protected(cnic_ulp_tbl[type],
  77                                          lockdep_is_held(&cnic_lock));
  78 }
  79
  80 static int cnic_service_bnx2(void *, void *);
  81 static int cnic_service_bnx2x(void *, void *);
  82 static int cnic_ctl(void *, struct cnic_ctl_info *);
  83
  84 static struct cnic_ops cnic_bnx2_ops = {
  85         .cnic_owner     = THIS_MODULE,
  86         .cnic_handler   = cnic_service_bnx2,
  87         .cnic_ctl       = cnic_ctl,
  88 };
  89
  90 static struct cnic_ops cnic_bnx2x_ops = {
  91         .cnic_owner     = THIS_MODULE,
  92         .cnic_handler   = cnic_service_bnx2x,
  93         .cnic_ctl       = cnic_ctl,
  94 };
  95
  96 static struct workqueue_struct *cnic_wq;
  97
  98 static void cnic_shutdown_rings(struct cnic_dev *);
  99 static void cnic_init_rings(struct cnic_dev *);
 100 static int cnic_cm_set_pg(struct cnic_sock *);
 101
 102 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
 103 {
 104         struct cnic_uio_dev *udev = uinfo->priv;
 105         struct cnic_dev *dev;
 106
 107         if (!capable(CAP_NET_ADMIN))
 108                 return -EPERM;
 109
 110         if (udev->uio_dev != -1)
 111                 return -EBUSY;
 112
 113         rtnl_lock();
 114         dev = udev->dev;
 115
 116         if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
 117                 rtnl_unlock();
 118                 return -ENODEV;
 119         }
 120
 121         udev->uio_dev = iminor(inode);
 122
 123         cnic_shutdown_rings(dev);
 124         cnic_init_rings(dev);
 125         rtnl_unlock();
 126
 127         return 0;
 128 }
 129
 130 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
 131 {
 132         struct cnic_uio_dev *udev = uinfo->priv;
 133
 134         udev->uio_dev = -1;
 135         return 0;
 136 }
 137
 138 static inline void cnic_hold(struct cnic_dev *dev)
 139 {
 140         atomic_inc(&dev->ref_count);
 141 }
 142
 143 static inline void cnic_put(struct cnic_dev *dev)
 144 {
 145         atomic_dec(&dev->ref_count);
 146 }
 147
 148 static inline void csk_hold(struct cnic_sock *csk)
 149 {
 150         atomic_inc(&csk->ref_count);
 151 }
 152
 153 static inline void csk_put(struct cnic_sock *csk)
 154 {
 155         atomic_dec(&csk->ref_count);
 156 }
 157
 158 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
 159 {
 160         struct cnic_dev *cdev;
 161
 162         read_lock(&cnic_dev_lock);
 163         list_for_each_entry(cdev, &cnic_dev_list, list) {
 164                 if (netdev == cdev->netdev) {
 165                         cnic_hold(cdev);
 166                         read_unlock(&cnic_dev_lock);
 167                         return cdev;
 168                 }
 169         }
 170         read_unlock(&cnic_dev_lock);
 171         return NULL;
 172 }
 173
 174 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
 175 {
 176         atomic_inc(&ulp_ops->ref_count);
 177 }
 178
 179 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
 180 {
 181         atomic_dec(&ulp_ops->ref_count);
 182 }
 183
 184 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
 185 {
 186         struct cnic_local *cp = dev->cnic_priv;
 187         struct cnic_eth_dev *ethdev = cp->ethdev;
 188         struct drv_ctl_info info;
 189         struct drv_ctl_io *io = &info.data.io;
 190
 191         info.cmd = DRV_CTL_CTX_WR_CMD;
 192         io->cid_addr = cid_addr;
 193         io->offset = off;
 194         io->data = val;
 195         ethdev->drv_ctl(dev->netdev, &info);
 196 }
 197
 198 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
 199 {
 200         struct cnic_local *cp = dev->cnic_priv;
 201         struct cnic_eth_dev *ethdev = cp->ethdev;
 202         struct drv_ctl_info info;
 203         struct drv_ctl_io *io = &info.data.io;
 204
 205         info.cmd = DRV_CTL_CTXTBL_WR_CMD;
 206         io->offset = off;
 207         io->dma_addr = addr;
 208         ethdev->drv_ctl(dev->netdev, &info);
 209 }
 210
 211 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
 212 {
 213         struct cnic_local *cp = dev->cnic_priv;
 214         struct cnic_eth_dev *ethdev = cp->ethdev;
 215         struct drv_ctl_info info;
 216         struct drv_ctl_l2_ring *ring = &info.data.ring;
 217
 218         if (start)
 219                 info.cmd = DRV_CTL_START_L2_CMD;
 220         else
 221                 info.cmd = DRV_CTL_STOP_L2_CMD;
 222
 223         ring->cid = cid;
 224         ring->client_id = cl_id;
 225         ethdev->drv_ctl(dev->netdev, &info);
 226 }
 227
 228 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
 229 {
 230         struct cnic_local *cp = dev->cnic_priv;
 231         struct cnic_eth_dev *ethdev = cp->ethdev;
 232         struct drv_ctl_info info;
 233         struct drv_ctl_io *io = &info.data.io;
 234
 235         info.cmd = DRV_CTL_IO_WR_CMD;
 236         io->offset = off;
 237         io->data = val;
 238         ethdev->drv_ctl(dev->netdev, &info);
 239 }
 240
 241 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
 242 {
 243         struct cnic_local *cp = dev->cnic_priv;
 244         struct cnic_eth_dev *ethdev = cp->ethdev;
 245         struct drv_ctl_info info;
 246         struct drv_ctl_io *io = &info.data.io;
 247
 248         info.cmd = DRV_CTL_IO_RD_CMD;
 249         io->offset = off;
 250         ethdev->drv_ctl(dev->netdev, &info);
 251         return io->data;
 252 }
 253
 254 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
 255 {
 256         struct cnic_local *cp = dev->cnic_priv;
 257         struct cnic_eth_dev *ethdev = cp->ethdev;
 258         struct drv_ctl_info info;
 259         struct fcoe_capabilities *fcoe_cap =
 260                 &info.data.register_data.fcoe_features;
 261
 262         if (reg) {
 263                 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
 264                 if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap)
 265                         memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap));
 266         } else {
 267                 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
 268         }
 269
 270         info.data.ulp_type = ulp_type;
 271         ethdev->drv_ctl(dev->netdev, &info);
 272 }
 273
 274 static int cnic_in_use(struct cnic_sock *csk)
 275 {
 276         return test_bit(SK_F_INUSE, &csk->flags);
 277 }
 278
 279 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
 280 {
 281         struct cnic_local *cp = dev->cnic_priv;
 282         struct cnic_eth_dev *ethdev = cp->ethdev;
 283         struct drv_ctl_info info;
 284
 285         info.cmd = cmd;
 286         info.data.credit.credit_count = count;
 287         ethdev->drv_ctl(dev->netdev, &info);
 288 }
 289
 290 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
 291 {
 292         u32 i;
 293
 294         if (!cp->ctx_tbl)
 295                 return -EINVAL;
 296
 297         for (i = 0; i < cp->max_cid_space; i++) {
 298                 if (cp->ctx_tbl[i].cid == cid) {
 299                         *l5_cid = i;
 300                         return 0;
 301                 }
 302         }
 303         return -EINVAL;
 304 }
 305
 306 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
 307                            struct cnic_sock *csk)
 308 {
 309         struct iscsi_path path_req;
 310         char *buf = NULL;
 311         u16 len = 0;
 312         u32 msg_type = ISCSI_KEVENT_IF_DOWN;
 313         struct cnic_ulp_ops *ulp_ops;
 314         struct cnic_uio_dev *udev = cp->udev;
 315         int rc = 0, retry = 0;
 316
 317         if (!udev || udev->uio_dev == -1)
 318                 return -ENODEV;
 319
 320         if (csk) {
 321                 len = sizeof(path_req);
 322                 buf = (char *) &path_req;
 323                 memset(&path_req, 0, len);
 324
 325                 msg_type = ISCSI_KEVENT_PATH_REQ;
 326                 path_req.handle = (u64) csk->l5_cid;
 327                 if (test_bit(SK_F_IPV6, &csk->flags)) {
 328                         memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
 329                                sizeof(struct in6_addr));
 330                         path_req.ip_addr_len = 16;
 331                 } else {
 332                         memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
 333                                sizeof(struct in_addr));
 334                         path_req.ip_addr_len = 4;
 335                 }
 336                 path_req.vlan_id = csk->vlan_id;
 337                 path_req.pmtu = csk->mtu;
 338         }
 339
 340         while (retry < 3) {
 341                 rc = 0;
 342                 rcu_read_lock();
 343                 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
 344                 if (ulp_ops)
 345                         rc = ulp_ops->iscsi_nl_send_msg(
 346                                 cp->ulp_handle[CNIC_ULP_ISCSI],
 347                                 msg_type, buf, len);
 348                 rcu_read_unlock();
 349                 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
 350                         break;
 351
 352                 msleep(100);
 353                 retry++;
 354         }
 355         return rc;
 356 }
 357
 358 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
 359
 360 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
 361                                   char *buf, u16 len)
 362 {
 363         int rc = -EINVAL;
 364
 365         switch (msg_type) {
 366         case ISCSI_UEVENT_PATH_UPDATE: {
 367                 struct cnic_local *cp;
 368                 u32 l5_cid;
 369                 struct cnic_sock *csk;
 370                 struct iscsi_path *path_resp;
 371
 372                 if (len < sizeof(*path_resp))
 373                         break;
 374
 375                 path_resp = (struct iscsi_path *) buf;
 376                 cp = dev->cnic_priv;
 377                 l5_cid = (u32) path_resp->handle;
 378                 if (l5_cid >= MAX_CM_SK_TBL_SZ)
 379                         break;
 380
 381                 rcu_read_lock();
 382                 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
 383                         rc = -ENODEV;
 384                         rcu_read_unlock();
 385                         break;
 386                 }
 387                 csk = &cp->csk_tbl[l5_cid];
 388                 csk_hold(csk);
 389                 if (cnic_in_use(csk) &&
 390                     test_bit(SK_F_CONNECT_START, &csk->flags)) {
 391
 392                         csk->vlan_id = path_resp->vlan_id;
 393
 394                         memcpy(csk->ha, path_resp->mac_addr, 6);
 395                         if (test_bit(SK_F_IPV6, &csk->flags))
 396                                 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
 397                                        sizeof(struct in6_addr));
 398                         else
 399                                 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
 400                                        sizeof(struct in_addr));
 401
 402                         if (is_valid_ether_addr(csk->ha)) {
 403                                 cnic_cm_set_pg(csk);
 404                         } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
 405                                 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 406
 407                                 cnic_cm_upcall(cp, csk,
 408                                         L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
 409                                 clear_bit(SK_F_CONNECT_START, &csk->flags);
 410                         }
 411                 }
 412                 csk_put(csk);
 413                 rcu_read_unlock();
 414                 rc = 0;
 415         }
 416         }
 417
 418         return rc;
 419 }
 420
 421 static int cnic_offld_prep(struct cnic_sock *csk)
 422 {
 423         if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 424                 return 0;
 425
 426         if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
 427                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
 428                 return 0;
 429         }
 430
 431         return 1;
 432 }
 433
 434 static int cnic_close_prep(struct cnic_sock *csk)
 435 {
 436         clear_bit(SK_F_CONNECT_START, &csk->flags);
 437         smp_mb__after_clear_bit();
 438
 439         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 440                 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 441                         msleep(1);
 442
 443                 return 1;
 444         }
 445         return 0;
 446 }
 447
 448 static int cnic_abort_prep(struct cnic_sock *csk)
 449 {
 450         clear_bit(SK_F_CONNECT_START, &csk->flags);
 451         smp_mb__after_clear_bit();
 452
 453         while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 454                 msleep(1);
 455
 456         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 457                 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
 458                 return 1;
 459         }
 460
 461         return 0;
 462 }
 463
 464 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
 465 {
 466         struct cnic_dev *dev;
 467
 468         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 469                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 470                 return -EINVAL;
 471         }
 472         mutex_lock(&cnic_lock);
 473         if (cnic_ulp_tbl_prot(ulp_type)) {
 474                 pr_err("%s: Type %d has already been registered\n",
 475                        __func__, ulp_type);
 476                 mutex_unlock(&cnic_lock);
 477                 return -EBUSY;
 478         }
 479
 480         read_lock(&cnic_dev_lock);
 481         list_for_each_entry(dev, &cnic_dev_list, list) {
 482                 struct cnic_local *cp = dev->cnic_priv;
 483
 484                 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
 485         }
 486         read_unlock(&cnic_dev_lock);
 487
 488         atomic_set(&ulp_ops->ref_count, 0);
 489         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
 490         mutex_unlock(&cnic_lock);
 491
 492         /* Prevent race conditions with netdev_event */
 493         rtnl_lock();
 494         list_for_each_entry(dev, &cnic_dev_list, list) {
 495                 struct cnic_local *cp = dev->cnic_priv;
 496
 497                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
 498                         ulp_ops->cnic_init(dev);
 499         }
 500         rtnl_unlock();
 501
 502         return 0;
 503 }
 504
 505 int cnic_unregister_driver(int ulp_type)
 506 {
 507         struct cnic_dev *dev;
 508         struct cnic_ulp_ops *ulp_ops;
 509         int i = 0;
 510
 511         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 512                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 513                 return -EINVAL;
 514         }
 515         mutex_lock(&cnic_lock);
 516         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
 517         if (!ulp_ops) {
 518                 pr_err("%s: Type %d has not been registered\n",
 519                        __func__, ulp_type);
 520                 goto out_unlock;
 521         }
 522         read_lock(&cnic_dev_lock);
 523         list_for_each_entry(dev, &cnic_dev_list, list) {
 524                 struct cnic_local *cp = dev->cnic_priv;
 525
 526                 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 527                         pr_err("%s: Type %d still has devices registered\n",
 528                                __func__, ulp_type);
 529                         read_unlock(&cnic_dev_lock);
 530                         goto out_unlock;
 531                 }
 532         }
 533         read_unlock(&cnic_dev_lock);
 534
 535         RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
 536
 537         mutex_unlock(&cnic_lock);
 538         synchronize_rcu();
 539         while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
 540                 msleep(100);
 541                 i++;
 542         }
 543
 544         if (atomic_read(&ulp_ops->ref_count) != 0)
 545                 pr_warn("%s: Failed waiting for ref count to go to zero\n",
 546                         __func__);
 547         return 0;
 548
 549 out_unlock:
 550         mutex_unlock(&cnic_lock);
 551         return -EINVAL;
 552 }
 553
 554 static int cnic_start_hw(struct cnic_dev *);
 555 static void cnic_stop_hw(struct cnic_dev *);
 556
 557 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
 558                                 void *ulp_ctx)
 559 {
 560         struct cnic_local *cp = dev->cnic_priv;
 561         struct cnic_ulp_ops *ulp_ops;
 562
 563         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 564                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 565                 return -EINVAL;
 566         }
 567         mutex_lock(&cnic_lock);
 568         if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
 569                 pr_err("%s: Driver with type %d has not been registered\n",
 570                        __func__, ulp_type);
 571                 mutex_unlock(&cnic_lock);
 572                 return -EAGAIN;
 573         }
 574         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 575                 pr_err("%s: Type %d has already been registered to this device\n",
 576                        __func__, ulp_type);
 577                 mutex_unlock(&cnic_lock);
 578                 return -EBUSY;
 579         }
 580
 581         clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
 582         cp->ulp_handle[ulp_type] = ulp_ctx;
 583         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
 584         rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
 585         cnic_hold(dev);
 586
 587         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
 588                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
 589                         ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
 590
 591         mutex_unlock(&cnic_lock);
 592
 593         cnic_ulp_ctl(dev, ulp_type, true);
 594
 595         return 0;
 596
 597 }
 598 EXPORT_SYMBOL(cnic_register_driver);
 599
 600 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
 601 {
 602         struct cnic_local *cp = dev->cnic_priv;
 603         int i = 0;
 604
 605         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 606                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 607                 return -EINVAL;
 608         }
 609         mutex_lock(&cnic_lock);
 610         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 611                 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
 612                 cnic_put(dev);
 613         } else {
 614                 pr_err("%s: device not registered to this ulp type %d\n",
 615                        __func__, ulp_type);
 616                 mutex_unlock(&cnic_lock);
 617                 return -EINVAL;
 618         }
 619         mutex_unlock(&cnic_lock);
 620
 621         if (ulp_type == CNIC_ULP_ISCSI)
 622                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
 623         else if (ulp_type == CNIC_ULP_FCOE)
 624                 dev->fcoe_cap = NULL;
 625
 626         synchronize_rcu();
 627
 628         while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
 629                i < 20) {
 630                 msleep(100);
 631                 i++;
 632         }
 633         if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
 634                 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
 635
 636         cnic_ulp_ctl(dev, ulp_type, false);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL(cnic_unregister_driver);
 641
 642 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
 643                             u32 next)
 644 {
 645         id_tbl->start = start_id;
 646         id_tbl->max = size;
 647         id_tbl->next = next;
 648         spin_lock_init(&id_tbl->lock);
 649         id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
 650         if (!id_tbl->table)
 651                 return -ENOMEM;
 652
 653         return 0;
 654 }
 655
 656 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
 657 {
 658         kfree(id_tbl->table);
 659         id_tbl->table = NULL;
 660 }
 661
 662 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
 663 {
 664         int ret = -1;
 665
 666         id -= id_tbl->start;
 667         if (id >= id_tbl->max)
 668                 return ret;
 669
 670         spin_lock(&id_tbl->lock);
 671         if (!test_bit(id, id_tbl->table)) {
 672                 set_bit(id, id_tbl->table);
 673                 ret = 0;
 674         }
 675         spin_unlock(&id_tbl->lock);
 676         return ret;
 677 }
 678
 679 /* Returns -1 if not successful */
 680 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
 681 {
 682         u32 id;
 683
 684         spin_lock(&id_tbl->lock);
 685         id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
 686         if (id >= id_tbl->max) {
 687                 id = -1;
 688                 if (id_tbl->next != 0) {
 689                         id = find_first_zero_bit(id_tbl->table, id_tbl->next);
 690                         if (id >= id_tbl->next)
 691                                 id = -1;
 692                 }
 693         }
 694
 695         if (id < id_tbl->max) {
 696                 set_bit(id, id_tbl->table);
 697                 id_tbl->next = (id + 1) & (id_tbl->max - 1);
 698                 id += id_tbl->start;
 699         }
 700
 701         spin_unlock(&id_tbl->lock);
 702
 703         return id;
 704 }
 705
 706 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
 707 {
 708         if (id == -1)
 709                 return;
 710
 711         id -= id_tbl->start;
 712         if (id >= id_tbl->max)
 713                 return;
 714
 715         clear_bit(id, id_tbl->table);
 716 }
 717
 718 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
 719 {
 720         int i;
 721
 722         if (!dma->pg_arr)
 723                 return;
 724
 725         for (i = 0; i < dma->num_pages; i++) {
 726                 if (dma->pg_arr[i]) {
 727                         dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
 728                                           dma->pg_arr[i], dma->pg_map_arr[i]);
 729                         dma->pg_arr[i] = NULL;
 730                 }
 731         }
 732         if (dma->pgtbl) {
 733                 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 734                                   dma->pgtbl, dma->pgtbl_map);
 735                 dma->pgtbl = NULL;
 736         }
 737         kfree(dma->pg_arr);
 738         dma->pg_arr = NULL;
 739         dma->num_pages = 0;
 740 }
 741
 742 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
 743 {
 744         int i;
 745         __le32 *page_table = (__le32 *) dma->pgtbl;
 746
 747         for (i = 0; i < dma->num_pages; i++) {
 748                 /* Each entry needs to be in big endian format. */
 749                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
 750                 page_table++;
 751                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
 752                 page_table++;
 753         }
 754 }
 755
 756 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
 757 {
 758         int i;
 759         __le32 *page_table = (__le32 *) dma->pgtbl;
 760
 761         for (i = 0; i < dma->num_pages; i++) {
 762                 /* Each entry needs to be in little endian format. */
 763                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
 764                 page_table++;
 765                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
 766                 page_table++;
 767         }
 768 }
 769
 770 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
 771                           int pages, int use_pg_tbl)
 772 {
 773         int i, size;
 774         struct cnic_local *cp = dev->cnic_priv;
 775
 776         size = pages * (sizeof(void *) + sizeof(dma_addr_t));
 777         dma->pg_arr = kzalloc(size, GFP_ATOMIC);
 778         if (dma->pg_arr == NULL)
 779                 return -ENOMEM;
 780
 781         dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
 782         dma->num_pages = pages;
 783
 784         for (i = 0; i < pages; i++) {
 785                 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
 786                                                     BCM_PAGE_SIZE,
 787                                                     &dma->pg_map_arr[i],
 788                                                     GFP_ATOMIC);
 789                 if (dma->pg_arr[i] == NULL)
 790                         goto error;
 791         }
 792         if (!use_pg_tbl)
 793                 return 0;
 794
 795         dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
 796                           ~(BCM_PAGE_SIZE - 1);
 797         dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 798                                         &dma->pgtbl_map, GFP_ATOMIC);
 799         if (dma->pgtbl == NULL)
 800                 goto error;
 801
 802         cp->setup_pgtbl(dev, dma);
 803
 804         return 0;
 805
 806 error:
 807         cnic_free_dma(dev, dma);
 808         return -ENOMEM;
 809 }
 810
 811 static void cnic_free_context(struct cnic_dev *dev)
 812 {
 813         struct cnic_local *cp = dev->cnic_priv;
 814         int i;
 815
 816         for (i = 0; i < cp->ctx_blks; i++) {
 817                 if (cp->ctx_arr[i].ctx) {
 818                         dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
 819                                           cp->ctx_arr[i].ctx,
 820                                           cp->ctx_arr[i].mapping);
 821                         cp->ctx_arr[i].ctx = NULL;
 822                 }
 823         }
 824 }
 825
 826 static void __cnic_free_uio_rings(struct cnic_uio_dev *udev)
 827 {
 828         if (udev->l2_buf) {
 829                 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
 830                                   udev->l2_buf, udev->l2_buf_map);
 831                 udev->l2_buf = NULL;
 832         }
 833
 834         if (udev->l2_ring) {
 835                 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
 836                                   udev->l2_ring, udev->l2_ring_map);
 837                 udev->l2_ring = NULL;
 838         }
 839
 840 }
 841
 842 static void __cnic_free_uio(struct cnic_uio_dev *udev)
 843 {
 844         uio_unregister_device(&udev->cnic_uinfo);
 845
 846         __cnic_free_uio_rings(udev);
 847
 848         pci_dev_put(udev->pdev);
 849         kfree(udev);
 850 }
 851
 852 static void cnic_free_uio(struct cnic_uio_dev *udev)
 853 {
 854         if (!udev)
 855                 return;
 856
 857         write_lock(&cnic_dev_lock);
 858         list_del_init(&udev->list);
 859         write_unlock(&cnic_dev_lock);
 860         __cnic_free_uio(udev);
 861 }
 862
 863 static void cnic_free_resc(struct cnic_dev *dev)
 864 {
 865         struct cnic_local *cp = dev->cnic_priv;
 866         struct cnic_uio_dev *udev = cp->udev;
 867
 868         if (udev) {
 869                 udev->dev = NULL;
 870                 cp->udev = NULL;
 871                 if (udev->uio_dev == -1)
 872                         __cnic_free_uio_rings(udev);
 873         }
 874
 875         cnic_free_context(dev);
 876         kfree(cp->ctx_arr);
 877         cp->ctx_arr = NULL;
 878         cp->ctx_blks = 0;
 879
 880         cnic_free_dma(dev, &cp->gbl_buf_info);
 881         cnic_free_dma(dev, &cp->kwq_info);
 882         cnic_free_dma(dev, &cp->kwq_16_data_info);
 883         cnic_free_dma(dev, &cp->kcq2.dma);
 884         cnic_free_dma(dev, &cp->kcq1.dma);
 885         kfree(cp->iscsi_tbl);
 886         cp->iscsi_tbl = NULL;
 887         kfree(cp->ctx_tbl);
 888         cp->ctx_tbl = NULL;
 889
 890         cnic_free_id_tbl(&cp->fcoe_cid_tbl);
 891         cnic_free_id_tbl(&cp->cid_tbl);
 892 }
 893
 894 static int cnic_alloc_context(struct cnic_dev *dev)
 895 {
 896         struct cnic_local *cp = dev->cnic_priv;
 897
 898         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
 899                 int i, k, arr_size;
 900
 901                 cp->ctx_blk_size = BCM_PAGE_SIZE;
 902                 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
 903                 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
 904                            sizeof(struct cnic_ctx);
 905                 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
 906                 if (cp->ctx_arr == NULL)
 907                         return -ENOMEM;
 908
 909                 k = 0;
 910                 for (i = 0; i < 2; i++) {
 911                         u32 j, reg, off, lo, hi;
 912
 913                         if (i == 0)
 914                                 off = BNX2_PG_CTX_MAP;
 915                         else
 916                                 off = BNX2_ISCSI_CTX_MAP;
 917
 918                         reg = cnic_reg_rd_ind(dev, off);
 919                         lo = reg >> 16;
 920                         hi = reg & 0xffff;
 921                         for (j = lo; j < hi; j += cp->cids_per_blk, k++)
 922                                 cp->ctx_arr[k].cid = j;
 923                 }
 924
 925                 cp->ctx_blks = k;
 926                 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
 927                         cp->ctx_blks = 0;
 928                         return -ENOMEM;
 929                 }
 930
 931                 for (i = 0; i < cp->ctx_blks; i++) {
 932                         cp->ctx_arr[i].ctx =
 933                                 dma_alloc_coherent(&dev->pcidev->dev,
 934                                                    BCM_PAGE_SIZE,
 935                                                    &cp->ctx_arr[i].mapping,
 936                                                    GFP_KERNEL);
 937                         if (cp->ctx_arr[i].ctx == NULL)
 938                                 return -ENOMEM;
 939                 }
 940         }
 941         return 0;
 942 }
 943
 944 static u16 cnic_bnx2_next_idx(u16 idx)
 945 {
 946         return idx + 1;
 947 }
 948
 949 static u16 cnic_bnx2_hw_idx(u16 idx)
 950 {
 951         return idx;
 952 }
 953
 954 static u16 cnic_bnx2x_next_idx(u16 idx)
 955 {
 956         idx++;
 957         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
 958                 idx++;
 959
 960         return idx;
 961 }
 962
 963 static u16 cnic_bnx2x_hw_idx(u16 idx)
 964 {
 965         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
 966                 idx++;
 967         return idx;
 968 }
 969
 970 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
 971                           bool use_pg_tbl)
 972 {
 973         int err, i, use_page_tbl = 0;
 974         struct kcqe **kcq;
 975
 976         if (use_pg_tbl)
 977                 use_page_tbl = 1;
 978
 979         err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
 980         if (err)
 981                 return err;
 982
 983         kcq = (struct kcqe **) info->dma.pg_arr;
 984         info->kcq = kcq;
 985
 986         info->next_idx = cnic_bnx2_next_idx;
 987         info->hw_idx = cnic_bnx2_hw_idx;
 988         if (use_pg_tbl)
 989                 return 0;
 990
 991         info->next_idx = cnic_bnx2x_next_idx;
 992         info->hw_idx = cnic_bnx2x_hw_idx;
 993
 994         for (i = 0; i < KCQ_PAGE_CNT; i++) {
 995                 struct bnx2x_bd_chain_next *next =
 996                         (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
 997                 int j = i + 1;
 998
 999                 if (j >= KCQ_PAGE_CNT)
1000                         j = 0;
1001                 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
1002                 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
1003         }
1004         return 0;
1005 }
1006
1007 static int __cnic_alloc_uio_rings(struct cnic_uio_dev *udev, int pages)
1008 {
1009         struct cnic_local *cp = udev->dev->cnic_priv;
1010
1011         if (udev->l2_ring)
1012                 return 0;
1013
1014         udev->l2_ring_size = pages * BCM_PAGE_SIZE;
1015         udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1016                                            &udev->l2_ring_map,
1017                                            GFP_KERNEL | __GFP_COMP);
1018         if (!udev->l2_ring)
1019                 return -ENOMEM;
1020
1021         udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1022         udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1023         udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1024                                           &udev->l2_buf_map,
1025                                           GFP_KERNEL | __GFP_COMP);
1026         if (!udev->l2_buf) {
1027                 __cnic_free_uio_rings(udev);
1028                 return -ENOMEM;
1029         }
1030
1031         return 0;
1032
1033 }
1034
1035 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
1036 {
1037         struct cnic_local *cp = dev->cnic_priv;
1038         struct cnic_uio_dev *udev;
1039
1040         read_lock(&cnic_dev_lock);
1041         list_for_each_entry(udev, &cnic_udev_list, list) {
1042                 if (udev->pdev == dev->pcidev) {
1043                         udev->dev = dev;
1044                         if (__cnic_alloc_uio_rings(udev, pages)) {
1045                                 udev->dev = NULL;
1046                                 read_unlock(&cnic_dev_lock);
1047                                 return -ENOMEM;
1048                         }
1049                         cp->udev = udev;
1050                         read_unlock(&cnic_dev_lock);
1051                         return 0;
1052                 }
1053         }
1054         read_unlock(&cnic_dev_lock);
1055
1056         udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1057         if (!udev)
1058                 return -ENOMEM;
1059
1060         udev->uio_dev = -1;
1061
1062         udev->dev = dev;
1063         udev->pdev = dev->pcidev;
1064
1065         if (__cnic_alloc_uio_rings(udev, pages))
1066                 goto err_udev;
1067
1068         write_lock(&cnic_dev_lock);
1069         list_add(&udev->list, &cnic_udev_list);
1070         write_unlock(&cnic_dev_lock);
1071
1072         pci_dev_get(udev->pdev);
1073
1074         cp->udev = udev;
1075
1076         return 0;
1077
1078  err_udev:
1079         kfree(udev);
1080         return -ENOMEM;
1081 }
1082
1083 static int cnic_init_uio(struct cnic_dev *dev)
1084 {
1085         struct cnic_local *cp = dev->cnic_priv;
1086         struct cnic_uio_dev *udev = cp->udev;
1087         struct uio_info *uinfo;
1088         int ret = 0;
1089
1090         if (!udev)
1091                 return -ENOMEM;
1092
1093         uinfo = &udev->cnic_uinfo;
1094
1095         uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1096         uinfo->mem[0].internal_addr = dev->regview;
1097         uinfo->mem[0].memtype = UIO_MEM_PHYS;
1098
1099         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1100                 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1101                                                      TX_MAX_TSS_RINGS + 1);
1102                 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1103                                         PAGE_MASK;
1104                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1105                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1106                 else
1107                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1108
1109                 uinfo->name = "bnx2_cnic";
1110         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1111                 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1112
1113                 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1114                         PAGE_MASK;
1115                 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1116
1117                 uinfo->name = "bnx2x_cnic";
1118         }
1119
1120         uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1121
1122         uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1123         uinfo->mem[2].size = udev->l2_ring_size;
1124         uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1125
1126         uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1127         uinfo->mem[3].size = udev->l2_buf_size;
1128         uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1129
1130         uinfo->version = CNIC_MODULE_VERSION;
1131         uinfo->irq = UIO_IRQ_CUSTOM;
1132
1133         uinfo->open = cnic_uio_open;
1134         uinfo->release = cnic_uio_close;
1135
1136         if (udev->uio_dev == -1) {
1137                 if (!uinfo->priv) {
1138                         uinfo->priv = udev;
1139
1140                         ret = uio_register_device(&udev->pdev->dev, uinfo);
1141                 }
1142         } else {
1143                 cnic_init_rings(dev);
1144         }
1145
1146         return ret;
1147 }
1148
1149 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1150 {
1151         struct cnic_local *cp = dev->cnic_priv;
1152         int ret;
1153
1154         ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1155         if (ret)
1156                 goto error;
1157         cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1158
1159         ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1160         if (ret)
1161                 goto error;
1162
1163         ret = cnic_alloc_context(dev);
1164         if (ret)
1165                 goto error;
1166
1167         ret = cnic_alloc_uio_rings(dev, 2);
1168         if (ret)
1169                 goto error;
1170
1171         ret = cnic_init_uio(dev);
1172         if (ret)
1173                 goto error;
1174
1175         return 0;
1176
1177 error:
1178         cnic_free_resc(dev);
1179         return ret;
1180 }
1181
1182 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1183 {
1184         struct cnic_local *cp = dev->cnic_priv;
1185         int ctx_blk_size = cp->ethdev->ctx_blk_size;
1186         int total_mem, blks, i;
1187
1188         total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1189         blks = total_mem / ctx_blk_size;
1190         if (total_mem % ctx_blk_size)
1191                 blks++;
1192
1193         if (blks > cp->ethdev->ctx_tbl_len)
1194                 return -ENOMEM;
1195
1196         cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1197         if (cp->ctx_arr == NULL)
1198                 return -ENOMEM;
1199
1200         cp->ctx_blks = blks;
1201         cp->ctx_blk_size = ctx_blk_size;
1202         if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1203                 cp->ctx_align = 0;
1204         else
1205                 cp->ctx_align = ctx_blk_size;
1206
1207         cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1208
1209         for (i = 0; i < blks; i++) {
1210                 cp->ctx_arr[i].ctx =
1211                         dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1212                                            &cp->ctx_arr[i].mapping,
1213                                            GFP_KERNEL);
1214                 if (cp->ctx_arr[i].ctx == NULL)
1215                         return -ENOMEM;
1216
1217                 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1218                         if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1219                                 cnic_free_context(dev);
1220                                 cp->ctx_blk_size += cp->ctx_align;
1221                                 i = -1;
1222                                 continue;
1223                         }
1224                 }
1225         }
1226         return 0;
1227 }
1228
1229 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1230 {
1231         struct cnic_local *cp = dev->cnic_priv;
1232         struct cnic_eth_dev *ethdev = cp->ethdev;
1233         u32 start_cid = ethdev->starting_cid;
1234         int i, j, n, ret, pages;
1235         struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1236
1237         cp->iro_arr = ethdev->iro_arr;
1238
1239         cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1240         cp->iscsi_start_cid = start_cid;
1241         cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1242
1243         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1244                 cp->max_cid_space += dev->max_fcoe_conn;
1245                 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1246                 if (!cp->fcoe_init_cid)
1247                         cp->fcoe_init_cid = 0x10;
1248         }
1249
1250         cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1251                                 GFP_KERNEL);
1252         if (!cp->iscsi_tbl)
1253                 goto error;
1254
1255         cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1256                                 cp->max_cid_space, GFP_KERNEL);
1257         if (!cp->ctx_tbl)
1258                 goto error;
1259
1260         for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1261                 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1262                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1263         }
1264
1265         for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1266                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1267
1268         pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1269                 PAGE_SIZE;
1270
1271         ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1272         if (ret)
1273                 return -ENOMEM;
1274
1275         n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1276         for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1277                 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1278
1279                 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1280                 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1281                                                    off;
1282
1283                 if ((i % n) == (n - 1))
1284                         j++;
1285         }
1286
1287         ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1288         if (ret)
1289                 goto error;
1290
1291         if (CNIC_SUPPORTS_FCOE(cp)) {
1292                 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1293                 if (ret)
1294                         goto error;
1295         }
1296
1297         pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1298         ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1299         if (ret)
1300                 goto error;
1301
1302         ret = cnic_alloc_bnx2x_context(dev);
1303         if (ret)
1304                 goto error;
1305
1306         if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
1307                 return 0;
1308
1309         cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1310
1311         cp->l2_rx_ring_size = 15;
1312
1313         ret = cnic_alloc_uio_rings(dev, 4);
1314         if (ret)
1315                 goto error;
1316
1317         ret = cnic_init_uio(dev);
1318         if (ret)
1319                 goto error;
1320
1321         return 0;
1322
1323 error:
1324         cnic_free_resc(dev);
1325         return -ENOMEM;
1326 }
1327
1328 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1329 {
1330         return cp->max_kwq_idx -
1331                 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1332 }
1333
1334 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1335                                   u32 num_wqes)
1336 {
1337         struct cnic_local *cp = dev->cnic_priv;
1338         struct kwqe *prod_qe;
1339         u16 prod, sw_prod, i;
1340
1341         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1342                 return -EAGAIN;         /* bnx2 is down */
1343
1344         spin_lock_bh(&cp->cnic_ulp_lock);
1345         if (num_wqes > cnic_kwq_avail(cp) &&
1346             !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1347                 spin_unlock_bh(&cp->cnic_ulp_lock);
1348                 return -EAGAIN;
1349         }
1350
1351         clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1352
1353         prod = cp->kwq_prod_idx;
1354         sw_prod = prod & MAX_KWQ_IDX;
1355         for (i = 0; i < num_wqes; i++) {
1356                 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1357                 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1358                 prod++;
1359                 sw_prod = prod & MAX_KWQ_IDX;
1360         }
1361         cp->kwq_prod_idx = prod;
1362
1363         CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1364
1365         spin_unlock_bh(&cp->cnic_ulp_lock);
1366         return 0;
1367 }
1368
1369 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1370                                    union l5cm_specific_data *l5_data)
1371 {
1372         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1373         dma_addr_t map;
1374
1375         map = ctx->kwqe_data_mapping;
1376         l5_data->phy_address.lo = (u64) map & 0xffffffff;
1377         l5_data->phy_address.hi = (u64) map >> 32;
1378         return ctx->kwqe_data;
1379 }
1380
1381 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1382                                 u32 type, union l5cm_specific_data *l5_data)
1383 {
1384         struct cnic_local *cp = dev->cnic_priv;
1385         struct l5cm_spe kwqe;
1386         struct kwqe_16 *kwq[1];
1387         u16 type_16;
1388         int ret;
1389
1390         kwqe.hdr.conn_and_cmd_data =
1391                 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1392                              BNX2X_HW_CID(cp, cid)));
1393
1394         type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1395         type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1396                    SPE_HDR_FUNCTION_ID;
1397
1398         kwqe.hdr.type = cpu_to_le16(type_16);
1399         kwqe.hdr.reserved1 = 0;
1400         kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1401         kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1402
1403         kwq[0] = (struct kwqe_16 *) &kwqe;
1404
1405         spin_lock_bh(&cp->cnic_ulp_lock);
1406         ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1407         spin_unlock_bh(&cp->cnic_ulp_lock);
1408
1409         if (ret == 1)
1410                 return 0;
1411
1412         return ret;
1413 }
1414
1415 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1416                                    struct kcqe *cqes[], u32 num_cqes)
1417 {
1418         struct cnic_local *cp = dev->cnic_priv;
1419         struct cnic_ulp_ops *ulp_ops;
1420
1421         rcu_read_lock();
1422         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1423         if (likely(ulp_ops)) {
1424                 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1425                                           cqes, num_cqes);
1426         }
1427         rcu_read_unlock();
1428 }
1429
1430 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1431 {
1432         struct cnic_local *cp = dev->cnic_priv;
1433         struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1434         int hq_bds, pages;
1435         u32 pfid = cp->pfid;
1436
1437         cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1438         cp->num_ccells = req1->num_ccells_per_conn;
1439         cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1440                               cp->num_iscsi_tasks;
1441         cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1442                         BNX2X_ISCSI_R2TQE_SIZE;
1443         cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1444         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1445         hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1446         cp->num_cqs = req1->num_cqs;
1447
1448         if (!dev->max_iscsi_conn)
1449                 return 0;
1450
1451         /* init Tstorm RAM */
1452         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1453                   req1->rq_num_wqes);
1454         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1455                   PAGE_SIZE);
1456         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1457                  TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1458         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1459                   TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1460                   req1->num_tasks_per_conn);
1461
1462         /* init Ustorm RAM */
1463         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1464                   USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1465                   req1->rq_buffer_size);
1466         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1467                   PAGE_SIZE);
1468         CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1469                  USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1470         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1471                   USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1472                   req1->num_tasks_per_conn);
1473         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1474                   req1->rq_num_wqes);
1475         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1476                   req1->cq_num_wqes);
1477         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1478                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1479
1480         /* init Xstorm RAM */
1481         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1482                   PAGE_SIZE);
1483         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1484                  XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1485         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1486                   XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1487                   req1->num_tasks_per_conn);
1488         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1489                   hq_bds);
1490         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1491                   req1->num_tasks_per_conn);
1492         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1493                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1494
1495         /* init Cstorm RAM */
1496         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1497                   PAGE_SIZE);
1498         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1499                  CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1500         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1501                   CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1502                   req1->num_tasks_per_conn);
1503         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1504                   req1->cq_num_wqes);
1505         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1506                   hq_bds);
1507
1508         return 0;
1509 }
1510
1511 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1512 {
1513         struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1514         struct cnic_local *cp = dev->cnic_priv;
1515         u32 pfid = cp->pfid;
1516         struct iscsi_kcqe kcqe;
1517         struct kcqe *cqes[1];
1518
1519         memset(&kcqe, 0, sizeof(kcqe));
1520         if (!dev->max_iscsi_conn) {
1521                 kcqe.completion_status =
1522                         ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1523                 goto done;
1524         }
1525
1526         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1527                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1528         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1529                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1530                 req2->error_bit_map[1]);
1531
1532         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1533                   USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1534         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1535                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1536         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1537                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1538                 req2->error_bit_map[1]);
1539
1540         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1541                   CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1542
1543         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1544
1545 done:
1546         kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1547         cqes[0] = (struct kcqe *) &kcqe;
1548         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1549
1550         return 0;
1551 }
1552
1553 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1554 {
1555         struct cnic_local *cp = dev->cnic_priv;
1556         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1557
1558         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1559                 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1560
1561                 cnic_free_dma(dev, &iscsi->hq_info);
1562                 cnic_free_dma(dev, &iscsi->r2tq_info);
1563                 cnic_free_dma(dev, &iscsi->task_array_info);
1564                 cnic_free_id(&cp->cid_tbl, ctx->cid);
1565         } else {
1566                 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1567         }
1568
1569         ctx->cid = 0;
1570 }
1571
1572 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1573 {
1574         u32 cid;
1575         int ret, pages;
1576         struct cnic_local *cp = dev->cnic_priv;
1577         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1578         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1579
1580         if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1581                 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1582                 if (cid == -1) {
1583                         ret = -ENOMEM;
1584                         goto error;
1585                 }
1586                 ctx->cid = cid;
1587                 return 0;
1588         }
1589
1590         cid = cnic_alloc_new_id(&cp->cid_tbl);
1591         if (cid == -1) {
1592                 ret = -ENOMEM;
1593                 goto error;
1594         }
1595
1596         ctx->cid = cid;
1597         pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1598
1599         ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1600         if (ret)
1601                 goto error;
1602
1603         pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1604         ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1605         if (ret)
1606                 goto error;
1607
1608         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1609         ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1610         if (ret)
1611                 goto error;
1612
1613         return 0;
1614
1615 error:
1616         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1617         return ret;
1618 }
1619
1620 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1621                                 struct regpair *ctx_addr)
1622 {
1623         struct cnic_local *cp = dev->cnic_priv;
1624         struct cnic_eth_dev *ethdev = cp->ethdev;
1625         int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1626         int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1627         unsigned long align_off = 0;
1628         dma_addr_t ctx_map;
1629         void *ctx;
1630
1631         if (cp->ctx_align) {
1632                 unsigned long mask = cp->ctx_align - 1;
1633
1634                 if (cp->ctx_arr[blk].mapping & mask)
1635                         align_off = cp->ctx_align -
1636                                     (cp->ctx_arr[blk].mapping & mask);
1637         }
1638         ctx_map = cp->ctx_arr[blk].mapping + align_off +
1639                 (off * BNX2X_CONTEXT_MEM_SIZE);
1640         ctx = cp->ctx_arr[blk].ctx + align_off +
1641               (off * BNX2X_CONTEXT_MEM_SIZE);
1642         if (init)
1643                 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1644
1645         ctx_addr->lo = ctx_map & 0xffffffff;
1646         ctx_addr->hi = (u64) ctx_map >> 32;
1647         return ctx;
1648 }
1649
1650 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1651                                 u32 num)
1652 {
1653         struct cnic_local *cp = dev->cnic_priv;
1654         struct iscsi_kwqe_conn_offload1 *req1 =
1655                         (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1656         struct iscsi_kwqe_conn_offload2 *req2 =
1657                         (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1658         struct iscsi_kwqe_conn_offload3 *req3;
1659         struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1660         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1661         u32 cid = ctx->cid;
1662         u32 hw_cid = BNX2X_HW_CID(cp, cid);
1663         struct iscsi_context *ictx;
1664         struct regpair context_addr;
1665         int i, j, n = 2, n_max;
1666         u8 port = CNIC_PORT(cp);
1667
1668         ctx->ctx_flags = 0;
1669         if (!req2->num_additional_wqes)
1670                 return -EINVAL;
1671
1672         n_max = req2->num_additional_wqes + 2;
1673
1674         ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1675         if (ictx == NULL)
1676                 return -ENOMEM;
1677
1678         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1679
1680         ictx->xstorm_ag_context.hq_prod = 1;
1681
1682         ictx->xstorm_st_context.iscsi.first_burst_length =
1683                 ISCSI_DEF_FIRST_BURST_LEN;
1684         ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1685                 ISCSI_DEF_MAX_RECV_SEG_LEN;
1686         ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1687                 req1->sq_page_table_addr_lo;
1688         ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1689                 req1->sq_page_table_addr_hi;
1690         ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1691         ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1692         ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1693                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1694         ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1695                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1696         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1697                 iscsi->hq_info.pgtbl[0];
1698         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1699                 iscsi->hq_info.pgtbl[1];
1700         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1701                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1702         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1703                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1704         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1705                 iscsi->r2tq_info.pgtbl[0];
1706         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1707                 iscsi->r2tq_info.pgtbl[1];
1708         ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1709                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1710         ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1711                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1712         ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1713                 BNX2X_ISCSI_PBL_NOT_CACHED;
1714         ictx->xstorm_st_context.iscsi.flags.flags |=
1715                 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1716         ictx->xstorm_st_context.iscsi.flags.flags |=
1717                 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1718         ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1719                 ETH_P_8021Q;
1720         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
1721                 cp->port_mode == CHIP_2_PORT_MODE) {
1722
1723                 port = 0;
1724         }
1725         ictx->xstorm_st_context.common.flags =
1726                 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1727         ictx->xstorm_st_context.common.flags =
1728                 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1729
1730         ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1731         /* TSTORM requires the base address of RQ DB & not PTE */
1732         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1733                 req2->rq_page_table_addr_lo & PAGE_MASK;
1734         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1735                 req2->rq_page_table_addr_hi;
1736         ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1737         ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1738         ictx->tstorm_st_context.tcp.flags2 |=
1739                 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1740         ictx->tstorm_st_context.tcp.ooo_support_mode =
1741                 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1742
1743         ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1744
1745         ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1746                 req2->rq_page_table_addr_lo;
1747         ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1748                 req2->rq_page_table_addr_hi;
1749         ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1750         ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1751         ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1752                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1753         ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1754                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1755         ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1756                 iscsi->r2tq_info.pgtbl[0];
1757         ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1758                 iscsi->r2tq_info.pgtbl[1];
1759         ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1760                 req1->cq_page_table_addr_lo;
1761         ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1762                 req1->cq_page_table_addr_hi;
1763         ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1764         ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1765         ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1766         ictx->ustorm_st_context.task_pbe_cache_index =
1767                 BNX2X_ISCSI_PBL_NOT_CACHED;
1768         ictx->ustorm_st_context.task_pdu_cache_index =
1769                 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1770
1771         for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1772                 if (j == 3) {
1773                         if (n >= n_max)
1774                                 break;
1775                         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1776                         j = 0;
1777                 }
1778                 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1779                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1780                         req3->qp_first_pte[j].hi;
1781                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1782                         req3->qp_first_pte[j].lo;
1783         }
1784
1785         ictx->ustorm_st_context.task_pbl_base.lo =
1786                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1787         ictx->ustorm_st_context.task_pbl_base.hi =
1788                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1789         ictx->ustorm_st_context.tce_phy_addr.lo =
1790                 iscsi->task_array_info.pgtbl[0];
1791         ictx->ustorm_st_context.tce_phy_addr.hi =
1792                 iscsi->task_array_info.pgtbl[1];
1793         ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1794         ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1795         ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1796         ictx->ustorm_st_context.negotiated_rx_and_flags |=
1797                 ISCSI_DEF_MAX_BURST_LEN;
1798         ictx->ustorm_st_context.negotiated_rx |=
1799                 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1800                 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1801
1802         ictx->cstorm_st_context.hq_pbl_base.lo =
1803                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1804         ictx->cstorm_st_context.hq_pbl_base.hi =
1805                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1806         ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1807         ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1808         ictx->cstorm_st_context.task_pbl_base.lo =
1809                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1810         ictx->cstorm_st_context.task_pbl_base.hi =
1811                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1812         /* CSTORM and USTORM initialization is different, CSTORM requires
1813          * CQ DB base & not PTE addr */
1814         ictx->cstorm_st_context.cq_db_base.lo =
1815                 req1->cq_page_table_addr_lo & PAGE_MASK;
1816         ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1817         ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1818         ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1819         for (i = 0; i < cp->num_cqs; i++) {
1820                 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1821                         ISCSI_INITIAL_SN;
1822                 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1823                         ISCSI_INITIAL_SN;
1824         }
1825
1826         ictx->xstorm_ag_context.cdu_reserved =
1827                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1828                                        ISCSI_CONNECTION_TYPE);
1829         ictx->ustorm_ag_context.cdu_usage =
1830                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1831                                        ISCSI_CONNECTION_TYPE);
1832         return 0;
1833
1834 }
1835
1836 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1837                                    u32 num, int *work)
1838 {
1839         struct iscsi_kwqe_conn_offload1 *req1;
1840         struct iscsi_kwqe_conn_offload2 *req2;
1841         struct cnic_local *cp = dev->cnic_priv;
1842         struct cnic_context *ctx;
1843         struct iscsi_kcqe kcqe;
1844         struct kcqe *cqes[1];
1845         u32 l5_cid;
1846         int ret = 0;
1847
1848         if (num < 2) {
1849                 *work = num;
1850                 return -EINVAL;
1851         }
1852
1853         req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1854         req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1855         if ((num - 2) < req2->num_additional_wqes) {
1856                 *work = num;
1857                 return -EINVAL;
1858         }
1859         *work = 2 + req2->num_additional_wqes;
1860
1861         l5_cid = req1->iscsi_conn_id;
1862         if (l5_cid >= MAX_ISCSI_TBL_SZ)
1863                 return -EINVAL;
1864
1865         memset(&kcqe, 0, sizeof(kcqe));
1866         kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1867         kcqe.iscsi_conn_id = l5_cid;
1868         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1869
1870         ctx = &cp->ctx_tbl[l5_cid];
1871         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1872                 kcqe.completion_status =
1873                         ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1874                 goto done;
1875         }
1876
1877         if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1878                 atomic_dec(&cp->iscsi_conn);
1879                 goto done;
1880         }
1881         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1882         if (ret) {
1883                 atomic_dec(&cp->iscsi_conn);
1884                 ret = 0;
1885                 goto done;
1886         }
1887         ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1888         if (ret < 0) {
1889                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1890                 atomic_dec(&cp->iscsi_conn);
1891                 goto done;
1892         }
1893
1894         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1895         kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1896
1897 done:
1898         cqes[0] = (struct kcqe *) &kcqe;
1899         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1900         return 0;
1901 }
1902
1903
1904 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1905 {
1906         struct cnic_local *cp = dev->cnic_priv;
1907         struct iscsi_kwqe_conn_update *req =
1908                 (struct iscsi_kwqe_conn_update *) kwqe;
1909         void *data;
1910         union l5cm_specific_data l5_data;
1911         u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1912         int ret;
1913
1914         if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1915                 return -EINVAL;
1916
1917         data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1918         if (!data)
1919                 return -ENOMEM;
1920
1921         memcpy(data, kwqe, sizeof(struct kwqe));
1922
1923         ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1924                         req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1925         return ret;
1926 }
1927
1928 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1929 {
1930         struct cnic_local *cp = dev->cnic_priv;
1931         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1932         union l5cm_specific_data l5_data;
1933         int ret;
1934         u32 hw_cid;
1935
1936         init_waitqueue_head(&ctx->waitq);
1937         ctx->wait_cond = 0;
1938         memset(&l5_data, 0, sizeof(l5_data));
1939         hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1940
1941         ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1942                                   hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1943
1944         if (ret == 0) {
1945                 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1946                 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1947                         return -EBUSY;
1948         }
1949
1950         return 0;
1951 }
1952
1953 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1954 {
1955         struct cnic_local *cp = dev->cnic_priv;
1956         struct iscsi_kwqe_conn_destroy *req =
1957                 (struct iscsi_kwqe_conn_destroy *) kwqe;
1958         u32 l5_cid = req->reserved0;
1959         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1960         int ret = 0;
1961         struct iscsi_kcqe kcqe;
1962         struct kcqe *cqes[1];
1963
1964         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1965                 goto skip_cfc_delete;
1966
1967         if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1968                 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1969
1970                 if (delta > (2 * HZ))
1971                         delta = 0;
1972
1973                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1974                 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1975                 goto destroy_reply;
1976         }
1977
1978         ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1979
1980 skip_cfc_delete:
1981         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1982
1983         if (!ret) {
1984                 atomic_dec(&cp->iscsi_conn);
1985                 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1986         }
1987
1988 destroy_reply:
1989         memset(&kcqe, 0, sizeof(kcqe));
1990         kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1991         kcqe.iscsi_conn_id = l5_cid;
1992         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1993         kcqe.iscsi_conn_context_id = req->context_id;
1994
1995         cqes[0] = (struct kcqe *) &kcqe;
1996         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1997
1998         return 0;
1999 }
2000
2001 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
2002                                       struct l4_kwq_connect_req1 *kwqe1,
2003                                       struct l4_kwq_connect_req3 *kwqe3,
2004                                       struct l5cm_active_conn_buffer *conn_buf)
2005 {
2006         struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
2007         struct l5cm_xstorm_conn_buffer *xstorm_buf =
2008                 &conn_buf->xstorm_conn_buffer;
2009         struct l5cm_tstorm_conn_buffer *tstorm_buf =
2010                 &conn_buf->tstorm_conn_buffer;
2011         struct regpair context_addr;
2012         u32 cid = BNX2X_SW_CID(kwqe1->cid);
2013         struct in6_addr src_ip, dst_ip;
2014         int i;
2015         u32 *addrp;
2016
2017         addrp = (u32 *) &conn_addr->local_ip_addr;
2018         for (i = 0; i < 4; i++, addrp++)
2019                 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2020
2021         addrp = (u32 *) &conn_addr->remote_ip_addr;
2022         for (i = 0; i < 4; i++, addrp++)
2023                 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2024
2025         cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
2026
2027         xstorm_buf->context_addr.hi = context_addr.hi;
2028         xstorm_buf->context_addr.lo = context_addr.lo;
2029         xstorm_buf->mss = 0xffff;
2030         xstorm_buf->rcv_buf = kwqe3->rcv_buf;
2031         if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
2032                 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
2033         xstorm_buf->pseudo_header_checksum =
2034                 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
2035
2036         if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
2037                 tstorm_buf->params |=
2038                         L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
2039         if (kwqe3->ka_timeout) {
2040                 tstorm_buf->ka_enable = 1;
2041                 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2042                 tstorm_buf->ka_interval = kwqe3->ka_interval;
2043                 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2044         }
2045         tstorm_buf->max_rt_time = 0xffffffff;
2046 }
2047
2048 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2049 {
2050         struct cnic_local *cp = dev->cnic_priv;
2051         u32 pfid = cp->pfid;
2052         u8 *mac = dev->mac_addr;
2053
2054         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2055                  XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2056         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2057                  XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2058         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2059                  XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2060         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2061                  XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2062         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2063                  XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2064         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2065                  XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2066
2067         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2068                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2069         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2070                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2071                  mac[4]);
2072         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2073                  TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2074         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2075                  TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2076                  mac[2]);
2077         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2078                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2079         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2080                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2081                  mac[0]);
2082 }
2083
2084 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
2085 {
2086         struct cnic_local *cp = dev->cnic_priv;
2087         u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
2088         u16 tstorm_flags = 0;
2089
2090         if (tcp_ts) {
2091                 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2092                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2093         }
2094
2095         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2096                  XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
2097
2098         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
2099                   TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
2100 }
2101
2102 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2103                               u32 num, int *work)
2104 {
2105         struct cnic_local *cp = dev->cnic_priv;
2106         struct l4_kwq_connect_req1 *kwqe1 =
2107                 (struct l4_kwq_connect_req1 *) wqes[0];
2108         struct l4_kwq_connect_req3 *kwqe3;
2109         struct l5cm_active_conn_buffer *conn_buf;
2110         struct l5cm_conn_addr_params *conn_addr;
2111         union l5cm_specific_data l5_data;
2112         u32 l5_cid = kwqe1->pg_cid;
2113         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2114         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2115         int ret;
2116
2117         if (num < 2) {
2118                 *work = num;
2119                 return -EINVAL;
2120         }
2121
2122         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2123                 *work = 3;
2124         else
2125                 *work = 2;
2126
2127         if (num < *work) {
2128                 *work = num;
2129                 return -EINVAL;
2130         }
2131
2132         if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2133                 netdev_err(dev->netdev, "conn_buf size too big\n");
2134                 return -ENOMEM;
2135         }
2136         conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2137         if (!conn_buf)
2138                 return -ENOMEM;
2139
2140         memset(conn_buf, 0, sizeof(*conn_buf));
2141
2142         conn_addr = &conn_buf->conn_addr_buf;
2143         conn_addr->remote_addr_0 = csk->ha[0];
2144         conn_addr->remote_addr_1 = csk->ha[1];
2145         conn_addr->remote_addr_2 = csk->ha[2];
2146         conn_addr->remote_addr_3 = csk->ha[3];
2147         conn_addr->remote_addr_4 = csk->ha[4];
2148         conn_addr->remote_addr_5 = csk->ha[5];
2149
2150         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2151                 struct l4_kwq_connect_req2 *kwqe2 =
2152                         (struct l4_kwq_connect_req2 *) wqes[1];
2153
2154                 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2155                 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2156                 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2157
2158                 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2159                 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2160                 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2161                 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2162         }
2163         kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2164
2165         conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2166         conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2167         conn_addr->local_tcp_port = kwqe1->src_port;
2168         conn_addr->remote_tcp_port = kwqe1->dst_port;
2169
2170         conn_addr->pmtu = kwqe3->pmtu;
2171         cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2172
2173         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2174                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2175
2176         cnic_bnx2x_set_tcp_timestamp(dev,
2177                 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2178
2179         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2180                         kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2181         if (!ret)
2182                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2183
2184         return ret;
2185 }
2186
2187 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2188 {
2189         struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2190         union l5cm_specific_data l5_data;
2191         int ret;
2192
2193         memset(&l5_data, 0, sizeof(l5_data));
2194         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2195                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2196         return ret;
2197 }
2198
2199 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2200 {
2201         struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2202         union l5cm_specific_data l5_data;
2203         int ret;
2204
2205         memset(&l5_data, 0, sizeof(l5_data));
2206         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2207                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2208         return ret;
2209 }
2210 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2211 {
2212         struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2213         struct l4_kcq kcqe;
2214         struct kcqe *cqes[1];
2215
2216         memset(&kcqe, 0, sizeof(kcqe));
2217         kcqe.pg_host_opaque = req->host_opaque;
2218         kcqe.pg_cid = req->host_opaque;
2219         kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2220         cqes[0] = (struct kcqe *) &kcqe;
2221         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2222         return 0;
2223 }
2224
2225 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2226 {
2227         struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2228         struct l4_kcq kcqe;
2229         struct kcqe *cqes[1];
2230
2231         memset(&kcqe, 0, sizeof(kcqe));
2232         kcqe.pg_host_opaque = req->pg_host_opaque;
2233         kcqe.pg_cid = req->pg_cid;
2234         kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2235         cqes[0] = (struct kcqe *) &kcqe;
2236         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2237         return 0;
2238 }
2239
2240 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2241 {
2242         struct fcoe_kwqe_stat *req;
2243         struct fcoe_stat_ramrod_params *fcoe_stat;
2244         union l5cm_specific_data l5_data;
2245         struct cnic_local *cp = dev->cnic_priv;
2246         int ret;
2247         u32 cid;
2248
2249         req = (struct fcoe_kwqe_stat *) kwqe;
2250         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2251
2252         fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2253         if (!fcoe_stat)
2254                 return -ENOMEM;
2255
2256         memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2257         memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2258
2259         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2260                                   FCOE_CONNECTION_TYPE, &l5_data);
2261         return ret;
2262 }
2263
2264 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2265                                  u32 num, int *work)
2266 {
2267         int ret;
2268         struct cnic_local *cp = dev->cnic_priv;
2269         u32 cid;
2270         struct fcoe_init_ramrod_params *fcoe_init;
2271         struct fcoe_kwqe_init1 *req1;
2272         struct fcoe_kwqe_init2 *req2;
2273         struct fcoe_kwqe_init3 *req3;
2274         union l5cm_specific_data l5_data;
2275
2276         if (num < 3) {
2277                 *work = num;
2278                 return -EINVAL;
2279         }
2280         req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2281         req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2282         req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2283         if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2284                 *work = 1;
2285                 return -EINVAL;
2286         }
2287         if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2288                 *work = 2;
2289                 return -EINVAL;
2290         }
2291
2292         if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2293                 netdev_err(dev->netdev, "fcoe_init size too big\n");
2294                 return -ENOMEM;
2295         }
2296         fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2297         if (!fcoe_init)
2298                 return -ENOMEM;
2299
2300         memset(fcoe_init, 0, sizeof(*fcoe_init));
2301         memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2302         memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2303         memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2304         fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2305         fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2306         fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2307
2308         fcoe_init->sb_num = cp->status_blk_num;
2309         fcoe_init->eq_prod = MAX_KCQ_IDX;
2310         fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2311         cp->kcq2.sw_prod_idx = 0;
2312
2313         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2314         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2315                                   FCOE_CONNECTION_TYPE, &l5_data);
2316         *work = 3;
2317         return ret;
2318 }
2319
2320 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2321                                  u32 num, int *work)
2322 {
2323         int ret = 0;
2324         u32 cid = -1, l5_cid;
2325         struct cnic_local *cp = dev->cnic_priv;
2326         struct fcoe_kwqe_conn_offload1 *req1;
2327         struct fcoe_kwqe_conn_offload2 *req2;
2328         struct fcoe_kwqe_conn_offload3 *req3;
2329         struct fcoe_kwqe_conn_offload4 *req4;
2330         struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2331         struct cnic_context *ctx;
2332         struct fcoe_context *fctx;
2333         struct regpair ctx_addr;
2334         union l5cm_specific_data l5_data;
2335         struct fcoe_kcqe kcqe;
2336         struct kcqe *cqes[1];
2337
2338         if (num < 4) {
2339                 *work = num;
2340                 return -EINVAL;
2341         }
2342         req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2343         req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2344         req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2345         req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2346
2347         *work = 4;
2348
2349         l5_cid = req1->fcoe_conn_id;
2350         if (l5_cid >= dev->max_fcoe_conn)
2351                 goto err_reply;
2352
2353         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2354
2355         ctx = &cp->ctx_tbl[l5_cid];
2356         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2357                 goto err_reply;
2358
2359         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2360         if (ret) {
2361                 ret = 0;
2362                 goto err_reply;
2363         }
2364         cid = ctx->cid;
2365
2366         fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2367         if (fctx) {
2368                 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2369                 u32 val;
2370
2371                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2372                                              FCOE_CONNECTION_TYPE);
2373                 fctx->xstorm_ag_context.cdu_reserved = val;
2374                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2375                                              FCOE_CONNECTION_TYPE);
2376                 fctx->ustorm_ag_context.cdu_usage = val;
2377         }
2378         if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2379                 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2380                 goto err_reply;
2381         }
2382         fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2383         if (!fcoe_offload)
2384                 goto err_reply;
2385
2386         memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2387         memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2388         memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2389         memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2390         memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2391
2392         cid = BNX2X_HW_CID(cp, cid);
2393         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2394                                   FCOE_CONNECTION_TYPE, &l5_data);
2395         if (!ret)
2396                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2397
2398         return ret;
2399
2400 err_reply:
2401         if (cid != -1)
2402                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2403
2404         memset(&kcqe, 0, sizeof(kcqe));
2405         kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2406         kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2407         kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2408
2409         cqes[0] = (struct kcqe *) &kcqe;
2410         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2411         return ret;
2412 }
2413
2414 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2415 {
2416         struct fcoe_kwqe_conn_enable_disable *req;
2417         struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2418         union l5cm_specific_data l5_data;
2419         int ret;
2420         u32 cid, l5_cid;
2421         struct cnic_local *cp = dev->cnic_priv;
2422
2423         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2424         cid = req->context_id;
2425         l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2426
2427         if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2428                 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2429                 return -ENOMEM;
2430         }
2431         fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2432         if (!fcoe_enable)
2433                 return -ENOMEM;
2434
2435         memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2436         memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2437         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2438                                   FCOE_CONNECTION_TYPE, &l5_data);
2439         return ret;
2440 }
2441
2442 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2443 {
2444         struct fcoe_kwqe_conn_enable_disable *req;
2445         struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2446         union l5cm_specific_data l5_data;
2447         int ret;
2448         u32 cid, l5_cid;
2449         struct cnic_local *cp = dev->cnic_priv;
2450
2451         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2452         cid = req->context_id;
2453         l5_cid = req->conn_id;
2454         if (l5_cid >= dev->max_fcoe_conn)
2455                 return -EINVAL;
2456
2457         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2458
2459         if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2460                 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2461                 return -ENOMEM;
2462         }
2463         fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2464         if (!fcoe_disable)
2465                 return -ENOMEM;
2466
2467         memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2468         memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2469         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2470                                   FCOE_CONNECTION_TYPE, &l5_data);
2471         return ret;
2472 }
2473
2474 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2475 {
2476         struct fcoe_kwqe_conn_destroy *req;
2477         union l5cm_specific_data l5_data;
2478         int ret;
2479         u32 cid, l5_cid;
2480         struct cnic_local *cp = dev->cnic_priv;
2481         struct cnic_context *ctx;
2482         struct fcoe_kcqe kcqe;
2483         struct kcqe *cqes[1];
2484
2485         req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2486         cid = req->context_id;
2487         l5_cid = req->conn_id;
2488         if (l5_cid >= dev->max_fcoe_conn)
2489                 return -EINVAL;
2490
2491         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2492
2493         ctx = &cp->ctx_tbl[l5_cid];
2494
2495         init_waitqueue_head(&ctx->waitq);
2496         ctx->wait_cond = 0;
2497
2498         memset(&kcqe, 0, sizeof(kcqe));
2499         kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2500         memset(&l5_data, 0, sizeof(l5_data));
2501         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2502                                   FCOE_CONNECTION_TYPE, &l5_data);
2503         if (ret == 0) {
2504                 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2505                 if (ctx->wait_cond)
2506                         kcqe.completion_status = 0;
2507         }
2508
2509         set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2510         queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2511
2512         kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2513         kcqe.fcoe_conn_id = req->conn_id;
2514         kcqe.fcoe_conn_context_id = cid;
2515
2516         cqes[0] = (struct kcqe *) &kcqe;
2517         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2518         return ret;
2519 }
2520
2521 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2522 {
2523         struct cnic_local *cp = dev->cnic_priv;
2524         u32 i;
2525
2526         for (i = start_cid; i < cp->max_cid_space; i++) {
2527                 struct cnic_context *ctx = &cp->ctx_tbl[i];
2528                 int j;
2529
2530                 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2531                         msleep(10);
2532
2533                 for (j = 0; j < 5; j++) {
2534                         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2535                                 break;
2536                         msleep(20);
2537                 }
2538
2539                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2540                         netdev_warn(dev->netdev, "CID %x not deleted\n",
2541                                    ctx->cid);
2542         }
2543 }
2544
2545 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2546 {
2547         struct fcoe_kwqe_destroy *req;
2548         union l5cm_specific_data l5_data;
2549         struct cnic_local *cp = dev->cnic_priv;
2550         int ret;
2551         u32 cid;
2552
2553         cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2554
2555         req = (struct fcoe_kwqe_destroy *) kwqe;
2556         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2557
2558         memset(&l5_data, 0, sizeof(l5_data));
2559         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2560                                   FCOE_CONNECTION_TYPE, &l5_data);
2561         return ret;
2562 }
2563
2564 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2565 {
2566         struct cnic_local *cp = dev->cnic_priv;
2567         struct kcqe kcqe;
2568         struct kcqe *cqes[1];
2569         u32 cid;
2570         u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2571         u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2572         u32 kcqe_op;
2573         int ulp_type;
2574
2575         cid = kwqe->kwqe_info0;
2576         memset(&kcqe, 0, sizeof(kcqe));
2577
2578         if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2579                 u32 l5_cid = 0;
2580
2581                 ulp_type = CNIC_ULP_FCOE;
2582                 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2583                         struct fcoe_kwqe_conn_enable_disable *req;
2584
2585                         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2586                         kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2587                         cid = req->context_id;
2588                         l5_cid = req->conn_id;
2589                 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2590                         kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2591                 } else {
2592                         return;
2593                 }
2594                 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2595                 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2596                 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2597                 kcqe.kcqe_info2 = cid;
2598                 kcqe.kcqe_info0 = l5_cid;
2599
2600         } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2601                 ulp_type = CNIC_ULP_ISCSI;
2602                 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2603                         cid = kwqe->kwqe_info1;
2604
2605                 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2606                 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2607                 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
2608                 kcqe.kcqe_info2 = cid;
2609                 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2610
2611         } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2612                 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2613
2614                 ulp_type = CNIC_ULP_L4;
2615                 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2616                         kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2617                 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2618                         kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2619                 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2620                         kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2621                 else
2622                         return;
2623
2624                 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2625                                     KCQE_FLAGS_LAYER_MASK_L4;
2626                 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2627                 l4kcqe->cid = cid;
2628                 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2629         } else {
2630                 return;
2631         }
2632
2633         cqes[0] = &kcqe;
2634         cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2635 }
2636
2637 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2638                                          struct kwqe *wqes[], u32 num_wqes)
2639 {
2640         int i, work, ret;
2641         u32 opcode;
2642         struct kwqe *kwqe;
2643
2644         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2645                 return -EAGAIN;         /* bnx2 is down */
2646
2647         for (i = 0; i < num_wqes; ) {
2648                 kwqe = wqes[i];
2649                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2650                 work = 1;
2651
2652                 switch (opcode) {
2653                 case ISCSI_KWQE_OPCODE_INIT1:
2654                         ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2655                         break;
2656                 case ISCSI_KWQE_OPCODE_INIT2:
2657                         ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2658                         break;
2659                 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2660                         ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2661                                                      num_wqes - i, &work);
2662                         break;
2663                 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2664                         ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2665                         break;
2666                 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2667                         ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2668                         break;
2669                 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2670                         ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2671                                                  &work);
2672                         break;
2673                 case L4_KWQE_OPCODE_VALUE_CLOSE:
2674                         ret = cnic_bnx2x_close(dev, kwqe);
2675                         break;
2676                 case L4_KWQE_OPCODE_VALUE_RESET:
2677                         ret = cnic_bnx2x_reset(dev, kwqe);
2678                         break;
2679                 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2680                         ret = cnic_bnx2x_offload_pg(dev, kwqe);
2681                         break;
2682                 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2683                         ret = cnic_bnx2x_update_pg(dev, kwqe);
2684                         break;
2685                 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2686                         ret = 0;
2687                         break;
2688                 default:
2689                         ret = 0;
2690                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2691                                    opcode);
2692                         break;
2693                 }
2694                 if (ret < 0) {
2695                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2696                                    opcode);
2697
2698                         /* Possibly bnx2x parity error, send completion
2699                          * to ulp drivers with error code to speed up
2700                          * cleanup and reset recovery.
2701                          */
2702                         if (ret == -EIO || ret == -EAGAIN)
2703                                 cnic_bnx2x_kwqe_err(dev, kwqe);
2704                 }
2705                 i += work;
2706         }
2707         return 0;
2708 }
2709
2710 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2711                                         struct kwqe *wqes[], u32 num_wqes)
2712 {
2713         struct cnic_local *cp = dev->cnic_priv;
2714         int i, work, ret;
2715         u32 opcode;
2716         struct kwqe *kwqe;
2717
2718         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2719                 return -EAGAIN;         /* bnx2 is down */
2720
2721         if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
2722                 return -EINVAL;
2723
2724         for (i = 0; i < num_wqes; ) {
2725                 kwqe = wqes[i];
2726                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2727                 work = 1;
2728
2729                 switch (opcode) {
2730                 case FCOE_KWQE_OPCODE_INIT1:
2731                         ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2732                                                     num_wqes - i, &work);
2733                         break;
2734                 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2735                         ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2736                                                     num_wqes - i, &work);
2737                         break;
2738                 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2739                         ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2740                         break;
2741                 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2742                         ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2743                         break;
2744                 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2745                         ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2746                         break;
2747                 case FCOE_KWQE_OPCODE_DESTROY:
2748                         ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2749                         break;
2750                 case FCOE_KWQE_OPCODE_STAT:
2751                         ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2752                         break;
2753                 default:
2754                         ret = 0;
2755                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2756                                    opcode);
2757                         break;
2758                 }
2759                 if (ret < 0) {
2760                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2761                                    opcode);
2762
2763                         /* Possibly bnx2x parity error, send completion
2764                          * to ulp drivers with error code to speed up
2765                          * cleanup and reset recovery.
2766                          */
2767                         if (ret == -EIO || ret == -EAGAIN)
2768                                 cnic_bnx2x_kwqe_err(dev, kwqe);
2769                 }
2770                 i += work;
2771         }
2772         return 0;
2773 }
2774
2775 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2776                                    u32 num_wqes)
2777 {
2778         int ret = -EINVAL;
2779         u32 layer_code;
2780
2781         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2782                 return -EAGAIN;         /* bnx2x is down */
2783
2784         if (!num_wqes)
2785                 return 0;
2786
2787         layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2788         switch (layer_code) {
2789         case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2790         case KWQE_FLAGS_LAYER_MASK_L4:
2791         case KWQE_FLAGS_LAYER_MASK_L2:
2792                 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2793                 break;
2794
2795         case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2796                 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2797                 break;
2798         }
2799         return ret;
2800 }
2801
2802 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2803 {
2804         if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2805                 return KCQE_FLAGS_LAYER_MASK_L4;
2806
2807         return opflag & KCQE_FLAGS_LAYER_MASK;
2808 }
2809
2810 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2811 {
2812         struct cnic_local *cp = dev->cnic_priv;
2813         int i, j, comp = 0;
2814
2815         i = 0;
2816         j = 1;
2817         while (num_cqes) {
2818                 struct cnic_ulp_ops *ulp_ops;
2819                 int ulp_type;
2820                 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2821                 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2822
2823                 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2824                         comp++;
2825
2826                 while (j < num_cqes) {
2827                         u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2828
2829                         if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2830                                 break;
2831
2832                         if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2833                                 comp++;
2834                         j++;
2835                 }
2836
2837                 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2838                         ulp_type = CNIC_ULP_RDMA;
2839                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2840                         ulp_type = CNIC_ULP_ISCSI;
2841                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2842                         ulp_type = CNIC_ULP_FCOE;
2843                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2844                         ulp_type = CNIC_ULP_L4;
2845                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2846                         goto end;
2847                 else {
2848                         netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2849                                    kcqe_op_flag);
2850                         goto end;
2851                 }
2852
2853                 rcu_read_lock();
2854                 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2855                 if (likely(ulp_ops)) {
2856                         ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2857                                                   cp->completed_kcq + i, j);
2858                 }
2859                 rcu_read_unlock();
2860 end:
2861                 num_cqes -= j;
2862                 i += j;
2863                 j = 1;
2864         }
2865         if (unlikely(comp))
2866                 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2867 }
2868
2869 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2870 {
2871         struct cnic_local *cp = dev->cnic_priv;
2872         u16 i, ri, hw_prod, last;
2873         struct kcqe *kcqe;
2874         int kcqe_cnt = 0, last_cnt = 0;
2875
2876         i = ri = last = info->sw_prod_idx;
2877         ri &= MAX_KCQ_IDX;
2878         hw_prod = *info->hw_prod_idx_ptr;
2879         hw_prod = info->hw_idx(hw_prod);
2880
2881         while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2882                 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2883                 cp->completed_kcq[kcqe_cnt++] = kcqe;
2884                 i = info->next_idx(i);
2885                 ri = i & MAX_KCQ_IDX;
2886                 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2887                         last_cnt = kcqe_cnt;
2888                         last = i;
2889                 }
2890         }
2891
2892         info->sw_prod_idx = last;
2893         return last_cnt;
2894 }
2895
2896 static int cnic_l2_completion(struct cnic_local *cp)
2897 {
2898         u16 hw_cons, sw_cons;
2899         struct cnic_uio_dev *udev = cp->udev;
2900         union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2901                                         (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2902         u32 cmd;
2903         int comp = 0;
2904
2905         if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2906                 return 0;
2907
2908         hw_cons = *cp->rx_cons_ptr;
2909         if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2910                 hw_cons++;
2911
2912         sw_cons = cp->rx_cons;
2913         while (sw_cons != hw_cons) {
2914                 u8 cqe_fp_flags;
2915
2916                 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2917                 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2918                 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2919                         cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2920                         cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2921                         if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2922                             cmd == RAMROD_CMD_ID_ETH_HALT)
2923                                 comp++;
2924                 }
2925                 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2926         }
2927         return comp;
2928 }
2929
2930 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2931 {
2932         u16 rx_cons, tx_cons;
2933         int comp = 0;
2934
2935         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2936                 return;
2937
2938         rx_cons = *cp->rx_cons_ptr;
2939         tx_cons = *cp->tx_cons_ptr;
2940         if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2941                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2942                         comp = cnic_l2_completion(cp);
2943
2944                 cp->tx_cons = tx_cons;
2945                 cp->rx_cons = rx_cons;
2946
2947                 if (cp->udev)
2948                         uio_event_notify(&cp->udev->cnic_uinfo);
2949         }
2950         if (comp)
2951                 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2952 }
2953
2954 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2955 {
2956         struct cnic_local *cp = dev->cnic_priv;
2957         u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2958         int kcqe_cnt;
2959
2960         /* status block index must be read before reading other fields */
2961         rmb();
2962         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2963
2964         while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2965
2966                 service_kcqes(dev, kcqe_cnt);
2967
2968                 /* Tell compiler that status_blk fields can change. */
2969                 barrier();
2970                 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2971                 /* status block index must be read first */
2972                 rmb();
2973                 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2974         }
2975
2976         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2977
2978         cnic_chk_pkt_rings(cp);
2979
2980         return status_idx;
2981 }
2982
2983 static int cnic_service_bnx2(void *data, void *status_blk)
2984 {
2985         struct cnic_dev *dev = data;
2986
2987         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2988                 struct status_block *sblk = status_blk;
2989
2990                 return sblk->status_idx;
2991         }
2992
2993         return cnic_service_bnx2_queues(dev);
2994 }
2995
2996 static void cnic_service_bnx2_msix(unsigned long data)
2997 {
2998         struct cnic_dev *dev = (struct cnic_dev *) data;
2999         struct cnic_local *cp = dev->cnic_priv;
3000
3001         cp->last_status_idx = cnic_service_bnx2_queues(dev);
3002
3003         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3004                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3005 }
3006
3007 static void cnic_doirq(struct cnic_dev *dev)
3008 {
3009         struct cnic_local *cp = dev->cnic_priv;
3010
3011         if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
3012                 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
3013
3014                 prefetch(cp->status_blk.gen);
3015                 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
3016
3017                 tasklet_schedule(&cp->cnic_irq_task);
3018         }
3019 }
3020
3021 static irqreturn_t cnic_irq(int irq, void *dev_instance)
3022 {
3023         struct cnic_dev *dev = dev_instance;
3024         struct cnic_local *cp = dev->cnic_priv;
3025
3026         if (cp->ack_int)
3027                 cp->ack_int(dev);
3028
3029         cnic_doirq(dev);
3030
3031         return IRQ_HANDLED;
3032 }
3033
3034 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
3035                                       u16 index, u8 op, u8 update)
3036 {
3037         struct cnic_local *cp = dev->cnic_priv;
3038         u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
3039                        COMMAND_REG_INT_ACK);
3040         struct igu_ack_register igu_ack;
3041
3042         igu_ack.status_block_index = index;
3043         igu_ack.sb_id_and_flags =
3044                         ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3045                          (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3046                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3047                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3048
3049         CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3050 }
3051
3052 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3053                             u16 index, u8 op, u8 update)
3054 {
3055         struct igu_regular cmd_data;
3056         u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3057
3058         cmd_data.sb_id_and_flags =
3059                 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3060                 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3061                 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3062                 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3063
3064
3065         CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3066 }
3067
3068 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3069 {
3070         struct cnic_local *cp = dev->cnic_priv;
3071
3072         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3073                            IGU_INT_DISABLE, 0);
3074 }
3075
3076 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3077 {
3078         struct cnic_local *cp = dev->cnic_priv;
3079
3080         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3081                         IGU_INT_DISABLE, 0);
3082 }
3083
3084 static void cnic_arm_bnx2x_msix(struct cnic_dev *dev, u32 idx)
3085 {
3086         struct cnic_local *cp = dev->cnic_priv;
3087
3088         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, idx,
3089                            IGU_INT_ENABLE, 1);
3090 }
3091
3092 static void cnic_arm_bnx2x_e2_msix(struct cnic_dev *dev, u32 idx)
3093 {
3094         struct cnic_local *cp = dev->cnic_priv;
3095
3096         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, idx,
3097                         IGU_INT_ENABLE, 1);
3098 }
3099
3100 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3101 {
3102         u32 last_status = *info->status_idx_ptr;
3103         int kcqe_cnt;
3104
3105         /* status block index must be read before reading the KCQ */
3106         rmb();
3107         while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3108
3109                 service_kcqes(dev, kcqe_cnt);
3110
3111                 /* Tell compiler that sblk fields can change. */
3112                 barrier();
3113
3114                 last_status = *info->status_idx_ptr;
3115                 /* status block index must be read before reading the KCQ */
3116                 rmb();
3117         }
3118         return last_status;
3119 }
3120
3121 static void cnic_service_bnx2x_bh(unsigned long data)
3122 {
3123         struct cnic_dev *dev = (struct cnic_dev *) data;
3124         struct cnic_local *cp = dev->cnic_priv;
3125         u32 status_idx, new_status_idx;
3126
3127         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3128                 return;
3129
3130         while (1) {
3131                 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3132
3133                 CNIC_WR16(dev, cp->kcq1.io_addr,
3134                           cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3135
3136                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE) {
3137                         cp->arm_int(dev, status_idx);
3138                         break;
3139                 }
3140
3141                 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3142
3143                 if (new_status_idx != status_idx)
3144                         continue;
3145
3146                 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3147                           MAX_KCQ_IDX);
3148
3149                 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3150                                 status_idx, IGU_INT_ENABLE, 1);
3151
3152                 break;
3153         }
3154 }
3155
3156 static int cnic_service_bnx2x(void *data, void *status_blk)
3157 {
3158         struct cnic_dev *dev = data;
3159         struct cnic_local *cp = dev->cnic_priv;
3160
3161         if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3162                 cnic_doirq(dev);
3163
3164         cnic_chk_pkt_rings(cp);
3165
3166         return 0;
3167 }
3168
3169 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3170 {
3171         struct cnic_ulp_ops *ulp_ops;
3172
3173         if (if_type == CNIC_ULP_ISCSI)
3174                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3175
3176         mutex_lock(&cnic_lock);
3177         ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3178                                             lockdep_is_held(&cnic_lock));
3179         if (!ulp_ops) {
3180                 mutex_unlock(&cnic_lock);
3181                 return;
3182         }
3183         set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3184         mutex_unlock(&cnic_lock);
3185
3186         if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3187                 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3188
3189         clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3190 }
3191
3192 static void cnic_ulp_stop(struct cnic_dev *dev)
3193 {
3194         struct cnic_local *cp = dev->cnic_priv;
3195         int if_type;
3196
3197         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3198                 cnic_ulp_stop_one(cp, if_type);
3199 }
3200
3201 static void cnic_ulp_start(struct cnic_dev *dev)
3202 {
3203         struct cnic_local *cp = dev->cnic_priv;
3204         int if_type;
3205
3206         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3207                 struct cnic_ulp_ops *ulp_ops;
3208
3209                 mutex_lock(&cnic_lock);
3210                 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3211                                                     lockdep_is_held(&cnic_lock));
3212                 if (!ulp_ops || !ulp_ops->cnic_start) {
3213                         mutex_unlock(&cnic_lock);
3214                         continue;
3215                 }
3216                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3217                 mutex_unlock(&cnic_lock);
3218
3219                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3220                         ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3221
3222                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3223         }
3224 }
3225
3226 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3227 {
3228         struct cnic_local *cp = dev->cnic_priv;
3229         struct cnic_ulp_ops *ulp_ops;
3230         int rc;
3231
3232         mutex_lock(&cnic_lock);
3233         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3234         if (ulp_ops && ulp_ops->cnic_get_stats)
3235                 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3236         else
3237                 rc = -ENODEV;
3238         mutex_unlock(&cnic_lock);
3239         return rc;
3240 }
3241
3242 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3243 {
3244         struct cnic_dev *dev = data;
3245         int ulp_type = CNIC_ULP_ISCSI;
3246
3247         switch (info->cmd) {
3248         case CNIC_CTL_STOP_CMD:
3249                 cnic_hold(dev);
3250
3251                 cnic_ulp_stop(dev);
3252                 cnic_stop_hw(dev);
3253
3254                 cnic_put(dev);
3255                 break;
3256         case CNIC_CTL_START_CMD:
3257                 cnic_hold(dev);
3258
3259                 if (!cnic_start_hw(dev))
3260                         cnic_ulp_start(dev);
3261
3262                 cnic_put(dev);
3263                 break;
3264         case CNIC_CTL_STOP_ISCSI_CMD: {
3265                 struct cnic_local *cp = dev->cnic_priv;
3266                 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3267                 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3268                 break;
3269         }
3270         case CNIC_CTL_COMPLETION_CMD: {
3271                 struct cnic_ctl_completion *comp = &info->data.comp;
3272                 u32 cid = BNX2X_SW_CID(comp->cid);
3273                 u32 l5_cid;
3274                 struct cnic_local *cp = dev->cnic_priv;
3275
3276                 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
3277                         break;
3278
3279                 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3280                         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3281
3282                         if (unlikely(comp->error)) {
3283                                 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3284                                 netdev_err(dev->netdev,
3285                                            "CID %x CFC delete comp error %x\n",
3286                                            cid, comp->error);
3287                         }
3288
3289                         ctx->wait_cond = 1;
3290                         wake_up(&ctx->waitq);
3291                 }
3292                 break;
3293         }
3294         case CNIC_CTL_FCOE_STATS_GET_CMD:
3295                 ulp_type = CNIC_ULP_FCOE;
3296                 /* fall through */
3297         case CNIC_CTL_ISCSI_STATS_GET_CMD:
3298                 cnic_hold(dev);
3299                 cnic_copy_ulp_stats(dev, ulp_type);
3300                 cnic_put(dev);
3301                 break;
3302
3303         default:
3304                 return -EINVAL;
3305         }
3306         return 0;
3307 }
3308
3309 static void cnic_ulp_init(struct cnic_dev *dev)
3310 {
3311         int i;
3312         struct cnic_local *cp = dev->cnic_priv;
3313
3314         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3315                 struct cnic_ulp_ops *ulp_ops;
3316
3317                 mutex_lock(&cnic_lock);
3318                 ulp_ops = cnic_ulp_tbl_prot(i);
3319                 if (!ulp_ops || !ulp_ops->cnic_init) {
3320                         mutex_unlock(&cnic_lock);
3321                         continue;
3322                 }
3323                 ulp_get(ulp_ops);
3324                 mutex_unlock(&cnic_lock);
3325
3326                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3327                         ulp_ops->cnic_init(dev);
3328
3329                 ulp_put(ulp_ops);
3330         }
3331 }
3332
3333 static void cnic_ulp_exit(struct cnic_dev *dev)
3334 {
3335         int i;
3336         struct cnic_local *cp = dev->cnic_priv;
3337
3338         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3339                 struct cnic_ulp_ops *ulp_ops;
3340
3341                 mutex_lock(&cnic_lock);
3342                 ulp_ops = cnic_ulp_tbl_prot(i);
3343                 if (!ulp_ops || !ulp_ops->cnic_exit) {
3344                         mutex_unlock(&cnic_lock);
3345                         continue;
3346                 }
3347                 ulp_get(ulp_ops);
3348                 mutex_unlock(&cnic_lock);
3349
3350                 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3351                         ulp_ops->cnic_exit(dev);
3352
3353                 ulp_put(ulp_ops);
3354         }
3355 }
3356
3357 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3358 {
3359         struct cnic_dev *dev = csk->dev;
3360         struct l4_kwq_offload_pg *l4kwqe;
3361         struct kwqe *wqes[1];
3362
3363         l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3364         memset(l4kwqe, 0, sizeof(*l4kwqe));
3365         wqes[0] = (struct kwqe *) l4kwqe;
3366
3367         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3368         l4kwqe->flags =
3369                 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3370         l4kwqe->l2hdr_nbytes = ETH_HLEN;
3371
3372         l4kwqe->da0 = csk->ha[0];
3373         l4kwqe->da1 = csk->ha[1];
3374         l4kwqe->da2 = csk->ha[2];
3375         l4kwqe->da3 = csk->ha[3];
3376         l4kwqe->da4 = csk->ha[4];
3377         l4kwqe->da5 = csk->ha[5];
3378
3379         l4kwqe->sa0 = dev->mac_addr[0];
3380         l4kwqe->sa1 = dev->mac_addr[1];
3381         l4kwqe->sa2 = dev->mac_addr[2];
3382         l4kwqe->sa3 = dev->mac_addr[3];
3383         l4kwqe->sa4 = dev->mac_addr[4];
3384         l4kwqe->sa5 = dev->mac_addr[5];
3385
3386         l4kwqe->etype = ETH_P_IP;
3387         l4kwqe->ipid_start = DEF_IPID_START;
3388         l4kwqe->host_opaque = csk->l5_cid;
3389
3390         if (csk->vlan_id) {
3391                 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3392                 l4kwqe->vlan_tag = csk->vlan_id;
3393                 l4kwqe->l2hdr_nbytes += 4;
3394         }
3395
3396         return dev->submit_kwqes(dev, wqes, 1);
3397 }
3398
3399 static int cnic_cm_update_pg(struct cnic_sock *csk)
3400 {
3401         struct cnic_dev *dev = csk->dev;
3402         struct l4_kwq_update_pg *l4kwqe;
3403         struct kwqe *wqes[1];
3404
3405         l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3406         memset(l4kwqe, 0, sizeof(*l4kwqe));
3407         wqes[0] = (struct kwqe *) l4kwqe;
3408
3409         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3410         l4kwqe->flags =
3411                 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3412         l4kwqe->pg_cid = csk->pg_cid;
3413
3414         l4kwqe->da0 = csk->ha[0];
3415         l4kwqe->da1 = csk->ha[1];
3416         l4kwqe->da2 = csk->ha[2];
3417         l4kwqe->da3 = csk->ha[3];
3418         l4kwqe->da4 = csk->ha[4];
3419         l4kwqe->da5 = csk->ha[5];
3420
3421         l4kwqe->pg_host_opaque = csk->l5_cid;
3422         l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3423
3424         return dev->submit_kwqes(dev, wqes, 1);
3425 }
3426
3427 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3428 {
3429         struct cnic_dev *dev = csk->dev;
3430         struct l4_kwq_upload *l4kwqe;
3431         struct kwqe *wqes[1];
3432
3433         l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3434         memset(l4kwqe, 0, sizeof(*l4kwqe));
3435         wqes[0] = (struct kwqe *) l4kwqe;
3436
3437         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3438         l4kwqe->flags =
3439                 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3440         l4kwqe->cid = csk->pg_cid;
3441
3442         return dev->submit_kwqes(dev, wqes, 1);
3443 }
3444
3445 static int cnic_cm_conn_req(struct cnic_sock *csk)
3446 {
3447         struct cnic_dev *dev = csk->dev;
3448         struct l4_kwq_connect_req1 *l4kwqe1;
3449         struct l4_kwq_connect_req2 *l4kwqe2;
3450         struct l4_kwq_connect_req3 *l4kwqe3;
3451         struct kwqe *wqes[3];
3452         u8 tcp_flags = 0;
3453         int num_wqes = 2;
3454
3455         l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3456         l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3457         l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3458         memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3459         memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3460         memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3461
3462         l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3463         l4kwqe3->flags =
3464                 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3465         l4kwqe3->ka_timeout = csk->ka_timeout;
3466         l4kwqe3->ka_interval = csk->ka_interval;
3467         l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3468         l4kwqe3->tos = csk->tos;
3469         l4kwqe3->ttl = csk->ttl;
3470         l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3471         l4kwqe3->pmtu = csk->mtu;
3472         l4kwqe3->rcv_buf = csk->rcv_buf;
3473         l4kwqe3->snd_buf = csk->snd_buf;
3474         l4kwqe3->seed = csk->seed;
3475
3476         wqes[0] = (struct kwqe *) l4kwqe1;
3477         if (test_bit(SK_F_IPV6, &csk->flags)) {
3478                 wqes[1] = (struct kwqe *) l4kwqe2;
3479                 wqes[2] = (struct kwqe *) l4kwqe3;
3480                 num_wqes = 3;
3481
3482                 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3483                 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3484                 l4kwqe2->flags =
3485                         L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3486                         L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3487                 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3488                 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3489                 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3490                 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3491                 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3492                 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3493                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3494                                sizeof(struct tcphdr);
3495         } else {
3496                 wqes[1] = (struct kwqe *) l4kwqe3;
3497                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3498                                sizeof(struct tcphdr);
3499         }
3500
3501         l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3502         l4kwqe1->flags =
3503                 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3504                  L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3505         l4kwqe1->cid = csk->cid;
3506         l4kwqe1->pg_cid = csk->pg_cid;
3507         l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3508         l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3509         l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3510         l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3511         if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3512                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3513         if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3514                 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3515         if (csk->tcp_flags & SK_TCP_NAGLE)
3516                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3517         if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3518                 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3519         if (csk->tcp_flags & SK_TCP_SACK)
3520                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3521         if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3522                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3523
3524         l4kwqe1->tcp_flags = tcp_flags;
3525
3526         return dev->submit_kwqes(dev, wqes, num_wqes);
3527 }
3528
3529 static int cnic_cm_close_req(struct cnic_sock *csk)
3530 {
3531         struct cnic_dev *dev = csk->dev;
3532         struct l4_kwq_close_req *l4kwqe;
3533         struct kwqe *wqes[1];
3534
3535         l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3536         memset(l4kwqe, 0, sizeof(*l4kwqe));
3537         wqes[0] = (struct kwqe *) l4kwqe;
3538
3539         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3540         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3541         l4kwqe->cid = csk->cid;
3542
3543         return dev->submit_kwqes(dev, wqes, 1);
3544 }
3545
3546 static int cnic_cm_abort_req(struct cnic_sock *csk)
3547 {
3548         struct cnic_dev *dev = csk->dev;
3549         struct l4_kwq_reset_req *l4kwqe;
3550         struct kwqe *wqes[1];
3551
3552         l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3553         memset(l4kwqe, 0, sizeof(*l4kwqe));
3554         wqes[0] = (struct kwqe *) l4kwqe;
3555
3556         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3557         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3558         l4kwqe->cid = csk->cid;
3559
3560         return dev->submit_kwqes(dev, wqes, 1);
3561 }
3562
3563 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3564                           u32 l5_cid, struct cnic_sock **csk, void *context)
3565 {
3566         struct cnic_local *cp = dev->cnic_priv;
3567         struct cnic_sock *csk1;
3568
3569         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3570                 return -EINVAL;
3571
3572         if (cp->ctx_tbl) {
3573                 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3574
3575                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3576                         return -EAGAIN;
3577         }
3578
3579         csk1 = &cp->csk_tbl[l5_cid];
3580         if (atomic_read(&csk1->ref_count))
3581                 return -EAGAIN;
3582
3583         if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3584                 return -EBUSY;
3585
3586         csk1->dev = dev;
3587         csk1->cid = cid;
3588         csk1->l5_cid = l5_cid;
3589         csk1->ulp_type = ulp_type;
3590         csk1->context = context;
3591
3592         csk1->ka_timeout = DEF_KA_TIMEOUT;
3593         csk1->ka_interval = DEF_KA_INTERVAL;
3594         csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3595         csk1->tos = DEF_TOS;
3596         csk1->ttl = DEF_TTL;
3597         csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3598         csk1->rcv_buf = DEF_RCV_BUF;
3599         csk1->snd_buf = DEF_SND_BUF;
3600         csk1->seed = DEF_SEED;
3601
3602         *csk = csk1;
3603         return 0;
3604 }
3605
3606 static void cnic_cm_cleanup(struct cnic_sock *csk)
3607 {
3608         if (csk->src_port) {
3609                 struct cnic_dev *dev = csk->dev;
3610                 struct cnic_local *cp = dev->cnic_priv;
3611
3612                 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3613                 csk->src_port = 0;
3614         }
3615 }
3616
3617 static void cnic_close_conn(struct cnic_sock *csk)
3618 {
3619         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3620                 cnic_cm_upload_pg(csk);
3621                 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3622         }
3623         cnic_cm_cleanup(csk);
3624 }
3625
3626 static int cnic_cm_destroy(struct cnic_sock *csk)
3627 {
3628         if (!cnic_in_use(csk))
3629                 return -EINVAL;
3630
3631         csk_hold(csk);
3632         clear_bit(SK_F_INUSE, &csk->flags);
3633         smp_mb__after_clear_bit();
3634         while (atomic_read(&csk->ref_count) != 1)
3635                 msleep(1);
3636         cnic_cm_cleanup(csk);
3637
3638         csk->flags = 0;
3639         csk_put(csk);
3640         return 0;
3641 }
3642
3643 static inline u16 cnic_get_vlan(struct net_device *dev,
3644                                 struct net_device **vlan_dev)
3645 {
3646         if (dev->priv_flags & IFF_802_1Q_VLAN) {
3647                 *vlan_dev = vlan_dev_real_dev(dev);
3648                 return vlan_dev_vlan_id(dev);
3649         }
3650         *vlan_dev = dev;
3651         return 0;
3652 }
3653
3654 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3655                              struct dst_entry **dst)
3656 {
3657 #if defined(CONFIG_INET)
3658         struct rtable *rt;
3659
3660         rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3661         if (!IS_ERR(rt)) {
3662                 *dst = &rt->dst;
3663                 return 0;
3664         }
3665         return PTR_ERR(rt);
3666 #else
3667         return -ENETUNREACH;
3668 #endif
3669 }
3670
3671 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3672                              struct dst_entry **dst)
3673 {
3674 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3675         struct flowi6 fl6;
3676
3677         memset(&fl6, 0, sizeof(fl6));
3678         fl6.daddr = dst_addr->sin6_addr;
3679         if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3680                 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3681
3682         *dst = ip6_route_output(&init_net, NULL, &fl6);
3683         if ((*dst)->error) {
3684                 dst_release(*dst);
3685                 *dst = NULL;
3686                 return -ENETUNREACH;
3687         } else
3688                 return 0;
3689 #endif
3690
3691         return -ENETUNREACH;
3692 }
3693
3694 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3695                                            int ulp_type)
3696 {
3697         struct cnic_dev *dev = NULL;
3698         struct dst_entry *dst;
3699         struct net_device *netdev = NULL;
3700         int err = -ENETUNREACH;
3701
3702         if (dst_addr->sin_family == AF_INET)
3703                 err = cnic_get_v4_route(dst_addr, &dst);
3704         else if (dst_addr->sin_family == AF_INET6) {
3705                 struct sockaddr_in6 *dst_addr6 =
3706                         (struct sockaddr_in6 *) dst_addr;
3707
3708                 err = cnic_get_v6_route(dst_addr6, &dst);
3709         } else
3710                 return NULL;
3711
3712         if (err)
3713                 return NULL;
3714
3715         if (!dst->dev)
3716                 goto done;
3717
3718         cnic_get_vlan(dst->dev, &netdev);
3719
3720         dev = cnic_from_netdev(netdev);
3721
3722 done:
3723         dst_release(dst);
3724         if (dev)
3725                 cnic_put(dev);
3726         return dev;
3727 }
3728
3729 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3730 {
3731         struct cnic_dev *dev = csk->dev;
3732         struct cnic_local *cp = dev->cnic_priv;
3733
3734         return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3735 }
3736
3737 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3738 {
3739         struct cnic_dev *dev = csk->dev;
3740         struct cnic_local *cp = dev->cnic_priv;
3741         int is_v6, rc = 0;
3742         struct dst_entry *dst = NULL;
3743         struct net_device *realdev;
3744         __be16 local_port;
3745         u32 port_id;
3746
3747         if (saddr->local.v6.sin6_family == AF_INET6 &&
3748             saddr->remote.v6.sin6_family == AF_INET6)
3749                 is_v6 = 1;
3750         else if (saddr->local.v4.sin_family == AF_INET &&
3751                  saddr->remote.v4.sin_family == AF_INET)
3752                 is_v6 = 0;
3753         else
3754                 return -EINVAL;
3755
3756         clear_bit(SK_F_IPV6, &csk->flags);
3757
3758         if (is_v6) {
3759                 set_bit(SK_F_IPV6, &csk->flags);
3760                 cnic_get_v6_route(&saddr->remote.v6, &dst);
3761
3762                 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3763                        sizeof(struct in6_addr));
3764                 csk->dst_port = saddr->remote.v6.sin6_port;
3765                 local_port = saddr->local.v6.sin6_port;
3766
3767         } else {
3768                 cnic_get_v4_route(&saddr->remote.v4, &dst);
3769
3770                 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3771                 csk->dst_port = saddr->remote.v4.sin_port;
3772                 local_port = saddr->local.v4.sin_port;
3773         }
3774
3775         csk->vlan_id = 0;
3776         csk->mtu = dev->netdev->mtu;
3777         if (dst && dst->dev) {
3778                 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3779                 if (realdev == dev->netdev) {
3780                         csk->vlan_id = vlan;
3781                         csk->mtu = dst_mtu(dst);
3782                 }
3783         }
3784
3785         port_id = be16_to_cpu(local_port);
3786         if (port_id >= CNIC_LOCAL_PORT_MIN &&
3787             port_id < CNIC_LOCAL_PORT_MAX) {
3788                 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3789                         port_id = 0;
3790         } else
3791                 port_id = 0;
3792
3793         if (!port_id) {
3794                 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3795                 if (port_id == -1) {
3796                         rc = -ENOMEM;
3797                         goto err_out;
3798                 }
3799                 local_port = cpu_to_be16(port_id);
3800         }
3801         csk->src_port = local_port;
3802
3803 err_out:
3804         dst_release(dst);
3805         return rc;
3806 }
3807
3808 static void cnic_init_csk_state(struct cnic_sock *csk)
3809 {
3810         csk->state = 0;
3811         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3812         clear_bit(SK_F_CLOSING, &csk->flags);
3813 }
3814
3815 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3816 {
3817         struct cnic_local *cp = csk->dev->cnic_priv;
3818         int err = 0;
3819
3820         if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3821                 return -EOPNOTSUPP;
3822
3823         if (!cnic_in_use(csk))
3824                 return -EINVAL;
3825
3826         if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3827                 return -EINVAL;
3828
3829         cnic_init_csk_state(csk);
3830
3831         err = cnic_get_route(csk, saddr);
3832         if (err)
3833                 goto err_out;
3834
3835         err = cnic_resolve_addr(csk, saddr);
3836         if (!err)
3837                 return 0;
3838
3839 err_out:
3840         clear_bit(SK_F_CONNECT_START, &csk->flags);
3841         return err;
3842 }
3843
3844 static int cnic_cm_abort(struct cnic_sock *csk)
3845 {
3846         struct cnic_local *cp = csk->dev->cnic_priv;
3847         u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3848
3849         if (!cnic_in_use(csk))
3850                 return -EINVAL;
3851
3852         if (cnic_abort_prep(csk))
3853                 return cnic_cm_abort_req(csk);
3854
3855         /* Getting here means that we haven't started connect, or
3856          * connect was not successful.
3857          */
3858
3859         cp->close_conn(csk, opcode);
3860         if (csk->state != opcode)
3861                 return -EALREADY;
3862
3863         return 0;
3864 }
3865
3866 static int cnic_cm_close(struct cnic_sock *csk)
3867 {
3868         if (!cnic_in_use(csk))
3869                 return -EINVAL;
3870
3871         if (cnic_close_prep(csk)) {
3872                 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3873                 return cnic_cm_close_req(csk);
3874         } else {
3875                 return -EALREADY;
3876         }
3877         return 0;
3878 }
3879
3880 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3881                            u8 opcode)
3882 {
3883         struct cnic_ulp_ops *ulp_ops;
3884         int ulp_type = csk->ulp_type;
3885
3886         rcu_read_lock();
3887         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3888         if (ulp_ops) {
3889                 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3890                         ulp_ops->cm_connect_complete(csk);
3891                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3892                         ulp_ops->cm_close_complete(csk);
3893                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3894                         ulp_ops->cm_remote_abort(csk);
3895                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3896                         ulp_ops->cm_abort_complete(csk);
3897                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3898                         ulp_ops->cm_remote_close(csk);
3899         }
3900         rcu_read_unlock();
3901 }
3902
3903 static int cnic_cm_set_pg(struct cnic_sock *csk)
3904 {
3905         if (cnic_offld_prep(csk)) {
3906                 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3907                         cnic_cm_update_pg(csk);
3908                 else
3909                         cnic_cm_offload_pg(csk);
3910         }
3911         return 0;
3912 }
3913
3914 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3915 {
3916         struct cnic_local *cp = dev->cnic_priv;
3917         u32 l5_cid = kcqe->pg_host_opaque;
3918         u8 opcode = kcqe->op_code;
3919         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3920
3921         csk_hold(csk);
3922         if (!cnic_in_use(csk))
3923                 goto done;
3924
3925         if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3926                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3927                 goto done;
3928         }
3929         /* Possible PG kcqe status:  SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3930         if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3931                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3932                 cnic_cm_upcall(cp, csk,
3933                                L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3934                 goto done;
3935         }
3936
3937         csk->pg_cid = kcqe->pg_cid;
3938         set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3939         cnic_cm_conn_req(csk);
3940
3941 done:
3942         csk_put(csk);
3943 }
3944
3945 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3946 {
3947         struct cnic_local *cp = dev->cnic_priv;
3948         struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3949         u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3950         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3951
3952         ctx->timestamp = jiffies;
3953         ctx->wait_cond = 1;
3954         wake_up(&ctx->waitq);
3955 }
3956
3957 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3958 {
3959         struct cnic_local *cp = dev->cnic_priv;
3960         struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3961         u8 opcode = l4kcqe->op_code;
3962         u32 l5_cid;
3963         struct cnic_sock *csk;
3964
3965         if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3966                 cnic_process_fcoe_term_conn(dev, kcqe);
3967                 return;
3968         }
3969         if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3970             opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3971                 cnic_cm_process_offld_pg(dev, l4kcqe);
3972                 return;
3973         }
3974
3975         l5_cid = l4kcqe->conn_id;
3976         if (opcode & 0x80)
3977                 l5_cid = l4kcqe->cid;
3978         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3979                 return;
3980
3981         csk = &cp->csk_tbl[l5_cid];
3982         csk_hold(csk);
3983
3984         if (!cnic_in_use(csk)) {
3985                 csk_put(csk);
3986                 return;
3987         }
3988
3989         switch (opcode) {
3990         case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3991                 if (l4kcqe->status != 0) {
3992                         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3993                         cnic_cm_upcall(cp, csk,
3994                                        L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3995                 }
3996                 break;
3997         case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3998                 if (l4kcqe->status == 0)
3999                         set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
4000                 else if (l4kcqe->status ==
4001                          L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4002                         set_bit(SK_F_HW_ERR, &csk->flags);
4003
4004                 smp_mb__before_clear_bit();
4005                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4006                 cnic_cm_upcall(cp, csk, opcode);
4007                 break;
4008
4009         case L5CM_RAMROD_CMD_ID_CLOSE:
4010                 if (l4kcqe->status != 0) {
4011                         netdev_warn(dev->netdev, "RAMROD CLOSE compl with "
4012                                     "status 0x%x\n", l4kcqe->status);
4013                         opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4014                         /* Fall through */
4015                 } else {
4016                         break;
4017                 }
4018         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4019         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4020         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4021         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4022         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4023                 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4024                         set_bit(SK_F_HW_ERR, &csk->flags);
4025
4026                 cp->close_conn(csk, opcode);
4027                 break;
4028
4029         case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
4030                 /* after we already sent CLOSE_REQ */
4031                 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
4032                     !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
4033                     csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
4034                         cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
4035                 else
4036                         cnic_cm_upcall(cp, csk, opcode);
4037                 break;
4038         }
4039         csk_put(csk);
4040 }
4041
4042 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
4043 {
4044         struct cnic_dev *dev = data;
4045         int i;
4046
4047         for (i = 0; i < num; i++)
4048                 cnic_cm_process_kcqe(dev, kcqe[i]);
4049 }
4050
4051 static struct cnic_ulp_ops cm_ulp_ops = {
4052         .indicate_kcqes         = cnic_cm_indicate_kcqe,
4053 };
4054
4055 static void cnic_cm_free_mem(struct cnic_dev *dev)
4056 {
4057         struct cnic_local *cp = dev->cnic_priv;
4058
4059         kfree(cp->csk_tbl);
4060         cp->csk_tbl = NULL;
4061         cnic_free_id_tbl(&cp->csk_port_tbl);
4062 }
4063
4064 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
4065 {
4066         struct cnic_local *cp = dev->cnic_priv;
4067         u32 port_id;
4068
4069         cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4070                               GFP_KERNEL);
4071         if (!cp->csk_tbl)
4072                 return -ENOMEM;
4073
4074         port_id = random32();
4075         port_id %= CNIC_LOCAL_PORT_RANGE;
4076         if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4077                              CNIC_LOCAL_PORT_MIN, port_id)) {
4078                 cnic_cm_free_mem(dev);
4079                 return -ENOMEM;
4080         }
4081         return 0;
4082 }
4083
4084 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4085 {
4086         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4087                 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4088                 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4089                 csk->state = opcode;
4090         }
4091
4092         /* 1. If event opcode matches the expected event in csk->state
4093          * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4094          *    event
4095          * 3. If the expected event is 0, meaning the connection was never
4096          *    never established, we accept the opcode from cm_abort.
4097          */
4098         if (opcode == csk->state || csk->state == 0 ||
4099             csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4100             csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4101                 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4102                         if (csk->state == 0)
4103                                 csk->state = opcode;
4104                         return 1;
4105                 }
4106         }
4107         return 0;
4108 }
4109
4110 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4111 {
4112         struct cnic_dev *dev = csk->dev;
4113         struct cnic_local *cp = dev->cnic_priv;
4114
4115         if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4116                 cnic_cm_upcall(cp, csk, opcode);
4117                 return;
4118         }
4119
4120         clear_bit(SK_F_CONNECT_START, &csk->flags);
4121         cnic_close_conn(csk);
4122         csk->state = opcode;
4123         cnic_cm_upcall(cp, csk, opcode);
4124 }
4125
4126 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4127 {
4128 }
4129
4130 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4131 {
4132         u32 seed;
4133
4134         seed = random32();
4135         cnic_ctx_wr(dev, 45, 0, seed);
4136         return 0;
4137 }
4138
4139 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4140 {
4141         struct cnic_dev *dev = csk->dev;
4142         struct cnic_local *cp = dev->cnic_priv;
4143         struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4144         union l5cm_specific_data l5_data;
4145         u32 cmd = 0;
4146         int close_complete = 0;
4147
4148         switch (opcode) {
4149         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4150         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4151         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4152                 if (cnic_ready_to_close(csk, opcode)) {
4153                         if (test_bit(SK_F_HW_ERR, &csk->flags))
4154                                 close_complete = 1;
4155                         else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4156                                 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4157                         else
4158                                 close_complete = 1;
4159                 }
4160                 break;
4161         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4162                 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4163                 break;
4164         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4165                 close_complete = 1;
4166                 break;
4167         }
4168         if (cmd) {
4169                 memset(&l5_data, 0, sizeof(l5_data));
4170
4171                 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4172                                     &l5_data);
4173         } else if (close_complete) {
4174                 ctx->timestamp = jiffies;
4175                 cnic_close_conn(csk);
4176                 cnic_cm_upcall(cp, csk, csk->state);
4177         }
4178 }
4179
4180 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4181 {
4182         struct cnic_local *cp = dev->cnic_priv;
4183
4184         if (!cp->ctx_tbl)
4185                 return;
4186
4187         if (!netif_running(dev->netdev))
4188                 return;
4189
4190         cnic_bnx2x_delete_wait(dev, 0);
4191
4192         cancel_delayed_work(&cp->delete_task);
4193         flush_workqueue(cnic_wq);
4194
4195         if (atomic_read(&cp->iscsi_conn) != 0)
4196                 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4197                             atomic_read(&cp->iscsi_conn));
4198 }
4199
4200 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4201 {
4202         struct cnic_local *cp = dev->cnic_priv;
4203         u32 pfid = cp->pfid;
4204         u32 port = CNIC_PORT(cp);
4205
4206         cnic_init_bnx2x_mac(dev);
4207         cnic_bnx2x_set_tcp_timestamp(dev, 1);
4208
4209         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4210                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4211
4212         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4213                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4214         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4215                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4216                 DEF_MAX_DA_COUNT);
4217
4218         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4219                  XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4220         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4221                  XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4222         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4223                  XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4224         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4225                 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4226
4227         CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4228                 DEF_MAX_CWND);
4229         return 0;
4230 }
4231
4232 static void cnic_delete_task(struct work_struct *work)
4233 {
4234         struct cnic_local *cp;
4235         struct cnic_dev *dev;
4236         u32 i;
4237         int need_resched = 0;
4238
4239         cp = container_of(work, struct cnic_local, delete_task.work);
4240         dev = cp->dev;
4241
4242         if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4243                 struct drv_ctl_info info;
4244
4245                 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4246
4247                 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4248                 cp->ethdev->drv_ctl(dev->netdev, &info);
4249         }
4250
4251         for (i = 0; i < cp->max_cid_space; i++) {
4252                 struct cnic_context *ctx = &cp->ctx_tbl[i];
4253                 int err;
4254
4255                 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4256                     !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4257                         continue;
4258
4259                 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4260                         need_resched = 1;
4261                         continue;
4262                 }
4263
4264                 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4265                         continue;
4266
4267                 err = cnic_bnx2x_destroy_ramrod(dev, i);
4268
4269                 cnic_free_bnx2x_conn_resc(dev, i);
4270                 if (!err) {
4271                         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4272                                 atomic_dec(&cp->iscsi_conn);
4273
4274                         clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4275                 }
4276         }
4277
4278         if (need_resched)
4279                 queue_delayed_work(cnic_wq, &cp->delete_task,
4280                                    msecs_to_jiffies(10));
4281
4282 }
4283
4284 static int cnic_cm_open(struct cnic_dev *dev)
4285 {
4286         struct cnic_local *cp = dev->cnic_priv;
4287         int err;
4288
4289         err = cnic_cm_alloc_mem(dev);
4290         if (err)
4291                 return err;
4292
4293         err = cp->start_cm(dev);
4294
4295         if (err)
4296                 goto err_out;
4297
4298         INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4299
4300         dev->cm_create = cnic_cm_create;
4301         dev->cm_destroy = cnic_cm_destroy;
4302         dev->cm_connect = cnic_cm_connect;
4303         dev->cm_abort = cnic_cm_abort;
4304         dev->cm_close = cnic_cm_close;
4305         dev->cm_select_dev = cnic_cm_select_dev;
4306
4307         cp->ulp_handle[CNIC_ULP_L4] = dev;
4308         rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4309         return 0;
4310
4311 err_out:
4312         cnic_cm_free_mem(dev);
4313         return err;
4314 }
4315
4316 static int cnic_cm_shutdown(struct cnic_dev *dev)
4317 {
4318         struct cnic_local *cp = dev->cnic_priv;
4319         int i;
4320
4321         if (!cp->csk_tbl)
4322                 return 0;
4323
4324         for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4325                 struct cnic_sock *csk = &cp->csk_tbl[i];
4326
4327                 clear_bit(SK_F_INUSE, &csk->flags);
4328                 cnic_cm_cleanup(csk);
4329         }
4330         cnic_cm_free_mem(dev);
4331
4332         return 0;
4333 }
4334
4335 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4336 {
4337         u32 cid_addr;
4338         int i;
4339
4340         cid_addr = GET_CID_ADDR(cid);
4341
4342         for (i = 0; i < CTX_SIZE; i += 4)
4343                 cnic_ctx_wr(dev, cid_addr, i, 0);
4344 }
4345
4346 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4347 {
4348         struct cnic_local *cp = dev->cnic_priv;
4349         int ret = 0, i;
4350         u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4351
4352         if (CHIP_NUM(cp) != CHIP_NUM_5709)
4353                 return 0;
4354
4355         for (i = 0; i < cp->ctx_blks; i++) {
4356                 int j;
4357                 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4358                 u32 val;
4359
4360                 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
4361
4362                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4363                         (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4364                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4365                         (u64) cp->ctx_arr[i].mapping >> 32);
4366                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4367                         BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4368                 for (j = 0; j < 10; j++) {
4369
4370                         val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4371                         if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4372                                 break;
4373                         udelay(5);
4374                 }
4375                 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4376                         ret = -EBUSY;
4377                         break;
4378                 }
4379         }
4380         return ret;
4381 }
4382
4383 static void cnic_free_irq(struct cnic_dev *dev)
4384 {
4385         struct cnic_local *cp = dev->cnic_priv;
4386         struct cnic_eth_dev *ethdev = cp->ethdev;
4387
4388         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4389                 cp->disable_int_sync(dev);
4390                 tasklet_kill(&cp->cnic_irq_task);
4391                 free_irq(ethdev->irq_arr[0].vector, dev);
4392         }
4393 }
4394
4395 static int cnic_request_irq(struct cnic_dev *dev)
4396 {
4397         struct cnic_local *cp = dev->cnic_priv;
4398         struct cnic_eth_dev *ethdev = cp->ethdev;
4399         int err;
4400
4401         err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4402         if (err)
4403                 tasklet_disable(&cp->cnic_irq_task);
4404
4405         return err;
4406 }
4407
4408 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4409 {
4410         struct cnic_local *cp = dev->cnic_priv;
4411         struct cnic_eth_dev *ethdev = cp->ethdev;
4412
4413         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4414                 int err, i = 0;
4415                 int sblk_num = cp->status_blk_num;
4416                 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4417                            BNX2_HC_SB_CONFIG_1;
4418
4419                 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4420
4421                 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4422                 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4423                 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4424
4425                 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4426                 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4427                              (unsigned long) dev);
4428                 err = cnic_request_irq(dev);
4429                 if (err)
4430                         return err;
4431
4432                 while (cp->status_blk.bnx2->status_completion_producer_index &&
4433                        i < 10) {
4434                         CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4435                                 1 << (11 + sblk_num));
4436                         udelay(10);
4437                         i++;
4438                         barrier();
4439                 }
4440                 if (cp->status_blk.bnx2->status_completion_producer_index) {
4441                         cnic_free_irq(dev);
4442                         goto failed;
4443                 }
4444
4445         } else {
4446                 struct status_block *sblk = cp->status_blk.gen;
4447                 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4448                 int i = 0;
4449
4450                 while (sblk->status_completion_producer_index && i < 10) {
4451                         CNIC_WR(dev, BNX2_HC_COMMAND,
4452                                 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4453                         udelay(10);
4454                         i++;
4455                         barrier();
4456                 }
4457                 if (sblk->status_completion_producer_index)
4458                         goto failed;
4459
4460         }
4461         return 0;
4462
4463 failed:
4464         netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4465         return -EBUSY;
4466 }
4467
4468 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4469 {
4470         struct cnic_local *cp = dev->cnic_priv;
4471         struct cnic_eth_dev *ethdev = cp->ethdev;
4472
4473         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4474                 return;
4475
4476         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4477                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4478 }
4479
4480 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4481 {
4482         struct cnic_local *cp = dev->cnic_priv;
4483         struct cnic_eth_dev *ethdev = cp->ethdev;
4484
4485         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4486                 return;
4487
4488         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4489                 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4490         CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4491         synchronize_irq(ethdev->irq_arr[0].vector);
4492 }
4493
4494 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4495 {
4496         struct cnic_local *cp = dev->cnic_priv;
4497         struct cnic_eth_dev *ethdev = cp->ethdev;
4498         struct cnic_uio_dev *udev = cp->udev;
4499         u32 cid_addr, tx_cid, sb_id;
4500         u32 val, offset0, offset1, offset2, offset3;
4501         int i;
4502         struct tx_bd *txbd;
4503         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4504         struct status_block *s_blk = cp->status_blk.gen;
4505
4506         sb_id = cp->status_blk_num;
4507         tx_cid = 20;
4508         cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4509         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4510                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4511
4512                 tx_cid = TX_TSS_CID + sb_id - 1;
4513                 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4514                         (TX_TSS_CID << 7));
4515                 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4516         }
4517         cp->tx_cons = *cp->tx_cons_ptr;
4518
4519         cid_addr = GET_CID_ADDR(tx_cid);
4520         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
4521                 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4522
4523                 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4524                         cnic_ctx_wr(dev, cid_addr2, i, 0);
4525
4526                 offset0 = BNX2_L2CTX_TYPE_XI;
4527                 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4528                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4529                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4530         } else {
4531                 cnic_init_context(dev, tx_cid);
4532                 cnic_init_context(dev, tx_cid + 1);
4533
4534                 offset0 = BNX2_L2CTX_TYPE;
4535                 offset1 = BNX2_L2CTX_CMD_TYPE;
4536                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4537                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4538         }
4539         val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4540         cnic_ctx_wr(dev, cid_addr, offset0, val);
4541
4542         val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4543         cnic_ctx_wr(dev, cid_addr, offset1, val);
4544
4545         txbd = udev->l2_ring;
4546
4547         buf_map = udev->l2_buf_map;
4548         for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
4549                 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4550                 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4551         }
4552         val = (u64) ring_map >> 32;
4553         cnic_ctx_wr(dev, cid_addr, offset2, val);
4554         txbd->tx_bd_haddr_hi = val;
4555
4556         val = (u64) ring_map & 0xffffffff;
4557         cnic_ctx_wr(dev, cid_addr, offset3, val);
4558         txbd->tx_bd_haddr_lo = val;
4559 }
4560
4561 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4562 {
4563         struct cnic_local *cp = dev->cnic_priv;
4564         struct cnic_eth_dev *ethdev = cp->ethdev;
4565         struct cnic_uio_dev *udev = cp->udev;
4566         u32 cid_addr, sb_id, val, coal_reg, coal_val;
4567         int i;
4568         struct rx_bd *rxbd;
4569         struct status_block *s_blk = cp->status_blk.gen;
4570         dma_addr_t ring_map = udev->l2_ring_map;
4571
4572         sb_id = cp->status_blk_num;
4573         cnic_init_context(dev, 2);
4574         cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4575         coal_reg = BNX2_HC_COMMAND;
4576         coal_val = CNIC_RD(dev, coal_reg);
4577         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4578                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4579
4580                 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4581                 coal_reg = BNX2_HC_COALESCE_NOW;
4582                 coal_val = 1 << (11 + sb_id);
4583         }
4584         i = 0;
4585         while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4586                 CNIC_WR(dev, coal_reg, coal_val);
4587                 udelay(10);
4588                 i++;
4589                 barrier();
4590         }
4591         cp->rx_cons = *cp->rx_cons_ptr;
4592
4593         cid_addr = GET_CID_ADDR(2);
4594         val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4595               BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4596         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4597
4598         if (sb_id == 0)
4599                 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4600         else
4601                 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4602         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4603
4604         rxbd = udev->l2_ring + BCM_PAGE_SIZE;
4605         for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
4606                 dma_addr_t buf_map;
4607                 int n = (i % cp->l2_rx_ring_size) + 1;
4608
4609                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4610                 rxbd->rx_bd_len = cp->l2_single_buf_size;
4611                 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4612                 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4613                 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4614         }
4615         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4616         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4617         rxbd->rx_bd_haddr_hi = val;
4618
4619         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4620         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4621         rxbd->rx_bd_haddr_lo = val;
4622
4623         val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4624         cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4625 }
4626
4627 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4628 {
4629         struct kwqe *wqes[1], l2kwqe;
4630
4631         memset(&l2kwqe, 0, sizeof(l2kwqe));
4632         wqes[0] = &l2kwqe;
4633         l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4634                               (L2_KWQE_OPCODE_VALUE_FLUSH <<
4635                                KWQE_OPCODE_SHIFT) | 2;
4636         dev->submit_kwqes(dev, wqes, 1);
4637 }
4638
4639 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4640 {
4641         struct cnic_local *cp = dev->cnic_priv;
4642         u32 val;
4643
4644         val = cp->func << 2;
4645
4646         cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4647
4648         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4649                               BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4650         dev->mac_addr[0] = (u8) (val >> 8);
4651         dev->mac_addr[1] = (u8) val;
4652
4653         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4654
4655         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4656                               BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4657         dev->mac_addr[2] = (u8) (val >> 24);
4658         dev->mac_addr[3] = (u8) (val >> 16);
4659         dev->mac_addr[4] = (u8) (val >> 8);
4660         dev->mac_addr[5] = (u8) val;
4661
4662         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4663
4664         val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4665         if (CHIP_NUM(cp) != CHIP_NUM_5709)
4666                 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4667
4668         CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4669         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4670         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4671 }
4672
4673 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4674 {
4675         struct cnic_local *cp = dev->cnic_priv;
4676         struct cnic_eth_dev *ethdev = cp->ethdev;
4677         struct status_block *sblk = cp->status_blk.gen;
4678         u32 val, kcq_cid_addr, kwq_cid_addr;
4679         int err;
4680
4681         cnic_set_bnx2_mac(dev);
4682
4683         val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4684         val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4685         if (BCM_PAGE_BITS > 12)
4686                 val |= (12 - 8)  << 4;
4687         else
4688                 val |= (BCM_PAGE_BITS - 8)  << 4;
4689
4690         CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4691
4692         CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4693         CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4694         CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4695
4696         err = cnic_setup_5709_context(dev, 1);
4697         if (err)
4698                 return err;
4699
4700         cnic_init_context(dev, KWQ_CID);
4701         cnic_init_context(dev, KCQ_CID);
4702
4703         kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4704         cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4705
4706         cp->max_kwq_idx = MAX_KWQ_IDX;
4707         cp->kwq_prod_idx = 0;
4708         cp->kwq_con_idx = 0;
4709         set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4710
4711         if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
4712                 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4713         else
4714                 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4715
4716         /* Initialize the kernel work queue context. */
4717         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4718               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4719         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4720
4721         val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4722         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4723
4724         val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4725         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4726
4727         val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4728         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4729
4730         val = (u32) cp->kwq_info.pgtbl_map;
4731         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4732
4733         kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4734         cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4735
4736         cp->kcq1.sw_prod_idx = 0;
4737         cp->kcq1.hw_prod_idx_ptr =
4738                 &sblk->status_completion_producer_index;
4739
4740         cp->kcq1.status_idx_ptr = &sblk->status_idx;
4741
4742         /* Initialize the kernel complete queue context. */
4743         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4744               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4745         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4746
4747         val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4748         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4749
4750         val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4751         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4752
4753         val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4754         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4755
4756         val = (u32) cp->kcq1.dma.pgtbl_map;
4757         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4758
4759         cp->int_num = 0;
4760         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4761                 struct status_block_msix *msblk = cp->status_blk.bnx2;
4762                 u32 sb_id = cp->status_blk_num;
4763                 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4764
4765                 cp->kcq1.hw_prod_idx_ptr =
4766                         &msblk->status_completion_producer_index;
4767                 cp->kcq1.status_idx_ptr = &msblk->status_idx;
4768                 cp->kwq_con_idx_ptr = &msblk->status_cmd_consumer_index;
4769                 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4770                 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4771                 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4772         }
4773
4774         /* Enable Commnad Scheduler notification when we write to the
4775          * host producer index of the kernel contexts. */
4776         CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4777
4778         /* Enable Command Scheduler notification when we write to either
4779          * the Send Queue or Receive Queue producer indexes of the kernel
4780          * bypass contexts. */
4781         CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4782         CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4783
4784         /* Notify COM when the driver post an application buffer. */
4785         CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4786
4787         /* Set the CP and COM doorbells.  These two processors polls the
4788          * doorbell for a non zero value before running.  This must be done
4789          * after setting up the kernel queue contexts. */
4790         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4791         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4792
4793         cnic_init_bnx2_tx_ring(dev);
4794         cnic_init_bnx2_rx_ring(dev);
4795
4796         err = cnic_init_bnx2_irq(dev);
4797         if (err) {
4798                 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4799                 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4800                 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4801                 return err;
4802         }
4803
4804         return 0;
4805 }
4806
4807 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4808 {
4809         struct cnic_local *cp = dev->cnic_priv;
4810         struct cnic_eth_dev *ethdev = cp->ethdev;
4811         u32 start_offset = ethdev->ctx_tbl_offset;
4812         int i;
4813
4814         for (i = 0; i < cp->ctx_blks; i++) {
4815                 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4816                 dma_addr_t map = ctx->mapping;
4817
4818                 if (cp->ctx_align) {
4819                         unsigned long mask = cp->ctx_align - 1;
4820
4821                         map = (map + mask) & ~mask;
4822                 }
4823
4824                 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4825         }
4826 }
4827
4828 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4829 {
4830         struct cnic_local *cp = dev->cnic_priv;
4831         struct cnic_eth_dev *ethdev = cp->ethdev;
4832         int err = 0;
4833
4834         tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4835                      (unsigned long) dev);
4836         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4837                 err = cnic_request_irq(dev);
4838
4839         return err;
4840 }
4841
4842 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4843                                                 u16 sb_id, u8 sb_index,
4844                                                 u8 disable)
4845 {
4846
4847         u32 addr = BAR_CSTRORM_INTMEM +
4848                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4849                         offsetof(struct hc_status_block_data_e1x, index_data) +
4850                         sizeof(struct hc_index_data)*sb_index +
4851                         offsetof(struct hc_index_data, flags);
4852         u16 flags = CNIC_RD16(dev, addr);
4853         /* clear and set */
4854         flags &= ~HC_INDEX_DATA_HC_ENABLED;
4855         flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4856                   HC_INDEX_DATA_HC_ENABLED);
4857         CNIC_WR16(dev, addr, flags);
4858 }
4859
4860 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4861 {
4862         struct cnic_local *cp = dev->cnic_priv;
4863         u8 sb_id = cp->status_blk_num;
4864
4865         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4866                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4867                         offsetof(struct hc_status_block_data_e1x, index_data) +
4868                         sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4869                         offsetof(struct hc_index_data, timeout), 64 / 4);
4870         cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4871 }
4872
4873 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4874 {
4875 }
4876
4877 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4878                                     struct client_init_ramrod_data *data)
4879 {
4880         struct cnic_local *cp = dev->cnic_priv;
4881         struct cnic_uio_dev *udev = cp->udev;
4882         union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4883         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4884         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4885         int i;
4886         u32 cli = cp->ethdev->iscsi_l2_client_id;
4887         u32 val;
4888
4889         memset(txbd, 0, BCM_PAGE_SIZE);
4890
4891         buf_map = udev->l2_buf_map;
4892         for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4893                 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4894                 struct eth_tx_parse_bd_e1x *pbd_e1x =
4895                         &((txbd + 1)->parse_bd_e1x);
4896                 struct eth_tx_parse_bd_e2 *pbd_e2 = &((txbd + 1)->parse_bd_e2);
4897                 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4898
4899                 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4900                 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4901                 reg_bd->addr_hi = start_bd->addr_hi;
4902                 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4903                 start_bd->nbytes = cpu_to_le16(0x10);
4904                 start_bd->nbd = cpu_to_le16(3);
4905                 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4906                 start_bd->general_data &= ~ETH_TX_START_BD_PARSE_NBDS;
4907                 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4908
4909                 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
4910                         pbd_e2->parsing_data = (UNICAST_ADDRESS <<
4911                                  ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT);
4912                 else
4913                          pbd_e1x->global_data = (UNICAST_ADDRESS <<
4914                                 ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT);
4915         }
4916
4917         val = (u64) ring_map >> 32;
4918         txbd->next_bd.addr_hi = cpu_to_le32(val);
4919
4920         data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4921
4922         val = (u64) ring_map & 0xffffffff;
4923         txbd->next_bd.addr_lo = cpu_to_le32(val);
4924
4925         data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4926
4927         /* Other ramrod params */
4928         data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4929         data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4930
4931         /* reset xstorm per client statistics */
4932         if (cli < MAX_STAT_COUNTER_ID) {
4933                 data->general.statistics_zero_flg = 1;
4934                 data->general.statistics_en_flg = 1;
4935                 data->general.statistics_counter_id = cli;
4936         }
4937
4938         cp->tx_cons_ptr =
4939                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4940 }
4941
4942 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4943                                     struct client_init_ramrod_data *data)
4944 {
4945         struct cnic_local *cp = dev->cnic_priv;
4946         struct cnic_uio_dev *udev = cp->udev;
4947         struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4948                                 BCM_PAGE_SIZE);
4949         struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4950                                 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4951         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4952         int i;
4953         u32 cli = cp->ethdev->iscsi_l2_client_id;
4954         int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4955         u32 val;
4956         dma_addr_t ring_map = udev->l2_ring_map;
4957
4958         /* General data */
4959         data->general.client_id = cli;
4960         data->general.activate_flg = 1;
4961         data->general.sp_client_id = cli;
4962         data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4963         data->general.func_id = cp->pfid;
4964
4965         for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4966                 dma_addr_t buf_map;
4967                 int n = (i % cp->l2_rx_ring_size) + 1;
4968
4969                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4970                 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4971                 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4972         }
4973
4974         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4975         rxbd->addr_hi = cpu_to_le32(val);
4976         data->rx.bd_page_base.hi = cpu_to_le32(val);
4977
4978         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4979         rxbd->addr_lo = cpu_to_le32(val);
4980         data->rx.bd_page_base.lo = cpu_to_le32(val);
4981
4982         rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4983         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4984         rxcqe->addr_hi = cpu_to_le32(val);
4985         data->rx.cqe_page_base.hi = cpu_to_le32(val);
4986
4987         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4988         rxcqe->addr_lo = cpu_to_le32(val);
4989         data->rx.cqe_page_base.lo = cpu_to_le32(val);
4990
4991         /* Other ramrod params */
4992         data->rx.client_qzone_id = cl_qzone_id;
4993         data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4994         data->rx.status_block_id = BNX2X_DEF_SB_ID;
4995
4996         data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4997
4998         data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
4999         data->rx.outer_vlan_removal_enable_flg = 1;
5000         data->rx.silent_vlan_removal_flg = 1;
5001         data->rx.silent_vlan_value = 0;
5002         data->rx.silent_vlan_mask = 0xffff;
5003
5004         cp->rx_cons_ptr =
5005                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
5006         cp->rx_cons = *cp->rx_cons_ptr;
5007 }
5008
5009 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
5010 {
5011         struct cnic_local *cp = dev->cnic_priv;
5012         u32 pfid = cp->pfid;
5013
5014         cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
5015                            CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
5016         cp->kcq1.sw_prod_idx = 0;
5017
5018         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5019                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5020
5021                 cp->kcq1.hw_prod_idx_ptr =
5022                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5023                 cp->kcq1.status_idx_ptr =
5024                         &sb->sb.running_index[SM_RX_ID];
5025         } else {
5026                 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
5027
5028                 cp->kcq1.hw_prod_idx_ptr =
5029                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5030                 cp->kcq1.status_idx_ptr =
5031                         &sb->sb.running_index[SM_RX_ID];
5032         }
5033
5034         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5035                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5036
5037                 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
5038                                         USTORM_FCOE_EQ_PROD_OFFSET(pfid);
5039                 cp->kcq2.sw_prod_idx = 0;
5040                 cp->kcq2.hw_prod_idx_ptr =
5041                         &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
5042                 cp->kcq2.status_idx_ptr =
5043                         &sb->sb.running_index[SM_RX_ID];
5044         }
5045 }
5046
5047 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
5048 {
5049         struct cnic_local *cp = dev->cnic_priv;
5050         struct cnic_eth_dev *ethdev = cp->ethdev;
5051         int func = CNIC_FUNC(cp), ret;
5052         u32 pfid;
5053
5054         dev->stats_addr = ethdev->addr_drv_info_to_mcp;
5055         cp->port_mode = CHIP_PORT_MODE_NONE;
5056
5057         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5058                 u32 val;
5059
5060                 pci_read_config_dword(dev->pcidev, PCICFG_ME_REGISTER, &val);
5061                 cp->func = (u8) ((val & ME_REG_ABS_PF_NUM) >>
5062                                  ME_REG_ABS_PF_NUM_SHIFT);
5063                 func = CNIC_FUNC(cp);
5064
5065                 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
5066                 if (!(val & 1))
5067                         val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
5068                 else
5069                         val = (val >> 1) & 1;
5070
5071                 if (val) {
5072                         cp->port_mode = CHIP_4_PORT_MODE;
5073                         cp->pfid = func >> 1;
5074                 } else {
5075                         cp->port_mode = CHIP_2_PORT_MODE;
5076                         cp->pfid = func & 0x6;
5077                 }
5078         } else {
5079                 cp->pfid = func;
5080         }
5081         pfid = cp->pfid;
5082
5083         ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
5084                                cp->iscsi_start_cid, 0);
5085
5086         if (ret)
5087                 return -ENOMEM;
5088
5089         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5090                 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5091                                         cp->fcoe_start_cid, 0);
5092
5093                 if (ret)
5094                         return -ENOMEM;
5095         }
5096
5097         cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5098
5099         cnic_init_bnx2x_kcq(dev);
5100
5101         /* Only 1 EQ */
5102         CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5103         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5104                 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5105         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5106                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5107                 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5108         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5109                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5110                 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5111         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5112                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5113                 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5114         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5115                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5116                 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5117         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5118                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5119         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5120                 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5121         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5122                 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5123                 HC_INDEX_ISCSI_EQ_CONS);
5124
5125         CNIC_WR(dev, BAR_USTRORM_INTMEM +
5126                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5127                 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5128         CNIC_WR(dev, BAR_USTRORM_INTMEM +
5129                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5130                 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5131
5132         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5133                 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5134
5135         cnic_setup_bnx2x_context(dev);
5136
5137         ret = cnic_init_bnx2x_irq(dev);
5138         if (ret)
5139                 return ret;
5140
5141         return 0;
5142 }
5143
5144 static void cnic_init_rings(struct cnic_dev *dev)
5145 {
5146         struct cnic_local *cp = dev->cnic_priv;
5147         struct cnic_uio_dev *udev = cp->udev;
5148
5149         if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5150                 return;
5151
5152         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5153                 cnic_init_bnx2_tx_ring(dev);
5154                 cnic_init_bnx2_rx_ring(dev);
5155                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5156         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5157                 u32 cli = cp->ethdev->iscsi_l2_client_id;
5158                 u32 cid = cp->ethdev->iscsi_l2_cid;
5159                 u32 cl_qzone_id;
5160                 struct client_init_ramrod_data *data;
5161                 union l5cm_specific_data l5_data;
5162                 struct ustorm_eth_rx_producers rx_prods = {0};
5163                 u32 off, i, *cid_ptr;
5164
5165                 rx_prods.bd_prod = 0;
5166                 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5167                 barrier();
5168
5169                 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5170
5171                 off = BAR_USTRORM_INTMEM +
5172                         (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ?
5173                          USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5174                          USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5175
5176                 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5177                         CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5178
5179                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5180
5181                 data = udev->l2_buf;
5182                 cid_ptr = udev->l2_buf + 12;
5183
5184                 memset(data, 0, sizeof(*data));
5185
5186                 cnic_init_bnx2x_tx_ring(dev, data);
5187                 cnic_init_bnx2x_rx_ring(dev, data);
5188
5189                 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5190                 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5191
5192                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5193
5194                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5195                         cid, ETH_CONNECTION_TYPE, &l5_data);
5196
5197                 i = 0;
5198                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5199                        ++i < 10)
5200                         msleep(1);
5201
5202                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5203                         netdev_err(dev->netdev,
5204                                 "iSCSI CLIENT_SETUP did not complete\n");
5205                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5206                 cnic_ring_ctl(dev, cid, cli, 1);
5207                 *cid_ptr = cid;
5208         }
5209 }
5210
5211 static void cnic_shutdown_rings(struct cnic_dev *dev)
5212 {
5213         struct cnic_local *cp = dev->cnic_priv;
5214         struct cnic_uio_dev *udev = cp->udev;
5215         void *rx_ring;
5216
5217         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5218                 return;
5219
5220         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5221                 cnic_shutdown_bnx2_rx_ring(dev);
5222         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5223                 u32 cli = cp->ethdev->iscsi_l2_client_id;
5224                 u32 cid = cp->ethdev->iscsi_l2_cid;
5225                 union l5cm_specific_data l5_data;
5226                 int i;
5227
5228                 cnic_ring_ctl(dev, cid, cli, 0);
5229
5230                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5231
5232                 l5_data.phy_address.lo = cli;
5233                 l5_data.phy_address.hi = 0;
5234                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5235                         cid, ETH_CONNECTION_TYPE, &l5_data);
5236                 i = 0;
5237                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5238                        ++i < 10)
5239                         msleep(1);
5240
5241                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5242                         netdev_err(dev->netdev,
5243                                 "iSCSI CLIENT_HALT did not complete\n");
5244                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5245
5246                 memset(&l5_data, 0, sizeof(l5_data));
5247                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5248                         cid, NONE_CONNECTION_TYPE, &l5_data);
5249                 msleep(10);
5250         }
5251         clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5252         rx_ring = udev->l2_ring + BCM_PAGE_SIZE;
5253         memset(rx_ring, 0, BCM_PAGE_SIZE);
5254 }
5255
5256 static int cnic_register_netdev(struct cnic_dev *dev)
5257 {
5258         struct cnic_local *cp = dev->cnic_priv;
5259         struct cnic_eth_dev *ethdev = cp->ethdev;
5260         int err;
5261
5262         if (!ethdev)
5263                 return -ENODEV;
5264
5265         if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5266                 return 0;
5267
5268         err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5269         if (err)
5270                 netdev_err(dev->netdev, "register_cnic failed\n");
5271
5272         return err;
5273 }
5274
5275 static void cnic_unregister_netdev(struct cnic_dev *dev)
5276 {
5277         struct cnic_local *cp = dev->cnic_priv;
5278         struct cnic_eth_dev *ethdev = cp->ethdev;
5279
5280         if (!ethdev)
5281                 return;
5282
5283         ethdev->drv_unregister_cnic(dev->netdev);
5284 }
5285
5286 static int cnic_start_hw(struct cnic_dev *dev)
5287 {
5288         struct cnic_local *cp = dev->cnic_priv;
5289         struct cnic_eth_dev *ethdev = cp->ethdev;
5290         int err;
5291
5292         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5293                 return -EALREADY;
5294
5295         dev->regview = ethdev->io_base;
5296         pci_dev_get(dev->pcidev);
5297         cp->func = PCI_FUNC(dev->pcidev->devfn);
5298         cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5299         cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5300
5301         err = cp->alloc_resc(dev);
5302         if (err) {
5303                 netdev_err(dev->netdev, "allocate resource failure\n");
5304                 goto err1;
5305         }
5306
5307         err = cp->start_hw(dev);
5308         if (err)
5309                 goto err1;
5310
5311         err = cnic_cm_open(dev);
5312         if (err)
5313                 goto err1;
5314
5315         set_bit(CNIC_F_CNIC_UP, &dev->flags);
5316
5317         cp->enable_int(dev);
5318
5319         return 0;
5320
5321 err1:
5322         cp->free_resc(dev);
5323         pci_dev_put(dev->pcidev);
5324         return err;
5325 }
5326
5327 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5328 {
5329         cnic_disable_bnx2_int_sync(dev);
5330
5331         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5332         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5333
5334         cnic_init_context(dev, KWQ_CID);
5335         cnic_init_context(dev, KCQ_CID);
5336
5337         cnic_setup_5709_context(dev, 0);
5338         cnic_free_irq(dev);
5339
5340         cnic_free_resc(dev);
5341 }
5342
5343
5344 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5345 {
5346         struct cnic_local *cp = dev->cnic_priv;
5347
5348         cnic_free_irq(dev);
5349         *cp->kcq1.hw_prod_idx_ptr = 0;
5350         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5351                 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5352         CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5353         cnic_free_resc(dev);
5354 }
5355
5356 static void cnic_stop_hw(struct cnic_dev *dev)
5357 {
5358         if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5359                 struct cnic_local *cp = dev->cnic_priv;
5360                 int i = 0;
5361
5362                 /* Need to wait for the ring shutdown event to complete
5363                  * before clearing the CNIC_UP flag.
5364                  */
5365                 while (cp->udev && cp->udev->uio_dev != -1 && i < 15) {
5366                         msleep(100);
5367                         i++;
5368                 }
5369                 cnic_shutdown_rings(dev);
5370                 cp->stop_cm(dev);
5371                 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5372                 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5373                 synchronize_rcu();
5374                 cnic_cm_shutdown(dev);
5375                 cp->stop_hw(dev);
5376                 pci_dev_put(dev->pcidev);
5377         }
5378 }
5379
5380 static void cnic_free_dev(struct cnic_dev *dev)
5381 {
5382         int i = 0;
5383
5384         while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5385                 msleep(100);
5386                 i++;
5387         }
5388         if (atomic_read(&dev->ref_count) != 0)
5389                 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5390
5391         netdev_info(dev->netdev, "Removed CNIC device\n");
5392         dev_put(dev->netdev);
5393         kfree(dev);
5394 }
5395
5396 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5397                                        struct pci_dev *pdev)
5398 {
5399         struct cnic_dev *cdev;
5400         struct cnic_local *cp;
5401         int alloc_size;
5402
5403         alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5404
5405         cdev = kzalloc(alloc_size , GFP_KERNEL);
5406         if (cdev == NULL) {
5407                 netdev_err(dev, "allocate dev struct failure\n");
5408                 return NULL;
5409         }
5410
5411         cdev->netdev = dev;
5412         cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5413         cdev->register_device = cnic_register_device;
5414         cdev->unregister_device = cnic_unregister_device;
5415         cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5416
5417         cp = cdev->cnic_priv;
5418         cp->dev = cdev;
5419         cp->l2_single_buf_size = 0x400;
5420         cp->l2_rx_ring_size = 3;
5421
5422         spin_lock_init(&cp->cnic_ulp_lock);
5423
5424         netdev_info(dev, "Added CNIC device\n");
5425
5426         return cdev;
5427 }
5428
5429 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5430 {
5431         struct pci_dev *pdev;
5432         struct cnic_dev *cdev;
5433         struct cnic_local *cp;
5434         struct cnic_eth_dev *ethdev = NULL;
5435         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5436
5437         probe = symbol_get(bnx2_cnic_probe);
5438         if (probe) {
5439                 ethdev = (*probe)(dev);
5440                 symbol_put(bnx2_cnic_probe);
5441         }
5442         if (!ethdev)
5443                 return NULL;
5444
5445         pdev = ethdev->pdev;
5446         if (!pdev)
5447                 return NULL;
5448
5449         dev_hold(dev);
5450         pci_dev_get(pdev);
5451         if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5452              pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5453             (pdev->revision < 0x10)) {
5454                 pci_dev_put(pdev);
5455                 goto cnic_err;
5456         }
5457         pci_dev_put(pdev);
5458
5459         cdev = cnic_alloc_dev(dev, pdev);
5460         if (cdev == NULL)
5461                 goto cnic_err;
5462
5463         set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5464         cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5465
5466         cp = cdev->cnic_priv;
5467         cp->ethdev = ethdev;
5468         cdev->pcidev = pdev;
5469         cp->chip_id = ethdev->chip_id;
5470
5471         cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5472
5473         cp->cnic_ops = &cnic_bnx2_ops;
5474         cp->start_hw = cnic_start_bnx2_hw;
5475         cp->stop_hw = cnic_stop_bnx2_hw;
5476         cp->setup_pgtbl = cnic_setup_page_tbl;
5477         cp->alloc_resc = cnic_alloc_bnx2_resc;
5478         cp->free_resc = cnic_free_resc;
5479         cp->start_cm = cnic_cm_init_bnx2_hw;
5480         cp->stop_cm = cnic_cm_stop_bnx2_hw;
5481         cp->enable_int = cnic_enable_bnx2_int;
5482         cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5483         cp->close_conn = cnic_close_bnx2_conn;
5484         return cdev;
5485
5486 cnic_err:
5487         dev_put(dev);
5488         return NULL;
5489 }
5490
5491 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5492 {
5493         struct pci_dev *pdev;
5494         struct cnic_dev *cdev;
5495         struct cnic_local *cp;
5496         struct cnic_eth_dev *ethdev = NULL;
5497         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5498
5499         probe = symbol_get(bnx2x_cnic_probe);
5500         if (probe) {
5501                 ethdev = (*probe)(dev);
5502                 symbol_put(bnx2x_cnic_probe);
5503         }
5504         if (!ethdev)
5505                 return NULL;
5506
5507         pdev = ethdev->pdev;
5508         if (!pdev)
5509                 return NULL;
5510
5511         dev_hold(dev);
5512         cdev = cnic_alloc_dev(dev, pdev);
5513         if (cdev == NULL) {
5514                 dev_put(dev);
5515                 return NULL;
5516         }
5517
5518         set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5519         cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5520
5521         cp = cdev->cnic_priv;
5522         cp->ethdev = ethdev;
5523         cdev->pcidev = pdev;
5524         cp->chip_id = ethdev->chip_id;
5525
5526         cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5527
5528         if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5529                 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5530         if (CNIC_SUPPORTS_FCOE(cp))
5531                 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5532
5533         if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5534                 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5535
5536         memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5537
5538         cp->cnic_ops = &cnic_bnx2x_ops;
5539         cp->start_hw = cnic_start_bnx2x_hw;
5540         cp->stop_hw = cnic_stop_bnx2x_hw;
5541         cp->setup_pgtbl = cnic_setup_page_tbl_le;
5542         cp->alloc_resc = cnic_alloc_bnx2x_resc;
5543         cp->free_resc = cnic_free_resc;
5544         cp->start_cm = cnic_cm_init_bnx2x_hw;
5545         cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5546         cp->enable_int = cnic_enable_bnx2x_int;
5547         cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5548         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5549                 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5550                 cp->arm_int = cnic_arm_bnx2x_e2_msix;
5551         } else {
5552                 cp->ack_int = cnic_ack_bnx2x_msix;
5553                 cp->arm_int = cnic_arm_bnx2x_msix;
5554         }
5555         cp->close_conn = cnic_close_bnx2x_conn;
5556         return cdev;
5557 }
5558
5559 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5560 {
5561         struct ethtool_drvinfo drvinfo;
5562         struct cnic_dev *cdev = NULL;
5563
5564         if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5565                 memset(&drvinfo, 0, sizeof(drvinfo));
5566                 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5567
5568                 if (!strcmp(drvinfo.driver, "bnx2"))
5569                         cdev = init_bnx2_cnic(dev);
5570                 if (!strcmp(drvinfo.driver, "bnx2x"))
5571                         cdev = init_bnx2x_cnic(dev);
5572                 if (cdev) {
5573                         write_lock(&cnic_dev_lock);
5574                         list_add(&cdev->list, &cnic_dev_list);
5575                         write_unlock(&cnic_dev_lock);
5576                 }
5577         }
5578         return cdev;
5579 }
5580
5581 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5582                               u16 vlan_id)
5583 {
5584         int if_type;
5585
5586         rcu_read_lock();
5587         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5588                 struct cnic_ulp_ops *ulp_ops;
5589                 void *ctx;
5590
5591                 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5592                 if (!ulp_ops || !ulp_ops->indicate_netevent)
5593                         continue;
5594
5595                 ctx = cp->ulp_handle[if_type];
5596
5597                 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5598         }
5599         rcu_read_unlock();
5600 }
5601
5602 /* netdev event handler */
5603 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5604                                                          void *ptr)
5605 {
5606         struct net_device *netdev = ptr;
5607         struct cnic_dev *dev;
5608         int new_dev = 0;
5609
5610         dev = cnic_from_netdev(netdev);
5611
5612         if (!dev && (event == NETDEV_REGISTER || netif_running(netdev))) {
5613                 /* Check for the hot-plug device */
5614                 dev = is_cnic_dev(netdev);
5615                 if (dev) {
5616                         new_dev = 1;
5617                         cnic_hold(dev);
5618                 }
5619         }
5620         if (dev) {
5621                 struct cnic_local *cp = dev->cnic_priv;
5622
5623                 if (new_dev)
5624                         cnic_ulp_init(dev);
5625                 else if (event == NETDEV_UNREGISTER)
5626                         cnic_ulp_exit(dev);
5627
5628                 if (event == NETDEV_UP || (new_dev && netif_running(netdev))) {
5629                         if (cnic_register_netdev(dev) != 0) {
5630                                 cnic_put(dev);
5631                                 goto done;
5632                         }
5633                         if (!cnic_start_hw(dev))
5634                                 cnic_ulp_start(dev);
5635                 }
5636
5637                 cnic_rcv_netevent(cp, event, 0);
5638
5639                 if (event == NETDEV_GOING_DOWN) {
5640                         cnic_ulp_stop(dev);
5641                         cnic_stop_hw(dev);
5642                         cnic_unregister_netdev(dev);
5643                 } else if (event == NETDEV_UNREGISTER) {
5644                         write_lock(&cnic_dev_lock);
5645                         list_del_init(&dev->list);
5646                         write_unlock(&cnic_dev_lock);
5647
5648                         cnic_put(dev);
5649                         cnic_free_dev(dev);
5650                         goto done;
5651                 }
5652                 cnic_put(dev);
5653         } else {
5654                 struct net_device *realdev;
5655                 u16 vid;
5656
5657                 vid = cnic_get_vlan(netdev, &realdev);
5658                 if (realdev) {
5659                         dev = cnic_from_netdev(realdev);
5660                         if (dev) {
5661                                 vid |= VLAN_TAG_PRESENT;
5662                                 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5663                                 cnic_put(dev);
5664                         }
5665                 }
5666         }
5667 done:
5668         return NOTIFY_DONE;
5669 }
5670
5671 static struct notifier_block cnic_netdev_notifier = {
5672         .notifier_call = cnic_netdev_event
5673 };
5674
5675 static void cnic_release(void)
5676 {
5677         struct cnic_dev *dev;
5678         struct cnic_uio_dev *udev;
5679
5680         while (!list_empty(&cnic_dev_list)) {
5681                 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
5682                 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5683                         cnic_ulp_stop(dev);
5684                         cnic_stop_hw(dev);
5685                 }
5686
5687                 cnic_ulp_exit(dev);
5688                 cnic_unregister_netdev(dev);
5689                 list_del_init(&dev->list);
5690                 cnic_free_dev(dev);
5691         }
5692         while (!list_empty(&cnic_udev_list)) {
5693                 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5694                                   list);
5695                 cnic_free_uio(udev);
5696         }
5697 }
5698
5699 static int __init cnic_init(void)
5700 {
5701         int rc = 0;
5702
5703         pr_info("%s", version);
5704
5705         rc = register_netdevice_notifier(&cnic_netdev_notifier);
5706         if (rc) {
5707                 cnic_release();
5708                 return rc;
5709         }
5710
5711         cnic_wq = create_singlethread_workqueue("cnic_wq");
5712         if (!cnic_wq) {
5713                 cnic_release();
5714                 unregister_netdevice_notifier(&cnic_netdev_notifier);
5715                 return -ENOMEM;
5716         }
5717
5718         return 0;
5719 }
5720
5721 static void __exit cnic_exit(void)
5722 {
5723         unregister_netdevice_notifier(&cnic_netdev_notifier);
5724         cnic_release();
5725         destroy_workqueue(cnic_wq);
5726 }
5727
5728 module_init(cnic_init);
5729 module_exit(cnic_exit);