1 /*******************************************************************************
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 The full GNU General Public License is included in this distribution in the
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
44 #define DRIVERNAPI "-NAPI"
46 #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
50 /* e1000_pci_tbl - PCI Device ID Table
52 * Last entry must be all 0s
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
57 static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 /* required last entry */
107 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
109 int e1000_up(struct e1000_adapter *adapter);
110 void e1000_down(struct e1000_adapter *adapter);
111 void e1000_reset(struct e1000_adapter *adapter);
112 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
113 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
114 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
115 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
116 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
117 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
118 struct e1000_tx_ring *txdr);
119 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
120 struct e1000_rx_ring *rxdr);
121 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *tx_ring);
123 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rx_ring);
125 void e1000_update_stats(struct e1000_adapter *adapter);
127 /* Local Function Prototypes */
129 static int e1000_init_module(void);
130 static void e1000_exit_module(void);
131 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
132 static void __devexit e1000_remove(struct pci_dev *pdev);
133 static int e1000_alloc_queues(struct e1000_adapter *adapter);
134 #ifdef CONFIG_E1000_MQ
135 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
137 static int e1000_sw_init(struct e1000_adapter *adapter);
138 static int e1000_open(struct net_device *netdev);
139 static int e1000_close(struct net_device *netdev);
140 static void e1000_configure_tx(struct e1000_adapter *adapter);
141 static void e1000_configure_rx(struct e1000_adapter *adapter);
142 static void e1000_setup_rctl(struct e1000_adapter *adapter);
143 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
144 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
145 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
146 struct e1000_tx_ring *tx_ring);
147 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
148 struct e1000_rx_ring *rx_ring);
149 static void e1000_set_multi(struct net_device *netdev);
150 static void e1000_update_phy_info(unsigned long data);
151 static void e1000_watchdog(unsigned long data);
152 static void e1000_watchdog_task(struct e1000_adapter *adapter);
153 static void e1000_82547_tx_fifo_stall(unsigned long data);
154 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
155 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
156 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
157 static int e1000_set_mac(struct net_device *netdev, void *p);
158 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
159 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
160 struct e1000_tx_ring *tx_ring);
161 #ifdef CONFIG_E1000_NAPI
162 static int e1000_clean(struct net_device *poll_dev, int *budget);
163 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
164 struct e1000_rx_ring *rx_ring,
165 int *work_done, int work_to_do);
166 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
167 struct e1000_rx_ring *rx_ring,
168 int *work_done, int work_to_do);
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
173 struct e1000_rx_ring *rx_ring);
175 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring,
178 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
179 struct e1000_rx_ring *rx_ring,
181 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
182 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
184 void e1000_set_ethtool_ops(struct net_device *netdev);
185 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
186 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
187 static void e1000_tx_timeout(struct net_device *dev);
188 static void e1000_tx_timeout_task(struct net_device *dev);
189 static void e1000_smartspeed(struct e1000_adapter *adapter);
190 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
191 struct sk_buff *skb);
193 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
194 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
195 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
196 static void e1000_restore_vlan(struct e1000_adapter *adapter);
199 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
200 static int e1000_resume(struct pci_dev *pdev);
203 #ifdef CONFIG_NET_POLL_CONTROLLER
204 /* for netdump / net console */
205 static void e1000_netpoll (struct net_device *netdev);
208 #ifdef CONFIG_E1000_MQ
209 /* for multiple Rx queues */
210 void e1000_rx_schedule(void *data);
213 /* Exported from other modules */
215 extern void e1000_check_options(struct e1000_adapter *adapter);
217 static struct pci_driver e1000_driver = {
218 .name = e1000_driver_name,
219 .id_table = e1000_pci_tbl,
220 .probe = e1000_probe,
221 .remove = __devexit_p(e1000_remove),
222 /* Power Managment Hooks */
224 .suspend = e1000_suspend,
225 .resume = e1000_resume
229 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
230 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
231 MODULE_LICENSE("GPL");
232 MODULE_VERSION(DRV_VERSION);
234 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
235 module_param(debug, int, 0);
236 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
239 * e1000_init_module - Driver Registration Routine
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
246 e1000_init_module(void)
249 printk(KERN_INFO "%s - version %s\n",
250 e1000_driver_string, e1000_driver_version);
252 printk(KERN_INFO "%s\n", e1000_copyright);
254 ret = pci_module_init(&e1000_driver);
259 module_init(e1000_init_module);
262 * e1000_exit_module - Driver Exit Cleanup Routine
264 * e1000_exit_module is called just before the driver is removed
269 e1000_exit_module(void)
271 pci_unregister_driver(&e1000_driver);
274 module_exit(e1000_exit_module);
277 * e1000_irq_disable - Mask off interrupt generation on the NIC
278 * @adapter: board private structure
282 e1000_irq_disable(struct e1000_adapter *adapter)
284 atomic_inc(&adapter->irq_sem);
285 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
286 E1000_WRITE_FLUSH(&adapter->hw);
287 synchronize_irq(adapter->pdev->irq);
291 * e1000_irq_enable - Enable default interrupt generation settings
292 * @adapter: board private structure
296 e1000_irq_enable(struct e1000_adapter *adapter)
298 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
299 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
300 E1000_WRITE_FLUSH(&adapter->hw);
305 e1000_update_mng_vlan(struct e1000_adapter *adapter)
307 struct net_device *netdev = adapter->netdev;
308 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
309 uint16_t old_vid = adapter->mng_vlan_id;
311 if(!adapter->vlgrp->vlan_devices[vid]) {
312 if(adapter->hw.mng_cookie.status &
313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
314 e1000_vlan_rx_add_vid(netdev, vid);
315 adapter->mng_vlan_id = vid;
317 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
319 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
321 !adapter->vlgrp->vlan_devices[old_vid])
322 e1000_vlan_rx_kill_vid(netdev, old_vid);
328 * e1000_release_hw_control - release control of the h/w to f/w
329 * @adapter: address of board private structure
331 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
332 * For ASF and Pass Through versions of f/w this means that the
333 * driver is no longer loaded. For AMT version (only with 82573) i
334 * of the f/w this means that the netowrk i/f is closed.
339 e1000_release_hw_control(struct e1000_adapter *adapter)
344 /* Let firmware taken over control of h/w */
345 switch (adapter->hw.mac_type) {
348 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
349 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
350 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
353 swsm = E1000_READ_REG(&adapter->hw, SWSM);
354 E1000_WRITE_REG(&adapter->hw, SWSM,
355 swsm & ~E1000_SWSM_DRV_LOAD);
362 * e1000_get_hw_control - get control of the h/w from f/w
363 * @adapter: address of board private structure
365 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
366 * For ASF and Pass Through versions of f/w this means that
367 * the driver is loaded. For AMT version (only with 82573)
368 * of the f/w this means that the netowrk i/f is open.
373 e1000_get_hw_control(struct e1000_adapter *adapter)
377 /* Let firmware know the driver has taken over */
378 switch (adapter->hw.mac_type) {
381 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
382 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
383 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
386 swsm = E1000_READ_REG(&adapter->hw, SWSM);
387 E1000_WRITE_REG(&adapter->hw, SWSM,
388 swsm | E1000_SWSM_DRV_LOAD);
396 e1000_up(struct e1000_adapter *adapter)
398 struct net_device *netdev = adapter->netdev;
401 /* hardware has been reset, we need to reload some things */
403 /* Reset the PHY if it was previously powered down */
404 if(adapter->hw.media_type == e1000_media_type_copper) {
406 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
407 if(mii_reg & MII_CR_POWER_DOWN)
408 e1000_phy_reset(&adapter->hw);
411 e1000_set_multi(netdev);
413 e1000_restore_vlan(adapter);
415 e1000_configure_tx(adapter);
416 e1000_setup_rctl(adapter);
417 e1000_configure_rx(adapter);
418 /* call E1000_DESC_UNUSED which always leaves
419 * at least 1 descriptor unused to make sure
420 * next_to_use != next_to_clean */
421 for (i = 0; i < adapter->num_rx_queues; i++) {
422 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
423 adapter->alloc_rx_buf(adapter, ring,
424 E1000_DESC_UNUSED(ring));
427 #ifdef CONFIG_PCI_MSI
428 if(adapter->hw.mac_type > e1000_82547_rev_2) {
429 adapter->have_msi = TRUE;
430 if((err = pci_enable_msi(adapter->pdev))) {
432 "Unable to allocate MSI interrupt Error: %d\n", err);
433 adapter->have_msi = FALSE;
437 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
438 SA_SHIRQ | SA_SAMPLE_RANDOM,
439 netdev->name, netdev))) {
441 "Unable to allocate interrupt Error: %d\n", err);
445 #ifdef CONFIG_E1000_MQ
446 e1000_setup_queue_mapping(adapter);
449 adapter->tx_queue_len = netdev->tx_queue_len;
451 mod_timer(&adapter->watchdog_timer, jiffies);
453 #ifdef CONFIG_E1000_NAPI
454 netif_poll_enable(netdev);
456 e1000_irq_enable(adapter);
462 e1000_down(struct e1000_adapter *adapter)
464 struct net_device *netdev = adapter->netdev;
465 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
466 e1000_check_mng_mode(&adapter->hw);
468 e1000_irq_disable(adapter);
469 #ifdef CONFIG_E1000_MQ
470 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
472 free_irq(adapter->pdev->irq, netdev);
473 #ifdef CONFIG_PCI_MSI
474 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
475 adapter->have_msi == TRUE)
476 pci_disable_msi(adapter->pdev);
478 del_timer_sync(&adapter->tx_fifo_stall_timer);
479 del_timer_sync(&adapter->watchdog_timer);
480 del_timer_sync(&adapter->phy_info_timer);
482 #ifdef CONFIG_E1000_NAPI
483 netif_poll_disable(netdev);
485 netdev->tx_queue_len = adapter->tx_queue_len;
486 adapter->link_speed = 0;
487 adapter->link_duplex = 0;
488 netif_carrier_off(netdev);
489 netif_stop_queue(netdev);
491 e1000_reset(adapter);
492 e1000_clean_all_tx_rings(adapter);
493 e1000_clean_all_rx_rings(adapter);
495 /* Power down the PHY so no link is implied when interface is down *
496 * The PHY cannot be powered down if any of the following is TRUE *
499 * (c) SoL/IDER session is active */
500 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
501 adapter->hw.media_type == e1000_media_type_copper &&
502 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
504 !e1000_check_phy_reset_block(&adapter->hw)) {
506 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
507 mii_reg |= MII_CR_POWER_DOWN;
508 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
514 e1000_reset(struct e1000_adapter *adapter)
517 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
519 /* Repartition Pba for greater than 9k mtu
520 * To take effect CTRL.RST is required.
523 switch (adapter->hw.mac_type) {
525 case e1000_82547_rev_2:
540 if((adapter->hw.mac_type != e1000_82573) &&
541 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
542 pba -= 8; /* allocate more FIFO for Tx */
545 if(adapter->hw.mac_type == e1000_82547) {
546 adapter->tx_fifo_head = 0;
547 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
548 adapter->tx_fifo_size =
549 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
550 atomic_set(&adapter->tx_fifo_stall, 0);
553 E1000_WRITE_REG(&adapter->hw, PBA, pba);
555 /* flow control settings */
556 /* Set the FC high water mark to 90% of the FIFO size.
557 * Required to clear last 3 LSB */
558 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
560 adapter->hw.fc_high_water = fc_high_water_mark;
561 adapter->hw.fc_low_water = fc_high_water_mark - 8;
562 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
563 adapter->hw.fc_send_xon = 1;
564 adapter->hw.fc = adapter->hw.original_fc;
566 /* Allow time for pending master requests to run */
567 e1000_reset_hw(&adapter->hw);
568 if(adapter->hw.mac_type >= e1000_82544)
569 E1000_WRITE_REG(&adapter->hw, WUC, 0);
570 if(e1000_init_hw(&adapter->hw))
571 DPRINTK(PROBE, ERR, "Hardware Error\n");
572 e1000_update_mng_vlan(adapter);
573 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
574 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
576 e1000_reset_adaptive(&adapter->hw);
577 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
578 if (adapter->en_mng_pt) {
579 manc = E1000_READ_REG(&adapter->hw, MANC);
580 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
581 E1000_WRITE_REG(&adapter->hw, MANC, manc);
586 * e1000_probe - Device Initialization Routine
587 * @pdev: PCI device information struct
588 * @ent: entry in e1000_pci_tbl
590 * Returns 0 on success, negative on failure
592 * e1000_probe initializes an adapter identified by a pci_dev structure.
593 * The OS initialization, configuring of the adapter private structure,
594 * and a hardware reset occur.
598 e1000_probe(struct pci_dev *pdev,
599 const struct pci_device_id *ent)
601 struct net_device *netdev;
602 struct e1000_adapter *adapter;
603 unsigned long mmio_start, mmio_len;
605 static int cards_found = 0;
606 int i, err, pci_using_dac;
607 uint16_t eeprom_data;
608 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
609 if((err = pci_enable_device(pdev)))
612 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
615 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
616 E1000_ERR("No usable DMA configuration, aborting\n");
622 if((err = pci_request_regions(pdev, e1000_driver_name)))
625 pci_set_master(pdev);
627 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
630 goto err_alloc_etherdev;
633 SET_MODULE_OWNER(netdev);
634 SET_NETDEV_DEV(netdev, &pdev->dev);
636 pci_set_drvdata(pdev, netdev);
637 adapter = netdev_priv(netdev);
638 adapter->netdev = netdev;
639 adapter->pdev = pdev;
640 adapter->hw.back = adapter;
641 adapter->msg_enable = (1 << debug) - 1;
643 mmio_start = pci_resource_start(pdev, BAR_0);
644 mmio_len = pci_resource_len(pdev, BAR_0);
646 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
647 if(!adapter->hw.hw_addr) {
652 for(i = BAR_1; i <= BAR_5; i++) {
653 if(pci_resource_len(pdev, i) == 0)
655 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
656 adapter->hw.io_base = pci_resource_start(pdev, i);
661 netdev->open = &e1000_open;
662 netdev->stop = &e1000_close;
663 netdev->hard_start_xmit = &e1000_xmit_frame;
664 netdev->get_stats = &e1000_get_stats;
665 netdev->set_multicast_list = &e1000_set_multi;
666 netdev->set_mac_address = &e1000_set_mac;
667 netdev->change_mtu = &e1000_change_mtu;
668 netdev->do_ioctl = &e1000_ioctl;
669 e1000_set_ethtool_ops(netdev);
670 netdev->tx_timeout = &e1000_tx_timeout;
671 netdev->watchdog_timeo = 5 * HZ;
672 #ifdef CONFIG_E1000_NAPI
673 netdev->poll = &e1000_clean;
676 netdev->vlan_rx_register = e1000_vlan_rx_register;
677 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
678 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
679 #ifdef CONFIG_NET_POLL_CONTROLLER
680 netdev->poll_controller = e1000_netpoll;
682 strcpy(netdev->name, pci_name(pdev));
684 netdev->mem_start = mmio_start;
685 netdev->mem_end = mmio_start + mmio_len;
686 netdev->base_addr = adapter->hw.io_base;
688 adapter->bd_number = cards_found;
690 /* setup the private structure */
692 if((err = e1000_sw_init(adapter)))
695 if((err = e1000_check_phy_reset_block(&adapter->hw)))
696 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
698 if(adapter->hw.mac_type >= e1000_82543) {
699 netdev->features = NETIF_F_SG |
703 NETIF_F_HW_VLAN_FILTER;
707 if((adapter->hw.mac_type >= e1000_82544) &&
708 (adapter->hw.mac_type != e1000_82547))
709 netdev->features |= NETIF_F_TSO;
711 #ifdef NETIF_F_TSO_IPV6
712 if(adapter->hw.mac_type > e1000_82547_rev_2)
713 netdev->features |= NETIF_F_TSO_IPV6;
717 netdev->features |= NETIF_F_HIGHDMA;
719 /* hard_start_xmit is safe against parallel locking */
720 netdev->features |= NETIF_F_LLTX;
722 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
724 /* before reading the EEPROM, reset the controller to
725 * put the device in a known good starting state */
727 e1000_reset_hw(&adapter->hw);
729 /* make sure the EEPROM is good */
731 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
732 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
737 /* copy the MAC address out of the EEPROM */
739 if(e1000_read_mac_addr(&adapter->hw))
740 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
741 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
742 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
744 if(!is_valid_ether_addr(netdev->perm_addr)) {
745 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
750 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
752 e1000_get_bus_info(&adapter->hw);
754 init_timer(&adapter->tx_fifo_stall_timer);
755 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
756 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
758 init_timer(&adapter->watchdog_timer);
759 adapter->watchdog_timer.function = &e1000_watchdog;
760 adapter->watchdog_timer.data = (unsigned long) adapter;
762 INIT_WORK(&adapter->watchdog_task,
763 (void (*)(void *))e1000_watchdog_task, adapter);
765 init_timer(&adapter->phy_info_timer);
766 adapter->phy_info_timer.function = &e1000_update_phy_info;
767 adapter->phy_info_timer.data = (unsigned long) adapter;
769 INIT_WORK(&adapter->tx_timeout_task,
770 (void (*)(void *))e1000_tx_timeout_task, netdev);
772 /* we're going to reset, so assume we have no link for now */
774 netif_carrier_off(netdev);
775 netif_stop_queue(netdev);
777 e1000_check_options(adapter);
779 /* Initial Wake on LAN setting
780 * If APM wake is enabled in the EEPROM,
781 * enable the ACPI Magic Packet filter
784 switch(adapter->hw.mac_type) {
785 case e1000_82542_rev2_0:
786 case e1000_82542_rev2_1:
790 e1000_read_eeprom(&adapter->hw,
791 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
792 eeprom_apme_mask = E1000_EEPROM_82544_APM;
795 case e1000_82546_rev_3:
797 if(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
798 e1000_read_eeprom(&adapter->hw,
799 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
804 e1000_read_eeprom(&adapter->hw,
805 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
808 if(eeprom_data & eeprom_apme_mask)
809 adapter->wol |= E1000_WUFC_MAG;
811 /* print bus type/speed/width info */
813 struct e1000_hw *hw = &adapter->hw;
814 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
815 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
816 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
817 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
818 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
819 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
820 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
821 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
822 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
823 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
824 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
828 for (i = 0; i < 6; i++)
829 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
831 /* reset the hardware with the new settings */
832 e1000_reset(adapter);
834 /* If the controller is 82573 and f/w is AMT, do not set
835 * DRV_LOAD until the interface is up. For all other cases,
836 * let the f/w know that the h/w is now under the control
838 if (adapter->hw.mac_type != e1000_82573 ||
839 !e1000_check_mng_mode(&adapter->hw))
840 e1000_get_hw_control(adapter);
842 strcpy(netdev->name, "eth%d");
843 if((err = register_netdev(netdev)))
846 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
854 iounmap(adapter->hw.hw_addr);
858 pci_release_regions(pdev);
863 * e1000_remove - Device Removal Routine
864 * @pdev: PCI device information struct
866 * e1000_remove is called by the PCI subsystem to alert the driver
867 * that it should release a PCI device. The could be caused by a
868 * Hot-Plug event, or because the driver is going to be removed from
872 static void __devexit
873 e1000_remove(struct pci_dev *pdev)
875 struct net_device *netdev = pci_get_drvdata(pdev);
876 struct e1000_adapter *adapter = netdev_priv(netdev);
878 #ifdef CONFIG_E1000_NAPI
882 flush_scheduled_work();
884 if(adapter->hw.mac_type >= e1000_82540 &&
885 adapter->hw.media_type == e1000_media_type_copper) {
886 manc = E1000_READ_REG(&adapter->hw, MANC);
887 if(manc & E1000_MANC_SMBUS_EN) {
888 manc |= E1000_MANC_ARP_EN;
889 E1000_WRITE_REG(&adapter->hw, MANC, manc);
893 /* Release control of h/w to f/w. If f/w is AMT enabled, this
894 * would have already happened in close and is redundant. */
895 e1000_release_hw_control(adapter);
897 unregister_netdev(netdev);
898 #ifdef CONFIG_E1000_NAPI
899 for (i = 0; i < adapter->num_rx_queues; i++)
900 __dev_put(&adapter->polling_netdev[i]);
903 if(!e1000_check_phy_reset_block(&adapter->hw))
904 e1000_phy_hw_reset(&adapter->hw);
906 kfree(adapter->tx_ring);
907 kfree(adapter->rx_ring);
908 #ifdef CONFIG_E1000_NAPI
909 kfree(adapter->polling_netdev);
912 iounmap(adapter->hw.hw_addr);
913 pci_release_regions(pdev);
915 #ifdef CONFIG_E1000_MQ
916 free_percpu(adapter->cpu_netdev);
917 free_percpu(adapter->cpu_tx_ring);
921 pci_disable_device(pdev);
925 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
926 * @adapter: board private structure to initialize
928 * e1000_sw_init initializes the Adapter private data structure.
929 * Fields are initialized based on PCI device information and
930 * OS network device settings (MTU size).
934 e1000_sw_init(struct e1000_adapter *adapter)
936 struct e1000_hw *hw = &adapter->hw;
937 struct net_device *netdev = adapter->netdev;
938 struct pci_dev *pdev = adapter->pdev;
939 #ifdef CONFIG_E1000_NAPI
943 /* PCI config space info */
945 hw->vendor_id = pdev->vendor;
946 hw->device_id = pdev->device;
947 hw->subsystem_vendor_id = pdev->subsystem_vendor;
948 hw->subsystem_id = pdev->subsystem_device;
950 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
952 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
954 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
955 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
956 hw->max_frame_size = netdev->mtu +
957 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
958 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
960 /* identify the MAC */
962 if(e1000_set_mac_type(hw)) {
963 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
967 /* initialize eeprom parameters */
969 if(e1000_init_eeprom_params(hw)) {
970 E1000_ERR("EEPROM initialization failed\n");
974 switch(hw->mac_type) {
979 case e1000_82541_rev_2:
980 case e1000_82547_rev_2:
981 hw->phy_init_script = 1;
985 e1000_set_media_type(hw);
987 hw->wait_autoneg_complete = FALSE;
988 hw->tbi_compatibility_en = TRUE;
989 hw->adaptive_ifs = TRUE;
993 if(hw->media_type == e1000_media_type_copper) {
994 hw->mdix = AUTO_ALL_MODES;
995 hw->disable_polarity_correction = FALSE;
996 hw->master_slave = E1000_MASTER_SLAVE;
999 #ifdef CONFIG_E1000_MQ
1000 /* Number of supported queues */
1001 switch (hw->mac_type) {
1004 /* These controllers support 2 tx queues, but with a single
1005 * qdisc implementation, multiple tx queues aren't quite as
1006 * interesting. If we can find a logical way of mapping
1007 * flows to a queue, then perhaps we can up the num_tx_queue
1008 * count back to its default. Until then, we run the risk of
1009 * terrible performance due to SACK overload. */
1010 adapter->num_tx_queues = 1;
1011 adapter->num_rx_queues = 2;
1014 adapter->num_tx_queues = 1;
1015 adapter->num_rx_queues = 1;
1018 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
1019 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
1020 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
1021 adapter->num_rx_queues,
1022 ((adapter->num_rx_queues == 1)
1023 ? ((num_online_cpus() > 1)
1024 ? "(due to unsupported feature in current adapter)"
1025 : "(due to unsupported system configuration)")
1027 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1028 adapter->num_tx_queues);
1030 adapter->num_tx_queues = 1;
1031 adapter->num_rx_queues = 1;
1034 if (e1000_alloc_queues(adapter)) {
1035 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1039 #ifdef CONFIG_E1000_NAPI
1040 for (i = 0; i < adapter->num_rx_queues; i++) {
1041 adapter->polling_netdev[i].priv = adapter;
1042 adapter->polling_netdev[i].poll = &e1000_clean;
1043 adapter->polling_netdev[i].weight = 64;
1044 dev_hold(&adapter->polling_netdev[i]);
1045 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1047 spin_lock_init(&adapter->tx_queue_lock);
1050 atomic_set(&adapter->irq_sem, 1);
1051 spin_lock_init(&adapter->stats_lock);
1057 * e1000_alloc_queues - Allocate memory for all rings
1058 * @adapter: board private structure to initialize
1060 * We allocate one ring per queue at run-time since we don't know the
1061 * number of queues at compile-time. The polling_netdev array is
1062 * intended for Multiqueue, but should work fine with a single queue.
1065 static int __devinit
1066 e1000_alloc_queues(struct e1000_adapter *adapter)
1070 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1071 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1072 if (!adapter->tx_ring)
1074 memset(adapter->tx_ring, 0, size);
1076 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1077 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1078 if (!adapter->rx_ring) {
1079 kfree(adapter->tx_ring);
1082 memset(adapter->rx_ring, 0, size);
1084 #ifdef CONFIG_E1000_NAPI
1085 size = sizeof(struct net_device) * adapter->num_rx_queues;
1086 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1087 if (!adapter->polling_netdev) {
1088 kfree(adapter->tx_ring);
1089 kfree(adapter->rx_ring);
1092 memset(adapter->polling_netdev, 0, size);
1095 #ifdef CONFIG_E1000_MQ
1096 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1097 adapter->rx_sched_call_data.info = adapter->netdev;
1099 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1100 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1103 return E1000_SUCCESS;
1106 #ifdef CONFIG_E1000_MQ
1107 static void __devinit
1108 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1112 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1113 adapter->rx_sched_call_data.info = adapter->netdev;
1114 cpus_clear(adapter->rx_sched_call_data.cpumask);
1116 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1117 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1121 for_each_online_cpu(cpu) {
1122 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
1123 /* This is incomplete because we'd like to assign separate
1124 * physical cpus to these netdev polling structures and
1125 * avoid saturating a subset of cpus.
1127 if (i < adapter->num_rx_queues) {
1128 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1129 adapter->rx_ring[i].cpu = cpu;
1130 cpu_set(cpu, adapter->cpumask);
1132 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1136 unlock_cpu_hotplug();
1141 * e1000_open - Called when a network interface is made active
1142 * @netdev: network interface device structure
1144 * Returns 0 on success, negative value on failure
1146 * The open entry point is called when a network interface is made
1147 * active by the system (IFF_UP). At this point all resources needed
1148 * for transmit and receive operations are allocated, the interrupt
1149 * handler is registered with the OS, the watchdog timer is started,
1150 * and the stack is notified that the interface is ready.
1154 e1000_open(struct net_device *netdev)
1156 struct e1000_adapter *adapter = netdev_priv(netdev);
1159 /* allocate transmit descriptors */
1161 if ((err = e1000_setup_all_tx_resources(adapter)))
1164 /* allocate receive descriptors */
1166 if ((err = e1000_setup_all_rx_resources(adapter)))
1169 if((err = e1000_up(adapter)))
1171 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1172 if((adapter->hw.mng_cookie.status &
1173 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1174 e1000_update_mng_vlan(adapter);
1177 /* If AMT is enabled, let the firmware know that the network
1178 * interface is now open */
1179 if (adapter->hw.mac_type == e1000_82573 &&
1180 e1000_check_mng_mode(&adapter->hw))
1181 e1000_get_hw_control(adapter);
1183 return E1000_SUCCESS;
1186 e1000_free_all_rx_resources(adapter);
1188 e1000_free_all_tx_resources(adapter);
1190 e1000_reset(adapter);
1196 * e1000_close - Disables a network interface
1197 * @netdev: network interface device structure
1199 * Returns 0, this is not allowed to fail
1201 * The close entry point is called when an interface is de-activated
1202 * by the OS. The hardware is still under the drivers control, but
1203 * needs to be disabled. A global MAC reset is issued to stop the
1204 * hardware, and all transmit and receive resources are freed.
1208 e1000_close(struct net_device *netdev)
1210 struct e1000_adapter *adapter = netdev_priv(netdev);
1212 e1000_down(adapter);
1214 e1000_free_all_tx_resources(adapter);
1215 e1000_free_all_rx_resources(adapter);
1217 if((adapter->hw.mng_cookie.status &
1218 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1219 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1222 /* If AMT is enabled, let the firmware know that the network
1223 * interface is now closed */
1224 if (adapter->hw.mac_type == e1000_82573 &&
1225 e1000_check_mng_mode(&adapter->hw))
1226 e1000_release_hw_control(adapter);
1232 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1233 * @adapter: address of board private structure
1234 * @start: address of beginning of memory
1235 * @len: length of memory
1237 static inline boolean_t
1238 e1000_check_64k_bound(struct e1000_adapter *adapter,
1239 void *start, unsigned long len)
1241 unsigned long begin = (unsigned long) start;
1242 unsigned long end = begin + len;
1244 /* First rev 82545 and 82546 need to not allow any memory
1245 * write location to cross 64k boundary due to errata 23 */
1246 if (adapter->hw.mac_type == e1000_82545 ||
1247 adapter->hw.mac_type == e1000_82546) {
1248 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1255 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1256 * @adapter: board private structure
1257 * @txdr: tx descriptor ring (for a specific queue) to setup
1259 * Return 0 on success, negative on failure
1263 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1264 struct e1000_tx_ring *txdr)
1266 struct pci_dev *pdev = adapter->pdev;
1269 size = sizeof(struct e1000_buffer) * txdr->count;
1271 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1272 if(!txdr->buffer_info) {
1274 "Unable to allocate memory for the transmit descriptor ring\n");
1277 memset(txdr->buffer_info, 0, size);
1279 /* round up to nearest 4K */
1281 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1282 E1000_ROUNDUP(txdr->size, 4096);
1284 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1287 vfree(txdr->buffer_info);
1289 "Unable to allocate memory for the transmit descriptor ring\n");
1293 /* Fix for errata 23, can't cross 64kB boundary */
1294 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1295 void *olddesc = txdr->desc;
1296 dma_addr_t olddma = txdr->dma;
1297 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1298 "at %p\n", txdr->size, txdr->desc);
1299 /* Try again, without freeing the previous */
1300 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1302 /* Failed allocation, critical failure */
1303 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1304 goto setup_tx_desc_die;
1307 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1309 pci_free_consistent(pdev, txdr->size, txdr->desc,
1311 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1313 "Unable to allocate aligned memory "
1314 "for the transmit descriptor ring\n");
1315 vfree(txdr->buffer_info);
1318 /* Free old allocation, new allocation was successful */
1319 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1322 memset(txdr->desc, 0, txdr->size);
1324 txdr->next_to_use = 0;
1325 txdr->next_to_clean = 0;
1326 spin_lock_init(&txdr->tx_lock);
1332 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1333 * (Descriptors) for all queues
1334 * @adapter: board private structure
1336 * If this function returns with an error, then it's possible one or
1337 * more of the rings is populated (while the rest are not). It is the
1338 * callers duty to clean those orphaned rings.
1340 * Return 0 on success, negative on failure
1344 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1348 for (i = 0; i < adapter->num_tx_queues; i++) {
1349 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1352 "Allocation for Tx Queue %u failed\n", i);
1361 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1362 * @adapter: board private structure
1364 * Configure the Tx unit of the MAC after a reset.
1368 e1000_configure_tx(struct e1000_adapter *adapter)
1371 struct e1000_hw *hw = &adapter->hw;
1372 uint32_t tdlen, tctl, tipg, tarc;
1373 uint32_t ipgr1, ipgr2;
1375 /* Setup the HW Tx Head and Tail descriptor pointers */
1377 switch (adapter->num_tx_queues) {
1379 tdba = adapter->tx_ring[1].dma;
1380 tdlen = adapter->tx_ring[1].count *
1381 sizeof(struct e1000_tx_desc);
1382 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1383 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1384 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1385 E1000_WRITE_REG(hw, TDH1, 0);
1386 E1000_WRITE_REG(hw, TDT1, 0);
1387 adapter->tx_ring[1].tdh = E1000_TDH1;
1388 adapter->tx_ring[1].tdt = E1000_TDT1;
1392 tdba = adapter->tx_ring[0].dma;
1393 tdlen = adapter->tx_ring[0].count *
1394 sizeof(struct e1000_tx_desc);
1395 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1396 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1397 E1000_WRITE_REG(hw, TDLEN, tdlen);
1398 E1000_WRITE_REG(hw, TDH, 0);
1399 E1000_WRITE_REG(hw, TDT, 0);
1400 adapter->tx_ring[0].tdh = E1000_TDH;
1401 adapter->tx_ring[0].tdt = E1000_TDT;
1405 /* Set the default values for the Tx Inter Packet Gap timer */
1407 if (hw->media_type == e1000_media_type_fiber ||
1408 hw->media_type == e1000_media_type_internal_serdes)
1409 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1411 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1413 switch (hw->mac_type) {
1414 case e1000_82542_rev2_0:
1415 case e1000_82542_rev2_1:
1416 tipg = DEFAULT_82542_TIPG_IPGT;
1417 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1418 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1421 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1422 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1425 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1426 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1427 E1000_WRITE_REG(hw, TIPG, tipg);
1429 /* Set the Tx Interrupt Delay register */
1431 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1432 if (hw->mac_type >= e1000_82540)
1433 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1435 /* Program the Transmit Control Register */
1437 tctl = E1000_READ_REG(hw, TCTL);
1439 tctl &= ~E1000_TCTL_CT;
1440 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1441 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1443 E1000_WRITE_REG(hw, TCTL, tctl);
1445 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1446 tarc = E1000_READ_REG(hw, TARC0);
1447 tarc |= ((1 << 25) | (1 << 21));
1448 E1000_WRITE_REG(hw, TARC0, tarc);
1449 tarc = E1000_READ_REG(hw, TARC1);
1451 if (tctl & E1000_TCTL_MULR)
1455 E1000_WRITE_REG(hw, TARC1, tarc);
1458 e1000_config_collision_dist(hw);
1460 /* Setup Transmit Descriptor Settings for eop descriptor */
1461 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1464 if (hw->mac_type < e1000_82543)
1465 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1467 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1469 /* Cache if we're 82544 running in PCI-X because we'll
1470 * need this to apply a workaround later in the send path. */
1471 if (hw->mac_type == e1000_82544 &&
1472 hw->bus_type == e1000_bus_type_pcix)
1473 adapter->pcix_82544 = 1;
1477 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1478 * @adapter: board private structure
1479 * @rxdr: rx descriptor ring (for a specific queue) to setup
1481 * Returns 0 on success, negative on failure
1485 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1486 struct e1000_rx_ring *rxdr)
1488 struct pci_dev *pdev = adapter->pdev;
1491 size = sizeof(struct e1000_buffer) * rxdr->count;
1492 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1493 if (!rxdr->buffer_info) {
1495 "Unable to allocate memory for the receive descriptor ring\n");
1498 memset(rxdr->buffer_info, 0, size);
1500 size = sizeof(struct e1000_ps_page) * rxdr->count;
1501 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1502 if(!rxdr->ps_page) {
1503 vfree(rxdr->buffer_info);
1505 "Unable to allocate memory for the receive descriptor ring\n");
1508 memset(rxdr->ps_page, 0, size);
1510 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1511 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1512 if(!rxdr->ps_page_dma) {
1513 vfree(rxdr->buffer_info);
1514 kfree(rxdr->ps_page);
1516 "Unable to allocate memory for the receive descriptor ring\n");
1519 memset(rxdr->ps_page_dma, 0, size);
1521 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1522 desc_len = sizeof(struct e1000_rx_desc);
1524 desc_len = sizeof(union e1000_rx_desc_packet_split);
1526 /* Round up to nearest 4K */
1528 rxdr->size = rxdr->count * desc_len;
1529 E1000_ROUNDUP(rxdr->size, 4096);
1531 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1535 "Unable to allocate memory for the receive descriptor ring\n");
1537 vfree(rxdr->buffer_info);
1538 kfree(rxdr->ps_page);
1539 kfree(rxdr->ps_page_dma);
1543 /* Fix for errata 23, can't cross 64kB boundary */
1544 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1545 void *olddesc = rxdr->desc;
1546 dma_addr_t olddma = rxdr->dma;
1547 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1548 "at %p\n", rxdr->size, rxdr->desc);
1549 /* Try again, without freeing the previous */
1550 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1551 /* Failed allocation, critical failure */
1553 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1555 "Unable to allocate memory "
1556 "for the receive descriptor ring\n");
1557 goto setup_rx_desc_die;
1560 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1562 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1564 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1566 "Unable to allocate aligned memory "
1567 "for the receive descriptor ring\n");
1568 goto setup_rx_desc_die;
1570 /* Free old allocation, new allocation was successful */
1571 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1574 memset(rxdr->desc, 0, rxdr->size);
1576 rxdr->next_to_clean = 0;
1577 rxdr->next_to_use = 0;
1578 rxdr->rx_skb_top = NULL;
1579 rxdr->rx_skb_prev = NULL;
1585 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1586 * (Descriptors) for all queues
1587 * @adapter: board private structure
1589 * If this function returns with an error, then it's possible one or
1590 * more of the rings is populated (while the rest are not). It is the
1591 * callers duty to clean those orphaned rings.
1593 * Return 0 on success, negative on failure
1597 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1601 for (i = 0; i < adapter->num_rx_queues; i++) {
1602 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1605 "Allocation for Rx Queue %u failed\n", i);
1614 * e1000_setup_rctl - configure the receive control registers
1615 * @adapter: Board private structure
1617 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1618 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1620 e1000_setup_rctl(struct e1000_adapter *adapter)
1622 uint32_t rctl, rfctl;
1623 uint32_t psrctl = 0;
1624 #ifdef CONFIG_E1000_PACKET_SPLIT
1628 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1630 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1632 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1633 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1634 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1636 if (adapter->hw.mac_type > e1000_82543)
1637 rctl |= E1000_RCTL_SECRC;
1639 if (adapter->hw.tbi_compatibility_on == 1)
1640 rctl |= E1000_RCTL_SBP;
1642 rctl &= ~E1000_RCTL_SBP;
1644 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1645 rctl &= ~E1000_RCTL_LPE;
1647 rctl |= E1000_RCTL_LPE;
1649 /* Setup buffer sizes */
1650 if(adapter->hw.mac_type >= e1000_82571) {
1651 /* We can now specify buffers in 1K increments.
1652 * BSIZE and BSEX are ignored in this case. */
1653 rctl |= adapter->rx_buffer_len << 0x11;
1655 rctl &= ~E1000_RCTL_SZ_4096;
1656 rctl |= E1000_RCTL_BSEX;
1657 switch (adapter->rx_buffer_len) {
1658 case E1000_RXBUFFER_2048:
1660 rctl |= E1000_RCTL_SZ_2048;
1661 rctl &= ~E1000_RCTL_BSEX;
1663 case E1000_RXBUFFER_4096:
1664 rctl |= E1000_RCTL_SZ_4096;
1666 case E1000_RXBUFFER_8192:
1667 rctl |= E1000_RCTL_SZ_8192;
1669 case E1000_RXBUFFER_16384:
1670 rctl |= E1000_RCTL_SZ_16384;
1675 #ifdef CONFIG_E1000_PACKET_SPLIT
1676 /* 82571 and greater support packet-split where the protocol
1677 * header is placed in skb->data and the packet data is
1678 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1679 * In the case of a non-split, skb->data is linearly filled,
1680 * followed by the page buffers. Therefore, skb->data is
1681 * sized to hold the largest protocol header.
1683 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1684 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1686 adapter->rx_ps_pages = pages;
1688 adapter->rx_ps_pages = 0;
1690 if (adapter->rx_ps_pages) {
1691 /* Configure extra packet-split registers */
1692 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1693 rfctl |= E1000_RFCTL_EXTEN;
1694 /* disable IPv6 packet split support */
1695 rfctl |= E1000_RFCTL_IPV6_DIS;
1696 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1698 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1700 psrctl |= adapter->rx_ps_bsize0 >>
1701 E1000_PSRCTL_BSIZE0_SHIFT;
1703 switch (adapter->rx_ps_pages) {
1705 psrctl |= PAGE_SIZE <<
1706 E1000_PSRCTL_BSIZE3_SHIFT;
1708 psrctl |= PAGE_SIZE <<
1709 E1000_PSRCTL_BSIZE2_SHIFT;
1711 psrctl |= PAGE_SIZE >>
1712 E1000_PSRCTL_BSIZE1_SHIFT;
1716 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1719 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1723 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1724 * @adapter: board private structure
1726 * Configure the Rx unit of the MAC after a reset.
1730 e1000_configure_rx(struct e1000_adapter *adapter)
1733 struct e1000_hw *hw = &adapter->hw;
1734 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1735 #ifdef CONFIG_E1000_MQ
1736 uint32_t reta, mrqc;
1740 if (adapter->rx_ps_pages) {
1741 rdlen = adapter->rx_ring[0].count *
1742 sizeof(union e1000_rx_desc_packet_split);
1743 adapter->clean_rx = e1000_clean_rx_irq_ps;
1744 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1746 rdlen = adapter->rx_ring[0].count *
1747 sizeof(struct e1000_rx_desc);
1748 adapter->clean_rx = e1000_clean_rx_irq;
1749 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1752 /* disable receives while setting up the descriptors */
1753 rctl = E1000_READ_REG(hw, RCTL);
1754 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1756 /* set the Receive Delay Timer Register */
1757 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1759 if (hw->mac_type >= e1000_82540) {
1760 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1761 if(adapter->itr > 1)
1762 E1000_WRITE_REG(hw, ITR,
1763 1000000000 / (adapter->itr * 256));
1766 if (hw->mac_type >= e1000_82571) {
1767 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1768 /* Reset delay timers after every interrupt */
1769 ctrl_ext |= E1000_CTRL_EXT_CANC;
1770 #ifdef CONFIG_E1000_NAPI
1771 /* Auto-Mask interrupts upon ICR read. */
1772 ctrl_ext |= E1000_CTRL_EXT_IAME;
1774 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1775 E1000_WRITE_REG(hw, IAM, ~0);
1776 E1000_WRITE_FLUSH(hw);
1779 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1780 * the Base and Length of the Rx Descriptor Ring */
1781 switch (adapter->num_rx_queues) {
1782 #ifdef CONFIG_E1000_MQ
1784 rdba = adapter->rx_ring[1].dma;
1785 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1786 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1787 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1788 E1000_WRITE_REG(hw, RDH1, 0);
1789 E1000_WRITE_REG(hw, RDT1, 0);
1790 adapter->rx_ring[1].rdh = E1000_RDH1;
1791 adapter->rx_ring[1].rdt = E1000_RDT1;
1796 rdba = adapter->rx_ring[0].dma;
1797 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1798 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1799 E1000_WRITE_REG(hw, RDLEN, rdlen);
1800 E1000_WRITE_REG(hw, RDH, 0);
1801 E1000_WRITE_REG(hw, RDT, 0);
1802 adapter->rx_ring[0].rdh = E1000_RDH;
1803 adapter->rx_ring[0].rdt = E1000_RDT;
1807 #ifdef CONFIG_E1000_MQ
1808 if (adapter->num_rx_queues > 1) {
1809 uint32_t random[10];
1811 get_random_bytes(&random[0], 40);
1813 if (hw->mac_type <= e1000_82572) {
1814 E1000_WRITE_REG(hw, RSSIR, 0);
1815 E1000_WRITE_REG(hw, RSSIM, 0);
1818 switch (adapter->num_rx_queues) {
1822 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1826 /* Fill out redirection table */
1827 for (i = 0; i < 32; i++)
1828 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1829 /* Fill out hash function seeds */
1830 for (i = 0; i < 10; i++)
1831 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1833 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1834 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1835 E1000_WRITE_REG(hw, MRQC, mrqc);
1838 /* Multiqueue and packet checksumming are mutually exclusive. */
1839 if (hw->mac_type >= e1000_82571) {
1840 rxcsum = E1000_READ_REG(hw, RXCSUM);
1841 rxcsum |= E1000_RXCSUM_PCSD;
1842 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1847 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1848 if (hw->mac_type >= e1000_82543) {
1849 rxcsum = E1000_READ_REG(hw, RXCSUM);
1850 if(adapter->rx_csum == TRUE) {
1851 rxcsum |= E1000_RXCSUM_TUOFL;
1853 /* Enable 82571 IPv4 payload checksum for UDP fragments
1854 * Must be used in conjunction with packet-split. */
1855 if ((hw->mac_type >= e1000_82571) &&
1856 (adapter->rx_ps_pages)) {
1857 rxcsum |= E1000_RXCSUM_IPPCSE;
1860 rxcsum &= ~E1000_RXCSUM_TUOFL;
1861 /* don't need to clear IPPCSE as it defaults to 0 */
1863 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1865 #endif /* CONFIG_E1000_MQ */
1867 if (hw->mac_type == e1000_82573)
1868 E1000_WRITE_REG(hw, ERT, 0x0100);
1870 /* Enable Receives */
1871 E1000_WRITE_REG(hw, RCTL, rctl);
1875 * e1000_free_tx_resources - Free Tx Resources per Queue
1876 * @adapter: board private structure
1877 * @tx_ring: Tx descriptor ring for a specific queue
1879 * Free all transmit software resources
1883 e1000_free_tx_resources(struct e1000_adapter *adapter,
1884 struct e1000_tx_ring *tx_ring)
1886 struct pci_dev *pdev = adapter->pdev;
1888 e1000_clean_tx_ring(adapter, tx_ring);
1890 vfree(tx_ring->buffer_info);
1891 tx_ring->buffer_info = NULL;
1893 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1895 tx_ring->desc = NULL;
1899 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1900 * @adapter: board private structure
1902 * Free all transmit software resources
1906 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1910 for (i = 0; i < adapter->num_tx_queues; i++)
1911 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1915 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1916 struct e1000_buffer *buffer_info)
1918 if(buffer_info->dma) {
1919 pci_unmap_page(adapter->pdev,
1921 buffer_info->length,
1923 buffer_info->dma = 0;
1925 if(buffer_info->skb) {
1926 dev_kfree_skb_any(buffer_info->skb);
1927 buffer_info->skb = NULL;
1932 * e1000_clean_tx_ring - Free Tx Buffers
1933 * @adapter: board private structure
1934 * @tx_ring: ring to be cleaned
1938 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1939 struct e1000_tx_ring *tx_ring)
1941 struct e1000_buffer *buffer_info;
1945 /* Free all the Tx ring sk_buffs */
1947 for(i = 0; i < tx_ring->count; i++) {
1948 buffer_info = &tx_ring->buffer_info[i];
1949 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1952 size = sizeof(struct e1000_buffer) * tx_ring->count;
1953 memset(tx_ring->buffer_info, 0, size);
1955 /* Zero out the descriptor ring */
1957 memset(tx_ring->desc, 0, tx_ring->size);
1959 tx_ring->next_to_use = 0;
1960 tx_ring->next_to_clean = 0;
1961 tx_ring->last_tx_tso = 0;
1963 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1964 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1968 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1969 * @adapter: board private structure
1973 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1977 for (i = 0; i < adapter->num_tx_queues; i++)
1978 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1982 * e1000_free_rx_resources - Free Rx Resources
1983 * @adapter: board private structure
1984 * @rx_ring: ring to clean the resources from
1986 * Free all receive software resources
1990 e1000_free_rx_resources(struct e1000_adapter *adapter,
1991 struct e1000_rx_ring *rx_ring)
1993 struct pci_dev *pdev = adapter->pdev;
1995 e1000_clean_rx_ring(adapter, rx_ring);
1997 vfree(rx_ring->buffer_info);
1998 rx_ring->buffer_info = NULL;
1999 kfree(rx_ring->ps_page);
2000 rx_ring->ps_page = NULL;
2001 kfree(rx_ring->ps_page_dma);
2002 rx_ring->ps_page_dma = NULL;
2004 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2006 rx_ring->desc = NULL;
2010 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2011 * @adapter: board private structure
2013 * Free all receive software resources
2017 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2021 for (i = 0; i < adapter->num_rx_queues; i++)
2022 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2026 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2027 * @adapter: board private structure
2028 * @rx_ring: ring to free buffers from
2032 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2033 struct e1000_rx_ring *rx_ring)
2035 struct e1000_buffer *buffer_info;
2036 struct e1000_ps_page *ps_page;
2037 struct e1000_ps_page_dma *ps_page_dma;
2038 struct pci_dev *pdev = adapter->pdev;
2042 /* Free all the Rx ring sk_buffs */
2044 for(i = 0; i < rx_ring->count; i++) {
2045 buffer_info = &rx_ring->buffer_info[i];
2046 if(buffer_info->skb) {
2047 ps_page = &rx_ring->ps_page[i];
2048 ps_page_dma = &rx_ring->ps_page_dma[i];
2049 pci_unmap_single(pdev,
2051 buffer_info->length,
2052 PCI_DMA_FROMDEVICE);
2054 dev_kfree_skb(buffer_info->skb);
2055 buffer_info->skb = NULL;
2057 ps_page = &rx_ring->ps_page[i];
2058 ps_page_dma = &rx_ring->ps_page_dma[i];
2059 for (j = 0; j < adapter->rx_ps_pages; j++) {
2060 if (!ps_page->ps_page[j]) break;
2061 pci_unmap_page(pdev,
2062 ps_page_dma->ps_page_dma[j],
2063 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2064 ps_page_dma->ps_page_dma[j] = 0;
2065 put_page(ps_page->ps_page[j]);
2066 ps_page->ps_page[j] = NULL;
2070 /* there also may be some cached data in our adapter */
2071 if (rx_ring->rx_skb_top) {
2072 dev_kfree_skb(rx_ring->rx_skb_top);
2074 /* rx_skb_prev will be wiped out by rx_skb_top */
2075 rx_ring->rx_skb_top = NULL;
2076 rx_ring->rx_skb_prev = NULL;
2080 size = sizeof(struct e1000_buffer) * rx_ring->count;
2081 memset(rx_ring->buffer_info, 0, size);
2082 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2083 memset(rx_ring->ps_page, 0, size);
2084 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2085 memset(rx_ring->ps_page_dma, 0, size);
2087 /* Zero out the descriptor ring */
2089 memset(rx_ring->desc, 0, rx_ring->size);
2091 rx_ring->next_to_clean = 0;
2092 rx_ring->next_to_use = 0;
2094 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2095 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2099 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2100 * @adapter: board private structure
2104 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2108 for (i = 0; i < adapter->num_rx_queues; i++)
2109 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2112 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2113 * and memory write and invalidate disabled for certain operations
2116 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2118 struct net_device *netdev = adapter->netdev;
2121 e1000_pci_clear_mwi(&adapter->hw);
2123 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2124 rctl |= E1000_RCTL_RST;
2125 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2126 E1000_WRITE_FLUSH(&adapter->hw);
2129 if(netif_running(netdev))
2130 e1000_clean_all_rx_rings(adapter);
2134 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2136 struct net_device *netdev = adapter->netdev;
2139 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2140 rctl &= ~E1000_RCTL_RST;
2141 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2142 E1000_WRITE_FLUSH(&adapter->hw);
2145 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2146 e1000_pci_set_mwi(&adapter->hw);
2148 if(netif_running(netdev)) {
2149 e1000_configure_rx(adapter);
2150 /* No need to loop, because 82542 supports only 1 queue */
2151 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2152 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2157 * e1000_set_mac - Change the Ethernet Address of the NIC
2158 * @netdev: network interface device structure
2159 * @p: pointer to an address structure
2161 * Returns 0 on success, negative on failure
2165 e1000_set_mac(struct net_device *netdev, void *p)
2167 struct e1000_adapter *adapter = netdev_priv(netdev);
2168 struct sockaddr *addr = p;
2170 if(!is_valid_ether_addr(addr->sa_data))
2171 return -EADDRNOTAVAIL;
2173 /* 82542 2.0 needs to be in reset to write receive address registers */
2175 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2176 e1000_enter_82542_rst(adapter);
2178 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2179 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2181 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2183 /* With 82571 controllers, LAA may be overwritten (with the default)
2184 * due to controller reset from the other port. */
2185 if (adapter->hw.mac_type == e1000_82571) {
2186 /* activate the work around */
2187 adapter->hw.laa_is_present = 1;
2189 /* Hold a copy of the LAA in RAR[14] This is done so that
2190 * between the time RAR[0] gets clobbered and the time it
2191 * gets fixed (in e1000_watchdog), the actual LAA is in one
2192 * of the RARs and no incoming packets directed to this port
2193 * are dropped. Eventaully the LAA will be in RAR[0] and
2195 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2196 E1000_RAR_ENTRIES - 1);
2199 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2200 e1000_leave_82542_rst(adapter);
2206 * e1000_set_multi - Multicast and Promiscuous mode set
2207 * @netdev: network interface device structure
2209 * The set_multi entry point is called whenever the multicast address
2210 * list or the network interface flags are updated. This routine is
2211 * responsible for configuring the hardware for proper multicast,
2212 * promiscuous mode, and all-multi behavior.
2216 e1000_set_multi(struct net_device *netdev)
2218 struct e1000_adapter *adapter = netdev_priv(netdev);
2219 struct e1000_hw *hw = &adapter->hw;
2220 struct dev_mc_list *mc_ptr;
2222 uint32_t hash_value;
2223 int i, rar_entries = E1000_RAR_ENTRIES;
2225 /* reserve RAR[14] for LAA over-write work-around */
2226 if (adapter->hw.mac_type == e1000_82571)
2229 /* Check for Promiscuous and All Multicast modes */
2231 rctl = E1000_READ_REG(hw, RCTL);
2233 if(netdev->flags & IFF_PROMISC) {
2234 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2235 } else if(netdev->flags & IFF_ALLMULTI) {
2236 rctl |= E1000_RCTL_MPE;
2237 rctl &= ~E1000_RCTL_UPE;
2239 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2242 E1000_WRITE_REG(hw, RCTL, rctl);
2244 /* 82542 2.0 needs to be in reset to write receive address registers */
2246 if(hw->mac_type == e1000_82542_rev2_0)
2247 e1000_enter_82542_rst(adapter);
2249 /* load the first 14 multicast address into the exact filters 1-14
2250 * RAR 0 is used for the station MAC adddress
2251 * if there are not 14 addresses, go ahead and clear the filters
2252 * -- with 82571 controllers only 0-13 entries are filled here
2254 mc_ptr = netdev->mc_list;
2256 for(i = 1; i < rar_entries; i++) {
2258 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2259 mc_ptr = mc_ptr->next;
2261 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2262 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2266 /* clear the old settings from the multicast hash table */
2268 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2269 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2271 /* load any remaining addresses into the hash table */
2273 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2274 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2275 e1000_mta_set(hw, hash_value);
2278 if(hw->mac_type == e1000_82542_rev2_0)
2279 e1000_leave_82542_rst(adapter);
2282 /* Need to wait a few seconds after link up to get diagnostic information from
2286 e1000_update_phy_info(unsigned long data)
2288 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2289 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2293 * e1000_82547_tx_fifo_stall - Timer Call-back
2294 * @data: pointer to adapter cast into an unsigned long
2298 e1000_82547_tx_fifo_stall(unsigned long data)
2300 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2301 struct net_device *netdev = adapter->netdev;
2304 if(atomic_read(&adapter->tx_fifo_stall)) {
2305 if((E1000_READ_REG(&adapter->hw, TDT) ==
2306 E1000_READ_REG(&adapter->hw, TDH)) &&
2307 (E1000_READ_REG(&adapter->hw, TDFT) ==
2308 E1000_READ_REG(&adapter->hw, TDFH)) &&
2309 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2310 E1000_READ_REG(&adapter->hw, TDFHS))) {
2311 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2312 E1000_WRITE_REG(&adapter->hw, TCTL,
2313 tctl & ~E1000_TCTL_EN);
2314 E1000_WRITE_REG(&adapter->hw, TDFT,
2315 adapter->tx_head_addr);
2316 E1000_WRITE_REG(&adapter->hw, TDFH,
2317 adapter->tx_head_addr);
2318 E1000_WRITE_REG(&adapter->hw, TDFTS,
2319 adapter->tx_head_addr);
2320 E1000_WRITE_REG(&adapter->hw, TDFHS,
2321 adapter->tx_head_addr);
2322 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2323 E1000_WRITE_FLUSH(&adapter->hw);
2325 adapter->tx_fifo_head = 0;
2326 atomic_set(&adapter->tx_fifo_stall, 0);
2327 netif_wake_queue(netdev);
2329 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2335 * e1000_watchdog - Timer Call-back
2336 * @data: pointer to adapter cast into an unsigned long
2339 e1000_watchdog(unsigned long data)
2341 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2343 /* Do the rest outside of interrupt context */
2344 schedule_work(&adapter->watchdog_task);
2348 e1000_watchdog_task(struct e1000_adapter *adapter)
2350 struct net_device *netdev = adapter->netdev;
2351 struct e1000_tx_ring *txdr = adapter->tx_ring;
2354 e1000_check_for_link(&adapter->hw);
2355 if (adapter->hw.mac_type == e1000_82573) {
2356 e1000_enable_tx_pkt_filtering(&adapter->hw);
2357 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2358 e1000_update_mng_vlan(adapter);
2361 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2362 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2363 link = !adapter->hw.serdes_link_down;
2365 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2368 if(!netif_carrier_ok(netdev)) {
2369 e1000_get_speed_and_duplex(&adapter->hw,
2370 &adapter->link_speed,
2371 &adapter->link_duplex);
2373 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2374 adapter->link_speed,
2375 adapter->link_duplex == FULL_DUPLEX ?
2376 "Full Duplex" : "Half Duplex");
2378 /* tweak tx_queue_len according to speed/duplex */
2379 netdev->tx_queue_len = adapter->tx_queue_len;
2380 adapter->tx_timeout_factor = 1;
2381 if (adapter->link_duplex == HALF_DUPLEX) {
2382 switch (adapter->link_speed) {
2384 netdev->tx_queue_len = 10;
2385 adapter->tx_timeout_factor = 8;
2388 netdev->tx_queue_len = 100;
2393 netif_carrier_on(netdev);
2394 netif_wake_queue(netdev);
2395 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2396 adapter->smartspeed = 0;
2399 if(netif_carrier_ok(netdev)) {
2400 adapter->link_speed = 0;
2401 adapter->link_duplex = 0;
2402 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2403 netif_carrier_off(netdev);
2404 netif_stop_queue(netdev);
2405 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2408 e1000_smartspeed(adapter);
2411 e1000_update_stats(adapter);
2413 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2414 adapter->tpt_old = adapter->stats.tpt;
2415 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2416 adapter->colc_old = adapter->stats.colc;
2418 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2419 adapter->gorcl_old = adapter->stats.gorcl;
2420 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2421 adapter->gotcl_old = adapter->stats.gotcl;
2423 e1000_update_adaptive(&adapter->hw);
2425 #ifdef CONFIG_E1000_MQ
2426 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2428 if (!netif_carrier_ok(netdev)) {
2429 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2430 /* We've lost link, so the controller stops DMA,
2431 * but we've got queued Tx work that's never going
2432 * to get done, so reset controller to flush Tx.
2433 * (Do the reset outside of interrupt context). */
2434 schedule_work(&adapter->tx_timeout_task);
2438 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2439 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2440 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2441 * asymmetrical Tx or Rx gets ITR=8000; everyone
2442 * else is between 2000-8000. */
2443 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2444 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2445 adapter->gotcl - adapter->gorcl :
2446 adapter->gorcl - adapter->gotcl) / 10000;
2447 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2448 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2451 /* Cause software interrupt to ensure rx ring is cleaned */
2452 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2454 /* Force detection of hung controller every watchdog period */
2455 adapter->detect_tx_hung = TRUE;
2457 /* With 82571 controllers, LAA may be overwritten due to controller
2458 * reset from the other port. Set the appropriate LAA in RAR[0] */
2459 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2460 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2462 /* Reset the timer */
2463 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2466 #define E1000_TX_FLAGS_CSUM 0x00000001
2467 #define E1000_TX_FLAGS_VLAN 0x00000002
2468 #define E1000_TX_FLAGS_TSO 0x00000004
2469 #define E1000_TX_FLAGS_IPV4 0x00000008
2470 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2471 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2474 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2475 struct sk_buff *skb)
2478 struct e1000_context_desc *context_desc;
2479 struct e1000_buffer *buffer_info;
2481 uint32_t cmd_length = 0;
2482 uint16_t ipcse = 0, tucse, mss;
2483 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2486 if(skb_shinfo(skb)->tso_size) {
2487 if (skb_header_cloned(skb)) {
2488 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2493 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2494 mss = skb_shinfo(skb)->tso_size;
2495 if(skb->protocol == ntohs(ETH_P_IP)) {
2496 skb->nh.iph->tot_len = 0;
2497 skb->nh.iph->check = 0;
2499 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2504 cmd_length = E1000_TXD_CMD_IP;
2505 ipcse = skb->h.raw - skb->data - 1;
2506 #ifdef NETIF_F_TSO_IPV6
2507 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2508 skb->nh.ipv6h->payload_len = 0;
2510 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2511 &skb->nh.ipv6h->daddr,
2518 ipcss = skb->nh.raw - skb->data;
2519 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2520 tucss = skb->h.raw - skb->data;
2521 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2524 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2525 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2527 i = tx_ring->next_to_use;
2528 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2529 buffer_info = &tx_ring->buffer_info[i];
2531 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2532 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2533 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2534 context_desc->upper_setup.tcp_fields.tucss = tucss;
2535 context_desc->upper_setup.tcp_fields.tucso = tucso;
2536 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2537 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2538 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2539 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2541 buffer_info->time_stamp = jiffies;
2543 if (++i == tx_ring->count) i = 0;
2544 tx_ring->next_to_use = i;
2553 static inline boolean_t
2554 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2555 struct sk_buff *skb)
2557 struct e1000_context_desc *context_desc;
2558 struct e1000_buffer *buffer_info;
2562 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2563 css = skb->h.raw - skb->data;
2565 i = tx_ring->next_to_use;
2566 buffer_info = &tx_ring->buffer_info[i];
2567 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2569 context_desc->upper_setup.tcp_fields.tucss = css;
2570 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2571 context_desc->upper_setup.tcp_fields.tucse = 0;
2572 context_desc->tcp_seg_setup.data = 0;
2573 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2575 buffer_info->time_stamp = jiffies;
2577 if (unlikely(++i == tx_ring->count)) i = 0;
2578 tx_ring->next_to_use = i;
2586 #define E1000_MAX_TXD_PWR 12
2587 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2590 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2591 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2592 unsigned int nr_frags, unsigned int mss)
2594 struct e1000_buffer *buffer_info;
2595 unsigned int len = skb->len;
2596 unsigned int offset = 0, size, count = 0, i;
2598 len -= skb->data_len;
2600 i = tx_ring->next_to_use;
2603 buffer_info = &tx_ring->buffer_info[i];
2604 size = min(len, max_per_txd);
2606 /* Workaround for Controller erratum --
2607 * descriptor for non-tso packet in a linear SKB that follows a
2608 * tso gets written back prematurely before the data is fully
2609 * DMAd to the controller */
2610 if (!skb->data_len && tx_ring->last_tx_tso &&
2611 !skb_shinfo(skb)->tso_size) {
2612 tx_ring->last_tx_tso = 0;
2616 /* Workaround for premature desc write-backs
2617 * in TSO mode. Append 4-byte sentinel desc */
2618 if(unlikely(mss && !nr_frags && size == len && size > 8))
2621 /* work-around for errata 10 and it applies
2622 * to all controllers in PCI-X mode
2623 * The fix is to make sure that the first descriptor of a
2624 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2626 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2627 (size > 2015) && count == 0))
2630 /* Workaround for potential 82544 hang in PCI-X. Avoid
2631 * terminating buffers within evenly-aligned dwords. */
2632 if(unlikely(adapter->pcix_82544 &&
2633 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2637 buffer_info->length = size;
2639 pci_map_single(adapter->pdev,
2643 buffer_info->time_stamp = jiffies;
2648 if(unlikely(++i == tx_ring->count)) i = 0;
2651 for(f = 0; f < nr_frags; f++) {
2652 struct skb_frag_struct *frag;
2654 frag = &skb_shinfo(skb)->frags[f];
2656 offset = frag->page_offset;
2659 buffer_info = &tx_ring->buffer_info[i];
2660 size = min(len, max_per_txd);
2662 /* Workaround for premature desc write-backs
2663 * in TSO mode. Append 4-byte sentinel desc */
2664 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2667 /* Workaround for potential 82544 hang in PCI-X.
2668 * Avoid terminating buffers within evenly-aligned
2670 if(unlikely(adapter->pcix_82544 &&
2671 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2675 buffer_info->length = size;
2677 pci_map_page(adapter->pdev,
2682 buffer_info->time_stamp = jiffies;
2687 if(unlikely(++i == tx_ring->count)) i = 0;
2691 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2692 tx_ring->buffer_info[i].skb = skb;
2693 tx_ring->buffer_info[first].next_to_watch = i;
2699 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2700 int tx_flags, int count)
2702 struct e1000_tx_desc *tx_desc = NULL;
2703 struct e1000_buffer *buffer_info;
2704 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2707 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2708 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2710 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2712 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2713 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2716 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2717 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2718 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2721 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2722 txd_lower |= E1000_TXD_CMD_VLE;
2723 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2726 i = tx_ring->next_to_use;
2729 buffer_info = &tx_ring->buffer_info[i];
2730 tx_desc = E1000_TX_DESC(*tx_ring, i);
2731 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2732 tx_desc->lower.data =
2733 cpu_to_le32(txd_lower | buffer_info->length);
2734 tx_desc->upper.data = cpu_to_le32(txd_upper);
2735 if(unlikely(++i == tx_ring->count)) i = 0;
2738 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2740 /* Force memory writes to complete before letting h/w
2741 * know there are new descriptors to fetch. (Only
2742 * applicable for weak-ordered memory model archs,
2743 * such as IA-64). */
2746 tx_ring->next_to_use = i;
2747 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2751 * 82547 workaround to avoid controller hang in half-duplex environment.
2752 * The workaround is to avoid queuing a large packet that would span
2753 * the internal Tx FIFO ring boundary by notifying the stack to resend
2754 * the packet at a later time. This gives the Tx FIFO an opportunity to
2755 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2756 * to the beginning of the Tx FIFO.
2759 #define E1000_FIFO_HDR 0x10
2760 #define E1000_82547_PAD_LEN 0x3E0
2763 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2765 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2766 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2768 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2770 if(adapter->link_duplex != HALF_DUPLEX)
2771 goto no_fifo_stall_required;
2773 if(atomic_read(&adapter->tx_fifo_stall))
2776 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2777 atomic_set(&adapter->tx_fifo_stall, 1);
2781 no_fifo_stall_required:
2782 adapter->tx_fifo_head += skb_fifo_len;
2783 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2784 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2788 #define MINIMUM_DHCP_PACKET_SIZE 282
2790 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2792 struct e1000_hw *hw = &adapter->hw;
2793 uint16_t length, offset;
2794 if(vlan_tx_tag_present(skb)) {
2795 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2796 ( adapter->hw.mng_cookie.status &
2797 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2800 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2801 struct ethhdr *eth = (struct ethhdr *) skb->data;
2802 if((htons(ETH_P_IP) == eth->h_proto)) {
2803 const struct iphdr *ip =
2804 (struct iphdr *)((uint8_t *)skb->data+14);
2805 if(IPPROTO_UDP == ip->protocol) {
2806 struct udphdr *udp =
2807 (struct udphdr *)((uint8_t *)ip +
2809 if(ntohs(udp->dest) == 67) {
2810 offset = (uint8_t *)udp + 8 - skb->data;
2811 length = skb->len - offset;
2813 return e1000_mng_write_dhcp_info(hw,
2823 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2825 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2827 struct e1000_adapter *adapter = netdev_priv(netdev);
2828 struct e1000_tx_ring *tx_ring;
2829 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2830 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2831 unsigned int tx_flags = 0;
2832 unsigned int len = skb->len;
2833 unsigned long flags;
2834 unsigned int nr_frags = 0;
2835 unsigned int mss = 0;
2839 len -= skb->data_len;
2841 #ifdef CONFIG_E1000_MQ
2842 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2844 tx_ring = adapter->tx_ring;
2847 if (unlikely(skb->len <= 0)) {
2848 dev_kfree_skb_any(skb);
2849 return NETDEV_TX_OK;
2853 mss = skb_shinfo(skb)->tso_size;
2854 /* The controller does a simple calculation to
2855 * make sure there is enough room in the FIFO before
2856 * initiating the DMA for each buffer. The calc is:
2857 * 4 = ceil(buffer len/mss). To make sure we don't
2858 * overrun the FIFO, adjust the max buffer len if mss
2862 max_per_txd = min(mss << 2, max_per_txd);
2863 max_txd_pwr = fls(max_per_txd) - 1;
2865 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2866 * points to just header, pull a few bytes of payload from
2867 * frags into skb->data */
2868 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2869 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2870 (adapter->hw.mac_type == e1000_82571 ||
2871 adapter->hw.mac_type == e1000_82572)) {
2872 unsigned int pull_size;
2873 pull_size = min((unsigned int)4, skb->data_len);
2874 if (!__pskb_pull_tail(skb, pull_size)) {
2875 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2876 dev_kfree_skb_any(skb);
2879 len = skb->len - skb->data_len;
2883 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2884 /* reserve a descriptor for the offload context */
2888 if(skb->ip_summed == CHECKSUM_HW)
2893 /* Controller Erratum workaround */
2894 if (!skb->data_len && tx_ring->last_tx_tso &&
2895 !skb_shinfo(skb)->tso_size)
2899 count += TXD_USE_COUNT(len, max_txd_pwr);
2901 if(adapter->pcix_82544)
2904 /* work-around for errata 10 and it applies to all controllers
2905 * in PCI-X mode, so add one more descriptor to the count
2907 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2911 nr_frags = skb_shinfo(skb)->nr_frags;
2912 for(f = 0; f < nr_frags; f++)
2913 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2915 if(adapter->pcix_82544)
2918 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2919 e1000_transfer_dhcp_info(adapter, skb);
2921 local_irq_save(flags);
2922 if (!spin_trylock(&tx_ring->tx_lock)) {
2923 /* Collision - tell upper layer to requeue */
2924 local_irq_restore(flags);
2925 return NETDEV_TX_LOCKED;
2928 /* need: count + 2 desc gap to keep tail from touching
2929 * head, otherwise try next time */
2930 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2931 netif_stop_queue(netdev);
2932 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2933 return NETDEV_TX_BUSY;
2936 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2937 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2938 netif_stop_queue(netdev);
2939 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2940 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2941 return NETDEV_TX_BUSY;
2945 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2946 tx_flags |= E1000_TX_FLAGS_VLAN;
2947 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2950 first = tx_ring->next_to_use;
2952 tso = e1000_tso(adapter, tx_ring, skb);
2954 dev_kfree_skb_any(skb);
2955 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2956 return NETDEV_TX_OK;
2960 tx_ring->last_tx_tso = 1;
2961 tx_flags |= E1000_TX_FLAGS_TSO;
2962 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2963 tx_flags |= E1000_TX_FLAGS_CSUM;
2965 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2966 * 82571 hardware supports TSO capabilities for IPv6 as well...
2967 * no longer assume, we must. */
2968 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2969 tx_flags |= E1000_TX_FLAGS_IPV4;
2971 e1000_tx_queue(adapter, tx_ring, tx_flags,
2972 e1000_tx_map(adapter, tx_ring, skb, first,
2973 max_per_txd, nr_frags, mss));
2975 netdev->trans_start = jiffies;
2977 /* Make sure there is space in the ring for the next send. */
2978 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2979 netif_stop_queue(netdev);
2981 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2982 return NETDEV_TX_OK;
2986 * e1000_tx_timeout - Respond to a Tx Hang
2987 * @netdev: network interface device structure
2991 e1000_tx_timeout(struct net_device *netdev)
2993 struct e1000_adapter *adapter = netdev_priv(netdev);
2995 /* Do the reset outside of interrupt context */
2996 schedule_work(&adapter->tx_timeout_task);
3000 e1000_tx_timeout_task(struct net_device *netdev)
3002 struct e1000_adapter *adapter = netdev_priv(netdev);
3004 adapter->tx_timeout_count++;
3005 e1000_down(adapter);
3010 * e1000_get_stats - Get System Network Statistics
3011 * @netdev: network interface device structure
3013 * Returns the address of the device statistics structure.
3014 * The statistics are actually updated from the timer callback.
3017 static struct net_device_stats *
3018 e1000_get_stats(struct net_device *netdev)
3020 struct e1000_adapter *adapter = netdev_priv(netdev);
3022 /* only return the current stats */
3023 return &adapter->net_stats;
3027 * e1000_change_mtu - Change the Maximum Transfer Unit
3028 * @netdev: network interface device structure
3029 * @new_mtu: new value for maximum frame size
3031 * Returns 0 on success, negative on failure
3035 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3037 struct e1000_adapter *adapter = netdev_priv(netdev);
3038 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3040 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3041 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3042 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3046 /* Adapter-specific max frame size limits. */
3047 switch (adapter->hw.mac_type) {
3048 case e1000_82542_rev2_0:
3049 case e1000_82542_rev2_1:
3051 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3052 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3058 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3059 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3060 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3065 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3069 /* since the driver code now supports splitting a packet across
3070 * multiple descriptors, most of the fifo related limitations on
3071 * jumbo frame traffic have gone away.
3072 * simply use 2k descriptors for everything.
3074 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3075 * means we reserve 2 more, this pushes us to allocate from the next
3077 * i.e. RXBUFFER_2048 --> size-4096 slab */
3079 /* recent hardware supports 1KB granularity */
3080 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3081 adapter->rx_buffer_len =
3082 ((max_frame < E1000_RXBUFFER_2048) ?
3083 max_frame : E1000_RXBUFFER_2048);
3084 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3086 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3088 netdev->mtu = new_mtu;
3090 if(netif_running(netdev)) {
3091 e1000_down(adapter);
3095 adapter->hw.max_frame_size = max_frame;
3101 * e1000_update_stats - Update the board statistics counters
3102 * @adapter: board private structure
3106 e1000_update_stats(struct e1000_adapter *adapter)
3108 struct e1000_hw *hw = &adapter->hw;
3109 unsigned long flags;
3112 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3114 spin_lock_irqsave(&adapter->stats_lock, flags);
3116 /* these counters are modified from e1000_adjust_tbi_stats,
3117 * called from the interrupt context, so they must only
3118 * be written while holding adapter->stats_lock
3121 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3122 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3123 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3124 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3125 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3126 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3127 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3128 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3129 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3130 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3131 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3132 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3133 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3135 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3136 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3137 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3138 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3139 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3140 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3141 adapter->stats.dc += E1000_READ_REG(hw, DC);
3142 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3143 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3144 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3145 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3146 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3147 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3148 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3149 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3150 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3151 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3152 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3153 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3154 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3155 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3156 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3157 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3158 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3159 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3160 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3161 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3162 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3163 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3164 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3165 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3166 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3167 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3168 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3170 /* used for adaptive IFS */
3172 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3173 adapter->stats.tpt += hw->tx_packet_delta;
3174 hw->collision_delta = E1000_READ_REG(hw, COLC);
3175 adapter->stats.colc += hw->collision_delta;
3177 if(hw->mac_type >= e1000_82543) {
3178 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3179 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3180 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3181 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3182 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3183 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3185 if(hw->mac_type > e1000_82547_rev_2) {
3186 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3187 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3188 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3189 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3190 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3191 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3192 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3193 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3194 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3197 /* Fill out the OS statistics structure */
3199 adapter->net_stats.rx_packets = adapter->stats.gprc;
3200 adapter->net_stats.tx_packets = adapter->stats.gptc;
3201 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3202 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3203 adapter->net_stats.multicast = adapter->stats.mprc;
3204 adapter->net_stats.collisions = adapter->stats.colc;
3208 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3209 adapter->stats.crcerrs + adapter->stats.algnerrc +
3210 adapter->stats.rlec + adapter->stats.cexterr;
3211 adapter->net_stats.rx_dropped = 0;
3212 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3213 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3214 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3215 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3219 adapter->net_stats.tx_errors = adapter->stats.ecol +
3220 adapter->stats.latecol;
3221 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3222 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3223 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3225 /* Tx Dropped needs to be maintained elsewhere */
3229 if(hw->media_type == e1000_media_type_copper) {
3230 if((adapter->link_speed == SPEED_1000) &&
3231 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3232 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3233 adapter->phy_stats.idle_errors += phy_tmp;
3236 if((hw->mac_type <= e1000_82546) &&
3237 (hw->phy_type == e1000_phy_m88) &&
3238 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3239 adapter->phy_stats.receive_errors += phy_tmp;
3242 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3245 #ifdef CONFIG_E1000_MQ
3247 e1000_rx_schedule(void *data)
3249 struct net_device *poll_dev, *netdev = data;
3250 struct e1000_adapter *adapter = netdev->priv;
3251 int this_cpu = get_cpu();
3253 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3254 if (poll_dev == NULL) {
3259 if (likely(netif_rx_schedule_prep(poll_dev)))
3260 __netif_rx_schedule(poll_dev);
3262 e1000_irq_enable(adapter);
3269 * e1000_intr - Interrupt Handler
3270 * @irq: interrupt number
3271 * @data: pointer to a network interface device structure
3272 * @pt_regs: CPU registers structure
3276 e1000_intr(int irq, void *data, struct pt_regs *regs)
3278 struct net_device *netdev = data;
3279 struct e1000_adapter *adapter = netdev_priv(netdev);
3280 struct e1000_hw *hw = &adapter->hw;
3281 uint32_t icr = E1000_READ_REG(hw, ICR);
3282 #ifndef CONFIG_E1000_NAPI
3285 /* Interrupt Auto-Mask...upon reading ICR,
3286 * interrupts are masked. No need for the
3287 * IMC write, but it does mean we should
3288 * account for it ASAP. */
3289 if (likely(hw->mac_type >= e1000_82571))
3290 atomic_inc(&adapter->irq_sem);
3293 if (unlikely(!icr)) {
3294 #ifdef CONFIG_E1000_NAPI
3295 if (hw->mac_type >= e1000_82571)
3296 e1000_irq_enable(adapter);
3298 return IRQ_NONE; /* Not our interrupt */
3301 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3302 hw->get_link_status = 1;
3303 mod_timer(&adapter->watchdog_timer, jiffies);
3306 #ifdef CONFIG_E1000_NAPI
3307 if (unlikely(hw->mac_type < e1000_82571)) {
3308 atomic_inc(&adapter->irq_sem);
3309 E1000_WRITE_REG(hw, IMC, ~0);
3310 E1000_WRITE_FLUSH(hw);
3312 #ifdef CONFIG_E1000_MQ
3313 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3314 /* We must setup the cpumask once count == 0 since
3315 * each cpu bit is cleared when the work is done. */
3316 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3317 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3318 atomic_set(&adapter->rx_sched_call_data.count,
3319 adapter->num_rx_queues);
3320 smp_call_async_mask(&adapter->rx_sched_call_data);
3322 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3324 #else /* if !CONFIG_E1000_MQ */
3325 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3326 __netif_rx_schedule(&adapter->polling_netdev[0]);
3328 e1000_irq_enable(adapter);
3329 #endif /* CONFIG_E1000_MQ */
3331 #else /* if !CONFIG_E1000_NAPI */
3332 /* Writing IMC and IMS is needed for 82547.
3333 Due to Hub Link bus being occupied, an interrupt
3334 de-assertion message is not able to be sent.
3335 When an interrupt assertion message is generated later,
3336 two messages are re-ordered and sent out.
3337 That causes APIC to think 82547 is in de-assertion
3338 state, while 82547 is in assertion state, resulting
3339 in dead lock. Writing IMC forces 82547 into
3342 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3343 atomic_inc(&adapter->irq_sem);
3344 E1000_WRITE_REG(hw, IMC, ~0);
3347 for(i = 0; i < E1000_MAX_INTR; i++)
3348 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3349 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3352 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3353 e1000_irq_enable(adapter);
3355 #endif /* CONFIG_E1000_NAPI */
3360 #ifdef CONFIG_E1000_NAPI
3362 * e1000_clean - NAPI Rx polling callback
3363 * @adapter: board private structure
3367 e1000_clean(struct net_device *poll_dev, int *budget)
3369 struct e1000_adapter *adapter;
3370 int work_to_do = min(*budget, poll_dev->quota);
3371 int tx_cleaned, i = 0, work_done = 0;
3373 /* Must NOT use netdev_priv macro here. */
3374 adapter = poll_dev->priv;
3376 /* Keep link state information with original netdev */
3377 if (!netif_carrier_ok(adapter->netdev))
3380 while (poll_dev != &adapter->polling_netdev[i]) {
3382 if (unlikely(i == adapter->num_rx_queues))
3386 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3387 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3388 &work_done, work_to_do);
3390 *budget -= work_done;
3391 poll_dev->quota -= work_done;
3393 /* If no Tx and not enough Rx work done, exit the polling mode */
3394 if((!tx_cleaned && (work_done == 0)) ||
3395 !netif_running(adapter->netdev)) {
3397 netif_rx_complete(poll_dev);
3398 e1000_irq_enable(adapter);
3407 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3408 * @adapter: board private structure
3412 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3413 struct e1000_tx_ring *tx_ring)
3415 struct net_device *netdev = adapter->netdev;
3416 struct e1000_tx_desc *tx_desc, *eop_desc;
3417 struct e1000_buffer *buffer_info;
3418 unsigned int i, eop;
3419 boolean_t cleaned = FALSE;
3421 i = tx_ring->next_to_clean;
3422 eop = tx_ring->buffer_info[i].next_to_watch;
3423 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3425 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3426 for(cleaned = FALSE; !cleaned; ) {
3427 tx_desc = E1000_TX_DESC(*tx_ring, i);
3428 buffer_info = &tx_ring->buffer_info[i];
3429 cleaned = (i == eop);
3431 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3433 tx_desc->buffer_addr = 0;
3434 tx_desc->lower.data = 0;
3435 tx_desc->upper.data = 0;
3437 if(unlikely(++i == tx_ring->count)) i = 0;
3440 #ifdef CONFIG_E1000_MQ
3441 tx_ring->tx_stats.packets++;
3444 eop = tx_ring->buffer_info[i].next_to_watch;
3445 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3448 tx_ring->next_to_clean = i;
3450 spin_lock(&tx_ring->tx_lock);
3452 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3453 netif_carrier_ok(netdev)))
3454 netif_wake_queue(netdev);
3456 spin_unlock(&tx_ring->tx_lock);
3458 if (adapter->detect_tx_hung) {
3459 /* Detect a transmit hang in hardware, this serializes the
3460 * check with the clearing of time_stamp and movement of i */
3461 adapter->detect_tx_hung = FALSE;
3462 if (tx_ring->buffer_info[eop].dma &&
3463 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3464 adapter->tx_timeout_factor * HZ)
3465 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3466 E1000_STATUS_TXOFF)) {
3468 /* detected Tx unit hang */
3469 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3473 " next_to_use <%x>\n"
3474 " next_to_clean <%x>\n"
3475 "buffer_info[next_to_clean]\n"
3476 " time_stamp <%lx>\n"
3477 " next_to_watch <%x>\n"
3479 " next_to_watch.status <%x>\n",
3480 (unsigned long)((tx_ring - adapter->tx_ring) /
3481 sizeof(struct e1000_tx_ring)),
3482 readl(adapter->hw.hw_addr + tx_ring->tdh),
3483 readl(adapter->hw.hw_addr + tx_ring->tdt),
3484 tx_ring->next_to_use,
3485 tx_ring->next_to_clean,
3486 tx_ring->buffer_info[eop].time_stamp,
3489 eop_desc->upper.fields.status);
3490 netif_stop_queue(netdev);
3497 * e1000_rx_checksum - Receive Checksum Offload for 82543
3498 * @adapter: board private structure
3499 * @status_err: receive descriptor status and error fields
3500 * @csum: receive descriptor csum field
3501 * @sk_buff: socket buffer with received data
3505 e1000_rx_checksum(struct e1000_adapter *adapter,
3506 uint32_t status_err, uint32_t csum,
3507 struct sk_buff *skb)
3509 uint16_t status = (uint16_t)status_err;
3510 uint8_t errors = (uint8_t)(status_err >> 24);
3511 skb->ip_summed = CHECKSUM_NONE;
3513 /* 82543 or newer only */
3514 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3515 /* Ignore Checksum bit is set */
3516 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3517 /* TCP/UDP checksum error bit is set */
3518 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3519 /* let the stack verify checksum errors */
3520 adapter->hw_csum_err++;
3523 /* TCP/UDP Checksum has not been calculated */
3524 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3525 if(!(status & E1000_RXD_STAT_TCPCS))
3528 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3531 /* It must be a TCP or UDP packet with a valid checksum */
3532 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3533 /* TCP checksum is good */
3534 skb->ip_summed = CHECKSUM_UNNECESSARY;
3535 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3536 /* IP fragment with UDP payload */
3537 /* Hardware complements the payload checksum, so we undo it
3538 * and then put the value in host order for further stack use.
3540 csum = ntohl(csum ^ 0xFFFF);
3542 skb->ip_summed = CHECKSUM_HW;
3544 adapter->hw_csum_good++;
3548 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3549 * @adapter: board private structure
3553 #ifdef CONFIG_E1000_NAPI
3554 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3555 struct e1000_rx_ring *rx_ring,
3556 int *work_done, int work_to_do)
3558 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3559 struct e1000_rx_ring *rx_ring)
3562 struct net_device *netdev = adapter->netdev;
3563 struct pci_dev *pdev = adapter->pdev;
3564 struct e1000_rx_desc *rx_desc;
3565 struct e1000_buffer *buffer_info;
3566 struct sk_buff *skb;
3567 unsigned long flags;
3571 int cleaned_count = 0;
3572 boolean_t cleaned = FALSE, multi_descriptor = FALSE;
3574 i = rx_ring->next_to_clean;
3575 rx_desc = E1000_RX_DESC(*rx_ring, i);
3577 while(rx_desc->status & E1000_RXD_STAT_DD) {
3578 buffer_info = &rx_ring->buffer_info[i];
3580 #ifdef CONFIG_E1000_NAPI
3581 if(*work_done >= work_to_do)
3585 status = rx_desc->status;
3588 pci_unmap_single(pdev,
3590 buffer_info->length,
3591 PCI_DMA_FROMDEVICE);
3593 skb = buffer_info->skb;
3594 length = le16_to_cpu(rx_desc->length);
3596 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3597 /* All receives must fit into a single buffer */
3598 E1000_DBG("%s: Receive packet consumed multiple"
3599 " buffers\n", netdev->name);
3600 dev_kfree_skb_irq(skb);
3604 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3605 last_byte = *(skb->data + length - 1);
3606 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3607 rx_desc->errors, length, last_byte)) {
3608 spin_lock_irqsave(&adapter->stats_lock, flags);
3609 e1000_tbi_adjust_stats(&adapter->hw,
3612 spin_unlock_irqrestore(&adapter->stats_lock,
3616 dev_kfree_skb_irq(skb);
3621 /* code added for copybreak, this should improve
3622 * performance for small packets with large amounts
3623 * of reassembly being done in the stack */
3624 #define E1000_CB_LENGTH 256
3625 if ((length < E1000_CB_LENGTH) &&
3626 !rx_ring->rx_skb_top &&
3627 /* or maybe (status & E1000_RXD_STAT_EOP) && */
3628 !multi_descriptor) {
3629 struct sk_buff *new_skb =
3630 dev_alloc_skb(length + NET_IP_ALIGN);
3632 skb_reserve(new_skb, NET_IP_ALIGN);
3633 new_skb->dev = netdev;
3634 memcpy(new_skb->data - NET_IP_ALIGN,
3635 skb->data - NET_IP_ALIGN,
3636 length + NET_IP_ALIGN);
3637 /* save the skb in buffer_info as good */
3638 buffer_info->skb = skb;
3640 skb_put(skb, length);
3644 /* end copybreak code */
3646 /* Receive Checksum Offload */
3647 e1000_rx_checksum(adapter,
3648 (uint32_t)(status) |
3649 ((uint32_t)(rx_desc->errors) << 24),
3650 rx_desc->csum, skb);
3651 skb->protocol = eth_type_trans(skb, netdev);
3652 #ifdef CONFIG_E1000_NAPI
3653 if(unlikely(adapter->vlgrp &&
3654 (status & E1000_RXD_STAT_VP))) {
3655 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3656 le16_to_cpu(rx_desc->special) &
3657 E1000_RXD_SPC_VLAN_MASK);
3659 netif_receive_skb(skb);
3661 #else /* CONFIG_E1000_NAPI */
3662 if(unlikely(adapter->vlgrp &&
3663 (rx_desc->status & E1000_RXD_STAT_VP))) {
3664 vlan_hwaccel_rx(skb, adapter->vlgrp,
3665 le16_to_cpu(rx_desc->special) &
3666 E1000_RXD_SPC_VLAN_MASK);
3670 #endif /* CONFIG_E1000_NAPI */
3671 netdev->last_rx = jiffies;
3672 #ifdef CONFIG_E1000_MQ
3673 rx_ring->rx_stats.packets++;
3674 rx_ring->rx_stats.bytes += length;
3678 rx_desc->status = 0;
3680 /* return some buffers to hardware, one at a time is too slow */
3681 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3682 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3687 rx_ring->next_to_clean = i;
3689 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3691 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3697 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3698 * @adapter: board private structure
3702 #ifdef CONFIG_E1000_NAPI
3703 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3704 struct e1000_rx_ring *rx_ring,
3705 int *work_done, int work_to_do)
3707 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3708 struct e1000_rx_ring *rx_ring)
3711 union e1000_rx_desc_packet_split *rx_desc;
3712 struct net_device *netdev = adapter->netdev;
3713 struct pci_dev *pdev = adapter->pdev;
3714 struct e1000_buffer *buffer_info;
3715 struct e1000_ps_page *ps_page;
3716 struct e1000_ps_page_dma *ps_page_dma;
3717 struct sk_buff *skb;
3719 uint32_t length, staterr;
3720 int cleaned_count = 0;
3721 boolean_t cleaned = FALSE;
3723 i = rx_ring->next_to_clean;
3724 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3725 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3727 while(staterr & E1000_RXD_STAT_DD) {
3728 buffer_info = &rx_ring->buffer_info[i];
3729 ps_page = &rx_ring->ps_page[i];
3730 ps_page_dma = &rx_ring->ps_page_dma[i];
3731 #ifdef CONFIG_E1000_NAPI
3732 if(unlikely(*work_done >= work_to_do))
3738 pci_unmap_single(pdev, buffer_info->dma,
3739 buffer_info->length,
3740 PCI_DMA_FROMDEVICE);
3742 skb = buffer_info->skb;
3744 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3745 E1000_DBG("%s: Packet Split buffers didn't pick up"
3746 " the full packet\n", netdev->name);
3747 dev_kfree_skb_irq(skb);
3751 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3752 dev_kfree_skb_irq(skb);
3756 length = le16_to_cpu(rx_desc->wb.middle.length0);
3758 if(unlikely(!length)) {
3759 E1000_DBG("%s: Last part of the packet spanning"
3760 " multiple descriptors\n", netdev->name);
3761 dev_kfree_skb_irq(skb);
3766 skb_put(skb, length);
3768 for(j = 0; j < adapter->rx_ps_pages; j++) {
3769 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3772 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3773 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3774 ps_page_dma->ps_page_dma[j] = 0;
3775 skb_shinfo(skb)->frags[j].page =
3776 ps_page->ps_page[j];
3777 ps_page->ps_page[j] = NULL;
3778 skb_shinfo(skb)->frags[j].page_offset = 0;
3779 skb_shinfo(skb)->frags[j].size = length;
3780 skb_shinfo(skb)->nr_frags++;
3782 skb->data_len += length;
3785 e1000_rx_checksum(adapter, staterr,
3786 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3787 skb->protocol = eth_type_trans(skb, netdev);
3789 if(likely(rx_desc->wb.upper.header_status &
3790 E1000_RXDPS_HDRSTAT_HDRSP)) {
3791 adapter->rx_hdr_split++;
3792 #ifdef HAVE_RX_ZERO_COPY
3793 skb_shinfo(skb)->zero_copy = TRUE;
3796 #ifdef CONFIG_E1000_NAPI
3797 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3798 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3799 le16_to_cpu(rx_desc->wb.middle.vlan) &
3800 E1000_RXD_SPC_VLAN_MASK);
3802 netif_receive_skb(skb);
3804 #else /* CONFIG_E1000_NAPI */
3805 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3806 vlan_hwaccel_rx(skb, adapter->vlgrp,
3807 le16_to_cpu(rx_desc->wb.middle.vlan) &
3808 E1000_RXD_SPC_VLAN_MASK);
3812 #endif /* CONFIG_E1000_NAPI */
3813 netdev->last_rx = jiffies;
3814 #ifdef CONFIG_E1000_MQ
3815 rx_ring->rx_stats.packets++;
3816 rx_ring->rx_stats.bytes += length;
3820 rx_desc->wb.middle.status_error &= ~0xFF;
3821 buffer_info->skb = NULL;
3823 /* return some buffers to hardware, one at a time is too slow */
3824 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3825 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3829 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3831 rx_ring->next_to_clean = i;
3833 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3835 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3841 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3842 * @adapter: address of board private structure
3846 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3847 struct e1000_rx_ring *rx_ring,
3850 struct net_device *netdev = adapter->netdev;
3851 struct pci_dev *pdev = adapter->pdev;
3852 struct e1000_rx_desc *rx_desc;
3853 struct e1000_buffer *buffer_info;
3854 struct sk_buff *skb;
3856 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3858 i = rx_ring->next_to_use;
3859 buffer_info = &rx_ring->buffer_info[i];
3861 while (cleaned_count--) {
3862 if (!(skb = buffer_info->skb))
3863 skb = dev_alloc_skb(bufsz);
3870 if(unlikely(!skb)) {
3871 /* Better luck next round */
3872 adapter->alloc_rx_buff_failed++;
3876 /* Fix for errata 23, can't cross 64kB boundary */
3877 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3878 struct sk_buff *oldskb = skb;
3879 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3880 "at %p\n", bufsz, skb->data);
3881 /* Try again, without freeing the previous */
3882 skb = dev_alloc_skb(bufsz);
3883 /* Failed allocation, critical failure */
3885 dev_kfree_skb(oldskb);
3889 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3892 dev_kfree_skb(oldskb);
3893 break; /* while !buffer_info->skb */
3895 /* Use new allocation */
3896 dev_kfree_skb(oldskb);
3899 /* Make buffer alignment 2 beyond a 16 byte boundary
3900 * this will result in a 16 byte aligned IP header after
3901 * the 14 byte MAC header is removed
3903 skb_reserve(skb, NET_IP_ALIGN);
3907 buffer_info->skb = skb;
3908 buffer_info->length = adapter->rx_buffer_len;
3910 buffer_info->dma = pci_map_single(pdev,
3912 adapter->rx_buffer_len,
3913 PCI_DMA_FROMDEVICE);
3915 /* Fix for errata 23, can't cross 64kB boundary */
3916 if (!e1000_check_64k_bound(adapter,
3917 (void *)(unsigned long)buffer_info->dma,
3918 adapter->rx_buffer_len)) {
3919 DPRINTK(RX_ERR, ERR,
3920 "dma align check failed: %u bytes at %p\n",
3921 adapter->rx_buffer_len,
3922 (void *)(unsigned long)buffer_info->dma);
3924 buffer_info->skb = NULL;
3926 pci_unmap_single(pdev, buffer_info->dma,
3927 adapter->rx_buffer_len,
3928 PCI_DMA_FROMDEVICE);
3930 break; /* while !buffer_info->skb */
3932 rx_desc = E1000_RX_DESC(*rx_ring, i);
3933 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3935 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3936 /* Force memory writes to complete before letting h/w
3937 * know there are new descriptors to fetch. (Only
3938 * applicable for weak-ordered memory model archs,
3939 * such as IA-64). */
3941 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3944 if(unlikely(++i == rx_ring->count)) i = 0;
3945 buffer_info = &rx_ring->buffer_info[i];
3948 rx_ring->next_to_use = i;
3952 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3953 * @adapter: address of board private structure
3957 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3958 struct e1000_rx_ring *rx_ring,
3961 struct net_device *netdev = adapter->netdev;
3962 struct pci_dev *pdev = adapter->pdev;
3963 union e1000_rx_desc_packet_split *rx_desc;
3964 struct e1000_buffer *buffer_info;
3965 struct e1000_ps_page *ps_page;
3966 struct e1000_ps_page_dma *ps_page_dma;
3967 struct sk_buff *skb;
3970 i = rx_ring->next_to_use;
3971 buffer_info = &rx_ring->buffer_info[i];
3972 ps_page = &rx_ring->ps_page[i];
3973 ps_page_dma = &rx_ring->ps_page_dma[i];
3975 while (cleaned_count--) {
3976 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3978 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3979 if (j < adapter->rx_ps_pages) {
3980 if (likely(!ps_page->ps_page[j])) {
3981 ps_page->ps_page[j] =
3982 alloc_page(GFP_ATOMIC);
3983 if (unlikely(!ps_page->ps_page[j]))
3985 ps_page_dma->ps_page_dma[j] =
3987 ps_page->ps_page[j],
3989 PCI_DMA_FROMDEVICE);
3991 /* Refresh the desc even if buffer_addrs didn't
3992 * change because each write-back erases
3995 rx_desc->read.buffer_addr[j+1] =
3996 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3998 rx_desc->read.buffer_addr[j+1] = ~0;
4001 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4006 /* Make buffer alignment 2 beyond a 16 byte boundary
4007 * this will result in a 16 byte aligned IP header after
4008 * the 14 byte MAC header is removed
4010 skb_reserve(skb, NET_IP_ALIGN);
4014 buffer_info->skb = skb;
4015 buffer_info->length = adapter->rx_ps_bsize0;
4016 buffer_info->dma = pci_map_single(pdev, skb->data,
4017 adapter->rx_ps_bsize0,
4018 PCI_DMA_FROMDEVICE);
4020 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4022 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
4023 /* Force memory writes to complete before letting h/w
4024 * know there are new descriptors to fetch. (Only
4025 * applicable for weak-ordered memory model archs,
4026 * such as IA-64). */
4028 /* Hardware increments by 16 bytes, but packet split
4029 * descriptors are 32 bytes...so we increment tail
4032 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4035 if(unlikely(++i == rx_ring->count)) i = 0;
4036 buffer_info = &rx_ring->buffer_info[i];
4037 ps_page = &rx_ring->ps_page[i];
4038 ps_page_dma = &rx_ring->ps_page_dma[i];
4042 rx_ring->next_to_use = i;
4046 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4051 e1000_smartspeed(struct e1000_adapter *adapter)
4053 uint16_t phy_status;
4056 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4057 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4060 if(adapter->smartspeed == 0) {
4061 /* If Master/Slave config fault is asserted twice,
4062 * we assume back-to-back */
4063 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4064 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4065 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4066 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4067 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4068 if(phy_ctrl & CR_1000T_MS_ENABLE) {
4069 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4070 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4072 adapter->smartspeed++;
4073 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4074 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4076 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4077 MII_CR_RESTART_AUTO_NEG);
4078 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4083 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4084 /* If still no link, perhaps using 2/3 pair cable */
4085 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4086 phy_ctrl |= CR_1000T_MS_ENABLE;
4087 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4088 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4089 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4090 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4091 MII_CR_RESTART_AUTO_NEG);
4092 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4095 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4096 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4097 adapter->smartspeed = 0;
4108 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4114 return e1000_mii_ioctl(netdev, ifr, cmd);
4128 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4130 struct e1000_adapter *adapter = netdev_priv(netdev);
4131 struct mii_ioctl_data *data = if_mii(ifr);
4135 unsigned long flags;
4137 if(adapter->hw.media_type != e1000_media_type_copper)
4142 data->phy_id = adapter->hw.phy_addr;
4145 if(!capable(CAP_NET_ADMIN))
4147 spin_lock_irqsave(&adapter->stats_lock, flags);
4148 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4150 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4153 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4156 if(!capable(CAP_NET_ADMIN))
4158 if(data->reg_num & ~(0x1F))
4160 mii_reg = data->val_in;
4161 spin_lock_irqsave(&adapter->stats_lock, flags);
4162 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4164 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4167 if(adapter->hw.phy_type == e1000_phy_m88) {
4168 switch (data->reg_num) {
4170 if(mii_reg & MII_CR_POWER_DOWN)
4172 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4173 adapter->hw.autoneg = 1;
4174 adapter->hw.autoneg_advertised = 0x2F;
4177 spddplx = SPEED_1000;
4178 else if (mii_reg & 0x2000)
4179 spddplx = SPEED_100;
4182 spddplx += (mii_reg & 0x100)
4185 retval = e1000_set_spd_dplx(adapter,
4188 spin_unlock_irqrestore(
4189 &adapter->stats_lock,
4194 if(netif_running(adapter->netdev)) {
4195 e1000_down(adapter);
4198 e1000_reset(adapter);
4200 case M88E1000_PHY_SPEC_CTRL:
4201 case M88E1000_EXT_PHY_SPEC_CTRL:
4202 if(e1000_phy_reset(&adapter->hw)) {
4203 spin_unlock_irqrestore(
4204 &adapter->stats_lock, flags);
4210 switch (data->reg_num) {
4212 if(mii_reg & MII_CR_POWER_DOWN)
4214 if(netif_running(adapter->netdev)) {
4215 e1000_down(adapter);
4218 e1000_reset(adapter);
4222 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4227 return E1000_SUCCESS;
4231 e1000_pci_set_mwi(struct e1000_hw *hw)
4233 struct e1000_adapter *adapter = hw->back;
4234 int ret_val = pci_set_mwi(adapter->pdev);
4237 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4241 e1000_pci_clear_mwi(struct e1000_hw *hw)
4243 struct e1000_adapter *adapter = hw->back;
4245 pci_clear_mwi(adapter->pdev);
4249 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4251 struct e1000_adapter *adapter = hw->back;
4253 pci_read_config_word(adapter->pdev, reg, value);
4257 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4259 struct e1000_adapter *adapter = hw->back;
4261 pci_write_config_word(adapter->pdev, reg, *value);
4265 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4271 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4277 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4279 struct e1000_adapter *adapter = netdev_priv(netdev);
4280 uint32_t ctrl, rctl;
4282 e1000_irq_disable(adapter);
4283 adapter->vlgrp = grp;
4286 /* enable VLAN tag insert/strip */
4287 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4288 ctrl |= E1000_CTRL_VME;
4289 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4291 /* enable VLAN receive filtering */
4292 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4293 rctl |= E1000_RCTL_VFE;
4294 rctl &= ~E1000_RCTL_CFIEN;
4295 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4296 e1000_update_mng_vlan(adapter);
4298 /* disable VLAN tag insert/strip */
4299 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4300 ctrl &= ~E1000_CTRL_VME;
4301 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4303 /* disable VLAN filtering */
4304 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4305 rctl &= ~E1000_RCTL_VFE;
4306 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4307 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4308 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4309 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4313 e1000_irq_enable(adapter);
4317 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4319 struct e1000_adapter *adapter = netdev_priv(netdev);
4320 uint32_t vfta, index;
4321 if((adapter->hw.mng_cookie.status &
4322 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4323 (vid == adapter->mng_vlan_id))
4325 /* add VID to filter table */
4326 index = (vid >> 5) & 0x7F;
4327 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4328 vfta |= (1 << (vid & 0x1F));
4329 e1000_write_vfta(&adapter->hw, index, vfta);
4333 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4335 struct e1000_adapter *adapter = netdev_priv(netdev);
4336 uint32_t vfta, index;
4338 e1000_irq_disable(adapter);
4341 adapter->vlgrp->vlan_devices[vid] = NULL;
4343 e1000_irq_enable(adapter);
4345 if((adapter->hw.mng_cookie.status &
4346 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4347 (vid == adapter->mng_vlan_id)) {
4348 /* release control to f/w */
4349 e1000_release_hw_control(adapter);
4353 /* remove VID from filter table */
4354 index = (vid >> 5) & 0x7F;
4355 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4356 vfta &= ~(1 << (vid & 0x1F));
4357 e1000_write_vfta(&adapter->hw, index, vfta);
4361 e1000_restore_vlan(struct e1000_adapter *adapter)
4363 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4365 if(adapter->vlgrp) {
4367 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4368 if(!adapter->vlgrp->vlan_devices[vid])
4370 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4376 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4378 adapter->hw.autoneg = 0;
4380 /* Fiber NICs only allow 1000 gbps Full duplex */
4381 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4382 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4383 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4388 case SPEED_10 + DUPLEX_HALF:
4389 adapter->hw.forced_speed_duplex = e1000_10_half;
4391 case SPEED_10 + DUPLEX_FULL:
4392 adapter->hw.forced_speed_duplex = e1000_10_full;
4394 case SPEED_100 + DUPLEX_HALF:
4395 adapter->hw.forced_speed_duplex = e1000_100_half;
4397 case SPEED_100 + DUPLEX_FULL:
4398 adapter->hw.forced_speed_duplex = e1000_100_full;
4400 case SPEED_1000 + DUPLEX_FULL:
4401 adapter->hw.autoneg = 1;
4402 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4404 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4406 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4414 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4416 struct net_device *netdev = pci_get_drvdata(pdev);
4417 struct e1000_adapter *adapter = netdev_priv(netdev);
4418 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4419 uint32_t wufc = adapter->wol;
4422 netif_device_detach(netdev);
4424 if(netif_running(netdev))
4425 e1000_down(adapter);
4427 status = E1000_READ_REG(&adapter->hw, STATUS);
4428 if(status & E1000_STATUS_LU)
4429 wufc &= ~E1000_WUFC_LNKC;
4432 e1000_setup_rctl(adapter);
4433 e1000_set_multi(netdev);
4435 /* turn on all-multi mode if wake on multicast is enabled */
4436 if(adapter->wol & E1000_WUFC_MC) {
4437 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4438 rctl |= E1000_RCTL_MPE;
4439 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4442 if(adapter->hw.mac_type >= e1000_82540) {
4443 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4444 /* advertise wake from D3Cold */
4445 #define E1000_CTRL_ADVD3WUC 0x00100000
4446 /* phy power management enable */
4447 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4448 ctrl |= E1000_CTRL_ADVD3WUC |
4449 E1000_CTRL_EN_PHY_PWR_MGMT;
4450 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4453 if(adapter->hw.media_type == e1000_media_type_fiber ||
4454 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4455 /* keep the laser running in D3 */
4456 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4457 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4458 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4461 /* Allow time for pending master requests to run */
4462 e1000_disable_pciex_master(&adapter->hw);
4464 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4465 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4466 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4468 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4469 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4471 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4473 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4474 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4475 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4477 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4478 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4480 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4483 pci_save_state(pdev);
4485 if(adapter->hw.mac_type >= e1000_82540 &&
4486 adapter->hw.media_type == e1000_media_type_copper) {
4487 manc = E1000_READ_REG(&adapter->hw, MANC);
4488 if(manc & E1000_MANC_SMBUS_EN) {
4489 manc |= E1000_MANC_ARP_EN;
4490 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4491 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4493 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4494 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4496 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4500 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4501 * would have already happened in close and is redundant. */
4502 e1000_release_hw_control(adapter);
4504 pci_disable_device(pdev);
4506 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4508 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4514 e1000_resume(struct pci_dev *pdev)
4516 struct net_device *netdev = pci_get_drvdata(pdev);
4517 struct e1000_adapter *adapter = netdev_priv(netdev);
4519 uint32_t manc, ret_val;
4521 retval = pci_set_power_state(pdev, PCI_D0);
4523 DPRINTK(PROBE, ERR, "Error in setting power state\n");
4524 ret_val = pci_enable_device(pdev);
4525 pci_set_master(pdev);
4527 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4529 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4530 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4532 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
4534 e1000_reset(adapter);
4535 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4537 if(netif_running(netdev))
4540 netif_device_attach(netdev);
4542 if(adapter->hw.mac_type >= e1000_82540 &&
4543 adapter->hw.media_type == e1000_media_type_copper) {
4544 manc = E1000_READ_REG(&adapter->hw, MANC);
4545 manc &= ~(E1000_MANC_ARP_EN);
4546 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4549 /* If the controller is 82573 and f/w is AMT, do not set
4550 * DRV_LOAD until the interface is up. For all other cases,
4551 * let the f/w know that the h/w is now under the control
4553 if (adapter->hw.mac_type != e1000_82573 ||
4554 !e1000_check_mng_mode(&adapter->hw))
4555 e1000_get_hw_control(adapter);
4560 #ifdef CONFIG_NET_POLL_CONTROLLER
4562 * Polling 'interrupt' - used by things like netconsole to send skbs
4563 * without having to re-enable interrupts. It's not called while
4564 * the interrupt routine is executing.
4567 e1000_netpoll(struct net_device *netdev)
4569 struct e1000_adapter *adapter = netdev_priv(netdev);
4570 disable_irq(adapter->pdev->irq);
4571 e1000_intr(adapter->pdev->irq, netdev, NULL);
4572 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4573 #ifndef CONFIG_E1000_NAPI
4574 adapter->clean_rx(adapter, adapter->rx_ring);
4576 enable_irq(adapter->pdev->irq);