Pileus Git - ~andy/linux/blob - drivers/mtd/nand/nandsim.c

   1 /*
   2  * NAND flash simulator.
   3  *
   4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  *
   8  * Note: NS means "NAND Simulator".
   9  * Note: Input means input TO flash chip, output means output FROM chip.
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License as published by the
  13  * Free Software Foundation; either version 2, or (at your option) any later
  14  * version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
  19  * Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  24  */
  25
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/vmalloc.h>
  31 #include <asm/div64.h>
  32 #include <linux/slab.h>
  33 #include <linux/errno.h>
  34 #include <linux/string.h>
  35 #include <linux/mtd/mtd.h>
  36 #include <linux/mtd/nand.h>
  37 #include <linux/mtd/nand_bch.h>
  38 #include <linux/mtd/partitions.h>
  39 #include <linux/delay.h>
  40 #include <linux/list.h>
  41 #include <linux/random.h>
  42 #include <linux/sched.h>
  43 #include <linux/fs.h>
  44 #include <linux/pagemap.h>
  45
  46 /* Default simulator parameters values */
  47 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
  48     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
  49     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
  50     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
  51 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
  52 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
  53 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
  54 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
  55 #endif
  56
  57 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
  58 #define CONFIG_NANDSIM_ACCESS_DELAY 25
  59 #endif
  60 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
  61 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
  62 #endif
  63 #ifndef CONFIG_NANDSIM_ERASE_DELAY
  64 #define CONFIG_NANDSIM_ERASE_DELAY 2
  65 #endif
  66 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
  67 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
  68 #endif
  69 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
  70 #define CONFIG_NANDSIM_INPUT_CYCLE  50
  71 #endif
  72 #ifndef CONFIG_NANDSIM_BUS_WIDTH
  73 #define CONFIG_NANDSIM_BUS_WIDTH  8
  74 #endif
  75 #ifndef CONFIG_NANDSIM_DO_DELAYS
  76 #define CONFIG_NANDSIM_DO_DELAYS  0
  77 #endif
  78 #ifndef CONFIG_NANDSIM_LOG
  79 #define CONFIG_NANDSIM_LOG        0
  80 #endif
  81 #ifndef CONFIG_NANDSIM_DBG
  82 #define CONFIG_NANDSIM_DBG        0
  83 #endif
  84 #ifndef CONFIG_NANDSIM_MAX_PARTS
  85 #define CONFIG_NANDSIM_MAX_PARTS  32
  86 #endif
  87
  88 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
  89 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
  90 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
  91 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
  92 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
  93 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
  94 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
  95 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
  96 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
  97 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
  98 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
  99 static uint log            = CONFIG_NANDSIM_LOG;
 100 static uint dbg            = CONFIG_NANDSIM_DBG;
 101 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
 102 static unsigned int parts_num;
 103 static char *badblocks = NULL;
 104 static char *weakblocks = NULL;
 105 static char *weakpages = NULL;
 106 static unsigned int bitflips = 0;
 107 static char *gravepages = NULL;
 108 static unsigned int rptwear = 0;
 109 static unsigned int overridesize = 0;
 110 static char *cache_file = NULL;
 111 static unsigned int bbt;
 112 static unsigned int bch;
 113
 114 module_param(first_id_byte,  uint, 0400);
 115 module_param(second_id_byte, uint, 0400);
 116 module_param(third_id_byte,  uint, 0400);
 117 module_param(fourth_id_byte, uint, 0400);
 118 module_param(access_delay,   uint, 0400);
 119 module_param(programm_delay, uint, 0400);
 120 module_param(erase_delay,    uint, 0400);
 121 module_param(output_cycle,   uint, 0400);
 122 module_param(input_cycle,    uint, 0400);
 123 module_param(bus_width,      uint, 0400);
 124 module_param(do_delays,      uint, 0400);
 125 module_param(log,            uint, 0400);
 126 module_param(dbg,            uint, 0400);
 127 module_param_array(parts, ulong, &parts_num, 0400);
 128 module_param(badblocks,      charp, 0400);
 129 module_param(weakblocks,     charp, 0400);
 130 module_param(weakpages,      charp, 0400);
 131 module_param(bitflips,       uint, 0400);
 132 module_param(gravepages,     charp, 0400);
 133 module_param(rptwear,        uint, 0400);
 134 module_param(overridesize,   uint, 0400);
 135 module_param(cache_file,     charp, 0400);
 136 module_param(bbt,            uint, 0400);
 137 module_param(bch,            uint, 0400);
 138
 139 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
 140 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
 141 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
 142 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
 143 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microseconds)");
 144 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
 145 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
 146 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanoseconds)");
 147 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanoseconds)");
 148 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
 149 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
 150 MODULE_PARM_DESC(log,            "Perform logging if not zero");
 151 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
 152 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
 153 /* Page and erase block positions for the following parameters are independent of any partitions */
 154 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
 155 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
 156                                  " separated by commas e.g. 113:2 means eb 113"
 157                                  " can be erased only twice before failing");
 158 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
 159                                  " separated by commas e.g. 1401:2 means page 1401"
 160                                  " can be written only twice before failing");
 161 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
 162 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
 163                                  " separated by commas e.g. 1401:2 means page 1401"
 164                                  " can be read only twice before failing");
 165 MODULE_PARM_DESC(rptwear,        "Number of erases between reporting wear, if not zero");
 166 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
 167                                  "The size is specified in erase blocks and as the exponent of a power of two"
 168                                  " e.g. 5 means a size of 32 erase blocks");
 169 MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of memory");
 170 MODULE_PARM_DESC(bbt,            "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
 171 MODULE_PARM_DESC(bch,            "Enable BCH ecc and set how many bits should "
 172                                  "be correctable in 512-byte blocks");
 173
 174 /* The largest possible page size */
 175 #define NS_LARGEST_PAGE_SIZE    4096
 176
 177 /* The prefix for simulator output */
 178 #define NS_OUTPUT_PREFIX "[nandsim]"
 179
 180 /* Simulator's output macros (logging, debugging, warning, error) */
 181 #define NS_LOG(args...) \
 182         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
 183 #define NS_DBG(args...) \
 184         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
 185 #define NS_WARN(args...) \
 186         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
 187 #define NS_ERR(args...) \
 188         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
 189 #define NS_INFO(args...) \
 190         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
 191
 192 /* Busy-wait delay macros (microseconds, milliseconds) */
 193 #define NS_UDELAY(us) \
 194         do { if (do_delays) udelay(us); } while(0)
 195 #define NS_MDELAY(us) \
 196         do { if (do_delays) mdelay(us); } while(0)
 197
 198 /* Is the nandsim structure initialized ? */
 199 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
 200
 201 /* Good operation completion status */
 202 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
 203
 204 /* Operation failed completion status */
 205 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
 206
 207 /* Calculate the page offset in flash RAM image by (row, column) address */
 208 #define NS_RAW_OFFSET(ns) \
 209         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
 210
 211 /* Calculate the OOB offset in flash RAM image by (row, column) address */
 212 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
 213
 214 /* After a command is input, the simulator goes to one of the following states */
 215 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
 216 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
 217 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
 218 #define STATE_CMD_PAGEPROG     0x00000004 /* start page program */
 219 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
 220 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
 221 #define STATE_CMD_STATUS       0x00000007 /* read status */
 222 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
 223 #define STATE_CMD_SEQIN        0x00000009 /* sequential data input */
 224 #define STATE_CMD_READID       0x0000000A /* read ID */
 225 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
 226 #define STATE_CMD_RESET        0x0000000C /* reset */
 227 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
 228 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
 229 #define STATE_CMD_MASK         0x0000000F /* command states mask */
 230
 231 /* After an address is input, the simulator goes to one of these states */
 232 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
 233 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
 234 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
 235 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
 236 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
 237
 238 /* During data input/output the simulator is in these states */
 239 #define STATE_DATAIN           0x00000100 /* waiting for data input */
 240 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
 241
 242 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
 243 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
 244 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
 245 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
 246 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
 247
 248 /* Previous operation is done, ready to accept new requests */
 249 #define STATE_READY            0x00000000
 250
 251 /* This state is used to mark that the next state isn't known yet */
 252 #define STATE_UNKNOWN          0x10000000
 253
 254 /* Simulator's actions bit masks */
 255 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
 256 #define ACTION_PRGPAGE   0x00200000 /* program the internal buffer to flash */
 257 #define ACTION_SECERASE  0x00300000 /* erase sector */
 258 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
 259 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
 260 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
 261 #define ACTION_MASK      0x00700000 /* action mask */
 262
 263 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
 264 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
 265
 266 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
 267 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
 268 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
 269 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
 270 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
 271 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
 272 #define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */
 273 #define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
 274 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
 275
 276 /* Remove action bits from state */
 277 #define NS_STATE(x) ((x) & ~ACTION_MASK)
 278
 279 /*
 280  * Maximum previous states which need to be saved. Currently saving is
 281  * only needed for page program operation with preceded read command
 282  * (which is only valid for 512-byte pages).
 283  */
 284 #define NS_MAX_PREVSTATES 1
 285
 286 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
 287 #define NS_MAX_HELD_PAGES 16
 288
 289 /*
 290  * A union to represent flash memory contents and flash buffer.
 291  */
 292 union ns_mem {
 293         u_char *byte;    /* for byte access */
 294         uint16_t *word;  /* for 16-bit word access */
 295 };
 296
 297 /*
 298  * The structure which describes all the internal simulator data.
 299  */
 300 struct nandsim {
 301         struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
 302         unsigned int nbparts;
 303
 304         uint busw;              /* flash chip bus width (8 or 16) */
 305         u_char ids[4];          /* chip's ID bytes */
 306         uint32_t options;       /* chip's characteristic bits */
 307         uint32_t state;         /* current chip state */
 308         uint32_t nxstate;       /* next expected state */
 309
 310         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
 311         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
 312         uint16_t npstates;      /* number of previous states saved */
 313         uint16_t stateidx;      /* current state index */
 314
 315         /* The simulated NAND flash pages array */
 316         union ns_mem *pages;
 317
 318         /* Slab allocator for nand pages */
 319         struct kmem_cache *nand_pages_slab;
 320
 321         /* Internal buffer of page + OOB size bytes */
 322         union ns_mem buf;
 323
 324         /* NAND flash "geometry" */
 325         struct {
 326                 uint64_t totsz;     /* total flash size, bytes */
 327                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
 328                 uint pgsz;          /* NAND flash page size, bytes */
 329                 uint oobsz;         /* page OOB area size, bytes */
 330                 uint64_t totszoob;  /* total flash size including OOB, bytes */
 331                 uint pgszoob;       /* page size including OOB , bytes*/
 332                 uint secszoob;      /* sector size including OOB, bytes */
 333                 uint pgnum;         /* total number of pages */
 334                 uint pgsec;         /* number of pages per sector */
 335                 uint secshift;      /* bits number in sector size */
 336                 uint pgshift;       /* bits number in page size */
 337                 uint oobshift;      /* bits number in OOB size */
 338                 uint pgaddrbytes;   /* bytes per page address */
 339                 uint secaddrbytes;  /* bytes per sector address */
 340                 uint idbytes;       /* the number ID bytes that this chip outputs */
 341         } geom;
 342
 343         /* NAND flash internal registers */
 344         struct {
 345                 unsigned command; /* the command register */
 346                 u_char   status;  /* the status register */
 347                 uint     row;     /* the page number */
 348                 uint     column;  /* the offset within page */
 349                 uint     count;   /* internal counter */
 350                 uint     num;     /* number of bytes which must be processed */
 351                 uint     off;     /* fixed page offset */
 352         } regs;
 353
 354         /* NAND flash lines state */
 355         struct {
 356                 int ce;  /* chip Enable */
 357                 int cle; /* command Latch Enable */
 358                 int ale; /* address Latch Enable */
 359                 int wp;  /* write Protect */
 360         } lines;
 361
 362         /* Fields needed when using a cache file */
 363         struct file *cfile; /* Open file */
 364         unsigned char *pages_written; /* Which pages have been written */
 365         void *file_buf;
 366         struct page *held_pages[NS_MAX_HELD_PAGES];
 367         int held_cnt;
 368 };
 369
 370 /*
 371  * Operations array. To perform any operation the simulator must pass
 372  * through the correspondent states chain.
 373  */
 374 static struct nandsim_operations {
 375         uint32_t reqopts;  /* options which are required to perform the operation */
 376         uint32_t states[NS_OPER_STATES]; /* operation's states */
 377 } ops[NS_OPER_NUM] = {
 378         /* Read page + OOB from the beginning */
 379         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
 380                         STATE_DATAOUT, STATE_READY}},
 381         /* Read page + OOB from the second half */
 382         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
 383                         STATE_DATAOUT, STATE_READY}},
 384         /* Read OOB */
 385         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
 386                         STATE_DATAOUT, STATE_READY}},
 387         /* Program page starting from the beginning */
 388         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
 389                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 390         /* Program page starting from the beginning */
 391         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
 392                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 393         /* Program page starting from the second half */
 394         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
 395                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 396         /* Program OOB */
 397         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
 398                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
 399         /* Erase sector */
 400         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
 401         /* Read status */
 402         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
 403         /* Read multi-plane status */
 404         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
 405         /* Read ID */
 406         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
 407         /* Large page devices read page */
 408         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
 409                                STATE_DATAOUT, STATE_READY}},
 410         /* Large page devices random page read */
 411         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
 412                                STATE_DATAOUT, STATE_READY}},
 413 };
 414
 415 struct weak_block {
 416         struct list_head list;
 417         unsigned int erase_block_no;
 418         unsigned int max_erases;
 419         unsigned int erases_done;
 420 };
 421
 422 static LIST_HEAD(weak_blocks);
 423
 424 struct weak_page {
 425         struct list_head list;
 426         unsigned int page_no;
 427         unsigned int max_writes;
 428         unsigned int writes_done;
 429 };
 430
 431 static LIST_HEAD(weak_pages);
 432
 433 struct grave_page {
 434         struct list_head list;
 435         unsigned int page_no;
 436         unsigned int max_reads;
 437         unsigned int reads_done;
 438 };
 439
 440 static LIST_HEAD(grave_pages);
 441
 442 static unsigned long *erase_block_wear = NULL;
 443 static unsigned int wear_eb_count = 0;
 444 static unsigned long total_wear = 0;
 445 static unsigned int rptwear_cnt = 0;
 446
 447 /* MTD structure for NAND controller */
 448 static struct mtd_info *nsmtd;
 449
 450 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
 451
 452 /*
 453  * Allocate array of page pointers, create slab allocation for an array
 454  * and initialize the array by NULL pointers.
 455  *
 456  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
 457  */
 458 static int alloc_device(struct nandsim *ns)
 459 {
 460         struct file *cfile;
 461         int i, err;
 462
 463         if (cache_file) {
 464                 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
 465                 if (IS_ERR(cfile))
 466                         return PTR_ERR(cfile);
 467                 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
 468                         NS_ERR("alloc_device: cache file not readable\n");
 469                         err = -EINVAL;
 470                         goto err_close;
 471                 }
 472                 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
 473                         NS_ERR("alloc_device: cache file not writeable\n");
 474                         err = -EINVAL;
 475                         goto err_close;
 476                 }
 477                 ns->pages_written = vzalloc(ns->geom.pgnum);
 478                 if (!ns->pages_written) {
 479                         NS_ERR("alloc_device: unable to allocate pages written array\n");
 480                         err = -ENOMEM;
 481                         goto err_close;
 482                 }
 483                 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 484                 if (!ns->file_buf) {
 485                         NS_ERR("alloc_device: unable to allocate file buf\n");
 486                         err = -ENOMEM;
 487                         goto err_free;
 488                 }
 489                 ns->cfile = cfile;
 490                 return 0;
 491         }
 492
 493         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
 494         if (!ns->pages) {
 495                 NS_ERR("alloc_device: unable to allocate page array\n");
 496                 return -ENOMEM;
 497         }
 498         for (i = 0; i < ns->geom.pgnum; i++) {
 499                 ns->pages[i].byte = NULL;
 500         }
 501         ns->nand_pages_slab = kmem_cache_create("nandsim",
 502                                                 ns->geom.pgszoob, 0, 0, NULL);
 503         if (!ns->nand_pages_slab) {
 504                 NS_ERR("cache_create: unable to create kmem_cache\n");
 505                 return -ENOMEM;
 506         }
 507
 508         return 0;
 509
 510 err_free:
 511         vfree(ns->pages_written);
 512 err_close:
 513         filp_close(cfile, NULL);
 514         return err;
 515 }
 516
 517 /*
 518  * Free any allocated pages, and free the array of page pointers.
 519  */
 520 static void free_device(struct nandsim *ns)
 521 {
 522         int i;
 523
 524         if (ns->cfile) {
 525                 kfree(ns->file_buf);
 526                 vfree(ns->pages_written);
 527                 filp_close(ns->cfile, NULL);
 528                 return;
 529         }
 530
 531         if (ns->pages) {
 532                 for (i = 0; i < ns->geom.pgnum; i++) {
 533                         if (ns->pages[i].byte)
 534                                 kmem_cache_free(ns->nand_pages_slab,
 535                                                 ns->pages[i].byte);
 536                 }
 537                 kmem_cache_destroy(ns->nand_pages_slab);
 538                 vfree(ns->pages);
 539         }
 540 }
 541
 542 static char *get_partition_name(int i)
 543 {
 544         char buf[64];
 545         sprintf(buf, "NAND simulator partition %d", i);
 546         return kstrdup(buf, GFP_KERNEL);
 547 }
 548
 549 static uint64_t divide(uint64_t n, uint32_t d)
 550 {
 551         do_div(n, d);
 552         return n;
 553 }
 554
 555 /*
 556  * Initialize the nandsim structure.
 557  *
 558  * RETURNS: 0 if success, -ERRNO if failure.
 559  */
 560 static int init_nandsim(struct mtd_info *mtd)
 561 {
 562         struct nand_chip *chip = mtd->priv;
 563         struct nandsim   *ns   = chip->priv;
 564         int i, ret = 0;
 565         uint64_t remains;
 566         uint64_t next_offset;
 567
 568         if (NS_IS_INITIALIZED(ns)) {
 569                 NS_ERR("init_nandsim: nandsim is already initialized\n");
 570                 return -EIO;
 571         }
 572
 573         /* Force mtd to not do delays */
 574         chip->chip_delay = 0;
 575
 576         /* Initialize the NAND flash parameters */
 577         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
 578         ns->geom.totsz    = mtd->size;
 579         ns->geom.pgsz     = mtd->writesize;
 580         ns->geom.oobsz    = mtd->oobsize;
 581         ns->geom.secsz    = mtd->erasesize;
 582         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
 583         ns->geom.pgnum    = divide(ns->geom.totsz, ns->geom.pgsz);
 584         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
 585         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
 586         ns->geom.pgshift  = chip->page_shift;
 587         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
 588         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
 589         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
 590         ns->options = 0;
 591
 592         if (ns->geom.pgsz == 256) {
 593                 ns->options |= OPT_PAGE256;
 594         }
 595         else if (ns->geom.pgsz == 512) {
 596                 ns->options |= OPT_PAGE512;
 597                 if (ns->busw == 8)
 598                         ns->options |= OPT_PAGE512_8BIT;
 599         } else if (ns->geom.pgsz == 2048) {
 600                 ns->options |= OPT_PAGE2048;
 601         } else if (ns->geom.pgsz == 4096) {
 602                 ns->options |= OPT_PAGE4096;
 603         } else {
 604                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
 605                 return -EIO;
 606         }
 607
 608         if (ns->options & OPT_SMALLPAGE) {
 609                 if (ns->geom.totsz <= (32 << 20)) {
 610                         ns->geom.pgaddrbytes  = 3;
 611                         ns->geom.secaddrbytes = 2;
 612                 } else {
 613                         ns->geom.pgaddrbytes  = 4;
 614                         ns->geom.secaddrbytes = 3;
 615                 }
 616         } else {
 617                 if (ns->geom.totsz <= (128 << 20)) {
 618                         ns->geom.pgaddrbytes  = 4;
 619                         ns->geom.secaddrbytes = 2;
 620                 } else {
 621                         ns->geom.pgaddrbytes  = 5;
 622                         ns->geom.secaddrbytes = 3;
 623                 }
 624         }
 625
 626         /* Fill the partition_info structure */
 627         if (parts_num > ARRAY_SIZE(ns->partitions)) {
 628                 NS_ERR("too many partitions.\n");
 629                 ret = -EINVAL;
 630                 goto error;
 631         }
 632         remains = ns->geom.totsz;
 633         next_offset = 0;
 634         for (i = 0; i < parts_num; ++i) {
 635                 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
 636
 637                 if (!part_sz || part_sz > remains) {
 638                         NS_ERR("bad partition size.\n");
 639                         ret = -EINVAL;
 640                         goto error;
 641                 }
 642                 ns->partitions[i].name   = get_partition_name(i);
 643                 ns->partitions[i].offset = next_offset;
 644                 ns->partitions[i].size   = part_sz;
 645                 next_offset += ns->partitions[i].size;
 646                 remains -= ns->partitions[i].size;
 647         }
 648         ns->nbparts = parts_num;
 649         if (remains) {
 650                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
 651                         NS_ERR("too many partitions.\n");
 652                         ret = -EINVAL;
 653                         goto error;
 654                 }
 655                 ns->partitions[i].name   = get_partition_name(i);
 656                 ns->partitions[i].offset = next_offset;
 657                 ns->partitions[i].size   = remains;
 658                 ns->nbparts += 1;
 659         }
 660
 661         /* Detect how many ID bytes the NAND chip outputs */
 662         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 663                 if (second_id_byte != nand_flash_ids[i].id)
 664                         continue;
 665         }
 666
 667         if (ns->busw == 16)
 668                 NS_WARN("16-bit flashes support wasn't tested\n");
 669
 670         printk("flash size: %llu MiB\n",
 671                         (unsigned long long)ns->geom.totsz >> 20);
 672         printk("page size: %u bytes\n",         ns->geom.pgsz);
 673         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
 674         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
 675         printk("pages number: %u\n",            ns->geom.pgnum);
 676         printk("pages per sector: %u\n",        ns->geom.pgsec);
 677         printk("bus width: %u\n",               ns->busw);
 678         printk("bits in sector size: %u\n",     ns->geom.secshift);
 679         printk("bits in page size: %u\n",       ns->geom.pgshift);
 680         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
 681         printk("flash size with OOB: %llu KiB\n",
 682                         (unsigned long long)ns->geom.totszoob >> 10);
 683         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
 684         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
 685         printk("options: %#x\n",                ns->options);
 686
 687         if ((ret = alloc_device(ns)) != 0)
 688                 goto error;
 689
 690         /* Allocate / initialize the internal buffer */
 691         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
 692         if (!ns->buf.byte) {
 693                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
 694                         ns->geom.pgszoob);
 695                 ret = -ENOMEM;
 696                 goto error;
 697         }
 698         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
 699
 700         return 0;
 701
 702 error:
 703         free_device(ns);
 704
 705         return ret;
 706 }
 707
 708 /*
 709  * Free the nandsim structure.
 710  */
 711 static void free_nandsim(struct nandsim *ns)
 712 {
 713         kfree(ns->buf.byte);
 714         free_device(ns);
 715
 716         return;
 717 }
 718
 719 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
 720 {
 721         char *w;
 722         int zero_ok;
 723         unsigned int erase_block_no;
 724         loff_t offset;
 725
 726         if (!badblocks)
 727                 return 0;
 728         w = badblocks;
 729         do {
 730                 zero_ok = (*w == '0' ? 1 : 0);
 731                 erase_block_no = simple_strtoul(w, &w, 0);
 732                 if (!zero_ok && !erase_block_no) {
 733                         NS_ERR("invalid badblocks.\n");
 734                         return -EINVAL;
 735                 }
 736                 offset = erase_block_no * ns->geom.secsz;
 737                 if (mtd_block_markbad(mtd, offset)) {
 738                         NS_ERR("invalid badblocks.\n");
 739                         return -EINVAL;
 740                 }
 741                 if (*w == ',')
 742                         w += 1;
 743         } while (*w);
 744         return 0;
 745 }
 746
 747 static int parse_weakblocks(void)
 748 {
 749         char *w;
 750         int zero_ok;
 751         unsigned int erase_block_no;
 752         unsigned int max_erases;
 753         struct weak_block *wb;
 754
 755         if (!weakblocks)
 756                 return 0;
 757         w = weakblocks;
 758         do {
 759                 zero_ok = (*w == '0' ? 1 : 0);
 760                 erase_block_no = simple_strtoul(w, &w, 0);
 761                 if (!zero_ok && !erase_block_no) {
 762                         NS_ERR("invalid weakblocks.\n");
 763                         return -EINVAL;
 764                 }
 765                 max_erases = 3;
 766                 if (*w == ':') {
 767                         w += 1;
 768                         max_erases = simple_strtoul(w, &w, 0);
 769                 }
 770                 if (*w == ',')
 771                         w += 1;
 772                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
 773                 if (!wb) {
 774                         NS_ERR("unable to allocate memory.\n");
 775                         return -ENOMEM;
 776                 }
 777                 wb->erase_block_no = erase_block_no;
 778                 wb->max_erases = max_erases;
 779                 list_add(&wb->list, &weak_blocks);
 780         } while (*w);
 781         return 0;
 782 }
 783
 784 static int erase_error(unsigned int erase_block_no)
 785 {
 786         struct weak_block *wb;
 787
 788         list_for_each_entry(wb, &weak_blocks, list)
 789                 if (wb->erase_block_no == erase_block_no) {
 790                         if (wb->erases_done >= wb->max_erases)
 791                                 return 1;
 792                         wb->erases_done += 1;
 793                         return 0;
 794                 }
 795         return 0;
 796 }
 797
 798 static int parse_weakpages(void)
 799 {
 800         char *w;
 801         int zero_ok;
 802         unsigned int page_no;
 803         unsigned int max_writes;
 804         struct weak_page *wp;
 805
 806         if (!weakpages)
 807                 return 0;
 808         w = weakpages;
 809         do {
 810                 zero_ok = (*w == '0' ? 1 : 0);
 811                 page_no = simple_strtoul(w, &w, 0);
 812                 if (!zero_ok && !page_no) {
 813                         NS_ERR("invalid weakpagess.\n");
 814                         return -EINVAL;
 815                 }
 816                 max_writes = 3;
 817                 if (*w == ':') {
 818                         w += 1;
 819                         max_writes = simple_strtoul(w, &w, 0);
 820                 }
 821                 if (*w == ',')
 822                         w += 1;
 823                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
 824                 if (!wp) {
 825                         NS_ERR("unable to allocate memory.\n");
 826                         return -ENOMEM;
 827                 }
 828                 wp->page_no = page_no;
 829                 wp->max_writes = max_writes;
 830                 list_add(&wp->list, &weak_pages);
 831         } while (*w);
 832         return 0;
 833 }
 834
 835 static int write_error(unsigned int page_no)
 836 {
 837         struct weak_page *wp;
 838
 839         list_for_each_entry(wp, &weak_pages, list)
 840                 if (wp->page_no == page_no) {
 841                         if (wp->writes_done >= wp->max_writes)
 842                                 return 1;
 843                         wp->writes_done += 1;
 844                         return 0;
 845                 }
 846         return 0;
 847 }
 848
 849 static int parse_gravepages(void)
 850 {
 851         char *g;
 852         int zero_ok;
 853         unsigned int page_no;
 854         unsigned int max_reads;
 855         struct grave_page *gp;
 856
 857         if (!gravepages)
 858                 return 0;
 859         g = gravepages;
 860         do {
 861                 zero_ok = (*g == '0' ? 1 : 0);
 862                 page_no = simple_strtoul(g, &g, 0);
 863                 if (!zero_ok && !page_no) {
 864                         NS_ERR("invalid gravepagess.\n");
 865                         return -EINVAL;
 866                 }
 867                 max_reads = 3;
 868                 if (*g == ':') {
 869                         g += 1;
 870                         max_reads = simple_strtoul(g, &g, 0);
 871                 }
 872                 if (*g == ',')
 873                         g += 1;
 874                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
 875                 if (!gp) {
 876                         NS_ERR("unable to allocate memory.\n");
 877                         return -ENOMEM;
 878                 }
 879                 gp->page_no = page_no;
 880                 gp->max_reads = max_reads;
 881                 list_add(&gp->list, &grave_pages);
 882         } while (*g);
 883         return 0;
 884 }
 885
 886 static int read_error(unsigned int page_no)
 887 {
 888         struct grave_page *gp;
 889
 890         list_for_each_entry(gp, &grave_pages, list)
 891                 if (gp->page_no == page_no) {
 892                         if (gp->reads_done >= gp->max_reads)
 893                                 return 1;
 894                         gp->reads_done += 1;
 895                         return 0;
 896                 }
 897         return 0;
 898 }
 899
 900 static void free_lists(void)
 901 {
 902         struct list_head *pos, *n;
 903         list_for_each_safe(pos, n, &weak_blocks) {
 904                 list_del(pos);
 905                 kfree(list_entry(pos, struct weak_block, list));
 906         }
 907         list_for_each_safe(pos, n, &weak_pages) {
 908                 list_del(pos);
 909                 kfree(list_entry(pos, struct weak_page, list));
 910         }
 911         list_for_each_safe(pos, n, &grave_pages) {
 912                 list_del(pos);
 913                 kfree(list_entry(pos, struct grave_page, list));
 914         }
 915         kfree(erase_block_wear);
 916 }
 917
 918 static int setup_wear_reporting(struct mtd_info *mtd)
 919 {
 920         size_t mem;
 921
 922         if (!rptwear)
 923                 return 0;
 924         wear_eb_count = divide(mtd->size, mtd->erasesize);
 925         mem = wear_eb_count * sizeof(unsigned long);
 926         if (mem / sizeof(unsigned long) != wear_eb_count) {
 927                 NS_ERR("Too many erase blocks for wear reporting\n");
 928                 return -ENOMEM;
 929         }
 930         erase_block_wear = kzalloc(mem, GFP_KERNEL);
 931         if (!erase_block_wear) {
 932                 NS_ERR("Too many erase blocks for wear reporting\n");
 933                 return -ENOMEM;
 934         }
 935         return 0;
 936 }
 937
 938 static void update_wear(unsigned int erase_block_no)
 939 {
 940         unsigned long wmin = -1, wmax = 0, avg;
 941         unsigned long deciles[10], decile_max[10], tot = 0;
 942         unsigned int i;
 943
 944         if (!erase_block_wear)
 945                 return;
 946         total_wear += 1;
 947         if (total_wear == 0)
 948                 NS_ERR("Erase counter total overflow\n");
 949         erase_block_wear[erase_block_no] += 1;
 950         if (erase_block_wear[erase_block_no] == 0)
 951                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
 952         rptwear_cnt += 1;
 953         if (rptwear_cnt < rptwear)
 954                 return;
 955         rptwear_cnt = 0;
 956         /* Calc wear stats */
 957         for (i = 0; i < wear_eb_count; ++i) {
 958                 unsigned long wear = erase_block_wear[i];
 959                 if (wear < wmin)
 960                         wmin = wear;
 961                 if (wear > wmax)
 962                         wmax = wear;
 963                 tot += wear;
 964         }
 965         for (i = 0; i < 9; ++i) {
 966                 deciles[i] = 0;
 967                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
 968         }
 969         deciles[9] = 0;
 970         decile_max[9] = wmax;
 971         for (i = 0; i < wear_eb_count; ++i) {
 972                 int d;
 973                 unsigned long wear = erase_block_wear[i];
 974                 for (d = 0; d < 10; ++d)
 975                         if (wear <= decile_max[d]) {
 976                                 deciles[d] += 1;
 977                                 break;
 978                         }
 979         }
 980         avg = tot / wear_eb_count;
 981         /* Output wear report */
 982         NS_INFO("*** Wear Report ***\n");
 983         NS_INFO("Total numbers of erases:  %lu\n", tot);
 984         NS_INFO("Number of erase blocks:   %u\n", wear_eb_count);
 985         NS_INFO("Average number of erases: %lu\n", avg);
 986         NS_INFO("Maximum number of erases: %lu\n", wmax);
 987         NS_INFO("Minimum number of erases: %lu\n", wmin);
 988         for (i = 0; i < 10; ++i) {
 989                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
 990                 if (from > decile_max[i])
 991                         continue;
 992                 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
 993                         from,
 994                         decile_max[i],
 995                         deciles[i]);
 996         }
 997         NS_INFO("*** End of Wear Report ***\n");
 998 }
 999
1000 /*
1001  * Returns the string representation of 'state' state.
1002  */
1003 static char *get_state_name(uint32_t state)
1004 {
1005         switch (NS_STATE(state)) {
1006                 case STATE_CMD_READ0:
1007                         return "STATE_CMD_READ0";
1008                 case STATE_CMD_READ1:
1009                         return "STATE_CMD_READ1";
1010                 case STATE_CMD_PAGEPROG:
1011                         return "STATE_CMD_PAGEPROG";
1012                 case STATE_CMD_READOOB:
1013                         return "STATE_CMD_READOOB";
1014                 case STATE_CMD_READSTART:
1015                         return "STATE_CMD_READSTART";
1016                 case STATE_CMD_ERASE1:
1017                         return "STATE_CMD_ERASE1";
1018                 case STATE_CMD_STATUS:
1019                         return "STATE_CMD_STATUS";
1020                 case STATE_CMD_STATUS_M:
1021                         return "STATE_CMD_STATUS_M";
1022                 case STATE_CMD_SEQIN:
1023                         return "STATE_CMD_SEQIN";
1024                 case STATE_CMD_READID:
1025                         return "STATE_CMD_READID";
1026                 case STATE_CMD_ERASE2:
1027                         return "STATE_CMD_ERASE2";
1028                 case STATE_CMD_RESET:
1029                         return "STATE_CMD_RESET";
1030                 case STATE_CMD_RNDOUT:
1031                         return "STATE_CMD_RNDOUT";
1032                 case STATE_CMD_RNDOUTSTART:
1033                         return "STATE_CMD_RNDOUTSTART";
1034                 case STATE_ADDR_PAGE:
1035                         return "STATE_ADDR_PAGE";
1036                 case STATE_ADDR_SEC:
1037                         return "STATE_ADDR_SEC";
1038                 case STATE_ADDR_ZERO:
1039                         return "STATE_ADDR_ZERO";
1040                 case STATE_ADDR_COLUMN:
1041                         return "STATE_ADDR_COLUMN";
1042                 case STATE_DATAIN:
1043                         return "STATE_DATAIN";
1044                 case STATE_DATAOUT:
1045                         return "STATE_DATAOUT";
1046                 case STATE_DATAOUT_ID:
1047                         return "STATE_DATAOUT_ID";
1048                 case STATE_DATAOUT_STATUS:
1049                         return "STATE_DATAOUT_STATUS";
1050                 case STATE_DATAOUT_STATUS_M:
1051                         return "STATE_DATAOUT_STATUS_M";
1052                 case STATE_READY:
1053                         return "STATE_READY";
1054                 case STATE_UNKNOWN:
1055                         return "STATE_UNKNOWN";
1056         }
1057
1058         NS_ERR("get_state_name: unknown state, BUG\n");
1059         return NULL;
1060 }
1061
1062 /*
1063  * Check if command is valid.
1064  *
1065  * RETURNS: 1 if wrong command, 0 if right.
1066  */
1067 static int check_command(int cmd)
1068 {
1069         switch (cmd) {
1070
1071         case NAND_CMD_READ0:
1072         case NAND_CMD_READ1:
1073         case NAND_CMD_READSTART:
1074         case NAND_CMD_PAGEPROG:
1075         case NAND_CMD_READOOB:
1076         case NAND_CMD_ERASE1:
1077         case NAND_CMD_STATUS:
1078         case NAND_CMD_SEQIN:
1079         case NAND_CMD_READID:
1080         case NAND_CMD_ERASE2:
1081         case NAND_CMD_RESET:
1082         case NAND_CMD_RNDOUT:
1083         case NAND_CMD_RNDOUTSTART:
1084                 return 0;
1085
1086         case NAND_CMD_STATUS_MULTI:
1087         default:
1088                 return 1;
1089         }
1090 }
1091
1092 /*
1093  * Returns state after command is accepted by command number.
1094  */
1095 static uint32_t get_state_by_command(unsigned command)
1096 {
1097         switch (command) {
1098                 case NAND_CMD_READ0:
1099                         return STATE_CMD_READ0;
1100                 case NAND_CMD_READ1:
1101                         return STATE_CMD_READ1;
1102                 case NAND_CMD_PAGEPROG:
1103                         return STATE_CMD_PAGEPROG;
1104                 case NAND_CMD_READSTART:
1105                         return STATE_CMD_READSTART;
1106                 case NAND_CMD_READOOB:
1107                         return STATE_CMD_READOOB;
1108                 case NAND_CMD_ERASE1:
1109                         return STATE_CMD_ERASE1;
1110                 case NAND_CMD_STATUS:
1111                         return STATE_CMD_STATUS;
1112                 case NAND_CMD_STATUS_MULTI:
1113                         return STATE_CMD_STATUS_M;
1114                 case NAND_CMD_SEQIN:
1115                         return STATE_CMD_SEQIN;
1116                 case NAND_CMD_READID:
1117                         return STATE_CMD_READID;
1118                 case NAND_CMD_ERASE2:
1119                         return STATE_CMD_ERASE2;
1120                 case NAND_CMD_RESET:
1121                         return STATE_CMD_RESET;
1122                 case NAND_CMD_RNDOUT:
1123                         return STATE_CMD_RNDOUT;
1124                 case NAND_CMD_RNDOUTSTART:
1125                         return STATE_CMD_RNDOUTSTART;
1126         }
1127
1128         NS_ERR("get_state_by_command: unknown command, BUG\n");
1129         return 0;
1130 }
1131
1132 /*
1133  * Move an address byte to the correspondent internal register.
1134  */
1135 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1136 {
1137         uint byte = (uint)bt;
1138
1139         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1140                 ns->regs.column |= (byte << 8 * ns->regs.count);
1141         else {
1142                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1143                                                 ns->geom.pgaddrbytes +
1144                                                 ns->geom.secaddrbytes));
1145         }
1146
1147         return;
1148 }
1149
1150 /*
1151  * Switch to STATE_READY state.
1152  */
1153 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1154 {
1155         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1156
1157         ns->state       = STATE_READY;
1158         ns->nxstate     = STATE_UNKNOWN;
1159         ns->op          = NULL;
1160         ns->npstates    = 0;
1161         ns->stateidx    = 0;
1162         ns->regs.num    = 0;
1163         ns->regs.count  = 0;
1164         ns->regs.off    = 0;
1165         ns->regs.row    = 0;
1166         ns->regs.column = 0;
1167         ns->regs.status = status;
1168 }
1169
1170 /*
1171  * If the operation isn't known yet, try to find it in the global array
1172  * of supported operations.
1173  *
1174  * Operation can be unknown because of the following.
1175  *   1. New command was accepted and this is the first call to find the
1176  *      correspondent states chain. In this case ns->npstates = 0;
1177  *   2. There are several operations which begin with the same command(s)
1178  *      (for example program from the second half and read from the
1179  *      second half operations both begin with the READ1 command). In this
1180  *      case the ns->pstates[] array contains previous states.
1181  *
1182  * Thus, the function tries to find operation containing the following
1183  * states (if the 'flag' parameter is 0):
1184  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1185  *
1186  * If (one and only one) matching operation is found, it is accepted (
1187  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1188  * zeroed).
1189  *
1190  * If there are several matches, the current state is pushed to the
1191  * ns->pstates.
1192  *
1193  * The operation can be unknown only while commands are input to the chip.
1194  * As soon as address command is accepted, the operation must be known.
1195  * In such situation the function is called with 'flag' != 0, and the
1196  * operation is searched using the following pattern:
1197  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1198  *
1199  * It is supposed that this pattern must either match one operation or
1200  * none. There can't be ambiguity in that case.
1201  *
1202  * If no matches found, the function does the following:
1203  *   1. if there are saved states present, try to ignore them and search
1204  *      again only using the last command. If nothing was found, switch
1205  *      to the STATE_READY state.
1206  *   2. if there are no saved states, switch to the STATE_READY state.
1207  *
1208  * RETURNS: -2 - no matched operations found.
1209  *          -1 - several matches.
1210  *           0 - operation is found.
1211  */
1212 static int find_operation(struct nandsim *ns, uint32_t flag)
1213 {
1214         int opsfound = 0;
1215         int i, j, idx = 0;
1216
1217         for (i = 0; i < NS_OPER_NUM; i++) {
1218
1219                 int found = 1;
1220
1221                 if (!(ns->options & ops[i].reqopts))
1222                         /* Ignore operations we can't perform */
1223                         continue;
1224
1225                 if (flag) {
1226                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1227                                 continue;
1228                 } else {
1229                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1230                                 continue;
1231                 }
1232
1233                 for (j = 0; j < ns->npstates; j++)
1234                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1235                                 && (ns->options & ops[idx].reqopts)) {
1236                                 found = 0;
1237                                 break;
1238                         }
1239
1240                 if (found) {
1241                         idx = i;
1242                         opsfound += 1;
1243                 }
1244         }
1245
1246         if (opsfound == 1) {
1247                 /* Exact match */
1248                 ns->op = &ops[idx].states[0];
1249                 if (flag) {
1250                         /*
1251                          * In this case the find_operation function was
1252                          * called when address has just began input. But it isn't
1253                          * yet fully input and the current state must
1254                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1255                          * state must be the next state (ns->nxstate).
1256                          */
1257                         ns->stateidx = ns->npstates - 1;
1258                 } else {
1259                         ns->stateidx = ns->npstates;
1260                 }
1261                 ns->npstates = 0;
1262                 ns->state = ns->op[ns->stateidx];
1263                 ns->nxstate = ns->op[ns->stateidx + 1];
1264                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1265                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1266                 return 0;
1267         }
1268
1269         if (opsfound == 0) {
1270                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1271                 if (ns->npstates != 0) {
1272                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1273                                         get_state_name(ns->state));
1274                         ns->npstates = 0;
1275                         return find_operation(ns, 0);
1276
1277                 }
1278                 NS_DBG("find_operation: no operations found\n");
1279                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1280                 return -2;
1281         }
1282
1283         if (flag) {
1284                 /* This shouldn't happen */
1285                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1286                 return -2;
1287         }
1288
1289         NS_DBG("find_operation: there is still ambiguity\n");
1290
1291         ns->pstates[ns->npstates++] = ns->state;
1292
1293         return -1;
1294 }
1295
1296 static void put_pages(struct nandsim *ns)
1297 {
1298         int i;
1299
1300         for (i = 0; i < ns->held_cnt; i++)
1301                 page_cache_release(ns->held_pages[i]);
1302 }
1303
1304 /* Get page cache pages in advance to provide NOFS memory allocation */
1305 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1306 {
1307         pgoff_t index, start_index, end_index;
1308         struct page *page;
1309         struct address_space *mapping = file->f_mapping;
1310
1311         start_index = pos >> PAGE_CACHE_SHIFT;
1312         end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1313         if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1314                 return -EINVAL;
1315         ns->held_cnt = 0;
1316         for (index = start_index; index <= end_index; index++) {
1317                 page = find_get_page(mapping, index);
1318                 if (page == NULL) {
1319                         page = find_or_create_page(mapping, index, GFP_NOFS);
1320                         if (page == NULL) {
1321                                 write_inode_now(mapping->host, 1);
1322                                 page = find_or_create_page(mapping, index, GFP_NOFS);
1323                         }
1324                         if (page == NULL) {
1325                                 put_pages(ns);
1326                                 return -ENOMEM;
1327                         }
1328                         unlock_page(page);
1329                 }
1330                 ns->held_pages[ns->held_cnt++] = page;
1331         }
1332         return 0;
1333 }
1334
1335 static int set_memalloc(void)
1336 {
1337         if (current->flags & PF_MEMALLOC)
1338                 return 0;
1339         current->flags |= PF_MEMALLOC;
1340         return 1;
1341 }
1342
1343 static void clear_memalloc(int memalloc)
1344 {
1345         if (memalloc)
1346                 current->flags &= ~PF_MEMALLOC;
1347 }
1348
1349 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1350 {
1351         mm_segment_t old_fs;
1352         ssize_t tx;
1353         int err, memalloc;
1354
1355         err = get_pages(ns, file, count, *pos);
1356         if (err)
1357                 return err;
1358         old_fs = get_fs();
1359         set_fs(get_ds());
1360         memalloc = set_memalloc();
1361         tx = vfs_read(file, (char __user *)buf, count, pos);
1362         clear_memalloc(memalloc);
1363         set_fs(old_fs);
1364         put_pages(ns);
1365         return tx;
1366 }
1367
1368 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1369 {
1370         mm_segment_t old_fs;
1371         ssize_t tx;
1372         int err, memalloc;
1373
1374         err = get_pages(ns, file, count, *pos);
1375         if (err)
1376                 return err;
1377         old_fs = get_fs();
1378         set_fs(get_ds());
1379         memalloc = set_memalloc();
1380         tx = vfs_write(file, (char __user *)buf, count, pos);
1381         clear_memalloc(memalloc);
1382         set_fs(old_fs);
1383         put_pages(ns);
1384         return tx;
1385 }
1386
1387 /*
1388  * Returns a pointer to the current page.
1389  */
1390 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1391 {
1392         return &(ns->pages[ns->regs.row]);
1393 }
1394
1395 /*
1396  * Retuns a pointer to the current byte, within the current page.
1397  */
1398 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1399 {
1400         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1401 }
1402
1403 int do_read_error(struct nandsim *ns, int num)
1404 {
1405         unsigned int page_no = ns->regs.row;
1406
1407         if (read_error(page_no)) {
1408                 int i;
1409                 memset(ns->buf.byte, 0xFF, num);
1410                 for (i = 0; i < num; ++i)
1411                         ns->buf.byte[i] = random32();
1412                 NS_WARN("simulating read error in page %u\n", page_no);
1413                 return 1;
1414         }
1415         return 0;
1416 }
1417
1418 void do_bit_flips(struct nandsim *ns, int num)
1419 {
1420         if (bitflips && random32() < (1 << 22)) {
1421                 int flips = 1;
1422                 if (bitflips > 1)
1423                         flips = (random32() % (int) bitflips) + 1;
1424                 while (flips--) {
1425                         int pos = random32() % (num * 8);
1426                         ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1427                         NS_WARN("read_page: flipping bit %d in page %d "
1428                                 "reading from %d ecc: corrected=%u failed=%u\n",
1429                                 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1430                                 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1431                 }
1432         }
1433 }
1434
1435 /*
1436  * Fill the NAND buffer with data read from the specified page.
1437  */
1438 static void read_page(struct nandsim *ns, int num)
1439 {
1440         union ns_mem *mypage;
1441
1442         if (ns->cfile) {
1443                 if (!ns->pages_written[ns->regs.row]) {
1444                         NS_DBG("read_page: page %d not written\n", ns->regs.row);
1445                         memset(ns->buf.byte, 0xFF, num);
1446                 } else {
1447                         loff_t pos;
1448                         ssize_t tx;
1449
1450                         NS_DBG("read_page: page %d written, reading from %d\n",
1451                                 ns->regs.row, ns->regs.column + ns->regs.off);
1452                         if (do_read_error(ns, num))
1453                                 return;
1454                         pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1455                         tx = read_file(ns, ns->cfile, ns->buf.byte, num, &pos);
1456                         if (tx != num) {
1457                                 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1458                                 return;
1459                         }
1460                         do_bit_flips(ns, num);
1461                 }
1462                 return;
1463         }
1464
1465         mypage = NS_GET_PAGE(ns);
1466         if (mypage->byte == NULL) {
1467                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1468                 memset(ns->buf.byte, 0xFF, num);
1469         } else {
1470                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1471                         ns->regs.row, ns->regs.column + ns->regs.off);
1472                 if (do_read_error(ns, num))
1473                         return;
1474                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1475                 do_bit_flips(ns, num);
1476         }
1477 }
1478
1479 /*
1480  * Erase all pages in the specified sector.
1481  */
1482 static void erase_sector(struct nandsim *ns)
1483 {
1484         union ns_mem *mypage;
1485         int i;
1486
1487         if (ns->cfile) {
1488                 for (i = 0; i < ns->geom.pgsec; i++)
1489                         if (ns->pages_written[ns->regs.row + i]) {
1490                                 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1491                                 ns->pages_written[ns->regs.row + i] = 0;
1492                         }
1493                 return;
1494         }
1495
1496         mypage = NS_GET_PAGE(ns);
1497         for (i = 0; i < ns->geom.pgsec; i++) {
1498                 if (mypage->byte != NULL) {
1499                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1500                         kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1501                         mypage->byte = NULL;
1502                 }
1503                 mypage++;
1504         }
1505 }
1506
1507 /*
1508  * Program the specified page with the contents from the NAND buffer.
1509  */
1510 static int prog_page(struct nandsim *ns, int num)
1511 {
1512         int i;
1513         union ns_mem *mypage;
1514         u_char *pg_off;
1515
1516         if (ns->cfile) {
1517                 loff_t off, pos;
1518                 ssize_t tx;
1519                 int all;
1520
1521                 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1522                 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1523                 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1524                 if (!ns->pages_written[ns->regs.row]) {
1525                         all = 1;
1526                         memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1527                 } else {
1528                         all = 0;
1529                         pos = off;
1530                         tx = read_file(ns, ns->cfile, pg_off, num, &pos);
1531                         if (tx != num) {
1532                                 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1533                                 return -1;
1534                         }
1535                 }
1536                 for (i = 0; i < num; i++)
1537                         pg_off[i] &= ns->buf.byte[i];
1538                 if (all) {
1539                         pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1540                         tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, &pos);
1541                         if (tx != ns->geom.pgszoob) {
1542                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1543                                 return -1;
1544                         }
1545                         ns->pages_written[ns->regs.row] = 1;
1546                 } else {
1547                         pos = off;
1548                         tx = write_file(ns, ns->cfile, pg_off, num, &pos);
1549                         if (tx != num) {
1550                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1551                                 return -1;
1552                         }
1553                 }
1554                 return 0;
1555         }
1556
1557         mypage = NS_GET_PAGE(ns);
1558         if (mypage->byte == NULL) {
1559                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1560                 /*
1561                  * We allocate memory with GFP_NOFS because a flash FS may
1562                  * utilize this. If it is holding an FS lock, then gets here,
1563                  * then kernel memory alloc runs writeback which goes to the FS
1564                  * again and deadlocks. This was seen in practice.
1565                  */
1566                 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1567                 if (mypage->byte == NULL) {
1568                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1569                         return -1;
1570                 }
1571                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1572         }
1573
1574         pg_off = NS_PAGE_BYTE_OFF(ns);
1575         for (i = 0; i < num; i++)
1576                 pg_off[i] &= ns->buf.byte[i];
1577
1578         return 0;
1579 }
1580
1581 /*
1582  * If state has any action bit, perform this action.
1583  *
1584  * RETURNS: 0 if success, -1 if error.
1585  */
1586 static int do_state_action(struct nandsim *ns, uint32_t action)
1587 {
1588         int num;
1589         int busdiv = ns->busw == 8 ? 1 : 2;
1590         unsigned int erase_block_no, page_no;
1591
1592         action &= ACTION_MASK;
1593
1594         /* Check that page address input is correct */
1595         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1596                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1597                 return -1;
1598         }
1599
1600         switch (action) {
1601
1602         case ACTION_CPY:
1603                 /*
1604                  * Copy page data to the internal buffer.
1605                  */
1606
1607                 /* Column shouldn't be very large */
1608                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1609                         NS_ERR("do_state_action: column number is too large\n");
1610                         break;
1611                 }
1612                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1613                 read_page(ns, num);
1614
1615                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1616                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1617
1618                 if (ns->regs.off == 0)
1619                         NS_LOG("read page %d\n", ns->regs.row);
1620                 else if (ns->regs.off < ns->geom.pgsz)
1621                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1622                 else
1623                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1624
1625                 NS_UDELAY(access_delay);
1626                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1627
1628                 break;
1629
1630         case ACTION_SECERASE:
1631                 /*
1632                  * Erase sector.
1633                  */
1634
1635                 if (ns->lines.wp) {
1636                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1637                         return -1;
1638                 }
1639
1640                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1641                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1642                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1643                         return -1;
1644                 }
1645
1646                 ns->regs.row = (ns->regs.row <<
1647                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1648                 ns->regs.column = 0;
1649
1650                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1651
1652                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1653                                 ns->regs.row, NS_RAW_OFFSET(ns));
1654                 NS_LOG("erase sector %u\n", erase_block_no);
1655
1656                 erase_sector(ns);
1657
1658                 NS_MDELAY(erase_delay);
1659
1660                 if (erase_block_wear)
1661                         update_wear(erase_block_no);
1662
1663                 if (erase_error(erase_block_no)) {
1664                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1665                         return -1;
1666                 }
1667
1668                 break;
1669
1670         case ACTION_PRGPAGE:
1671                 /*
1672                  * Program page - move internal buffer data to the page.
1673                  */
1674
1675                 if (ns->lines.wp) {
1676                         NS_WARN("do_state_action: device is write-protected, programm\n");
1677                         return -1;
1678                 }
1679
1680                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1681                 if (num != ns->regs.count) {
1682                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1683                                         ns->regs.count, num);
1684                         return -1;
1685                 }
1686
1687                 if (prog_page(ns, num) == -1)
1688                         return -1;
1689
1690                 page_no = ns->regs.row;
1691
1692                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1693                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1694                 NS_LOG("programm page %d\n", ns->regs.row);
1695
1696                 NS_UDELAY(programm_delay);
1697                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1698
1699                 if (write_error(page_no)) {
1700                         NS_WARN("simulating write failure in page %u\n", page_no);
1701                         return -1;
1702                 }
1703
1704                 break;
1705
1706         case ACTION_ZEROOFF:
1707                 NS_DBG("do_state_action: set internal offset to 0\n");
1708                 ns->regs.off = 0;
1709                 break;
1710
1711         case ACTION_HALFOFF:
1712                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1713                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1714                                 "byte page size 8x chips\n");
1715                         return -1;
1716                 }
1717                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1718                 ns->regs.off = ns->geom.pgsz/2;
1719                 break;
1720
1721         case ACTION_OOBOFF:
1722                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1723                 ns->regs.off = ns->geom.pgsz;
1724                 break;
1725
1726         default:
1727                 NS_DBG("do_state_action: BUG! unknown action\n");
1728         }
1729
1730         return 0;
1731 }
1732
1733 /*
1734  * Switch simulator's state.
1735  */
1736 static void switch_state(struct nandsim *ns)
1737 {
1738         if (ns->op) {
1739                 /*
1740                  * The current operation have already been identified.
1741                  * Just follow the states chain.
1742                  */
1743
1744                 ns->stateidx += 1;
1745                 ns->state = ns->nxstate;
1746                 ns->nxstate = ns->op[ns->stateidx + 1];
1747
1748                 NS_DBG("switch_state: operation is known, switch to the next state, "
1749                         "state: %s, nxstate: %s\n",
1750                         get_state_name(ns->state), get_state_name(ns->nxstate));
1751
1752                 /* See, whether we need to do some action */
1753                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1754                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1755                         return;
1756                 }
1757
1758         } else {
1759                 /*
1760                  * We don't yet know which operation we perform.
1761                  * Try to identify it.
1762                  */
1763
1764                 /*
1765                  *  The only event causing the switch_state function to
1766                  *  be called with yet unknown operation is new command.
1767                  */
1768                 ns->state = get_state_by_command(ns->regs.command);
1769
1770                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1771
1772                 if (find_operation(ns, 0) != 0)
1773                         return;
1774
1775                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1776                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1777                         return;
1778                 }
1779         }
1780
1781         /* For 16x devices column means the page offset in words */
1782         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1783                 NS_DBG("switch_state: double the column number for 16x device\n");
1784                 ns->regs.column <<= 1;
1785         }
1786
1787         if (NS_STATE(ns->nxstate) == STATE_READY) {
1788                 /*
1789                  * The current state is the last. Return to STATE_READY
1790                  */
1791
1792                 u_char status = NS_STATUS_OK(ns);
1793
1794                 /* In case of data states, see if all bytes were input/output */
1795                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1796                         && ns->regs.count != ns->regs.num) {
1797                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1798                                         ns->regs.num - ns->regs.count);
1799                         status = NS_STATUS_FAILED(ns);
1800                 }
1801
1802                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1803
1804                 switch_to_ready_state(ns, status);
1805
1806                 return;
1807         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1808                 /*
1809                  * If the next state is data input/output, switch to it now
1810                  */
1811
1812                 ns->state      = ns->nxstate;
1813                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1814                 ns->regs.num   = ns->regs.count = 0;
1815
1816                 NS_DBG("switch_state: the next state is data I/O, switch, "
1817                         "state: %s, nxstate: %s\n",
1818                         get_state_name(ns->state), get_state_name(ns->nxstate));
1819
1820                 /*
1821                  * Set the internal register to the count of bytes which
1822                  * are expected to be input or output
1823                  */
1824                 switch (NS_STATE(ns->state)) {
1825                         case STATE_DATAIN:
1826                         case STATE_DATAOUT:
1827                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1828                                 break;
1829
1830                         case STATE_DATAOUT_ID:
1831                                 ns->regs.num = ns->geom.idbytes;
1832                                 break;
1833
1834                         case STATE_DATAOUT_STATUS:
1835                         case STATE_DATAOUT_STATUS_M:
1836                                 ns->regs.count = ns->regs.num = 0;
1837                                 break;
1838
1839                         default:
1840                                 NS_ERR("switch_state: BUG! unknown data state\n");
1841                 }
1842
1843         } else if (ns->nxstate & STATE_ADDR_MASK) {
1844                 /*
1845                  * If the next state is address input, set the internal
1846                  * register to the number of expected address bytes
1847                  */
1848
1849                 ns->regs.count = 0;
1850
1851                 switch (NS_STATE(ns->nxstate)) {
1852                         case STATE_ADDR_PAGE:
1853                                 ns->regs.num = ns->geom.pgaddrbytes;
1854
1855                                 break;
1856                         case STATE_ADDR_SEC:
1857                                 ns->regs.num = ns->geom.secaddrbytes;
1858                                 break;
1859
1860                         case STATE_ADDR_ZERO:
1861                                 ns->regs.num = 1;
1862                                 break;
1863
1864                         case STATE_ADDR_COLUMN:
1865                                 /* Column address is always 2 bytes */
1866                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1867                                 break;
1868
1869                         default:
1870                                 NS_ERR("switch_state: BUG! unknown address state\n");
1871                 }
1872         } else {
1873                 /*
1874                  * Just reset internal counters.
1875                  */
1876
1877                 ns->regs.num = 0;
1878                 ns->regs.count = 0;
1879         }
1880 }
1881
1882 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1883 {
1884         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1885         u_char outb = 0x00;
1886
1887         /* Sanity and correctness checks */
1888         if (!ns->lines.ce) {
1889                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1890                 return outb;
1891         }
1892         if (ns->lines.ale || ns->lines.cle) {
1893                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1894                 return outb;
1895         }
1896         if (!(ns->state & STATE_DATAOUT_MASK)) {
1897                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1898                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1899                 return outb;
1900         }
1901
1902         /* Status register may be read as many times as it is wanted */
1903         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1904                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1905                 return ns->regs.status;
1906         }
1907
1908         /* Check if there is any data in the internal buffer which may be read */
1909         if (ns->regs.count == ns->regs.num) {
1910                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1911                 return outb;
1912         }
1913
1914         switch (NS_STATE(ns->state)) {
1915                 case STATE_DATAOUT:
1916                         if (ns->busw == 8) {
1917                                 outb = ns->buf.byte[ns->regs.count];
1918                                 ns->regs.count += 1;
1919                         } else {
1920                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1921                                 ns->regs.count += 2;
1922                         }
1923                         break;
1924                 case STATE_DATAOUT_ID:
1925                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1926                         outb = ns->ids[ns->regs.count];
1927                         ns->regs.count += 1;
1928                         break;
1929                 default:
1930                         BUG();
1931         }
1932
1933         if (ns->regs.count == ns->regs.num) {
1934                 NS_DBG("read_byte: all bytes were read\n");
1935
1936                 if (NS_STATE(ns->nxstate) == STATE_READY)
1937                         switch_state(ns);
1938         }
1939
1940         return outb;
1941 }
1942
1943 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1944 {
1945         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1946
1947         /* Sanity and correctness checks */
1948         if (!ns->lines.ce) {
1949                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1950                 return;
1951         }
1952         if (ns->lines.ale && ns->lines.cle) {
1953                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1954                 return;
1955         }
1956
1957         if (ns->lines.cle == 1) {
1958                 /*
1959                  * The byte written is a command.
1960                  */
1961
1962                 if (byte == NAND_CMD_RESET) {
1963                         NS_LOG("reset chip\n");
1964                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
1965                         return;
1966                 }
1967
1968                 /* Check that the command byte is correct */
1969                 if (check_command(byte)) {
1970                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1971                         return;
1972                 }
1973
1974                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1975                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1976                         || NS_STATE(ns->state) == STATE_DATAOUT) {
1977                         int row = ns->regs.row;
1978
1979                         switch_state(ns);
1980                         if (byte == NAND_CMD_RNDOUT)
1981                                 ns->regs.row = row;
1982                 }
1983
1984                 /* Check if chip is expecting command */
1985                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1986                         /* Do not warn if only 2 id bytes are read */
1987                         if (!(ns->regs.command == NAND_CMD_READID &&
1988                             NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1989                                 /*
1990                                  * We are in situation when something else (not command)
1991                                  * was expected but command was input. In this case ignore
1992                                  * previous command(s)/state(s) and accept the last one.
1993                                  */
1994                                 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
1995                                         "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
1996                         }
1997                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1998                 }
1999
2000                 NS_DBG("command byte corresponding to %s state accepted\n",
2001                         get_state_name(get_state_by_command(byte)));
2002                 ns->regs.command = byte;
2003                 switch_state(ns);
2004
2005         } else if (ns->lines.ale == 1) {
2006                 /*
2007                  * The byte written is an address.
2008                  */
2009
2010                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2011
2012                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
2013
2014                         if (find_operation(ns, 1) < 0)
2015                                 return;
2016
2017                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2018                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2019                                 return;
2020                         }
2021
2022                         ns->regs.count = 0;
2023                         switch (NS_STATE(ns->nxstate)) {
2024                                 case STATE_ADDR_PAGE:
2025                                         ns->regs.num = ns->geom.pgaddrbytes;
2026                                         break;
2027                                 case STATE_ADDR_SEC:
2028                                         ns->regs.num = ns->geom.secaddrbytes;
2029                                         break;
2030                                 case STATE_ADDR_ZERO:
2031                                         ns->regs.num = 1;
2032                                         break;
2033                                 default:
2034                                         BUG();
2035                         }
2036                 }
2037
2038                 /* Check that chip is expecting address */
2039                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2040                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2041                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2042                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2043                         return;
2044                 }
2045
2046                 /* Check if this is expected byte */
2047                 if (ns->regs.count == ns->regs.num) {
2048                         NS_ERR("write_byte: no more address bytes expected\n");
2049                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2050                         return;
2051                 }
2052
2053                 accept_addr_byte(ns, byte);
2054
2055                 ns->regs.count += 1;
2056
2057                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2058                                 (uint)byte, ns->regs.count, ns->regs.num);
2059
2060                 if (ns->regs.count == ns->regs.num) {
2061                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2062                         switch_state(ns);
2063                 }
2064
2065         } else {
2066                 /*
2067                  * The byte written is an input data.
2068                  */
2069
2070                 /* Check that chip is expecting data input */
2071                 if (!(ns->state & STATE_DATAIN_MASK)) {
2072                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2073                                 "switch to %s\n", (uint)byte,
2074                                 get_state_name(ns->state), get_state_name(STATE_READY));
2075                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2076                         return;
2077                 }
2078
2079                 /* Check if this is expected byte */
2080                 if (ns->regs.count == ns->regs.num) {
2081                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2082                                         ns->regs.num);
2083                         return;
2084                 }
2085
2086                 if (ns->busw == 8) {
2087                         ns->buf.byte[ns->regs.count] = byte;
2088                         ns->regs.count += 1;
2089                 } else {
2090                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2091                         ns->regs.count += 2;
2092                 }
2093         }
2094
2095         return;
2096 }
2097
2098 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2099 {
2100         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2101
2102         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2103         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2104         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2105
2106         if (cmd != NAND_CMD_NONE)
2107                 ns_nand_write_byte(mtd, cmd);
2108 }
2109
2110 static int ns_device_ready(struct mtd_info *mtd)
2111 {
2112         NS_DBG("device_ready\n");
2113         return 1;
2114 }
2115
2116 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2117 {
2118         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2119
2120         NS_DBG("read_word\n");
2121
2122         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2123 }
2124
2125 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2126 {
2127         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2128
2129         /* Check that chip is expecting data input */
2130         if (!(ns->state & STATE_DATAIN_MASK)) {
2131                 NS_ERR("write_buf: data input isn't expected, state is %s, "
2132                         "switch to STATE_READY\n", get_state_name(ns->state));
2133                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2134                 return;
2135         }
2136
2137         /* Check if these are expected bytes */
2138         if (ns->regs.count + len > ns->regs.num) {
2139                 NS_ERR("write_buf: too many input bytes\n");
2140                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2141                 return;
2142         }
2143
2144         memcpy(ns->buf.byte + ns->regs.count, buf, len);
2145         ns->regs.count += len;
2146
2147         if (ns->regs.count == ns->regs.num) {
2148                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2149         }
2150 }
2151
2152 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2153 {
2154         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2155
2156         /* Sanity and correctness checks */
2157         if (!ns->lines.ce) {
2158                 NS_ERR("read_buf: chip is disabled\n");
2159                 return;
2160         }
2161         if (ns->lines.ale || ns->lines.cle) {
2162                 NS_ERR("read_buf: ALE or CLE pin is high\n");
2163                 return;
2164         }
2165         if (!(ns->state & STATE_DATAOUT_MASK)) {
2166                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2167                         get_state_name(ns->state));
2168                 return;
2169         }
2170
2171         if (NS_STATE(ns->state) != STATE_DATAOUT) {
2172                 int i;
2173
2174                 for (i = 0; i < len; i++)
2175                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2176
2177                 return;
2178         }
2179
2180         /* Check if these are expected bytes */
2181         if (ns->regs.count + len > ns->regs.num) {
2182                 NS_ERR("read_buf: too many bytes to read\n");
2183                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2184                 return;
2185         }
2186
2187         memcpy(buf, ns->buf.byte + ns->regs.count, len);
2188         ns->regs.count += len;
2189
2190         if (ns->regs.count == ns->regs.num) {
2191                 if (NS_STATE(ns->nxstate) == STATE_READY)
2192                         switch_state(ns);
2193         }
2194
2195         return;
2196 }
2197
2198 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
2199 {
2200         ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
2201
2202         if (!memcmp(buf, &ns_verify_buf[0], len)) {
2203                 NS_DBG("verify_buf: the buffer is OK\n");
2204                 return 0;
2205         } else {
2206                 NS_DBG("verify_buf: the buffer is wrong\n");
2207                 return -EFAULT;
2208         }
2209 }
2210
2211 /*
2212  * Module initialization function
2213  */
2214 static int __init ns_init_module(void)
2215 {
2216         struct nand_chip *chip;
2217         struct nandsim *nand;
2218         int retval = -ENOMEM, i;
2219
2220         if (bus_width != 8 && bus_width != 16) {
2221                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2222                 return -EINVAL;
2223         }
2224
2225         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2226         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2227                                 + sizeof(struct nandsim), GFP_KERNEL);
2228         if (!nsmtd) {
2229                 NS_ERR("unable to allocate core structures.\n");
2230                 return -ENOMEM;
2231         }
2232         chip        = (struct nand_chip *)(nsmtd + 1);
2233         nsmtd->priv = (void *)chip;
2234         nand        = (struct nandsim *)(chip + 1);
2235         chip->priv  = (void *)nand;
2236
2237         /*
2238          * Register simulator's callbacks.
2239          */
2240         chip->cmd_ctrl   = ns_hwcontrol;
2241         chip->read_byte  = ns_nand_read_byte;
2242         chip->dev_ready  = ns_device_ready;
2243         chip->write_buf  = ns_nand_write_buf;
2244         chip->read_buf   = ns_nand_read_buf;
2245         chip->verify_buf = ns_nand_verify_buf;
2246         chip->read_word  = ns_nand_read_word;
2247         chip->ecc.mode   = NAND_ECC_SOFT;
2248         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2249         /* and 'badblocks' parameters to work */
2250         chip->options   |= NAND_SKIP_BBTSCAN;
2251
2252         switch (bbt) {
2253         case 2:
2254                  chip->bbt_options |= NAND_BBT_NO_OOB;
2255         case 1:
2256                  chip->bbt_options |= NAND_BBT_USE_FLASH;
2257         case 0:
2258                 break;
2259         default:
2260                 NS_ERR("bbt has to be 0..2\n");
2261                 retval = -EINVAL;
2262                 goto error;
2263         }
2264         /*
2265          * Perform minimum nandsim structure initialization to handle
2266          * the initial ID read command correctly
2267          */
2268         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2269                 nand->geom.idbytes = 4;
2270         else
2271                 nand->geom.idbytes = 2;
2272         nand->regs.status = NS_STATUS_OK(nand);
2273         nand->nxstate = STATE_UNKNOWN;
2274         nand->options |= OPT_PAGE256; /* temporary value */
2275         nand->ids[0] = first_id_byte;
2276         nand->ids[1] = second_id_byte;
2277         nand->ids[2] = third_id_byte;
2278         nand->ids[3] = fourth_id_byte;
2279         if (bus_width == 16) {
2280                 nand->busw = 16;
2281                 chip->options |= NAND_BUSWIDTH_16;
2282         }
2283
2284         nsmtd->owner = THIS_MODULE;
2285
2286         if ((retval = parse_weakblocks()) != 0)
2287                 goto error;
2288
2289         if ((retval = parse_weakpages()) != 0)
2290                 goto error;
2291
2292         if ((retval = parse_gravepages()) != 0)
2293                 goto error;
2294
2295         retval = nand_scan_ident(nsmtd, 1, NULL);
2296         if (retval) {
2297                 NS_ERR("cannot scan NAND Simulator device\n");
2298                 if (retval > 0)
2299                         retval = -ENXIO;
2300                 goto error;
2301         }
2302
2303         if (bch) {
2304                 unsigned int eccsteps, eccbytes;
2305                 if (!mtd_nand_has_bch()) {
2306                         NS_ERR("BCH ECC support is disabled\n");
2307                         retval = -EINVAL;
2308                         goto error;
2309                 }
2310                 /* use 512-byte ecc blocks */
2311                 eccsteps = nsmtd->writesize/512;
2312                 eccbytes = (bch*13+7)/8;
2313                 /* do not bother supporting small page devices */
2314                 if ((nsmtd->oobsize < 64) || !eccsteps) {
2315                         NS_ERR("bch not available on small page devices\n");
2316                         retval = -EINVAL;
2317                         goto error;
2318                 }
2319                 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2320                         NS_ERR("invalid bch value %u\n", bch);
2321                         retval = -EINVAL;
2322                         goto error;
2323                 }
2324                 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2325                 chip->ecc.size = 512;
2326                 chip->ecc.bytes = eccbytes;
2327                 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2328         }
2329
2330         retval = nand_scan_tail(nsmtd);
2331         if (retval) {
2332                 NS_ERR("can't register NAND Simulator\n");
2333                 if (retval > 0)
2334                         retval = -ENXIO;
2335                 goto error;
2336         }
2337
2338         if (overridesize) {
2339                 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2340                 if (new_size >> overridesize != nsmtd->erasesize) {
2341                         NS_ERR("overridesize is too big\n");
2342                         goto err_exit;
2343                 }
2344                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2345                 nsmtd->size = new_size;
2346                 chip->chipsize = new_size;
2347                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2348                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2349         }
2350
2351         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2352                 goto err_exit;
2353
2354         if ((retval = init_nandsim(nsmtd)) != 0)
2355                 goto err_exit;
2356
2357         if ((retval = nand_default_bbt(nsmtd)) != 0)
2358                 goto err_exit;
2359
2360         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2361                 goto err_exit;
2362
2363         /* Register NAND partitions */
2364         retval = mtd_device_register(nsmtd, &nand->partitions[0],
2365                                      nand->nbparts);
2366         if (retval != 0)
2367                 goto err_exit;
2368
2369         return 0;
2370
2371 err_exit:
2372         free_nandsim(nand);
2373         nand_release(nsmtd);
2374         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2375                 kfree(nand->partitions[i].name);
2376 error:
2377         kfree(nsmtd);
2378         free_lists();
2379
2380         return retval;
2381 }
2382
2383 module_init(ns_init_module);
2384
2385 /*
2386  * Module clean-up function
2387  */
2388 static void __exit ns_cleanup_module(void)
2389 {
2390         struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2391         int i;
2392
2393         free_nandsim(ns);    /* Free nandsim private resources */
2394         nand_release(nsmtd); /* Unregister driver */
2395         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2396                 kfree(ns->partitions[i].name);
2397         kfree(nsmtd);        /* Free other structures */
2398         free_lists();
2399 }
2400
2401 module_exit(ns_cleanup_module);
2402
2403 MODULE_LICENSE ("GPL");
2404 MODULE_AUTHOR ("Artem B. Bityuckiy");
2405 MODULE_DESCRIPTION ("The NAND flash simulator");