2 * Copyright (C) 2003 Rick Bronson
4 * Derived from drivers/mtd/nand/autcpu12.c
5 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
7 * Derived from drivers/mtd/spia.c
8 * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
11 * Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
12 * Richard Genoud (richard.genoud@gmail.com), Adeneo Copyright (C) 2007
14 * Derived from Das U-Boot source code
15 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
16 * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/platform_device.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/nand.h>
31 #include <linux/mtd/partitions.h>
33 #include <linux/gpio.h>
36 #include <mach/board.h>
39 #ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW
45 #ifdef CONFIG_MTD_NAND_ATMEL_ECC_NONE
51 static int use_dma = 1;
52 module_param(use_dma, int, 0);
54 static int on_flash_bbt = 0;
55 module_param(on_flash_bbt, int, 0);
57 /* Register access macros */
58 #define ecc_readl(add, reg) \
59 __raw_readl(add + ATMEL_ECC_##reg)
60 #define ecc_writel(add, reg, value) \
61 __raw_writel((value), add + ATMEL_ECC_##reg)
63 #include "atmel_nand_ecc.h" /* Hardware ECC registers */
65 /* oob layout for large page size
66 * bad block info is on bytes 0 and 1
67 * the bytes have to be consecutives to avoid
68 * several NAND_CMD_RNDOUT during read
70 static struct nand_ecclayout atmel_oobinfo_large = {
72 .eccpos = {60, 61, 62, 63},
78 /* oob layout for small page size
79 * bad block info is on bytes 4 and 5
80 * the bytes have to be consecutives to avoid
81 * several NAND_CMD_RNDOUT during read
83 static struct nand_ecclayout atmel_oobinfo_small = {
85 .eccpos = {0, 1, 2, 3},
91 struct atmel_nand_host {
92 struct nand_chip nand_chip;
94 void __iomem *io_base;
96 struct atmel_nand_data *board;
100 struct completion comp;
101 struct dma_chan *dma_chan;
104 static int cpu_has_dma(void)
106 return cpu_is_at91sam9rl() || cpu_is_at91sam9g45();
112 static void atmel_nand_enable(struct atmel_nand_host *host)
114 if (host->board->enable_pin)
115 gpio_set_value(host->board->enable_pin, 0);
121 static void atmel_nand_disable(struct atmel_nand_host *host)
123 if (host->board->enable_pin)
124 gpio_set_value(host->board->enable_pin, 1);
128 * Hardware specific access to control-lines
130 static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
132 struct nand_chip *nand_chip = mtd->priv;
133 struct atmel_nand_host *host = nand_chip->priv;
135 if (ctrl & NAND_CTRL_CHANGE) {
137 atmel_nand_enable(host);
139 atmel_nand_disable(host);
141 if (cmd == NAND_CMD_NONE)
145 writeb(cmd, host->io_base + (1 << host->board->cle));
147 writeb(cmd, host->io_base + (1 << host->board->ale));
151 * Read the Device Ready pin.
153 static int atmel_nand_device_ready(struct mtd_info *mtd)
155 struct nand_chip *nand_chip = mtd->priv;
156 struct atmel_nand_host *host = nand_chip->priv;
158 return gpio_get_value(host->board->rdy_pin) ^
159 !!host->board->rdy_pin_active_low;
163 * Minimal-overhead PIO for data access.
165 static void atmel_read_buf8(struct mtd_info *mtd, u8 *buf, int len)
167 struct nand_chip *nand_chip = mtd->priv;
169 __raw_readsb(nand_chip->IO_ADDR_R, buf, len);
172 static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
174 struct nand_chip *nand_chip = mtd->priv;
176 __raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2);
179 static void atmel_write_buf8(struct mtd_info *mtd, const u8 *buf, int len)
181 struct nand_chip *nand_chip = mtd->priv;
183 __raw_writesb(nand_chip->IO_ADDR_W, buf, len);
186 static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
188 struct nand_chip *nand_chip = mtd->priv;
190 __raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2);
193 static void dma_complete_func(void *completion)
195 complete(completion);
198 static int atmel_nand_dma_op(struct mtd_info *mtd, void *buf, int len,
201 struct dma_device *dma_dev;
202 enum dma_ctrl_flags flags;
203 dma_addr_t dma_src_addr, dma_dst_addr, phys_addr;
204 struct dma_async_tx_descriptor *tx = NULL;
206 struct nand_chip *chip = mtd->priv;
207 struct atmel_nand_host *host = chip->priv;
210 enum dma_data_direction dir = is_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
212 if (buf >= high_memory) {
215 if (((size_t)buf & PAGE_MASK) !=
216 ((size_t)(buf + len - 1) & PAGE_MASK)) {
217 dev_warn(host->dev, "Buffer not fit in one page\n");
221 pg = vmalloc_to_page(buf);
223 dev_err(host->dev, "Failed to vmalloc_to_page\n");
226 p = page_address(pg) + ((size_t)buf & ~PAGE_MASK);
229 dma_dev = host->dma_chan->device;
231 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT | DMA_COMPL_SKIP_SRC_UNMAP |
232 DMA_COMPL_SKIP_DEST_UNMAP;
234 phys_addr = dma_map_single(dma_dev->dev, p, len, dir);
235 if (dma_mapping_error(dma_dev->dev, phys_addr)) {
236 dev_err(host->dev, "Failed to dma_map_single\n");
241 dma_src_addr = host->io_phys;
242 dma_dst_addr = phys_addr;
244 dma_src_addr = phys_addr;
245 dma_dst_addr = host->io_phys;
248 tx = dma_dev->device_prep_dma_memcpy(host->dma_chan, dma_dst_addr,
249 dma_src_addr, len, flags);
251 dev_err(host->dev, "Failed to prepare DMA memcpy\n");
255 init_completion(&host->comp);
256 tx->callback = dma_complete_func;
257 tx->callback_param = &host->comp;
259 cookie = tx->tx_submit(tx);
260 if (dma_submit_error(cookie)) {
261 dev_err(host->dev, "Failed to do DMA tx_submit\n");
265 dma_async_issue_pending(host->dma_chan);
266 wait_for_completion(&host->comp);
271 dma_unmap_single(dma_dev->dev, phys_addr, len, dir);
274 dev_warn(host->dev, "Fall back to CPU I/O\n");
278 static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
280 struct nand_chip *chip = mtd->priv;
281 struct atmel_nand_host *host = chip->priv;
283 if (use_dma && len >= mtd->oobsize)
284 if (atmel_nand_dma_op(mtd, buf, len, 1) == 0)
287 if (host->board->bus_width_16)
288 atmel_read_buf16(mtd, buf, len);
290 atmel_read_buf8(mtd, buf, len);
293 static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
295 struct nand_chip *chip = mtd->priv;
296 struct atmel_nand_host *host = chip->priv;
298 if (use_dma && len >= mtd->oobsize)
299 if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) == 0)
302 if (host->board->bus_width_16)
303 atmel_write_buf16(mtd, buf, len);
305 atmel_write_buf8(mtd, buf, len);
311 * function called after a write
313 * mtd: MTD block structure
314 * dat: raw data (unused)
315 * ecc_code: buffer for ECC
317 static int atmel_nand_calculate(struct mtd_info *mtd,
318 const u_char *dat, unsigned char *ecc_code)
320 struct nand_chip *nand_chip = mtd->priv;
321 struct atmel_nand_host *host = nand_chip->priv;
322 unsigned int ecc_value;
324 /* get the first 2 ECC bytes */
325 ecc_value = ecc_readl(host->ecc, PR);
327 ecc_code[0] = ecc_value & 0xFF;
328 ecc_code[1] = (ecc_value >> 8) & 0xFF;
330 /* get the last 2 ECC bytes */
331 ecc_value = ecc_readl(host->ecc, NPR) & ATMEL_ECC_NPARITY;
333 ecc_code[2] = ecc_value & 0xFF;
334 ecc_code[3] = (ecc_value >> 8) & 0xFF;
340 * HW ECC read page function
342 * mtd: mtd info structure
343 * chip: nand chip info structure
344 * buf: buffer to store read data
346 static int atmel_nand_read_page(struct mtd_info *mtd,
347 struct nand_chip *chip, uint8_t *buf, int page)
349 int eccsize = chip->ecc.size;
350 int eccbytes = chip->ecc.bytes;
351 uint32_t *eccpos = chip->ecc.layout->eccpos;
353 uint8_t *oob = chip->oob_poi;
358 * Errata: ALE is incorrectly wired up to the ECC controller
359 * on the AP7000, so it will include the address cycles in the
362 * Workaround: Reset the parity registers before reading the
365 if (cpu_is_at32ap7000()) {
366 struct atmel_nand_host *host = chip->priv;
367 ecc_writel(host->ecc, CR, ATMEL_ECC_RST);
371 chip->read_buf(mtd, p, eccsize);
373 /* move to ECC position if needed */
374 if (eccpos[0] != 0) {
375 /* This only works on large pages
376 * because the ECC controller waits for
377 * NAND_CMD_RNDOUTSTART after the
379 * anyway, for small pages, the eccpos[0] == 0
381 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
382 mtd->writesize + eccpos[0], -1);
385 /* the ECC controller needs to read the ECC just after the data */
386 ecc_pos = oob + eccpos[0];
387 chip->read_buf(mtd, ecc_pos, eccbytes);
389 /* check if there's an error */
390 stat = chip->ecc.correct(mtd, p, oob, NULL);
393 mtd->ecc_stats.failed++;
395 mtd->ecc_stats.corrected += stat;
397 /* get back to oob start (end of page) */
398 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
401 chip->read_buf(mtd, oob, mtd->oobsize);
409 * function called after a read
411 * mtd: MTD block structure
412 * dat: raw data read from the chip
413 * read_ecc: ECC from the chip (unused)
416 * Detect and correct a 1 bit error for a page
418 static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
419 u_char *read_ecc, u_char *isnull)
421 struct nand_chip *nand_chip = mtd->priv;
422 struct atmel_nand_host *host = nand_chip->priv;
423 unsigned int ecc_status;
424 unsigned int ecc_word, ecc_bit;
426 /* get the status from the Status Register */
427 ecc_status = ecc_readl(host->ecc, SR);
429 /* if there's no error */
430 if (likely(!(ecc_status & ATMEL_ECC_RECERR)))
433 /* get error bit offset (4 bits) */
434 ecc_bit = ecc_readl(host->ecc, PR) & ATMEL_ECC_BITADDR;
435 /* get word address (12 bits) */
436 ecc_word = ecc_readl(host->ecc, PR) & ATMEL_ECC_WORDADDR;
439 /* if there are multiple errors */
440 if (ecc_status & ATMEL_ECC_MULERR) {
441 /* check if it is a freshly erased block
442 * (filled with 0xff) */
443 if ((ecc_bit == ATMEL_ECC_BITADDR)
444 && (ecc_word == (ATMEL_ECC_WORDADDR >> 4))) {
445 /* the block has just been erased, return OK */
448 /* it doesn't seems to be a freshly
450 * We can't correct so many errors */
451 dev_dbg(host->dev, "atmel_nand : multiple errors detected."
452 " Unable to correct.\n");
456 /* if there's a single bit error : we can correct it */
457 if (ecc_status & ATMEL_ECC_ECCERR) {
458 /* there's nothing much to do here.
459 * the bit error is on the ECC itself.
461 dev_dbg(host->dev, "atmel_nand : one bit error on ECC code."
462 " Nothing to correct\n");
466 dev_dbg(host->dev, "atmel_nand : one bit error on data."
467 " (word offset in the page :"
468 " 0x%x bit offset : 0x%x)\n",
470 /* correct the error */
471 if (nand_chip->options & NAND_BUSWIDTH_16) {
473 ((unsigned short *) dat)[ecc_word] ^= (1 << ecc_bit);
476 dat[ecc_word] ^= (1 << ecc_bit);
478 dev_dbg(host->dev, "atmel_nand : error corrected\n");
483 * Enable HW ECC : unused on most chips
485 static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)
487 if (cpu_is_at32ap7000()) {
488 struct nand_chip *nand_chip = mtd->priv;
489 struct atmel_nand_host *host = nand_chip->priv;
490 ecc_writel(host->ecc, CR, ATMEL_ECC_RST);
494 #ifdef CONFIG_MTD_CMDLINE_PARTS
495 static const char *part_probes[] = { "cmdlinepart", NULL };
499 * Probe for the NAND device.
501 static int __init atmel_nand_probe(struct platform_device *pdev)
503 struct atmel_nand_host *host;
504 struct mtd_info *mtd;
505 struct nand_chip *nand_chip;
506 struct resource *regs;
507 struct resource *mem;
510 #ifdef CONFIG_MTD_PARTITIONS
511 struct mtd_partition *partitions = NULL;
512 int num_partitions = 0;
515 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
517 printk(KERN_ERR "atmel_nand: can't get I/O resource mem\n");
521 /* Allocate memory for the device structure (and zero it) */
522 host = kzalloc(sizeof(struct atmel_nand_host), GFP_KERNEL);
524 printk(KERN_ERR "atmel_nand: failed to allocate device structure.\n");
528 host->io_phys = (dma_addr_t)mem->start;
530 host->io_base = ioremap(mem->start, mem->end - mem->start + 1);
531 if (host->io_base == NULL) {
532 printk(KERN_ERR "atmel_nand: ioremap failed\n");
534 goto err_nand_ioremap;
538 nand_chip = &host->nand_chip;
539 host->board = pdev->dev.platform_data;
540 host->dev = &pdev->dev;
542 nand_chip->priv = host; /* link the private data structures */
543 mtd->priv = nand_chip;
544 mtd->owner = THIS_MODULE;
546 /* Set address of NAND IO lines */
547 nand_chip->IO_ADDR_R = host->io_base;
548 nand_chip->IO_ADDR_W = host->io_base;
549 nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
551 if (host->board->rdy_pin)
552 nand_chip->dev_ready = atmel_nand_device_ready;
554 regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
555 if (!regs && hard_ecc) {
556 printk(KERN_ERR "atmel_nand: can't get I/O resource "
557 "regs\nFalling back on software ECC\n");
560 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
562 nand_chip->ecc.mode = NAND_ECC_NONE;
563 if (hard_ecc && regs) {
564 host->ecc = ioremap(regs->start, regs->end - regs->start + 1);
565 if (host->ecc == NULL) {
566 printk(KERN_ERR "atmel_nand: ioremap failed\n");
568 goto err_ecc_ioremap;
570 nand_chip->ecc.mode = NAND_ECC_HW;
571 nand_chip->ecc.calculate = atmel_nand_calculate;
572 nand_chip->ecc.correct = atmel_nand_correct;
573 nand_chip->ecc.hwctl = atmel_nand_hwctl;
574 nand_chip->ecc.read_page = atmel_nand_read_page;
575 nand_chip->ecc.bytes = 4;
578 nand_chip->chip_delay = 20; /* 20us command delay time */
580 if (host->board->bus_width_16) /* 16-bit bus width */
581 nand_chip->options |= NAND_BUSWIDTH_16;
583 nand_chip->read_buf = atmel_read_buf;
584 nand_chip->write_buf = atmel_write_buf;
586 platform_set_drvdata(pdev, host);
587 atmel_nand_enable(host);
589 if (host->board->det_pin) {
590 if (gpio_get_value(host->board->det_pin)) {
591 printk(KERN_INFO "No SmartMedia card inserted.\n");
598 printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
599 nand_chip->options |= NAND_USE_FLASH_BBT;
602 if (cpu_has_dma() && use_dma) {
606 dma_cap_set(DMA_MEMCPY, mask);
607 host->dma_chan = dma_request_channel(mask, 0, NULL);
608 if (!host->dma_chan) {
609 dev_err(host->dev, "Failed to request DMA channel\n");
614 dev_info(host->dev, "Using DMA for NAND access.\n");
616 dev_info(host->dev, "No DMA support for NAND access.\n");
618 /* first scan to find the device and get the page size */
619 if (nand_scan_ident(mtd, 1, NULL)) {
624 if (nand_chip->ecc.mode == NAND_ECC_HW) {
625 /* ECC is calculated for the whole page (1 step) */
626 nand_chip->ecc.size = mtd->writesize;
628 /* set ECC page size and oob layout */
629 switch (mtd->writesize) {
631 nand_chip->ecc.layout = &atmel_oobinfo_small;
632 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528);
635 nand_chip->ecc.layout = &atmel_oobinfo_large;
636 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056);
639 nand_chip->ecc.layout = &atmel_oobinfo_large;
640 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112);
643 nand_chip->ecc.layout = &atmel_oobinfo_large;
644 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224);
647 /* page size not handled by HW ECC */
648 /* switching back to soft ECC */
649 nand_chip->ecc.mode = NAND_ECC_SOFT;
650 nand_chip->ecc.calculate = NULL;
651 nand_chip->ecc.correct = NULL;
652 nand_chip->ecc.hwctl = NULL;
653 nand_chip->ecc.read_page = NULL;
654 nand_chip->ecc.postpad = 0;
655 nand_chip->ecc.prepad = 0;
656 nand_chip->ecc.bytes = 0;
661 /* second phase scan */
662 if (nand_scan_tail(mtd)) {
667 #ifdef CONFIG_MTD_PARTITIONS
668 #ifdef CONFIG_MTD_CMDLINE_PARTS
669 mtd->name = "atmel_nand";
670 num_partitions = parse_mtd_partitions(mtd, part_probes,
673 if (num_partitions <= 0 && host->board->partition_info)
674 partitions = host->board->partition_info(mtd->size,
677 if ((!partitions) || (num_partitions == 0)) {
678 printk(KERN_ERR "atmel_nand: No partitions defined, or unsupported device.\n");
680 goto err_no_partitions;
683 res = add_mtd_partitions(mtd, partitions, num_partitions);
685 res = add_mtd_device(mtd);
691 #ifdef CONFIG_MTD_PARTITIONS
698 atmel_nand_disable(host);
699 platform_set_drvdata(pdev, NULL);
701 dma_release_channel(host->dma_chan);
705 iounmap(host->io_base);
712 * Remove a NAND device.
714 static int __exit atmel_nand_remove(struct platform_device *pdev)
716 struct atmel_nand_host *host = platform_get_drvdata(pdev);
717 struct mtd_info *mtd = &host->mtd;
721 atmel_nand_disable(host);
727 dma_release_channel(host->dma_chan);
729 iounmap(host->io_base);
735 static struct platform_driver atmel_nand_driver = {
736 .remove = __exit_p(atmel_nand_remove),
738 .name = "atmel_nand",
739 .owner = THIS_MODULE,
743 static int __init atmel_nand_init(void)
745 return platform_driver_probe(&atmel_nand_driver, atmel_nand_probe);
749 static void __exit atmel_nand_exit(void)
751 platform_driver_unregister(&atmel_nand_driver);
755 module_init(atmel_nand_init);
756 module_exit(atmel_nand_exit);
758 MODULE_LICENSE("GPL");
759 MODULE_AUTHOR("Rick Bronson");
760 MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91 / AVR32");
761 MODULE_ALIAS("platform:atmel_nand");