Pileus Git - ~andy/linux/blob - drivers/mmc/host/msm_sdcc.c

   1 /*
   2  *  linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
   3  *
   4  *  Copyright (C) 2007 Google Inc,
   5  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
   6  *  Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Based on mmci.c
  13  *
  14  * Author: San Mehat (san@android.com)
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/moduleparam.h>
  20 #include <linux/init.h>
  21 #include <linux/ioport.h>
  22 #include <linux/device.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/delay.h>
  25 #include <linux/err.h>
  26 #include <linux/highmem.h>
  27 #include <linux/log2.h>
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/mmc/sdio.h>
  31 #include <linux/clk.h>
  32 #include <linux/scatterlist.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/debugfs.h>
  36 #include <linux/io.h>
  37 #include <linux/memory.h>
  38 #include <linux/gfp.h>
  39
  40 #include <asm/cacheflush.h>
  41 #include <asm/div64.h>
  42 #include <asm/sizes.h>
  43
  44 #include <mach/mmc.h>
  45 #include <mach/msm_iomap.h>
  46 #include <mach/dma.h>
  47 #include <mach/clk.h>
  48
  49 #include "msm_sdcc.h"
  50
  51 #define DRIVER_NAME "msm-sdcc"
  52
  53 #define BUSCLK_PWRSAVE 1
  54 #define BUSCLK_TIMEOUT (HZ)
  55 static unsigned int msmsdcc_fmin = 144000;
  56 static unsigned int msmsdcc_fmax = 50000000;
  57 static unsigned int msmsdcc_4bit = 1;
  58 static unsigned int msmsdcc_pwrsave = 1;
  59 static unsigned int msmsdcc_piopoll = 1;
  60 static unsigned int msmsdcc_sdioirq;
  61
  62 #define PIO_SPINMAX 30
  63 #define CMD_SPINMAX 20
  64
  65
  66 static inline void
  67 msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
  68 {
  69         WARN_ON(!host->clks_on);
  70
  71         BUG_ON(host->curr.mrq);
  72
  73         if (deferr) {
  74                 mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
  75         } else {
  76                 del_timer_sync(&host->busclk_timer);
  77                 /* Need to check clks_on again in case the busclk
  78                  * timer fired
  79                  */
  80                 if (host->clks_on) {
  81                         clk_disable(host->clk);
  82                         clk_disable(host->pclk);
  83                         host->clks_on = 0;
  84                 }
  85         }
  86 }
  87
  88 static inline int
  89 msmsdcc_enable_clocks(struct msmsdcc_host *host)
  90 {
  91         int rc;
  92
  93         del_timer_sync(&host->busclk_timer);
  94
  95         if (!host->clks_on) {
  96                 rc = clk_enable(host->pclk);
  97                 if (rc)
  98                         return rc;
  99                 rc = clk_enable(host->clk);
 100                 if (rc) {
 101                         clk_disable(host->pclk);
 102                         return rc;
 103                 }
 104                 udelay(1 + ((3 * USEC_PER_SEC) /
 105                        (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 106                 host->clks_on = 1;
 107         }
 108         return 0;
 109 }
 110
 111 static inline unsigned int
 112 msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
 113 {
 114         return readl(host->base + reg);
 115 }
 116
 117 static inline void
 118 msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
 119 {
 120         writel(data, host->base + reg);
 121         /* 3 clk delay required! */
 122         udelay(1 + ((3 * USEC_PER_SEC) /
 123                (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 124 }
 125
 126 static void
 127 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
 128                       u32 c);
 129
 130 static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
 131 {
 132         u32     mci_clk = 0;
 133         u32     mci_mask0 = 0;
 134         int     ret = 0;
 135
 136         /* Save the controller state */
 137         mci_clk = readl(host->base + MMCICLOCK);
 138         mci_mask0 = readl(host->base + MMCIMASK0);
 139
 140         /* Reset the controller */
 141         ret = clk_reset(host->clk, CLK_RESET_ASSERT);
 142         if (ret)
 143                 pr_err("%s: Clock assert failed at %u Hz with err %d\n",
 144                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 145
 146         ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
 147         if (ret)
 148                 pr_err("%s: Clock deassert failed at %u Hz with err %d\n",
 149                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 150
 151         pr_info("%s: Controller has been re-initialiazed\n",
 152                         mmc_hostname(host->mmc));
 153
 154         /* Restore the contoller state */
 155         writel(host->pwr, host->base + MMCIPOWER);
 156         writel(mci_clk, host->base + MMCICLOCK);
 157         writel(mci_mask0, host->base + MMCIMASK0);
 158         ret = clk_set_rate(host->clk, host->clk_rate);
 159         if (ret)
 160                 pr_err("%s: Failed to set clk rate %u Hz (%d)\n",
 161                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 162 }
 163
 164 static void
 165 msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
 166 {
 167         BUG_ON(host->curr.data);
 168
 169         host->curr.mrq = NULL;
 170         host->curr.cmd = NULL;
 171
 172         if (mrq->data)
 173                 mrq->data->bytes_xfered = host->curr.data_xfered;
 174         if (mrq->cmd->error == -ETIMEDOUT)
 175                 mdelay(5);
 176
 177 #if BUSCLK_PWRSAVE
 178         msmsdcc_disable_clocks(host, 1);
 179 #endif
 180         /*
 181          * Need to drop the host lock here; mmc_request_done may call
 182          * back into the driver...
 183          */
 184         spin_unlock(&host->lock);
 185         mmc_request_done(host->mmc, mrq);
 186         spin_lock(&host->lock);
 187 }
 188
 189 static void
 190 msmsdcc_stop_data(struct msmsdcc_host *host)
 191 {
 192         host->curr.data = NULL;
 193         host->curr.got_dataend = 0;
 194 }
 195
 196 uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
 197 {
 198         return host->memres->start + MMCIFIFO;
 199 }
 200
 201 static inline void
 202 msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
 203        msmsdcc_writel(host, arg, MMCIARGUMENT);
 204        msmsdcc_writel(host, c, MMCICOMMAND);
 205 }
 206
 207 static void
 208 msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
 209 {
 210         struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
 211
 212         msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER);
 213         msmsdcc_writel(host, (unsigned int)host->curr.xfer_size,
 214                        MMCIDATALENGTH);
 215         msmsdcc_writel(host, host->cmd_pio_irqmask, MMCIMASK1);
 216         msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL);
 217
 218         if (host->cmd_cmd) {
 219                 msmsdcc_start_command_exec(host,
 220                                            (u32) host->cmd_cmd->arg,
 221                                            (u32) host->cmd_c);
 222         }
 223         host->dma.active = 1;
 224 }
 225
 226 static void
 227 msmsdcc_dma_complete_tlet(unsigned long data)
 228 {
 229         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
 230         unsigned long           flags;
 231         struct mmc_request      *mrq;
 232         struct msm_dmov_errdata err;
 233
 234         spin_lock_irqsave(&host->lock, flags);
 235         host->dma.active = 0;
 236
 237         err = host->dma.err;
 238         mrq = host->curr.mrq;
 239         BUG_ON(!mrq);
 240         WARN_ON(!mrq->data);
 241
 242         if (!(host->dma.result & DMOV_RSLT_VALID)) {
 243                 pr_err("msmsdcc: Invalid DataMover result\n");
 244                 goto out;
 245         }
 246
 247         if (host->dma.result & DMOV_RSLT_DONE) {
 248                 host->curr.data_xfered = host->curr.xfer_size;
 249         } else {
 250                 /* Error or flush  */
 251                 if (host->dma.result & DMOV_RSLT_ERROR)
 252                         pr_err("%s: DMA error (0x%.8x)\n",
 253                                mmc_hostname(host->mmc), host->dma.result);
 254                 if (host->dma.result & DMOV_RSLT_FLUSH)
 255                         pr_err("%s: DMA channel flushed (0x%.8x)\n",
 256                                mmc_hostname(host->mmc), host->dma.result);
 257
 258                 pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
 259                        err.flush[0], err.flush[1], err.flush[2],
 260                        err.flush[3], err.flush[4], err.flush[5]);
 261
 262                 msmsdcc_reset_and_restore(host);
 263                 if (!mrq->data->error)
 264                         mrq->data->error = -EIO;
 265         }
 266         dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
 267                      host->dma.dir);
 268
 269         host->dma.sg = NULL;
 270         host->dma.busy = 0;
 271
 272         if (host->curr.got_dataend || mrq->data->error) {
 273
 274                 /*
 275                  * If we've already gotten our DATAEND / DATABLKEND
 276                  * for this request, then complete it through here.
 277                  */
 278                 msmsdcc_stop_data(host);
 279
 280                 if (!mrq->data->error)
 281                         host->curr.data_xfered = host->curr.xfer_size;
 282                 if (!mrq->data->stop || mrq->cmd->error) {
 283                         host->curr.mrq = NULL;
 284                         host->curr.cmd = NULL;
 285                         mrq->data->bytes_xfered = host->curr.data_xfered;
 286
 287                         spin_unlock_irqrestore(&host->lock, flags);
 288 #if BUSCLK_PWRSAVE
 289                         msmsdcc_disable_clocks(host, 1);
 290 #endif
 291                         mmc_request_done(host->mmc, mrq);
 292                         return;
 293                 } else
 294                         msmsdcc_start_command(host, mrq->data->stop, 0);
 295         }
 296
 297 out:
 298         spin_unlock_irqrestore(&host->lock, flags);
 299         return;
 300 }
 301
 302 static void
 303 msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
 304                           unsigned int result,
 305                           struct msm_dmov_errdata *err)
 306 {
 307         struct msmsdcc_dma_data *dma_data =
 308                 container_of(cmd, struct msmsdcc_dma_data, hdr);
 309         struct msmsdcc_host *host = dma_data->host;
 310
 311         dma_data->result = result;
 312         if (err)
 313                 memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata));
 314
 315         tasklet_schedule(&host->dma_tlet);
 316 }
 317
 318 static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
 319 {
 320         if (host->dma.channel == -1)
 321                 return -ENOENT;
 322
 323         if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
 324                 return -EINVAL;
 325         if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
 326                 return -EINVAL;
 327         return 0;
 328 }
 329
 330 static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
 331 {
 332         struct msmsdcc_nc_dmadata *nc;
 333         dmov_box *box;
 334         uint32_t rows;
 335         uint32_t crci;
 336         unsigned int n;
 337         int i, rc;
 338         struct scatterlist *sg = data->sg;
 339
 340         rc = validate_dma(host, data);
 341         if (rc)
 342                 return rc;
 343
 344         host->dma.sg = data->sg;
 345         host->dma.num_ents = data->sg_len;
 346
 347        BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
 348
 349         nc = host->dma.nc;
 350
 351         switch (host->pdev_id) {
 352         case 1:
 353                 crci = MSMSDCC_CRCI_SDC1;
 354                 break;
 355         case 2:
 356                 crci = MSMSDCC_CRCI_SDC2;
 357                 break;
 358         case 3:
 359                 crci = MSMSDCC_CRCI_SDC3;
 360                 break;
 361         case 4:
 362                 crci = MSMSDCC_CRCI_SDC4;
 363                 break;
 364         default:
 365                 host->dma.sg = NULL;
 366                 host->dma.num_ents = 0;
 367                 return -ENOENT;
 368         }
 369
 370         if (data->flags & MMC_DATA_READ)
 371                 host->dma.dir = DMA_FROM_DEVICE;
 372         else
 373                 host->dma.dir = DMA_TO_DEVICE;
 374
 375         host->curr.user_pages = 0;
 376
 377         box = &nc->cmd[0];
 378
 379         /* location of command block must be 64 bit aligned */
 380         BUG_ON(host->dma.cmd_busaddr & 0x07);
 381
 382         nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
 383         host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
 384                                DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
 385         host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
 386
 387         n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
 388                         host->dma.num_ents, host->dma.dir);
 389         if (n == 0) {
 390                 printk(KERN_ERR "%s: Unable to map in all sg elements\n",
 391                         mmc_hostname(host->mmc));
 392                 host->dma.sg = NULL;
 393                 host->dma.num_ents = 0;
 394                 return -ENOMEM;
 395         }
 396
 397         for_each_sg(host->dma.sg, sg, n, i) {
 398
 399                 box->cmd = CMD_MODE_BOX;
 400
 401                 if (i == n - 1)
 402                         box->cmd |= CMD_LC;
 403                 rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
 404                         (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
 405                         (sg_dma_len(sg) / MCI_FIFOSIZE) ;
 406
 407                 if (data->flags & MMC_DATA_READ) {
 408                         box->src_row_addr = msmsdcc_fifo_addr(host);
 409                         box->dst_row_addr = sg_dma_address(sg);
 410
 411                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 412                                            (MCI_FIFOSIZE);
 413                         box->row_offset = MCI_FIFOSIZE;
 414
 415                         box->num_rows = rows * ((1 << 16) + 1);
 416                         box->cmd |= CMD_SRC_CRCI(crci);
 417                 } else {
 418                         box->src_row_addr = sg_dma_address(sg);
 419                         box->dst_row_addr = msmsdcc_fifo_addr(host);
 420
 421                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 422                                            (MCI_FIFOSIZE);
 423                         box->row_offset = (MCI_FIFOSIZE << 16);
 424
 425                         box->num_rows = rows * ((1 << 16) + 1);
 426                         box->cmd |= CMD_DST_CRCI(crci);
 427                 }
 428                 box++;
 429         }
 430
 431         return 0;
 432 }
 433
 434 static int
 435 snoop_cccr_abort(struct mmc_command *cmd)
 436 {
 437         if ((cmd->opcode == 52) &&
 438             (cmd->arg & 0x80000000) &&
 439             (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
 440                 return 1;
 441         return 0;
 442 }
 443
 444 static void
 445 msmsdcc_start_command_deferred(struct msmsdcc_host *host,
 446                                 struct mmc_command *cmd, u32 *c)
 447 {
 448         *c |= (cmd->opcode | MCI_CPSM_ENABLE);
 449
 450         if (cmd->flags & MMC_RSP_PRESENT) {
 451                 if (cmd->flags & MMC_RSP_136)
 452                         *c |= MCI_CPSM_LONGRSP;
 453                 *c |= MCI_CPSM_RESPONSE;
 454         }
 455
 456         if (/*interrupt*/0)
 457                 *c |= MCI_CPSM_INTERRUPT;
 458
 459         if ((((cmd->opcode == 17) || (cmd->opcode == 18))  ||
 460              ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
 461               (cmd->opcode == 53))
 462                 *c |= MCI_CSPM_DATCMD;
 463
 464         if (host->prog_scan && (cmd->opcode == 12)) {
 465                 *c |= MCI_CPSM_PROGENA;
 466                 host->prog_enable = true;
 467         }
 468
 469         if (cmd == cmd->mrq->stop)
 470                 *c |= MCI_CSPM_MCIABORT;
 471
 472         if (snoop_cccr_abort(cmd))
 473                 *c |= MCI_CSPM_MCIABORT;
 474
 475         if (host->curr.cmd != NULL) {
 476                 printk(KERN_ERR "%s: Overlapping command requests\n",
 477                         mmc_hostname(host->mmc));
 478         }
 479         host->curr.cmd = cmd;
 480 }
 481
 482 static void
 483 msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
 484                         struct mmc_command *cmd, u32 c)
 485 {
 486         unsigned int datactrl, timeout;
 487         unsigned long long clks;
 488         unsigned int pio_irqmask = 0;
 489
 490         host->curr.data = data;
 491         host->curr.xfer_size = data->blksz * data->blocks;
 492         host->curr.xfer_remain = host->curr.xfer_size;
 493         host->curr.data_xfered = 0;
 494         host->curr.got_dataend = 0;
 495
 496         memset(&host->pio, 0, sizeof(host->pio));
 497
 498         datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
 499
 500         if (!msmsdcc_config_dma(host, data))
 501                 datactrl |= MCI_DPSM_DMAENABLE;
 502         else {
 503                 host->pio.sg = data->sg;
 504                 host->pio.sg_len = data->sg_len;
 505                 host->pio.sg_off = 0;
 506
 507                 if (data->flags & MMC_DATA_READ) {
 508                         pio_irqmask = MCI_RXFIFOHALFFULLMASK;
 509                         if (host->curr.xfer_remain < MCI_FIFOSIZE)
 510                                 pio_irqmask |= MCI_RXDATAAVLBLMASK;
 511                 } else
 512                         pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
 513         }
 514
 515         if (data->flags & MMC_DATA_READ)
 516                 datactrl |= MCI_DPSM_DIRECTION;
 517
 518         clks = (unsigned long long)data->timeout_ns * host->clk_rate;
 519         do_div(clks, NSEC_PER_SEC);
 520         timeout = data->timeout_clks + (unsigned int)clks*2 ;
 521
 522         if (datactrl & MCI_DPSM_DMAENABLE) {
 523                 /* Save parameters for the exec function */
 524                 host->cmd_timeout = timeout;
 525                 host->cmd_pio_irqmask = pio_irqmask;
 526                 host->cmd_datactrl = datactrl;
 527                 host->cmd_cmd = cmd;
 528
 529                 host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
 530                 host->dma.hdr.data = (void *)host;
 531                 host->dma.busy = 1;
 532
 533                 if (cmd) {
 534                         msmsdcc_start_command_deferred(host, cmd, &c);
 535                         host->cmd_c = c;
 536                 }
 537                 msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
 538                 if (data->flags & MMC_DATA_WRITE)
 539                         host->prog_scan = true;
 540         } else {
 541                 msmsdcc_writel(host, timeout, MMCIDATATIMER);
 542
 543                 msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
 544
 545                 msmsdcc_writel(host, pio_irqmask, MMCIMASK1);
 546                 msmsdcc_writel(host, datactrl, MMCIDATACTRL);
 547
 548                 if (cmd) {
 549                         /* Daisy-chain the command if requested */
 550                         msmsdcc_start_command(host, cmd, c);
 551                 }
 552         }
 553 }
 554
 555 static void
 556 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
 557 {
 558         if (cmd == cmd->mrq->stop)
 559                 c |= MCI_CSPM_MCIABORT;
 560
 561         host->stats.cmds++;
 562
 563         msmsdcc_start_command_deferred(host, cmd, &c);
 564         msmsdcc_start_command_exec(host, cmd->arg, c);
 565 }
 566
 567 static void
 568 msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
 569                  unsigned int status)
 570 {
 571         if (status & MCI_DATACRCFAIL) {
 572                 pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
 573                 pr_err("%s: opcode 0x%.8x\n", __func__,
 574                        data->mrq->cmd->opcode);
 575                 pr_err("%s: blksz %d, blocks %d\n", __func__,
 576                        data->blksz, data->blocks);
 577                 data->error = -EILSEQ;
 578         } else if (status & MCI_DATATIMEOUT) {
 579                 pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
 580                 data->error = -ETIMEDOUT;
 581         } else if (status & MCI_RXOVERRUN) {
 582                 pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
 583                 data->error = -EIO;
 584         } else if (status & MCI_TXUNDERRUN) {
 585                 pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
 586                 data->error = -EIO;
 587         } else {
 588                 pr_err("%s: Unknown error (0x%.8x)\n",
 589                        mmc_hostname(host->mmc), status);
 590                 data->error = -EIO;
 591         }
 592 }
 593
 594
 595 static int
 596 msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
 597 {
 598         uint32_t        *ptr = (uint32_t *) buffer;
 599         int             count = 0;
 600
 601         if (remain % 4)
 602                 remain = ((remain >> 2) + 1) << 2;
 603
 604         while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
 605                 *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
 606                 ptr++;
 607                 count += sizeof(uint32_t);
 608
 609                 remain -=  sizeof(uint32_t);
 610                 if (remain == 0)
 611                         break;
 612         }
 613         return count;
 614 }
 615
 616 static int
 617 msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
 618                   unsigned int remain, u32 status)
 619 {
 620         void __iomem *base = host->base;
 621         char *ptr = buffer;
 622
 623         do {
 624                 unsigned int count, maxcnt, sz;
 625
 626                 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
 627                                                     MCI_FIFOHALFSIZE;
 628                 count = min(remain, maxcnt);
 629
 630                 sz = count % 4 ? (count >> 2) + 1 : (count >> 2);
 631                 writesl(base + MMCIFIFO, ptr, sz);
 632                 ptr += count;
 633                 remain -= count;
 634
 635                 if (remain == 0)
 636                         break;
 637
 638                 status = msmsdcc_readl(host, MMCISTATUS);
 639         } while (status & MCI_TXFIFOHALFEMPTY);
 640
 641         return ptr - buffer;
 642 }
 643
 644 static int
 645 msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
 646 {
 647         while (maxspin) {
 648                 if ((msmsdcc_readl(host, MMCISTATUS) & mask))
 649                         return 0;
 650                 udelay(1);
 651                 --maxspin;
 652         }
 653         return -ETIMEDOUT;
 654 }
 655
 656 static irqreturn_t
 657 msmsdcc_pio_irq(int irq, void *dev_id)
 658 {
 659         struct msmsdcc_host     *host = dev_id;
 660         uint32_t                status;
 661
 662         status = msmsdcc_readl(host, MMCISTATUS);
 663
 664         do {
 665                 unsigned long flags;
 666                 unsigned int remain, len;
 667                 char *buffer;
 668
 669                 if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
 670                         if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
 671                                 break;
 672
 673                         if (msmsdcc_spin_on_status(host,
 674                                                    (MCI_TXFIFOHALFEMPTY |
 675                                                    MCI_RXDATAAVLBL),
 676                                                    PIO_SPINMAX)) {
 677                                 break;
 678                         }
 679                 }
 680
 681                 /* Map the current scatter buffer */
 682                 local_irq_save(flags);
 683                 buffer = kmap_atomic(sg_page(host->pio.sg),
 684                                      KM_BIO_SRC_IRQ) + host->pio.sg->offset;
 685                 buffer += host->pio.sg_off;
 686                 remain = host->pio.sg->length - host->pio.sg_off;
 687                 len = 0;
 688                 if (status & MCI_RXACTIVE)
 689                         len = msmsdcc_pio_read(host, buffer, remain);
 690                 if (status & MCI_TXACTIVE)
 691                         len = msmsdcc_pio_write(host, buffer, remain, status);
 692
 693                 /* Unmap the buffer */
 694                 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 695                 local_irq_restore(flags);
 696
 697                 host->pio.sg_off += len;
 698                 host->curr.xfer_remain -= len;
 699                 host->curr.data_xfered += len;
 700                 remain -= len;
 701
 702                 if (remain == 0) {
 703                         /* This sg page is full - do some housekeeping */
 704                         if (status & MCI_RXACTIVE && host->curr.user_pages)
 705                                 flush_dcache_page(sg_page(host->pio.sg));
 706
 707                         if (!--host->pio.sg_len) {
 708                                 memset(&host->pio, 0, sizeof(host->pio));
 709                                 break;
 710                         }
 711
 712                         /* Advance to next sg */
 713                         host->pio.sg++;
 714                         host->pio.sg_off = 0;
 715                 }
 716
 717                 status = msmsdcc_readl(host, MMCISTATUS);
 718         } while (1);
 719
 720         if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
 721                 msmsdcc_writel(host, MCI_RXDATAAVLBLMASK, MMCIMASK1);
 722
 723         if (!host->curr.xfer_remain)
 724                 msmsdcc_writel(host, 0, MMCIMASK1);
 725
 726         return IRQ_HANDLED;
 727 }
 728
 729 static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
 730 {
 731         struct mmc_command *cmd = host->curr.cmd;
 732
 733         host->curr.cmd = NULL;
 734         cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
 735         cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
 736         cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
 737         cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
 738
 739         if (status & MCI_CMDTIMEOUT) {
 740                 cmd->error = -ETIMEDOUT;
 741         } else if (status & MCI_CMDCRCFAIL &&
 742                    cmd->flags & MMC_RSP_CRC) {
 743                 pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
 744                 cmd->error = -EILSEQ;
 745         }
 746
 747         if (!cmd->data || cmd->error) {
 748                 if (host->curr.data && host->dma.sg)
 749                         msm_dmov_stop_cmd(host->dma.channel,
 750                                           &host->dma.hdr, 0);
 751                 else if (host->curr.data) { /* Non DMA */
 752                         msmsdcc_reset_and_restore(host);
 753                         msmsdcc_stop_data(host);
 754                         msmsdcc_request_end(host, cmd->mrq);
 755                 } else { /* host->data == NULL */
 756                         if (!cmd->error && host->prog_enable) {
 757                                 if (status & MCI_PROGDONE) {
 758                                         host->prog_scan = false;
 759                                         host->prog_enable = false;
 760                                         msmsdcc_request_end(host, cmd->mrq);
 761                                 } else {
 762                                         host->curr.cmd = cmd;
 763                                 }
 764                         } else {
 765                                 if (host->prog_enable) {
 766                                         host->prog_scan = false;
 767                                         host->prog_enable = false;
 768                                 }
 769                                 msmsdcc_request_end(host, cmd->mrq);
 770                         }
 771                 }
 772         } else if (cmd->data)
 773                 if (!(cmd->data->flags & MMC_DATA_READ))
 774                         msmsdcc_start_data(host, cmd->data,
 775                                                 NULL, 0);
 776 }
 777
 778 static void
 779 msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
 780                         void __iomem *base)
 781 {
 782         struct mmc_data *data = host->curr.data;
 783
 784         if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
 785                         MCI_CMDTIMEOUT | MCI_PROGDONE) && host->curr.cmd) {
 786                 msmsdcc_do_cmdirq(host, status);
 787         }
 788
 789         if (!data)
 790                 return;
 791
 792         /* Check for data errors */
 793         if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
 794                       MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
 795                 msmsdcc_data_err(host, data, status);
 796                 host->curr.data_xfered = 0;
 797                 if (host->dma.sg)
 798                         msm_dmov_stop_cmd(host->dma.channel,
 799                                           &host->dma.hdr, 0);
 800                 else {
 801                         msmsdcc_reset_and_restore(host);
 802                         if (host->curr.data)
 803                                 msmsdcc_stop_data(host);
 804                         if (!data->stop)
 805                                 msmsdcc_request_end(host, data->mrq);
 806                         else
 807                                 msmsdcc_start_command(host, data->stop, 0);
 808                 }
 809         }
 810
 811         /* Check for data done */
 812         if (!host->curr.got_dataend && (status & MCI_DATAEND))
 813                 host->curr.got_dataend = 1;
 814
 815         /*
 816          * If DMA is still in progress, we complete via the completion handler
 817          */
 818         if (host->curr.got_dataend && !host->dma.busy) {
 819                 /*
 820                  * There appears to be an issue in the controller where
 821                  * if you request a small block transfer (< fifo size),
 822                  * you may get your DATAEND/DATABLKEND irq without the
 823                  * PIO data irq.
 824                  *
 825                  * Check to see if there is still data to be read,
 826                  * and simulate a PIO irq.
 827                  */
 828                 if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
 829                         msmsdcc_pio_irq(1, host);
 830
 831                 msmsdcc_stop_data(host);
 832                 if (!data->error)
 833                         host->curr.data_xfered = host->curr.xfer_size;
 834
 835                 if (!data->stop)
 836                         msmsdcc_request_end(host, data->mrq);
 837                 else
 838                         msmsdcc_start_command(host, data->stop, 0);
 839         }
 840 }
 841
 842 static irqreturn_t
 843 msmsdcc_irq(int irq, void *dev_id)
 844 {
 845         struct msmsdcc_host     *host = dev_id;
 846         void __iomem            *base = host->base;
 847         u32                     status;
 848         int                     ret = 0;
 849         int                     cardint = 0;
 850
 851         spin_lock(&host->lock);
 852
 853         do {
 854                 status = msmsdcc_readl(host, MMCISTATUS);
 855                 status &= msmsdcc_readl(host, MMCIMASK0);
 856                 msmsdcc_writel(host, status, MMCICLEAR);
 857
 858                 if (status & MCI_SDIOINTR)
 859                         status &= ~MCI_SDIOINTR;
 860
 861                 if (!status)
 862                         break;
 863
 864                 msmsdcc_handle_irq_data(host, status, base);
 865
 866                 if (status & MCI_SDIOINTOPER) {
 867                         cardint = 1;
 868                         status &= ~MCI_SDIOINTOPER;
 869                 }
 870                 ret = 1;
 871         } while (status);
 872
 873         spin_unlock(&host->lock);
 874
 875         /*
 876          * We have to delay handling the card interrupt as it calls
 877          * back into the driver.
 878          */
 879         if (cardint)
 880                 mmc_signal_sdio_irq(host->mmc);
 881
 882         return IRQ_RETVAL(ret);
 883 }
 884
 885 static void
 886 msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 887 {
 888         struct msmsdcc_host *host = mmc_priv(mmc);
 889         unsigned long flags;
 890
 891         WARN_ON(host->curr.mrq != NULL);
 892         WARN_ON(host->pwr == 0);
 893
 894         spin_lock_irqsave(&host->lock, flags);
 895
 896         host->stats.reqs++;
 897
 898         if (host->eject) {
 899                 if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
 900                         mrq->cmd->error = 0;
 901                         mrq->data->bytes_xfered = mrq->data->blksz *
 902                                                   mrq->data->blocks;
 903                 } else
 904                         mrq->cmd->error = -ENOMEDIUM;
 905
 906                 spin_unlock_irqrestore(&host->lock, flags);
 907                 mmc_request_done(mmc, mrq);
 908                 return;
 909         }
 910
 911         msmsdcc_enable_clocks(host);
 912
 913         host->curr.mrq = mrq;
 914
 915         if (mrq->data && mrq->data->flags & MMC_DATA_READ)
 916                 /* Queue/read data, daisy-chain command when data starts */
 917                 msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
 918         else
 919                 msmsdcc_start_command(host, mrq->cmd, 0);
 920
 921         if (host->cmdpoll && !msmsdcc_spin_on_status(host,
 922                                 MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
 923                                 CMD_SPINMAX)) {
 924                 uint32_t status = msmsdcc_readl(host, MMCISTATUS);
 925                 msmsdcc_do_cmdirq(host, status);
 926                 msmsdcc_writel(host,
 927                                MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
 928                                MMCICLEAR);
 929                 host->stats.cmdpoll_hits++;
 930         } else {
 931                 host->stats.cmdpoll_misses++;
 932         }
 933         spin_unlock_irqrestore(&host->lock, flags);
 934 }
 935
 936 static void
 937 msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 938 {
 939         struct msmsdcc_host *host = mmc_priv(mmc);
 940         u32 clk = 0, pwr = 0;
 941         int rc;
 942         unsigned long flags;
 943
 944         spin_lock_irqsave(&host->lock, flags);
 945
 946         msmsdcc_enable_clocks(host);
 947
 948         if (ios->clock) {
 949                 if (ios->clock != host->clk_rate) {
 950                         rc = clk_set_rate(host->clk, ios->clock);
 951                         if (rc < 0)
 952                                 pr_err("%s: Error setting clock rate (%d)\n",
 953                                        mmc_hostname(host->mmc), rc);
 954                         else
 955                                 host->clk_rate = ios->clock;
 956                 }
 957                 clk |= MCI_CLK_ENABLE;
 958         }
 959
 960         if (ios->bus_width == MMC_BUS_WIDTH_4)
 961                 clk |= (2 << 10); /* Set WIDEBUS */
 962
 963         if (ios->clock > 400000 && msmsdcc_pwrsave)
 964                 clk |= (1 << 9); /* PWRSAVE */
 965
 966         clk |= (1 << 12); /* FLOW_ENA */
 967         clk |= (1 << 15); /* feedback clock */
 968
 969         if (host->plat->translate_vdd)
 970                 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
 971
 972         switch (ios->power_mode) {
 973         case MMC_POWER_OFF:
 974                 break;
 975         case MMC_POWER_UP:
 976                 pwr |= MCI_PWR_UP;
 977                 break;
 978         case MMC_POWER_ON:
 979                 pwr |= MCI_PWR_ON;
 980                 break;
 981         }
 982
 983         if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
 984                 pwr |= MCI_OD;
 985
 986         msmsdcc_writel(host, clk, MMCICLOCK);
 987
 988         if (host->pwr != pwr) {
 989                 host->pwr = pwr;
 990                 msmsdcc_writel(host, pwr, MMCIPOWER);
 991         }
 992 #if BUSCLK_PWRSAVE
 993         msmsdcc_disable_clocks(host, 1);
 994 #endif
 995         spin_unlock_irqrestore(&host->lock, flags);
 996 }
 997
 998 static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 999 {
1000         struct msmsdcc_host *host = mmc_priv(mmc);
1001         unsigned long flags;
1002         u32 status;
1003
1004         spin_lock_irqsave(&host->lock, flags);
1005         if (msmsdcc_sdioirq == 1) {
1006                 status = msmsdcc_readl(host, MMCIMASK0);
1007                 if (enable)
1008                         status |= MCI_SDIOINTOPERMASK;
1009                 else
1010                         status &= ~MCI_SDIOINTOPERMASK;
1011                 host->saved_irq0mask = status;
1012                 msmsdcc_writel(host, status, MMCIMASK0);
1013         }
1014         spin_unlock_irqrestore(&host->lock, flags);
1015 }
1016
1017 static const struct mmc_host_ops msmsdcc_ops = {
1018         .request        = msmsdcc_request,
1019         .set_ios        = msmsdcc_set_ios,
1020         .enable_sdio_irq = msmsdcc_enable_sdio_irq,
1021 };
1022
1023 static void
1024 msmsdcc_check_status(unsigned long data)
1025 {
1026         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
1027         unsigned int status;
1028
1029         if (!host->plat->status) {
1030                 mmc_detect_change(host->mmc, 0);
1031                 goto out;
1032         }
1033
1034         status = host->plat->status(mmc_dev(host->mmc));
1035         host->eject = !status;
1036         if (status ^ host->oldstat) {
1037                 pr_info("%s: Slot status change detected (%d -> %d)\n",
1038                         mmc_hostname(host->mmc), host->oldstat, status);
1039                 if (status)
1040                         mmc_detect_change(host->mmc, (5 * HZ) / 2);
1041                 else
1042                         mmc_detect_change(host->mmc, 0);
1043         }
1044
1045         host->oldstat = status;
1046
1047 out:
1048         if (host->timer.function)
1049                 mod_timer(&host->timer, jiffies + HZ);
1050 }
1051
1052 static irqreturn_t
1053 msmsdcc_platform_status_irq(int irq, void *dev_id)
1054 {
1055         struct msmsdcc_host *host = dev_id;
1056
1057         printk(KERN_DEBUG "%s: %d\n", __func__, irq);
1058         msmsdcc_check_status((unsigned long) host);
1059         return IRQ_HANDLED;
1060 }
1061
1062 static void
1063 msmsdcc_status_notify_cb(int card_present, void *dev_id)
1064 {
1065         struct msmsdcc_host *host = dev_id;
1066
1067         printk(KERN_DEBUG "%s: card_present %d\n", mmc_hostname(host->mmc),
1068                card_present);
1069         msmsdcc_check_status((unsigned long) host);
1070 }
1071
1072 static void
1073 msmsdcc_busclk_expired(unsigned long _data)
1074 {
1075         struct msmsdcc_host     *host = (struct msmsdcc_host *) _data;
1076
1077         if (host->clks_on)
1078                 msmsdcc_disable_clocks(host, 0);
1079 }
1080
1081 static int
1082 msmsdcc_init_dma(struct msmsdcc_host *host)
1083 {
1084         memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
1085         host->dma.host = host;
1086         host->dma.channel = -1;
1087
1088         if (!host->dmares)
1089                 return -ENODEV;
1090
1091         host->dma.nc = dma_alloc_coherent(NULL,
1092                                           sizeof(struct msmsdcc_nc_dmadata),
1093                                           &host->dma.nc_busaddr,
1094                                           GFP_KERNEL);
1095         if (host->dma.nc == NULL) {
1096                 pr_err("Unable to allocate DMA buffer\n");
1097                 return -ENOMEM;
1098         }
1099         memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
1100         host->dma.cmd_busaddr = host->dma.nc_busaddr;
1101         host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
1102                                 offsetof(struct msmsdcc_nc_dmadata, cmdptr);
1103         host->dma.channel = host->dmares->start;
1104
1105         return 0;
1106 }
1107
1108 static int
1109 msmsdcc_probe(struct platform_device *pdev)
1110 {
1111         struct msm_mmc_platform_data *plat = pdev->dev.platform_data;
1112         struct msmsdcc_host *host;
1113         struct mmc_host *mmc;
1114         struct resource *cmd_irqres = NULL;
1115         struct resource *pio_irqres = NULL;
1116         struct resource *stat_irqres = NULL;
1117         struct resource *memres = NULL;
1118         struct resource *dmares = NULL;
1119         int ret;
1120
1121         /* must have platform data */
1122         if (!plat) {
1123                 pr_err("%s: Platform data not available\n", __func__);
1124                 ret = -EINVAL;
1125                 goto out;
1126         }
1127
1128         if (pdev->id < 1 || pdev->id > 4)
1129                 return -EINVAL;
1130
1131         if (pdev->resource == NULL || pdev->num_resources < 2) {
1132                 pr_err("%s: Invalid resource\n", __func__);
1133                 return -ENXIO;
1134         }
1135
1136         memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1137         dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1138         cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1139                                                   "cmd_irq");
1140         pio_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1141                                                   "pio_irq");
1142         stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1143                                                    "status_irq");
1144
1145         if (!cmd_irqres || !pio_irqres || !memres) {
1146                 pr_err("%s: Invalid resource\n", __func__);
1147                 return -ENXIO;
1148         }
1149
1150         /*
1151          * Setup our host structure
1152          */
1153
1154         mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
1155         if (!mmc) {
1156                 ret = -ENOMEM;
1157                 goto out;
1158         }
1159
1160         host = mmc_priv(mmc);
1161         host->pdev_id = pdev->id;
1162         host->plat = plat;
1163         host->mmc = mmc;
1164         host->curr.cmd = NULL;
1165
1166         host->cmdpoll = 1;
1167
1168         host->base = ioremap(memres->start, PAGE_SIZE);
1169         if (!host->base) {
1170                 ret = -ENOMEM;
1171                 goto out;
1172         }
1173
1174         host->cmd_irqres = cmd_irqres;
1175         host->pio_irqres = pio_irqres;
1176         host->memres = memres;
1177         host->dmares = dmares;
1178         spin_lock_init(&host->lock);
1179
1180         tasklet_init(&host->dma_tlet, msmsdcc_dma_complete_tlet,
1181                         (unsigned long)host);
1182
1183         /*
1184          * Setup DMA
1185          */
1186         msmsdcc_init_dma(host);
1187
1188         /* Get our clocks */
1189         host->pclk = clk_get(&pdev->dev, "sdc_pclk");
1190         if (IS_ERR(host->pclk)) {
1191                 ret = PTR_ERR(host->pclk);
1192                 goto host_free;
1193         }
1194
1195         host->clk = clk_get(&pdev->dev, "sdc_clk");
1196         if (IS_ERR(host->clk)) {
1197                 ret = PTR_ERR(host->clk);
1198                 goto pclk_put;
1199         }
1200
1201         /* Enable clocks */
1202         ret = msmsdcc_enable_clocks(host);
1203         if (ret)
1204                 goto clk_put;
1205
1206         ret = clk_set_rate(host->clk, msmsdcc_fmin);
1207         if (ret) {
1208                 pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
1209                 goto clk_disable;
1210         }
1211
1212         host->pclk_rate = clk_get_rate(host->pclk);
1213         host->clk_rate = clk_get_rate(host->clk);
1214
1215         /*
1216          * Setup MMC host structure
1217          */
1218         mmc->ops = &msmsdcc_ops;
1219         mmc->f_min = msmsdcc_fmin;
1220         mmc->f_max = msmsdcc_fmax;
1221         mmc->ocr_avail = plat->ocr_mask;
1222
1223         if (msmsdcc_4bit)
1224                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1225         if (msmsdcc_sdioirq)
1226                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1227         mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
1228
1229         mmc->max_segs = NR_SG;
1230         mmc->max_blk_size = 4096;       /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
1231         mmc->max_blk_count = 65536;
1232
1233         mmc->max_req_size = 33554432;   /* MCI_DATA_LENGTH is 25 bits */
1234         mmc->max_seg_size = mmc->max_req_size;
1235
1236         msmsdcc_writel(host, 0, MMCIMASK0);
1237         msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
1238
1239         msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
1240         host->saved_irq0mask = MCI_IRQENABLE;
1241
1242         /*
1243          * Setup card detect change
1244          */
1245
1246         memset(&host->timer, 0, sizeof(host->timer));
1247
1248         if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
1249                 unsigned long irqflags = IRQF_SHARED |
1250                         (stat_irqres->flags & IRQF_TRIGGER_MASK);
1251
1252                 host->stat_irq = stat_irqres->start;
1253                 ret = request_irq(host->stat_irq,
1254                                   msmsdcc_platform_status_irq,
1255                                   irqflags,
1256                                   DRIVER_NAME " (slot)",
1257                                   host);
1258                 if (ret) {
1259                         pr_err("%s: Unable to get slot IRQ %d (%d)\n",
1260                                mmc_hostname(mmc), host->stat_irq, ret);
1261                         goto clk_disable;
1262                 }
1263         } else if (plat->register_status_notify) {
1264                 plat->register_status_notify(msmsdcc_status_notify_cb, host);
1265         } else if (!plat->status)
1266                 pr_err("%s: No card detect facilities available\n",
1267                        mmc_hostname(mmc));
1268         else {
1269                 init_timer(&host->timer);
1270                 host->timer.data = (unsigned long)host;
1271                 host->timer.function = msmsdcc_check_status;
1272                 host->timer.expires = jiffies + HZ;
1273                 add_timer(&host->timer);
1274         }
1275
1276         if (plat->status) {
1277                 host->oldstat = host->plat->status(mmc_dev(host->mmc));
1278                 host->eject = !host->oldstat;
1279         }
1280
1281         init_timer(&host->busclk_timer);
1282         host->busclk_timer.data = (unsigned long) host;
1283         host->busclk_timer.function = msmsdcc_busclk_expired;
1284
1285         ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
1286                           DRIVER_NAME " (cmd)", host);
1287         if (ret)
1288                 goto stat_irq_free;
1289
1290         ret = request_irq(pio_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
1291                           DRIVER_NAME " (pio)", host);
1292         if (ret)
1293                 goto cmd_irq_free;
1294
1295         mmc_set_drvdata(pdev, mmc);
1296         mmc_add_host(mmc);
1297
1298         pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
1299                 mmc_hostname(mmc), (unsigned long long)memres->start,
1300                 (unsigned int) cmd_irqres->start,
1301                 (unsigned int) host->stat_irq, host->dma.channel);
1302         pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
1303                 (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
1304         pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
1305                 mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
1306         pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
1307         pr_info("%s: Power save feature enable = %d\n",
1308                 mmc_hostname(mmc), msmsdcc_pwrsave);
1309
1310         if (host->dma.channel != -1) {
1311                 pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
1312                         mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
1313                 pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
1314                         mmc_hostname(mmc), host->dma.cmd_busaddr,
1315                         host->dma.cmdptr_busaddr);
1316         } else
1317                 pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
1318         if (host->timer.function)
1319                 pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
1320
1321         return 0;
1322  cmd_irq_free:
1323         free_irq(cmd_irqres->start, host);
1324  stat_irq_free:
1325         if (host->stat_irq)
1326                 free_irq(host->stat_irq, host);
1327  clk_disable:
1328         msmsdcc_disable_clocks(host, 0);
1329  clk_put:
1330         clk_put(host->clk);
1331  pclk_put:
1332         clk_put(host->pclk);
1333  host_free:
1334         mmc_free_host(mmc);
1335  out:
1336         return ret;
1337 }
1338
1339 #ifdef CONFIG_PM
1340 #ifdef CONFIG_MMC_MSM7X00A_RESUME_IN_WQ
1341 static void
1342 do_resume_work(struct work_struct *work)
1343 {
1344         struct msmsdcc_host *host =
1345                 container_of(work, struct msmsdcc_host, resume_task);
1346         struct mmc_host *mmc = host->mmc;
1347
1348         if (mmc) {
1349                 mmc_resume_host(mmc);
1350                 if (host->stat_irq)
1351                         enable_irq(host->stat_irq);
1352         }
1353 }
1354 #endif
1355
1356
1357 static int
1358 msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1359 {
1360         struct mmc_host *mmc = mmc_get_drvdata(dev);
1361         int rc = 0;
1362
1363         if (mmc) {
1364                 struct msmsdcc_host *host = mmc_priv(mmc);
1365
1366                 if (host->stat_irq)
1367                         disable_irq(host->stat_irq);
1368
1369                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1370                         rc = mmc_suspend_host(mmc);
1371                 if (!rc)
1372                         msmsdcc_writel(host, 0, MMCIMASK0);
1373                 if (host->clks_on)
1374                         msmsdcc_disable_clocks(host, 0);
1375         }
1376         return rc;
1377 }
1378
1379 static int
1380 msmsdcc_resume(struct platform_device *dev)
1381 {
1382         struct mmc_host *mmc = mmc_get_drvdata(dev);
1383
1384         if (mmc) {
1385                 struct msmsdcc_host *host = mmc_priv(mmc);
1386
1387                 msmsdcc_enable_clocks(host);
1388
1389                 msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
1390
1391                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1392                         mmc_resume_host(mmc);
1393                 if (host->stat_irq)
1394                         enable_irq(host->stat_irq);
1395 #if BUSCLK_PWRSAVE
1396                 msmsdcc_disable_clocks(host, 1);
1397 #endif
1398         }
1399         return 0;
1400 }
1401 #else
1402 #define msmsdcc_suspend 0
1403 #define msmsdcc_resume 0
1404 #endif
1405
1406 static struct platform_driver msmsdcc_driver = {
1407         .probe          = msmsdcc_probe,
1408         .suspend        = msmsdcc_suspend,
1409         .resume         = msmsdcc_resume,
1410         .driver         = {
1411                 .name   = "msm_sdcc",
1412         },
1413 };
1414
1415 static int __init msmsdcc_init(void)
1416 {
1417         return platform_driver_register(&msmsdcc_driver);
1418 }
1419
1420 static void __exit msmsdcc_exit(void)
1421 {
1422         platform_driver_unregister(&msmsdcc_driver);
1423 }
1424
1425 module_init(msmsdcc_init);
1426 module_exit(msmsdcc_exit);
1427
1428 MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
1429 MODULE_LICENSE("GPL");