4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
24 #include <linux/mfd/arizona/core.h>
25 #include <linux/mfd/arizona/registers.h>
29 static const char *wm5102_core_supplies[] = {
34 int arizona_clk32k_enable(struct arizona *arizona)
38 mutex_lock(&arizona->clk_lock);
40 arizona->clk32k_ref++;
42 if (arizona->clk32k_ref == 1) {
43 switch (arizona->pdata.clk32k_src) {
44 case ARIZONA_32KZ_MCLK1:
45 ret = pm_runtime_get_sync(arizona->dev);
51 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
58 arizona->clk32k_ref--;
60 mutex_unlock(&arizona->clk_lock);
64 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
66 int arizona_clk32k_disable(struct arizona *arizona)
70 mutex_lock(&arizona->clk_lock);
72 BUG_ON(arizona->clk32k_ref <= 0);
74 arizona->clk32k_ref--;
76 if (arizona->clk32k_ref == 0) {
77 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
78 ARIZONA_CLK_32K_ENA, 0);
80 switch (arizona->pdata.clk32k_src) {
81 case ARIZONA_32KZ_MCLK1:
82 pm_runtime_put_sync(arizona->dev);
87 mutex_unlock(&arizona->clk_lock);
91 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
93 static irqreturn_t arizona_clkgen_err(int irq, void *data)
95 struct arizona *arizona = data;
97 dev_err(arizona->dev, "CLKGEN error\n");
102 static irqreturn_t arizona_underclocked(int irq, void *data)
104 struct arizona *arizona = data;
108 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
111 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
117 dev_err(arizona->dev, "AIF3 underclocked\n");
118 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
119 dev_err(arizona->dev, "AIF2 underclocked\n");
120 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF1 underclocked\n");
122 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "ISRC2 underclocked\n");
124 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "ISRC1 underclocked\n");
126 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "FX underclocked\n");
128 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ASRC underclocked\n");
130 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "DAC underclocked\n");
132 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ADC underclocked\n");
134 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "Mixer dropped sample\n");
140 static irqreturn_t arizona_overclocked(int irq, void *data)
142 struct arizona *arizona = data;
146 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
149 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
155 dev_err(arizona->dev, "PWM overclocked\n");
156 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
157 dev_err(arizona->dev, "FX core overclocked\n");
158 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "DAC SYS overclocked\n");
160 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "DAC WARP overclocked\n");
162 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "ADC overclocked\n");
164 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "Mixer overclocked\n");
166 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "AIF3 overclocked\n");
168 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "AIF2 overclocked\n");
170 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF1 overclocked\n");
172 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "Pad control overclocked\n");
175 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
176 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
177 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
178 dev_err(arizona->dev, "Slimbus async overclocked\n");
179 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus sync overclocked\n");
181 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "ASRC async system overclocked\n");
183 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
185 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC sync system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
189 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "DSP1 overclocked\n");
191 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ISRC2 overclocked\n");
193 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ISRC1 overclocked\n");
199 static int arizona_wait_for_boot(struct arizona *arizona)
205 * We can't use an interrupt as we need to runtime resume to do so,
206 * we won't race with the interrupt handler as it'll be blocked on
209 for (i = 0; i < 5; i++) {
212 ret = regmap_read(arizona->regmap,
213 ARIZONA_INTERRUPT_RAW_STATUS_5, ®);
215 dev_err(arizona->dev, "Failed to read boot state: %d\n",
220 if (reg & ARIZONA_BOOT_DONE_STS)
224 if (reg & ARIZONA_BOOT_DONE_STS) {
225 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
226 ARIZONA_BOOT_DONE_STS);
228 dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
232 pm_runtime_mark_last_busy(arizona->dev);
237 #ifdef CONFIG_PM_RUNTIME
238 static int arizona_runtime_resume(struct device *dev)
240 struct arizona *arizona = dev_get_drvdata(dev);
243 dev_dbg(arizona->dev, "Leaving AoD mode\n");
245 ret = regulator_enable(arizona->dcvdd);
247 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
251 regcache_cache_only(arizona->regmap, false);
253 ret = arizona_wait_for_boot(arizona);
258 switch (arizona->type) {
260 ret = wm5102_patch(arizona);
262 dev_err(arizona->dev, "Failed to apply patch: %d\n",
268 ret = regcache_sync(arizona->regmap);
270 dev_err(arizona->dev, "Failed to restore register cache\n");
277 regcache_cache_only(arizona->regmap, true);
278 regulator_disable(arizona->dcvdd);
282 static int arizona_runtime_suspend(struct device *dev)
284 struct arizona *arizona = dev_get_drvdata(dev);
286 dev_dbg(arizona->dev, "Entering AoD mode\n");
288 regulator_disable(arizona->dcvdd);
289 regcache_cache_only(arizona->regmap, true);
290 regcache_mark_dirty(arizona->regmap);
296 #ifdef CONFIG_PM_SLEEP
297 static int arizona_resume_noirq(struct device *dev)
299 struct arizona *arizona = dev_get_drvdata(dev);
301 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
302 disable_irq(arizona->irq);
307 static int arizona_resume(struct device *dev)
309 struct arizona *arizona = dev_get_drvdata(dev);
311 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
312 enable_irq(arizona->irq);
318 const struct dev_pm_ops arizona_pm_ops = {
319 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
320 arizona_runtime_resume,
322 SET_SYSTEM_SLEEP_PM_OPS(NULL, arizona_resume)
323 #ifdef CONFIG_PM_SLEEP
324 .resume_noirq = arizona_resume_noirq,
327 EXPORT_SYMBOL_GPL(arizona_pm_ops);
329 static struct mfd_cell early_devs[] = {
330 { .name = "arizona-ldo1" },
333 static struct mfd_cell wm5102_devs[] = {
334 { .name = "arizona-micsupp" },
335 { .name = "arizona-extcon" },
336 { .name = "arizona-gpio" },
337 { .name = "arizona-haptics" },
338 { .name = "arizona-pwm" },
339 { .name = "wm5102-codec" },
342 static struct mfd_cell wm5110_devs[] = {
343 { .name = "arizona-micsupp" },
344 { .name = "arizona-extcon" },
345 { .name = "arizona-gpio" },
346 { .name = "arizona-haptics" },
347 { .name = "arizona-pwm" },
348 { .name = "wm5110-codec" },
351 int arizona_dev_init(struct arizona *arizona)
353 struct device *dev = arizona->dev;
354 const char *type_name;
355 unsigned int reg, val;
356 int (*apply_patch)(struct arizona *) = NULL;
359 dev_set_drvdata(arizona->dev, arizona);
360 mutex_init(&arizona->clk_lock);
362 if (dev_get_platdata(arizona->dev))
363 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
364 sizeof(arizona->pdata));
366 regcache_cache_only(arizona->regmap, true);
368 switch (arizona->type) {
371 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
372 arizona->core_supplies[i].supply
373 = wm5102_core_supplies[i];
374 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
377 dev_err(arizona->dev, "Unknown device type %d\n",
382 ret = mfd_add_devices(arizona->dev, -1, early_devs,
383 ARRAY_SIZE(early_devs), NULL, 0, NULL);
385 dev_err(dev, "Failed to add early children: %d\n", ret);
389 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
390 arizona->core_supplies);
392 dev_err(dev, "Failed to request core supplies: %d\n",
397 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
398 if (IS_ERR(arizona->dcvdd)) {
399 ret = PTR_ERR(arizona->dcvdd);
400 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
404 ret = regulator_bulk_enable(arizona->num_core_supplies,
405 arizona->core_supplies);
407 dev_err(dev, "Failed to enable core supplies: %d\n",
412 ret = regulator_enable(arizona->dcvdd);
414 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
418 if (arizona->pdata.reset) {
419 /* Start out with /RESET low to put the chip into reset */
420 ret = gpio_request_one(arizona->pdata.reset,
421 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
424 dev_err(dev, "Failed to request /RESET: %d\n", ret);
428 gpio_set_value_cansleep(arizona->pdata.reset, 1);
431 regcache_cache_only(arizona->regmap, false);
433 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
435 dev_err(dev, "Failed to read ID register: %d\n", ret);
439 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
442 dev_err(dev, "Failed to read revision register: %d\n", ret);
445 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
448 #ifdef CONFIG_MFD_WM5102
450 type_name = "WM5102";
451 if (arizona->type != WM5102) {
452 dev_err(arizona->dev, "WM5102 registered as %d\n",
454 arizona->type = WM5102;
456 apply_patch = wm5102_patch;
460 #ifdef CONFIG_MFD_WM5110
462 type_name = "WM5110";
463 if (arizona->type != WM5110) {
464 dev_err(arizona->dev, "WM5110 registered as %d\n",
466 arizona->type = WM5110;
468 apply_patch = wm5110_patch;
472 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
476 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
478 /* If we have a /RESET GPIO we'll already be reset */
479 if (!arizona->pdata.reset) {
480 regcache_mark_dirty(arizona->regmap);
482 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
484 dev_err(dev, "Failed to reset device: %d\n", ret);
488 ret = regcache_sync(arizona->regmap);
490 dev_err(dev, "Failed to sync device: %d\n", ret);
495 ret = arizona_wait_for_boot(arizona);
497 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
502 ret = apply_patch(arizona);
504 dev_err(arizona->dev, "Failed to apply patch: %d\n",
510 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
511 if (!arizona->pdata.gpio_defaults[i])
514 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
515 arizona->pdata.gpio_defaults[i]);
518 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
519 pm_runtime_use_autosuspend(arizona->dev);
520 pm_runtime_enable(arizona->dev);
523 if (!arizona->pdata.clk32k_src)
524 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
526 switch (arizona->pdata.clk32k_src) {
527 case ARIZONA_32KZ_MCLK1:
528 case ARIZONA_32KZ_MCLK2:
529 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
530 ARIZONA_CLK_32K_SRC_MASK,
531 arizona->pdata.clk32k_src - 1);
532 arizona_clk32k_enable(arizona);
534 case ARIZONA_32KZ_NONE:
535 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
536 ARIZONA_CLK_32K_SRC_MASK, 2);
539 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
540 arizona->pdata.clk32k_src);
545 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
546 if (!arizona->pdata.micbias[i].mV &&
547 !arizona->pdata.micbias[i].bypass)
550 /* Apply default for bypass mode */
551 if (!arizona->pdata.micbias[i].mV)
552 arizona->pdata.micbias[i].mV = 2800;
554 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
556 val <<= ARIZONA_MICB1_LVL_SHIFT;
558 if (arizona->pdata.micbias[i].ext_cap)
559 val |= ARIZONA_MICB1_EXT_CAP;
561 if (arizona->pdata.micbias[i].discharge)
562 val |= ARIZONA_MICB1_DISCH;
564 if (arizona->pdata.micbias[i].fast_start)
565 val |= ARIZONA_MICB1_RATE;
567 if (arizona->pdata.micbias[i].bypass)
568 val |= ARIZONA_MICB1_BYPASS;
570 regmap_update_bits(arizona->regmap,
571 ARIZONA_MIC_BIAS_CTRL_1 + i,
572 ARIZONA_MICB1_LVL_MASK |
573 ARIZONA_MICB1_DISCH |
574 ARIZONA_MICB1_BYPASS |
575 ARIZONA_MICB1_RATE, val);
578 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
579 /* Default for both is 0 so noop with defaults */
580 val = arizona->pdata.dmic_ref[i]
581 << ARIZONA_IN1_DMIC_SUP_SHIFT;
582 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
584 regmap_update_bits(arizona->regmap,
585 ARIZONA_IN1L_CONTROL + (i * 8),
586 ARIZONA_IN1_DMIC_SUP_MASK |
587 ARIZONA_IN1_MODE_MASK, val);
590 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
591 /* Default is 0 so noop with defaults */
592 if (arizona->pdata.out_mono[i])
593 val = ARIZONA_OUT1_MONO;
597 regmap_update_bits(arizona->regmap,
598 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
599 ARIZONA_OUT1_MONO, val);
602 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
603 if (arizona->pdata.spk_mute[i])
604 regmap_update_bits(arizona->regmap,
605 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
606 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
607 ARIZONA_SPK1_MUTE_SEQ1_MASK,
608 arizona->pdata.spk_mute[i]);
610 if (arizona->pdata.spk_fmt[i])
611 regmap_update_bits(arizona->regmap,
612 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
613 ARIZONA_SPK1_FMT_MASK,
614 arizona->pdata.spk_fmt[i]);
617 /* Set up for interrupts */
618 ret = arizona_irq_init(arizona);
622 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
623 arizona_clkgen_err, arizona);
624 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
625 arizona_overclocked, arizona);
626 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
627 arizona_underclocked, arizona);
629 switch (arizona->type) {
631 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
632 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
635 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
636 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
641 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
645 #ifdef CONFIG_PM_RUNTIME
646 regulator_disable(arizona->dcvdd);
652 arizona_irq_exit(arizona);
654 if (arizona->pdata.reset) {
655 gpio_set_value_cansleep(arizona->pdata.reset, 1);
656 gpio_free(arizona->pdata.reset);
659 regulator_disable(arizona->dcvdd);
661 regulator_bulk_disable(arizona->num_core_supplies,
662 arizona->core_supplies);
664 mfd_remove_devices(dev);
667 EXPORT_SYMBOL_GPL(arizona_dev_init);
669 int arizona_dev_exit(struct arizona *arizona)
671 mfd_remove_devices(arizona->dev);
672 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
673 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
674 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
675 pm_runtime_disable(arizona->dev);
676 arizona_irq_exit(arizona);
679 EXPORT_SYMBOL_GPL(arizona_dev_exit);