6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
76 #include "isppreview.h"
77 #include "ispresizer.h"
84 * this is provided as an interim solution until omap3isp doesn't need
85 * any omap-specific iommu API
87 #define to_iommu(dev) \
88 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
90 static unsigned int autoidle;
91 module_param(autoidle, int, 0444);
92 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
94 static void isp_save_ctx(struct isp_device *isp);
96 static void isp_restore_ctx(struct isp_device *isp);
98 static const struct isp_res_mapping isp_res_maps[] = {
100 .isp_rev = ISP_REVISION_2_0,
101 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
102 1 << OMAP3_ISP_IOMEM_CCP2 |
103 1 << OMAP3_ISP_IOMEM_CCDC |
104 1 << OMAP3_ISP_IOMEM_HIST |
105 1 << OMAP3_ISP_IOMEM_H3A |
106 1 << OMAP3_ISP_IOMEM_PREV |
107 1 << OMAP3_ISP_IOMEM_RESZ |
108 1 << OMAP3_ISP_IOMEM_SBL |
109 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
110 1 << OMAP3_ISP_IOMEM_CSIPHY2,
113 .isp_rev = ISP_REVISION_15_0,
114 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
115 1 << OMAP3_ISP_IOMEM_CCP2 |
116 1 << OMAP3_ISP_IOMEM_CCDC |
117 1 << OMAP3_ISP_IOMEM_HIST |
118 1 << OMAP3_ISP_IOMEM_H3A |
119 1 << OMAP3_ISP_IOMEM_PREV |
120 1 << OMAP3_ISP_IOMEM_RESZ |
121 1 << OMAP3_ISP_IOMEM_SBL |
122 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
123 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
124 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
125 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
126 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
127 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
131 /* Structure for saving/restoring ISP module registers */
132 static struct isp_reg isp_reg_list[] = {
133 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
140 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
141 * @isp: OMAP3 ISP device
143 * In order to force posting of pending writes, we need to write and
144 * readback the same register, in this case the revision register.
146 * See this link for reference:
147 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
149 void omap3isp_flush(struct isp_device *isp)
151 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
156 * isp_enable_interrupts - Enable ISP interrupts.
157 * @isp: OMAP3 ISP device
159 static void isp_enable_interrupts(struct isp_device *isp)
161 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
162 | IRQ0ENABLE_CSIB_IRQ
163 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
164 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
165 | IRQ0ENABLE_CCDC_VD0_IRQ
166 | IRQ0ENABLE_CCDC_VD1_IRQ
167 | IRQ0ENABLE_HS_VS_IRQ
168 | IRQ0ENABLE_HIST_DONE_IRQ
169 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
170 | IRQ0ENABLE_H3A_AF_DONE_IRQ
171 | IRQ0ENABLE_PRV_DONE_IRQ
172 | IRQ0ENABLE_RSZ_DONE_IRQ;
174 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
175 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
179 * isp_disable_interrupts - Disable ISP interrupts.
180 * @isp: OMAP3 ISP device
182 static void isp_disable_interrupts(struct isp_device *isp)
184 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
188 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
189 * @isp: OMAP3 ISP device
190 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
191 * @xclksel: XCLK to configure (0 = A, 1 = B).
193 * Configures the specified MCLK divisor in the ISP timing control register
194 * (TCTRL_CTRL) to generate the desired xclk clock value.
196 * Divisor = cam_mclk_hz / xclk
198 * Returns the final frequency that is actually being generated
200 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
204 unsigned long mclk_hz;
206 if (!omap3isp_get(isp))
209 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
211 if (xclk >= mclk_hz) {
212 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
213 currentxclk = mclk_hz;
214 } else if (xclk >= 2) {
215 divisor = mclk_hz / xclk;
216 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
217 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
218 currentxclk = mclk_hz / divisor;
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVA_MASK,
228 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
233 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
234 ISPTCTRL_CTRL_DIVB_MASK,
235 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
236 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
242 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
243 "xclk. Must be 0 (A) or 1 (B).\n");
247 /* Do we go from stable whatever to clock? */
248 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
250 /* Stopping the clock. */
251 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
254 isp->xclk_divisor[xclksel - 1] = divisor;
262 * isp_power_settings - Sysconfig settings, for Power Management.
263 * @isp: OMAP3 ISP device
264 * @idle: Consider idle state.
266 * Sets the power settings for the ISP, and SBL bus.
268 static void isp_power_settings(struct isp_device *isp, int idle)
271 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
272 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
273 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
274 ((isp->revision == ISP_REVISION_15_0) ?
275 ISP_SYSCONFIG_AUTOIDLE : 0),
276 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
279 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
284 * Configure the bridge and lane shifter. Valid inputs are
286 * CCDC_INPUT_PARALLEL: Parallel interface
287 * CCDC_INPUT_CSI2A: CSI2a receiver
288 * CCDC_INPUT_CCP2B: CCP2b receiver
289 * CCDC_INPUT_CSI2C: CSI2c receiver
291 * The bridge and lane shifter are configured according to the selected input
292 * and the ISP platform data.
294 void omap3isp_configure_bridge(struct isp_device *isp,
295 enum ccdc_input_entity input,
296 const struct isp_parallel_platform_data *pdata,
301 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
302 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
303 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
304 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
305 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
308 case CCDC_INPUT_PARALLEL:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
310 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
311 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
312 shift += pdata->data_lane_shift * 2;
315 case CCDC_INPUT_CSI2A:
316 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
319 case CCDC_INPUT_CCP2B:
320 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
323 case CCDC_INPUT_CSI2C:
324 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
331 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
333 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
334 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
336 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
340 * isp_set_pixel_clock - Configures the ISP pixel clock
341 * @isp: OMAP3 ISP device
342 * @pixelclk: Average pixel clock in Hz
344 * Set the average pixel clock required by the sensor. The ISP will use the
345 * lowest possible memory bandwidth settings compatible with the clock.
347 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
349 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
352 void omap3isp_hist_dma_done(struct isp_device *isp)
354 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
355 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
356 /* Histogram cannot be enabled in this frame anymore */
357 atomic_set(&isp->isp_hist.buf_err, 1);
358 dev_dbg(isp->dev, "hist: Out of synchronization with "
359 "CCDC. Ignoring next buffer.\n");
363 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
365 static const char *name[] = {
384 "CCDC_LSC_PREFETCH_COMPLETED",
385 "CCDC_LSC_PREFETCH_ERROR",
401 dev_dbg(isp->dev, "ISP IRQ: ");
403 for (i = 0; i < ARRAY_SIZE(name); i++) {
404 if ((1 << i) & irqstatus)
405 printk(KERN_CONT "%s ", name[i]);
407 printk(KERN_CONT "\n");
410 static void isp_isr_sbl(struct isp_device *isp)
412 struct device *dev = isp->dev;
413 struct isp_pipeline *pipe;
417 * Handle shared buffer logic overflows for video buffers.
418 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
420 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
421 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
422 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
425 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
427 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
428 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
433 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
434 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
439 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
440 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
445 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
446 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
451 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
452 | ISPSBL_PCR_RSZ2_WBL_OVF
453 | ISPSBL_PCR_RSZ3_WBL_OVF
454 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
455 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
460 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
461 omap3isp_stat_sbl_overflow(&isp->isp_af);
463 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
464 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
468 * isp_isr - Interrupt Service Routine for Camera ISP module.
469 * @irq: Not used currently.
470 * @_isp: Pointer to the OMAP3 ISP device
472 * Handles the corresponding callback if plugged in.
474 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
475 * IRQ wasn't handled.
477 static irqreturn_t isp_isr(int irq, void *_isp)
479 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
480 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
481 IRQ0STATUS_CCDC_VD0_IRQ |
482 IRQ0STATUS_CCDC_VD1_IRQ |
483 IRQ0STATUS_HS_VS_IRQ;
484 struct isp_device *isp = _isp;
487 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
488 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
492 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
493 omap3isp_csi2_isr(&isp->isp_csi2a);
495 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
496 omap3isp_ccp2_isr(&isp->isp_ccp2);
498 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
499 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
500 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
501 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
502 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
503 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
504 omap3isp_stat_isr_frame_sync(&isp->isp_af);
505 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
508 if (irqstatus & ccdc_events)
509 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
511 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
512 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
513 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
514 omap3isp_preview_isr(&isp->isp_prev);
517 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
518 omap3isp_resizer_isr(&isp->isp_res);
520 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
521 omap3isp_stat_isr(&isp->isp_aewb);
523 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
524 omap3isp_stat_isr(&isp->isp_af);
526 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
527 omap3isp_stat_isr(&isp->isp_hist);
531 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
532 isp_isr_dbg(isp, irqstatus);
538 /* -----------------------------------------------------------------------------
539 * Pipeline power management
541 * Entities must be powered up when part of a pipeline that contains at least
542 * one open video device node.
544 * To achieve this use the entity use_count field to track the number of users.
545 * For entities corresponding to video device nodes the use_count field stores
546 * the users count of the node. For entities corresponding to subdevs the
547 * use_count field stores the total number of users of all video device nodes
550 * The omap3isp_pipeline_pm_use() function must be called in the open() and
551 * close() handlers of video device nodes. It increments or decrements the use
552 * count of all subdev entities in the pipeline.
554 * To react to link management on powered pipelines, the link setup notification
555 * callback updates the use count of all entities in the source and sink sides
560 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
561 * @entity: The entity
563 * Return the total number of users of all video device nodes in the pipeline.
565 static int isp_pipeline_pm_use_count(struct media_entity *entity)
567 struct media_entity_graph graph;
570 media_entity_graph_walk_start(&graph, entity);
572 while ((entity = media_entity_graph_walk_next(&graph))) {
573 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
574 use += entity->use_count;
581 * isp_pipeline_pm_power_one - Apply power change to an entity
582 * @entity: The entity
583 * @change: Use count change
585 * Change the entity use count by @change. If the entity is a subdev update its
586 * power state by calling the core::s_power operation when the use count goes
587 * from 0 to != 0 or from != 0 to 0.
589 * Return 0 on success or a negative error code on failure.
591 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
593 struct v4l2_subdev *subdev;
596 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
597 ? media_entity_to_v4l2_subdev(entity) : NULL;
599 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
600 ret = v4l2_subdev_call(subdev, core, s_power, 1);
601 if (ret < 0 && ret != -ENOIOCTLCMD)
605 entity->use_count += change;
606 WARN_ON(entity->use_count < 0);
608 if (entity->use_count == 0 && change < 0 && subdev != NULL)
609 v4l2_subdev_call(subdev, core, s_power, 0);
615 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
616 * @entity: The entity
617 * @change: Use count change
619 * Walk the pipeline to update the use count and the power state of all non-node
622 * Return 0 on success or a negative error code on failure.
624 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
626 struct media_entity_graph graph;
627 struct media_entity *first = entity;
633 media_entity_graph_walk_start(&graph, entity);
635 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
636 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
637 ret = isp_pipeline_pm_power_one(entity, change);
642 media_entity_graph_walk_start(&graph, first);
644 while ((first = media_entity_graph_walk_next(&graph))
646 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
647 isp_pipeline_pm_power_one(first, -change);
653 * omap3isp_pipeline_pm_use - Update the use count of an entity
654 * @entity: The entity
655 * @use: Use (1) or stop using (0) the entity
657 * Update the use count of all entities in the pipeline and power entities on or
660 * Return 0 on success or a negative error code on failure. Powering entities
661 * off is assumed to never fail. No failure can occur when the use parameter is
664 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
666 int change = use ? 1 : -1;
669 mutex_lock(&entity->parent->graph_mutex);
671 /* Apply use count to node. */
672 entity->use_count += change;
673 WARN_ON(entity->use_count < 0);
675 /* Apply power change to connected non-nodes. */
676 ret = isp_pipeline_pm_power(entity, change);
678 entity->use_count -= change;
680 mutex_unlock(&entity->parent->graph_mutex);
686 * isp_pipeline_link_notify - Link management notification callback
687 * @source: Pad at the start of the link
688 * @sink: Pad at the end of the link
689 * @flags: New link flags that will be applied
691 * React to link management on powered pipelines by updating the use count of
692 * all entities in the source and sink sides of the link. Entities are powered
693 * on or off accordingly.
695 * Return 0 on success or a negative error code on failure. Powering entities
696 * off is assumed to never fail. This function will not fail for disconnection
699 static int isp_pipeline_link_notify(struct media_pad *source,
700 struct media_pad *sink, u32 flags)
702 int source_use = isp_pipeline_pm_use_count(source->entity);
703 int sink_use = isp_pipeline_pm_use_count(sink->entity);
706 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
707 /* Powering off entities is assumed to never fail. */
708 isp_pipeline_pm_power(source->entity, -sink_use);
709 isp_pipeline_pm_power(sink->entity, -source_use);
713 ret = isp_pipeline_pm_power(source->entity, sink_use);
717 ret = isp_pipeline_pm_power(sink->entity, source_use);
719 isp_pipeline_pm_power(source->entity, -sink_use);
724 /* -----------------------------------------------------------------------------
725 * Pipeline stream management
729 * isp_pipeline_enable - Enable streaming on a pipeline
730 * @pipe: ISP pipeline
731 * @mode: Stream mode (single shot or continuous)
733 * Walk the entities chain starting at the pipeline output video node and start
734 * all modules in the chain in the given mode.
736 * Return 0 if successful, or the return value of the failed video::s_stream
737 * operation otherwise.
739 static int isp_pipeline_enable(struct isp_pipeline *pipe,
740 enum isp_pipeline_stream_state mode)
742 struct isp_device *isp = pipe->output->isp;
743 struct media_entity *entity;
744 struct media_pad *pad;
745 struct v4l2_subdev *subdev;
749 spin_lock_irqsave(&pipe->lock, flags);
750 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
751 spin_unlock_irqrestore(&pipe->lock, flags);
753 pipe->do_propagation = false;
755 entity = &pipe->output->video.entity;
757 pad = &entity->pads[0];
758 if (!(pad->flags & MEDIA_PAD_FL_SINK))
761 pad = media_entity_remote_source(pad);
763 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
766 entity = pad->entity;
767 subdev = media_entity_to_v4l2_subdev(entity);
769 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
770 if (ret < 0 && ret != -ENOIOCTLCMD)
773 if (subdev == &isp->isp_ccdc.subdev) {
774 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
776 v4l2_subdev_call(&isp->isp_af.subdev, video,
778 v4l2_subdev_call(&isp->isp_hist.subdev, video,
780 pipe->do_propagation = true;
784 /* Frame number propagation. In continuous streaming mode the number
785 * is incremented in the frame start ISR. In mem-to-mem mode
786 * singleshot is used and frame start IRQs are not available.
787 * Thus we have to increment the number here.
789 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
790 atomic_inc(&pipe->frame_number);
795 static int isp_pipeline_wait_resizer(struct isp_device *isp)
797 return omap3isp_resizer_busy(&isp->isp_res);
800 static int isp_pipeline_wait_preview(struct isp_device *isp)
802 return omap3isp_preview_busy(&isp->isp_prev);
805 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
807 return omap3isp_stat_busy(&isp->isp_af)
808 || omap3isp_stat_busy(&isp->isp_aewb)
809 || omap3isp_stat_busy(&isp->isp_hist)
810 || omap3isp_ccdc_busy(&isp->isp_ccdc);
813 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
815 static int isp_pipeline_wait(struct isp_device *isp,
816 int(*busy)(struct isp_device *isp))
818 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
820 while (!time_after(jiffies, timeout)) {
829 * isp_pipeline_disable - Disable streaming on a pipeline
830 * @pipe: ISP pipeline
832 * Walk the entities chain starting at the pipeline output video node and stop
833 * all modules in the chain. Wait synchronously for the modules to be stopped if
836 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
837 * can't be stopped (in which case a software reset of the ISP is probably
840 static int isp_pipeline_disable(struct isp_pipeline *pipe)
842 struct isp_device *isp = pipe->output->isp;
843 struct media_entity *entity;
844 struct media_pad *pad;
845 struct v4l2_subdev *subdev;
850 * We need to stop all the modules after CCDC first or they'll
851 * never stop since they may not get a full frame from CCDC.
853 entity = &pipe->output->video.entity;
855 pad = &entity->pads[0];
856 if (!(pad->flags & MEDIA_PAD_FL_SINK))
859 pad = media_entity_remote_source(pad);
861 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
864 entity = pad->entity;
865 subdev = media_entity_to_v4l2_subdev(entity);
867 if (subdev == &isp->isp_ccdc.subdev) {
868 v4l2_subdev_call(&isp->isp_aewb.subdev,
870 v4l2_subdev_call(&isp->isp_af.subdev,
872 v4l2_subdev_call(&isp->isp_hist.subdev,
876 v4l2_subdev_call(subdev, video, s_stream, 0);
878 if (subdev == &isp->isp_res.subdev)
879 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
880 else if (subdev == &isp->isp_prev.subdev)
881 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
882 else if (subdev == &isp->isp_ccdc.subdev)
883 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
888 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
889 failure = -ETIMEDOUT;
894 isp->needs_reset = true;
900 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
901 * @pipe: ISP pipeline
902 * @state: Stream state (stopped, single shot or continuous)
904 * Set the pipeline to the given stream state. Pipelines can be started in
905 * single-shot or continuous mode.
907 * Return 0 if successful, or the return value of the failed video::s_stream
908 * operation otherwise. The pipeline state is not updated when the operation
909 * fails, except when stopping the pipeline.
911 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
912 enum isp_pipeline_stream_state state)
916 if (state == ISP_PIPELINE_STREAM_STOPPED)
917 ret = isp_pipeline_disable(pipe);
919 ret = isp_pipeline_enable(pipe, state);
921 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
922 pipe->stream_state = state;
928 * isp_pipeline_resume - Resume streaming on a pipeline
929 * @pipe: ISP pipeline
931 * Resume video output and input and re-enable pipeline.
933 static void isp_pipeline_resume(struct isp_pipeline *pipe)
935 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
937 omap3isp_video_resume(pipe->output, !singleshot);
939 omap3isp_video_resume(pipe->input, 0);
940 isp_pipeline_enable(pipe, pipe->stream_state);
944 * isp_pipeline_suspend - Suspend streaming on a pipeline
945 * @pipe: ISP pipeline
949 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
951 isp_pipeline_disable(pipe);
955 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
957 * @me: ISP module's media entity
959 * Returns 1 if the entity has an enabled link to the output video node or 0
960 * otherwise. It's true only while pipeline can have no more than one output
963 static int isp_pipeline_is_last(struct media_entity *me)
965 struct isp_pipeline *pipe;
966 struct media_pad *pad;
970 pipe = to_isp_pipeline(me);
971 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
973 pad = media_entity_remote_source(&pipe->output->pad);
974 return pad->entity == me;
978 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
979 * @me: ISP module's media entity
981 * Suspend the whole pipeline if module's entity has an enabled link to the
982 * output video node. It works only while pipeline can have no more than one
985 static void isp_suspend_module_pipeline(struct media_entity *me)
987 if (isp_pipeline_is_last(me))
988 isp_pipeline_suspend(to_isp_pipeline(me));
992 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
993 * @me: ISP module's media entity
995 * Resume the whole pipeline if module's entity has an enabled link to the
996 * output video node. It works only while pipeline can have no more than one
999 static void isp_resume_module_pipeline(struct media_entity *me)
1001 if (isp_pipeline_is_last(me))
1002 isp_pipeline_resume(to_isp_pipeline(me));
1006 * isp_suspend_modules - Suspend ISP submodules.
1007 * @isp: OMAP3 ISP device
1009 * Returns 0 if suspend left in idle state all the submodules properly,
1010 * or returns 1 if a general Reset is required to suspend the submodules.
1012 static int isp_suspend_modules(struct isp_device *isp)
1014 unsigned long timeout;
1016 omap3isp_stat_suspend(&isp->isp_aewb);
1017 omap3isp_stat_suspend(&isp->isp_af);
1018 omap3isp_stat_suspend(&isp->isp_hist);
1019 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1020 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1021 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1022 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1023 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1025 timeout = jiffies + ISP_STOP_TIMEOUT;
1026 while (omap3isp_stat_busy(&isp->isp_af)
1027 || omap3isp_stat_busy(&isp->isp_aewb)
1028 || omap3isp_stat_busy(&isp->isp_hist)
1029 || omap3isp_preview_busy(&isp->isp_prev)
1030 || omap3isp_resizer_busy(&isp->isp_res)
1031 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1032 if (time_after(jiffies, timeout)) {
1033 dev_info(isp->dev, "can't stop modules.\n");
1043 * isp_resume_modules - Resume ISP submodules.
1044 * @isp: OMAP3 ISP device
1046 static void isp_resume_modules(struct isp_device *isp)
1048 omap3isp_stat_resume(&isp->isp_aewb);
1049 omap3isp_stat_resume(&isp->isp_af);
1050 omap3isp_stat_resume(&isp->isp_hist);
1051 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1052 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1053 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1054 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1055 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1059 * isp_reset - Reset ISP with a timeout wait for idle.
1060 * @isp: OMAP3 ISP device
1062 static int isp_reset(struct isp_device *isp)
1064 unsigned long timeout = 0;
1067 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1068 | ISP_SYSCONFIG_SOFTRESET,
1069 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1070 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1071 ISP_SYSSTATUS) & 0x1)) {
1072 if (timeout++ > 10000) {
1073 dev_alert(isp->dev, "cannot reset ISP\n");
1083 * isp_save_context - Saves the values of the ISP module registers.
1084 * @isp: OMAP3 ISP device
1085 * @reg_list: Structure containing pairs of register address and value to
1089 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1091 struct isp_reg *next = reg_list;
1093 for (; next->reg != ISP_TOK_TERM; next++)
1094 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1098 * isp_restore_context - Restores the values of the ISP module registers.
1099 * @isp: OMAP3 ISP device
1100 * @reg_list: Structure containing pairs of register address and value to
1104 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1106 struct isp_reg *next = reg_list;
1108 for (; next->reg != ISP_TOK_TERM; next++)
1109 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1113 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1114 * @isp: OMAP3 ISP device
1116 * Routine for saving the context of each module in the ISP.
1117 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1119 static void isp_save_ctx(struct isp_device *isp)
1121 isp_save_context(isp, isp_reg_list);
1123 omap_iommu_save_ctx(isp->iommu);
1127 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1128 * @isp: OMAP3 ISP device
1130 * Routine for restoring the context of each module in the ISP.
1131 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1133 static void isp_restore_ctx(struct isp_device *isp)
1135 isp_restore_context(isp, isp_reg_list);
1137 omap_iommu_restore_ctx(isp->iommu);
1138 omap3isp_ccdc_restore_context(isp);
1139 omap3isp_preview_restore_context(isp);
1142 /* -----------------------------------------------------------------------------
1143 * SBL resources management
1145 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1146 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1147 OMAP3_ISP_SBL_PREVIEW_READ | \
1148 OMAP3_ISP_SBL_RESIZER_READ)
1149 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1150 OMAP3_ISP_SBL_CSI2A_WRITE | \
1151 OMAP3_ISP_SBL_CSI2C_WRITE | \
1152 OMAP3_ISP_SBL_CCDC_WRITE | \
1153 OMAP3_ISP_SBL_PREVIEW_WRITE)
1155 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1159 isp->sbl_resources |= res;
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1162 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1165 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1168 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1170 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1171 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1173 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1174 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1176 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1177 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1179 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1182 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1186 isp->sbl_resources &= ~res;
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1189 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1192 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1195 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1197 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1198 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1200 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1201 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1203 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1204 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1206 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1210 * isp_module_sync_idle - Helper to sync module with its idle state
1211 * @me: ISP submodule's media entity
1212 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1213 * @stopping: flag which tells module wants to stop
1215 * This function checks if ISP submodule needs to wait for next interrupt. If
1216 * yes, makes the caller to sleep while waiting for such event.
1218 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1221 struct isp_pipeline *pipe = to_isp_pipeline(me);
1223 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1224 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1225 !isp_pipeline_ready(pipe)))
1229 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1230 * scenario. We'll call it here to avoid race conditions.
1232 atomic_set(stopping, 1);
1236 * If module is the last one, it's writing to memory. In this case,
1237 * it's necessary to check if the module is already paused due to
1238 * DMA queue underrun or if it has to wait for next interrupt to be
1240 * If it isn't the last one, the function won't sleep but *stopping
1241 * will still be set to warn next submodule caller's interrupt the
1242 * module wants to be idle.
1244 if (isp_pipeline_is_last(me)) {
1245 struct isp_video *video = pipe->output;
1246 unsigned long flags;
1247 spin_lock_irqsave(&video->queue->irqlock, flags);
1248 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1249 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1250 atomic_set(stopping, 0);
1254 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1255 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1256 msecs_to_jiffies(1000))) {
1257 atomic_set(stopping, 0);
1267 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1268 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1269 * @stopping: flag which tells module wants to stop
1271 * This function checks if ISP submodule was stopping. In case of yes, it
1272 * notices the caller by setting stopping to 0 and waking up the wait queue.
1273 * Returns 1 if it was stopping or 0 otherwise.
1275 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1278 if (atomic_cmpxchg(stopping, 1, 0)) {
1286 /* --------------------------------------------------------------------------
1290 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1291 ISPCTRL_HIST_CLK_EN | \
1292 ISPCTRL_RSZ_CLK_EN | \
1293 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1294 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1296 static void __isp_subclk_update(struct isp_device *isp)
1300 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1301 clk |= ISPCTRL_H3A_CLK_EN;
1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1304 clk |= ISPCTRL_HIST_CLK_EN;
1306 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1307 clk |= ISPCTRL_RSZ_CLK_EN;
1309 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1312 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1313 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1315 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1316 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1318 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1319 ISPCTRL_CLKS_MASK, clk);
1322 void omap3isp_subclk_enable(struct isp_device *isp,
1323 enum isp_subclk_resource res)
1325 isp->subclk_resources |= res;
1327 __isp_subclk_update(isp);
1330 void omap3isp_subclk_disable(struct isp_device *isp,
1331 enum isp_subclk_resource res)
1333 isp->subclk_resources &= ~res;
1335 __isp_subclk_update(isp);
1339 * isp_enable_clocks - Enable ISP clocks
1340 * @isp: OMAP3 ISP device
1342 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1344 static int isp_enable_clocks(struct isp_device *isp)
1351 * cam_mclk clock chain:
1352 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1354 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1355 * set to the same value. Hence the rate set for dpll4_m5
1356 * has to be twice of what is set on OMAP3430 to get
1357 * the required value for cam_mclk
1359 if (cpu_is_omap3630())
1364 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1366 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1367 goto out_clk_enable_ick;
1369 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1370 CM_CAM_MCLK_HZ/divisor);
1372 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1373 goto out_clk_enable_mclk;
1375 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1377 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1378 goto out_clk_enable_mclk;
1380 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1381 if (rate != CM_CAM_MCLK_HZ)
1382 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1384 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1385 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1387 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1388 goto out_clk_enable_csi2_fclk;
1392 out_clk_enable_csi2_fclk:
1393 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1394 out_clk_enable_mclk:
1395 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1401 * isp_disable_clocks - Disable ISP clocks
1402 * @isp: OMAP3 ISP device
1404 static void isp_disable_clocks(struct isp_device *isp)
1406 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1407 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1408 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1411 static const char *isp_clocks[] = {
1419 static void isp_put_clocks(struct isp_device *isp)
1423 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1424 if (isp->clock[i]) {
1425 clk_put(isp->clock[i]);
1426 isp->clock[i] = NULL;
1431 static int isp_get_clocks(struct isp_device *isp)
1436 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1437 clk = clk_get(isp->dev, isp_clocks[i]);
1439 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1440 isp_put_clocks(isp);
1441 return PTR_ERR(clk);
1444 isp->clock[i] = clk;
1451 * omap3isp_get - Acquire the ISP resource.
1453 * Initializes the clocks for the first acquire.
1455 * Increment the reference count on the ISP. If the first reference is taken,
1456 * enable clocks and power-up all submodules.
1458 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1460 struct isp_device *omap3isp_get(struct isp_device *isp)
1462 struct isp_device *__isp = isp;
1467 mutex_lock(&isp->isp_mutex);
1468 if (isp->ref_count > 0)
1471 if (isp_enable_clocks(isp) < 0) {
1476 /* We don't want to restore context before saving it! */
1477 if (isp->has_context)
1478 isp_restore_ctx(isp);
1480 isp->has_context = 1;
1482 isp_enable_interrupts(isp);
1487 mutex_unlock(&isp->isp_mutex);
1493 * omap3isp_put - Release the ISP
1495 * Decrement the reference count on the ISP. If the last reference is released,
1496 * power-down all submodules, disable clocks and free temporary buffers.
1498 void omap3isp_put(struct isp_device *isp)
1503 mutex_lock(&isp->isp_mutex);
1504 BUG_ON(isp->ref_count == 0);
1505 if (--isp->ref_count == 0) {
1506 isp_disable_interrupts(isp);
1508 if (isp->needs_reset) {
1510 isp->needs_reset = false;
1512 isp_disable_clocks(isp);
1514 mutex_unlock(&isp->isp_mutex);
1517 /* --------------------------------------------------------------------------
1518 * Platform device driver
1522 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1523 * @isp: OMAP3 ISP device
1525 #define ISP_PRINT_REGISTER(isp, name)\
1526 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1527 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1528 #define SBL_PRINT_REGISTER(isp, name)\
1529 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1530 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1532 void omap3isp_print_status(struct isp_device *isp)
1534 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1536 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1537 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1538 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1539 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1540 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1541 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1542 ISP_PRINT_REGISTER(isp, CTRL);
1543 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1544 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1545 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1548 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1549 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1550 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1552 SBL_PRINT_REGISTER(isp, PCR);
1553 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1555 dev_dbg(isp->dev, "--------------------------------------------\n");
1561 * Power management support.
1563 * As the ISP can't properly handle an input video stream interruption on a non
1564 * frame boundary, the ISP pipelines need to be stopped before sensors get
1565 * suspended. However, as suspending the sensors can require a running clock,
1566 * which can be provided by the ISP, the ISP can't be completely suspended
1567 * before the sensor.
1569 * To solve this problem power management support is split into prepare/complete
1570 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1571 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1572 * resume(), and the the pipelines are restarted in complete().
1574 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1577 static int isp_pm_prepare(struct device *dev)
1579 struct isp_device *isp = dev_get_drvdata(dev);
1582 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1584 if (isp->ref_count == 0)
1587 reset = isp_suspend_modules(isp);
1588 isp_disable_interrupts(isp);
1596 static int isp_pm_suspend(struct device *dev)
1598 struct isp_device *isp = dev_get_drvdata(dev);
1600 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1603 isp_disable_clocks(isp);
1608 static int isp_pm_resume(struct device *dev)
1610 struct isp_device *isp = dev_get_drvdata(dev);
1612 if (isp->ref_count == 0)
1615 return isp_enable_clocks(isp);
1618 static void isp_pm_complete(struct device *dev)
1620 struct isp_device *isp = dev_get_drvdata(dev);
1622 if (isp->ref_count == 0)
1625 isp_restore_ctx(isp);
1626 isp_enable_interrupts(isp);
1627 isp_resume_modules(isp);
1632 #define isp_pm_prepare NULL
1633 #define isp_pm_suspend NULL
1634 #define isp_pm_resume NULL
1635 #define isp_pm_complete NULL
1637 #endif /* CONFIG_PM */
1639 static void isp_unregister_entities(struct isp_device *isp)
1641 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1642 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1643 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1644 omap3isp_preview_unregister_entities(&isp->isp_prev);
1645 omap3isp_resizer_unregister_entities(&isp->isp_res);
1646 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1647 omap3isp_stat_unregister_entities(&isp->isp_af);
1648 omap3isp_stat_unregister_entities(&isp->isp_hist);
1650 v4l2_device_unregister(&isp->v4l2_dev);
1651 media_device_unregister(&isp->media_dev);
1655 * isp_register_subdev_group - Register a group of subdevices
1656 * @isp: OMAP3 ISP device
1657 * @board_info: I2C subdevs board information array
1659 * Register all I2C subdevices in the board_info array. The array must be
1660 * terminated by a NULL entry, and the first entry must be the sensor.
1662 * Return a pointer to the sensor media entity if it has been successfully
1663 * registered, or NULL otherwise.
1665 static struct v4l2_subdev *
1666 isp_register_subdev_group(struct isp_device *isp,
1667 struct isp_subdev_i2c_board_info *board_info)
1669 struct v4l2_subdev *sensor = NULL;
1672 if (board_info->board_info == NULL)
1675 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1676 struct v4l2_subdev *subdev;
1677 struct i2c_adapter *adapter;
1679 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1680 if (adapter == NULL) {
1681 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1682 "device %s\n", __func__,
1683 board_info->i2c_adapter_id,
1684 board_info->board_info->type);
1688 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1689 board_info->board_info, NULL);
1690 if (subdev == NULL) {
1691 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1692 __func__, board_info->board_info->type);
1703 static int isp_register_entities(struct isp_device *isp)
1705 struct isp_platform_data *pdata = isp->pdata;
1706 struct isp_v4l2_subdevs_group *subdevs;
1709 isp->media_dev.dev = isp->dev;
1710 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1711 sizeof(isp->media_dev.model));
1712 isp->media_dev.hw_revision = isp->revision;
1713 isp->media_dev.link_notify = isp_pipeline_link_notify;
1714 ret = media_device_register(&isp->media_dev);
1716 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1721 isp->v4l2_dev.mdev = &isp->media_dev;
1722 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1724 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1729 /* Register internal entities */
1730 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1734 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1738 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1742 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1747 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1751 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1755 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1759 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1763 /* Register external entities */
1764 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1765 struct v4l2_subdev *sensor;
1766 struct media_entity *input;
1770 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1774 sensor->host_priv = subdevs;
1776 /* Connect the sensor to the correct interface module. Parallel
1777 * sensors are connected directly to the CCDC, while serial
1778 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1779 * through CSIPHY1 or CSIPHY2.
1781 switch (subdevs->interface) {
1782 case ISP_INTERFACE_PARALLEL:
1783 input = &isp->isp_ccdc.subdev.entity;
1784 pad = CCDC_PAD_SINK;
1788 case ISP_INTERFACE_CSI2A_PHY2:
1789 input = &isp->isp_csi2a.subdev.entity;
1790 pad = CSI2_PAD_SINK;
1791 flags = MEDIA_LNK_FL_IMMUTABLE
1792 | MEDIA_LNK_FL_ENABLED;
1795 case ISP_INTERFACE_CCP2B_PHY1:
1796 case ISP_INTERFACE_CCP2B_PHY2:
1797 input = &isp->isp_ccp2.subdev.entity;
1798 pad = CCP2_PAD_SINK;
1802 case ISP_INTERFACE_CSI2C_PHY1:
1803 input = &isp->isp_csi2c.subdev.entity;
1804 pad = CSI2_PAD_SINK;
1805 flags = MEDIA_LNK_FL_IMMUTABLE
1806 | MEDIA_LNK_FL_ENABLED;
1810 printk(KERN_ERR "%s: invalid interface type %u\n",
1811 __func__, subdevs->interface);
1816 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1822 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1826 isp_unregister_entities(isp);
1831 static void isp_cleanup_modules(struct isp_device *isp)
1833 omap3isp_h3a_aewb_cleanup(isp);
1834 omap3isp_h3a_af_cleanup(isp);
1835 omap3isp_hist_cleanup(isp);
1836 omap3isp_resizer_cleanup(isp);
1837 omap3isp_preview_cleanup(isp);
1838 omap3isp_ccdc_cleanup(isp);
1839 omap3isp_ccp2_cleanup(isp);
1840 omap3isp_csi2_cleanup(isp);
1843 static int isp_initialize_modules(struct isp_device *isp)
1847 ret = omap3isp_csiphy_init(isp);
1849 dev_err(isp->dev, "CSI PHY initialization failed\n");
1853 ret = omap3isp_csi2_init(isp);
1855 dev_err(isp->dev, "CSI2 initialization failed\n");
1859 ret = omap3isp_ccp2_init(isp);
1861 dev_err(isp->dev, "CCP2 initialization failed\n");
1865 ret = omap3isp_ccdc_init(isp);
1867 dev_err(isp->dev, "CCDC initialization failed\n");
1871 ret = omap3isp_preview_init(isp);
1873 dev_err(isp->dev, "Preview initialization failed\n");
1877 ret = omap3isp_resizer_init(isp);
1879 dev_err(isp->dev, "Resizer initialization failed\n");
1883 ret = omap3isp_hist_init(isp);
1885 dev_err(isp->dev, "Histogram initialization failed\n");
1889 ret = omap3isp_h3a_aewb_init(isp);
1891 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1892 goto error_h3a_aewb;
1895 ret = omap3isp_h3a_af_init(isp);
1897 dev_err(isp->dev, "H3A AF initialization failed\n");
1901 /* Connect the submodules. */
1902 ret = media_entity_create_link(
1903 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1904 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1908 ret = media_entity_create_link(
1909 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1910 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1914 ret = media_entity_create_link(
1915 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1916 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1920 ret = media_entity_create_link(
1921 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1922 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1926 ret = media_entity_create_link(
1927 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1928 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1932 ret = media_entity_create_link(
1933 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1934 &isp->isp_aewb.subdev.entity, 0,
1935 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1939 ret = media_entity_create_link(
1940 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1941 &isp->isp_af.subdev.entity, 0,
1942 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1946 ret = media_entity_create_link(
1947 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1948 &isp->isp_hist.subdev.entity, 0,
1949 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1956 omap3isp_h3a_af_cleanup(isp);
1958 omap3isp_h3a_aewb_cleanup(isp);
1960 omap3isp_hist_cleanup(isp);
1962 omap3isp_resizer_cleanup(isp);
1964 omap3isp_preview_cleanup(isp);
1966 omap3isp_ccdc_cleanup(isp);
1968 omap3isp_ccp2_cleanup(isp);
1970 omap3isp_csi2_cleanup(isp);
1977 * isp_remove - Remove ISP platform device
1978 * @pdev: Pointer to ISP platform device
1982 static int isp_remove(struct platform_device *pdev)
1984 struct isp_device *isp = platform_get_drvdata(pdev);
1987 isp_unregister_entities(isp);
1988 isp_cleanup_modules(isp);
1991 iommu_detach_device(isp->domain, isp->iommu_dev);
1992 iommu_domain_free(isp->domain);
1995 free_irq(isp->irq_num, isp);
1996 isp_put_clocks(isp);
1998 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1999 if (isp->mmio_base[i]) {
2000 iounmap(isp->mmio_base[i]);
2001 isp->mmio_base[i] = NULL;
2004 if (isp->mmio_base_phys[i]) {
2005 release_mem_region(isp->mmio_base_phys[i],
2007 isp->mmio_base_phys[i] = 0;
2011 regulator_put(isp->isp_csiphy1.vdd);
2012 regulator_put(isp->isp_csiphy2.vdd);
2018 static int isp_map_mem_resource(struct platform_device *pdev,
2019 struct isp_device *isp,
2020 enum isp_mem_resources res)
2022 struct resource *mem;
2024 /* request the mem region for the camera registers */
2026 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2028 dev_err(isp->dev, "no mem resource?\n");
2032 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2034 "cannot reserve camera register I/O region\n");
2037 isp->mmio_base_phys[res] = mem->start;
2038 isp->mmio_size[res] = resource_size(mem);
2040 /* map the region */
2041 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2042 isp->mmio_size[res]);
2043 if (!isp->mmio_base[res]) {
2044 dev_err(isp->dev, "cannot map camera register I/O region\n");
2052 * isp_probe - Probe ISP platform device
2053 * @pdev: Pointer to ISP platform device
2055 * Returns 0 if successful,
2056 * -ENOMEM if no memory available,
2057 * -ENODEV if no platform device resources found
2058 * or no space for remapping registers,
2059 * -EINVAL if couldn't install ISR,
2060 * or clk_get return error value.
2062 static int isp_probe(struct platform_device *pdev)
2064 struct isp_platform_data *pdata = pdev->dev.platform_data;
2065 struct isp_device *isp;
2072 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2074 dev_err(&pdev->dev, "could not allocate memory\n");
2078 isp->autoidle = autoidle;
2079 isp->platform_cb.set_xclk = isp_set_xclk;
2080 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2082 mutex_init(&isp->isp_mutex);
2083 spin_lock_init(&isp->stat_lock);
2085 isp->dev = &pdev->dev;
2089 isp->raw_dmamask = DMA_BIT_MASK(32);
2090 isp->dev->dma_mask = &isp->raw_dmamask;
2091 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2093 platform_set_drvdata(pdev, isp);
2096 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2097 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2100 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2104 ret = isp_get_clocks(isp);
2108 if (omap3isp_get(isp) == NULL)
2111 ret = isp_reset(isp);
2115 /* Memory resources */
2116 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2117 dev_info(isp->dev, "Revision %d.%d found\n",
2118 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2120 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2121 if (isp->revision == isp_res_maps[m].isp_rev)
2124 if (m == ARRAY_SIZE(isp_res_maps)) {
2125 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2126 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2131 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2132 if (isp_res_maps[m].map & 1 << i) {
2133 ret = isp_map_mem_resource(pdev, isp, i);
2140 isp->iommu_dev = omap_find_iommu_device("isp");
2141 if (!isp->iommu_dev) {
2142 dev_err(isp->dev, "omap_find_iommu_device failed\n");
2147 /* to be removed once iommu migration is complete */
2148 isp->iommu = to_iommu(isp->iommu_dev);
2150 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2152 dev_err(isp->dev, "can't alloc iommu domain\n");
2157 ret = iommu_attach_device(isp->domain, isp->iommu_dev);
2159 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2164 isp->irq_num = platform_get_irq(pdev, 0);
2165 if (isp->irq_num <= 0) {
2166 dev_err(isp->dev, "No IRQ resource\n");
2171 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2172 dev_err(isp->dev, "Unable to request IRQ\n");
2178 ret = isp_initialize_modules(isp);
2182 ret = isp_register_entities(isp);
2186 isp_power_settings(isp, 1);
2192 isp_cleanup_modules(isp);
2194 free_irq(isp->irq_num, isp);
2196 iommu_detach_device(isp->domain, isp->iommu_dev);
2198 iommu_domain_free(isp->domain);
2202 isp_put_clocks(isp);
2204 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2205 if (isp->mmio_base[i]) {
2206 iounmap(isp->mmio_base[i]);
2207 isp->mmio_base[i] = NULL;
2210 if (isp->mmio_base_phys[i]) {
2211 release_mem_region(isp->mmio_base_phys[i],
2213 isp->mmio_base_phys[i] = 0;
2216 regulator_put(isp->isp_csiphy2.vdd);
2217 regulator_put(isp->isp_csiphy1.vdd);
2218 platform_set_drvdata(pdev, NULL);
2220 mutex_destroy(&isp->isp_mutex);
2226 static const struct dev_pm_ops omap3isp_pm_ops = {
2227 .prepare = isp_pm_prepare,
2228 .suspend = isp_pm_suspend,
2229 .resume = isp_pm_resume,
2230 .complete = isp_pm_complete,
2233 static struct platform_device_id omap3isp_id_table[] = {
2237 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2239 static struct platform_driver omap3isp_driver = {
2241 .remove = isp_remove,
2242 .id_table = omap3isp_id_table,
2244 .owner = THIS_MODULE,
2246 .pm = &omap3isp_pm_ops,
2250 module_platform_driver(omap3isp_driver);
2252 MODULE_AUTHOR("Nokia Corporation");
2253 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2254 MODULE_LICENSE("GPL");
2255 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);