2 * cx18 mailbox functions
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
5 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
25 #include "cx18-driver.h"
29 #include "cx18-mailbox.h"
30 #include "cx18-queue.h"
31 #include "cx18-streams.h"
32 #include "cx18-alsa-pcm.h" /* FIXME make configurable */
34 static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
36 #define API_FAST (1 << 2) /* Short timeout */
37 #define API_SLOW (1 << 3) /* Additional 300ms timeout */
39 struct cx18_api_info {
41 u8 flags; /* Flags, see above */
42 u8 rpu; /* Processing unit */
43 const char *name; /* The name of the command */
46 #define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x }
48 static const struct cx18_api_info api_info[] = {
49 /* MPEG encoder API */
50 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
51 API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
52 API_ENTRY(CPU, CX18_CREATE_TASK, 0),
53 API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
54 API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
55 API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
56 API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
57 API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
58 API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
59 API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
60 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0),
61 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0),
62 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0),
63 API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0),
64 API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0),
65 API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0),
66 API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0),
67 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0),
68 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0),
69 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0),
70 API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0),
71 API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW),
72 API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0),
73 API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0),
74 API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0),
75 API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0),
76 API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0),
77 API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0),
78 API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0),
79 API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0),
80 API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0),
81 API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0),
82 API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0),
83 API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0),
84 API_ENTRY(CPU, CX18_CPU_SET_VFC_PARAM, 0),
85 API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0),
86 API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST),
87 API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW),
88 API_ENTRY(APU, CX18_APU_START, 0),
89 API_ENTRY(APU, CX18_APU_STOP, 0),
90 API_ENTRY(APU, CX18_APU_RESETAI, 0),
91 API_ENTRY(CPU, CX18_CPU_DEBUG_PEEK32, 0),
95 static const struct cx18_api_info *find_api_info(u32 cmd)
99 for (i = 0; api_info[i].cmd; i++)
100 if (api_info[i].cmd == cmd)
105 /* Call with buf of n*11+1 bytes */
106 static char *u32arr2hex(u32 data[], int n, char *buf)
111 for (i = 0, p = buf; i < n; i++, p += 11) {
112 /* kernel snprintf() appends '\0' always */
113 snprintf(p, 12, " %#010x", data[i]);
119 static void dump_mb(struct cx18 *cx, struct cx18_mailbox *mb, char *name)
121 char argstr[MAX_MB_ARGUMENTS*11+1];
123 if (!(cx18_debug & CX18_DBGFLG_API))
126 CX18_DEBUG_API("%s: req %#010x ack %#010x cmd %#010x err %#010x args%s"
127 "\n", name, mb->request, mb->ack, mb->cmd, mb->error,
128 u32arr2hex(mb->args, MAX_MB_ARGUMENTS, argstr));
133 * Functions that run in a work_queue work handling context
136 static void cx18_mdl_send_to_dvb(struct cx18_stream *s, struct cx18_mdl *mdl)
138 struct cx18_buffer *buf;
140 if (s->dvb == NULL || !s->dvb->enabled || mdl->bytesused == 0)
143 /* We ignore mdl and buf readpos accounting here - it doesn't matter */
145 /* The likely case */
146 if (list_is_singular(&mdl->buf_list)) {
147 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
150 dvb_dmx_swfilter(&s->dvb->demux,
151 buf->buf, buf->bytesused);
155 list_for_each_entry(buf, &mdl->buf_list, list) {
156 if (buf->bytesused == 0)
158 dvb_dmx_swfilter(&s->dvb->demux, buf->buf, buf->bytesused);
162 static void cx18_mdl_send_to_videobuf(struct cx18_stream *s,
163 struct cx18_mdl *mdl)
165 struct cx18_videobuf_buffer *vb_buf;
166 struct cx18_buffer *buf;
171 if (mdl->bytesused == 0)
174 /* Acquire a videobuf buffer, clone to and and release it */
175 spin_lock(&s->vb_lock);
176 if (list_empty(&s->vb_capture))
179 vb_buf = list_first_entry(&s->vb_capture, struct cx18_videobuf_buffer,
182 p = videobuf_to_vmalloc(&vb_buf->vb);
186 offset = vb_buf->bytes_used;
187 list_for_each_entry(buf, &mdl->buf_list, list) {
188 if (buf->bytesused == 0)
191 if ((offset + buf->bytesused) <= vb_buf->vb.bsize) {
192 memcpy(p + offset, buf->buf, buf->bytesused);
193 offset += buf->bytesused;
194 vb_buf->bytes_used += buf->bytesused;
198 /* If we've filled the buffer as per the callers res then dispatch it */
199 if (vb_buf->bytes_used >= s->vb_bytes_per_frame) {
201 vb_buf->bytes_used = 0;
205 vb_buf->vb.ts = ktime_to_timeval(ktime_get());
206 list_del(&vb_buf->vb.queue);
207 vb_buf->vb.state = VIDEOBUF_DONE;
208 wake_up(&vb_buf->vb.done);
211 mod_timer(&s->vb_timeout, msecs_to_jiffies(2000) + jiffies);
214 spin_unlock(&s->vb_lock);
217 static void cx18_mdl_send_to_alsa(struct cx18 *cx, struct cx18_stream *s,
218 struct cx18_mdl *mdl)
220 struct cx18_buffer *buf;
222 if (mdl->bytesused == 0)
225 /* We ignore mdl and buf readpos accounting here - it doesn't matter */
227 /* The likely case */
228 if (list_is_singular(&mdl->buf_list)) {
229 buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
232 cx->pcm_announce_callback(cx->alsa, buf->buf,
237 list_for_each_entry(buf, &mdl->buf_list, list) {
238 if (buf->bytesused == 0)
240 cx->pcm_announce_callback(cx->alsa, buf->buf, buf->bytesused);
244 static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)
246 u32 handle, mdl_ack_count, id;
247 struct cx18_mailbox *mb;
248 struct cx18_mdl_ack *mdl_ack;
249 struct cx18_stream *s;
250 struct cx18_mdl *mdl;
254 handle = mb->args[0];
255 s = cx18_handle_to_stream(cx, handle);
258 CX18_WARN("Got DMA done notification for unknown/inactive"
259 " handle %d, %s mailbox seq no %d\n", handle,
260 (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?
261 "stale" : "good", mb->request);
265 mdl_ack_count = mb->args[2];
266 mdl_ack = order->mdl_ack;
267 for (i = 0; i < mdl_ack_count; i++, mdl_ack++) {
270 * Simple integrity check for processing a stale (and possibly
271 * inconsistent mailbox): make sure the MDL id is in the
272 * valid range for the stream.
274 * We go through the trouble of dealing with stale mailboxes
275 * because most of the time, the mailbox data is still valid and
276 * unchanged (and in practice the firmware ping-pongs the
277 * two mdl_ack buffers so mdl_acks are not stale).
279 * There are occasions when we get a half changed mailbox,
280 * which this check catches for a handle & id mismatch. If the
281 * handle and id do correspond, the worst case is that we
282 * completely lost the old MDL, but pick up the new MDL
283 * early (but the new mdl_ack is guaranteed to be good in this
284 * case as the firmware wouldn't point us to a new mdl_ack until
287 * cx18_queue_get_mdl() will detect the lost MDLs
288 * and send them back to q_free for fw rotation eventually.
290 if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&
291 !(id >= s->mdl_base_idx &&
292 id < (s->mdl_base_idx + s->buffers))) {
293 CX18_WARN("Fell behind! Ignoring stale mailbox with "
294 " inconsistent data. Lost MDL for mailbox "
295 "seq no %d\n", mb->request);
298 mdl = cx18_queue_get_mdl(s, id, mdl_ack->data_used);
300 CX18_DEBUG_HI_DMA("DMA DONE for %s (MDL %d)\n", s->name, id);
302 CX18_WARN("Could not find MDL %d for stream %s\n",
307 CX18_DEBUG_HI_DMA("%s recv bytesused = %d\n",
308 s->name, mdl->bytesused);
310 if (s->type == CX18_ENC_STREAM_TYPE_TS) {
311 cx18_mdl_send_to_dvb(s, mdl);
312 cx18_enqueue(s, mdl, &s->q_free);
313 } else if (s->type == CX18_ENC_STREAM_TYPE_PCM) {
314 /* Pass the data to cx18-alsa */
315 if (cx->pcm_announce_callback != NULL) {
316 cx18_mdl_send_to_alsa(cx, s, mdl);
317 cx18_enqueue(s, mdl, &s->q_free);
319 cx18_enqueue(s, mdl, &s->q_full);
321 } else if (s->type == CX18_ENC_STREAM_TYPE_YUV) {
322 cx18_mdl_send_to_videobuf(s, mdl);
323 cx18_enqueue(s, mdl, &s->q_free);
325 cx18_enqueue(s, mdl, &s->q_full);
326 if (s->type == CX18_ENC_STREAM_TYPE_IDX)
327 cx18_stream_rotate_idx_mdls(cx);
330 /* Put as many MDLs as possible back into fw use */
331 cx18_stream_load_fw_queue(s);
333 wake_up(&cx->dma_waitq);
338 static void epu_debug(struct cx18 *cx, struct cx18_in_work_order *order)
341 char *str = order->str;
343 CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);
344 p = strchr(str, '.');
345 if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str)
346 CX18_INFO("FW version: %s\n", p - 1);
349 static void epu_cmd(struct cx18 *cx, struct cx18_in_work_order *order)
351 switch (order->rpu) {
354 switch (order->mb.cmd) {
355 case CX18_EPU_DMA_DONE:
356 epu_dma_done(cx, order);
359 epu_debug(cx, order);
362 CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
369 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
378 void free_in_work_order(struct cx18 *cx, struct cx18_in_work_order *order)
380 atomic_set(&order->pending, 0);
383 void cx18_in_work_handler(struct work_struct *work)
385 struct cx18_in_work_order *order =
386 container_of(work, struct cx18_in_work_order, work);
387 struct cx18 *cx = order->cx;
389 free_in_work_order(cx, order);
394 * Functions that run in an interrupt handling context
397 static void mb_ack_irq(struct cx18 *cx, struct cx18_in_work_order *order)
399 struct cx18_mailbox __iomem *ack_mb;
402 switch (order->rpu) {
404 ack_irq = IRQ_EPU_TO_APU_ACK;
405 ack_mb = &cx->scb->apu2epu_mb;
408 ack_irq = IRQ_EPU_TO_CPU_ACK;
409 ack_mb = &cx->scb->cpu2epu_mb;
412 CX18_WARN("Unhandled RPU (%d) for command %x ack\n",
413 order->rpu, order->mb.cmd);
417 req = order->mb.request;
418 /* Don't ack if the RPU has gotten impatient and timed us out */
419 if (req != cx18_readl(cx, &ack_mb->request) ||
420 req == cx18_readl(cx, &ack_mb->ack)) {
421 CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our "
422 "incoming %s to EPU mailbox (sequence no. %u) "
423 "while processing\n",
424 rpu_str[order->rpu], rpu_str[order->rpu], req);
425 order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;
428 cx18_writel(cx, req, &ack_mb->ack);
429 cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);
433 static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)
435 u32 handle, mdl_ack_offset, mdl_ack_count;
436 struct cx18_mailbox *mb;
439 handle = mb->args[0];
440 mdl_ack_offset = mb->args[1];
441 mdl_ack_count = mb->args[2];
443 if (handle == CX18_INVALID_TASK_HANDLE ||
444 mdl_ack_count == 0 || mdl_ack_count > CX18_MAX_MDL_ACKS) {
445 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
446 mb_ack_irq(cx, order);
450 cx18_memcpy_fromio(cx, order->mdl_ack, cx->enc_mem + mdl_ack_offset,
451 sizeof(struct cx18_mdl_ack) * mdl_ack_count);
453 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
454 mb_ack_irq(cx, order);
459 int epu_debug_irq(struct cx18 *cx, struct cx18_in_work_order *order)
462 char *str = order->str;
465 str_offset = order->mb.args[1];
467 cx18_setup_page(cx, str_offset);
468 cx18_memcpy_fromio(cx, str, cx->enc_mem + str_offset, 252);
470 cx18_setup_page(cx, SCB_OFFSET);
473 if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
474 mb_ack_irq(cx, order);
476 return str_offset ? 1 : 0;
480 int epu_cmd_irq(struct cx18 *cx, struct cx18_in_work_order *order)
484 switch (order->rpu) {
487 switch (order->mb.cmd) {
488 case CX18_EPU_DMA_DONE:
489 ret = epu_dma_done_irq(cx, order);
492 ret = epu_debug_irq(cx, order);
495 CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
502 CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
512 struct cx18_in_work_order *alloc_in_work_order_irq(struct cx18 *cx)
515 struct cx18_in_work_order *order = NULL;
517 for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) {
519 * We only need "pending" atomic to inspect its contents,
520 * and need not do a check and set because:
521 * 1. Any work handler thread only clears "pending" and only
522 * on one, particular work order at a time, per handler thread.
523 * 2. "pending" is only set here, and we're serialized because
524 * we're called in an IRQ handler context.
526 if (atomic_read(&cx->in_work_order[i].pending) == 0) {
527 order = &cx->in_work_order[i];
528 atomic_set(&order->pending, 1);
535 void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
537 struct cx18_mailbox __iomem *mb;
538 struct cx18_mailbox *order_mb;
539 struct cx18_in_work_order *order;
544 mb = &cx->scb->cpu2epu_mb;
547 mb = &cx->scb->apu2epu_mb;
553 order = alloc_in_work_order_irq(cx);
555 CX18_WARN("Unable to find blank work order form to schedule "
556 "incoming mailbox command processing\n");
562 order_mb = &order->mb;
564 /* mb->cmd and mb->args[0] through mb->args[2] */
565 cx18_memcpy_fromio(cx, &order_mb->cmd, &mb->cmd, 4 * sizeof(u32));
566 /* mb->request and mb->ack. N.B. we want to read mb->ack last */
567 cx18_memcpy_fromio(cx, &order_mb->request, &mb->request,
570 if (order_mb->request == order_mb->ack) {
571 CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our "
572 "incoming %s to EPU mailbox (sequence no. %u)"
574 rpu_str[rpu], rpu_str[rpu], order_mb->request);
575 if (cx18_debug & CX18_DBGFLG_WARN)
576 dump_mb(cx, order_mb, "incoming");
577 order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;
581 * Individual EPU command processing is responsible for ack-ing
582 * a non-stale mailbox as soon as possible
584 submit = epu_cmd_irq(cx, order);
586 queue_work(cx->in_work_queue, &order->work);
592 * Functions called from a non-interrupt, non work_queue context
595 static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])
597 const struct cx18_api_info *info = find_api_info(cmd);
598 u32 irq, req, ack, err;
599 struct cx18_mailbox __iomem *mb;
600 wait_queue_head_t *waitq;
601 struct mutex *mb_lock;
602 unsigned long int t0, timeout, ret;
604 char argstr[MAX_MB_ARGUMENTS*11+1];
608 CX18_WARN("unknown cmd %x\n", cmd);
612 if (cx18_debug & CX18_DBGFLG_API) { /* only call u32arr2hex if needed */
613 if (cmd == CX18_CPU_DE_SET_MDL) {
614 if (cx18_debug & CX18_DBGFLG_HIGHVOL)
615 CX18_DEBUG_HI_API("%s\tcmd %#010x args%s\n",
617 u32arr2hex(data, args, argstr));
619 CX18_DEBUG_API("%s\tcmd %#010x args%s\n",
621 u32arr2hex(data, args, argstr));
626 waitq = &cx->mb_apu_waitq;
627 mb_lock = &cx->epu2apu_mb_lock;
628 irq = IRQ_EPU_TO_APU;
629 mb = &cx->scb->epu2apu_mb;
632 waitq = &cx->mb_cpu_waitq;
633 mb_lock = &cx->epu2cpu_mb_lock;
634 irq = IRQ_EPU_TO_CPU;
635 mb = &cx->scb->epu2cpu_mb;
638 CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu);
644 * Wait for an in-use mailbox to complete
646 * If the XPU is responding with Ack's, the mailbox shouldn't be in
647 * a busy state, since we serialize access to it on our end.
649 * If the wait for ack after sending a previous command was interrupted
650 * by a signal, we may get here and find a busy mailbox. After waiting,
651 * mark it "not busy" from our end, if the XPU hasn't ack'ed it still.
653 req = cx18_readl(cx, &mb->request);
654 timeout = msecs_to_jiffies(10);
655 ret = wait_event_timeout(*waitq,
656 (ack = cx18_readl(cx, &mb->ack)) == req,
659 /* waited long enough, make the mbox "not busy" from our end */
660 cx18_writel(cx, req, &mb->ack);
661 CX18_ERR("mbox was found stuck busy when setting up for %s; "
662 "clearing busy and trying to proceed\n", info->name);
663 } else if (ret != timeout)
664 CX18_DEBUG_API("waited %u msecs for busy mbox to be acked\n",
665 jiffies_to_msecs(timeout-ret));
667 /* Build the outgoing mailbox */
668 req = ((req & 0xfffffffe) == 0xfffffffe) ? 1 : req + 1;
670 cx18_writel(cx, cmd, &mb->cmd);
671 for (i = 0; i < args; i++)
672 cx18_writel(cx, data[i], &mb->args[i]);
673 cx18_writel(cx, 0, &mb->error);
674 cx18_writel(cx, req, &mb->request);
675 cx18_writel(cx, req - 1, &mb->ack); /* ensure ack & req are distinct */
678 * Notify the XPU and wait for it to send an Ack back
680 timeout = msecs_to_jiffies((info->flags & API_FAST) ? 10 : 20);
682 CX18_DEBUG_HI_IRQ("sending interrupt SW1: %x to send %s\n",
685 /* So we don't miss the wakeup, prepare to wait before notifying fw */
686 prepare_to_wait(waitq, &w, TASK_UNINTERRUPTIBLE);
687 cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq);
690 ack = cx18_readl(cx, &mb->ack);
692 schedule_timeout(timeout);
694 ack = cx18_readl(cx, &mb->ack);
699 finish_wait(waitq, &w);
702 mutex_unlock(mb_lock);
703 if (ret >= timeout) {
705 CX18_DEBUG_WARN("sending %s timed out waiting %d msecs "
706 "for RPU acknowledgement\n",
707 info->name, jiffies_to_msecs(ret));
709 CX18_DEBUG_WARN("woken up before mailbox ack was ready "
710 "after submitting %s to RPU. only "
711 "waited %d msecs on req %u but awakened"
712 " with unmatched ack %u\n",
714 jiffies_to_msecs(ret),
721 CX18_DEBUG_WARN("failed to be awakened upon RPU acknowledgment "
722 "sending %s; timed out waiting %d msecs\n",
723 info->name, jiffies_to_msecs(ret));
725 CX18_DEBUG_HI_API("waited %u msecs for %s to be acked\n",
726 jiffies_to_msecs(ret), info->name);
728 /* Collect data returned by the XPU */
729 for (i = 0; i < MAX_MB_ARGUMENTS; i++)
730 data[i] = cx18_readl(cx, &mb->args[i]);
731 err = cx18_readl(cx, &mb->error);
732 mutex_unlock(mb_lock);
735 * Wait for XPU to perform extra actions for the caller in some cases.
736 * e.g. CX18_CPU_DE_RELEASE_MDL will cause the CPU to send all MDLs
737 * back in a burst shortly thereafter
739 if (info->flags & API_SLOW)
740 cx18_msleep_timeout(300, 0);
743 CX18_DEBUG_API("mailbox error %08x for command %s\n", err,
745 return err ? -EIO : 0;
748 int cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[])
750 return cx18_api_call(cx, cmd, args, data);
753 static int cx18_set_filter_param(struct cx18_stream *s)
755 struct cx18 *cx = s->cx;
759 mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0);
760 ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
761 s->handle, 1, mode, cx->spatial_strength);
762 mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0);
763 ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
764 s->handle, 0, mode, cx->temporal_strength);
765 ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
766 s->handle, 2, cx->filter_mode >> 2, 0);
770 int cx18_api_func(void *priv, u32 cmd, int in, int out,
771 u32 data[CX2341X_MBOX_MAX_DATA])
773 struct cx18_stream *s = priv;
774 struct cx18 *cx = s->cx;
777 case CX2341X_ENC_SET_OUTPUT_PORT:
779 case CX2341X_ENC_SET_FRAME_RATE:
780 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6,
781 s->handle, 0, 0, 0, 0, data[0]);
782 case CX2341X_ENC_SET_FRAME_SIZE:
783 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3,
784 s->handle, data[1], data[0]);
785 case CX2341X_ENC_SET_STREAM_TYPE:
786 return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2,
788 case CX2341X_ENC_SET_ASPECT_RATIO:
789 return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2,
792 case CX2341X_ENC_SET_GOP_PROPERTIES:
793 return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3,
794 s->handle, data[0], data[1]);
795 case CX2341X_ENC_SET_GOP_CLOSURE:
797 case CX2341X_ENC_SET_AUDIO_PROPERTIES:
798 return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2,
800 case CX2341X_ENC_MUTE_AUDIO:
801 return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2,
803 case CX2341X_ENC_SET_BIT_RATE:
804 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5,
805 s->handle, data[0], data[1], data[2], data[3]);
806 case CX2341X_ENC_MUTE_VIDEO:
807 return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
809 case CX2341X_ENC_SET_FRAME_DROP_RATE:
810 return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2,
812 case CX2341X_ENC_MISC:
813 return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4,
814 s->handle, data[0], data[1], data[2]);
815 case CX2341X_ENC_SET_DNR_FILTER_MODE:
816 cx->filter_mode = (data[0] & 3) | (data[1] << 2);
817 return cx18_set_filter_param(s);
818 case CX2341X_ENC_SET_DNR_FILTER_PROPS:
819 cx->spatial_strength = data[0];
820 cx->temporal_strength = data[1];
821 return cx18_set_filter_param(s);
822 case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:
823 return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3,
824 s->handle, data[0], data[1]);
825 case CX2341X_ENC_SET_CORING_LEVELS:
826 return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5,
827 s->handle, data[0], data[1], data[2], data[3]);
829 CX18_WARN("Unknown cmd %x\n", cmd);
833 int cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS],
834 u32 cmd, int args, ...)
840 for (i = 0; i < args; i++)
841 data[i] = va_arg(ap, u32);
843 return cx18_api(cx, cmd, args, data);
846 int cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...)
848 u32 data[MAX_MB_ARGUMENTS];
853 CX18_ERR("cx == NULL (cmd=%x)\n", cmd);
856 if (args > MAX_MB_ARGUMENTS) {
857 CX18_ERR("args too big (cmd=%x)\n", cmd);
858 args = MAX_MB_ARGUMENTS;
861 for (i = 0; i < args; i++)
862 data[i] = va_arg(ap, u32);
864 return cx18_api(cx, cmd, args, data);