2 * Samsung S5P Multi Format Codec v 5.0
4 * This file contains definitions of enums and structs used by the codec
7 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
8 * Kamil Debski, <k.debski@samsung.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version
16 #ifndef S5P_MFC_COMMON_H_
17 #define S5P_MFC_COMMON_H_
19 #include <linux/platform_device.h>
20 #include <linux/videodev2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-ioctl.h>
24 #include <media/videobuf2-core.h>
26 #include "regs-mfc-v6.h"
27 #include "regs-mfc-v7.h"
29 /* Definitions related to MFC memory */
31 /* Offset base used to differentiate between CAPTURE and OUTPUT
33 #define DST_QUEUE_OFF_BASE (TASK_SIZE / 2)
35 #define MFC_BANK1_ALLOC_CTX 0
36 #define MFC_BANK2_ALLOC_CTX 1
38 #define MFC_BANK1_ALIGN_ORDER 13
39 #define MFC_BANK2_ALIGN_ORDER 13
40 #define MFC_BASE_ALIGN_ORDER 17
42 #include <media/videobuf2-dma-contig.h>
44 static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
46 /* Same functionality as the vb2_dma_contig_plane_paddr */
47 dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b);
53 #define MFC_MAX_EXTRA_DPB 5
54 #define MFC_MAX_BUFFERS 32
55 #define MFC_NUM_CONTEXTS 4
56 /* Interrupt timeout */
57 #define MFC_INT_TIMEOUT 2000
58 /* Busy wait timeout */
59 #define MFC_BW_TIMEOUT 500
60 /* Watchdog interval */
61 #define MFC_WATCHDOG_INTERVAL 1000
62 /* After how many executions watchdog should assume lock up */
63 #define MFC_WATCHDOG_CNT 10
64 #define MFC_NO_INSTANCE_SET -1
65 #define MFC_ENC_CAP_PLANE_COUNT 1
66 #define MFC_ENC_OUT_PLANE_COUNT 2
68 #define MFC_MAX_CTRLS 77
70 #define S5P_MFC_CODEC_NONE -1
71 #define S5P_MFC_CODEC_H264_DEC 0
72 #define S5P_MFC_CODEC_H264_MVC_DEC 1
73 #define S5P_MFC_CODEC_VC1_DEC 2
74 #define S5P_MFC_CODEC_MPEG4_DEC 3
75 #define S5P_MFC_CODEC_MPEG2_DEC 4
76 #define S5P_MFC_CODEC_H263_DEC 5
77 #define S5P_MFC_CODEC_VC1RCV_DEC 6
78 #define S5P_MFC_CODEC_VP8_DEC 7
80 #define S5P_MFC_CODEC_H264_ENC 20
81 #define S5P_MFC_CODEC_H264_MVC_ENC 21
82 #define S5P_MFC_CODEC_MPEG4_ENC 22
83 #define S5P_MFC_CODEC_H263_ENC 23
84 #define S5P_MFC_CODEC_VP8_ENC 24
86 #define S5P_MFC_R2H_CMD_EMPTY 0
87 #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
88 #define S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET 2
89 #define S5P_MFC_R2H_CMD_SEQ_DONE_RET 3
90 #define S5P_MFC_R2H_CMD_INIT_BUFFERS_RET 4
91 #define S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET 6
92 #define S5P_MFC_R2H_CMD_SLEEP_RET 7
93 #define S5P_MFC_R2H_CMD_WAKEUP_RET 8
94 #define S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET 9
95 #define S5P_MFC_R2H_CMD_DPB_FLUSH_RET 10
96 #define S5P_MFC_R2H_CMD_NAL_ABORT_RET 11
97 #define S5P_MFC_R2H_CMD_FW_STATUS_RET 12
98 #define S5P_MFC_R2H_CMD_FRAME_DONE_RET 13
99 #define S5P_MFC_R2H_CMD_FIELD_DONE_RET 14
100 #define S5P_MFC_R2H_CMD_SLICE_DONE_RET 15
101 #define S5P_MFC_R2H_CMD_ENC_BUFFER_FUL_RET 16
102 #define S5P_MFC_R2H_CMD_ERR_RET 32
104 #define mfc_read(dev, offset) readl(dev->regs_base + (offset))
105 #define mfc_write(dev, data, offset) writel((data), dev->regs_base + \
109 * enum s5p_mfc_fmt_type - type of the pixelformat
111 enum s5p_mfc_fmt_type {
118 * enum s5p_mfc_node_type - The type of an MFC device node.
120 enum s5p_mfc_node_type {
121 MFCNODE_INVALID = -1,
127 * enum s5p_mfc_inst_type - The type of an MFC instance.
129 enum s5p_mfc_inst_type {
136 * enum s5p_mfc_inst_state - The state of an MFC instance.
138 enum s5p_mfc_inst_state {
143 MFCINST_HEAD_PRODUCED,
152 MFCINST_RES_CHANGE_INIT,
153 MFCINST_RES_CHANGE_FLUSH,
154 MFCINST_RES_CHANGE_END,
158 * enum s5p_mfc_queue_state - The state of buffer queue.
160 enum s5p_mfc_queue_state {
162 QUEUE_BUFS_REQUESTED,
168 * enum s5p_mfc_decode_arg - type of frame decoding
170 enum s5p_mfc_decode_arg {
176 #define MFC_BUF_FLAG_USED (1 << 0)
177 #define MFC_BUF_FLAG_EOS (1 << 1)
182 * struct s5p_mfc_buf - MFC buffer
185 struct list_head list;
186 struct vb2_buffer *b;
198 * struct s5p_mfc_pm - power management data structure
202 struct clk *clock_gate;
204 struct device *device;
207 struct s5p_mfc_buf_size_v5 {
208 unsigned int h264_ctx;
209 unsigned int non_h264_ctx;
214 struct s5p_mfc_buf_size_v6 {
215 unsigned int dev_ctx;
216 unsigned int h264_dec_ctx;
217 unsigned int other_dec_ctx;
218 unsigned int h264_enc_ctx;
219 unsigned int other_enc_ctx;
222 struct s5p_mfc_buf_size {
228 struct s5p_mfc_buf_align {
232 struct s5p_mfc_variant {
233 unsigned int version;
234 unsigned int port_num;
235 struct s5p_mfc_buf_size *buf_size;
236 struct s5p_mfc_buf_align *buf_align;
241 * struct s5p_mfc_priv_buf - represents internal used buffer
242 * @alloc: allocation-specific context for each buffer
243 * (videobuf2 allocator)
244 * @ofs: offset of each buffer, will be used for MFC
245 * @virt: kernel virtual address, only valid when the
246 * buffer accessed by driver
247 * @dma: DMA address, only valid when kernel DMA API used
248 * @size: size of the buffer
250 struct s5p_mfc_priv_buf {
259 * struct s5p_mfc_dev - The struct containing driver internal parameters.
261 * @v4l2_dev: v4l2_device
262 * @vfd_dec: video device for decoding
263 * @vfd_enc: video device for encoding
264 * @plat_dev: platform device
265 * @mem_dev_l: child device of the left memory bank (0)
266 * @mem_dev_r: child device of the right memory bank (1)
267 * @regs_base: base address of the MFC hw registers
269 * @dec_ctrl_handler: control framework handler for decoding
270 * @enc_ctrl_handler: control framework handler for encoding
271 * @pm: power management control
272 * @variant: MFC hardware variant information
273 * @num_inst: couter of active MFC instances
274 * @irqlock: lock for operations on videobuf2 queues
275 * @condlock: lock for changing/checking if a context is ready to be
277 * @mfc_mutex: lock for video_device
278 * @int_cond: variable used by the waitqueue
279 * @int_type: type of last interrupt
280 * @int_err: error number for last interrupt
281 * @queue: waitqueue for waiting for completion of device commands
282 * @fw_size: size of firmware
283 * @fw_virt_addr: virtual firmware address
284 * @bank1: address of the beginning of bank 1 memory
285 * @bank2: address of the beginning of bank 2 memory
286 * @hw_lock: used for hardware locking
287 * @ctx: array of driver contexts
288 * @curr_ctx: number of the currently running context
289 * @ctx_work_bits: used to mark which contexts are waiting for hardware
290 * @watchdog_cnt: counter for the watchdog
291 * @watchdog_workqueue: workqueue for the watchdog
292 * @watchdog_work: worker for the watchdog
293 * @alloc_ctx: videobuf2 allocator contexts for two memory banks
294 * @enter_suspend: flag set when entering suspend
295 * @ctx_buf: common context memory (MFCv6)
296 * @warn_start: hardware error code from which warnings start
297 * @mfc_ops: ops structure holding HW operation function pointers
298 * @mfc_cmds: cmd structure holding HW commands function pointers
302 struct v4l2_device v4l2_dev;
303 struct video_device *vfd_dec;
304 struct video_device *vfd_enc;
305 struct platform_device *plat_dev;
306 struct device *mem_dev_l;
307 struct device *mem_dev_r;
308 void __iomem *regs_base;
310 struct v4l2_ctrl_handler dec_ctrl_handler;
311 struct v4l2_ctrl_handler enc_ctrl_handler;
312 struct s5p_mfc_pm pm;
313 struct s5p_mfc_variant *variant;
315 spinlock_t irqlock; /* lock when operating on videobuf2 queues */
316 spinlock_t condlock; /* lock when changing/checking if a context is
317 ready to be processed */
318 struct mutex mfc_mutex; /* video_device lock */
321 unsigned int int_err;
322 wait_queue_head_t queue;
327 unsigned long hw_lock;
328 struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS];
330 unsigned long ctx_work_bits;
331 atomic_t watchdog_cnt;
332 struct timer_list watchdog_timer;
333 struct workqueue_struct *watchdog_workqueue;
334 struct work_struct watchdog_work;
336 unsigned long enter_suspend;
338 struct s5p_mfc_priv_buf ctx_buf;
340 struct s5p_mfc_hw_ops *mfc_ops;
341 struct s5p_mfc_hw_cmds *mfc_cmds;
345 * struct s5p_mfc_h264_enc_params - encoding parameters for h264
347 struct s5p_mfc_h264_enc_params {
348 enum v4l2_mpeg_video_h264_profile profile;
349 enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode;
350 s8 loop_filter_alpha;
352 enum v4l2_mpeg_video_h264_entropy_mode entropy_mode;
362 u16 vui_ext_sar_width;
363 u16 vui_ext_sar_height;
371 enum v4l2_mpeg_video_h264_level level_v4l2;
378 u8 hier_qp_layer_qp[7];
379 u8 sei_frame_packing;
380 u8 sei_fp_curr_frame_0;
381 u8 sei_fp_arrangement_type;
390 u32 aso_slice_order[8];
394 * struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4
396 struct s5p_mfc_mpeg4_enc_params {
398 enum v4l2_mpeg_video_mpeg4_profile profile;
400 /* Common for MPEG4, H263 */
408 enum v4l2_mpeg_video_mpeg4_level level_v4l2;
413 * struct s5p_mfc_vp8_enc_params - encoding parameters for vp8
415 struct s5p_mfc_vp8_enc_params {
417 enum v4l2_vp8_num_partitions num_partitions;
418 enum v4l2_vp8_num_ref_frames num_ref;
421 u32 golden_frame_ref_period;
422 enum v4l2_vp8_golden_frame_sel golden_frame_sel;
428 * struct s5p_mfc_enc_params - general encoding parameters
430 struct s5p_mfc_enc_params {
435 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
438 u16 intra_refresh_mb;
446 u16 rc_reaction_coeff;
450 enum v4l2_mpeg_video_header_mode seq_hdr_mode;
451 enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode;
452 int fixed_target_bit;
455 u32 rc_framerate_num;
456 u32 rc_framerate_denom;
459 struct s5p_mfc_h264_enc_params h264;
460 struct s5p_mfc_mpeg4_enc_params mpeg4;
461 struct s5p_mfc_vp8_enc_params vp8;
467 * struct s5p_mfc_codec_ops - codec ops, used by encoding
469 struct s5p_mfc_codec_ops {
470 /* initialization routines */
471 int (*pre_seq_start) (struct s5p_mfc_ctx *ctx);
472 int (*post_seq_start) (struct s5p_mfc_ctx *ctx);
473 /* execution routines */
474 int (*pre_frame_start) (struct s5p_mfc_ctx *ctx);
475 int (*post_frame_start) (struct s5p_mfc_ctx *ctx);
478 #define call_cop(c, op, args...) \
479 (((c)->c_ops->op) ? \
480 ((c)->c_ops->op(args)) : 0)
483 * struct s5p_mfc_ctx - This struct contains the instance context
485 * @dev: pointer to the s5p_mfc_dev of the device
486 * @fh: struct v4l2_fh
487 * @num: number of the context that this structure describes
488 * @int_cond: variable used by the waitqueue
489 * @int_type: type of the last interrupt
490 * @int_err: error number received from MFC hw in the interrupt
491 * @queue: waitqueue that can be used to wait for this context to
493 * @src_fmt: source pixelformat information
494 * @dst_fmt: destination pixelformat information
495 * @vq_src: vb2 queue for source buffers
496 * @vq_dst: vb2 queue for destination buffers
497 * @src_queue: driver internal queue for source buffers
498 * @dst_queue: driver internal queue for destination buffers
499 * @src_queue_cnt: number of buffers queued on the source internal queue
500 * @dst_queue_cnt: number of buffers queued on the dest internal queue
501 * @type: type of the instance - decoder or encoder
502 * @state: state of the context
503 * @inst_no: number of hw instance associated with the context
504 * @img_width: width of the image that is decoded or encoded
505 * @img_height: height of the image that is decoded or encoded
506 * @buf_width: width of the buffer for processed image
507 * @buf_height: height of the buffer for processed image
508 * @luma_size: size of a luma plane
509 * @chroma_size: size of a chroma plane
510 * @mv_size: size of a motion vectors buffer
511 * @consumed_stream: number of bytes that have been used so far from the
513 * @dpb_flush_flag: flag used to indicate that a DPB buffers are being
515 * @head_processed: flag mentioning whether the header data is processed
517 * @bank1: handle to memory allocated for temporary buffers from
519 * @bank2: handle to memory allocated for temporary buffers from
521 * @capture_state: state of the capture buffers queue
522 * @output_state: state of the output buffers queue
523 * @src_bufs: information on allocated source buffers
524 * @dst_bufs: information on allocated destination buffers
525 * @sequence: counter for the sequence number for v4l2
526 * @dec_dst_flag: flags for buffers queued in the hardware
527 * @dec_src_buf_size: size of the buffer for source buffers in decoding
528 * @codec_mode: number of codec mode used by MFC hw
529 * @slice_interface: slice interface flag
530 * @loop_filter_mpeg4: loop filter for MPEG4 flag
531 * @display_delay: value of the display delay for H264
532 * @display_delay_enable: display delay for H264 enable flag
533 * @after_packed_pb: flag used to track buffer when stream is in
535 * @sei_fp_parse: enable/disable parsing of frame packing SEI information
536 * @dpb_count: count of the DPB buffers required by MFC hw
537 * @total_dpb_count: count of DPB buffers with additional buffers
538 * requested by the application
539 * @ctx: context buffer information
540 * @dsc: descriptor buffer information
541 * @shm: shared memory buffer information
542 * @mv_count: number of MV buffers allocated for decoding
543 * @enc_params: encoding parameters for MFC
544 * @enc_dst_buf_size: size of the buffers for encoder output
545 * @luma_dpb_size: dpb buffer size for luma
546 * @chroma_dpb_size: dpb buffer size for chroma
547 * @me_buffer_size: size of the motion estimation buffer
548 * @tmv_buffer_size: size of temporal predictor motion vector buffer
549 * @frame_type: used to force the type of the next encoded frame
550 * @ref_queue: list of the reference buffers for encoding
551 * @ref_queue_cnt: number of the buffers in the reference list
552 * @c_ops: ops for encoding
553 * @ctrls: array of controls, used when adding controls to the
554 * v4l2 control framework
555 * @ctrl_handler: handler for v4l2 framework
558 struct s5p_mfc_dev *dev;
565 unsigned int int_err;
566 wait_queue_head_t queue;
568 struct s5p_mfc_fmt *src_fmt;
569 struct s5p_mfc_fmt *dst_fmt;
571 struct vb2_queue vq_src;
572 struct vb2_queue vq_dst;
574 struct list_head src_queue;
575 struct list_head dst_queue;
577 unsigned int src_queue_cnt;
578 unsigned int dst_queue_cnt;
580 enum s5p_mfc_inst_type type;
581 enum s5p_mfc_inst_state state;
584 /* Image parameters */
594 unsigned long consumed_stream;
596 unsigned int dpb_flush_flag;
597 unsigned int head_processed;
599 struct s5p_mfc_priv_buf bank1;
600 struct s5p_mfc_priv_buf bank2;
602 enum s5p_mfc_queue_state capture_state;
603 enum s5p_mfc_queue_state output_state;
605 struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS];
607 struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS];
610 unsigned int sequence;
611 unsigned long dec_dst_flag;
612 size_t dec_src_buf_size;
617 int loop_filter_mpeg4;
619 int display_delay_enable;
627 struct s5p_mfc_priv_buf ctx;
628 struct s5p_mfc_priv_buf dsc;
629 struct s5p_mfc_priv_buf shm;
631 struct s5p_mfc_enc_params enc_params;
633 size_t enc_dst_buf_size;
634 size_t luma_dpb_size;
635 size_t chroma_dpb_size;
636 size_t me_buffer_size;
637 size_t tmv_buffer_size;
639 enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type;
641 struct list_head ref_queue;
642 unsigned int ref_queue_cnt;
644 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
650 struct s5p_mfc_codec_ops *c_ops;
652 struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS];
653 struct v4l2_ctrl_handler ctrl_handler;
654 unsigned int frame_tag;
655 size_t scratch_buf_size;
659 * struct s5p_mfc_fmt - structure used to store information about pixelformats
666 enum s5p_mfc_fmt_type type;
671 * struct mfc_control - structure used to store information about MFC controls
672 * it is used to initialize the control framework.
676 enum v4l2_ctrl_type type;
677 __u8 name[32]; /* Whatever */
678 __s32 minimum; /* Note signedness */
681 __u32 menu_skip_mask;
688 /* Macro for making hardware specific calls */
689 #define s5p_mfc_hw_call(f, op, args...) \
690 ((f && f->op) ? f->op(args) : -ENODEV)
692 #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
693 #define ctrl_to_ctx(__ctrl) \
694 container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler)
696 void clear_work_bit(struct s5p_mfc_ctx *ctx);
697 void set_work_bit(struct s5p_mfc_ctx *ctx);
698 void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
699 void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
701 #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \
702 (dev->variant->port_num ? 1 : 0) : 0) : 0)
703 #define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
704 #define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
705 #define IS_MFCV7(dev) (dev->variant->version >= 0x70 ? 1 : 0)
707 #endif /* S5P_MFC_COMMON_H_ */