6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
78 #include "isppreview.h"
79 #include "ispresizer.h"
85 static unsigned int autoidle;
86 module_param(autoidle, int, 0444);
87 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
89 static void isp_save_ctx(struct isp_device *isp);
91 static void isp_restore_ctx(struct isp_device *isp);
93 static const struct isp_res_mapping isp_res_maps[] = {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
105 1 << OMAP3_ISP_IOMEM_CSIPHY2,
108 .isp_rev = ISP_REVISION_15_0,
109 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
110 1 << OMAP3_ISP_IOMEM_CCP2 |
111 1 << OMAP3_ISP_IOMEM_CCDC |
112 1 << OMAP3_ISP_IOMEM_HIST |
113 1 << OMAP3_ISP_IOMEM_H3A |
114 1 << OMAP3_ISP_IOMEM_PREV |
115 1 << OMAP3_ISP_IOMEM_RESZ |
116 1 << OMAP3_ISP_IOMEM_SBL |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
118 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
119 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
121 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
122 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
126 /* Structure for saving/restoring ISP module registers */
127 static struct isp_reg isp_reg_list[] = {
128 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
129 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
130 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
135 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
136 * @isp: OMAP3 ISP device
138 * In order to force posting of pending writes, we need to write and
139 * readback the same register, in this case the revision register.
141 * See this link for reference:
142 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
144 void omap3isp_flush(struct isp_device *isp)
146 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
147 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 * isp_enable_interrupts - Enable ISP interrupts.
152 * @isp: OMAP3 ISP device
154 static void isp_enable_interrupts(struct isp_device *isp)
156 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
157 | IRQ0ENABLE_CSIB_IRQ
158 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
159 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
160 | IRQ0ENABLE_CCDC_VD0_IRQ
161 | IRQ0ENABLE_CCDC_VD1_IRQ
162 | IRQ0ENABLE_HS_VS_IRQ
163 | IRQ0ENABLE_HIST_DONE_IRQ
164 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
165 | IRQ0ENABLE_H3A_AF_DONE_IRQ
166 | IRQ0ENABLE_PRV_DONE_IRQ
167 | IRQ0ENABLE_RSZ_DONE_IRQ;
169 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
170 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
174 * isp_disable_interrupts - Disable ISP interrupts.
175 * @isp: OMAP3 ISP device
177 static void isp_disable_interrupts(struct isp_device *isp)
179 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
183 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
184 * @isp: OMAP3 ISP device
185 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
186 * @xclksel: XCLK to configure (0 = A, 1 = B).
188 * Configures the specified MCLK divisor in the ISP timing control register
189 * (TCTRL_CTRL) to generate the desired xclk clock value.
191 * Divisor = cam_mclk_hz / xclk
193 * Returns the final frequency that is actually being generated
195 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
199 unsigned long mclk_hz;
201 if (!omap3isp_get(isp))
204 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
206 if (xclk >= mclk_hz) {
207 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
208 currentxclk = mclk_hz;
209 } else if (xclk >= 2) {
210 divisor = mclk_hz / xclk;
211 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
212 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
213 currentxclk = mclk_hz / divisor;
221 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
222 ISPTCTRL_CTRL_DIVA_MASK,
223 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
224 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
228 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
229 ISPTCTRL_CTRL_DIVB_MASK,
230 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
231 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
237 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
238 "xclk. Must be 0 (A) or 1 (B).\n");
242 /* Do we go from stable whatever to clock? */
243 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
245 /* Stopping the clock. */
246 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
249 isp->xclk_divisor[xclksel - 1] = divisor;
257 * isp_core_init - ISP core settings
258 * @isp: OMAP3 ISP device
259 * @idle: Consider idle state.
261 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
264 * We need to configure the HS/VS interrupt source before interrupts get
265 * enabled, as the sensor might be free-running and the ISP default setting
266 * (HS edge) would put an unnecessary burden on the CPU.
268 static void isp_core_init(struct isp_device *isp, int idle)
271 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
272 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
273 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
274 ((isp->revision == ISP_REVISION_15_0) ?
275 ISP_SYSCONFIG_AUTOIDLE : 0),
276 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
279 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
280 ISPCTRL_SYNC_DETECT_VSRISE,
281 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
285 * Configure the bridge and lane shifter. Valid inputs are
287 * CCDC_INPUT_PARALLEL: Parallel interface
288 * CCDC_INPUT_CSI2A: CSI2a receiver
289 * CCDC_INPUT_CCP2B: CCP2b receiver
290 * CCDC_INPUT_CSI2C: CSI2c receiver
292 * The bridge and lane shifter are configured according to the selected input
293 * and the ISP platform data.
295 void omap3isp_configure_bridge(struct isp_device *isp,
296 enum ccdc_input_entity input,
297 const struct isp_parallel_platform_data *pdata,
298 unsigned int shift, unsigned int bridge)
302 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
303 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
304 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
305 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
306 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
307 ispctrl_val |= bridge;
310 case CCDC_INPUT_PARALLEL:
311 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
312 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
313 shift += pdata->data_lane_shift * 2;
316 case CCDC_INPUT_CSI2A:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
320 case CCDC_INPUT_CCP2B:
321 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
324 case CCDC_INPUT_CSI2C:
325 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
332 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
334 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
337 void omap3isp_hist_dma_done(struct isp_device *isp)
339 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
340 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
341 /* Histogram cannot be enabled in this frame anymore */
342 atomic_set(&isp->isp_hist.buf_err, 1);
343 dev_dbg(isp->dev, "hist: Out of synchronization with "
344 "CCDC. Ignoring next buffer.\n");
348 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
350 static const char *name[] = {
369 "CCDC_LSC_PREFETCH_COMPLETED",
370 "CCDC_LSC_PREFETCH_ERROR",
386 dev_dbg(isp->dev, "ISP IRQ: ");
388 for (i = 0; i < ARRAY_SIZE(name); i++) {
389 if ((1 << i) & irqstatus)
390 printk(KERN_CONT "%s ", name[i]);
392 printk(KERN_CONT "\n");
395 static void isp_isr_sbl(struct isp_device *isp)
397 struct device *dev = isp->dev;
398 struct isp_pipeline *pipe;
402 * Handle shared buffer logic overflows for video buffers.
403 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
405 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
406 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
407 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
410 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
412 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
413 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
418 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
419 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
424 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
425 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
430 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
431 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
436 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
437 | ISPSBL_PCR_RSZ2_WBL_OVF
438 | ISPSBL_PCR_RSZ3_WBL_OVF
439 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
440 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
445 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
446 omap3isp_stat_sbl_overflow(&isp->isp_af);
448 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
449 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
453 * isp_isr - Interrupt Service Routine for Camera ISP module.
454 * @irq: Not used currently.
455 * @_isp: Pointer to the OMAP3 ISP device
457 * Handles the corresponding callback if plugged in.
459 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
460 * IRQ wasn't handled.
462 static irqreturn_t isp_isr(int irq, void *_isp)
464 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
465 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
466 IRQ0STATUS_CCDC_VD0_IRQ |
467 IRQ0STATUS_CCDC_VD1_IRQ |
468 IRQ0STATUS_HS_VS_IRQ;
469 struct isp_device *isp = _isp;
472 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
473 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
477 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
478 omap3isp_csi2_isr(&isp->isp_csi2a);
480 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
481 omap3isp_ccp2_isr(&isp->isp_ccp2);
483 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
484 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
485 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
486 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
487 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
488 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
489 omap3isp_stat_isr_frame_sync(&isp->isp_af);
490 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
493 if (irqstatus & ccdc_events)
494 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
496 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
497 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
498 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
499 omap3isp_preview_isr(&isp->isp_prev);
502 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
503 omap3isp_resizer_isr(&isp->isp_res);
505 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
506 omap3isp_stat_isr(&isp->isp_aewb);
508 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
509 omap3isp_stat_isr(&isp->isp_af);
511 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
512 omap3isp_stat_isr(&isp->isp_hist);
516 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
517 isp_isr_dbg(isp, irqstatus);
523 /* -----------------------------------------------------------------------------
524 * Pipeline power management
526 * Entities must be powered up when part of a pipeline that contains at least
527 * one open video device node.
529 * To achieve this use the entity use_count field to track the number of users.
530 * For entities corresponding to video device nodes the use_count field stores
531 * the users count of the node. For entities corresponding to subdevs the
532 * use_count field stores the total number of users of all video device nodes
535 * The omap3isp_pipeline_pm_use() function must be called in the open() and
536 * close() handlers of video device nodes. It increments or decrements the use
537 * count of all subdev entities in the pipeline.
539 * To react to link management on powered pipelines, the link setup notification
540 * callback updates the use count of all entities in the source and sink sides
545 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
546 * @entity: The entity
548 * Return the total number of users of all video device nodes in the pipeline.
550 static int isp_pipeline_pm_use_count(struct media_entity *entity)
552 struct media_entity_graph graph;
555 media_entity_graph_walk_start(&graph, entity);
557 while ((entity = media_entity_graph_walk_next(&graph))) {
558 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
559 use += entity->use_count;
566 * isp_pipeline_pm_power_one - Apply power change to an entity
567 * @entity: The entity
568 * @change: Use count change
570 * Change the entity use count by @change. If the entity is a subdev update its
571 * power state by calling the core::s_power operation when the use count goes
572 * from 0 to != 0 or from != 0 to 0.
574 * Return 0 on success or a negative error code on failure.
576 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
578 struct v4l2_subdev *subdev;
581 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
582 ? media_entity_to_v4l2_subdev(entity) : NULL;
584 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
585 ret = v4l2_subdev_call(subdev, core, s_power, 1);
586 if (ret < 0 && ret != -ENOIOCTLCMD)
590 entity->use_count += change;
591 WARN_ON(entity->use_count < 0);
593 if (entity->use_count == 0 && change < 0 && subdev != NULL)
594 v4l2_subdev_call(subdev, core, s_power, 0);
600 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
601 * @entity: The entity
602 * @change: Use count change
604 * Walk the pipeline to update the use count and the power state of all non-node
607 * Return 0 on success or a negative error code on failure.
609 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
611 struct media_entity_graph graph;
612 struct media_entity *first = entity;
618 media_entity_graph_walk_start(&graph, entity);
620 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
621 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
622 ret = isp_pipeline_pm_power_one(entity, change);
627 media_entity_graph_walk_start(&graph, first);
629 while ((first = media_entity_graph_walk_next(&graph))
631 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
632 isp_pipeline_pm_power_one(first, -change);
638 * omap3isp_pipeline_pm_use - Update the use count of an entity
639 * @entity: The entity
640 * @use: Use (1) or stop using (0) the entity
642 * Update the use count of all entities in the pipeline and power entities on or
645 * Return 0 on success or a negative error code on failure. Powering entities
646 * off is assumed to never fail. No failure can occur when the use parameter is
649 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
651 int change = use ? 1 : -1;
654 mutex_lock(&entity->parent->graph_mutex);
656 /* Apply use count to node. */
657 entity->use_count += change;
658 WARN_ON(entity->use_count < 0);
660 /* Apply power change to connected non-nodes. */
661 ret = isp_pipeline_pm_power(entity, change);
663 entity->use_count -= change;
665 mutex_unlock(&entity->parent->graph_mutex);
671 * isp_pipeline_link_notify - Link management notification callback
672 * @source: Pad at the start of the link
673 * @sink: Pad at the end of the link
674 * @flags: New link flags that will be applied
676 * React to link management on powered pipelines by updating the use count of
677 * all entities in the source and sink sides of the link. Entities are powered
678 * on or off accordingly.
680 * Return 0 on success or a negative error code on failure. Powering entities
681 * off is assumed to never fail. This function will not fail for disconnection
684 static int isp_pipeline_link_notify(struct media_pad *source,
685 struct media_pad *sink, u32 flags)
687 int source_use = isp_pipeline_pm_use_count(source->entity);
688 int sink_use = isp_pipeline_pm_use_count(sink->entity);
691 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
692 /* Powering off entities is assumed to never fail. */
693 isp_pipeline_pm_power(source->entity, -sink_use);
694 isp_pipeline_pm_power(sink->entity, -source_use);
698 ret = isp_pipeline_pm_power(source->entity, sink_use);
702 ret = isp_pipeline_pm_power(sink->entity, source_use);
704 isp_pipeline_pm_power(source->entity, -sink_use);
709 /* -----------------------------------------------------------------------------
710 * Pipeline stream management
714 * isp_pipeline_enable - Enable streaming on a pipeline
715 * @pipe: ISP pipeline
716 * @mode: Stream mode (single shot or continuous)
718 * Walk the entities chain starting at the pipeline output video node and start
719 * all modules in the chain in the given mode.
721 * Return 0 if successful, or the return value of the failed video::s_stream
722 * operation otherwise.
724 static int isp_pipeline_enable(struct isp_pipeline *pipe,
725 enum isp_pipeline_stream_state mode)
727 struct isp_device *isp = pipe->output->isp;
728 struct media_entity *entity;
729 struct media_pad *pad;
730 struct v4l2_subdev *subdev;
734 /* If the preview engine crashed it might not respond to read/write
735 * operations on the L4 bus. This would result in a bus fault and a
736 * kernel oops. Refuse to start streaming in that case. This check must
737 * be performed before the loop below to avoid starting entities if the
738 * pipeline won't start anyway (those entities would then likely fail to
739 * stop, making the problem worse).
741 if ((pipe->entities & isp->crashed) &
742 (1U << isp->isp_prev.subdev.entity.id))
745 spin_lock_irqsave(&pipe->lock, flags);
746 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
747 spin_unlock_irqrestore(&pipe->lock, flags);
749 pipe->do_propagation = false;
751 entity = &pipe->output->video.entity;
753 pad = &entity->pads[0];
754 if (!(pad->flags & MEDIA_PAD_FL_SINK))
757 pad = media_entity_remote_source(pad);
759 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
762 entity = pad->entity;
763 subdev = media_entity_to_v4l2_subdev(entity);
765 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
766 if (ret < 0 && ret != -ENOIOCTLCMD)
769 if (subdev == &isp->isp_ccdc.subdev) {
770 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
772 v4l2_subdev_call(&isp->isp_af.subdev, video,
774 v4l2_subdev_call(&isp->isp_hist.subdev, video,
776 pipe->do_propagation = true;
783 static int isp_pipeline_wait_resizer(struct isp_device *isp)
785 return omap3isp_resizer_busy(&isp->isp_res);
788 static int isp_pipeline_wait_preview(struct isp_device *isp)
790 return omap3isp_preview_busy(&isp->isp_prev);
793 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
795 return omap3isp_stat_busy(&isp->isp_af)
796 || omap3isp_stat_busy(&isp->isp_aewb)
797 || omap3isp_stat_busy(&isp->isp_hist)
798 || omap3isp_ccdc_busy(&isp->isp_ccdc);
801 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
803 static int isp_pipeline_wait(struct isp_device *isp,
804 int(*busy)(struct isp_device *isp))
806 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
808 while (!time_after(jiffies, timeout)) {
817 * isp_pipeline_disable - Disable streaming on a pipeline
818 * @pipe: ISP pipeline
820 * Walk the entities chain starting at the pipeline output video node and stop
821 * all modules in the chain. Wait synchronously for the modules to be stopped if
824 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
825 * can't be stopped (in which case a software reset of the ISP is probably
828 static int isp_pipeline_disable(struct isp_pipeline *pipe)
830 struct isp_device *isp = pipe->output->isp;
831 struct media_entity *entity;
832 struct media_pad *pad;
833 struct v4l2_subdev *subdev;
838 * We need to stop all the modules after CCDC first or they'll
839 * never stop since they may not get a full frame from CCDC.
841 entity = &pipe->output->video.entity;
843 pad = &entity->pads[0];
844 if (!(pad->flags & MEDIA_PAD_FL_SINK))
847 pad = media_entity_remote_source(pad);
849 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
852 entity = pad->entity;
853 subdev = media_entity_to_v4l2_subdev(entity);
855 if (subdev == &isp->isp_ccdc.subdev) {
856 v4l2_subdev_call(&isp->isp_aewb.subdev,
858 v4l2_subdev_call(&isp->isp_af.subdev,
860 v4l2_subdev_call(&isp->isp_hist.subdev,
864 v4l2_subdev_call(subdev, video, s_stream, 0);
866 if (subdev == &isp->isp_res.subdev)
867 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
868 else if (subdev == &isp->isp_prev.subdev)
869 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
870 else if (subdev == &isp->isp_ccdc.subdev)
871 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
876 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
877 /* If the entity failed to stopped, assume it has
878 * crashed. Mark it as such, the ISP will be reset when
879 * applications will release it.
881 isp->crashed |= 1U << subdev->entity.id;
882 failure = -ETIMEDOUT;
890 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
891 * @pipe: ISP pipeline
892 * @state: Stream state (stopped, single shot or continuous)
894 * Set the pipeline to the given stream state. Pipelines can be started in
895 * single-shot or continuous mode.
897 * Return 0 if successful, or the return value of the failed video::s_stream
898 * operation otherwise. The pipeline state is not updated when the operation
899 * fails, except when stopping the pipeline.
901 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
902 enum isp_pipeline_stream_state state)
906 if (state == ISP_PIPELINE_STREAM_STOPPED)
907 ret = isp_pipeline_disable(pipe);
909 ret = isp_pipeline_enable(pipe, state);
911 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
912 pipe->stream_state = state;
918 * isp_pipeline_resume - Resume streaming on a pipeline
919 * @pipe: ISP pipeline
921 * Resume video output and input and re-enable pipeline.
923 static void isp_pipeline_resume(struct isp_pipeline *pipe)
925 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
927 omap3isp_video_resume(pipe->output, !singleshot);
929 omap3isp_video_resume(pipe->input, 0);
930 isp_pipeline_enable(pipe, pipe->stream_state);
934 * isp_pipeline_suspend - Suspend streaming on a pipeline
935 * @pipe: ISP pipeline
939 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
941 isp_pipeline_disable(pipe);
945 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
947 * @me: ISP module's media entity
949 * Returns 1 if the entity has an enabled link to the output video node or 0
950 * otherwise. It's true only while pipeline can have no more than one output
953 static int isp_pipeline_is_last(struct media_entity *me)
955 struct isp_pipeline *pipe;
956 struct media_pad *pad;
960 pipe = to_isp_pipeline(me);
961 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
963 pad = media_entity_remote_source(&pipe->output->pad);
964 return pad->entity == me;
968 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
969 * @me: ISP module's media entity
971 * Suspend the whole pipeline if module's entity has an enabled link to the
972 * output video node. It works only while pipeline can have no more than one
975 static void isp_suspend_module_pipeline(struct media_entity *me)
977 if (isp_pipeline_is_last(me))
978 isp_pipeline_suspend(to_isp_pipeline(me));
982 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
983 * @me: ISP module's media entity
985 * Resume the whole pipeline if module's entity has an enabled link to the
986 * output video node. It works only while pipeline can have no more than one
989 static void isp_resume_module_pipeline(struct media_entity *me)
991 if (isp_pipeline_is_last(me))
992 isp_pipeline_resume(to_isp_pipeline(me));
996 * isp_suspend_modules - Suspend ISP submodules.
997 * @isp: OMAP3 ISP device
999 * Returns 0 if suspend left in idle state all the submodules properly,
1000 * or returns 1 if a general Reset is required to suspend the submodules.
1002 static int isp_suspend_modules(struct isp_device *isp)
1004 unsigned long timeout;
1006 omap3isp_stat_suspend(&isp->isp_aewb);
1007 omap3isp_stat_suspend(&isp->isp_af);
1008 omap3isp_stat_suspend(&isp->isp_hist);
1009 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1010 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1011 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1012 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1015 timeout = jiffies + ISP_STOP_TIMEOUT;
1016 while (omap3isp_stat_busy(&isp->isp_af)
1017 || omap3isp_stat_busy(&isp->isp_aewb)
1018 || omap3isp_stat_busy(&isp->isp_hist)
1019 || omap3isp_preview_busy(&isp->isp_prev)
1020 || omap3isp_resizer_busy(&isp->isp_res)
1021 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1022 if (time_after(jiffies, timeout)) {
1023 dev_info(isp->dev, "can't stop modules.\n");
1033 * isp_resume_modules - Resume ISP submodules.
1034 * @isp: OMAP3 ISP device
1036 static void isp_resume_modules(struct isp_device *isp)
1038 omap3isp_stat_resume(&isp->isp_aewb);
1039 omap3isp_stat_resume(&isp->isp_af);
1040 omap3isp_stat_resume(&isp->isp_hist);
1041 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1042 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1043 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1044 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1049 * isp_reset - Reset ISP with a timeout wait for idle.
1050 * @isp: OMAP3 ISP device
1052 static int isp_reset(struct isp_device *isp)
1054 unsigned long timeout = 0;
1057 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1058 | ISP_SYSCONFIG_SOFTRESET,
1059 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1060 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1061 ISP_SYSSTATUS) & 0x1)) {
1062 if (timeout++ > 10000) {
1063 dev_alert(isp->dev, "cannot reset ISP\n");
1074 * isp_save_context - Saves the values of the ISP module registers.
1075 * @isp: OMAP3 ISP device
1076 * @reg_list: Structure containing pairs of register address and value to
1080 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1082 struct isp_reg *next = reg_list;
1084 for (; next->reg != ISP_TOK_TERM; next++)
1085 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1089 * isp_restore_context - Restores the values of the ISP module registers.
1090 * @isp: OMAP3 ISP device
1091 * @reg_list: Structure containing pairs of register address and value to
1095 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1097 struct isp_reg *next = reg_list;
1099 for (; next->reg != ISP_TOK_TERM; next++)
1100 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1104 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1105 * @isp: OMAP3 ISP device
1107 * Routine for saving the context of each module in the ISP.
1108 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1110 static void isp_save_ctx(struct isp_device *isp)
1112 isp_save_context(isp, isp_reg_list);
1113 omap_iommu_save_ctx(isp->dev);
1117 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1118 * @isp: OMAP3 ISP device
1120 * Routine for restoring the context of each module in the ISP.
1121 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1123 static void isp_restore_ctx(struct isp_device *isp)
1125 isp_restore_context(isp, isp_reg_list);
1126 omap_iommu_restore_ctx(isp->dev);
1127 omap3isp_ccdc_restore_context(isp);
1128 omap3isp_preview_restore_context(isp);
1131 /* -----------------------------------------------------------------------------
1132 * SBL resources management
1134 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1135 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1136 OMAP3_ISP_SBL_PREVIEW_READ | \
1137 OMAP3_ISP_SBL_RESIZER_READ)
1138 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1139 OMAP3_ISP_SBL_CSI2A_WRITE | \
1140 OMAP3_ISP_SBL_CSI2C_WRITE | \
1141 OMAP3_ISP_SBL_CCDC_WRITE | \
1142 OMAP3_ISP_SBL_PREVIEW_WRITE)
1144 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1148 isp->sbl_resources |= res;
1150 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1151 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1153 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1154 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1156 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1157 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1159 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1160 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1162 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1163 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1165 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1166 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1168 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1171 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1175 isp->sbl_resources &= ~res;
1177 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1178 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1180 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1181 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1184 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1187 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1190 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1192 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1193 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1195 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1199 * isp_module_sync_idle - Helper to sync module with its idle state
1200 * @me: ISP submodule's media entity
1201 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1202 * @stopping: flag which tells module wants to stop
1204 * This function checks if ISP submodule needs to wait for next interrupt. If
1205 * yes, makes the caller to sleep while waiting for such event.
1207 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1210 struct isp_pipeline *pipe = to_isp_pipeline(me);
1212 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1213 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1214 !isp_pipeline_ready(pipe)))
1218 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1219 * scenario. We'll call it here to avoid race conditions.
1221 atomic_set(stopping, 1);
1225 * If module is the last one, it's writing to memory. In this case,
1226 * it's necessary to check if the module is already paused due to
1227 * DMA queue underrun or if it has to wait for next interrupt to be
1229 * If it isn't the last one, the function won't sleep but *stopping
1230 * will still be set to warn next submodule caller's interrupt the
1231 * module wants to be idle.
1233 if (isp_pipeline_is_last(me)) {
1234 struct isp_video *video = pipe->output;
1235 unsigned long flags;
1236 spin_lock_irqsave(&video->queue->irqlock, flags);
1237 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1238 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1239 atomic_set(stopping, 0);
1243 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1244 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1245 msecs_to_jiffies(1000))) {
1246 atomic_set(stopping, 0);
1256 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1257 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1258 * @stopping: flag which tells module wants to stop
1260 * This function checks if ISP submodule was stopping. In case of yes, it
1261 * notices the caller by setting stopping to 0 and waking up the wait queue.
1262 * Returns 1 if it was stopping or 0 otherwise.
1264 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1267 if (atomic_cmpxchg(stopping, 1, 0)) {
1275 /* --------------------------------------------------------------------------
1279 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1280 ISPCTRL_HIST_CLK_EN | \
1281 ISPCTRL_RSZ_CLK_EN | \
1282 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1283 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1285 static void __isp_subclk_update(struct isp_device *isp)
1289 /* AEWB and AF share the same clock. */
1290 if (isp->subclk_resources &
1291 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1292 clk |= ISPCTRL_H3A_CLK_EN;
1294 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1295 clk |= ISPCTRL_HIST_CLK_EN;
1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1298 clk |= ISPCTRL_RSZ_CLK_EN;
1300 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1304 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1306 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1307 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1309 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1310 ISPCTRL_CLKS_MASK, clk);
1313 void omap3isp_subclk_enable(struct isp_device *isp,
1314 enum isp_subclk_resource res)
1316 isp->subclk_resources |= res;
1318 __isp_subclk_update(isp);
1321 void omap3isp_subclk_disable(struct isp_device *isp,
1322 enum isp_subclk_resource res)
1324 isp->subclk_resources &= ~res;
1326 __isp_subclk_update(isp);
1330 * isp_enable_clocks - Enable ISP clocks
1331 * @isp: OMAP3 ISP device
1333 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1335 static int isp_enable_clocks(struct isp_device *isp)
1342 * cam_mclk clock chain:
1343 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1345 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1346 * set to the same value. Hence the rate set for dpll4_m5
1347 * has to be twice of what is set on OMAP3430 to get
1348 * the required value for cam_mclk
1350 if (cpu_is_omap3630())
1355 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1357 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1358 goto out_clk_enable_ick;
1360 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1361 CM_CAM_MCLK_HZ/divisor);
1363 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1364 goto out_clk_enable_mclk;
1366 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1368 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1369 goto out_clk_enable_mclk;
1371 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1372 if (rate != CM_CAM_MCLK_HZ)
1373 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1375 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1376 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1378 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1379 goto out_clk_enable_csi2_fclk;
1383 out_clk_enable_csi2_fclk:
1384 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1385 out_clk_enable_mclk:
1386 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1392 * isp_disable_clocks - Disable ISP clocks
1393 * @isp: OMAP3 ISP device
1395 static void isp_disable_clocks(struct isp_device *isp)
1397 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1398 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1399 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1402 static const char *isp_clocks[] = {
1410 static void isp_put_clocks(struct isp_device *isp)
1414 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1415 if (isp->clock[i]) {
1416 clk_put(isp->clock[i]);
1417 isp->clock[i] = NULL;
1422 static int isp_get_clocks(struct isp_device *isp)
1427 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1428 clk = clk_get(isp->dev, isp_clocks[i]);
1430 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1431 isp_put_clocks(isp);
1432 return PTR_ERR(clk);
1435 isp->clock[i] = clk;
1442 * omap3isp_get - Acquire the ISP resource.
1444 * Initializes the clocks for the first acquire.
1446 * Increment the reference count on the ISP. If the first reference is taken,
1447 * enable clocks and power-up all submodules.
1449 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1451 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1453 struct isp_device *__isp = isp;
1458 mutex_lock(&isp->isp_mutex);
1459 if (isp->ref_count > 0)
1462 if (isp_enable_clocks(isp) < 0) {
1467 /* We don't want to restore context before saving it! */
1468 if (isp->has_context)
1469 isp_restore_ctx(isp);
1472 isp_enable_interrupts(isp);
1477 mutex_unlock(&isp->isp_mutex);
1482 struct isp_device *omap3isp_get(struct isp_device *isp)
1484 return __omap3isp_get(isp, true);
1488 * omap3isp_put - Release the ISP
1490 * Decrement the reference count on the ISP. If the last reference is released,
1491 * power-down all submodules, disable clocks and free temporary buffers.
1493 void omap3isp_put(struct isp_device *isp)
1498 mutex_lock(&isp->isp_mutex);
1499 BUG_ON(isp->ref_count == 0);
1500 if (--isp->ref_count == 0) {
1501 isp_disable_interrupts(isp);
1504 isp->has_context = 1;
1506 /* Reset the ISP if an entity has failed to stop. This is the
1507 * only way to recover from such conditions.
1511 isp_disable_clocks(isp);
1513 mutex_unlock(&isp->isp_mutex);
1516 /* --------------------------------------------------------------------------
1517 * Platform device driver
1521 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1522 * @isp: OMAP3 ISP device
1524 #define ISP_PRINT_REGISTER(isp, name)\
1525 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1526 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1527 #define SBL_PRINT_REGISTER(isp, name)\
1528 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1529 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1531 void omap3isp_print_status(struct isp_device *isp)
1533 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1535 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1536 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1537 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1538 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1539 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1541 ISP_PRINT_REGISTER(isp, CTRL);
1542 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1543 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1544 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1545 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1548 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1549 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1551 SBL_PRINT_REGISTER(isp, PCR);
1552 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1554 dev_dbg(isp->dev, "--------------------------------------------\n");
1560 * Power management support.
1562 * As the ISP can't properly handle an input video stream interruption on a non
1563 * frame boundary, the ISP pipelines need to be stopped before sensors get
1564 * suspended. However, as suspending the sensors can require a running clock,
1565 * which can be provided by the ISP, the ISP can't be completely suspended
1566 * before the sensor.
1568 * To solve this problem power management support is split into prepare/complete
1569 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1570 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1571 * resume(), and the the pipelines are restarted in complete().
1573 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1576 static int isp_pm_prepare(struct device *dev)
1578 struct isp_device *isp = dev_get_drvdata(dev);
1581 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1583 if (isp->ref_count == 0)
1586 reset = isp_suspend_modules(isp);
1587 isp_disable_interrupts(isp);
1595 static int isp_pm_suspend(struct device *dev)
1597 struct isp_device *isp = dev_get_drvdata(dev);
1599 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1602 isp_disable_clocks(isp);
1607 static int isp_pm_resume(struct device *dev)
1609 struct isp_device *isp = dev_get_drvdata(dev);
1611 if (isp->ref_count == 0)
1614 return isp_enable_clocks(isp);
1617 static void isp_pm_complete(struct device *dev)
1619 struct isp_device *isp = dev_get_drvdata(dev);
1621 if (isp->ref_count == 0)
1624 isp_restore_ctx(isp);
1625 isp_enable_interrupts(isp);
1626 isp_resume_modules(isp);
1631 #define isp_pm_prepare NULL
1632 #define isp_pm_suspend NULL
1633 #define isp_pm_resume NULL
1634 #define isp_pm_complete NULL
1636 #endif /* CONFIG_PM */
1638 static void isp_unregister_entities(struct isp_device *isp)
1640 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1641 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1642 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1643 omap3isp_preview_unregister_entities(&isp->isp_prev);
1644 omap3isp_resizer_unregister_entities(&isp->isp_res);
1645 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1646 omap3isp_stat_unregister_entities(&isp->isp_af);
1647 omap3isp_stat_unregister_entities(&isp->isp_hist);
1649 v4l2_device_unregister(&isp->v4l2_dev);
1650 media_device_unregister(&isp->media_dev);
1654 * isp_register_subdev_group - Register a group of subdevices
1655 * @isp: OMAP3 ISP device
1656 * @board_info: I2C subdevs board information array
1658 * Register all I2C subdevices in the board_info array. The array must be
1659 * terminated by a NULL entry, and the first entry must be the sensor.
1661 * Return a pointer to the sensor media entity if it has been successfully
1662 * registered, or NULL otherwise.
1664 static struct v4l2_subdev *
1665 isp_register_subdev_group(struct isp_device *isp,
1666 struct isp_subdev_i2c_board_info *board_info)
1668 struct v4l2_subdev *sensor = NULL;
1671 if (board_info->board_info == NULL)
1674 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1675 struct v4l2_subdev *subdev;
1676 struct i2c_adapter *adapter;
1678 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1679 if (adapter == NULL) {
1680 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1681 "device %s\n", __func__,
1682 board_info->i2c_adapter_id,
1683 board_info->board_info->type);
1687 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1688 board_info->board_info, NULL);
1689 if (subdev == NULL) {
1690 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1691 __func__, board_info->board_info->type);
1702 static int isp_register_entities(struct isp_device *isp)
1704 struct isp_platform_data *pdata = isp->pdata;
1705 struct isp_v4l2_subdevs_group *subdevs;
1708 isp->media_dev.dev = isp->dev;
1709 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1710 sizeof(isp->media_dev.model));
1711 isp->media_dev.hw_revision = isp->revision;
1712 isp->media_dev.link_notify = isp_pipeline_link_notify;
1713 ret = media_device_register(&isp->media_dev);
1715 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1720 isp->v4l2_dev.mdev = &isp->media_dev;
1721 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1723 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1728 /* Register internal entities */
1729 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1733 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1737 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1741 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1746 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1750 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1754 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1758 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1762 /* Register external entities */
1763 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1764 struct v4l2_subdev *sensor;
1765 struct media_entity *input;
1769 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1773 sensor->host_priv = subdevs;
1775 /* Connect the sensor to the correct interface module. Parallel
1776 * sensors are connected directly to the CCDC, while serial
1777 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1778 * through CSIPHY1 or CSIPHY2.
1780 switch (subdevs->interface) {
1781 case ISP_INTERFACE_PARALLEL:
1782 input = &isp->isp_ccdc.subdev.entity;
1783 pad = CCDC_PAD_SINK;
1787 case ISP_INTERFACE_CSI2A_PHY2:
1788 input = &isp->isp_csi2a.subdev.entity;
1789 pad = CSI2_PAD_SINK;
1790 flags = MEDIA_LNK_FL_IMMUTABLE
1791 | MEDIA_LNK_FL_ENABLED;
1794 case ISP_INTERFACE_CCP2B_PHY1:
1795 case ISP_INTERFACE_CCP2B_PHY2:
1796 input = &isp->isp_ccp2.subdev.entity;
1797 pad = CCP2_PAD_SINK;
1801 case ISP_INTERFACE_CSI2C_PHY1:
1802 input = &isp->isp_csi2c.subdev.entity;
1803 pad = CSI2_PAD_SINK;
1804 flags = MEDIA_LNK_FL_IMMUTABLE
1805 | MEDIA_LNK_FL_ENABLED;
1809 printk(KERN_ERR "%s: invalid interface type %u\n",
1810 __func__, subdevs->interface);
1815 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1821 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1825 isp_unregister_entities(isp);
1830 static void isp_cleanup_modules(struct isp_device *isp)
1832 omap3isp_h3a_aewb_cleanup(isp);
1833 omap3isp_h3a_af_cleanup(isp);
1834 omap3isp_hist_cleanup(isp);
1835 omap3isp_resizer_cleanup(isp);
1836 omap3isp_preview_cleanup(isp);
1837 omap3isp_ccdc_cleanup(isp);
1838 omap3isp_ccp2_cleanup(isp);
1839 omap3isp_csi2_cleanup(isp);
1842 static int isp_initialize_modules(struct isp_device *isp)
1846 ret = omap3isp_csiphy_init(isp);
1848 dev_err(isp->dev, "CSI PHY initialization failed\n");
1852 ret = omap3isp_csi2_init(isp);
1854 dev_err(isp->dev, "CSI2 initialization failed\n");
1858 ret = omap3isp_ccp2_init(isp);
1860 dev_err(isp->dev, "CCP2 initialization failed\n");
1864 ret = omap3isp_ccdc_init(isp);
1866 dev_err(isp->dev, "CCDC initialization failed\n");
1870 ret = omap3isp_preview_init(isp);
1872 dev_err(isp->dev, "Preview initialization failed\n");
1876 ret = omap3isp_resizer_init(isp);
1878 dev_err(isp->dev, "Resizer initialization failed\n");
1882 ret = omap3isp_hist_init(isp);
1884 dev_err(isp->dev, "Histogram initialization failed\n");
1888 ret = omap3isp_h3a_aewb_init(isp);
1890 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1891 goto error_h3a_aewb;
1894 ret = omap3isp_h3a_af_init(isp);
1896 dev_err(isp->dev, "H3A AF initialization failed\n");
1900 /* Connect the submodules. */
1901 ret = media_entity_create_link(
1902 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1903 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1907 ret = media_entity_create_link(
1908 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1913 ret = media_entity_create_link(
1914 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1915 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1919 ret = media_entity_create_link(
1920 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1921 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1925 ret = media_entity_create_link(
1926 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1927 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1931 ret = media_entity_create_link(
1932 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1933 &isp->isp_aewb.subdev.entity, 0,
1934 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1938 ret = media_entity_create_link(
1939 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1940 &isp->isp_af.subdev.entity, 0,
1941 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1945 ret = media_entity_create_link(
1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1947 &isp->isp_hist.subdev.entity, 0,
1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1955 omap3isp_h3a_af_cleanup(isp);
1957 omap3isp_h3a_aewb_cleanup(isp);
1959 omap3isp_hist_cleanup(isp);
1961 omap3isp_resizer_cleanup(isp);
1963 omap3isp_preview_cleanup(isp);
1965 omap3isp_ccdc_cleanup(isp);
1967 omap3isp_ccp2_cleanup(isp);
1969 omap3isp_csi2_cleanup(isp);
1976 * isp_remove - Remove ISP platform device
1977 * @pdev: Pointer to ISP platform device
1981 static int __devexit isp_remove(struct platform_device *pdev)
1983 struct isp_device *isp = platform_get_drvdata(pdev);
1986 isp_unregister_entities(isp);
1987 isp_cleanup_modules(isp);
1989 __omap3isp_get(isp, false);
1990 iommu_detach_device(isp->domain, &pdev->dev);
1991 iommu_domain_free(isp->domain);
1995 free_irq(isp->irq_num, isp);
1996 isp_put_clocks(isp);
1998 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1999 if (isp->mmio_base[i]) {
2000 iounmap(isp->mmio_base[i]);
2001 isp->mmio_base[i] = NULL;
2004 if (isp->mmio_base_phys[i]) {
2005 release_mem_region(isp->mmio_base_phys[i],
2007 isp->mmio_base_phys[i] = 0;
2011 regulator_put(isp->isp_csiphy1.vdd);
2012 regulator_put(isp->isp_csiphy2.vdd);
2018 static int isp_map_mem_resource(struct platform_device *pdev,
2019 struct isp_device *isp,
2020 enum isp_mem_resources res)
2022 struct resource *mem;
2024 /* request the mem region for the camera registers */
2026 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2028 dev_err(isp->dev, "no mem resource?\n");
2032 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2034 "cannot reserve camera register I/O region\n");
2037 isp->mmio_base_phys[res] = mem->start;
2038 isp->mmio_size[res] = resource_size(mem);
2040 /* map the region */
2041 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2042 isp->mmio_size[res]);
2043 if (!isp->mmio_base[res]) {
2044 dev_err(isp->dev, "cannot map camera register I/O region\n");
2052 * isp_probe - Probe ISP platform device
2053 * @pdev: Pointer to ISP platform device
2055 * Returns 0 if successful,
2056 * -ENOMEM if no memory available,
2057 * -ENODEV if no platform device resources found
2058 * or no space for remapping registers,
2059 * -EINVAL if couldn't install ISR,
2060 * or clk_get return error value.
2062 static int __devinit isp_probe(struct platform_device *pdev)
2064 struct isp_platform_data *pdata = pdev->dev.platform_data;
2065 struct isp_device *isp;
2072 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2074 dev_err(&pdev->dev, "could not allocate memory\n");
2078 isp->autoidle = autoidle;
2079 isp->platform_cb.set_xclk = isp_set_xclk;
2081 mutex_init(&isp->isp_mutex);
2082 spin_lock_init(&isp->stat_lock);
2084 isp->dev = &pdev->dev;
2088 isp->raw_dmamask = DMA_BIT_MASK(32);
2089 isp->dev->dma_mask = &isp->raw_dmamask;
2090 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2092 platform_set_drvdata(pdev, isp);
2095 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2096 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2099 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2103 ret = isp_get_clocks(isp);
2107 if (__omap3isp_get(isp, false) == NULL) {
2112 ret = isp_reset(isp);
2116 /* Memory resources */
2117 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2118 dev_info(isp->dev, "Revision %d.%d found\n",
2119 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2121 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2122 if (isp->revision == isp_res_maps[m].isp_rev)
2125 if (m == ARRAY_SIZE(isp_res_maps)) {
2126 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2127 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2132 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2133 if (isp_res_maps[m].map & 1 << i) {
2134 ret = isp_map_mem_resource(pdev, isp, i);
2140 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2142 dev_err(isp->dev, "can't alloc iommu domain\n");
2147 ret = iommu_attach_device(isp->domain, &pdev->dev);
2149 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2154 isp->irq_num = platform_get_irq(pdev, 0);
2155 if (isp->irq_num <= 0) {
2156 dev_err(isp->dev, "No IRQ resource\n");
2161 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2162 dev_err(isp->dev, "Unable to request IRQ\n");
2168 ret = isp_initialize_modules(isp);
2172 ret = isp_register_entities(isp);
2176 isp_core_init(isp, 1);
2182 isp_cleanup_modules(isp);
2184 free_irq(isp->irq_num, isp);
2186 iommu_detach_device(isp->domain, &pdev->dev);
2188 iommu_domain_free(isp->domain);
2192 isp_put_clocks(isp);
2194 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2195 if (isp->mmio_base[i]) {
2196 iounmap(isp->mmio_base[i]);
2197 isp->mmio_base[i] = NULL;
2200 if (isp->mmio_base_phys[i]) {
2201 release_mem_region(isp->mmio_base_phys[i],
2203 isp->mmio_base_phys[i] = 0;
2206 regulator_put(isp->isp_csiphy2.vdd);
2207 regulator_put(isp->isp_csiphy1.vdd);
2208 platform_set_drvdata(pdev, NULL);
2210 mutex_destroy(&isp->isp_mutex);
2216 static const struct dev_pm_ops omap3isp_pm_ops = {
2217 .prepare = isp_pm_prepare,
2218 .suspend = isp_pm_suspend,
2219 .resume = isp_pm_resume,
2220 .complete = isp_pm_complete,
2223 static struct platform_device_id omap3isp_id_table[] = {
2227 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2229 static struct platform_driver omap3isp_driver = {
2231 .remove = __devexit_p(isp_remove),
2232 .id_table = omap3isp_id_table,
2234 .owner = THIS_MODULE,
2236 .pm = &omap3isp_pm_ops,
2240 module_platform_driver(omap3isp_driver);
2242 MODULE_AUTHOR("Nokia Corporation");
2243 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2244 MODULE_LICENSE("GPL");
2245 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);