Pileus Git - ~andy/linux/blob - drivers/media/platform/davinci/vpif.c

   1 /*
   2  * vpif - Video Port Interface driver
   3  * VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
   4  * that receiveing video byte stream and two channels(2, 3) for video output.
   5  * The hardware supports SDTV, HDTV formats, raw data capture.
   6  * Currently, the driver supports NTSC and PAL standards.
   7  *
   8  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation version 2.
  13  *
  14  * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  15  * kind, whether express or implied; without even the implied warranty
  16  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/spinlock.h>
  24 #include <linux/kernel.h>
  25 #include <linux/io.h>
  26 #include <linux/err.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/v4l2-dv-timings.h>
  29
  30 #include <mach/hardware.h>
  31
  32 #include "vpif.h"
  33
  34 MODULE_DESCRIPTION("TI DaVinci Video Port Interface driver");
  35 MODULE_LICENSE("GPL");
  36
  37 #define VPIF_CH0_MAX_MODES      (22)
  38 #define VPIF_CH1_MAX_MODES      (02)
  39 #define VPIF_CH2_MAX_MODES      (15)
  40 #define VPIF_CH3_MAX_MODES      (02)
  41
  42 static resource_size_t  res_len;
  43 static struct resource  *res;
  44 spinlock_t vpif_lock;
  45
  46 void __iomem *vpif_base;
  47 EXPORT_SYMBOL_GPL(vpif_base);
  48
  49 /**
  50  * vpif_ch_params: video standard configuration parameters for vpif
  51  * The table must include all presets from supported subdevices.
  52  */
  53 const struct vpif_channel_config_params vpif_ch_params[] = {
  54         /* HDTV formats */
  55         {
  56                 .name = "480p59_94",
  57                 .width = 720,
  58                 .height = 480,
  59                 .frm_fmt = 1,
  60                 .ycmux_mode = 0,
  61                 .eav2sav = 138-8,
  62                 .sav2eav = 720,
  63                 .l1 = 1,
  64                 .l3 = 43,
  65                 .l5 = 523,
  66                 .vsize = 525,
  67                 .capture_format = 0,
  68                 .vbi_supported = 0,
  69                 .hd_sd = 1,
  70                 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
  71         },
  72         {
  73                 .name = "576p50",
  74                 .width = 720,
  75                 .height = 576,
  76                 .frm_fmt = 1,
  77                 .ycmux_mode = 0,
  78                 .eav2sav = 144-8,
  79                 .sav2eav = 720,
  80                 .l1 = 1,
  81                 .l3 = 45,
  82                 .l5 = 621,
  83                 .vsize = 625,
  84                 .capture_format = 0,
  85                 .vbi_supported = 0,
  86                 .hd_sd = 1,
  87                 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
  88         },
  89         {
  90                 .name = "720p50",
  91                 .width = 1280,
  92                 .height = 720,
  93                 .frm_fmt = 1,
  94                 .ycmux_mode = 0,
  95                 .eav2sav = 700-8,
  96                 .sav2eav = 1280,
  97                 .l1 = 1,
  98                 .l3 = 26,
  99                 .l5 = 746,
 100                 .vsize = 750,
 101                 .capture_format = 0,
 102                 .vbi_supported = 0,
 103                 .hd_sd = 1,
 104                 .dv_timings = V4L2_DV_BT_CEA_1280X720P50,
 105         },
 106         {
 107                 .name = "720p60",
 108                 .width = 1280,
 109                 .height = 720,
 110                 .frm_fmt = 1,
 111                 .ycmux_mode = 0,
 112                 .eav2sav = 370 - 8,
 113                 .sav2eav = 1280,
 114                 .l1 = 1,
 115                 .l3 = 26,
 116                 .l5 = 746,
 117                 .vsize = 750,
 118                 .capture_format = 0,
 119                 .vbi_supported = 0,
 120                 .hd_sd = 1,
 121                 .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
 122         },
 123         {
 124                 .name = "1080I50",
 125                 .width = 1920,
 126                 .height = 1080,
 127                 .frm_fmt = 0,
 128                 .ycmux_mode = 0,
 129                 .eav2sav = 720 - 8,
 130                 .sav2eav = 1920,
 131                 .l1 = 1,
 132                 .l3 = 21,
 133                 .l5 = 561,
 134                 .l7 = 563,
 135                 .l9 = 584,
 136                 .l11 = 1124,
 137                 .vsize = 1125,
 138                 .capture_format = 0,
 139                 .vbi_supported = 0,
 140                 .hd_sd = 1,
 141                 .dv_timings = V4L2_DV_BT_CEA_1920X1080I50,
 142         },
 143         {
 144                 .name = "1080I60",
 145                 .width = 1920,
 146                 .height = 1080,
 147                 .frm_fmt = 0,
 148                 .ycmux_mode = 0,
 149                 .eav2sav = 280 - 8,
 150                 .sav2eav = 1920,
 151                 .l1 = 1,
 152                 .l3 = 21,
 153                 .l5 = 561,
 154                 .l7 = 563,
 155                 .l9 = 584,
 156                 .l11 = 1124,
 157                 .vsize = 1125,
 158                 .capture_format = 0,
 159                 .vbi_supported = 0,
 160                 .hd_sd = 1,
 161                 .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
 162         },
 163         {
 164                 .name = "1080p60",
 165                 .width = 1920,
 166                 .height = 1080,
 167                 .frm_fmt = 1,
 168                 .ycmux_mode = 0,
 169                 .eav2sav = 280 - 8,
 170                 .sav2eav = 1920,
 171                 .l1 = 1,
 172                 .l3 = 42,
 173                 .l5 = 1122,
 174                 .vsize = 1125,
 175                 .capture_format = 0,
 176                 .vbi_supported = 0,
 177                 .hd_sd = 1,
 178                 .dv_timings = V4L2_DV_BT_CEA_1920X1080P60,
 179         },
 180
 181         /* SDTV formats */
 182         {
 183                 .name = "NTSC_M",
 184                 .width = 720,
 185                 .height = 480,
 186                 .frm_fmt = 0,
 187                 .ycmux_mode = 1,
 188                 .eav2sav = 268,
 189                 .sav2eav = 1440,
 190                 .l1 = 1,
 191                 .l3 = 23,
 192                 .l5 = 263,
 193                 .l7 = 266,
 194                 .l9 = 286,
 195                 .l11 = 525,
 196                 .vsize = 525,
 197                 .capture_format = 0,
 198                 .vbi_supported = 1,
 199                 .hd_sd = 0,
 200                 .stdid = V4L2_STD_525_60,
 201         },
 202         {
 203                 .name = "PAL_BDGHIK",
 204                 .width = 720,
 205                 .height = 576,
 206                 .frm_fmt = 0,
 207                 .ycmux_mode = 1,
 208                 .eav2sav = 280,
 209                 .sav2eav = 1440,
 210                 .l1 = 1,
 211                 .l3 = 23,
 212                 .l5 = 311,
 213                 .l7 = 313,
 214                 .l9 = 336,
 215                 .l11 = 624,
 216                 .vsize = 625,
 217                 .capture_format = 0,
 218                 .vbi_supported = 1,
 219                 .hd_sd = 0,
 220                 .stdid = V4L2_STD_625_50,
 221         },
 222 };
 223 EXPORT_SYMBOL_GPL(vpif_ch_params);
 224
 225 const unsigned int vpif_ch_params_count = ARRAY_SIZE(vpif_ch_params);
 226 EXPORT_SYMBOL_GPL(vpif_ch_params_count);
 227
 228 static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
 229 {
 230         if (val)
 231                 vpif_set_bit(reg, bit);
 232         else
 233                 vpif_clr_bit(reg, bit);
 234 }
 235
 236 /* This structure is used to keep track of VPIF size register's offsets */
 237 struct vpif_registers {
 238         u32 h_cfg, v_cfg_00, v_cfg_01, v_cfg_02, v_cfg, ch_ctrl;
 239         u32 line_offset, vanc0_strt, vanc0_size, vanc1_strt;
 240         u32 vanc1_size, width_mask, len_mask;
 241         u8 max_modes;
 242 };
 243
 244 static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {
 245         /* Channel0 */
 246         {
 247                 VPIF_CH0_H_CFG, VPIF_CH0_V_CFG_00, VPIF_CH0_V_CFG_01,
 248                 VPIF_CH0_V_CFG_02, VPIF_CH0_V_CFG_03, VPIF_CH0_CTRL,
 249                 VPIF_CH0_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
 250                 VPIF_CH0_MAX_MODES,
 251         },
 252         /* Channel1 */
 253         {
 254                 VPIF_CH1_H_CFG, VPIF_CH1_V_CFG_00, VPIF_CH1_V_CFG_01,
 255                 VPIF_CH1_V_CFG_02, VPIF_CH1_V_CFG_03, VPIF_CH1_CTRL,
 256                 VPIF_CH1_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
 257                 VPIF_CH1_MAX_MODES,
 258         },
 259         /* Channel2 */
 260         {
 261                 VPIF_CH2_H_CFG, VPIF_CH2_V_CFG_00, VPIF_CH2_V_CFG_01,
 262                 VPIF_CH2_V_CFG_02, VPIF_CH2_V_CFG_03, VPIF_CH2_CTRL,
 263                 VPIF_CH2_IMG_ADD_OFST, VPIF_CH2_VANC0_STRT, VPIF_CH2_VANC0_SIZE,
 264                 VPIF_CH2_VANC1_STRT, VPIF_CH2_VANC1_SIZE, 0x7FF, 0x7FF,
 265                 VPIF_CH2_MAX_MODES
 266         },
 267         /* Channel3 */
 268         {
 269                 VPIF_CH3_H_CFG, VPIF_CH3_V_CFG_00, VPIF_CH3_V_CFG_01,
 270                 VPIF_CH3_V_CFG_02, VPIF_CH3_V_CFG_03, VPIF_CH3_CTRL,
 271                 VPIF_CH3_IMG_ADD_OFST, VPIF_CH3_VANC0_STRT, VPIF_CH3_VANC0_SIZE,
 272                 VPIF_CH3_VANC1_STRT, VPIF_CH3_VANC1_SIZE, 0x7FF, 0x7FF,
 273                 VPIF_CH3_MAX_MODES
 274         },
 275 };
 276
 277 /* vpif_set_mode_info:
 278  * This function is used to set horizontal and vertical config parameters
 279  * As per the standard in the channel, configure the values of L1, L3,
 280  * L5, L7  L9, L11 in VPIF Register , also write width and height
 281  */
 282 static void vpif_set_mode_info(const struct vpif_channel_config_params *config,
 283                                 u8 channel_id, u8 config_channel_id)
 284 {
 285         u32 value;
 286
 287         value = (config->eav2sav & vpifregs[config_channel_id].width_mask);
 288         value <<= VPIF_CH_LEN_SHIFT;
 289         value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);
 290         regw(value, vpifregs[channel_id].h_cfg);
 291
 292         value = (config->l1 & vpifregs[config_channel_id].len_mask);
 293         value <<= VPIF_CH_LEN_SHIFT;
 294         value |= (config->l3 & vpifregs[config_channel_id].len_mask);
 295         regw(value, vpifregs[channel_id].v_cfg_00);
 296
 297         value = (config->l5 & vpifregs[config_channel_id].len_mask);
 298         value <<= VPIF_CH_LEN_SHIFT;
 299         value |= (config->l7 & vpifregs[config_channel_id].len_mask);
 300         regw(value, vpifregs[channel_id].v_cfg_01);
 301
 302         value = (config->l9 & vpifregs[config_channel_id].len_mask);
 303         value <<= VPIF_CH_LEN_SHIFT;
 304         value |= (config->l11 & vpifregs[config_channel_id].len_mask);
 305         regw(value, vpifregs[channel_id].v_cfg_02);
 306
 307         value = (config->vsize & vpifregs[config_channel_id].len_mask);
 308         regw(value, vpifregs[channel_id].v_cfg);
 309 }
 310
 311 /* config_vpif_params
 312  * Function to set the parameters of a channel
 313  * Mainly modifies the channel ciontrol register
 314  * It sets frame format, yc mux mode
 315  */
 316 static void config_vpif_params(struct vpif_params *vpifparams,
 317                                 u8 channel_id, u8 found)
 318 {
 319         const struct vpif_channel_config_params *config = &vpifparams->std_info;
 320         u32 value, ch_nip, reg;
 321         u8 start, end;
 322         int i;
 323
 324         start = channel_id;
 325         end = channel_id + found;
 326
 327         for (i = start; i < end; i++) {
 328                 reg = vpifregs[i].ch_ctrl;
 329                 if (channel_id < 2)
 330                         ch_nip = VPIF_CAPTURE_CH_NIP;
 331                 else
 332                         ch_nip = VPIF_DISPLAY_CH_NIP;
 333
 334                 vpif_wr_bit(reg, ch_nip, config->frm_fmt);
 335                 vpif_wr_bit(reg, VPIF_CH_YC_MUX_BIT, config->ycmux_mode);
 336                 vpif_wr_bit(reg, VPIF_CH_INPUT_FIELD_FRAME_BIT,
 337                                         vpifparams->video_params.storage_mode);
 338
 339                 /* Set raster scanning SDR Format */
 340                 vpif_clr_bit(reg, VPIF_CH_SDR_FMT_BIT);
 341                 vpif_wr_bit(reg, VPIF_CH_DATA_MODE_BIT, config->capture_format);
 342
 343                 if (channel_id > 1)     /* Set the Pixel enable bit */
 344                         vpif_set_bit(reg, VPIF_DISPLAY_PIX_EN_BIT);
 345                 else if (config->capture_format) {
 346                         /* Set the polarity of various pins */
 347                         vpif_wr_bit(reg, VPIF_CH_FID_POLARITY_BIT,
 348                                         vpifparams->iface.fid_pol);
 349                         vpif_wr_bit(reg, VPIF_CH_V_VALID_POLARITY_BIT,
 350                                         vpifparams->iface.vd_pol);
 351                         vpif_wr_bit(reg, VPIF_CH_H_VALID_POLARITY_BIT,
 352                                         vpifparams->iface.hd_pol);
 353
 354                         value = regr(reg);
 355                         /* Set data width */
 356                         value &= ~(0x3u <<
 357                                         VPIF_CH_DATA_WIDTH_BIT);
 358                         value |= ((vpifparams->params.data_sz) <<
 359                                                      VPIF_CH_DATA_WIDTH_BIT);
 360                         regw(value, reg);
 361                 }
 362
 363                 /* Write the pitch in the driver */
 364                 regw((vpifparams->video_params.hpitch),
 365                                                 vpifregs[i].line_offset);
 366         }
 367 }
 368
 369 /* vpif_set_video_params
 370  * This function is used to set video parameters in VPIF register
 371  */
 372 int vpif_set_video_params(struct vpif_params *vpifparams, u8 channel_id)
 373 {
 374         const struct vpif_channel_config_params *config = &vpifparams->std_info;
 375         int found = 1;
 376
 377         vpif_set_mode_info(config, channel_id, channel_id);
 378         if (!config->ycmux_mode) {
 379                 /* YC are on separate channels (HDTV formats) */
 380                 vpif_set_mode_info(config, channel_id + 1, channel_id);
 381                 found = 2;
 382         }
 383
 384         config_vpif_params(vpifparams, channel_id, found);
 385
 386         regw(0x80, VPIF_REQ_SIZE);
 387         regw(0x01, VPIF_EMULATION_CTRL);
 388
 389         return found;
 390 }
 391 EXPORT_SYMBOL(vpif_set_video_params);
 392
 393 void vpif_set_vbi_display_params(struct vpif_vbi_params *vbiparams,
 394                                 u8 channel_id)
 395 {
 396         u32 value;
 397
 398         value = 0x3F8 & (vbiparams->hstart0);
 399         value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);
 400         regw(value, vpifregs[channel_id].vanc0_strt);
 401
 402         value = 0x3F8 & (vbiparams->hstart1);
 403         value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);
 404         regw(value, vpifregs[channel_id].vanc1_strt);
 405
 406         value = 0x3F8 & (vbiparams->hsize0);
 407         value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);
 408         regw(value, vpifregs[channel_id].vanc0_size);
 409
 410         value = 0x3F8 & (vbiparams->hsize1);
 411         value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);
 412         regw(value, vpifregs[channel_id].vanc1_size);
 413
 414 }
 415 EXPORT_SYMBOL(vpif_set_vbi_display_params);
 416
 417 int vpif_channel_getfid(u8 channel_id)
 418 {
 419         return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)
 420                                         >> VPIF_CH_FID_SHIFT;
 421 }
 422 EXPORT_SYMBOL(vpif_channel_getfid);
 423
 424 static int vpif_probe(struct platform_device *pdev)
 425 {
 426         int status = 0;
 427
 428         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 429         if (!res)
 430                 return -ENOENT;
 431
 432         res_len = resource_size(res);
 433
 434         res = request_mem_region(res->start, res_len, res->name);
 435         if (!res)
 436                 return -EBUSY;
 437
 438         vpif_base = ioremap(res->start, res_len);
 439         if (!vpif_base) {
 440                 status = -EBUSY;
 441                 goto fail;
 442         }
 443
 444         pm_runtime_enable(&pdev->dev);
 445         pm_runtime_get(&pdev->dev);
 446
 447         spin_lock_init(&vpif_lock);
 448         dev_info(&pdev->dev, "vpif probe success\n");
 449         return 0;
 450
 451 fail:
 452         release_mem_region(res->start, res_len);
 453         return status;
 454 }
 455
 456 static int vpif_remove(struct platform_device *pdev)
 457 {
 458         pm_runtime_disable(&pdev->dev);
 459         iounmap(vpif_base);
 460         release_mem_region(res->start, res_len);
 461         return 0;
 462 }
 463
 464 #ifdef CONFIG_PM
 465 static int vpif_suspend(struct device *dev)
 466 {
 467         pm_runtime_put(dev);
 468         return 0;
 469 }
 470
 471 static int vpif_resume(struct device *dev)
 472 {
 473         pm_runtime_get(dev);
 474         return 0;
 475 }
 476
 477 static const struct dev_pm_ops vpif_pm = {
 478         .suspend        = vpif_suspend,
 479         .resume         = vpif_resume,
 480 };
 481
 482 #define vpif_pm_ops (&vpif_pm)
 483 #else
 484 #define vpif_pm_ops NULL
 485 #endif
 486
 487 static struct platform_driver vpif_driver = {
 488         .driver = {
 489                 .name   = "vpif",
 490                 .owner = THIS_MODULE,
 491                 .pm     = vpif_pm_ops,
 492         },
 493         .remove = vpif_remove,
 494         .probe = vpif_probe,
 495 };
 496
 497 static void vpif_exit(void)
 498 {
 499         platform_driver_unregister(&vpif_driver);
 500 }
 501
 502 static int __init vpif_init(void)
 503 {
 504         return platform_driver_register(&vpif_driver);
 505 }
 506 subsys_initcall(vpif_init);
 507 module_exit(vpif_exit);
 508