Pileus Git - ~andy/linux/blob - drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20 #include <linux/module.h>
  21 #include <linux/of_device.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/slab.h>
  24 #include <linux/videodev2.h>
  25 #include <linux/of.h>
  26
  27 #include <mach/iram.h>
  28 #include <media/v4l2-ctrls.h>
  29 #include <media/v4l2-device.h>
  30 #include <media/v4l2-ioctl.h>
  31 #include <media/v4l2-mem2mem.h>
  32 #include <media/videobuf2-core.h>
  33 #include <media/videobuf2-dma-contig.h>
  34
  35 #include "coda.h"
  36
  37 #define CODA_NAME               "coda"
  38
  39 #define CODA_MAX_INSTANCES      4
  40
  41 #define CODA_FMO_BUF_SIZE       32
  42 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  43 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  45 #define CODA_ISRAM_SIZE (2048 * 2)
  46 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  47
  48 #define CODA_MAX_FRAMEBUFFERS   2
  49
  50 #define MAX_W           720
  51 #define MAX_H           576
  52 #define CODA_MAX_FRAME_SIZE     0x90000
  53 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  54 #define CODA_DEFAULT_GAMMA              4096
  55
  56 #define MIN_W 176
  57 #define MIN_H 144
  58 #define MAX_W 720
  59 #define MAX_H 576
  60
  61 #define S_ALIGN         1 /* multiple of 2 */
  62 #define W_ALIGN         1 /* multiple of 2 */
  63 #define H_ALIGN         1 /* multiple of 2 */
  64
  65 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  66
  67 static int coda_debug;
  68 module_param(coda_debug, int, 0);
  69 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  70
  71 enum {
  72         V4L2_M2M_SRC = 0,
  73         V4L2_M2M_DST = 1,
  74 };
  75
  76 enum coda_fmt_type {
  77         CODA_FMT_ENC,
  78         CODA_FMT_RAW,
  79 };
  80
  81 enum coda_inst_type {
  82         CODA_INST_ENCODER,
  83         CODA_INST_DECODER,
  84 };
  85
  86 enum coda_product {
  87         CODA_DX6 = 0xf001,
  88         CODA_7541 = 0xf012,
  89 };
  90
  91 struct coda_fmt {
  92         char *name;
  93         u32 fourcc;
  94         enum coda_fmt_type type;
  95 };
  96
  97 struct coda_devtype {
  98         char                    *firmware;
  99         enum coda_product       product;
 100         struct coda_fmt         *formats;
 101         unsigned int            num_formats;
 102         size_t                  workbuf_size;
 103 };
 104
 105 /* Per-queue, driver-specific private data */
 106 struct coda_q_data {
 107         unsigned int            width;
 108         unsigned int            height;
 109         unsigned int            sizeimage;
 110         struct coda_fmt *fmt;
 111 };
 112
 113 struct coda_aux_buf {
 114         void                    *vaddr;
 115         dma_addr_t              paddr;
 116         u32                     size;
 117 };
 118
 119 struct coda_dev {
 120         struct v4l2_device      v4l2_dev;
 121         struct video_device     vfd;
 122         struct platform_device  *plat_dev;
 123         const struct coda_devtype *devtype;
 124
 125         void __iomem            *regs_base;
 126         struct clk              *clk_per;
 127         struct clk              *clk_ahb;
 128
 129         struct coda_aux_buf     codebuf;
 130         struct coda_aux_buf     workbuf;
 131         long unsigned int       iram_paddr;
 132
 133         spinlock_t              irqlock;
 134         struct mutex            dev_mutex;
 135         struct v4l2_m2m_dev     *m2m_dev;
 136         struct vb2_alloc_ctx    *alloc_ctx;
 137         struct list_head        instances;
 138         unsigned long           instance_mask;
 139         struct delayed_work     timeout;
 140         struct completion       done;
 141 };
 142
 143 struct coda_params {
 144         u8                      rot_mode;
 145         u8                      h264_intra_qp;
 146         u8                      h264_inter_qp;
 147         u8                      mpeg4_intra_qp;
 148         u8                      mpeg4_inter_qp;
 149         u8                      gop_size;
 150         int                     codec_mode;
 151         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 152         u32                     framerate;
 153         u16                     bitrate;
 154         u32                     slice_max_bits;
 155         u32                     slice_max_mb;
 156 };
 157
 158 struct coda_ctx {
 159         struct coda_dev                 *dev;
 160         struct list_head                list;
 161         int                             aborting;
 162         int                             rawstreamon;
 163         int                             compstreamon;
 164         u32                             isequence;
 165         struct coda_q_data              q_data[2];
 166         enum coda_inst_type             inst_type;
 167         enum v4l2_colorspace            colorspace;
 168         struct coda_params              params;
 169         struct v4l2_m2m_ctx             *m2m_ctx;
 170         struct v4l2_ctrl_handler        ctrls;
 171         struct v4l2_fh                  fh;
 172         int                             gopcounter;
 173         char                            vpu_header[3][64];
 174         int                             vpu_header_size[3];
 175         struct coda_aux_buf             parabuf;
 176         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 177         int                             num_internal_frames;
 178         int                             idx;
 179 };
 180
 181 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 182                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 183 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 184
 185 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 186 {
 187         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 188                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 189         writel(data, dev->regs_base + reg);
 190 }
 191
 192 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 193 {
 194         u32 data;
 195         data = readl(dev->regs_base + reg);
 196         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 197                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 198         return data;
 199 }
 200
 201 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 202 {
 203         return coda_read(dev, CODA_REG_BIT_BUSY);
 204 }
 205
 206 static inline int coda_is_initialized(struct coda_dev *dev)
 207 {
 208         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 209 }
 210
 211 static int coda_wait_timeout(struct coda_dev *dev)
 212 {
 213         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 214
 215         while (coda_isbusy(dev)) {
 216                 if (time_after(jiffies, timeout))
 217                         return -ETIMEDOUT;
 218         }
 219         return 0;
 220 }
 221
 222 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 223 {
 224         struct coda_dev *dev = ctx->dev;
 225         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 226
 227         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 228         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 229         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 230 }
 231
 232 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 233 {
 234         struct coda_dev *dev = ctx->dev;
 235
 236         coda_command_async(ctx, cmd);
 237         return coda_wait_timeout(dev);
 238 }
 239
 240 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 241                                          enum v4l2_buf_type type)
 242 {
 243         switch (type) {
 244         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 245                 return &(ctx->q_data[V4L2_M2M_SRC]);
 246         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 247                 return &(ctx->q_data[V4L2_M2M_DST]);
 248         default:
 249                 BUG();
 250         }
 251         return NULL;
 252 }
 253
 254 /*
 255  * Add one array of supported formats for each version of Coda:
 256  *  i.MX27 -> codadx6
 257  *  i.MX51 -> coda7
 258  *  i.MX6  -> coda960
 259  */
 260 static struct coda_fmt codadx6_formats[] = {
 261         {
 262                 .name = "YUV 4:2:0 Planar",
 263                 .fourcc = V4L2_PIX_FMT_YUV420,
 264                 .type = CODA_FMT_RAW,
 265         },
 266         {
 267                 .name = "H264 Encoded Stream",
 268                 .fourcc = V4L2_PIX_FMT_H264,
 269                 .type = CODA_FMT_ENC,
 270         },
 271         {
 272                 .name = "MPEG4 Encoded Stream",
 273                 .fourcc = V4L2_PIX_FMT_MPEG4,
 274                 .type = CODA_FMT_ENC,
 275         },
 276 };
 277
 278 static struct coda_fmt coda7_formats[] = {
 279         {
 280                 .name = "YUV 4:2:0 Planar",
 281                 .fourcc = V4L2_PIX_FMT_YUV420,
 282                 .type = CODA_FMT_RAW,
 283         },
 284         {
 285                 .name = "H264 Encoded Stream",
 286                 .fourcc = V4L2_PIX_FMT_H264,
 287                 .type = CODA_FMT_ENC,
 288         },
 289         {
 290                 .name = "MPEG4 Encoded Stream",
 291                 .fourcc = V4L2_PIX_FMT_MPEG4,
 292                 .type = CODA_FMT_ENC,
 293         },
 294 };
 295
 296 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
 297 {
 298         struct coda_fmt *formats = dev->devtype->formats;
 299         int num_formats = dev->devtype->num_formats;
 300         unsigned int k;
 301
 302         for (k = 0; k < num_formats; k++) {
 303                 if (formats[k].fourcc == f->fmt.pix.pixelformat)
 304                         break;
 305         }
 306
 307         if (k == num_formats)
 308                 return NULL;
 309
 310         return &formats[k];
 311 }
 312
 313 /*
 314  * V4L2 ioctl() operations.
 315  */
 316 static int vidioc_querycap(struct file *file, void *priv,
 317                            struct v4l2_capability *cap)
 318 {
 319         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 320         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 321         strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
 322         /*
 323          * This is only a mem-to-mem video device. The capture and output
 324          * device capability flags are left only for backward compatibility
 325          * and are scheduled for removal.
 326          */
 327         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 328                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 329         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 330
 331         return 0;
 332 }
 333
 334 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 335                         enum coda_fmt_type type)
 336 {
 337         struct coda_ctx *ctx = fh_to_ctx(priv);
 338         struct coda_dev *dev = ctx->dev;
 339         struct coda_fmt *formats = dev->devtype->formats;
 340         struct coda_fmt *fmt;
 341         int num_formats = dev->devtype->num_formats;
 342         int i, num = 0;
 343
 344         for (i = 0; i < num_formats; i++) {
 345                 if (formats[i].type == type) {
 346                         if (num == f->index)
 347                                 break;
 348                         ++num;
 349                 }
 350         }
 351
 352         if (i < num_formats) {
 353                 fmt = &formats[i];
 354                 strlcpy(f->description, fmt->name, sizeof(f->description));
 355                 f->pixelformat = fmt->fourcc;
 356                 return 0;
 357         }
 358
 359         /* Format not found */
 360         return -EINVAL;
 361 }
 362
 363 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 364                                    struct v4l2_fmtdesc *f)
 365 {
 366         return enum_fmt(priv, f, CODA_FMT_ENC);
 367 }
 368
 369 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 370                                    struct v4l2_fmtdesc *f)
 371 {
 372         return enum_fmt(priv, f, CODA_FMT_RAW);
 373 }
 374
 375 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 376 {
 377         struct vb2_queue *vq;
 378         struct coda_q_data *q_data;
 379         struct coda_ctx *ctx = fh_to_ctx(priv);
 380
 381         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 382         if (!vq)
 383                 return -EINVAL;
 384
 385         q_data = get_q_data(ctx, f->type);
 386
 387         f->fmt.pix.field        = V4L2_FIELD_NONE;
 388         f->fmt.pix.pixelformat  = q_data->fmt->fourcc;
 389         f->fmt.pix.width        = q_data->width;
 390         f->fmt.pix.height       = q_data->height;
 391         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
 392                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 393         else /* encoded formats h.264/mpeg4 */
 394                 f->fmt.pix.bytesperline = 0;
 395
 396         f->fmt.pix.sizeimage    = q_data->sizeimage;
 397         f->fmt.pix.colorspace   = ctx->colorspace;
 398
 399         return 0;
 400 }
 401
 402 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
 403 {
 404         enum v4l2_field field;
 405
 406         field = f->fmt.pix.field;
 407         if (field == V4L2_FIELD_ANY)
 408                 field = V4L2_FIELD_NONE;
 409         else if (V4L2_FIELD_NONE != field)
 410                 return -EINVAL;
 411
 412         /* V4L2 specification suggests the driver corrects the format struct
 413          * if any of the dimensions is unsupported */
 414         f->fmt.pix.field = field;
 415
 416         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
 417                 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
 418                                       W_ALIGN, &f->fmt.pix.height,
 419                                       MIN_H, MAX_H, H_ALIGN, S_ALIGN);
 420                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 421                 f->fmt.pix.sizeimage = f->fmt.pix.width *
 422                                         f->fmt.pix.height * 3 / 2;
 423         } else { /*encoded formats h.264/mpeg4 */
 424                 f->fmt.pix.bytesperline = 0;
 425                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 426         }
 427
 428         return 0;
 429 }
 430
 431 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 432                                   struct v4l2_format *f)
 433 {
 434         int ret;
 435         struct coda_fmt *fmt;
 436         struct coda_ctx *ctx = fh_to_ctx(priv);
 437
 438         fmt = find_format(ctx->dev, f);
 439         /*
 440          * Since decoding support is not implemented yet do not allow
 441          * CODA_FMT_RAW formats in the capture interface.
 442          */
 443         if (!fmt || !(fmt->type == CODA_FMT_ENC))
 444                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
 445
 446         f->fmt.pix.colorspace = ctx->colorspace;
 447
 448         ret = vidioc_try_fmt(ctx->dev, f);
 449         if (ret < 0)
 450                 return ret;
 451
 452         return 0;
 453 }
 454
 455 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 456                                   struct v4l2_format *f)
 457 {
 458         struct coda_ctx *ctx = fh_to_ctx(priv);
 459         struct coda_fmt *fmt;
 460         int ret;
 461
 462         fmt = find_format(ctx->dev, f);
 463         /*
 464          * Since decoding support is not implemented yet do not allow
 465          * CODA_FMT formats in the capture interface.
 466          */
 467         if (!fmt || !(fmt->type == CODA_FMT_RAW))
 468                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
 469
 470         if (!f->fmt.pix.colorspace)
 471                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 472
 473         ret = vidioc_try_fmt(ctx->dev, f);
 474         if (ret < 0)
 475                 return ret;
 476
 477         return 0;
 478 }
 479
 480 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 481 {
 482         struct coda_q_data *q_data;
 483         struct vb2_queue *vq;
 484         int ret;
 485
 486         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 487         if (!vq)
 488                 return -EINVAL;
 489
 490         q_data = get_q_data(ctx, f->type);
 491         if (!q_data)
 492                 return -EINVAL;
 493
 494         if (vb2_is_busy(vq)) {
 495                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 496                 return -EBUSY;
 497         }
 498
 499         ret = vidioc_try_fmt(ctx->dev, f);
 500         if (ret)
 501                 return ret;
 502
 503         q_data->fmt = find_format(ctx->dev, f);
 504         q_data->width = f->fmt.pix.width;
 505         q_data->height = f->fmt.pix.height;
 506         q_data->sizeimage = f->fmt.pix.sizeimage;
 507
 508         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 509                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 510                 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
 511
 512         return 0;
 513 }
 514
 515 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 516                                 struct v4l2_format *f)
 517 {
 518         int ret;
 519
 520         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 521         if (ret)
 522                 return ret;
 523
 524         return vidioc_s_fmt(fh_to_ctx(priv), f);
 525 }
 526
 527 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 528                                 struct v4l2_format *f)
 529 {
 530         struct coda_ctx *ctx = fh_to_ctx(priv);
 531         int ret;
 532
 533         ret = vidioc_try_fmt_vid_out(file, priv, f);
 534         if (ret)
 535                 return ret;
 536
 537         ret = vidioc_s_fmt(ctx, f);
 538         if (ret)
 539                 ctx->colorspace = f->fmt.pix.colorspace;
 540
 541         return ret;
 542 }
 543
 544 static int vidioc_reqbufs(struct file *file, void *priv,
 545                           struct v4l2_requestbuffers *reqbufs)
 546 {
 547         struct coda_ctx *ctx = fh_to_ctx(priv);
 548
 549         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 550 }
 551
 552 static int vidioc_querybuf(struct file *file, void *priv,
 553                            struct v4l2_buffer *buf)
 554 {
 555         struct coda_ctx *ctx = fh_to_ctx(priv);
 556
 557         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 558 }
 559
 560 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 561 {
 562         struct coda_ctx *ctx = fh_to_ctx(priv);
 563
 564         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 565 }
 566
 567 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 568 {
 569         struct coda_ctx *ctx = fh_to_ctx(priv);
 570
 571         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 572 }
 573
 574 static int vidioc_streamon(struct file *file, void *priv,
 575                            enum v4l2_buf_type type)
 576 {
 577         struct coda_ctx *ctx = fh_to_ctx(priv);
 578
 579         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 580 }
 581
 582 static int vidioc_streamoff(struct file *file, void *priv,
 583                             enum v4l2_buf_type type)
 584 {
 585         struct coda_ctx *ctx = fh_to_ctx(priv);
 586
 587         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 588 }
 589
 590 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 591         .vidioc_querycap        = vidioc_querycap,
 592
 593         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 594         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 595         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 596         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 597
 598         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 599         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 600         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 601         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 602
 603         .vidioc_reqbufs         = vidioc_reqbufs,
 604         .vidioc_querybuf        = vidioc_querybuf,
 605
 606         .vidioc_qbuf            = vidioc_qbuf,
 607         .vidioc_dqbuf           = vidioc_dqbuf,
 608
 609         .vidioc_streamon        = vidioc_streamon,
 610         .vidioc_streamoff       = vidioc_streamoff,
 611 };
 612
 613 /*
 614  * Mem-to-mem operations.
 615  */
 616 static void coda_device_run(void *m2m_priv)
 617 {
 618         struct coda_ctx *ctx = m2m_priv;
 619         struct coda_q_data *q_data_src, *q_data_dst;
 620         struct vb2_buffer *src_buf, *dst_buf;
 621         struct coda_dev *dev = ctx->dev;
 622         int force_ipicture;
 623         int quant_param = 0;
 624         u32 picture_y, picture_cb, picture_cr;
 625         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 626         u32 dst_fourcc;
 627
 628         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 629         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 630         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 631         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 632         dst_fourcc = q_data_dst->fmt->fourcc;
 633
 634         src_buf->v4l2_buf.sequence = ctx->isequence;
 635         dst_buf->v4l2_buf.sequence = ctx->isequence;
 636         ctx->isequence++;
 637
 638         /*
 639          * Workaround coda firmware BUG that only marks the first
 640          * frame as IDR. This is a problem for some decoders that can't
 641          * recover when a frame is lost.
 642          */
 643         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 644                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 645                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 646         } else {
 647                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 648                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 649         }
 650
 651         /*
 652          * Copy headers at the beginning of the first frame for H.264 only.
 653          * In MPEG4 they are already copied by the coda.
 654          */
 655         if (src_buf->v4l2_buf.sequence == 0) {
 656                 pic_stream_buffer_addr =
 657                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 658                         ctx->vpu_header_size[0] +
 659                         ctx->vpu_header_size[1] +
 660                         ctx->vpu_header_size[2];
 661                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 662                         ctx->vpu_header_size[0] -
 663                         ctx->vpu_header_size[1] -
 664                         ctx->vpu_header_size[2];
 665                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 666                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 667                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 668                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 669                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 670                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 671                         ctx->vpu_header_size[2]);
 672         } else {
 673                 pic_stream_buffer_addr =
 674                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 675                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 676         }
 677
 678         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 679                 force_ipicture = 1;
 680                 switch (dst_fourcc) {
 681                 case V4L2_PIX_FMT_H264:
 682                         quant_param = ctx->params.h264_intra_qp;
 683                         break;
 684                 case V4L2_PIX_FMT_MPEG4:
 685                         quant_param = ctx->params.mpeg4_intra_qp;
 686                         break;
 687                 default:
 688                         v4l2_warn(&ctx->dev->v4l2_dev,
 689                                 "cannot set intra qp, fmt not supported\n");
 690                         break;
 691                 }
 692         } else {
 693                 force_ipicture = 0;
 694                 switch (dst_fourcc) {
 695                 case V4L2_PIX_FMT_H264:
 696                         quant_param = ctx->params.h264_inter_qp;
 697                         break;
 698                 case V4L2_PIX_FMT_MPEG4:
 699                         quant_param = ctx->params.mpeg4_inter_qp;
 700                         break;
 701                 default:
 702                         v4l2_warn(&ctx->dev->v4l2_dev,
 703                                 "cannot set inter qp, fmt not supported\n");
 704                         break;
 705                 }
 706         }
 707
 708         /* submit */
 709         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
 710         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 711
 712
 713         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 714         picture_cb = picture_y + q_data_src->width * q_data_src->height;
 715         picture_cr = picture_cb + q_data_src->width / 2 *
 716                         q_data_src->height / 2;
 717
 718         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 719         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 720         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 721         coda_write(dev, force_ipicture << 1 & 0x2,
 722                    CODA_CMD_ENC_PIC_OPTION);
 723
 724         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 725         coda_write(dev, pic_stream_buffer_size / 1024,
 726                    CODA_CMD_ENC_PIC_BB_SIZE);
 727
 728         if (dev->devtype->product == CODA_7541) {
 729                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 730                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 731                                 CODA7_REG_BIT_AXI_SRAM_USE);
 732         }
 733
 734         /* 1 second timeout in case CODA locks up */
 735         schedule_delayed_work(&dev->timeout, HZ);
 736
 737         INIT_COMPLETION(dev->done);
 738         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 739 }
 740
 741 static int coda_job_ready(void *m2m_priv)
 742 {
 743         struct coda_ctx *ctx = m2m_priv;
 744
 745         /*
 746          * For both 'P' and 'key' frame cases 1 picture
 747          * and 1 frame are needed.
 748          */
 749         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 750                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 751                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 752                          "not ready: not enough video buffers.\n");
 753                 return 0;
 754         }
 755
 756         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 757                         "job ready\n");
 758         return 1;
 759 }
 760
 761 static void coda_job_abort(void *priv)
 762 {
 763         struct coda_ctx *ctx = priv;
 764         struct coda_dev *dev = ctx->dev;
 765
 766         ctx->aborting = 1;
 767
 768         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 769                  "Aborting task\n");
 770
 771         v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
 772 }
 773
 774 static void coda_lock(void *m2m_priv)
 775 {
 776         struct coda_ctx *ctx = m2m_priv;
 777         struct coda_dev *pcdev = ctx->dev;
 778         mutex_lock(&pcdev->dev_mutex);
 779 }
 780
 781 static void coda_unlock(void *m2m_priv)
 782 {
 783         struct coda_ctx *ctx = m2m_priv;
 784         struct coda_dev *pcdev = ctx->dev;
 785         mutex_unlock(&pcdev->dev_mutex);
 786 }
 787
 788 static struct v4l2_m2m_ops coda_m2m_ops = {
 789         .device_run     = coda_device_run,
 790         .job_ready      = coda_job_ready,
 791         .job_abort      = coda_job_abort,
 792         .lock           = coda_lock,
 793         .unlock         = coda_unlock,
 794 };
 795
 796 static void set_default_params(struct coda_ctx *ctx)
 797 {
 798         struct coda_dev *dev = ctx->dev;
 799
 800         ctx->params.codec_mode = CODA_MODE_INVALID;
 801         ctx->colorspace = V4L2_COLORSPACE_REC709;
 802         ctx->params.framerate = 30;
 803         ctx->aborting = 0;
 804
 805         /* Default formats for output and input queues */
 806         ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
 807         ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
 808         ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
 809         ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
 810         ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
 811         ctx->q_data[V4L2_M2M_DST].width = MAX_W;
 812         ctx->q_data[V4L2_M2M_DST].height = MAX_H;
 813         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 814 }
 815
 816 /*
 817  * Queue operations
 818  */
 819 static int coda_queue_setup(struct vb2_queue *vq,
 820                                 const struct v4l2_format *fmt,
 821                                 unsigned int *nbuffers, unsigned int *nplanes,
 822                                 unsigned int sizes[], void *alloc_ctxs[])
 823 {
 824         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 825         struct coda_q_data *q_data;
 826         unsigned int size;
 827
 828         q_data = get_q_data(ctx, vq->type);
 829         size = q_data->sizeimage;
 830
 831         *nplanes = 1;
 832         sizes[0] = size;
 833
 834         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 835
 836         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 837                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 838
 839         return 0;
 840 }
 841
 842 static int coda_buf_prepare(struct vb2_buffer *vb)
 843 {
 844         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 845         struct coda_q_data *q_data;
 846
 847         q_data = get_q_data(ctx, vb->vb2_queue->type);
 848
 849         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 850                 v4l2_warn(&ctx->dev->v4l2_dev,
 851                           "%s data will not fit into plane (%lu < %lu)\n",
 852                           __func__, vb2_plane_size(vb, 0),
 853                           (long)q_data->sizeimage);
 854                 return -EINVAL;
 855         }
 856
 857         vb2_set_plane_payload(vb, 0, q_data->sizeimage);
 858
 859         return 0;
 860 }
 861
 862 static void coda_buf_queue(struct vb2_buffer *vb)
 863 {
 864         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 865         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 866 }
 867
 868 static void coda_wait_prepare(struct vb2_queue *q)
 869 {
 870         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 871         coda_unlock(ctx);
 872 }
 873
 874 static void coda_wait_finish(struct vb2_queue *q)
 875 {
 876         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 877         coda_lock(ctx);
 878 }
 879
 880 static void coda_free_framebuffers(struct coda_ctx *ctx)
 881 {
 882         int i;
 883
 884         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 885                 if (ctx->internal_frames[i].vaddr) {
 886                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 887                                 ctx->internal_frames[i].size,
 888                                 ctx->internal_frames[i].vaddr,
 889                                 ctx->internal_frames[i].paddr);
 890                         ctx->internal_frames[i].vaddr = NULL;
 891                 }
 892         }
 893 }
 894
 895 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 896 {
 897         struct coda_dev *dev = ctx->dev;
 898
 899         int height = q_data->height;
 900         int width = q_data->width;
 901         u32 *p;
 902         int i;
 903
 904         /* Allocate frame buffers */
 905         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 906         for (i = 0; i < ctx->num_internal_frames; i++) {
 907                 ctx->internal_frames[i].size = q_data->sizeimage;
 908                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 909                         ctx->internal_frames[i].size += width / 2 * height / 2;
 910                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 911                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 912                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
 913                 if (!ctx->internal_frames[i].vaddr) {
 914                         coda_free_framebuffers(ctx);
 915                         return -ENOMEM;
 916                 }
 917         }
 918
 919         /* Register frame buffers in the parameter buffer */
 920         p = ctx->parabuf.vaddr;
 921
 922         if (dev->devtype->product == CODA_DX6) {
 923                 for (i = 0; i < ctx->num_internal_frames; i++) {
 924                         p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
 925                         p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
 926                         p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
 927                 }
 928         } else {
 929                 for (i = 0; i < ctx->num_internal_frames; i += 2) {
 930                         p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
 931                         p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
 932                         p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
 933
 934                         if (fourcc == V4L2_PIX_FMT_H264)
 935                                 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
 936
 937                         if (i + 1 < ctx->num_internal_frames) {
 938                                 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
 939                                 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
 940                                 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
 941
 942                                 if (fourcc == V4L2_PIX_FMT_H264)
 943                                         p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
 944                         }
 945                 }
 946         }
 947
 948         return 0;
 949 }
 950
 951 static int coda_h264_padding(int size, char *p)
 952 {
 953         int nal_size;
 954         int diff;
 955
 956         diff = size - (size & ~0x7);
 957         if (diff == 0)
 958                 return 0;
 959
 960         nal_size = coda_filler_size[diff];
 961         memcpy(p, coda_filler_nal, nal_size);
 962
 963         /* Add rbsp stop bit and trailing at the end */
 964         *(p + nal_size - 1) = 0x80;
 965
 966         return nal_size;
 967 }
 968
 969 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
 970 {
 971         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 972         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
 973         u32 bitstream_buf, bitstream_size;
 974         struct coda_dev *dev = ctx->dev;
 975         struct coda_q_data *q_data_src, *q_data_dst;
 976         struct vb2_buffer *buf;
 977         u32 dst_fourcc;
 978         u32 value;
 979         int ret;
 980
 981         if (count < 1)
 982                 return -EINVAL;
 983
 984         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 985                 ctx->rawstreamon = 1;
 986         else
 987                 ctx->compstreamon = 1;
 988
 989         /* Don't start the coda unless both queues are on */
 990         if (!(ctx->rawstreamon & ctx->compstreamon))
 991                 return 0;
 992
 993         if (coda_isbusy(dev))
 994                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
 995                         return -EBUSY;
 996
 997         ctx->gopcounter = ctx->params.gop_size - 1;
 998
 999         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1000         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1001         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1002         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1003         bitstream_size = q_data_dst->sizeimage;
1004         dst_fourcc = q_data_dst->fmt->fourcc;
1005
1006         /* Find out whether coda must encode or decode */
1007         if (q_data_src->fmt->type == CODA_FMT_RAW &&
1008             q_data_dst->fmt->type == CODA_FMT_ENC) {
1009                 ctx->inst_type = CODA_INST_ENCODER;
1010         } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
1011                    q_data_dst->fmt->type == CODA_FMT_RAW) {
1012                 ctx->inst_type = CODA_INST_DECODER;
1013                 v4l2_err(v4l2_dev, "decoding not supported.\n");
1014                 return -EINVAL;
1015         } else {
1016                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1017                 return -EINVAL;
1018         }
1019
1020         if (!coda_is_initialized(dev)) {
1021                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1022                 return -EFAULT;
1023         }
1024         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1025         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1026         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1027         switch (dev->devtype->product) {
1028         case CODA_DX6:
1029                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1030                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1031                 break;
1032         default:
1033                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1034                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1035         }
1036
1037         if (dev->devtype->product == CODA_DX6) {
1038                 /* Configure the coda */
1039                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1040         }
1041
1042         /* Could set rotation here if needed */
1043         switch (dev->devtype->product) {
1044         case CODA_DX6:
1045                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1046                 break;
1047         default:
1048                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1049         }
1050         value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1051         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1052         coda_write(dev, ctx->params.framerate,
1053                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1054
1055         switch (dst_fourcc) {
1056         case V4L2_PIX_FMT_MPEG4:
1057                 if (dev->devtype->product == CODA_DX6)
1058                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1059                 else
1060                         ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1061
1062                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1063                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1064                 break;
1065         case V4L2_PIX_FMT_H264:
1066                 if (dev->devtype->product == CODA_DX6)
1067                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1068                 else
1069                         ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1070
1071                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1072                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1073                 break;
1074         default:
1075                 v4l2_err(v4l2_dev,
1076                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1077                 return -EINVAL;
1078         }
1079
1080         switch (ctx->params.slice_mode) {
1081         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1082                 value = 0;
1083                 break;
1084         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1085                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1086                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1087                 value |=  1 & CODA_SLICING_MODE_MASK;
1088                 break;
1089         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1090                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1091                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1092                 value |=  1 & CODA_SLICING_MODE_MASK;
1093                 break;
1094         }
1095         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1096         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1097         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1098
1099         if (ctx->params.bitrate) {
1100                 /* Rate control enabled */
1101                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1102                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1103         } else {
1104                 value = 0;
1105         }
1106         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1107
1108         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1109         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1110
1111         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1112         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1113
1114         /* set default gamma */
1115         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1116         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1117
1118         value  = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1119         value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1120         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1121
1122         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1123                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1124                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1125                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1126                 if (dev->devtype->product == CODA_DX6) {
1127                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1128                 } else {
1129                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1130                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1131                 }
1132         }
1133
1134         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1135                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1136                 return -ETIMEDOUT;
1137         }
1138
1139         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1140                 return -EFAULT;
1141
1142         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1143         if (ret < 0)
1144                 return ret;
1145
1146         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1147         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1148         if (dev->devtype->product != CODA_DX6) {
1149                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1150                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1151                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1152                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1153                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1154                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1155         }
1156         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1157                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1158                 return -ETIMEDOUT;
1159         }
1160
1161         /* Save stream headers */
1162         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1163         switch (dst_fourcc) {
1164         case V4L2_PIX_FMT_H264:
1165                 /*
1166                  * Get SPS in the first frame and copy it to an
1167                  * intermediate buffer.
1168                  */
1169                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1170                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1171                 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1172                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1173                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1174                         return -ETIMEDOUT;
1175                 }
1176                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1177                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1178                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1179                        ctx->vpu_header_size[0]);
1180
1181                 /*
1182                  * Get PPS in the first frame and copy it to an
1183                  * intermediate buffer.
1184                  */
1185                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1186                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1187                 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1188                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1189                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1190                         return -ETIMEDOUT;
1191                 }
1192                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1193                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1194                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1195                        ctx->vpu_header_size[1]);
1196                 /*
1197                  * Length of H.264 headers is variable and thus it might not be
1198                  * aligned for the coda to append the encoded frame. In that is
1199                  * the case a filler NAL must be added to header 2.
1200                  */
1201                 ctx->vpu_header_size[2] = coda_h264_padding(
1202                                         (ctx->vpu_header_size[0] +
1203                                          ctx->vpu_header_size[1]),
1204                                          ctx->vpu_header[2]);
1205                 break;
1206         case V4L2_PIX_FMT_MPEG4:
1207                 /*
1208                  * Get VOS in the first frame and copy it to an
1209                  * intermediate buffer
1210                  */
1211                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1212                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1213                 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1214                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1215                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1216                         return -ETIMEDOUT;
1217                 }
1218                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1219                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1220                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1221                        ctx->vpu_header_size[0]);
1222
1223                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1224                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1225                 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1226                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1227                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1228                         return -ETIMEDOUT;
1229                 }
1230                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1231                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1232                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1233                        ctx->vpu_header_size[1]);
1234
1235                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1236                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1237                 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1238                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1239                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1240                         return -ETIMEDOUT;
1241                 }
1242                 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1243                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1244                 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1245                        ctx->vpu_header_size[2]);
1246                 break;
1247         default:
1248                 /* No more formats need to save headers at the moment */
1249                 break;
1250         }
1251
1252         return 0;
1253 }
1254
1255 static int coda_stop_streaming(struct vb2_queue *q)
1256 {
1257         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1258         struct coda_dev *dev = ctx->dev;
1259
1260         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1261                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1262                          "%s: output\n", __func__);
1263                 ctx->rawstreamon = 0;
1264         } else {
1265                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1266                          "%s: capture\n", __func__);
1267                 ctx->compstreamon = 0;
1268         }
1269
1270         /* Don't stop the coda unless both queues are off */
1271         if (ctx->rawstreamon || ctx->compstreamon)
1272                 return 0;
1273
1274         if (coda_isbusy(dev)) {
1275                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1276                         v4l2_warn(&dev->v4l2_dev,
1277                                   "%s: timeout, sending SEQ_END anyway\n", __func__);
1278                 }
1279         }
1280
1281         cancel_delayed_work(&dev->timeout);
1282
1283         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1284                  "%s: sent command 'SEQ_END' to coda\n", __func__);
1285         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1286                 v4l2_err(&dev->v4l2_dev,
1287                          "CODA_COMMAND_SEQ_END failed\n");
1288                 return -ETIMEDOUT;
1289         }
1290
1291         coda_free_framebuffers(ctx);
1292
1293         return 0;
1294 }
1295
1296 static struct vb2_ops coda_qops = {
1297         .queue_setup            = coda_queue_setup,
1298         .buf_prepare            = coda_buf_prepare,
1299         .buf_queue              = coda_buf_queue,
1300         .wait_prepare           = coda_wait_prepare,
1301         .wait_finish            = coda_wait_finish,
1302         .start_streaming        = coda_start_streaming,
1303         .stop_streaming         = coda_stop_streaming,
1304 };
1305
1306 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1307 {
1308         struct coda_ctx *ctx =
1309                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1310
1311         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1312                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1313
1314         switch (ctrl->id) {
1315         case V4L2_CID_HFLIP:
1316                 if (ctrl->val)
1317                         ctx->params.rot_mode |= CODA_MIR_HOR;
1318                 else
1319                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
1320                 break;
1321         case V4L2_CID_VFLIP:
1322                 if (ctrl->val)
1323                         ctx->params.rot_mode |= CODA_MIR_VER;
1324                 else
1325                         ctx->params.rot_mode &= ~CODA_MIR_VER;
1326                 break;
1327         case V4L2_CID_MPEG_VIDEO_BITRATE:
1328                 ctx->params.bitrate = ctrl->val / 1000;
1329                 break;
1330         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1331                 ctx->params.gop_size = ctrl->val;
1332                 break;
1333         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1334                 ctx->params.h264_intra_qp = ctrl->val;
1335                 break;
1336         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1337                 ctx->params.h264_inter_qp = ctrl->val;
1338                 break;
1339         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1340                 ctx->params.mpeg4_intra_qp = ctrl->val;
1341                 break;
1342         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1343                 ctx->params.mpeg4_inter_qp = ctrl->val;
1344                 break;
1345         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1346                 ctx->params.slice_mode = ctrl->val;
1347                 break;
1348         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1349                 ctx->params.slice_max_mb = ctrl->val;
1350                 break;
1351         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1352                 ctx->params.slice_max_bits = ctrl->val * 8;
1353                 break;
1354         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1355                 break;
1356         default:
1357                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1358                         "Invalid control, id=%d, val=%d\n",
1359                         ctrl->id, ctrl->val);
1360                 return -EINVAL;
1361         }
1362
1363         return 0;
1364 }
1365
1366 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1367         .s_ctrl = coda_s_ctrl,
1368 };
1369
1370 static int coda_ctrls_setup(struct coda_ctx *ctx)
1371 {
1372         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1373
1374         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1375                 V4L2_CID_HFLIP, 0, 1, 1, 0);
1376         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1377                 V4L2_CID_VFLIP, 0, 1, 1, 0);
1378         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1379                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1380         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1381                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1382         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1383                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1384         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1385                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1386         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1387                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1388         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1389                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1390         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1391                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1392                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1393                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1394         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1395                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1396         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1397                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
1398         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1399                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1400                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1401                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1402                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1403
1404         if (ctx->ctrls.error) {
1405                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1406                         ctx->ctrls.error);
1407                 return -EINVAL;
1408         }
1409
1410         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1411 }
1412
1413 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1414                       struct vb2_queue *dst_vq)
1415 {
1416         struct coda_ctx *ctx = priv;
1417         int ret;
1418
1419         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1420         src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1421         src_vq->drv_priv = ctx;
1422         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1423         src_vq->ops = &coda_qops;
1424         src_vq->mem_ops = &vb2_dma_contig_memops;
1425
1426         ret = vb2_queue_init(src_vq);
1427         if (ret)
1428                 return ret;
1429
1430         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1431         dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1432         dst_vq->drv_priv = ctx;
1433         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1434         dst_vq->ops = &coda_qops;
1435         dst_vq->mem_ops = &vb2_dma_contig_memops;
1436
1437         return vb2_queue_init(dst_vq);
1438 }
1439
1440 static int coda_next_free_instance(struct coda_dev *dev)
1441 {
1442         return ffz(dev->instance_mask);
1443 }
1444
1445 static int coda_open(struct file *file)
1446 {
1447         struct coda_dev *dev = video_drvdata(file);
1448         struct coda_ctx *ctx = NULL;
1449         int ret = 0;
1450         int idx;
1451
1452         idx = coda_next_free_instance(dev);
1453         if (idx >= CODA_MAX_INSTANCES)
1454                 return -EBUSY;
1455         set_bit(idx, &dev->instance_mask);
1456
1457         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1458         if (!ctx)
1459                 return -ENOMEM;
1460
1461         v4l2_fh_init(&ctx->fh, video_devdata(file));
1462         file->private_data = &ctx->fh;
1463         v4l2_fh_add(&ctx->fh);
1464         ctx->dev = dev;
1465         ctx->idx = idx;
1466
1467         set_default_params(ctx);
1468         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1469                                          &coda_queue_init);
1470         if (IS_ERR(ctx->m2m_ctx)) {
1471                 int ret = PTR_ERR(ctx->m2m_ctx);
1472
1473                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1474                          __func__, ret);
1475                 goto err;
1476         }
1477         ret = coda_ctrls_setup(ctx);
1478         if (ret) {
1479                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1480                 goto err;
1481         }
1482
1483         ctx->fh.ctrl_handler = &ctx->ctrls;
1484
1485         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1486                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1487         if (!ctx->parabuf.vaddr) {
1488                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1489                 ret = -ENOMEM;
1490                 goto err;
1491         }
1492
1493         coda_lock(ctx);
1494         list_add(&ctx->list, &dev->instances);
1495         coda_unlock(ctx);
1496
1497         clk_prepare_enable(dev->clk_per);
1498         clk_prepare_enable(dev->clk_ahb);
1499
1500         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1501                  ctx->idx, ctx);
1502
1503         return 0;
1504
1505 err:
1506         v4l2_fh_del(&ctx->fh);
1507         v4l2_fh_exit(&ctx->fh);
1508         kfree(ctx);
1509         return ret;
1510 }
1511
1512 static int coda_release(struct file *file)
1513 {
1514         struct coda_dev *dev = video_drvdata(file);
1515         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1516
1517         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1518                  ctx);
1519
1520         coda_lock(ctx);
1521         list_del(&ctx->list);
1522         coda_unlock(ctx);
1523
1524         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1525                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1526         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1527         v4l2_ctrl_handler_free(&ctx->ctrls);
1528         clk_disable_unprepare(dev->clk_per);
1529         clk_disable_unprepare(dev->clk_ahb);
1530         v4l2_fh_del(&ctx->fh);
1531         v4l2_fh_exit(&ctx->fh);
1532         clear_bit(ctx->idx, &dev->instance_mask);
1533         kfree(ctx);
1534
1535         return 0;
1536 }
1537
1538 static unsigned int coda_poll(struct file *file,
1539                                  struct poll_table_struct *wait)
1540 {
1541         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1542         int ret;
1543
1544         coda_lock(ctx);
1545         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1546         coda_unlock(ctx);
1547         return ret;
1548 }
1549
1550 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1551 {
1552         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1553
1554         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1555 }
1556
1557 static const struct v4l2_file_operations coda_fops = {
1558         .owner          = THIS_MODULE,
1559         .open           = coda_open,
1560         .release        = coda_release,
1561         .poll           = coda_poll,
1562         .unlocked_ioctl = video_ioctl2,
1563         .mmap           = coda_mmap,
1564 };
1565
1566 static irqreturn_t coda_irq_handler(int irq, void *data)
1567 {
1568         struct vb2_buffer *src_buf, *dst_buf;
1569         struct coda_dev *dev = data;
1570         u32 wr_ptr, start_ptr;
1571         struct coda_ctx *ctx;
1572
1573         cancel_delayed_work(&dev->timeout);
1574
1575         /* read status register to attend the IRQ */
1576         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1577         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1578                       CODA_REG_BIT_INT_CLEAR);
1579
1580         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1581         if (ctx == NULL) {
1582                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1583                 return IRQ_HANDLED;
1584         }
1585
1586         if (ctx->aborting) {
1587                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1588                          "task has been aborted\n");
1589                 return IRQ_HANDLED;
1590         }
1591
1592         if (coda_isbusy(ctx->dev)) {
1593                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1594                          "coda is still busy!!!!\n");
1595                 return IRQ_NONE;
1596         }
1597
1598         complete(&dev->done);
1599
1600         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1601         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1602
1603         /* Get results from the coda */
1604         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1605         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1606         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1607         /* Calculate bytesused field */
1608         if (dst_buf->v4l2_buf.sequence == 0) {
1609                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1610                                                 ctx->vpu_header_size[0] +
1611                                                 ctx->vpu_header_size[1] +
1612                                                 ctx->vpu_header_size[2];
1613         } else {
1614                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1615         }
1616
1617         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1618                  wr_ptr - start_ptr);
1619
1620         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1621         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1622
1623         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1624                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1625                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1626         } else {
1627                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1628                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1629         }
1630
1631         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1632         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1633
1634         ctx->gopcounter--;
1635         if (ctx->gopcounter < 0)
1636                 ctx->gopcounter = ctx->params.gop_size - 1;
1637
1638         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1639                 "job finished: encoding frame (%d) (%s)\n",
1640                 dst_buf->v4l2_buf.sequence,
1641                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1642                 "KEYFRAME" : "PFRAME");
1643
1644         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1645
1646         return IRQ_HANDLED;
1647 }
1648
1649 static void coda_timeout(struct work_struct *work)
1650 {
1651         struct coda_ctx *ctx;
1652         struct coda_dev *dev = container_of(to_delayed_work(work),
1653                                             struct coda_dev, timeout);
1654
1655         if (completion_done(&dev->done))
1656                 return;
1657
1658         complete(&dev->done);
1659
1660         v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1661
1662         mutex_lock(&dev->dev_mutex);
1663         list_for_each_entry(ctx, &dev->instances, list) {
1664                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1665                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1666         }
1667         mutex_unlock(&dev->dev_mutex);
1668 }
1669
1670 static u32 coda_supported_firmwares[] = {
1671         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1672         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1673 };
1674
1675 static bool coda_firmware_supported(u32 vernum)
1676 {
1677         int i;
1678
1679         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1680                 if (vernum == coda_supported_firmwares[i])
1681                         return true;
1682         return false;
1683 }
1684
1685 static char *coda_product_name(int product)
1686 {
1687         static char buf[9];
1688
1689         switch (product) {
1690         case CODA_DX6:
1691                 return "CodaDx6";
1692         case CODA_7541:
1693                 return "CODA7541";
1694         default:
1695                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1696                 return buf;
1697         }
1698 }
1699
1700 static int coda_hw_init(struct coda_dev *dev)
1701 {
1702         u16 product, major, minor, release;
1703         u32 data;
1704         u16 *p;
1705         int i;
1706
1707         clk_prepare_enable(dev->clk_per);
1708         clk_prepare_enable(dev->clk_ahb);
1709
1710         /*
1711          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1712          * The 16-bit chars in the code buffer are in memory access
1713          * order, re-sort them to CODA order for register download.
1714          * Data in this SRAM survives a reboot.
1715          */
1716         p = (u16 *)dev->codebuf.vaddr;
1717         if (dev->devtype->product == CODA_DX6) {
1718                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1719                         data = CODA_DOWN_ADDRESS_SET(i) |
1720                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1721                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1722                 }
1723         } else {
1724                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1725                         data = CODA_DOWN_ADDRESS_SET(i) |
1726                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1727                                                         3 - (i % 4)]);
1728                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1729                 }
1730         }
1731
1732         /* Tell the BIT where to find everything it needs */
1733         coda_write(dev, dev->workbuf.paddr,
1734                       CODA_REG_BIT_WORK_BUF_ADDR);
1735         coda_write(dev, dev->codebuf.paddr,
1736                       CODA_REG_BIT_CODE_BUF_ADDR);
1737         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1738
1739         /* Set default values */
1740         switch (dev->devtype->product) {
1741         case CODA_DX6:
1742                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1743                 break;
1744         default:
1745                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1746         }
1747         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1748
1749         if (dev->devtype->product != CODA_DX6)
1750                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1751
1752         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1753                       CODA_REG_BIT_INT_ENABLE);
1754
1755         /* Reset VPU and start processor */
1756         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1757         data |= CODA_REG_RESET_ENABLE;
1758         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1759         udelay(10);
1760         data &= ~CODA_REG_RESET_ENABLE;
1761         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1762         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1763
1764         /* Load firmware */
1765         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1766         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1767         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1768         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1769         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1770         if (coda_wait_timeout(dev)) {
1771                 clk_disable_unprepare(dev->clk_per);
1772                 clk_disable_unprepare(dev->clk_ahb);
1773                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1774                 return -EIO;
1775         }
1776
1777         /* Check we are compatible with the loaded firmware */
1778         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1779         product = CODA_FIRMWARE_PRODUCT(data);
1780         major = CODA_FIRMWARE_MAJOR(data);
1781         minor = CODA_FIRMWARE_MINOR(data);
1782         release = CODA_FIRMWARE_RELEASE(data);
1783
1784         clk_disable_unprepare(dev->clk_per);
1785         clk_disable_unprepare(dev->clk_ahb);
1786
1787         if (product != dev->devtype->product) {
1788                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1789                          " Version: %u.%u.%u\n",
1790                          coda_product_name(dev->devtype->product),
1791                          coda_product_name(product), major, minor, release);
1792                 return -EINVAL;
1793         }
1794
1795         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1796                   coda_product_name(product));
1797
1798         if (coda_firmware_supported(data)) {
1799                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1800                           major, minor, release);
1801         } else {
1802                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1803                           "%u.%u.%u\n", major, minor, release);
1804         }
1805
1806         return 0;
1807 }
1808
1809 static void coda_fw_callback(const struct firmware *fw, void *context)
1810 {
1811         struct coda_dev *dev = context;
1812         struct platform_device *pdev = dev->plat_dev;
1813         int ret;
1814
1815         if (!fw) {
1816                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1817                 return;
1818         }
1819
1820         /* allocate auxiliary per-device code buffer for the BIT processor */
1821         dev->codebuf.size = fw->size;
1822         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1823                                                     &dev->codebuf.paddr,
1824                                                     GFP_KERNEL);
1825         if (!dev->codebuf.vaddr) {
1826                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1827                 return;
1828         }
1829
1830         /* Copy the whole firmware image to the code buffer */
1831         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1832         release_firmware(fw);
1833
1834         ret = coda_hw_init(dev);
1835         if (ret) {
1836                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1837                 return;
1838         }
1839
1840         dev->vfd.fops   = &coda_fops,
1841         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1842         dev->vfd.release        = video_device_release_empty,
1843         dev->vfd.lock   = &dev->dev_mutex;
1844         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1845         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1846         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1847         video_set_drvdata(&dev->vfd, dev);
1848
1849         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1850         if (IS_ERR(dev->alloc_ctx)) {
1851                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1852                 return;
1853         }
1854
1855         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1856         if (IS_ERR(dev->m2m_dev)) {
1857                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1858                 goto rel_ctx;
1859         }
1860
1861         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1862         if (ret) {
1863                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1864                 goto rel_m2m;
1865         }
1866         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1867                   dev->vfd.num);
1868
1869         return;
1870
1871 rel_m2m:
1872         v4l2_m2m_release(dev->m2m_dev);
1873 rel_ctx:
1874         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1875 }
1876
1877 static int coda_firmware_request(struct coda_dev *dev)
1878 {
1879         char *fw = dev->devtype->firmware;
1880
1881         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1882                 coda_product_name(dev->devtype->product));
1883
1884         return request_firmware_nowait(THIS_MODULE, true,
1885                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1886 }
1887
1888 enum coda_platform {
1889         CODA_IMX27,
1890         CODA_IMX53,
1891 };
1892
1893 static const struct coda_devtype coda_devdata[] = {
1894         [CODA_IMX27] = {
1895                 .firmware    = "v4l-codadx6-imx27.bin",
1896                 .product     = CODA_DX6,
1897                 .formats     = codadx6_formats,
1898                 .num_formats = ARRAY_SIZE(codadx6_formats),
1899         },
1900         [CODA_IMX53] = {
1901                 .firmware    = "v4l-coda7541-imx53.bin",
1902                 .product     = CODA_7541,
1903                 .formats     = coda7_formats,
1904                 .num_formats = ARRAY_SIZE(coda7_formats),
1905         },
1906 };
1907
1908 static struct platform_device_id coda_platform_ids[] = {
1909         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1910         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
1911         { /* sentinel */ }
1912 };
1913 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1914
1915 #ifdef CONFIG_OF
1916 static const struct of_device_id coda_dt_ids[] = {
1917         { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1918         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1919         { /* sentinel */ }
1920 };
1921 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1922 #endif
1923
1924 static int coda_probe(struct platform_device *pdev)
1925 {
1926         const struct of_device_id *of_id =
1927                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1928         const struct platform_device_id *pdev_id;
1929         struct coda_dev *dev;
1930         struct resource *res;
1931         int ret, irq;
1932
1933         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1934         if (!dev) {
1935                 dev_err(&pdev->dev, "Not enough memory for %s\n",
1936                         CODA_NAME);
1937                 return -ENOMEM;
1938         }
1939
1940         spin_lock_init(&dev->irqlock);
1941         INIT_LIST_HEAD(&dev->instances);
1942         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
1943         init_completion(&dev->done);
1944         complete(&dev->done);
1945
1946         dev->plat_dev = pdev;
1947         dev->clk_per = devm_clk_get(&pdev->dev, "per");
1948         if (IS_ERR(dev->clk_per)) {
1949                 dev_err(&pdev->dev, "Could not get per clock\n");
1950                 return PTR_ERR(dev->clk_per);
1951         }
1952
1953         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1954         if (IS_ERR(dev->clk_ahb)) {
1955                 dev_err(&pdev->dev, "Could not get ahb clock\n");
1956                 return PTR_ERR(dev->clk_ahb);
1957         }
1958
1959         /* Get  memory for physical registers */
1960         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1961         if (res == NULL) {
1962                 dev_err(&pdev->dev, "failed to get memory region resource\n");
1963                 return -ENOENT;
1964         }
1965
1966         if (devm_request_mem_region(&pdev->dev, res->start,
1967                         resource_size(res), CODA_NAME) == NULL) {
1968                 dev_err(&pdev->dev, "failed to request memory region\n");
1969                 return -ENOENT;
1970         }
1971         dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1972                                       resource_size(res));
1973         if (!dev->regs_base) {
1974                 dev_err(&pdev->dev, "failed to ioremap address region\n");
1975                 return -ENOENT;
1976         }
1977
1978         /* IRQ */
1979         irq = platform_get_irq(pdev, 0);
1980         if (irq < 0) {
1981                 dev_err(&pdev->dev, "failed to get irq resource\n");
1982                 return -ENOENT;
1983         }
1984
1985         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1986                 0, CODA_NAME, dev) < 0) {
1987                 dev_err(&pdev->dev, "failed to request irq\n");
1988                 return -ENOENT;
1989         }
1990
1991         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1992         if (ret)
1993                 return ret;
1994
1995         mutex_init(&dev->dev_mutex);
1996
1997         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1998
1999         if (of_id) {
2000                 dev->devtype = of_id->data;
2001         } else if (pdev_id) {
2002                 dev->devtype = &coda_devdata[pdev_id->driver_data];
2003         } else {
2004                 v4l2_device_unregister(&dev->v4l2_dev);
2005                 return -EINVAL;
2006         }
2007
2008         /* allocate auxiliary per-device buffers for the BIT processor */
2009         switch (dev->devtype->product) {
2010         case CODA_DX6:
2011                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
2012                 break;
2013         default:
2014                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
2015         }
2016         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
2017                                                     &dev->workbuf.paddr,
2018                                                     GFP_KERNEL);
2019         if (!dev->workbuf.vaddr) {
2020                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
2021                 v4l2_device_unregister(&dev->v4l2_dev);
2022                 return -ENOMEM;
2023         }
2024
2025         if (dev->devtype->product == CODA_DX6) {
2026                 dev->iram_paddr = 0xffff4c00;
2027         } else {
2028                 void __iomem *iram_vaddr;
2029
2030                 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
2031                                         &dev->iram_paddr);
2032                 if (!iram_vaddr) {
2033                         dev_err(&pdev->dev, "unable to alloc iram\n");
2034                         return -ENOMEM;
2035                 }
2036         }
2037
2038         platform_set_drvdata(pdev, dev);
2039
2040         return coda_firmware_request(dev);
2041 }
2042
2043 static int coda_remove(struct platform_device *pdev)
2044 {
2045         struct coda_dev *dev = platform_get_drvdata(pdev);
2046
2047         video_unregister_device(&dev->vfd);
2048         if (dev->m2m_dev)
2049                 v4l2_m2m_release(dev->m2m_dev);
2050         if (dev->alloc_ctx)
2051                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2052         v4l2_device_unregister(&dev->v4l2_dev);
2053         if (dev->iram_paddr)
2054                 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
2055         if (dev->codebuf.vaddr)
2056                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2057                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
2058         if (dev->workbuf.vaddr)
2059                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2060                           dev->workbuf.paddr);
2061         return 0;
2062 }
2063
2064 static struct platform_driver coda_driver = {
2065         .probe  = coda_probe,
2066         .remove = coda_remove,
2067         .driver = {
2068                 .name   = CODA_NAME,
2069                 .owner  = THIS_MODULE,
2070                 .of_match_table = of_match_ptr(coda_dt_ids),
2071         },
2072         .id_table = coda_platform_ids,
2073 };
2074
2075 module_platform_driver(coda_driver);
2076
2077 MODULE_LICENSE("GPL");
2078 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2079 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");