2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27 #include <linux/firmware.h>
28 #include <misc/altera.h>
31 #include "tuner-xc2028.h"
32 #include "netup-eeprom.h"
33 #include "netup-init.h"
34 #include "altera-ci.h"
37 #include "cx23888-ir.h"
39 static unsigned int netup_card_rev = 4;
40 module_param(netup_card_rev, int, 0644);
41 MODULE_PARM_DESC(netup_card_rev,
42 "NetUP Dual DVB-T/C CI card revision");
43 static unsigned int enable_885_ir;
44 module_param(enable_885_ir, int, 0644);
45 MODULE_PARM_DESC(enable_885_ir,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
49 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
50 "\t\t\tTeVii S470 (reported unsafe)\n"
51 "\t\t This can cause an interrupt storm with some cards.\n"
52 "\t\t Default: 0 [Disabled]");
54 /* ------------------------------------------------------------------ */
55 /* board config info */
57 struct cx23885_board cx23885_boards[] = {
58 [CX23885_BOARD_UNKNOWN] = {
59 .name = "UNKNOWN/GENERIC",
60 /* Ensure safe default for unknown boards */
63 .type = CX23885_VMUX_COMPOSITE1,
66 .type = CX23885_VMUX_COMPOSITE2,
69 .type = CX23885_VMUX_COMPOSITE3,
72 .type = CX23885_VMUX_COMPOSITE4,
76 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
77 .name = "Hauppauge WinTV-HVR1800lp",
78 .portc = CX23885_MPEG_DVB,
80 .type = CX23885_VMUX_TELEVISION,
84 .type = CX23885_VMUX_DEBUG,
88 .type = CX23885_VMUX_COMPOSITE1,
92 .type = CX23885_VMUX_SVIDEO,
97 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
98 .name = "Hauppauge WinTV-HVR1800",
99 .porta = CX23885_ANALOG_VIDEO,
100 .portb = CX23885_MPEG_ENCODER,
101 .portc = CX23885_MPEG_DVB,
102 .tuner_type = TUNER_PHILIPS_TDA8290,
103 .tuner_addr = 0x42, /* 0x84 >> 1 */
106 .type = CX23885_VMUX_TELEVISION,
107 .vmux = CX25840_VIN7_CH3 |
110 .amux = CX25840_AUDIO8,
113 .type = CX23885_VMUX_COMPOSITE1,
114 .vmux = CX25840_VIN7_CH3 |
117 .amux = CX25840_AUDIO7,
120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = CX25840_VIN7_CH3 |
125 .amux = CX25840_AUDIO7,
129 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
130 .name = "Hauppauge WinTV-HVR1250",
131 .porta = CX23885_ANALOG_VIDEO,
132 .portc = CX23885_MPEG_DVB,
133 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
134 .tuner_type = TUNER_PHILIPS_TDA8290,
135 .tuner_addr = 0x42, /* 0x84 >> 1 */
140 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
141 .type = CX23885_VMUX_TELEVISION,
142 .vmux = CX25840_VIN7_CH3 |
145 .amux = CX25840_AUDIO8,
149 .type = CX23885_VMUX_COMPOSITE1,
150 .vmux = CX25840_VIN7_CH3 |
153 .amux = CX25840_AUDIO7,
156 .type = CX23885_VMUX_SVIDEO,
157 .vmux = CX25840_VIN7_CH3 |
161 .amux = CX25840_AUDIO7,
165 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
166 .name = "DViCO FusionHDTV5 Express",
167 .portb = CX23885_MPEG_DVB,
169 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
170 .name = "Hauppauge WinTV-HVR1500Q",
171 .portc = CX23885_MPEG_DVB,
173 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
174 .name = "Hauppauge WinTV-HVR1500",
175 .porta = CX23885_ANALOG_VIDEO,
176 .portc = CX23885_MPEG_DVB,
177 .tuner_type = TUNER_XC2028,
178 .tuner_addr = 0x61, /* 0xc2 >> 1 */
180 .type = CX23885_VMUX_TELEVISION,
181 .vmux = CX25840_VIN7_CH3 |
186 .type = CX23885_VMUX_COMPOSITE1,
187 .vmux = CX25840_VIN7_CH3 |
192 .type = CX23885_VMUX_SVIDEO,
193 .vmux = CX25840_VIN7_CH3 |
200 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
201 .name = "Hauppauge WinTV-HVR1200",
202 .portc = CX23885_MPEG_DVB,
204 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
205 .name = "Hauppauge WinTV-HVR1700",
206 .portc = CX23885_MPEG_DVB,
208 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
209 .name = "Hauppauge WinTV-HVR1400",
210 .portc = CX23885_MPEG_DVB,
212 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
213 .name = "DViCO FusionHDTV7 Dual Express",
214 .portb = CX23885_MPEG_DVB,
215 .portc = CX23885_MPEG_DVB,
217 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
218 .name = "DViCO FusionHDTV DVB-T Dual Express",
219 .portb = CX23885_MPEG_DVB,
220 .portc = CX23885_MPEG_DVB,
222 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
223 .name = "Leadtek Winfast PxDVR3200 H",
224 .portc = CX23885_MPEG_DVB,
226 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
227 .name = "Leadtek Winfast PxDVR3200 H XC4000",
228 .porta = CX23885_ANALOG_VIDEO,
229 .portc = CX23885_MPEG_DVB,
230 .tuner_type = TUNER_XC4000,
233 .radio_addr = ADDR_UNSET,
235 .type = CX23885_VMUX_TELEVISION,
236 .vmux = CX25840_VIN2_CH1 |
240 .type = CX23885_VMUX_COMPOSITE1,
241 .vmux = CX25840_COMPOSITE1,
243 .type = CX23885_VMUX_SVIDEO,
244 .vmux = CX25840_SVIDEO_LUMA3 |
245 CX25840_SVIDEO_CHROMA4,
247 .type = CX23885_VMUX_COMPONENT,
248 .vmux = CX25840_VIN7_CH1 |
251 CX25840_COMPONENT_ON,
254 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
255 .name = "Compro VideoMate E650F",
256 .portc = CX23885_MPEG_DVB,
258 [CX23885_BOARD_TBS_6920] = {
259 .name = "TurboSight TBS 6920",
260 .portb = CX23885_MPEG_DVB,
262 [CX23885_BOARD_TEVII_S470] = {
263 .name = "TeVii S470",
264 .portb = CX23885_MPEG_DVB,
266 [CX23885_BOARD_DVBWORLD_2005] = {
267 .name = "DVBWorld DVB-S2 2005",
268 .portb = CX23885_MPEG_DVB,
270 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
272 .name = "NetUP Dual DVB-S2 CI",
273 .portb = CX23885_MPEG_DVB,
274 .portc = CX23885_MPEG_DVB,
276 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
277 .name = "Hauppauge WinTV-HVR1270",
278 .portc = CX23885_MPEG_DVB,
280 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
281 .name = "Hauppauge WinTV-HVR1275",
282 .portc = CX23885_MPEG_DVB,
284 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
285 .name = "Hauppauge WinTV-HVR1255",
286 .porta = CX23885_ANALOG_VIDEO,
287 .portc = CX23885_MPEG_DVB,
288 .tuner_type = TUNER_ABSENT,
289 .tuner_addr = 0x42, /* 0x84 >> 1 */
292 .type = CX23885_VMUX_TELEVISION,
293 .vmux = CX25840_VIN7_CH3 |
297 .amux = CX25840_AUDIO8,
299 .type = CX23885_VMUX_COMPOSITE1,
300 .vmux = CX25840_VIN7_CH3 |
303 .amux = CX25840_AUDIO7,
305 .type = CX23885_VMUX_SVIDEO,
306 .vmux = CX25840_VIN7_CH3 |
310 .amux = CX25840_AUDIO7,
313 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
314 .name = "Hauppauge WinTV-HVR1255",
315 .porta = CX23885_ANALOG_VIDEO,
316 .portc = CX23885_MPEG_DVB,
317 .tuner_type = TUNER_ABSENT,
318 .tuner_addr = 0x42, /* 0x84 >> 1 */
321 .type = CX23885_VMUX_TELEVISION,
322 .vmux = CX25840_VIN7_CH3 |
326 .amux = CX25840_AUDIO8,
328 .type = CX23885_VMUX_SVIDEO,
329 .vmux = CX25840_VIN7_CH3 |
333 .amux = CX25840_AUDIO7,
336 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
337 .name = "Hauppauge WinTV-HVR1210",
338 .portc = CX23885_MPEG_DVB,
340 [CX23885_BOARD_MYGICA_X8506] = {
341 .name = "Mygica X8506 DMB-TH",
342 .tuner_type = TUNER_XC5000,
345 .porta = CX23885_ANALOG_VIDEO,
346 .portb = CX23885_MPEG_DVB,
349 .type = CX23885_VMUX_TELEVISION,
350 .vmux = CX25840_COMPOSITE2,
353 .type = CX23885_VMUX_COMPOSITE1,
354 .vmux = CX25840_COMPOSITE8,
357 .type = CX23885_VMUX_SVIDEO,
358 .vmux = CX25840_SVIDEO_LUMA3 |
359 CX25840_SVIDEO_CHROMA4,
362 .type = CX23885_VMUX_COMPONENT,
363 .vmux = CX25840_COMPONENT_ON |
370 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
371 .name = "Magic-Pro ProHDTV Extreme 2",
372 .tuner_type = TUNER_XC5000,
375 .porta = CX23885_ANALOG_VIDEO,
376 .portb = CX23885_MPEG_DVB,
379 .type = CX23885_VMUX_TELEVISION,
380 .vmux = CX25840_COMPOSITE2,
383 .type = CX23885_VMUX_COMPOSITE1,
384 .vmux = CX25840_COMPOSITE8,
387 .type = CX23885_VMUX_SVIDEO,
388 .vmux = CX25840_SVIDEO_LUMA3 |
389 CX25840_SVIDEO_CHROMA4,
392 .type = CX23885_VMUX_COMPONENT,
393 .vmux = CX25840_COMPONENT_ON |
400 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
401 .name = "Hauppauge WinTV-HVR1850",
402 .porta = CX23885_ANALOG_VIDEO,
403 .portb = CX23885_MPEG_ENCODER,
404 .portc = CX23885_MPEG_DVB,
405 .tuner_type = TUNER_ABSENT,
406 .tuner_addr = 0x42, /* 0x84 >> 1 */
409 .type = CX23885_VMUX_TELEVISION,
410 .vmux = CX25840_VIN7_CH3 |
414 .amux = CX25840_AUDIO8,
416 .type = CX23885_VMUX_COMPOSITE1,
417 .vmux = CX25840_VIN7_CH3 |
420 .amux = CX25840_AUDIO7,
422 .type = CX23885_VMUX_SVIDEO,
423 .vmux = CX25840_VIN7_CH3 |
427 .amux = CX25840_AUDIO7,
430 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
431 .name = "Compro VideoMate E800",
432 .portc = CX23885_MPEG_DVB,
434 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
435 .name = "Hauppauge WinTV-HVR1290",
436 .portc = CX23885_MPEG_DVB,
438 [CX23885_BOARD_MYGICA_X8558PRO] = {
439 .name = "Mygica X8558 PRO DMB-TH",
440 .portb = CX23885_MPEG_DVB,
441 .portc = CX23885_MPEG_DVB,
443 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
444 .name = "LEADTEK WinFast PxTV1200",
445 .porta = CX23885_ANALOG_VIDEO,
446 .tuner_type = TUNER_XC2028,
450 .type = CX23885_VMUX_TELEVISION,
451 .vmux = CX25840_VIN2_CH1 |
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_COMPOSITE1,
458 .type = CX23885_VMUX_SVIDEO,
459 .vmux = CX25840_SVIDEO_LUMA3 |
460 CX25840_SVIDEO_CHROMA4,
462 .type = CX23885_VMUX_COMPONENT,
463 .vmux = CX25840_VIN7_CH1 |
466 CX25840_COMPONENT_ON,
469 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
470 .name = "GoTView X5 3D Hybrid",
471 .tuner_type = TUNER_XC5000,
474 .porta = CX23885_ANALOG_VIDEO,
475 .portb = CX23885_MPEG_DVB,
477 .type = CX23885_VMUX_TELEVISION,
478 .vmux = CX25840_VIN2_CH1 |
482 .type = CX23885_VMUX_COMPOSITE1,
483 .vmux = CX23885_VMUX_COMPOSITE1,
485 .type = CX23885_VMUX_SVIDEO,
486 .vmux = CX25840_SVIDEO_LUMA3 |
487 CX25840_SVIDEO_CHROMA4,
490 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
492 .name = "NetUP Dual DVB-T/C-CI RF",
493 .porta = CX23885_ANALOG_VIDEO,
494 .portb = CX23885_MPEG_DVB,
495 .portc = CX23885_MPEG_DVB,
498 .tuner_type = TUNER_XC5000,
501 .type = CX23885_VMUX_TELEVISION,
502 .vmux = CX25840_COMPOSITE1,
505 [CX23885_BOARD_MPX885] = {
507 .porta = CX23885_ANALOG_VIDEO,
509 .type = CX23885_VMUX_COMPOSITE1,
510 .vmux = CX25840_COMPOSITE1,
511 .amux = CX25840_AUDIO6,
514 .type = CX23885_VMUX_COMPOSITE2,
515 .vmux = CX25840_COMPOSITE2,
516 .amux = CX25840_AUDIO6,
519 .type = CX23885_VMUX_COMPOSITE3,
520 .vmux = CX25840_COMPOSITE3,
521 .amux = CX25840_AUDIO7,
524 .type = CX23885_VMUX_COMPOSITE4,
525 .vmux = CX25840_COMPOSITE4,
526 .amux = CX25840_AUDIO7,
530 [CX23885_BOARD_MYGICA_X8507] = {
531 .name = "Mygica X8507",
532 .tuner_type = TUNER_XC5000,
535 .porta = CX23885_ANALOG_VIDEO,
538 .type = CX23885_VMUX_TELEVISION,
539 .vmux = CX25840_COMPOSITE2,
540 .amux = CX25840_AUDIO8,
543 .type = CX23885_VMUX_COMPOSITE1,
544 .vmux = CX25840_COMPOSITE8,
547 .type = CX23885_VMUX_SVIDEO,
548 .vmux = CX25840_SVIDEO_LUMA3 |
549 CX25840_SVIDEO_CHROMA4,
552 .type = CX23885_VMUX_COMPONENT,
553 .vmux = CX25840_COMPONENT_ON |
560 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
561 .name = "TerraTec Cinergy T PCIe Dual",
562 .portb = CX23885_MPEG_DVB,
563 .portc = CX23885_MPEG_DVB,
565 [CX23885_BOARD_TEVII_S471] = {
566 .name = "TeVii S471",
567 .portb = CX23885_MPEG_DVB,
569 [CX23885_BOARD_PROF_8000] = {
570 .name = "Prof Revolution DVB-S2 8000",
571 .portb = CX23885_MPEG_DVB,
574 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
576 /* ------------------------------------------------------------------ */
577 /* PCI subsystem IDs */
579 struct cx23885_subid cx23885_subids[] = {
583 .card = CX23885_BOARD_UNKNOWN,
587 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
591 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
595 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
599 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
603 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
607 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
611 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
615 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
619 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
623 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
627 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
631 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
635 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
639 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
643 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
647 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
651 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
655 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
659 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
663 .card = CX23885_BOARD_TBS_6920,
667 .card = CX23885_BOARD_TEVII_S470,
671 .card = CX23885_BOARD_DVBWORLD_2005,
675 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
679 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
683 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
687 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
691 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
695 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
699 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
703 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
707 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
711 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
715 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
719 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
723 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
727 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
731 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
735 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
739 .card = CX23885_BOARD_MYGICA_X8506,
743 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
747 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
751 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
755 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
759 .card = CX23885_BOARD_MYGICA_X8558PRO,
763 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
767 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
771 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
775 .card = CX23885_BOARD_MYGICA_X8507,
779 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
783 .card = CX23885_BOARD_TEVII_S471,
787 .card = CX23885_BOARD_PROF_8000,
790 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
792 void cx23885_card_list(struct cx23885_dev *dev)
796 if (0 == dev->pci->subsystem_vendor &&
797 0 == dev->pci->subsystem_device) {
799 "%s: Board has no valid PCIe Subsystem ID and can't\n"
800 "%s: be autodetected. Pass card=<n> insmod option\n"
801 "%s: to workaround that. Redirect complaints to the\n"
802 "%s: vendor of the TV card. Best regards,\n"
804 dev->name, dev->name, dev->name, dev->name, dev->name);
807 "%s: Your board isn't known (yet) to the driver.\n"
808 "%s: Try to pick one of the existing card configs via\n"
809 "%s: card=<n> insmod option. Updating to the latest\n"
810 "%s: version might help as well.\n",
811 dev->name, dev->name, dev->name, dev->name);
813 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
815 for (i = 0; i < cx23885_bcount; i++)
816 printk(KERN_INFO "%s: card=%d -> %s\n",
817 dev->name, i, cx23885_boards[i].name);
820 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
824 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
827 /* Make sure we support the board model */
830 /* WinTV-HVR1270 (PCIe, Retail, half height)
831 * ATSC/QAM and basic analog, IR Blast */
833 /* WinTV-HVR1210 (PCIe, Retail, half height)
834 * DVB-T and basic analog, IR Blast */
836 /* WinTV-HVR1270 (PCIe, Retail, half height)
837 * ATSC/QAM and basic analog, IR Recv */
839 /* WinTV-HVR1210 (PCIe, Retail, half height)
840 * DVB-T and basic analog, IR Recv */
842 /* WinTV-HVR1275 (PCIe, Retail, half height)
843 * ATSC/QAM and basic analog, IR Recv */
845 /* WinTV-HVR1210 (PCIe, Retail, half height)
846 * DVB-T and basic analog, IR Recv */
848 /* WinTV-HVR1270 (PCIe, Retail, full height)
849 * ATSC/QAM and basic analog, IR Blast */
851 /* WinTV-HVR1210 (PCIe, Retail, full height)
852 * DVB-T and basic analog, IR Blast */
854 /* WinTV-HVR1270 (PCIe, Retail, full height)
855 * ATSC/QAM and basic analog, IR Recv */
857 /* WinTV-HVR1210 (PCIe, Retail, full height)
858 * DVB-T and basic analog, IR Recv */
860 /* WinTV-HVR1275 (PCIe, Retail, full height)
861 * ATSC/QAM and basic analog, IR Recv */
863 /* WinTV-HVR1210 (PCIe, Retail, full height)
864 * DVB-T and basic analog, IR Recv */
866 /* WinTV-HVR1200 (PCIe, Retail, full height)
867 * DVB-T and basic analog */
869 /* WinTV-HVR1200 (PCIe, OEM, half height)
870 * DVB-T and basic analog */
872 /* WinTV-HVR1200 (PCIe, OEM, half height)
873 * DVB-T and basic analog */
875 /* WinTV-HVR1200 (PCIe, OEM, full height)
876 * DVB-T and basic analog */
878 /* WinTV-HVR1200 (PCIe, OEM, half height)
879 * DVB-T and basic analog */
881 /* WinTV-HVR1200 (PCIe, OEM, full height)
882 * DVB-T and basic analog */
884 /* WinTV-HVR1200 (PCIe, OEM, full height)
885 * DVB-T and basic analog */
887 /* WinTV-HVR1200 (PCIe, OEM, half height)
888 * DVB-T and basic analog */
890 /* WinTV-HVR1200 (PCIe, OEM, full height)
891 * DVB-T and basic analog */
893 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
894 channel ATSC and MPEG2 HW Encoder */
896 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
899 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
902 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
905 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
908 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
909 Dual channel ATSC and MPEG2 HW Encoder */
911 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
912 Dual channel ATSC and MPEG2 HW Encoder */
914 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
915 Dual channel ATSC and MPEG2 HW Encoder */
917 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
918 Dual channel ATSC and MPEG2 HW Encoder */
920 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
921 Dual channel ATSC and MPEG2 HW Encoder */
923 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
924 ATSC and Basic analog */
926 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
927 ATSC and Basic analog */
929 /* WinTV-HVR1250 (PCIe, No IR, half height,
930 ATSC [at least] and Basic analog) */
932 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
933 ATSC and Basic analog */
935 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
936 ATSC and Basic analog */
938 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
939 ATSC and Basic analog */
941 /* WinTV-HVR1400 (Express Card, Retail, IR,
942 * DVB-T and Basic analog */
944 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
945 * DVB-T and MPEG2 HW Encoder */
947 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
948 * DVB-T and MPEG2 HW Encoder */
951 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
952 Dual channel ATSC and MPEG2 HW Encoder */
955 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
956 Dual channel ATSC and Basic analog */
959 printk(KERN_WARNING "%s: warning: "
960 "unknown hauppauge model #%d\n",
961 dev->name, tv.model);
965 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
966 dev->name, tv.model);
969 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
971 struct cx23885_tsport *port = priv;
972 struct cx23885_dev *dev = port->dev;
975 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
979 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
984 switch (dev->board) {
985 case CX23885_BOARD_HAUPPAUGE_HVR1400:
986 case CX23885_BOARD_HAUPPAUGE_HVR1500:
987 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
988 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
989 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
990 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
991 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
992 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
993 /* Tuner Reset Command */
996 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
997 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
998 /* Two identical tuners on two different i2c buses,
999 * we need to reset the correct gpio. */
1002 else if (port->nr == 2)
1005 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1006 /* Tuner Reset Command */
1009 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1010 altera_ci_tuner_reset(dev, port->nr);
1015 /* Drive the tuner into reset and back out */
1016 cx_clear(GP0_IO, bitmask);
1018 cx_set(GP0_IO, bitmask);
1024 void cx23885_gpio_setup(struct cx23885_dev *dev)
1026 switch (dev->board) {
1027 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1028 /* GPIO-0 cx24227 demodulator reset */
1029 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1031 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1032 /* GPIO-0 cx24227 demodulator */
1033 /* GPIO-2 xc3028 tuner */
1035 /* Put the parts into reset */
1036 cx_set(GP0_IO, 0x00050000);
1037 cx_clear(GP0_IO, 0x00000005);
1040 /* Bring the parts out of reset */
1041 cx_set(GP0_IO, 0x00050005);
1043 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1044 /* GPIO-0 cx24227 demodulator reset */
1045 /* GPIO-2 xc5000 tuner reset */
1046 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1048 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1049 /* GPIO-0 656_CLK */
1051 /* GPIO-2 8295A Reset */
1052 /* GPIO-3-10 cx23417 data0-7 */
1053 /* GPIO-11-14 cx23417 addr0-3 */
1054 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1057 /* CX23417 GPIO's */
1058 /* EIO15 Zilog Reset */
1059 /* EIO14 S5H1409/CX24227 Reset */
1060 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1062 /* Put the demod into reset and protect the eeprom */
1063 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1066 /* Bring the demod and blaster out of reset */
1067 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1070 /* Force the TDA8295A into reset and back */
1071 cx23885_gpio_enable(dev, GPIO_2, 1);
1072 cx23885_gpio_set(dev, GPIO_2);
1074 cx23885_gpio_clear(dev, GPIO_2);
1076 cx23885_gpio_set(dev, GPIO_2);
1079 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1080 /* GPIO-0 tda10048 demodulator reset */
1081 /* GPIO-2 tda18271 tuner reset */
1083 /* Put the parts into reset and back */
1084 cx_set(GP0_IO, 0x00050000);
1086 cx_clear(GP0_IO, 0x00000005);
1088 cx_set(GP0_IO, 0x00050005);
1090 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1091 /* GPIO-0 TDA10048 demodulator reset */
1092 /* GPIO-2 TDA8295A Reset */
1093 /* GPIO-3-10 cx23417 data0-7 */
1094 /* GPIO-11-14 cx23417 addr0-3 */
1095 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1097 /* The following GPIO's are on the interna AVCore (cx25840) */
1099 /* GPIO-20 IR_TX 416/DVBT Select */
1100 /* GPIO-21 IIS DAT */
1101 /* GPIO-22 IIS WCLK */
1102 /* GPIO-23 IIS BCLK */
1104 /* Put the parts into reset and back */
1105 cx_set(GP0_IO, 0x00050000);
1107 cx_clear(GP0_IO, 0x00000005);
1109 cx_set(GP0_IO, 0x00050005);
1111 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1112 /* GPIO-0 Dibcom7000p demodulator reset */
1113 /* GPIO-2 xc3028L tuner reset */
1116 /* Put the parts into reset and back */
1117 cx_set(GP0_IO, 0x00050000);
1119 cx_clear(GP0_IO, 0x00000005);
1121 cx_set(GP0_IO, 0x00050005);
1123 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1124 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1125 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1126 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1127 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1129 /* Put the parts into reset and back */
1130 cx_set(GP0_IO, 0x000f0000);
1132 cx_clear(GP0_IO, 0x0000000f);
1134 cx_set(GP0_IO, 0x000f000f);
1136 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1137 /* GPIO-0 portb xc3028 reset */
1138 /* GPIO-1 portb zl10353 reset */
1139 /* GPIO-2 portc xc3028 reset */
1140 /* GPIO-3 portc zl10353 reset */
1142 /* Put the parts into reset and back */
1143 cx_set(GP0_IO, 0x000f0000);
1145 cx_clear(GP0_IO, 0x0000000f);
1147 cx_set(GP0_IO, 0x000f000f);
1149 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1150 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1151 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1152 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1153 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1154 /* GPIO-2 xc3028 tuner reset */
1156 /* The following GPIO's are on the internal AVCore (cx25840) */
1157 /* GPIO-? zl10353 demod reset */
1159 /* Put the parts into reset and back */
1160 cx_set(GP0_IO, 0x00040000);
1162 cx_clear(GP0_IO, 0x00000004);
1164 cx_set(GP0_IO, 0x00040004);
1166 case CX23885_BOARD_TBS_6920:
1167 case CX23885_BOARD_PROF_8000:
1168 cx_write(MC417_CTL, 0x00000036);
1169 cx_write(MC417_OEN, 0x00001000);
1170 cx_set(MC417_RWD, 0x00000002);
1172 cx_clear(MC417_RWD, 0x00000800);
1174 cx_set(MC417_RWD, 0x00000800);
1177 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1178 /* GPIO-0 INTA from CiMax1
1179 GPIO-1 INTB from CiMax2
1181 GPIO-3 to GPIO-10 data/addr for CA
1182 GPIO-11 ~CS0 to CiMax1
1183 GPIO-12 ~CS1 to CiMax2
1184 GPIO-13 ADL0 load LSB addr
1185 GPIO-14 ADL1 load MSB addr
1186 GPIO-15 ~RDY from CiMax
1187 GPIO-17 ~RD to CiMax
1188 GPIO-18 ~WR to CiMax
1190 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1191 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1192 cx_clear(GP0_IO, 0x00030004);
1193 mdelay(100);/* reset delay */
1194 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1195 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1196 /* GPIO-15 IN as ~ACK, rest as OUT */
1197 cx_write(MC417_OEN, 0x00001000);
1198 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1199 cx_write(MC417_RWD, 0x0000c300);
1201 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1203 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1204 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1205 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1206 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1207 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1208 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1209 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1210 /* GPIO-9 Demod reset */
1212 /* Put the parts into reset and back */
1213 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1214 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1215 cx23885_gpio_clear(dev, GPIO_9);
1217 cx23885_gpio_set(dev, GPIO_9);
1219 case CX23885_BOARD_MYGICA_X8506:
1220 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1221 case CX23885_BOARD_MYGICA_X8507:
1222 /* GPIO-0 (0)Analog / (1)Digital TV */
1223 /* GPIO-1 reset XC5000 */
1224 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
1225 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1226 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1228 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1231 case CX23885_BOARD_MYGICA_X8558PRO:
1232 /* GPIO-0 reset first ATBM8830 */
1233 /* GPIO-1 reset second ATBM8830 */
1234 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1235 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1237 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1240 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1241 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1242 /* GPIO-0 656_CLK */
1245 /* GPIO-3-10 cx23417 data0-7 */
1246 /* GPIO-11-14 cx23417 addr0-3 */
1247 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1249 /* GPIO-20 C_IR_TX */
1250 /* GPIO-21 I2S DAT */
1251 /* GPIO-22 I2S WCLK */
1252 /* GPIO-23 I2S BCLK */
1253 /* ALT GPIO: EXP GPIO LATCH */
1255 /* CX23417 GPIO's */
1256 /* GPIO-14 S5H1411/CX24228 Reset */
1257 /* GPIO-13 EEPROM write protect */
1258 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1260 /* Put the demod into reset and protect the eeprom */
1261 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1264 /* Bring the demod out of reset */
1265 mc417_gpio_set(dev, GPIO_14);
1269 /* Connected to IF / Mux */
1271 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1272 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1274 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1277 GPIO-2 ~reset chips out
1278 GPIO-3 to GPIO-10 data/addr for CA in/out
1288 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1289 /* GPIO-0 as INT, reset & TMS low */
1290 cx_clear(GP0_IO, 0x00010006);
1291 mdelay(100);/* reset delay */
1292 cx_set(GP0_IO, 0x00000004); /* reset high */
1293 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1294 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1295 cx_write(MC417_OEN, 0x00005000);
1296 /* ~RD, ~WR high; ADDR low; ~CS high */
1297 cx_write(MC417_RWD, 0x00000d00);
1299 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1304 int cx23885_ir_init(struct cx23885_dev *dev)
1306 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1308 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1309 .pin = CX23885_PIN_IR_RX_GPIO19,
1310 .function = CX23885_PAD_IR_RX,
1312 .strength = CX25840_PIN_DRIVE_MEDIUM,
1314 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1315 .pin = CX23885_PIN_IR_TX_GPIO20,
1316 .function = CX23885_PAD_IR_TX,
1318 .strength = CX25840_PIN_DRIVE_MEDIUM,
1321 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1323 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1325 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1326 .pin = CX23885_PIN_IR_RX_GPIO19,
1327 .function = CX23885_PAD_IR_RX,
1329 .strength = CX25840_PIN_DRIVE_MEDIUM,
1332 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1334 struct v4l2_subdev_ir_parameters params;
1336 switch (dev->board) {
1337 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1338 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1339 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1340 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1341 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1342 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1343 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1344 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1345 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1346 /* FIXME: Implement me */
1348 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1349 ret = cx23888_ir_probe(dev);
1352 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1353 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1354 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1356 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1357 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1358 ret = cx23888_ir_probe(dev);
1361 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1362 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1363 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1365 * For these boards we need to invert the Tx output via the
1366 * IR controller to have the LED off while idle
1368 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms);
1369 params.enable = false;
1370 params.shutdown = false;
1371 params.invert_level = true;
1372 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1373 params.shutdown = true;
1374 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms);
1376 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1377 case CX23885_BOARD_TEVII_S470:
1380 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1381 if (dev->sd_ir == NULL) {
1385 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1386 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1388 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1391 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1392 if (dev->sd_ir == NULL) {
1396 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1397 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1399 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1400 request_module("ir-kbd-i2c");
1407 void cx23885_ir_fini(struct cx23885_dev *dev)
1409 switch (dev->board) {
1410 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1411 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1412 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1413 cx23885_irq_remove(dev, PCI_MSK_IR);
1414 cx23888_ir_remove(dev);
1417 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1418 case CX23885_BOARD_TEVII_S470:
1419 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1420 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1421 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1427 int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1431 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1433 data = ((cx_read(GP0_IO)) & (~0x00000002));
1434 data |= (tms ? 0x00020002 : 0x00020000);
1435 cx_write(GP0_IO, data);
1438 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1439 data |= (tdi ? 0x00008000 : 0);
1440 cx_write(MC417_RWD, data);
1442 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1444 cx_write(MC417_RWD, data | 0x00002000);
1447 cx_write(MC417_RWD, data);
1452 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1454 switch (dev->board) {
1455 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1456 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1457 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1459 cx23885_irq_add_enable(dev, PCI_MSK_IR);
1461 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1462 case CX23885_BOARD_TEVII_S470:
1463 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1465 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1470 void cx23885_card_setup(struct cx23885_dev *dev)
1472 struct cx23885_tsport *ts1 = &dev->ts1;
1473 struct cx23885_tsport *ts2 = &dev->ts2;
1475 static u8 eeprom[256];
1477 if (dev->i2c_bus[0].i2c_rc == 0) {
1478 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1479 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1480 eeprom, sizeof(eeprom));
1483 switch (dev->board) {
1484 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1485 if (dev->i2c_bus[0].i2c_rc == 0) {
1486 if (eeprom[0x80] != 0x84)
1487 hauppauge_eeprom(dev, eeprom+0xc0);
1489 hauppauge_eeprom(dev, eeprom+0x80);
1492 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1493 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1494 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1495 if (dev->i2c_bus[0].i2c_rc == 0)
1496 hauppauge_eeprom(dev, eeprom+0x80);
1498 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1499 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1500 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1501 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1502 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1503 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1504 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1505 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1506 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1507 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1508 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1509 if (dev->i2c_bus[0].i2c_rc == 0)
1510 hauppauge_eeprom(dev, eeprom+0xc0);
1514 switch (dev->board) {
1515 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1516 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1517 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1518 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1519 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1520 /* break omitted intentionally */
1521 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1522 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1523 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1524 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1526 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1527 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1528 /* Defaults for VID B - Analog encoder */
1529 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1530 ts1->gen_ctrl_val = 0x10e;
1531 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1532 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1534 /* APB_TSVALERR_POL (active low)*/
1535 ts1->vld_misc_val = 0x2000;
1536 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1537 cx_write(0x130184, 0xc);
1539 /* Defaults for VID C */
1540 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1541 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1542 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1544 case CX23885_BOARD_TBS_6920:
1545 ts1->gen_ctrl_val = 0x4; /* Parallel */
1546 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1547 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1549 case CX23885_BOARD_TEVII_S470:
1550 case CX23885_BOARD_TEVII_S471:
1551 case CX23885_BOARD_DVBWORLD_2005:
1552 case CX23885_BOARD_PROF_8000:
1553 ts1->gen_ctrl_val = 0x5; /* Parallel */
1554 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1555 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1557 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1558 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1559 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1560 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1561 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1562 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1563 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1564 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1565 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1567 case CX23885_BOARD_MYGICA_X8506:
1568 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1569 ts1->gen_ctrl_val = 0x5; /* Parallel */
1570 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1571 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1573 case CX23885_BOARD_MYGICA_X8558PRO:
1574 ts1->gen_ctrl_val = 0x5; /* Parallel */
1575 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1576 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1577 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1578 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1579 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1581 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1582 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1583 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1584 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1585 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1586 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1587 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1588 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1589 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1590 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1591 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1592 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1593 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1594 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1595 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1596 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1597 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1598 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1600 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1601 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1602 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1605 /* Certain boards support analog, or require the avcore to be
1606 * loaded, ensure this happens.
1608 switch (dev->board) {
1609 case CX23885_BOARD_TEVII_S470:
1610 /* Currently only enabled for the integrated IR controller */
1613 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1614 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1615 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1616 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1617 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1618 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1619 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1620 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1621 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1622 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1623 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1624 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1625 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1626 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1627 case CX23885_BOARD_MYGICA_X8506:
1628 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1629 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1630 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1631 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1632 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1633 case CX23885_BOARD_MPX885:
1634 case CX23885_BOARD_MYGICA_X8507:
1635 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1636 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1637 &dev->i2c_bus[2].i2c_adap,
1638 "cx25840", 0x88 >> 1, NULL);
1639 if (dev->sd_cx25840) {
1640 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1641 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1646 /* AUX-PLL 27MHz CLK */
1647 switch (dev->board) {
1648 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1649 netup_initialize(dev);
1651 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1653 const struct firmware *fw;
1654 const char *filename = "dvb-netup-altera-01.fw";
1655 char *action = "configure";
1656 static struct netup_card_info cinfo;
1657 struct altera_config netup_config = {
1660 .jtag_io = netup_jtag_io,
1663 netup_initialize(dev);
1665 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1667 cinfo.rev = netup_card_rev;
1669 switch (cinfo.rev) {
1671 filename = "dvb-netup-altera-04.fw";
1674 filename = "dvb-netup-altera-01.fw";
1677 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1678 cinfo.rev, filename);
1680 ret = request_firmware(&fw, filename, &dev->pci->dev);
1682 printk(KERN_ERR "did not find the firmware file. (%s) "
1683 "Please see linux/Documentation/dvb/ for more details "
1684 "on firmware-problems.", filename);
1686 altera_init(&netup_config, fw);
1688 release_firmware(fw);
1694 /* ------------------------------------------------------------------ */