Pileus Git - ~andy/linux/blob - drivers/media/dvb/frontends/stv090x.c

   1 /*
   2         STV0900/0903 Multistandard Broadcast Frontend driver
   3         Copyright (C) Manu Abraham <abraham.manu@gmail.com>
   4
   5         Copyright (C) ST Microelectronics
   6
   7         This program is free software; you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation; either version 2 of the License, or
  10         (at your option) any later version.
  11
  12         This program is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with this program; if not, write to the Free Software
  19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/mutex.h>
  27
  28 #include <linux/dvb/frontend.h>
  29 #include "dvb_frontend.h"
  30
  31 #include "stv6110x.h" /* for demodulator internal modes */
  32
  33 #include "stv090x_reg.h"
  34 #include "stv090x.h"
  35 #include "stv090x_priv.h"
  36
  37 static unsigned int verbose;
  38 module_param(verbose, int, 0644);
  39
  40 struct mutex demod_lock;
  41
  42 /* DVBS1 and DSS C/N Lookup table */
  43 static const struct stv090x_tab stv090x_s1cn_tab[] = {
  44         {   0, 8917 }, /*  0.0dB */
  45         {   5, 8801 }, /*  0.5dB */
  46         {  10, 8667 }, /*  1.0dB */
  47         {  15, 8522 }, /*  1.5dB */
  48         {  20, 8355 }, /*  2.0dB */
  49         {  25, 8175 }, /*  2.5dB */
  50         {  30, 7979 }, /*  3.0dB */
  51         {  35, 7763 }, /*  3.5dB */
  52         {  40, 7530 }, /*  4.0dB */
  53         {  45, 7282 }, /*  4.5dB */
  54         {  50, 7026 }, /*  5.0dB */
  55         {  55, 6781 }, /*  5.5dB */
  56         {  60, 6514 }, /*  6.0dB */
  57         {  65, 6241 }, /*  6.5dB */
  58         {  70, 5965 }, /*  7.0dB */
  59         {  75, 5690 }, /*  7.5dB */
  60         {  80, 5424 }, /*  8.0dB */
  61         {  85, 5161 }, /*  8.5dB */
  62         {  90, 4902 }, /*  9.0dB */
  63         {  95, 4654 }, /*  9.5dB */
  64         { 100, 4417 }, /* 10.0dB */
  65         { 105, 4186 }, /* 10.5dB */
  66         { 110, 3968 }, /* 11.0dB */
  67         { 115, 3757 }, /* 11.5dB */
  68         { 120, 3558 }, /* 12.0dB */
  69         { 125, 3366 }, /* 12.5dB */
  70         { 130, 3185 }, /* 13.0dB */
  71         { 135, 3012 }, /* 13.5dB */
  72         { 140, 2850 }, /* 14.0dB */
  73         { 145, 2698 }, /* 14.5dB */
  74         { 150, 2550 }, /* 15.0dB */
  75         { 160, 2283 }, /* 16.0dB */
  76         { 170, 2042 }, /* 17.0dB */
  77         { 180, 1827 }, /* 18.0dB */
  78         { 190, 1636 }, /* 19.0dB */
  79         { 200, 1466 }, /* 20.0dB */
  80         { 210, 1315 }, /* 21.0dB */
  81         { 220, 1181 }, /* 22.0dB */
  82         { 230, 1064 }, /* 23.0dB */
  83         { 240,  960 }, /* 24.0dB */
  84         { 250,  869 }, /* 25.0dB */
  85         { 260,  792 }, /* 26.0dB */
  86         { 270,  724 }, /* 27.0dB */
  87         { 280,  665 }, /* 28.0dB */
  88         { 290,  616 }, /* 29.0dB */
  89         { 300,  573 }, /* 30.0dB */
  90         { 310,  537 }, /* 31.0dB */
  91         { 320,  507 }, /* 32.0dB */
  92         { 330,  483 }, /* 33.0dB */
  93         { 400,  398 }, /* 40.0dB */
  94         { 450,  381 }, /* 45.0dB */
  95         { 500,  377 }  /* 50.0dB */
  96 };
  97
  98 /* DVBS2 C/N Lookup table */
  99 static const struct stv090x_tab stv090x_s2cn_tab[] = {
 100         { -30, 13348 }, /* -3.0dB */
 101         { -20, 12640 }, /* -2d.0B */
 102         { -10, 11883 }, /* -1.0dB */
 103         {   0, 11101 }, /* -0.0dB */
 104         {   5, 10718 }, /*  0.5dB */
 105         {  10, 10339 }, /*  1.0dB */
 106         {  15,  9947 }, /*  1.5dB */
 107         {  20,  9552 }, /*  2.0dB */
 108         {  25,  9183 }, /*  2.5dB */
 109         {  30,  8799 }, /*  3.0dB */
 110         {  35,  8422 }, /*  3.5dB */
 111         {  40,  8062 }, /*  4.0dB */
 112         {  45,  7707 }, /*  4.5dB */
 113         {  50,  7353 }, /*  5.0dB */
 114         {  55,  7025 }, /*  5.5dB */
 115         {  60,  6684 }, /*  6.0dB */
 116         {  65,  6331 }, /*  6.5dB */
 117         {  70,  6036 }, /*  7.0dB */
 118         {  75,  5727 }, /*  7.5dB */
 119         {  80,  5437 }, /*  8.0dB */
 120         {  85,  5164 }, /*  8.5dB */
 121         {  90,  4902 }, /*  9.0dB */
 122         {  95,  4653 }, /*  9.5dB */
 123         { 100,  4408 }, /* 10.0dB */
 124         { 105,  4187 }, /* 10.5dB */
 125         { 110,  3961 }, /* 11.0dB */
 126         { 115,  3751 }, /* 11.5dB */
 127         { 120,  3558 }, /* 12.0dB */
 128         { 125,  3368 }, /* 12.5dB */
 129         { 130,  3191 }, /* 13.0dB */
 130         { 135,  3017 }, /* 13.5dB */
 131         { 140,  2862 }, /* 14.0dB */
 132         { 145,  2710 }, /* 14.5dB */
 133         { 150,  2565 }, /* 15.0dB */
 134         { 160,  2300 }, /* 16.0dB */
 135         { 170,  2058 }, /* 17.0dB */
 136         { 180,  1849 }, /* 18.0dB */
 137         { 190,  1663 }, /* 19.0dB */
 138         { 200,  1495 }, /* 20.0dB */
 139         { 210,  1349 }, /* 21.0dB */
 140         { 220,  1222 }, /* 22.0dB */
 141         { 230,  1110 }, /* 23.0dB */
 142         { 240,  1011 }, /* 24.0dB */
 143         { 250,   925 }, /* 25.0dB */
 144         { 260,   853 }, /* 26.0dB */
 145         { 270,   789 }, /* 27.0dB */
 146         { 280,   734 }, /* 28.0dB */
 147         { 290,   690 }, /* 29.0dB */
 148         { 300,   650 }, /* 30.0dB */
 149         { 310,   619 }, /* 31.0dB */
 150         { 320,   593 }, /* 32.0dB */
 151         { 330,   571 }, /* 33.0dB */
 152         { 400,   498 }, /* 40.0dB */
 153         { 450,   484 }, /* 45.0dB */
 154         { 500,   481 }  /* 50.0dB */
 155 };
 156
 157 /* RF level C/N lookup table */
 158 static const struct stv090x_tab stv090x_rf_tab[] = {
 159         {  -5, 0xcaa1 }, /*  -5dBm */
 160         { -10, 0xc229 }, /* -10dBm */
 161         { -15, 0xbb08 }, /* -15dBm */
 162         { -20, 0xb4bc }, /* -20dBm */
 163         { -25, 0xad5a }, /* -25dBm */
 164         { -30, 0xa298 }, /* -30dBm */
 165         { -35, 0x98a8 }, /* -35dBm */
 166         { -40, 0x8389 }, /* -40dBm */
 167         { -45, 0x59be }, /* -45dBm */
 168         { -50, 0x3a14 }, /* -50dBm */
 169         { -55, 0x2d11 }, /* -55dBm */
 170         { -60, 0x210d }, /* -60dBm */
 171         { -65, 0xa14f }, /* -65dBm */
 172         { -70, 0x07aa }  /* -70dBm */
 173 };
 174
 175
 176 static struct stv090x_reg stv0900_initval[] = {
 177
 178         { STV090x_OUTCFG,               0x00 },
 179         { STV090x_MODECFG,              0xff },
 180         { STV090x_AGCRF1CFG,            0x11 },
 181         { STV090x_AGCRF2CFG,            0x13 },
 182         { STV090x_TSGENERAL1X,          0x14 },
 183         { STV090x_TSTTNR2,              0x21 },
 184         { STV090x_TSTTNR4,              0x21 },
 185         { STV090x_P2_DISTXCTL,          0x22 },
 186         { STV090x_P2_F22TX,             0xc0 },
 187         { STV090x_P2_F22RX,             0xc0 },
 188         { STV090x_P2_DISRXCTL,          0x00 },
 189         { STV090x_P2_DMDCFGMD,          0xF9 },
 190         { STV090x_P2_DEMOD,             0x08 },
 191         { STV090x_P2_DMDCFG3,           0xc4 },
 192         { STV090x_P2_CARFREQ,           0xed },
 193         { STV090x_P2_LDT,               0xd0 },
 194         { STV090x_P2_LDT2,              0xb8 },
 195         { STV090x_P2_TMGCFG,            0xd2 },
 196         { STV090x_P2_TMGTHRISE,         0x20 },
 197         { STV090x_P1_TMGCFG,            0xd2 },
 198
 199         { STV090x_P2_TMGTHFALL,         0x00 },
 200         { STV090x_P2_FECSPY,            0x88 },
 201         { STV090x_P2_FSPYDATA,          0x3a },
 202         { STV090x_P2_FBERCPT4,          0x00 },
 203         { STV090x_P2_FSPYBER,           0x10 },
 204         { STV090x_P2_ERRCTRL1,          0x35 },
 205         { STV090x_P2_ERRCTRL2,          0xc1 },
 206         { STV090x_P2_CFRICFG,           0xf8 },
 207         { STV090x_P2_NOSCFG,            0x1c },
 208         { STV090x_P2_DMDTOM,            0x20 },
 209         { STV090x_P2_CORRELMANT,        0x70 },
 210         { STV090x_P2_CORRELABS,         0x88 },
 211         { STV090x_P2_AGC2O,             0x5b },
 212         { STV090x_P2_AGC2REF,           0x38 },
 213         { STV090x_P2_CARCFG,            0xe4 },
 214         { STV090x_P2_ACLC,              0x1A },
 215         { STV090x_P2_BCLC,              0x09 },
 216         { STV090x_P2_CARHDR,            0x08 },
 217         { STV090x_P2_KREFTMG,           0xc1 },
 218         { STV090x_P2_SFRUPRATIO,        0xf0 },
 219         { STV090x_P2_SFRLOWRATIO,       0x70 },
 220         { STV090x_P2_SFRSTEP,           0x58 },
 221         { STV090x_P2_TMGCFG2,           0x01 },
 222         { STV090x_P2_CAR2CFG,           0x26 },
 223         { STV090x_P2_BCLC2S2Q,          0x86 },
 224         { STV090x_P2_BCLC2S28,          0x86 },
 225         { STV090x_P2_SMAPCOEF7,         0x77 },
 226         { STV090x_P2_SMAPCOEF6,         0x85 },
 227         { STV090x_P2_SMAPCOEF5,         0x77 },
 228         { STV090x_P2_TSCFGL,            0x20 },
 229         { STV090x_P2_DMDCFG2,           0x3b },
 230         { STV090x_P2_MODCODLST0,        0xff },
 231         { STV090x_P2_MODCODLST1,        0xff },
 232         { STV090x_P2_MODCODLST2,        0xff },
 233         { STV090x_P2_MODCODLST3,        0xff },
 234         { STV090x_P2_MODCODLST4,        0xff },
 235         { STV090x_P2_MODCODLST5,        0xff },
 236         { STV090x_P2_MODCODLST6,        0xff },
 237         { STV090x_P2_MODCODLST7,        0xcc },
 238         { STV090x_P2_MODCODLST8,        0xcc },
 239         { STV090x_P2_MODCODLST9,        0xcc },
 240         { STV090x_P2_MODCODLSTA,        0xcc },
 241         { STV090x_P2_MODCODLSTB,        0xcc },
 242         { STV090x_P2_MODCODLSTC,        0xcc },
 243         { STV090x_P2_MODCODLSTD,        0xcc },
 244         { STV090x_P2_MODCODLSTE,        0xcc },
 245         { STV090x_P2_MODCODLSTF,        0xcf },
 246         { STV090x_P1_DISTXCTL,          0x22 },
 247         { STV090x_P1_F22TX,             0xc0 },
 248         { STV090x_P1_F22RX,             0xc0 },
 249         { STV090x_P1_DISRXCTL,          0x00 },
 250         { STV090x_P1_DMDCFGMD,          0xf9 },
 251         { STV090x_P1_DEMOD,             0x08 },
 252         { STV090x_P1_DMDCFG3,           0xc4 },
 253         { STV090x_P1_DMDTOM,            0x20 },
 254         { STV090x_P1_CARFREQ,           0xed },
 255         { STV090x_P1_LDT,               0xd0 },
 256         { STV090x_P1_LDT2,              0xb8 },
 257         { STV090x_P1_TMGCFG,            0xd2 },
 258         { STV090x_P1_TMGTHRISE,         0x20 },
 259         { STV090x_P1_TMGTHFALL,         0x00 },
 260         { STV090x_P1_SFRUPRATIO,        0xf0 },
 261         { STV090x_P1_SFRLOWRATIO,       0x70 },
 262         { STV090x_P1_TSCFGL,            0x20 },
 263         { STV090x_P1_FECSPY,            0x88 },
 264         { STV090x_P1_FSPYDATA,          0x3a },
 265         { STV090x_P1_FBERCPT4,          0x00 },
 266         { STV090x_P1_FSPYBER,           0x10 },
 267         { STV090x_P1_ERRCTRL1,          0x35 },
 268         { STV090x_P1_ERRCTRL2,          0xc1 },
 269         { STV090x_P1_CFRICFG,           0xf8 },
 270         { STV090x_P1_NOSCFG,            0x1c },
 271         { STV090x_P1_CORRELMANT,        0x70 },
 272         { STV090x_P1_CORRELABS,         0x88 },
 273         { STV090x_P1_AGC2O,             0x5b },
 274         { STV090x_P1_AGC2REF,           0x38 },
 275         { STV090x_P1_CARCFG,            0xe4 },
 276         { STV090x_P1_ACLC,              0x1A },
 277         { STV090x_P1_BCLC,              0x09 },
 278         { STV090x_P1_CARHDR,            0x08 },
 279         { STV090x_P1_KREFTMG,           0xc1 },
 280         { STV090x_P1_SFRSTEP,           0x58 },
 281         { STV090x_P1_TMGCFG2,           0x01 },
 282         { STV090x_P1_CAR2CFG,           0x26 },
 283         { STV090x_P1_BCLC2S2Q,          0x86 },
 284         { STV090x_P1_BCLC2S28,          0x86 },
 285         { STV090x_P1_SMAPCOEF7,         0x77 },
 286         { STV090x_P1_SMAPCOEF6,         0x85 },
 287         { STV090x_P1_SMAPCOEF5,         0x77 },
 288         { STV090x_P1_DMDCFG2,           0x3b },
 289         { STV090x_P1_MODCODLST0,        0xff },
 290         { STV090x_P1_MODCODLST1,        0xff },
 291         { STV090x_P1_MODCODLST2,        0xff },
 292         { STV090x_P1_MODCODLST3,        0xff },
 293         { STV090x_P1_MODCODLST4,        0xff },
 294         { STV090x_P1_MODCODLST5,        0xff },
 295         { STV090x_P1_MODCODLST6,        0xff },
 296         { STV090x_P1_MODCODLST7,        0xcc },
 297         { STV090x_P1_MODCODLST8,        0xcc },
 298         { STV090x_P1_MODCODLST9,        0xcc },
 299         { STV090x_P1_MODCODLSTA,        0xcc },
 300         { STV090x_P1_MODCODLSTB,        0xcc },
 301         { STV090x_P1_MODCODLSTC,        0xcc },
 302         { STV090x_P1_MODCODLSTD,        0xcc },
 303         { STV090x_P1_MODCODLSTE,        0xcc },
 304         { STV090x_P1_MODCODLSTF,        0xcf },
 305         { STV090x_GENCFG,               0x1d },
 306         { STV090x_NBITER_NF4,           0x37 },
 307         { STV090x_NBITER_NF5,           0x29 },
 308         { STV090x_NBITER_NF6,           0x37 },
 309         { STV090x_NBITER_NF7,           0x33 },
 310         { STV090x_NBITER_NF8,           0x31 },
 311         { STV090x_NBITER_NF9,           0x2f },
 312         { STV090x_NBITER_NF10,          0x39 },
 313         { STV090x_NBITER_NF11,          0x3a },
 314         { STV090x_NBITER_NF12,          0x29 },
 315         { STV090x_NBITER_NF13,          0x37 },
 316         { STV090x_NBITER_NF14,          0x33 },
 317         { STV090x_NBITER_NF15,          0x2f },
 318         { STV090x_NBITER_NF16,          0x39 },
 319         { STV090x_NBITER_NF17,          0x3a },
 320         { STV090x_NBITERNOERR,          0x04 },
 321         { STV090x_GAINLLR_NF4,          0x0C },
 322         { STV090x_GAINLLR_NF5,          0x0F },
 323         { STV090x_GAINLLR_NF6,          0x11 },
 324         { STV090x_GAINLLR_NF7,          0x14 },
 325         { STV090x_GAINLLR_NF8,          0x17 },
 326         { STV090x_GAINLLR_NF9,          0x19 },
 327         { STV090x_GAINLLR_NF10,         0x20 },
 328         { STV090x_GAINLLR_NF11,         0x21 },
 329         { STV090x_GAINLLR_NF12,         0x0D },
 330         { STV090x_GAINLLR_NF13,         0x0F },
 331         { STV090x_GAINLLR_NF14,         0x13 },
 332         { STV090x_GAINLLR_NF15,         0x1A },
 333         { STV090x_GAINLLR_NF16,         0x1F },
 334         { STV090x_GAINLLR_NF17,         0x21 },
 335         { STV090x_RCCFGH,               0x20 },
 336         { STV090x_P1_FECM,              0x01 }, /* disable DSS modes */
 337         { STV090x_P2_FECM,              0x01 }, /* disable DSS modes */
 338         { STV090x_P1_PRVIT,             0x2F }, /* disable PR 6/7 */
 339         { STV090x_P2_PRVIT,             0x2F }, /* disable PR 6/7 */
 340 };
 341
 342 static struct stv090x_reg stv0903_initval[] = {
 343         { STV090x_OUTCFG,               0x00 },
 344         { STV090x_AGCRF1CFG,            0x11 },
 345         { STV090x_STOPCLK1,             0x48 },
 346         { STV090x_STOPCLK2,             0x14 },
 347         { STV090x_TSTTNR1,              0x27 },
 348         { STV090x_TSTTNR2,              0x21 },
 349         { STV090x_P1_DISTXCTL,          0x22 },
 350         { STV090x_P1_F22TX,             0xc0 },
 351         { STV090x_P1_F22RX,             0xc0 },
 352         { STV090x_P1_DISRXCTL,          0x00 },
 353         { STV090x_P1_DMDCFGMD,          0xF9 },
 354         { STV090x_P1_DEMOD,             0x08 },
 355         { STV090x_P1_DMDCFG3,           0xc4 },
 356         { STV090x_P1_CARFREQ,           0xed },
 357         { STV090x_P1_TNRCFG2,           0x82 },
 358         { STV090x_P1_LDT,               0xd0 },
 359         { STV090x_P1_LDT2,              0xb8 },
 360         { STV090x_P1_TMGCFG,            0xd2 },
 361         { STV090x_P1_TMGTHRISE,         0x20 },
 362         { STV090x_P1_TMGTHFALL,         0x00 },
 363         { STV090x_P1_SFRUPRATIO,        0xf0 },
 364         { STV090x_P1_SFRLOWRATIO,       0x70 },
 365         { STV090x_P1_TSCFGL,            0x20 },
 366         { STV090x_P1_FECSPY,            0x88 },
 367         { STV090x_P1_FSPYDATA,          0x3a },
 368         { STV090x_P1_FBERCPT4,          0x00 },
 369         { STV090x_P1_FSPYBER,           0x10 },
 370         { STV090x_P1_ERRCTRL1,          0x35 },
 371         { STV090x_P1_ERRCTRL2,          0xc1 },
 372         { STV090x_P1_CFRICFG,           0xf8 },
 373         { STV090x_P1_NOSCFG,            0x1c },
 374         { STV090x_P1_DMDTOM,            0x20 },
 375         { STV090x_P1_CORRELMANT,        0x70 },
 376         { STV090x_P1_CORRELABS,         0x88 },
 377         { STV090x_P1_AGC2O,             0x5b },
 378         { STV090x_P1_AGC2REF,           0x38 },
 379         { STV090x_P1_CARCFG,            0xe4 },
 380         { STV090x_P1_ACLC,              0x1A },
 381         { STV090x_P1_BCLC,              0x09 },
 382         { STV090x_P1_CARHDR,            0x08 },
 383         { STV090x_P1_KREFTMG,           0xc1 },
 384         { STV090x_P1_SFRSTEP,           0x58 },
 385         { STV090x_P1_TMGCFG2,           0x01 },
 386         { STV090x_P1_CAR2CFG,           0x26 },
 387         { STV090x_P1_BCLC2S2Q,          0x86 },
 388         { STV090x_P1_BCLC2S28,          0x86 },
 389         { STV090x_P1_SMAPCOEF7,         0x77 },
 390         { STV090x_P1_SMAPCOEF6,         0x85 },
 391         { STV090x_P1_SMAPCOEF5,         0x77 },
 392         { STV090x_P1_DMDCFG2,           0x3b },
 393         { STV090x_P1_MODCODLST0,        0xff },
 394         { STV090x_P1_MODCODLST1,        0xff },
 395         { STV090x_P1_MODCODLST2,        0xff },
 396         { STV090x_P1_MODCODLST3,        0xff },
 397         { STV090x_P1_MODCODLST4,        0xff },
 398         { STV090x_P1_MODCODLST5,        0xff },
 399         { STV090x_P1_MODCODLST6,        0xff },
 400         { STV090x_P1_MODCODLST7,        0xcc },
 401         { STV090x_P1_MODCODLST8,        0xcc },
 402         { STV090x_P1_MODCODLST9,        0xcc },
 403         { STV090x_P1_MODCODLSTA,        0xcc },
 404         { STV090x_P1_MODCODLSTB,        0xcc },
 405         { STV090x_P1_MODCODLSTC,        0xcc },
 406         { STV090x_P1_MODCODLSTD,        0xcc },
 407         { STV090x_P1_MODCODLSTE,        0xcc },
 408         { STV090x_P1_MODCODLSTF,        0xcf },
 409         { STV090x_GENCFG,               0x1c },
 410         { STV090x_NBITER_NF4,           0x37 },
 411         { STV090x_NBITER_NF5,           0x29 },
 412         { STV090x_NBITER_NF6,           0x37 },
 413         { STV090x_NBITER_NF7,           0x33 },
 414         { STV090x_NBITER_NF8,           0x31 },
 415         { STV090x_NBITER_NF9,           0x2f },
 416         { STV090x_NBITER_NF10,          0x39 },
 417         { STV090x_NBITER_NF11,          0x3a },
 418         { STV090x_NBITER_NF12,          0x29 },
 419         { STV090x_NBITER_NF13,          0x37 },
 420         { STV090x_NBITER_NF14,          0x33 },
 421         { STV090x_NBITER_NF15,          0x2f },
 422         { STV090x_NBITER_NF16,          0x39 },
 423         { STV090x_NBITER_NF17,          0x3a },
 424         { STV090x_NBITERNOERR,          0x04 },
 425         { STV090x_GAINLLR_NF4,          0x0C },
 426         { STV090x_GAINLLR_NF5,          0x0F },
 427         { STV090x_GAINLLR_NF6,          0x11 },
 428         { STV090x_GAINLLR_NF7,          0x14 },
 429         { STV090x_GAINLLR_NF8,          0x17 },
 430         { STV090x_GAINLLR_NF9,          0x19 },
 431         { STV090x_GAINLLR_NF10,         0x20 },
 432         { STV090x_GAINLLR_NF11,         0x21 },
 433         { STV090x_GAINLLR_NF12,         0x0D },
 434         { STV090x_GAINLLR_NF13,         0x0F },
 435         { STV090x_GAINLLR_NF14,         0x13 },
 436         { STV090x_GAINLLR_NF15,         0x1A },
 437         { STV090x_GAINLLR_NF16,         0x1F },
 438         { STV090x_GAINLLR_NF17,         0x21 },
 439         { STV090x_RCCFGH,               0x20 },
 440         { STV090x_P1_FECM,              0x01 }, /*disable the DSS mode */
 441         { STV090x_P1_PRVIT,             0x2f }  /*disable puncture rate 6/7*/
 442 };
 443
 444 static struct stv090x_reg stv0900_cut20_val[] = {
 445
 446         { STV090x_P2_DMDCFG3,           0xe8 },
 447         { STV090x_P2_DMDCFG4,           0x10 },
 448         { STV090x_P2_CARFREQ,           0x38 },
 449         { STV090x_P2_CARHDR,            0x20 },
 450         { STV090x_P2_KREFTMG,           0x5a },
 451         { STV090x_P2_SMAPCOEF7,         0x06 },
 452         { STV090x_P2_SMAPCOEF6,         0x00 },
 453         { STV090x_P2_SMAPCOEF5,         0x04 },
 454         { STV090x_P2_NOSCFG,            0x0c },
 455         { STV090x_P1_DMDCFG3,           0xe8 },
 456         { STV090x_P1_DMDCFG4,           0x10 },
 457         { STV090x_P1_CARFREQ,           0x38 },
 458         { STV090x_P1_CARHDR,            0x20 },
 459         { STV090x_P1_KREFTMG,           0x5a },
 460         { STV090x_P1_SMAPCOEF7,         0x06 },
 461         { STV090x_P1_SMAPCOEF6,         0x00 },
 462         { STV090x_P1_SMAPCOEF5,         0x04 },
 463         { STV090x_P1_NOSCFG,            0x0c },
 464         { STV090x_GAINLLR_NF4,          0x21 },
 465         { STV090x_GAINLLR_NF5,          0x21 },
 466         { STV090x_GAINLLR_NF6,          0x20 },
 467         { STV090x_GAINLLR_NF7,          0x1F },
 468         { STV090x_GAINLLR_NF8,          0x1E },
 469         { STV090x_GAINLLR_NF9,          0x1E },
 470         { STV090x_GAINLLR_NF10,         0x1D },
 471         { STV090x_GAINLLR_NF11,         0x1B },
 472         { STV090x_GAINLLR_NF12,         0x20 },
 473         { STV090x_GAINLLR_NF13,         0x20 },
 474         { STV090x_GAINLLR_NF14,         0x20 },
 475         { STV090x_GAINLLR_NF15,         0x20 },
 476         { STV090x_GAINLLR_NF16,         0x20 },
 477         { STV090x_GAINLLR_NF17,         0x21 },
 478 };
 479
 480 static struct stv090x_reg stv0903_cut20_val[] = {
 481         { STV090x_P1_DMDCFG3,           0xe8 },
 482         { STV090x_P1_DMDCFG4,           0x10 },
 483         { STV090x_P1_CARFREQ,           0x38 },
 484         { STV090x_P1_CARHDR,            0x20 },
 485         { STV090x_P1_KREFTMG,           0x5a },
 486         { STV090x_P1_SMAPCOEF7,         0x06 },
 487         { STV090x_P1_SMAPCOEF6,         0x00 },
 488         { STV090x_P1_SMAPCOEF5,         0x04 },
 489         { STV090x_P1_NOSCFG,            0x0c },
 490         { STV090x_GAINLLR_NF4,          0x21 },
 491         { STV090x_GAINLLR_NF5,          0x21 },
 492         { STV090x_GAINLLR_NF6,          0x20 },
 493         { STV090x_GAINLLR_NF7,          0x1F },
 494         { STV090x_GAINLLR_NF8,          0x1E },
 495         { STV090x_GAINLLR_NF9,          0x1E },
 496         { STV090x_GAINLLR_NF10,         0x1D },
 497         { STV090x_GAINLLR_NF11,         0x1B },
 498         { STV090x_GAINLLR_NF12,         0x20 },
 499         { STV090x_GAINLLR_NF13,         0x20 },
 500         { STV090x_GAINLLR_NF14,         0x20 },
 501         { STV090x_GAINLLR_NF15,         0x20 },
 502         { STV090x_GAINLLR_NF16,         0x20 },
 503         { STV090x_GAINLLR_NF17,         0x21 }
 504 };
 505
 506 /* Cut 1.x Long Frame Tracking CR loop */
 507 static struct stv090x_long_frame_crloop stv090x_s2_crl[] = {
 508         /* MODCOD     2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 509         { STV090x_QPSK_12,  0x1c, 0x0d, 0x1b, 0x2c, 0x3a, 0x1c, 0x2a, 0x3b, 0x2a, 0x1b },
 510         { STV090x_QPSK_35,  0x2c, 0x0d, 0x2b, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b, 0x2a, 0x0b },
 511         { STV090x_QPSK_23,  0x2c, 0x0d, 0x2b, 0x2c, 0x0b, 0x0c, 0x3a, 0x1b, 0x2a, 0x3a },
 512         { STV090x_QPSK_34,  0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
 513         { STV090x_QPSK_45,  0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
 514         { STV090x_QPSK_56,  0x0d, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
 515         { STV090x_QPSK_89,  0x0d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
 516         { STV090x_QPSK_910, 0x1d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
 517         { STV090x_8PSK_35,  0x29, 0x3b, 0x09, 0x2b, 0x38, 0x0b, 0x18, 0x1a, 0x08, 0x0a },
 518         { STV090x_8PSK_23,  0x0a, 0x3b, 0x29, 0x2b, 0x19, 0x0b, 0x38, 0x1a, 0x18, 0x0a },
 519         { STV090x_8PSK_34,  0x3a, 0x3b, 0x2a, 0x2b, 0x39, 0x0b, 0x19, 0x1a, 0x38, 0x0a },
 520         { STV090x_8PSK_56,  0x1b, 0x3b, 0x0b, 0x2b, 0x1a, 0x0b, 0x39, 0x1a, 0x19, 0x0a },
 521         { STV090x_8PSK_89,  0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 },
 522         { STV090x_8PSK_910, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 }
 523 };
 524
 525 /* Cut 2.0 Long Frame Tracking CR loop */
 526 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
 527         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 528         { STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
 529         { STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
 530         { STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
 531         { STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 532         { STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 533         { STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 534         { STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 535         { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 536         { STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
 537         { STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
 538         { STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
 539         { STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
 540         { STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
 541         { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
 542 };
 543
 544
 545 /* Cut 2.0 Long Frame Tracking CR Loop */
 546 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
 547         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 548         { STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
 549         { STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
 550         { STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 551         { STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 552         { STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 553         { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 554         { STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 555         { STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 556         { STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 557         { STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 558         { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
 559 };
 560
 561
 562 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
 563         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 564         { STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
 565         { STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
 566         { STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
 567 };
 568
 569
 570 /* Cut 1.2 & 2.0 Short Frame Tracking CR Loop */
 571 static struct stv090x_short_frame_crloop stv090x_s2_short_crl[] = {
 572         /* MODCOD  2M_cut1.2 2M_cut2.0 5M_cut1.2 5M_cut2.0 10M_cut1.2 10M_cut2.0 20M_cut1.2 20M_cut2.0 30M_cut1.2 30M_cut2.0 */
 573         { STV090x_QPSK,   0x3c, 0x2f, 0x2b, 0x2e, 0x0b, 0x0e, 0x3a, 0x0e, 0x2a, 0x3d },
 574         { STV090x_8PSK,   0x0b, 0x3e, 0x2a, 0x0e, 0x0a, 0x2d, 0x19, 0x0d, 0x09, 0x3c },
 575         { STV090x_16APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d },
 576         { STV090x_32APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d }
 577 };
 578
 579
 580 static inline s32 comp2(s32 __x, s32 __width)
 581 {
 582         if (__width == 32)
 583                 return __x;
 584         else
 585                 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
 586 }
 587
 588 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
 589 {
 590         const struct stv090x_config *config = state->config;
 591         int ret;
 592
 593         u8 b0[] = { reg >> 8, reg & 0xff };
 594         u8 buf;
 595
 596         struct i2c_msg msg[] = {
 597                 { .addr = config->address, .flags       = 0,            .buf = b0,   .len = 2 },
 598                 { .addr = config->address, .flags       = I2C_M_RD,     .buf = &buf, .len = 1 }
 599         };
 600
 601         ret = i2c_transfer(state->i2c, msg, 2);
 602         if (ret != 2) {
 603                 if (ret != -ERESTARTSYS)
 604                         dprintk(FE_ERROR, 1,
 605                                 "Read error, Reg=[0x%02x], Status=%d",
 606                                 reg, ret);
 607
 608                 return ret < 0 ? ret : -EREMOTEIO;
 609         }
 610         if (unlikely(*state->verbose >= FE_DEBUGREG))
 611                 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
 612                         reg, buf);
 613
 614         return (unsigned int) buf;
 615 }
 616
 617 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
 618 {
 619         const struct stv090x_config *config = state->config;
 620         int ret;
 621         u8 buf[2 + count];
 622         struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
 623
 624         buf[0] = reg >> 8;
 625         buf[1] = reg & 0xff;
 626         memcpy(&buf[2], data, count);
 627
 628         if (unlikely(*state->verbose >= FE_DEBUGREG)) {
 629                 int i;
 630
 631                 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
 632                 for (i = 0; i < count; i++)
 633                         printk(" %02x", data[i]);
 634                 printk("\n");
 635         }
 636
 637         ret = i2c_transfer(state->i2c, &i2c_msg, 1);
 638         if (ret != 1) {
 639                 if (ret != -ERESTARTSYS)
 640                         dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
 641                                 reg, data[0], count, ret);
 642                 return ret < 0 ? ret : -EREMOTEIO;
 643         }
 644
 645         return 0;
 646 }
 647
 648 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
 649 {
 650         return stv090x_write_regs(state, reg, &data, 1);
 651 }
 652
 653 static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 654 {
 655         struct stv090x_state *state = fe->demodulator_priv;
 656         u32 reg;
 657
 658         reg = STV090x_READ_DEMOD(state, I2CRPT);
 659         if (enable) {
 660                 dprintk(FE_DEBUG, 1, "Enable Gate");
 661                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
 662                 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
 663                         goto err;
 664
 665         } else {
 666                 dprintk(FE_DEBUG, 1, "Disable Gate");
 667                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
 668                 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
 669                         goto err;
 670         }
 671         return 0;
 672 err:
 673         dprintk(FE_ERROR, 1, "I/O error");
 674         return -1;
 675 }
 676
 677 static void stv090x_get_lock_tmg(struct stv090x_state *state)
 678 {
 679         switch (state->algo) {
 680         case STV090x_BLIND_SEARCH:
 681                 dprintk(FE_DEBUG, 1, "Blind Search");
 682                 if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
 683                         state->DemodTimeout = 1500;
 684                         state->FecTimeout = 400;
 685                 } else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
 686                         state->DemodTimeout = 1000;
 687                         state->FecTimeout = 300;
 688                 } else {  /*SR >20Msps*/
 689                         state->DemodTimeout = 700;
 690                         state->FecTimeout = 100;
 691                 }
 692                 break;
 693
 694         case STV090x_COLD_SEARCH:
 695         case STV090x_WARM_SEARCH:
 696         default:
 697                 dprintk(FE_DEBUG, 1, "Normal Search");
 698                 if (state->srate <= 1000000) {  /*SR <=1Msps*/
 699                         state->DemodTimeout = 4500;
 700                         state->FecTimeout = 1700;
 701                 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
 702                         state->DemodTimeout = 2500;
 703                         state->FecTimeout = 1100;
 704                 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
 705                         state->DemodTimeout = 1000;
 706                         state->FecTimeout = 550;
 707                 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
 708                         state->DemodTimeout = 700;
 709                         state->FecTimeout = 250;
 710                 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
 711                         state->DemodTimeout = 400;
 712                         state->FecTimeout = 130;
 713                 } else {   /*SR >20Msps*/
 714                         state->DemodTimeout = 300;
 715                         state->FecTimeout = 100;
 716                 }
 717                 break;
 718         }
 719
 720         if (state->algo == STV090x_WARM_SEARCH)
 721                 state->DemodTimeout /= 2;
 722 }
 723
 724 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
 725 {
 726         u32 sym;
 727
 728         if (srate > 60000000) {
 729                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 730                 sym /= (state->mclk >> 12);
 731         } else if (srate > 6000000) {
 732                 sym  = (srate << 6);
 733                 sym /= (state->mclk >> 10);
 734         } else {
 735                 sym  = (srate << 9);
 736                 sym /= (state->mclk >> 7);
 737         }
 738
 739         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
 740                 goto err;
 741         if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
 742                 goto err;
 743
 744         return 0;
 745 err:
 746         dprintk(FE_ERROR, 1, "I/O error");
 747         return -1;
 748 }
 749
 750 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
 751 {
 752         u32 sym;
 753
 754         srate = 105 * (srate / 100);
 755         if (srate > 60000000) {
 756                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 757                 sym /= (state->mclk >> 12);
 758         } else if (srate > 6000000) {
 759                 sym  = (srate << 6);
 760                 sym /= (state->mclk >> 10);
 761         } else {
 762                 sym  = (srate << 9);
 763                 sym /= (state->mclk >> 7);
 764         }
 765
 766         if (sym < 0x7fff) {
 767                 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
 768                         goto err;
 769                 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
 770                         goto err;
 771         } else {
 772                 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
 773                         goto err;
 774                 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
 775                         goto err;
 776         }
 777
 778         return 0;
 779 err:
 780         dprintk(FE_ERROR, 1, "I/O error");
 781         return -1;
 782 }
 783
 784 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
 785 {
 786         u32 sym;
 787
 788         srate = 95 * (srate / 100);
 789         if (srate > 60000000) {
 790                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 791                 sym /= (state->mclk >> 12);
 792         } else if (srate > 6000000) {
 793                 sym  = (srate << 6);
 794                 sym /= (state->mclk >> 10);
 795         } else {
 796                 sym  = (srate << 9);
 797                 sym /= (state->mclk >> 7);
 798         }
 799
 800         if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0xff)) < 0) /* MSB */
 801                 goto err;
 802         if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
 803                 goto err;
 804         return 0;
 805 err:
 806         dprintk(FE_ERROR, 1, "I/O error");
 807         return -1;
 808 }
 809
 810 static u32 stv090x_car_width(u32 srate, u32 rolloff)
 811 {
 812         return srate + (srate * rolloff) / 100;
 813 }
 814
 815 static int stv090x_set_vit_thacq(struct stv090x_state *state)
 816 {
 817         if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
 818                 goto err;
 819         if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
 820                 goto err;
 821         if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
 822                 goto err;
 823         if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
 824                 goto err;
 825         if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
 826                 goto err;
 827         if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
 828                 goto err;
 829         return 0;
 830 err:
 831         dprintk(FE_ERROR, 1, "I/O error");
 832         return -1;
 833 }
 834
 835 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
 836 {
 837         if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
 838                 goto err;
 839         if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
 840                 goto err;
 841         if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
 842                 goto err;
 843         if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
 844                 goto err;
 845         if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
 846                 goto err;
 847         if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
 848                 goto err;
 849         return 0;
 850 err:
 851         dprintk(FE_ERROR, 1, "I/O error");
 852         return -1;
 853 }
 854
 855 static int stv090x_set_viterbi(struct stv090x_state *state)
 856 {
 857         switch (state->search_mode) {
 858         case STV090x_SEARCH_AUTO:
 859                 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
 860                         goto err;
 861                 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
 862                         goto err;
 863                 break;
 864         case STV090x_SEARCH_DVBS1:
 865                 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
 866                         goto err;
 867                 switch (state->fec) {
 868                 case STV090x_PR12:
 869                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
 870                                 goto err;
 871                         break;
 872
 873                 case STV090x_PR23:
 874                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
 875                                 goto err;
 876                         break;
 877
 878                 case STV090x_PR34:
 879                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
 880                                 goto err;
 881                         break;
 882
 883                 case STV090x_PR56:
 884                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
 885                                 goto err;
 886                         break;
 887
 888                 case STV090x_PR78:
 889                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
 890                                 goto err;
 891                         break;
 892
 893                 default:
 894                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
 895                                 goto err;
 896                         break;
 897                 }
 898                 break;
 899         case STV090x_SEARCH_DSS:
 900                 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
 901                         goto err;
 902                 switch (state->fec) {
 903                 case STV090x_PR12:
 904                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
 905                                 goto err;
 906                         break;
 907
 908                 case STV090x_PR23:
 909                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
 910                                 goto err;
 911                         break;
 912
 913                 case STV090x_PR67:
 914                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
 915                                 goto err;
 916                         break;
 917
 918                 default:
 919                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
 920                                 goto err;
 921                         break;
 922                 }
 923                 break;
 924         default:
 925                 break;
 926         }
 927         return 0;
 928 err:
 929         dprintk(FE_ERROR, 1, "I/O error");
 930         return -1;
 931 }
 932
 933 static int stv090x_stop_modcod(struct stv090x_state *state)
 934 {
 935         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
 936                 goto err;
 937         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
 938                 goto err;
 939         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
 940                 goto err;
 941         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
 942                 goto err;
 943         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
 944                 goto err;
 945         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
 946                 goto err;
 947         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
 948                 goto err;
 949         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
 950                 goto err;
 951         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
 952                 goto err;
 953         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
 954                 goto err;
 955         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
 956                 goto err;
 957         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
 958                 goto err;
 959         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
 960                 goto err;
 961         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
 962                 goto err;
 963         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
 964                 goto err;
 965         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
 966                 goto err;
 967         return 0;
 968 err:
 969         dprintk(FE_ERROR, 1, "I/O error");
 970         return -1;
 971 }
 972
 973 static int stv090x_activate_modcod(struct stv090x_state *state)
 974 {
 975         u32 matype, modcod, f_mod, index;
 976
 977         if (state->dev_ver <= 0x11) {
 978                 msleep(5);
 979                 modcod = STV090x_READ_DEMOD(state, PLHMODCOD);
 980                 matype = modcod & 0x03;
 981                 modcod = (modcod & 0x7f) >> 2;
 982                 index = STV090x_ADDR_OFFST(state, MODCODLSTF) - (modcod / 2);
 983
 984                 switch (matype) {
 985                 default:
 986                 case 0:
 987                         f_mod = 14;
 988                         break;
 989                 case 1:
 990                         f_mod = 13;
 991                         break;
 992                 case 2:
 993                         f_mod = 11;
 994                         break;
 995                 case 3:
 996                         f_mod = 7;
 997                         break;
 998                 }
 999                 if (matype <= 1) {
1000                         if (modcod % 2) {
1001                                 if (stv090x_write_reg(state, index, 0xf0 | f_mod) < 0)
1002                                         goto err;
1003                         } else {
1004                                 if (stv090x_write_reg(state, index, (f_mod << 4) | 0x0f) < 0)
1005                                         goto err;
1006                         }
1007                 }
1008         } else if (state->dev_ver >= 0x12) {
1009                         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1010                                 goto err;
1011                         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1012                                 goto err;
1013                         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1014                                 goto err;
1015                         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1016                                 goto err;
1017                         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1018                                 goto err;
1019                         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1020                                 goto err;
1021                         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1022                                 goto err;
1023                         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1024                                 goto err;
1025                         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1026                                 goto err;
1027                         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1028                                 goto err;
1029                         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1030                                 goto err;
1031                         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1032                                 goto err;
1033                         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1034                                 goto err;
1035                         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1036                                 goto err;
1037                         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1038                                 goto err;
1039                         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1040                                 goto err;
1041         }
1042         return 0;
1043 err:
1044         dprintk(FE_ERROR, 1, "I/O error");
1045         return -1;
1046 }
1047
1048 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1049 {
1050         u32 reg;
1051
1052         switch (state->demod) {
1053         case STV090x_DEMODULATOR_0:
1054                 mutex_lock(&demod_lock);
1055                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1056                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1057                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1058                         goto err;
1059                 mutex_unlock(&demod_lock);
1060                 break;
1061
1062         case STV090x_DEMODULATOR_1:
1063                 mutex_lock(&demod_lock);
1064                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1065                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1066                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1067                         goto err;
1068                 mutex_unlock(&demod_lock);
1069                 break;
1070
1071         default:
1072                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1073                 break;
1074         }
1075         return 0;
1076 err:
1077         mutex_unlock(&demod_lock);
1078         dprintk(FE_ERROR, 1, "I/O error");
1079         return -1;
1080 }
1081
1082 static int stv090x_delivery_search(struct stv090x_state *state)
1083 {
1084         u32 reg;
1085
1086         switch (state->search_mode) {
1087         case STV090x_SEARCH_DVBS1:
1088         case STV090x_SEARCH_DSS:
1089                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1090                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1091                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1092                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1093                         goto err;
1094
1095                 /* Activate Viterbi decoder in legacy search, do not use FRESVIT1, might impact VITERBI2 */
1096                 if (stv090x_vitclk_ctl(state, 0) < 0)
1097                         goto err;
1098
1099                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1100                         goto err;
1101                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1102                         goto err;
1103                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1104                         goto err;
1105
1106                 stv090x_set_vit_thacq(state);
1107                 stv090x_set_viterbi(state);
1108                 break;
1109
1110         case STV090x_SEARCH_DVBS2:
1111                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1112                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1113                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1114                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1115                         goto err;
1116                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1117                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1118                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1119                         goto err;
1120
1121                 if (stv090x_vitclk_ctl(state, 1) < 0)
1122                         goto err;
1123
1124                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1125                         goto err;
1126                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1127                         goto err;
1128                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1129                         goto err;
1130
1131                 if (state->demod_mode != STV090x_SINGLE) {
1132                         if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1133                                 stv090x_stop_modcod(state);
1134                         else
1135                                 stv090x_activate_modcod(state);
1136                 }
1137                 break;
1138
1139         case STV090x_SEARCH_AUTO:
1140         default:
1141                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1142                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1143                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1144                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1145                         goto err;
1146                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1147                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1148                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1149                         goto err;
1150
1151                 if (stv090x_vitclk_ctl(state, 1) < 0)
1152                         goto err;
1153
1154                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1155                         goto err;
1156                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x09) < 0)
1157                         goto err;
1158                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1159                         goto err;
1160
1161                 if (state->demod_mode != STV090x_SINGLE) {
1162                         if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1163                                 stv090x_stop_modcod(state);
1164                         else
1165                                 stv090x_activate_modcod(state);
1166                 }
1167                 stv090x_set_vit_thacq(state);
1168                 stv090x_set_viterbi(state);
1169                 break;
1170         }
1171         return 0;
1172 err:
1173         dprintk(FE_ERROR, 1, "I/O error");
1174         return -1;
1175 }
1176
1177 static int stv090x_start_search(struct stv090x_state *state)
1178 {
1179         u32 reg;
1180
1181         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1182         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1183         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1184                 goto err;
1185
1186         if (state->dev_ver == 0x10) {
1187                 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1188                         goto err;
1189         }
1190         if (state->dev_ver < 0x20) {
1191                 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1192                         goto err;
1193         }
1194         if (state->srate <= 5000000) {
1195                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1196                         goto err;
1197                 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1198                         goto err;
1199                 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0)
1200                         goto err;
1201                 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1202                         goto err;
1203                 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1204                         goto err;
1205
1206                 /*enlarge the timing bandwith for Low SR*/
1207                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1208                         goto err;
1209         } else {
1210                 /* If the symbol rate is >5 Msps
1211                 Set The carrier search up and low to auto mode */
1212                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1213                         goto err;
1214                 /*reduce the timing bandwith for high SR*/
1215                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1216                         goto err;
1217         }
1218         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1219                 goto err;
1220         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1221                 goto err;
1222
1223         if (state->dev_ver >= 0x20) {
1224                 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1225                         goto err;
1226                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1227                         goto err;
1228
1229                 if ((state->search_mode == STV090x_DVBS1)       ||
1230                         (state->search_mode == STV090x_DSS)     ||
1231                         (state->search_mode == STV090x_SEARCH_AUTO)) {
1232
1233                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1234                                 goto err;
1235                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1236                                 goto err;
1237                 }
1238         }
1239
1240         if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1241                 goto err;
1242         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1243                 goto err;
1244         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1245                 goto err;
1246
1247         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1248         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1249         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1250         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1251                 goto err;
1252         reg = STV090x_READ_DEMOD(state, DMDCFG2);
1253         STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1254         if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1255                 goto err;
1256
1257         if (state->dev_ver >= 0x20) { /*Frequency offset detector setting*/
1258                 if (state->srate < 10000000) {
1259                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1260                                 goto err;
1261                 } else {
1262                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1263                                 goto err;
1264                 }
1265         } else {
1266                 if (state->srate < 10000000) {
1267                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1268                                 goto err;
1269                 } else {
1270                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1271                                 goto err;
1272                 }
1273         }
1274
1275         switch (state->algo) {
1276         case STV090x_WARM_SEARCH:/*The symbol rate and the exact carrier Frequency are known */
1277                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1278                         goto err;
1279                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1280                         goto err;
1281                 break;
1282
1283         case STV090x_COLD_SEARCH:/*The symbol rate is known*/
1284                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1285                         goto err;
1286                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1287                         goto err;
1288                 break;
1289
1290         default:
1291                 break;
1292         }
1293         return 0;
1294 err:
1295         dprintk(FE_ERROR, 1, "I/O error");
1296         return -1;
1297 }
1298
1299 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1300 {
1301         u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
1302         s32 i, j, steps, dir;
1303
1304         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1305                 goto err;
1306         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1307         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1308         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1309         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1310                 goto err;
1311
1312         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1313                 goto err;
1314         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1315                 goto err;
1316         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1317                 goto err;
1318         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1319                 goto err;
1320         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1321                 goto err;
1322         stv090x_set_srate(state, 1000000);
1323
1324         steps  = -1 + state->search_range / 1000000;
1325         steps /= 2;
1326         steps  = (2 * steps) + 1;
1327         if (steps < 0)
1328                 steps = 1;
1329
1330         dir = 1;
1331         freq_step = (1000000 * 256) / (state->mclk / 256);
1332         freq_init = 0;
1333
1334         for (i = 0; i < steps; i++) {
1335                 if (dir > 0)
1336                         freq_init = freq_init + (freq_step * i);
1337                 else
1338                         freq_init = freq_init - (freq_step * i);
1339
1340                 dir = -1;
1341
1342                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1343                         goto err;
1344                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1345                         goto err;
1346                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1347                         goto err;
1348                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1349                         goto err;
1350                 msleep(10);
1351                 for (j = 0; j < 10; j++) {
1352                         agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1353                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1354                 }
1355                 agc2 /= 10;
1356                 agc2_min = 0xffff;
1357                 if (agc2 < 0xffff)
1358                         agc2_min = agc2;
1359         }
1360
1361         return agc2_min;
1362 err:
1363         dprintk(FE_ERROR, 1, "I/O error");
1364         return -1;
1365 }
1366
1367 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1368 {
1369         u8 r3, r2, r1, r0;
1370         s32 srate, int_1, int_2, tmp_1, tmp_2;
1371         u32 pow2;
1372
1373         r3 = STV090x_READ_DEMOD(state, SFR3);
1374         r2 = STV090x_READ_DEMOD(state, SFR2);
1375         r1 = STV090x_READ_DEMOD(state, SFR1);
1376         r0 = STV090x_READ_DEMOD(state, SFR0);
1377
1378         srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
1379
1380         pow2 = 1 << 16;
1381         int_1 = clk / pow2;
1382         int_2 = srate / pow2;
1383
1384         tmp_1 = clk % pow2;
1385         tmp_2 = srate % pow2;
1386
1387         srate = (int_1 * int_2) +
1388                 ((int_1 * tmp_2) / pow2) +
1389                 ((int_2 * tmp_1) / pow2);
1390
1391         return srate;
1392 }
1393
1394 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1395 {
1396         struct dvb_frontend *fe = &state->frontend;
1397
1398         int tmg_lock = 0, i;
1399         s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1400         u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1401
1402         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1403         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1404         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1405                 goto err;
1406         if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1407                 goto err;
1408         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1409                 goto err;
1410         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1411                 goto err;
1412         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1413         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1414         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1415         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1416                 goto err;
1417
1418         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1419                 goto err;
1420         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1421                 goto err;
1422         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1423                 goto err;
1424         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1425                 goto err;
1426         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1427                 goto err;
1428         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
1429                 goto err;
1430
1431         if (state->dev_ver >= 0x20) {
1432                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1433                         goto err;
1434                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1435                         goto err;
1436         } else {
1437                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1438                         goto err;
1439                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x73) < 0)
1440                         goto err;
1441         }
1442
1443         if (state->srate <= 2000000)
1444                 car_step = 1000;
1445         else if (state->srate <= 5000000)
1446                 car_step = 2000;
1447         else if (state->srate <= 12000000)
1448                 car_step = 3000;
1449         else
1450                 car_step = 5000;
1451
1452         steps  = -1 + ((state->search_range / 1000) / car_step);
1453         steps /= 2;
1454         steps  = (2 * steps) + 1;
1455         if (steps < 0)
1456                 steps = 1;
1457         else if (steps > 10) {
1458                 steps = 11;
1459                 car_step = (state->search_range / 1000) / 10;
1460         }
1461         cur_step = 0;
1462         dir = 1;
1463         freq = state->frequency;
1464
1465         while ((!tmg_lock) && (cur_step < steps)) {
1466                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1467                         goto err;
1468                 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1469                 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x00); /* trigger acquisition */
1470                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1471                         goto err;
1472                 msleep(50);
1473                 for (i = 0; i < 10; i++) {
1474                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1475                         if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1476                                 tmg_cpt++;
1477                         agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1478                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1479                 }
1480                 agc2 /= 10;
1481                 srate_coarse = stv090x_get_srate(state, state->mclk);
1482                 cur_step++;
1483                 dir *= -1;
1484                 if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
1485                         tmg_lock = 1;
1486                 else if (cur_step < steps) {
1487                         if (dir > 0)
1488                                 freq += cur_step * car_step;
1489                         else
1490                                 freq -= cur_step * car_step;
1491
1492                         /* Setup tuner */
1493                         stv090x_i2c_gate_ctrl(fe, 1);
1494
1495                         if (state->config->tuner_set_frequency)
1496                                 state->config->tuner_set_frequency(fe, state->frequency);
1497
1498                         if (state->config->tuner_set_bandwidth)
1499                                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1500
1501                         stv090x_i2c_gate_ctrl(fe, 0);
1502                         msleep(50);
1503                         stv090x_i2c_gate_ctrl(fe, 1);
1504
1505                         if (state->config->tuner_get_status)
1506                                 state->config->tuner_get_status(fe, &reg);
1507
1508                         if (reg)
1509                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1510                         else
1511                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1512
1513                         stv090x_i2c_gate_ctrl(fe, 0);
1514
1515                 }
1516         }
1517         if (!tmg_lock)
1518                 srate_coarse = 0;
1519         else
1520                 srate_coarse = stv090x_get_srate(state, state->mclk);
1521
1522         return srate_coarse;
1523 err:
1524         dprintk(FE_ERROR, 1, "I/O error");
1525         return -1;
1526 }
1527
1528 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1529 {
1530         u32 srate_coarse, freq_coarse, sym, reg;
1531
1532         srate_coarse = stv090x_get_srate(state, state->mclk);
1533         freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
1534         freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1535         sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1536
1537         if (sym < state->srate)
1538                 srate_coarse = 0;
1539         else {
1540                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1541                         goto err;
1542                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
1543                         goto err;
1544                 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1545                         goto err;
1546                 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1547                         goto err;
1548                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1549                         goto err;
1550                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1551                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1552                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1553                         goto err;
1554
1555                 if (state->dev_ver >= 0x20) {
1556                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1557                                 goto err;
1558                 } else {
1559                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1560                                 goto err;
1561                 }
1562
1563                 if (srate_coarse > 3000000) {
1564                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1565                         sym  = (sym / 1000) * 65536;
1566                         sym /= (state->mclk / 1000);
1567                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1568                                 goto err;
1569                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1570                                 goto err;
1571                         sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1572                         sym  = (sym / 1000) * 65536;
1573                         sym /= (state->mclk / 1000);
1574                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1575                                 goto err;
1576                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1577                                 goto err;
1578                         sym  = (srate_coarse / 1000) * 65536;
1579                         sym /= (state->mclk / 1000);
1580                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1581                                 goto err;
1582                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1583                                 goto err;
1584                 } else {
1585                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1586                         sym  = (sym / 100) * 65536;
1587                         sym /= (state->mclk / 100);
1588                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1589                                 goto err;
1590                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1591                                 goto err;
1592                         sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1593                         sym  = (sym / 100) * 65536;
1594                         sym /= (state->mclk / 100);
1595                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1596                                 goto err;
1597                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1598                                 goto err;
1599                         sym  = (srate_coarse / 100) * 65536;
1600                         sym /= (state->mclk / 100);
1601                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1602                                 goto err;
1603                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1604                                 goto err;
1605                 }
1606                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1607                         goto err;
1608                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1609                         goto err;
1610                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1611                         goto err;
1612                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1613                         goto err;
1614         }
1615
1616         return srate_coarse;
1617
1618 err:
1619         dprintk(FE_ERROR, 1, "I/O error");
1620         return -1;
1621 }
1622
1623 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1624 {
1625         s32 timer = 0, lock = 0;
1626         u32 reg;
1627         u8 stat;
1628
1629         while ((timer < timeout) && (!lock)) {
1630                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1631                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1632
1633                 switch (stat) {
1634                 case 0: /* searching */
1635                 case 1: /* first PLH detected */
1636                 default:
1637                         dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1638                         lock = 0;
1639                         break;
1640                 case 2: /* DVB-S2 mode */
1641                 case 3: /* DVB-S1/legacy mode */
1642                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1643                         lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1644                         break;
1645                 }
1646
1647                 if (!lock)
1648                         msleep(10);
1649                 else
1650                         dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1651
1652                 timer += 10;
1653         }
1654         return lock;
1655 }
1656
1657 static int stv090x_blind_search(struct stv090x_state *state)
1658 {
1659         u32 agc2, reg, srate_coarse;
1660         s32 timeout_dmd = 500, cpt_fail, agc2_ovflw, i;
1661         u8 k_ref, k_max, k_min;
1662         int coarse_fail, lock;
1663
1664         if (state->dev_ver < 0x20) {
1665                 k_max = 233;
1666                 k_min = 143;
1667         } else {
1668                 k_max = 120;
1669                 k_min = 30;
1670         }
1671
1672         agc2 = stv090x_get_agc2_min_level(state);
1673
1674         if (agc2 > STV090x_SEARCH_AGC2_TH) {
1675                 lock = 0;
1676         } else {
1677                 if (state->dev_ver == 0x10) {
1678                         if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1679                                 goto err;
1680                 }
1681                 if (state->dev_ver < 0x20) {
1682                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1683                                 goto err;
1684                 }
1685
1686                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1687                         goto err;
1688                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1689                         goto err;
1690                 if (state->dev_ver >= 0x20) {
1691                         if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1692                                 goto err;
1693                         if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1694                                 goto err;
1695                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1696                                 goto err;
1697                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1698                                 goto err;
1699                 }
1700
1701                 k_ref = k_max;
1702                 do {
1703                         if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1704                                 goto err;
1705                         if (stv090x_srate_srch_coarse(state) != 0) {
1706                                 srate_coarse = stv090x_srate_srch_fine(state);
1707                                 if (srate_coarse != 0) {
1708                                         stv090x_get_lock_tmg(state);
1709                                         lock = stv090x_get_dmdlock(state, timeout_dmd);
1710                                 } else {
1711                                         lock = 0;
1712                                 }
1713                         } else {
1714                                 cpt_fail = 0;
1715                                 agc2_ovflw = 0;
1716                                 for (i = 0; i < 10; i++) {
1717                                         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1718                                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1719                                         if (agc2 >= 0xff00)
1720                                                 agc2_ovflw++;
1721                                         reg = STV090x_READ_DEMOD(state, DSTATUS2);
1722                                         if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
1723                                             (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
1724
1725                                                 cpt_fail++;
1726                                 }
1727                                 if ((cpt_fail > 7) || (agc2_ovflw > 7))
1728                                         coarse_fail = 1;
1729
1730                                 lock = 0;
1731                         }
1732                         k_ref -= 30;
1733                 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
1734         }
1735
1736         return lock;
1737
1738 err:
1739         dprintk(FE_ERROR, 1, "I/O error");
1740         return -1;
1741 }
1742
1743 static int stv090x_chk_tmg(struct stv090x_state *state)
1744 {
1745         u32 reg;
1746         s32 tmg_cpt, i;
1747         u8 freq, tmg_thh, tmg_thl;
1748         int tmg_lock;
1749
1750         freq = STV090x_READ_DEMOD(state, CARFREQ);
1751         tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
1752         tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
1753         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1754                 goto err;
1755         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1756                 goto err;
1757
1758         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1759         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
1760         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1761                 goto err;
1762         if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
1763                 goto err;
1764
1765         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
1766                 goto err;
1767         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
1768                 goto err;
1769
1770         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
1771                 goto err;
1772         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1773                 goto err;
1774         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
1775                 goto err;
1776
1777         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
1778                 goto err;
1779         msleep(10);
1780
1781         for (i = 0; i < 10; i++) {
1782                 reg = STV090x_READ_DEMOD(state, DSTATUS);
1783                 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1784                         tmg_cpt++;
1785                 msleep(1);
1786         }
1787         if (tmg_cpt >= 3)
1788                 tmg_lock = 1;
1789
1790         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1791                 goto err;
1792         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
1793                 goto err;
1794         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
1795                 goto err;
1796
1797         if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
1798                 goto err;
1799         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
1800                 goto err;
1801         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
1802                 goto err;
1803
1804         return  tmg_lock;
1805
1806 err:
1807         dprintk(FE_ERROR, 1, "I/O error");
1808         return -1;
1809 }
1810
1811 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
1812 {
1813         struct dvb_frontend *fe = &state->frontend;
1814
1815         u32 reg;
1816         s32 car_step, steps, cur_step, dir, freq, timeout_lock;
1817         int lock = 0;
1818
1819         if (state->srate >= 10000000)
1820                 timeout_lock = timeout_dmd / 3;
1821         else
1822                 timeout_lock = timeout_dmd / 2;
1823
1824         lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
1825         if (!lock) {
1826                 if (state->srate >= 10000000) {
1827                         if (stv090x_chk_tmg(state)) {
1828                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1829                                         goto err;
1830                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1831                                         goto err;
1832                                 lock = stv090x_get_dmdlock(state, timeout_dmd);
1833                         } else {
1834                                 lock = 0;
1835                         }
1836                 } else {
1837                         if (state->srate <= 4000000)
1838                                 car_step = 1000;
1839                         else if (state->srate <= 7000000)
1840                                 car_step = 2000;
1841                         else if (state->srate <= 10000000)
1842                                 car_step = 3000;
1843                         else
1844                                 car_step = 5000;
1845
1846                         steps  = (state->search_range / 1000) / car_step;
1847                         steps /= 2;
1848                         steps  = 2 * (steps + 1);
1849                         if (steps < 0)
1850                                 steps = 2;
1851                         else if (steps > 12)
1852                                 steps = 12;
1853
1854                         cur_step = 1;
1855                         dir = 1;
1856
1857                         if (!lock) {
1858                                 freq = state->frequency;
1859                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
1860                                 while ((cur_step <= steps) && (!lock)) {
1861                                         if (dir > 0)
1862                                                 freq += cur_step * car_step;
1863                                         else
1864                                                 freq -= cur_step * car_step;
1865
1866                                         /* Setup tuner */
1867                                         stv090x_i2c_gate_ctrl(fe, 1);
1868
1869                                         if (state->config->tuner_set_frequency)
1870                                                 state->config->tuner_set_frequency(fe, state->frequency);
1871
1872                                         if (state->config->tuner_set_bandwidth)
1873                                                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1874
1875                                         stv090x_i2c_gate_ctrl(fe, 0);
1876
1877                                         msleep(50);
1878
1879                                         stv090x_i2c_gate_ctrl(fe, 1);
1880
1881                                         if (state->config->tuner_get_status)
1882                                                 state->config->tuner_get_status(fe, &reg);
1883
1884                                         if (reg)
1885                                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1886                                         else
1887                                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1888
1889                                         stv090x_i2c_gate_ctrl(fe, 0);
1890
1891                                         STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
1892                                         if (state->delsys == STV090x_DVBS2) {
1893                                                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1894                                                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1895                                                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1896                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1897                                                         goto err;
1898                                                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1899                                                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1900                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1901                                                         goto err;
1902                                         }
1903                                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1904                                                 goto err;
1905                                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1906                                                 goto err;
1907                                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1908                                                 goto err;
1909                                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1910                                                 goto err;
1911                                         lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
1912
1913                                         dir *= -1;
1914                                         cur_step++;
1915                                 }
1916                         }
1917                 }
1918         }
1919
1920         return lock;
1921
1922 err:
1923         dprintk(FE_ERROR, 1, "I/O error");
1924         return -1;
1925 }
1926
1927 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
1928 {
1929         s32 timeout, inc, steps_max, srate, car_max;
1930
1931         srate = state->srate;
1932         car_max = state->search_range / 1000;
1933         car_max  = 65536 * (car_max / 2);
1934         car_max /= (state->mclk / 1000);
1935
1936         if (car_max > 0x4000)
1937                 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
1938
1939         inc  = srate;
1940         inc /= state->mclk / 1000;
1941         inc *= 256;
1942         inc *= 256;
1943         inc /= 1000;
1944
1945         switch (state->search_mode) {
1946         case STV090x_SEARCH_DVBS1:
1947         case STV090x_SEARCH_DSS:
1948                 inc *= 3; /* freq step = 3% of srate */
1949                 timeout = 20;
1950                 break;
1951
1952         case STV090x_SEARCH_DVBS2:
1953                 inc *= 4;
1954                 timeout = 25;
1955                 break;
1956
1957         case STV090x_SEARCH_AUTO:
1958         default:
1959                 inc *= 3;
1960                 timeout = 25;
1961                 break;
1962         }
1963         inc /= 100;
1964         if ((inc > car_max) || (inc < 0))
1965                 inc = car_max / 2; /* increment <= 1/8 Mclk */
1966
1967         timeout *= 27500; /* 27.5 Msps reference */
1968         if (srate > 0)
1969                 timeout /= (srate / 1000);
1970
1971         if ((timeout > 100) || (timeout < 0))
1972                 timeout = 100;
1973
1974         steps_max = (car_max / inc) + 1; /* min steps = 3 */
1975         if ((steps_max > 100) || (steps_max < 0)) {
1976                 steps_max = 100; /* max steps <= 100 */
1977                 inc = car_max / steps_max;
1978         }
1979         *freq_inc = inc;
1980         *timeout_sw = timeout;
1981         *steps = steps_max;
1982
1983         return 0;
1984 }
1985
1986 static int stv090x_chk_signal(struct stv090x_state *state)
1987 {
1988         s32 offst_car, agc2, car_max;
1989         int no_signal;
1990
1991         offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
1992         offst_car |= STV090x_READ_DEMOD(state, CFR1);
1993
1994         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1995         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1996         car_max = state->search_range / 1000;
1997
1998         car_max += (car_max / 10); /* 10% margin */
1999         car_max  = (65536 * car_max / 2);
2000         car_max /= state->mclk / 1000;
2001
2002         if (car_max > 0x4000)
2003                 car_max = 0x4000;
2004
2005         if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2006                 no_signal = 1;
2007                 dprintk(FE_DEBUG, 1, "No Signal");
2008         } else {
2009                 no_signal = 0;
2010                 dprintk(FE_DEBUG, 1, "Found Signal");
2011         }
2012
2013         return no_signal;
2014 }
2015
2016 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2017 {
2018         int no_signal, lock = 0;
2019         s32 cpt_step, offst_freq, car_max;
2020         u32 reg;
2021
2022         car_max  = state->search_range / 1000;
2023         car_max += (car_max / 10);
2024         car_max  = (65536 * car_max / 2);
2025         car_max /= (state->mclk / 1000);
2026         if (car_max > 0x4000)
2027                 car_max = 0x4000;
2028
2029         if (zigzag)
2030                 offst_freq = 0;
2031         else
2032                 offst_freq = -car_max + inc;
2033
2034         cpt_step = 0;
2035         do {
2036                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2037                         goto err;
2038                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2039                         goto err;
2040                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2041                         goto err;
2042                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2043                         goto err;
2044
2045                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2046                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2047                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2048                         goto err;
2049
2050                 if (state->dev_ver == 0x12) {
2051                         reg = STV090x_READ_DEMOD(state, TSCFGH);
2052                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x1);
2053                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2054                                 goto err;
2055                 }
2056
2057                 if (zigzag) {
2058                         if (offst_freq >= 0)
2059                                 offst_freq = -offst_freq - 2 * inc;
2060                         else
2061                                 offst_freq = -offst_freq;
2062                 } else {
2063                         offst_freq += 2 * inc;
2064                 }
2065
2066                 lock = stv090x_get_dmdlock(state, timeout);
2067                 no_signal = stv090x_chk_signal(state);
2068
2069         } while ((!lock) &&
2070                  (!no_signal) &&
2071                   ((offst_freq - inc) < car_max) &&
2072                   ((offst_freq + inc) > -car_max) &&
2073                   (cpt_step < steps_max));
2074
2075         reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2076         STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2077         if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2078                         goto err;
2079
2080         return lock;
2081 err:
2082         dprintk(FE_ERROR, 1, "I/O error");
2083         return -1;
2084 }
2085
2086 static int stv090x_sw_algo(struct stv090x_state *state)
2087 {
2088         int no_signal, zigzag, lock = 0;
2089         u32 reg;
2090
2091         s32 dvbs2_fly_wheel;
2092         s32 inc, timeout_step, trials, steps_max;
2093
2094         stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max); /* get params */
2095
2096         switch (state->search_mode) {
2097         case STV090x_SEARCH_DVBS1:
2098         case STV090x_SEARCH_DSS:
2099                 /* accelerate the frequency detector */
2100                 if (state->dev_ver >= 0x20) {
2101                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2102                                 goto err;
2103                 } else {
2104                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2105                                 goto err;
2106                 }
2107                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2108                         goto err;
2109                 zigzag = 0;
2110                 break;
2111
2112         case STV090x_SEARCH_DVBS2:
2113                 if (state->dev_ver >= 0x20) {
2114                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2115                                 goto err;
2116                 } else {
2117                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2118                                 goto err;
2119                 }
2120                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2121                         goto err;
2122                 zigzag = 1;
2123                 break;
2124
2125         case STV090x_SEARCH_AUTO:
2126         default:
2127                 /* accelerate the frequency detector */
2128                 if (state->dev_ver >= 0x20) {
2129                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2130                                 goto err;
2131                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2132                                 goto err;
2133                 } else {
2134                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2135                                 goto err;
2136                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2137                                 goto err;
2138                 }
2139                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x69) < 0)
2140                         goto err;
2141                 zigzag = 0;
2142                 break;
2143         }
2144
2145         trials = 0;
2146         do {
2147                 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2148                 no_signal = stv090x_chk_signal(state);
2149                 trials++;
2150
2151                 /*run the SW search 2 times maximum*/
2152                 if (lock || no_signal || (trials == 2)) {
2153                         /*Check if the demod is not losing lock in DVBS2*/
2154                         if (state->dev_ver >= 0x20) {
2155                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2156                                         goto err;
2157                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2158                                         goto err;
2159                         } else {
2160                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
2161                                         goto err;
2162                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0)
2163                                         goto err;
2164                         }
2165
2166                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2167                         if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2168                                 /*Check if the demod is not losing lock in DVBS2*/
2169                                 msleep(timeout_step);
2170                                 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2171                                 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2172                                 if (dvbs2_fly_wheel < 0xd) {     /*if correct frames is decrementing */
2173                                         msleep(timeout_step);
2174                                         reg = STV090x_READ_DEMOD(state, DMDFLYW);
2175                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2176                                 }
2177                                 if (dvbs2_fly_wheel < 0xd) {
2178                                         /*FALSE lock, The demod is loosing lock */
2179                                         lock = 0;
2180                                         if (trials < 2) {
2181                                                 if (state->dev_ver >= 0x20) {
2182                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2183                                                                 goto err;
2184                                                 } else {
2185                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2186                                                                 goto err;
2187                                                 }
2188                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2189                                                         goto err;
2190                                         }
2191                                 }
2192                         }
2193                 }
2194         } while ((!lock) && (trials < 2) && (!no_signal));
2195
2196         return lock;
2197 err:
2198         dprintk(FE_ERROR, 1, "I/O error");
2199         return -1;
2200 }
2201
2202 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2203 {
2204         u32 reg;
2205         enum stv090x_delsys delsys;
2206
2207         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2208         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2209                 delsys = STV090x_DVBS2;
2210         else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2211                 reg = STV090x_READ_DEMOD(state, FECM);
2212                 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2213                         delsys = STV090x_DSS;
2214                 else
2215                         delsys = STV090x_DVBS1;
2216         } else {
2217                 delsys = STV090x_ERROR;
2218         }
2219
2220         return delsys;
2221 }
2222
2223 /* in Hz */
2224 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2225 {
2226         s32 derot, int_1, int_2, tmp_1, tmp_2;
2227         u32 pow2;
2228
2229         derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
2230         derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
2231         derot |= STV090x_READ_DEMOD(state, CFR0);
2232
2233         derot = comp2(derot, 24);
2234         pow2 = 1 << 12;
2235         int_1 = state->mclk / pow2;
2236         int_2 = derot / pow2;
2237
2238         tmp_1 = state->mclk % pow2;
2239         tmp_2 = derot % pow2;
2240
2241         derot = (int_1 * int_2) +
2242                 ((int_1 * tmp_2) / pow2) +
2243                 ((int_1 * tmp_1) / pow2);
2244
2245         return derot;
2246 }
2247
2248 static int stv090x_get_viterbi(struct stv090x_state *state)
2249 {
2250         u32 reg, rate;
2251
2252         reg = STV090x_READ_DEMOD(state, VITCURPUN);
2253         rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2254
2255         switch (rate) {
2256         case 13:
2257                 state->fec = STV090x_PR12;
2258                 break;
2259
2260         case 18:
2261                 state->fec = STV090x_PR23;
2262                 break;
2263
2264         case 21:
2265                 state->fec = STV090x_PR34;
2266                 break;
2267
2268         case 24:
2269                 state->fec = STV090x_PR56;
2270                 break;
2271
2272         case 25:
2273                 state->fec = STV090x_PR67;
2274                 break;
2275
2276         case 26:
2277                 state->fec = STV090x_PR78;
2278                 break;
2279
2280         default:
2281                 state->fec = STV090x_PRERR;
2282                 break;
2283         }
2284
2285         return 0;
2286 }
2287
2288 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2289 {
2290         struct dvb_frontend *fe = &state->frontend;
2291
2292         u8 tmg;
2293         u32 reg;
2294         s32 i = 0, offst_freq;
2295
2296         msleep(5);
2297
2298         if (state->algo == STV090x_BLIND_SEARCH) {
2299                 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2300                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2301                 while ((i <= 50) && (!tmg) && (tmg != 0xff)) {
2302                         tmg = STV090x_READ_DEMOD(state, TMGREG2);
2303                         msleep(5);
2304                         i += 5;
2305                 }
2306         }
2307         state->delsys = stv090x_get_std(state);
2308
2309         stv090x_i2c_gate_ctrl(fe, 1);
2310
2311         if (state->config->tuner_get_frequency)
2312                 state->config->tuner_get_frequency(fe, &state->frequency);
2313
2314         stv090x_i2c_gate_ctrl(fe, 0);
2315
2316         offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000;
2317         state->frequency += offst_freq;
2318         stv090x_get_viterbi(state);
2319         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2320         state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2321         state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2322         state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2323         reg = STV090x_READ_DEMOD(state, TMGOBS);
2324         state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2325         reg = STV090x_READ_DEMOD(state, FECM);
2326         state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2327
2328         if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2329
2330                 stv090x_i2c_gate_ctrl(fe, 1);
2331
2332                 if (state->config->tuner_get_frequency)
2333                         state->config->tuner_get_frequency(fe, &state->frequency);
2334
2335                 stv090x_i2c_gate_ctrl(fe, 0);
2336
2337                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2338                         return  STV090x_RANGEOK;
2339                 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2340                         return STV090x_RANGEOK;
2341                 else
2342                         return STV090x_OUTOFRANGE; /* Out of Range */
2343         } else {
2344                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2345                         return STV090x_RANGEOK;
2346                 else
2347                         return STV090x_OUTOFRANGE;
2348         }
2349
2350         return STV090x_OUTOFRANGE;
2351 }
2352
2353 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2354 {
2355         s32 offst_tmg;
2356         s32 pow2;
2357
2358         offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2359         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
2360         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2361
2362         pow2 = 1 << 24;
2363
2364         offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2365         if (!offst_tmg)
2366                 offst_tmg = 1;
2367
2368         offst_tmg  = ((s32) srate * 10) / (pow2 / offst_tmg);
2369         offst_tmg /= 320;
2370
2371         return offst_tmg;
2372 }
2373
2374 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2375 {
2376         u8 aclc = 0x29;
2377         s32 i;
2378         struct stv090x_long_frame_crloop *car_loop;
2379
2380         if (state->dev_ver <= 0x12)
2381                 car_loop = stv090x_s2_crl;
2382         else if (state->dev_ver == 0x20)
2383                 car_loop = stv090x_s2_crl_cut20;
2384         else
2385                 car_loop = stv090x_s2_crl;
2386
2387
2388         if (modcod < STV090x_QPSK_12) {
2389                 i = 0;
2390                 while ((i < 3) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2391                         i++;
2392
2393                 if (i >= 3)
2394                         i = 2;
2395
2396         } else {
2397                 i = 0;
2398                 while ((i < 14) && (modcod != car_loop[i].modcod))
2399                         i++;
2400
2401                 if (i >= 14) {
2402                         i = 0;
2403                         while ((i < 11) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2404                                 i++;
2405
2406                         if (i >= 11)
2407                                 i = 10;
2408                 }
2409         }
2410
2411         if (modcod <= STV090x_QPSK_25) {
2412                 if (pilots) {
2413                         if (state->srate <= 3000000)
2414                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_2;
2415                         else if (state->srate <= 7000000)
2416                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_5;
2417                         else if (state->srate <= 15000000)
2418                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_10;
2419                         else if (state->srate <= 25000000)
2420                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_20;
2421                         else
2422                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_30;
2423                 } else {
2424                         if (state->srate <= 3000000)
2425                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_2;
2426                         else if (state->srate <= 7000000)
2427                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_5;
2428                         else if (state->srate <= 15000000)
2429                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_10;
2430                         else if (state->srate <= 25000000)
2431                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_20;
2432                         else
2433                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_30;
2434                 }
2435
2436         } else if (modcod <= STV090x_8PSK_910) {
2437                 if (pilots) {
2438                         if (state->srate <= 3000000)
2439                                 aclc = car_loop[i].crl_pilots_on_2;
2440                         else if (state->srate <= 7000000)
2441                                 aclc = car_loop[i].crl_pilots_on_5;
2442                         else if (state->srate <= 15000000)
2443                                 aclc = car_loop[i].crl_pilots_on_10;
2444                         else if (state->srate <= 25000000)
2445                                 aclc = car_loop[i].crl_pilots_on_20;
2446                         else
2447                                 aclc = car_loop[i].crl_pilots_on_30;
2448                 } else {
2449                         if (state->srate <= 3000000)
2450                                 aclc = car_loop[i].crl_pilots_off_2;
2451                         else if (state->srate <= 7000000)
2452                                 aclc = car_loop[i].crl_pilots_off_5;
2453                         else if (state->srate <= 15000000)
2454                                 aclc = car_loop[i].crl_pilots_off_10;
2455                         else if (state->srate <= 25000000)
2456                                 aclc = car_loop[i].crl_pilots_off_20;
2457                         else
2458                                 aclc = car_loop[i].crl_pilots_off_30;
2459                 }
2460         } else { /* 16APSK and 32APSK */
2461                 if (state->srate <= 3000000)
2462                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_2;
2463                 else if (state->srate <= 7000000)
2464                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_5;
2465                 else if (state->srate <= 15000000)
2466                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_10;
2467                 else if (state->srate <= 25000000)
2468                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_20;
2469                 else
2470                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_30;
2471         }
2472
2473         return aclc;
2474 }
2475
2476 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2477 {
2478         s32 index = 0;
2479         u8 aclc = 0x0b;
2480
2481         switch (state->modulation) {
2482         case STV090x_QPSK:
2483         default:
2484                 index = 0;
2485                 break;
2486         case STV090x_8PSK:
2487                 index = 1;
2488                 break;
2489         case STV090x_16APSK:
2490                 index = 2;
2491                 break;
2492         case STV090x_32APSK:
2493                 index = 3;
2494                 break;
2495         }
2496
2497         switch (state->dev_ver) {
2498         case 0x20:
2499                 if (state->srate <= 3000000)
2500                         aclc = stv090x_s2_short_crl[index].crl_cut20_2;
2501                 else if (state->srate <= 7000000)
2502                         aclc = stv090x_s2_short_crl[index].crl_cut20_5;
2503                 else if (state->srate <= 15000000)
2504                         aclc = stv090x_s2_short_crl[index].crl_cut20_10;
2505                 else if (state->srate <= 25000000)
2506                         aclc = stv090x_s2_short_crl[index].crl_cut20_20;
2507                 else
2508                         aclc = stv090x_s2_short_crl[index].crl_cut20_30;
2509                 break;
2510
2511         case 0x12:
2512         default:
2513                 if (state->srate <= 3000000)
2514                         aclc = stv090x_s2_short_crl[index].crl_cut12_2;
2515                 else if (state->srate <= 7000000)
2516                         aclc = stv090x_s2_short_crl[index].crl_cut12_5;
2517                 else if (state->srate <= 15000000)
2518                         aclc = stv090x_s2_short_crl[index].crl_cut12_10;
2519                 else if (state->srate <= 25000000)
2520                         aclc = stv090x_s2_short_crl[index].crl_cut12_20;
2521                 else
2522                         aclc = stv090x_s2_short_crl[index].crl_cut12_30;
2523                 break;
2524         }
2525
2526         return aclc;
2527 }
2528
2529 static int stv090x_optimize_track(struct stv090x_state *state)
2530 {
2531         struct dvb_frontend *fe = &state->frontend;
2532
2533         enum stv090x_rolloff rolloff;
2534         enum stv090x_modcod modcod;
2535
2536         s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2537         u32 reg;
2538
2539         srate  = stv090x_get_srate(state, state->mclk);
2540         srate += stv090x_get_tmgoffst(state, srate);
2541
2542         switch (state->delsys) {
2543         case STV090x_DVBS1:
2544         case STV090x_DSS:
2545                 if (state->algo == STV090x_SEARCH_AUTO) {
2546                         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2547                         STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2548                         STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2549                         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2550                                 goto err;
2551                 }
2552                 reg = STV090x_READ_DEMOD(state, DEMOD);
2553                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2554                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2555                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2556                         goto err;
2557                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2558                         goto err;
2559                 break;
2560
2561         case STV090x_DVBS2:
2562                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2563                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2564                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2565                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2566                         goto err;
2567                 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2568                         goto err;
2569                 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2570                         goto err;
2571                 if (state->frame_len == STV090x_LONG_FRAME) {
2572                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2573                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2574                         pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2575                         aclc = stv090x_optimize_carloop(state, modcod, pilots);
2576                         if (modcod <= STV090x_QPSK_910) {
2577                                 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2578                         } else if (modcod <= STV090x_8PSK_910) {
2579                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2580                                         goto err;
2581                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2582                                         goto err;
2583                         }
2584                         if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2585                                 if (modcod <= STV090x_16APSK_910) {
2586                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2587                                                 goto err;
2588                                         if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2589                                                 goto err;
2590                                 } else {
2591                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2592                                                 goto err;
2593                                         if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2594                                                 goto err;
2595                                 }
2596                         }
2597                 } else {
2598                         /*Carrier loop setting for short frame*/
2599                         aclc = stv090x_optimize_carloop_short(state);
2600                         if (state->modulation == STV090x_QPSK) {
2601                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2602                                         goto err;
2603                         } else if (state->modulation == STV090x_8PSK) {
2604                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2605                                         goto err;
2606                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2607                                         goto err;
2608                         } else if (state->modulation == STV090x_16APSK) {
2609                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2610                                         goto err;
2611                                 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2612                                         goto err;
2613                         } else if (state->modulation == STV090x_32APSK)  {
2614                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2615                                         goto err;
2616                                 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2617                                         goto err;
2618                         }
2619                 }
2620                 if (state->dev_ver <= 0x11) {
2621                         if (state->demod_mode != STV090x_SINGLE)
2622                                 stv090x_activate_modcod(state); /* link to LDPC after demod LOCK */
2623                 }
2624                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2625                 break;
2626
2627         case STV090x_UNKNOWN:
2628         default:
2629                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2630                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2631                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2632                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2633                         goto err;
2634                 break;
2635         }
2636
2637         f_1 = STV090x_READ_DEMOD(state, CFR2);
2638         f_0 = STV090x_READ_DEMOD(state, CFR1);
2639         reg = STV090x_READ_DEMOD(state, TMGOBS);
2640         rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2641
2642         if (state->algo == STV090x_BLIND_SEARCH) {
2643                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2644                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2645                 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2646                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2647                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2648                         goto err;
2649                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
2650                         goto err;
2651                 stv090x_set_srate(state, srate);
2652                 stv090x_set_max_srate(state, state->mclk, srate);
2653                 stv090x_set_min_srate(state, state->mclk, srate);
2654                 blind_tune = 1;
2655         }
2656
2657         if (state->dev_ver >= 0x20) {
2658                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
2659                     (state->search_mode == STV090x_SEARCH_DSS)          ||
2660                     (state->search_mode == STV090x_SEARCH_AUTO)) {
2661
2662                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2663                                 goto err;
2664                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2665                                 goto err;
2666                 }
2667         }
2668
2669         if (state->dev_ver < 0x20) {
2670                 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x08) < 0)
2671                         goto err;
2672         }
2673         if (state->dev_ver == 0x10) {
2674                 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0x0a) < 0)
2675                         goto err;
2676         }
2677
2678         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2679                 goto err;
2680
2681         if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) {
2682
2683                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2684                         goto err;
2685                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2686                         goto err;
2687                 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2688
2689                 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) {
2690
2691                         if (state->algo != STV090x_WARM_SEARCH) {
2692
2693                                 stv090x_i2c_gate_ctrl(fe, 1);
2694
2695                                 if (state->config->tuner_set_bandwidth)
2696                                         state->config->tuner_set_bandwidth(fe, state->tuner_bw);
2697
2698                                 stv090x_i2c_gate_ctrl(fe, 0);
2699
2700                         }
2701                 }
2702                 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2703                         msleep(50); /* blind search: wait 50ms for SR stabilization */
2704                 else
2705                         msleep(5);
2706
2707                 stv090x_get_lock_tmg(state);
2708
2709                 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
2710                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2711                                 goto err;
2712                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2713                                 goto err;
2714                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2715                                 goto err;
2716                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2717                                 goto err;
2718
2719                         i = 0;
2720
2721                         while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
2722
2723                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2724                                         goto err;
2725                                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2726                                         goto err;
2727                                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2728                                         goto err;
2729                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2730                                         goto err;
2731                                 i++;
2732                         }
2733                 }
2734
2735         }
2736
2737         if (state->dev_ver >= 0x20) {
2738                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2739                         goto err;
2740         }
2741         if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
2742                 stv090x_set_vit_thtracq(state);
2743
2744         return 0;
2745 err:
2746         dprintk(FE_ERROR, 1, "I/O error");
2747         return -1;
2748 }
2749
2750 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
2751 {
2752         s32 timer = 0, lock = 0, stat;
2753         u32 reg;
2754
2755         while ((timer < timeout) && (!lock)) {
2756                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2757                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
2758
2759                 switch (stat) {
2760                 case 0: /* searching */
2761                 case 1: /* first PLH detected */
2762                 default:
2763                         lock = 0;
2764                         break;
2765
2766                 case 2: /* DVB-S2 mode */
2767                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
2768                         lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
2769                         break;
2770
2771                 case 3: /* DVB-S1/legacy mode */
2772                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
2773                         lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
2774                         break;
2775                 }
2776                 if (!lock) {
2777                         msleep(10);
2778                         timer += 10;
2779                 }
2780         }
2781         return lock;
2782 }
2783
2784 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
2785 {
2786         u32 reg;
2787         s32 timer = 0;
2788         int lock;
2789
2790         lock = stv090x_get_dmdlock(state, timeout_dmd);
2791         if (lock)
2792                 lock = stv090x_get_feclock(state, timeout_fec);
2793
2794         if (lock) {
2795                 lock = 0;
2796
2797                 while ((timer < timeout_fec) && (!lock)) {
2798                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
2799                         lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
2800                         msleep(1);
2801                         timer++;
2802                 }
2803         }
2804
2805         return lock;
2806 }
2807
2808 static int stv090x_set_s2rolloff(struct stv090x_state *state)
2809 {
2810         s32 rolloff;
2811         u32 reg;
2812
2813         if (state->dev_ver == 0x10) {
2814                 reg = STV090x_READ_DEMOD(state, DEMOD);
2815                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2816                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2817                         goto err;
2818                 rolloff = STV090x_READ_DEMOD(state, MATSTR1) & 0x03;
2819                 reg = STV090x_READ_DEMOD(state, DEMOD);
2820                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, reg);
2821                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2822                         goto err;
2823         } else {
2824                 reg = STV090x_READ_DEMOD(state, DEMOD);
2825                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x00);
2826                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2827                         goto err;
2828         }
2829         return 0;
2830 err:
2831         dprintk(FE_ERROR, 1, "I/O error");
2832         return -1;
2833 }
2834
2835 static enum stv090x_signal_state stv090x_acq_fixs1(struct stv090x_state *state)
2836 {
2837         s32 srate, f_1, f_2;
2838         enum stv090x_signal_state signal_state = STV090x_NODATA;
2839         u32 reg;
2840         int lock;
2841
2842         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2843         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) { /* DVB-S mode */
2844                 srate  = stv090x_get_srate(state, state->mclk);
2845                 srate += stv090x_get_tmgoffst(state, state->srate);
2846
2847                 if (state->algo == STV090x_BLIND_SEARCH)
2848                         stv090x_set_srate(state, state->srate);
2849
2850                 stv090x_get_lock_tmg(state);
2851
2852                 f_1 = STV090x_READ_DEMOD(state, CFR2);
2853                 f_2 = STV090x_READ_DEMOD(state, CFR1);
2854
2855                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2856                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
2857                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2858                         goto err;
2859
2860                 reg = STV090x_READ_DEMOD(state, DEMOD);
2861                 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_SWAP);
2862                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2863                         goto err;
2864                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) /* stop demod */
2865                         goto err;
2866                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2867                         goto err;
2868                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2869                         goto err;
2870                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2871                         goto err;
2872
2873                 if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2874                         lock = 1;
2875                         stv090x_get_sig_params(state);
2876                         stv090x_optimize_track(state);
2877                 } else {
2878                         reg = STV090x_READ_DEMOD(state, DEMOD);
2879                         STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_NORMAL);
2880                         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2881                                 goto err;
2882                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2883                                 goto err;
2884                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2885                                 goto err;
2886                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2887                                 goto err;
2888                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2889                                 goto err;
2890                         if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2891                                 lock = 1;
2892                                 signal_state = stv090x_get_sig_params(state);
2893                                 stv090x_optimize_track(state);
2894                         }
2895                 }
2896         } else {
2897                 lock = 0;
2898         }
2899
2900         return signal_state;
2901
2902 err:
2903         dprintk(FE_ERROR, 1, "I/O error");
2904         return -1;
2905 }
2906
2907 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
2908 {
2909         struct dvb_frontend *fe = &state->frontend;
2910         enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
2911         u32 reg;
2912         s32 timeout_dmd = 500, timeout_fec = 50;
2913         int lock = 0, low_sr, no_signal = 0;
2914
2915         reg = STV090x_READ_DEMOD(state, TSCFGH);
2916         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
2917         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2918                 goto err;
2919
2920         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
2921                 goto err;
2922
2923         if (state->dev_ver >= 0x20) {
2924                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */
2925                         goto err;
2926         } else {
2927                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0) /* cut 1.x */
2928                         goto err;
2929         }
2930
2931         stv090x_get_lock_tmg(state);
2932
2933         if (state->algo == STV090x_BLIND_SEARCH) {
2934                 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
2935                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x00) < 0) /* wider srate scan */
2936                         goto err;
2937                 stv090x_set_srate(state, 1000000); /* inital srate = 1Msps */
2938         } else {
2939                 /* known srate */
2940                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
2941                         goto err;
2942                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
2943                         goto err;
2944
2945                 if (state->srate >= 10000000) {
2946                         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) /* High SR */
2947                                 goto err;
2948                 } else {
2949                         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) /* Low SR */
2950                                 goto err;
2951                 }
2952
2953                 if (state->dev_ver >= 0x20) {
2954                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
2955                                 goto err;
2956                         if (state->algo == STV090x_COLD_SEARCH)
2957                                 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 1000000)) / 10;
2958                         else if (state->algo == STV090x_WARM_SEARCH)
2959                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
2960                 } else {
2961                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0xc1) < 0)
2962                                 goto err;
2963                         state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
2964                 }
2965                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0) /* narrow srate scan */
2966                         goto err;
2967                 stv090x_set_srate(state, state->srate);
2968                 stv090x_set_max_srate(state, state->mclk, state->srate);
2969                 stv090x_set_min_srate(state, state->mclk, state->srate);
2970
2971                 if (state->srate >= 10000000)
2972                         low_sr = 1;
2973         }
2974
2975         /* Setup tuner */
2976         stv090x_i2c_gate_ctrl(fe, 1);
2977
2978         if (state->config->tuner_set_bbgain)
2979                 state->config->tuner_set_bbgain(fe, 10); /* 10dB */
2980
2981         if (state->config->tuner_set_frequency)
2982                 state->config->tuner_set_frequency(fe, state->frequency);
2983
2984         if (state->config->tuner_set_bandwidth)
2985                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
2986
2987         stv090x_i2c_gate_ctrl(fe, 0);
2988
2989         msleep(50);
2990
2991         stv090x_i2c_gate_ctrl(fe, 1);
2992
2993         if (state->config->tuner_get_status)
2994                 state->config->tuner_get_status(fe, &reg);
2995
2996         if (reg)
2997                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2998         else
2999                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3000
3001         stv090x_i2c_gate_ctrl(fe, 0);
3002
3003         reg = STV090x_READ_DEMOD(state, DEMOD);
3004         STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3005         STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 1);
3006         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3007                 goto err;
3008         stv090x_delivery_search(state);
3009         if (state->algo == STV090x_BLIND_SEARCH)
3010                 stv090x_start_search(state);
3011
3012         if (state->dev_ver == 0x12) {
3013                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3014                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3015                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3016                         goto err;
3017                 msleep(3);
3018                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3019                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3020                         goto err;
3021                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3022                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3023                         goto err;
3024         }
3025
3026         if (state->algo == STV090x_BLIND_SEARCH)
3027                 lock = stv090x_blind_search(state);
3028         else if (state->algo == STV090x_COLD_SEARCH)
3029                 lock = stv090x_get_coldlock(state, timeout_dmd);
3030         else if (state->algo == STV090x_WARM_SEARCH)
3031                 lock = stv090x_get_dmdlock(state, timeout_dmd);
3032
3033         if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3034                 if (!low_sr) {
3035                         if (stv090x_chk_tmg(state))
3036                                 lock = stv090x_sw_algo(state);
3037                 }
3038         }
3039
3040         if (lock)
3041                 signal_state = stv090x_get_sig_params(state);
3042
3043         if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3044                 stv090x_optimize_track(state);
3045                 if (state->dev_ver <= 0x11) { /*workaround for dual DVBS1 cut 1.1 and 1.0 only*/
3046                         if (stv090x_get_std(state) == STV090x_DVBS1) {
3047                                 msleep(20);
3048                                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3049                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3050                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3051                                         goto err;
3052                         } else {
3053                                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3054                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3055                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3056                                         goto err;
3057                                 msleep(3);
3058                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3059                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3060                                         goto err;
3061                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3062                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3063                                         goto err;
3064                         }
3065                 } else if (state->dev_ver == 0x20) { /*cut 2.0 :release TS reset after demod lock and TrackingOptimization*/
3066                         reg = STV090x_READ_DEMOD(state, TSCFGH);
3067                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3068                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3069                                 goto err;
3070                         msleep(3);
3071                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3072                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3073                                 goto err;
3074
3075                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3076                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3077                                 goto err;
3078                 }
3079
3080                 if (stv090x_get_lock(state, timeout_fec, timeout_fec)) {
3081                         lock = 1;
3082                         if (state->delsys == STV090x_DVBS2) {
3083                                 stv090x_set_s2rolloff(state);
3084                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x40) < 0)
3085                                         goto err;
3086                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x00) < 0) /* RESET counter */
3087                                         goto err;
3088                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3089                                         goto err;
3090                         } else {
3091                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3092                                         goto err;
3093                         }
3094                         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3095                                 goto err;
3096                         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3097                                 goto err;
3098                 } else {
3099                         lock = 0;
3100                         signal_state = STV090x_NODATA;
3101                         no_signal = stv090x_chk_signal(state);
3102                 }
3103         }
3104         if ((signal_state == STV090x_NODATA) && (!no_signal)) {
3105                 if (state->dev_ver <= 0x11) {
3106                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3107                         if (((STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD)) == STV090x_DVBS2) && (state->inversion == INVERSION_AUTO))
3108                                 signal_state = stv090x_acq_fixs1(state);
3109                 }
3110         }
3111         return signal_state;
3112
3113 err:
3114         dprintk(FE_ERROR, 1, "I/O error");
3115         return -1;
3116 }
3117
3118 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3119 {
3120         struct stv090x_state *state = fe->demodulator_priv;
3121         struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3122
3123         state->delsys = props->delivery_system;
3124         state->frequency = p->frequency;
3125         state->srate = p->u.qpsk.symbol_rate;
3126
3127         if (!stv090x_algo(state)) {
3128                 dprintk(FE_DEBUG, 1, "Search success!");
3129                 return DVBFE_ALGO_SEARCH_SUCCESS;
3130         } else {
3131                 dprintk(FE_DEBUG, 1, "Search failed!");
3132                 return DVBFE_ALGO_SEARCH_FAILED;
3133         }
3134
3135         return DVBFE_ALGO_SEARCH_ERROR;
3136 }
3137
3138 /* FIXME! */
3139 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3140 {
3141         struct stv090x_state *state = fe->demodulator_priv;
3142         u32 reg;
3143         u8 search_state;
3144         int locked = 0;
3145
3146         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3147         search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3148
3149         switch (search_state) {
3150         case 0: /* searching */
3151         case 1: /* first PLH detected */
3152         default:
3153                 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3154                 locked = 0;
3155                 break;
3156
3157         case 2: /* DVB-S2 mode */
3158                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3159                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3160                 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3161                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
3162                         if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3163                                 locked = 1;
3164                                 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3165                         }
3166                 }
3167                 break;
3168
3169         case 3: /* DVB-S1/legacy mode */
3170                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3171                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3172                 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3173                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3174                         if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3175                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3176                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3177                                         locked = 1;
3178                                         *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3179                                 }
3180                         }
3181                 }
3182                 break;
3183         }
3184
3185         return locked;
3186 }
3187
3188 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3189 {
3190         struct stv090x_state *state = fe->demodulator_priv;
3191
3192         s32 count_4, count_3, count_2, count_1, count_0, count;
3193         u32 reg, h, m, l;
3194         enum fe_status status;
3195
3196         if (!stv090x_read_status(fe, &status)) {
3197                 *per = 1 << 23; /* Max PER */
3198         } else {
3199                 /* Counter 2 */
3200                 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3201                 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3202
3203                 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3204                 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3205
3206                 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3207                 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3208
3209                 *per = ((h << 16) | (m << 8) | l);
3210
3211                 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3212                 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3213                 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3214                 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3215                 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3216
3217                 if ((!count_4) && (!count_3)) {
3218                         count  = (count_2 & 0xff) << 16;
3219                         count |= (count_1 & 0xff) <<  8;
3220                         count |=  count_0 & 0xff;
3221                 } else {
3222                         count = 1 << 24;
3223                 }
3224                 if (count == 0)
3225                         *per = 1;
3226         }
3227         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3228                 goto err;
3229         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3230                 goto err;
3231
3232         return 0;
3233 err:
3234         dprintk(FE_ERROR, 1, "I/O error");
3235         return -1;
3236 }
3237
3238 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3239 {
3240         int res = 0;
3241         int min = 0, med;
3242
3243         if (val < tab[min].read)
3244                 res = tab[min].real;
3245         else if (val >= tab[max].read)
3246                 res = tab[max].real;
3247         else {
3248                 while ((max - min) > 1) {
3249                         med = (max + min) / 2;
3250                         if (val >= tab[min].read && val < tab[med].read)
3251                                 max = med;
3252                         else
3253                                 min = med;
3254                 }
3255                 res = ((val - tab[min].read) *
3256                        (tab[max].real - tab[min].real) /
3257                        (tab[max].read - tab[min].read)) +
3258                         tab[min].real;
3259         }
3260
3261         return res;
3262 }
3263
3264 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3265 {
3266         struct stv090x_state *state = fe->demodulator_priv;
3267         u32 reg;
3268         s32 agc;
3269
3270         reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3271         agc = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3272
3273         *strength = stv090x_table_lookup(stv090x_rf_tab, ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3274         if (agc > stv090x_rf_tab[0].read)
3275                 *strength = 5;
3276         else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3277                 *strength = -100;
3278
3279         return 0;
3280 }
3281
3282 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3283 {
3284         struct stv090x_state *state = fe->demodulator_priv;
3285         u32 reg_0, reg_1, reg, i;
3286         s32 val_0, val_1, val = 0;
3287         u8 lock_f;
3288
3289         switch (state->delsys) {
3290         case STV090x_DVBS2:
3291                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3292                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3293                 if (lock_f) {
3294                         msleep(5);
3295                         for (i = 0; i < 16; i++) {
3296                                 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3297                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3298                                 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3299                                 val_0 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3300                                 val  += MAKEWORD16(val_1, val_0);
3301                                 msleep(1);
3302                         }
3303                         val /= 16;
3304                         *cnr = stv090x_table_lookup(stv090x_s2cn_tab, ARRAY_SIZE(stv090x_s2cn_tab) - 1, val);
3305                         if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s2cn_tab) - 1].read)
3306                                 *cnr = 1000;
3307                 }
3308                 break;
3309
3310         case STV090x_DVBS1:
3311         case STV090x_DSS:
3312                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3313                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3314                 if (lock_f) {
3315                         msleep(5);
3316                         for (i = 0; i < 16; i++) {
3317                                 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3318                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3319                                 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3320                                 val_0 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3321                                 val  += MAKEWORD16(val_1, val_0);
3322                                 msleep(1);
3323                         }
3324                         val /= 16;
3325                         *cnr = stv090x_table_lookup(stv090x_s1cn_tab, ARRAY_SIZE(stv090x_s1cn_tab) - 1, val);
3326                         if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s1cn_tab) - 1].read)
3327                                 *cnr = 1000;
3328                 }
3329                 break;
3330         default:
3331                 break;
3332         }
3333
3334         return 0;
3335 }
3336
3337 static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3338 {
3339         struct stv090x_state *state = fe->demodulator_priv;
3340         u32 reg;
3341
3342         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3343         switch (tone) {
3344         case SEC_TONE_ON:
3345                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3346                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3347                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3348                         goto err;
3349                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3350                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3351                         goto err;
3352                 break;
3353
3354         case SEC_TONE_OFF:
3355                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3356                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3357                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3358                         goto err;
3359                 break;
3360         default:
3361                 return -EINVAL;
3362         }
3363
3364         return 0;
3365 err:
3366         dprintk(FE_ERROR, 1, "I/O error");
3367         return -1;
3368 }
3369
3370
3371 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3372 {
3373         return DVBFE_ALGO_CUSTOM;
3374 }
3375
3376 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3377 {
3378         struct stv090x_state *state = fe->demodulator_priv;
3379         u32 reg, idle = 0, fifo_full = 1;
3380         int i;
3381
3382         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3383
3384         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 2);
3385         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3386         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3387                 goto err;
3388         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3389         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3390                 goto err;
3391
3392         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3393         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3394                 goto err;
3395
3396         for (i = 0; i < cmd->msg_len; i++) {
3397
3398                 while (fifo_full) {
3399                         reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3400                         fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3401                 }
3402
3403                 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3404                         goto err;
3405         }
3406         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3407         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3408         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3409                 goto err;
3410
3411         i = 0;
3412
3413         while ((!idle) && (i < 10)) {
3414                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3415                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3416                 msleep(10);
3417                 i++;
3418         }
3419
3420         return 0;
3421 err:
3422         dprintk(FE_ERROR, 1, "I/O error");
3423         return -1;
3424 }
3425
3426 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
3427 {
3428         struct stv090x_state *state = fe->demodulator_priv;
3429         u32 reg, idle = 0, fifo_full = 1;
3430         u8 mode, value;
3431         int i;
3432
3433         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3434
3435         if (burst == SEC_MINI_A) {
3436                 mode = 3;
3437                 value = 0x00;
3438         } else {
3439                 mode = 2;
3440                 value = 0xFF;
3441         }
3442
3443         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3444         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3445         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3446                 goto err;
3447         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3448         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3449                 goto err;
3450
3451         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3452         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3453                 goto err;
3454
3455         while (fifo_full) {
3456                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3457                 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3458         }
3459
3460         if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3461                 goto err;
3462
3463         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3464         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3465         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3466                 goto err;
3467
3468         i = 0;
3469
3470         while ((!idle) && (i < 10)) {
3471                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3472                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3473                 msleep(10);
3474                 i++;
3475         }
3476
3477         return 0;
3478 err:
3479         dprintk(FE_ERROR, 1, "I/O error");
3480         return -1;
3481 }
3482
3483 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3484 {
3485         struct stv090x_state *state = fe->demodulator_priv;
3486         u32 reg = 0, i = 0, rx_end = 0;
3487
3488         while ((rx_end != 1) && (i < 10)) {
3489                 msleep(10);
3490                 i++;
3491                 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3492                 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3493         }
3494
3495         if (rx_end) {
3496                 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3497                 for (i = 0; i < reply->msg_len; i++)
3498                         reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3499         }
3500
3501         return 0;
3502 }
3503
3504 static int stv090x_sleep(struct dvb_frontend *fe)
3505 {
3506         struct stv090x_state *state = fe->demodulator_priv;
3507         u32 reg;
3508
3509         dprintk(FE_DEBUG, 1, "Set %s to sleep",
3510                 state->device == STV0900 ? "STV0900" : "STV0903");
3511
3512         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3513         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3514         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3515                 goto err;
3516
3517         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3518         STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3519         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3520                 goto err;
3521
3522         return 0;
3523 err:
3524         dprintk(FE_ERROR, 1, "I/O error");
3525         return -1;
3526 }
3527
3528 static int stv090x_wakeup(struct dvb_frontend *fe)
3529 {
3530         struct stv090x_state *state = fe->demodulator_priv;
3531         u32 reg;
3532
3533         dprintk(FE_DEBUG, 1, "Wake %s from standby",
3534                 state->device == STV0900 ? "STV0900" : "STV0903");
3535
3536         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3537         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3538         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3539                 goto err;
3540
3541         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3542         STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
3543         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3544                 goto err;
3545
3546         return 0;
3547 err:
3548         dprintk(FE_ERROR, 1, "I/O error");
3549         return -1;
3550 }
3551
3552 static void stv090x_release(struct dvb_frontend *fe)
3553 {
3554         struct stv090x_state *state = fe->demodulator_priv;
3555
3556         kfree(state);
3557 }
3558
3559 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3560 {
3561         u32 reg;
3562
3563         switch (ldpc_mode) {
3564         case STV090x_DUAL:
3565         default:
3566                 reg = stv090x_read_reg(state, STV090x_GENCFG);
3567                 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
3568                         /* follow LDPC default state */
3569                         if (stv090x_write_reg(state, STV090x_GENCFG, reg) < 0)
3570                                 goto err;
3571                         state->demod_mode = STV090x_DUAL;
3572                         reg = stv090x_read_reg(state, STV090x_TSTRES0);
3573                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3574                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3575                                 goto err;
3576                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3577                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3578                                 goto err;
3579                 }
3580                 break;
3581
3582         case STV090x_SINGLE:
3583                 if (state->demod == STV090x_DEMODULATOR_1) {
3584                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3585                                 goto err;
3586                 } else {
3587                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3588                                 goto err;
3589                 }
3590
3591                 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3592                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3593                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3594                         goto err;
3595                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3596                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3597                         goto err;
3598
3599                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3600                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3601                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3602                         goto err;
3603                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3604                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3605                         goto err;
3606                 break;
3607         }
3608
3609         return 0;
3610 err:
3611         dprintk(FE_ERROR, 1, "I/O error");
3612         return -1;
3613 }
3614
3615 /* return (Hz), clk in Hz*/
3616 static u32 stv090x_get_mclk(struct stv090x_state *state)
3617 {
3618         const struct stv090x_config *config = state->config;
3619         u32 div, reg;
3620         u8 ratio;
3621
3622         div = stv090x_read_reg(state, STV090x_NCOARSE);
3623         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3624         ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3625
3626         return (div + 1) * config->xtal / ratio; /* kHz */
3627 }
3628
3629 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3630 {
3631         const struct stv090x_config *config = state->config;
3632         u32 reg, div, clk_sel;
3633
3634         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3635         clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3636
3637         div = ((clk_sel * mclk) / config->xtal) - 1;
3638
3639         reg = stv090x_read_reg(state, STV090x_NCOARSE);
3640         STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3641         if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3642                 goto err;
3643
3644         state->mclk = stv090x_get_mclk(state);
3645
3646         /*Set the DiseqC frequency to 22KHz */
3647         div = state->mclk / 704000;
3648         if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
3649                 goto err;
3650         if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
3651                 goto err;
3652
3653         return 0;
3654 err:
3655         dprintk(FE_ERROR, 1, "I/O error");
3656         return -1;
3657 }
3658
3659 static int stv090x_set_tspath(struct stv090x_state *state)
3660 {
3661         u32 reg;
3662
3663         if (state->dev_ver >= 0x20) {
3664                 switch (state->config->ts1_mode) {
3665                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3666                 case STV090x_TSMODE_DVBCI:
3667                         switch (state->config->ts2_mode) {
3668                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3669                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3670                         default:
3671                                 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
3672                                 break;
3673
3674                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3675                         case STV090x_TSMODE_DVBCI:
3676                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
3677                                         goto err;
3678                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3679                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3680                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3681                                         goto err;
3682                                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
3683                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3684                                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
3685                                         goto err;
3686                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3687                                         goto err;
3688                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3689                                         goto err;
3690                                 break;
3691                         }
3692                         break;
3693
3694                 case STV090x_TSMODE_SERIAL_PUNCTURED:
3695                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3696                 default:
3697                         switch (state->config->ts2_mode) {
3698                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3699                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3700                         default:
3701                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3702                                         goto err;
3703                                 break;
3704
3705                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3706                         case STV090x_TSMODE_DVBCI:
3707                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
3708                                         goto err;
3709                                 break;
3710                         }
3711                         break;
3712                 }
3713         } else {
3714                 switch (state->config->ts1_mode) {
3715                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3716                 case STV090x_TSMODE_DVBCI:
3717                         switch (state->config->ts2_mode) {
3718                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3719                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3720                         default:
3721                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
3722                                 break;
3723
3724                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3725                         case STV090x_TSMODE_DVBCI:
3726                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
3727                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3728                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3729                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3730                                         goto err;
3731                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3732                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
3733                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3734                                         goto err;
3735                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3736                                         goto err;
3737                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3738                                         goto err;
3739                                 break;
3740                         }
3741                         break;
3742
3743                 case STV090x_TSMODE_SERIAL_PUNCTURED:
3744                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3745                 default:
3746                         switch (state->config->ts2_mode) {
3747                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3748                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3749                         default:
3750                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
3751                                 break;
3752
3753                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3754                         case STV090x_TSMODE_DVBCI:
3755                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
3756                                 break;
3757                         }
3758                         break;
3759                 }
3760         }
3761
3762         switch (state->config->ts1_mode) {
3763         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3764                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3765                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3766                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3767                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3768                         goto err;
3769                 break;
3770
3771         case STV090x_TSMODE_DVBCI:
3772                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3773                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3774                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3775                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3776                         goto err;
3777                 break;
3778
3779         case STV090x_TSMODE_SERIAL_PUNCTURED:
3780                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3781                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3782                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3783                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3784                         goto err;
3785                 break;
3786
3787         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3788                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3789                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3790                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3791                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3792                         goto err;
3793                 break;
3794
3795         default:
3796                 break;
3797         }
3798
3799         switch (state->config->ts2_mode) {
3800         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3801                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3802                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3803                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3804                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3805                         goto err;
3806                 break;
3807
3808         case STV090x_TSMODE_DVBCI:
3809                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3810                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3811                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3812                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3813                         goto err;
3814                 break;
3815
3816         case STV090x_TSMODE_SERIAL_PUNCTURED:
3817                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3818                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3819                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3820                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3821                         goto err;
3822                 break;
3823
3824         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3825                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3826                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3827                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3828                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3829                         goto err;
3830                 break;
3831
3832         default:
3833                 break;
3834         }
3835         reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3836         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3837         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3838                 goto err;
3839         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3840         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3841                 goto err;
3842
3843         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3844         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3845         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3846                 goto err;
3847         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3848         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3849                 goto err;
3850
3851         return 0;
3852 err:
3853         dprintk(FE_ERROR, 1, "I/O error");
3854         return -1;
3855 }
3856
3857 static int stv090x_init(struct dvb_frontend *fe)
3858 {
3859         struct stv090x_state *state = fe->demodulator_priv;
3860         const struct stv090x_config *config = state->config;
3861         u32 reg;
3862
3863         stv090x_ldpc_mode(state, state->demod_mode);
3864
3865         reg = STV090x_READ_DEMOD(state, TNRCFG2);
3866         STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
3867         if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
3868                 goto err;
3869         reg = STV090x_READ_DEMOD(state, DEMOD);
3870         STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
3871         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3872                 goto err;
3873
3874         stv090x_i2c_gate_ctrl(fe, 1);
3875
3876         if (config->tuner_init)
3877                 config->tuner_init(fe);
3878
3879         stv090x_i2c_gate_ctrl(fe, 0);
3880
3881         stv090x_set_tspath(state);
3882
3883         return 0;
3884 err:
3885         dprintk(FE_ERROR, 1, "I/O error");
3886         return -1;
3887 }
3888
3889 static int stv090x_setup(struct dvb_frontend *fe)
3890 {
3891         struct stv090x_state *state = fe->demodulator_priv;
3892         const struct stv090x_config *config = state->config;
3893         const struct stv090x_reg *stv090x_initval = NULL;
3894         const struct stv090x_reg *stv090x_cut20_val = NULL;
3895         unsigned long t1_size = 0, t2_size = 0;
3896         u32 reg = 0;
3897
3898         int i;
3899
3900         if (state->device == STV0900) {
3901                 dprintk(FE_DEBUG, 1, "Initializing STV0900");
3902                 stv090x_initval = stv0900_initval;
3903                 t1_size = ARRAY_SIZE(stv0900_initval);
3904                 stv090x_cut20_val = stv0900_cut20_val;
3905                 t2_size = ARRAY_SIZE(stv0900_cut20_val);
3906         } else if (state->device == STV0903) {
3907                 dprintk(FE_DEBUG, 1, "Initializing STV0903");
3908                 stv090x_initval = stv0903_initval;
3909                 t1_size = ARRAY_SIZE(stv0903_initval);
3910                 stv090x_cut20_val = stv0903_cut20_val;
3911                 t2_size = ARRAY_SIZE(stv0903_cut20_val);
3912         }
3913
3914         /* STV090x init */
3915         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */
3916                 goto err;
3917
3918         msleep(5);
3919
3920         if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */
3921                 goto err;
3922
3923         STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
3924         if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */
3925                 goto err;
3926
3927         if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
3928                 goto err;
3929         msleep(5);
3930         if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
3931                 goto err;
3932         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
3933                 goto err;
3934         msleep(5);
3935
3936         /* write initval */
3937         for (i = 0; i < t1_size; i++) {
3938                 dprintk(FE_DEBUG, 1, "Setting up initial values");
3939                 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
3940                         goto err;
3941         }
3942
3943         if (state->dev_ver >= 0x20) {
3944                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3945                         goto err;
3946
3947                 /* write cut20_val*/
3948                 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
3949                 for (i = 0; i < t2_size; i++) {
3950                         if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
3951                                 goto err;
3952                 }
3953         }
3954
3955         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
3956                 goto err;
3957         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
3958                 goto err;
3959
3960         stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
3961         msleep(5);
3962         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
3963                 goto err;
3964         stv090x_get_mclk(state);
3965
3966         return 0;
3967 err:
3968         dprintk(FE_ERROR, 1, "I/O error");
3969         return -1;
3970 }
3971
3972 static struct dvb_frontend_ops stv090x_ops = {
3973
3974         .info = {
3975                 .name                   = "STV090x Multistandard",
3976         },
3977
3978         .release                        = stv090x_release,
3979         .init                           = stv090x_init,
3980
3981         .sleep                          = stv090x_sleep,
3982         .get_frontend_algo              = stv090x_frontend_algo,
3983
3984         .i2c_gate_ctrl                  = stv090x_i2c_gate_ctrl,
3985
3986         .diseqc_send_master_cmd         = stv090x_send_diseqc_msg,
3987         .diseqc_send_burst              = stv090x_send_diseqc_burst,
3988         .diseqc_recv_slave_reply        = stv090x_recv_slave_reply,
3989         .set_tone                       = stv090x_set_tone,
3990
3991         .search                         = stv090x_search,
3992         .read_status                    = stv090x_read_status,
3993         .read_ber                       = stv090x_read_per,
3994         .read_signal_strength           = stv090x_read_signal_strength,
3995         .read_snr                       = stv090x_read_cnr
3996 };
3997
3998
3999 struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4000                                     struct i2c_adapter *i2c,
4001                                     enum stv090x_demodulator demod)
4002 {
4003         struct stv090x_state *state = NULL;
4004
4005         state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4006         if (state == NULL)
4007                 goto error;
4008
4009         state->verbose                          = &verbose;
4010         state->config                           = config;
4011         state->i2c                              = i2c;
4012         state->frontend.ops                     = stv090x_ops;
4013         state->frontend.demodulator_priv        = state;
4014         state->demod                            = demod;
4015         state->demod_mode                       = config->demod_mode; /* Single or Dual mode */
4016         state->device                           = config->device;
4017         state->rolloff                          = 35; /* default */
4018
4019         if (state->demod == STV090x_DEMODULATOR_0)
4020                 mutex_init(&demod_lock);
4021
4022         if (stv090x_sleep(&state->frontend) < 0) {
4023                 dprintk(FE_ERROR, 1, "Error putting device to sleep");
4024                 goto error;
4025         }
4026
4027         if (stv090x_setup(&state->frontend) < 0) {
4028                 dprintk(FE_ERROR, 1, "Error setting up device");
4029                 goto error;
4030         }
4031         if (stv090x_wakeup(&state->frontend) < 0) {
4032                 dprintk(FE_ERROR, 1, "Error waking device");
4033                 goto error;
4034         }
4035         state->dev_ver = stv090x_read_reg(state, STV090x_MID);
4036
4037         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n",
4038                state->device == STV0900 ? "STV0900" : "STV0903",
4039                demod,
4040                state->dev_ver);
4041
4042         return &state->frontend;
4043
4044 error:
4045         kfree(state);
4046         return NULL;
4047 }
4048 EXPORT_SYMBOL(stv090x_attach);
4049 MODULE_PARM_DESC(verbose, "Set Verbosity level");
4050 MODULE_AUTHOR("Manu Abraham");
4051 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
4052 MODULE_LICENSE("GPL");