Pileus Git - ~andy/linux/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <linux/sched.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 static struct page *vmx_io_bitmap_a;
  38 static struct page *vmx_io_bitmap_b;
  39
  40 #ifdef CONFIG_X86_64
  41 #define HOST_IS_64 1
  42 #else
  43 #define HOST_IS_64 0
  44 #endif
  45
  46 static struct vmcs_descriptor {
  47         int size;
  48         int order;
  49         u32 revision_id;
  50 } vmcs_descriptor;
  51
  52 #define VMX_SEGMENT_FIELD(seg)                                  \
  53         [VCPU_SREG_##seg] = {                                   \
  54                 .selector = GUEST_##seg##_SELECTOR,             \
  55                 .base = GUEST_##seg##_BASE,                     \
  56                 .limit = GUEST_##seg##_LIMIT,                   \
  57                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  58         }
  59
  60 static struct kvm_vmx_segment_field {
  61         unsigned selector;
  62         unsigned base;
  63         unsigned limit;
  64         unsigned ar_bytes;
  65 } kvm_vmx_segment_fields[] = {
  66         VMX_SEGMENT_FIELD(CS),
  67         VMX_SEGMENT_FIELD(DS),
  68         VMX_SEGMENT_FIELD(ES),
  69         VMX_SEGMENT_FIELD(FS),
  70         VMX_SEGMENT_FIELD(GS),
  71         VMX_SEGMENT_FIELD(SS),
  72         VMX_SEGMENT_FIELD(TR),
  73         VMX_SEGMENT_FIELD(LDTR),
  74 };
  75
  76 /*
  77  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
  78  * away by decrementing the array size.
  79  */
  80 static const u32 vmx_msr_index[] = {
  81 #ifdef CONFIG_X86_64
  82         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  83 #endif
  84         MSR_EFER, MSR_K6_STAR,
  85 };
  86 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  87
  88 #ifdef CONFIG_X86_64
  89 static unsigned msr_offset_kernel_gs_base;
  90 #define NR_64BIT_MSRS 4
  91 /*
  92  * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
  93  * mechanism (cpu bug AA24)
  94  */
  95 #define NR_BAD_MSRS 2
  96 #else
  97 #define NR_64BIT_MSRS 0
  98 #define NR_BAD_MSRS 0
  99 #endif
 100
 101 static inline int is_page_fault(u32 intr_info)
 102 {
 103         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 104                              INTR_INFO_VALID_MASK)) ==
 105                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 106 }
 107
 108 static inline int is_no_device(u32 intr_info)
 109 {
 110         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 111                              INTR_INFO_VALID_MASK)) ==
 112                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 113 }
 114
 115 static inline int is_external_interrupt(u32 intr_info)
 116 {
 117         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 118                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 119 }
 120
 121 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 122 {
 123         int i;
 124
 125         for (i = 0; i < vcpu->nmsrs; ++i)
 126                 if (vcpu->guest_msrs[i].index == msr)
 127                         return &vcpu->guest_msrs[i];
 128         return NULL;
 129 }
 130
 131 static void vmcs_clear(struct vmcs *vmcs)
 132 {
 133         u64 phys_addr = __pa(vmcs);
 134         u8 error;
 135
 136         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 137                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 138                       : "cc", "memory");
 139         if (error)
 140                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 141                        vmcs, phys_addr);
 142 }
 143
 144 static void __vcpu_clear(void *arg)
 145 {
 146         struct kvm_vcpu *vcpu = arg;
 147         int cpu = raw_smp_processor_id();
 148
 149         if (vcpu->cpu == cpu)
 150                 vmcs_clear(vcpu->vmcs);
 151         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 152                 per_cpu(current_vmcs, cpu) = NULL;
 153 }
 154
 155 static void vcpu_clear(struct kvm_vcpu *vcpu)
 156 {
 157         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 158                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 159         else
 160                 __vcpu_clear(vcpu);
 161         vcpu->launched = 0;
 162 }
 163
 164 static unsigned long vmcs_readl(unsigned long field)
 165 {
 166         unsigned long value;
 167
 168         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 169                       : "=a"(value) : "d"(field) : "cc");
 170         return value;
 171 }
 172
 173 static u16 vmcs_read16(unsigned long field)
 174 {
 175         return vmcs_readl(field);
 176 }
 177
 178 static u32 vmcs_read32(unsigned long field)
 179 {
 180         return vmcs_readl(field);
 181 }
 182
 183 static u64 vmcs_read64(unsigned long field)
 184 {
 185 #ifdef CONFIG_X86_64
 186         return vmcs_readl(field);
 187 #else
 188         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 189 #endif
 190 }
 191
 192 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 193 {
 194         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 195                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 196         dump_stack();
 197 }
 198
 199 static void vmcs_writel(unsigned long field, unsigned long value)
 200 {
 201         u8 error;
 202
 203         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 204                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 205         if (unlikely(error))
 206                 vmwrite_error(field, value);
 207 }
 208
 209 static void vmcs_write16(unsigned long field, u16 value)
 210 {
 211         vmcs_writel(field, value);
 212 }
 213
 214 static void vmcs_write32(unsigned long field, u32 value)
 215 {
 216         vmcs_writel(field, value);
 217 }
 218
 219 static void vmcs_write64(unsigned long field, u64 value)
 220 {
 221 #ifdef CONFIG_X86_64
 222         vmcs_writel(field, value);
 223 #else
 224         vmcs_writel(field, value);
 225         asm volatile ("");
 226         vmcs_writel(field+1, value >> 32);
 227 #endif
 228 }
 229
 230 static void vmcs_clear_bits(unsigned long field, u32 mask)
 231 {
 232         vmcs_writel(field, vmcs_readl(field) & ~mask);
 233 }
 234
 235 static void vmcs_set_bits(unsigned long field, u32 mask)
 236 {
 237         vmcs_writel(field, vmcs_readl(field) | mask);
 238 }
 239
 240 /*
 241  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 242  * vcpu mutex is already taken.
 243  */
 244 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 245 {
 246         u64 phys_addr = __pa(vcpu->vmcs);
 247         int cpu;
 248
 249         cpu = get_cpu();
 250
 251         if (vcpu->cpu != cpu)
 252                 vcpu_clear(vcpu);
 253
 254         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 255                 u8 error;
 256
 257                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 258                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 259                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 260                               : "cc");
 261                 if (error)
 262                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 263                                vcpu->vmcs, phys_addr);
 264         }
 265
 266         if (vcpu->cpu != cpu) {
 267                 struct descriptor_table dt;
 268                 unsigned long sysenter_esp;
 269
 270                 vcpu->cpu = cpu;
 271                 /*
 272                  * Linux uses per-cpu TSS and GDT, so set these when switching
 273                  * processors.
 274                  */
 275                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 276                 get_gdt(&dt);
 277                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 278
 279                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 280                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 281         }
 282 }
 283
 284 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 285 {
 286         kvm_put_guest_fpu(vcpu);
 287         put_cpu();
 288 }
 289
 290 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 291 {
 292         vcpu_clear(vcpu);
 293 }
 294
 295 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 296 {
 297         return vmcs_readl(GUEST_RFLAGS);
 298 }
 299
 300 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 301 {
 302         vmcs_writel(GUEST_RFLAGS, rflags);
 303 }
 304
 305 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 306 {
 307         unsigned long rip;
 308         u32 interruptibility;
 309
 310         rip = vmcs_readl(GUEST_RIP);
 311         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 312         vmcs_writel(GUEST_RIP, rip);
 313
 314         /*
 315          * We emulated an instruction, so temporary interrupt blocking
 316          * should be removed, if set.
 317          */
 318         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 319         if (interruptibility & 3)
 320                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 321                              interruptibility & ~3);
 322         vcpu->interrupt_window_open = 1;
 323 }
 324
 325 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 326 {
 327         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 328                vmcs_readl(GUEST_RIP));
 329         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 330         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 331                      GP_VECTOR |
 332                      INTR_TYPE_EXCEPTION |
 333                      INTR_INFO_DELIEVER_CODE_MASK |
 334                      INTR_INFO_VALID_MASK);
 335 }
 336
 337 /*
 338  * Set up the vmcs to automatically save and restore system
 339  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 340  * mode, as fiddling with msrs is very expensive.
 341  */
 342 static void setup_msrs(struct kvm_vcpu *vcpu)
 343 {
 344         int nr_skip, nr_good_msrs;
 345
 346         if (is_long_mode(vcpu))
 347                 nr_skip = NR_BAD_MSRS;
 348         else
 349                 nr_skip = NR_64BIT_MSRS;
 350         nr_good_msrs = vcpu->nmsrs - nr_skip;
 351
 352         /*
 353          * MSR_K6_STAR is only needed on long mode guests, and only
 354          * if efer.sce is enabled.
 355          */
 356         if (find_msr_entry(vcpu, MSR_K6_STAR)) {
 357                 --nr_good_msrs;
 358 #ifdef CONFIG_X86_64
 359                 if (is_long_mode(vcpu) && (vcpu->shadow_efer & EFER_SCE))
 360                         ++nr_good_msrs;
 361 #endif
 362         }
 363
 364         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
 365                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 366         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
 367                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 368         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
 369                     virt_to_phys(vcpu->host_msrs + nr_skip));
 370         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
 371         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
 372         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
 373 }
 374
 375 /*
 376  * reads and returns guest's timestamp counter "register"
 377  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 378  */
 379 static u64 guest_read_tsc(void)
 380 {
 381         u64 host_tsc, tsc_offset;
 382
 383         rdtscll(host_tsc);
 384         tsc_offset = vmcs_read64(TSC_OFFSET);
 385         return host_tsc + tsc_offset;
 386 }
 387
 388 /*
 389  * writes 'guest_tsc' into guest's timestamp counter "register"
 390  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 391  */
 392 static void guest_write_tsc(u64 guest_tsc)
 393 {
 394         u64 host_tsc;
 395
 396         rdtscll(host_tsc);
 397         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 398 }
 399
 400 static void reload_tss(void)
 401 {
 402 #ifndef CONFIG_X86_64
 403
 404         /*
 405          * VT restores TR but not its size.  Useless.
 406          */
 407         struct descriptor_table gdt;
 408         struct segment_descriptor *descs;
 409
 410         get_gdt(&gdt);
 411         descs = (void *)gdt.base;
 412         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 413         load_TR_desc();
 414 #endif
 415 }
 416
 417 /*
 418  * Reads an msr value (of 'msr_index') into 'pdata'.
 419  * Returns 0 on success, non-0 otherwise.
 420  * Assumes vcpu_load() was already called.
 421  */
 422 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 423 {
 424         u64 data;
 425         struct vmx_msr_entry *msr;
 426
 427         if (!pdata) {
 428                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 429                 return -EINVAL;
 430         }
 431
 432         switch (msr_index) {
 433 #ifdef CONFIG_X86_64
 434         case MSR_FS_BASE:
 435                 data = vmcs_readl(GUEST_FS_BASE);
 436                 break;
 437         case MSR_GS_BASE:
 438                 data = vmcs_readl(GUEST_GS_BASE);
 439                 break;
 440         case MSR_EFER:
 441                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 442 #endif
 443         case MSR_IA32_TIME_STAMP_COUNTER:
 444                 data = guest_read_tsc();
 445                 break;
 446         case MSR_IA32_SYSENTER_CS:
 447                 data = vmcs_read32(GUEST_SYSENTER_CS);
 448                 break;
 449         case MSR_IA32_SYSENTER_EIP:
 450                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 451                 break;
 452         case MSR_IA32_SYSENTER_ESP:
 453                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 454                 break;
 455         default:
 456                 msr = find_msr_entry(vcpu, msr_index);
 457                 if (msr) {
 458                         data = msr->data;
 459                         break;
 460                 }
 461                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 462         }
 463
 464         *pdata = data;
 465         return 0;
 466 }
 467
 468 /*
 469  * Writes msr value into into the appropriate "register".
 470  * Returns 0 on success, non-0 otherwise.
 471  * Assumes vcpu_load() was already called.
 472  */
 473 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 474 {
 475         struct vmx_msr_entry *msr;
 476         switch (msr_index) {
 477 #ifdef CONFIG_X86_64
 478         case MSR_EFER:
 479                 return kvm_set_msr_common(vcpu, msr_index, data);
 480         case MSR_FS_BASE:
 481                 vmcs_writel(GUEST_FS_BASE, data);
 482                 break;
 483         case MSR_GS_BASE:
 484                 vmcs_writel(GUEST_GS_BASE, data);
 485                 break;
 486 #endif
 487         case MSR_IA32_SYSENTER_CS:
 488                 vmcs_write32(GUEST_SYSENTER_CS, data);
 489                 break;
 490         case MSR_IA32_SYSENTER_EIP:
 491                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 492                 break;
 493         case MSR_IA32_SYSENTER_ESP:
 494                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 495                 break;
 496         case MSR_IA32_TIME_STAMP_COUNTER:
 497                 guest_write_tsc(data);
 498                 break;
 499         default:
 500                 msr = find_msr_entry(vcpu, msr_index);
 501                 if (msr) {
 502                         msr->data = data;
 503                         break;
 504                 }
 505                 return kvm_set_msr_common(vcpu, msr_index, data);
 506                 msr->data = data;
 507                 break;
 508         }
 509
 510         return 0;
 511 }
 512
 513 /*
 514  * Sync the rsp and rip registers into the vcpu structure.  This allows
 515  * registers to be accessed by indexing vcpu->regs.
 516  */
 517 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 518 {
 519         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 520         vcpu->rip = vmcs_readl(GUEST_RIP);
 521 }
 522
 523 /*
 524  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 525  * modification.
 526  */
 527 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 528 {
 529         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 530         vmcs_writel(GUEST_RIP, vcpu->rip);
 531 }
 532
 533 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 534 {
 535         unsigned long dr7 = 0x400;
 536         u32 exception_bitmap;
 537         int old_singlestep;
 538
 539         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 540         old_singlestep = vcpu->guest_debug.singlestep;
 541
 542         vcpu->guest_debug.enabled = dbg->enabled;
 543         if (vcpu->guest_debug.enabled) {
 544                 int i;
 545
 546                 dr7 |= 0x200;  /* exact */
 547                 for (i = 0; i < 4; ++i) {
 548                         if (!dbg->breakpoints[i].enabled)
 549                                 continue;
 550                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 551                         dr7 |= 2 << (i*2);    /* global enable */
 552                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 553                 }
 554
 555                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 556
 557                 vcpu->guest_debug.singlestep = dbg->singlestep;
 558         } else {
 559                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 560                 vcpu->guest_debug.singlestep = 0;
 561         }
 562
 563         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 564                 unsigned long flags;
 565
 566                 flags = vmcs_readl(GUEST_RFLAGS);
 567                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 568                 vmcs_writel(GUEST_RFLAGS, flags);
 569         }
 570
 571         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 572         vmcs_writel(GUEST_DR7, dr7);
 573
 574         return 0;
 575 }
 576
 577 static __init int cpu_has_kvm_support(void)
 578 {
 579         unsigned long ecx = cpuid_ecx(1);
 580         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 581 }
 582
 583 static __init int vmx_disabled_by_bios(void)
 584 {
 585         u64 msr;
 586
 587         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 588         return (msr & 5) == 1; /* locked but not enabled */
 589 }
 590
 591 static void hardware_enable(void *garbage)
 592 {
 593         int cpu = raw_smp_processor_id();
 594         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 595         u64 old;
 596
 597         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 598         if ((old & 5) != 5)
 599                 /* enable and lock */
 600                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 601         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 602         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 603                       : "memory", "cc");
 604 }
 605
 606 static void hardware_disable(void *garbage)
 607 {
 608         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 609 }
 610
 611 static __init void setup_vmcs_descriptor(void)
 612 {
 613         u32 vmx_msr_low, vmx_msr_high;
 614
 615         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 616         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 617         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 618         vmcs_descriptor.revision_id = vmx_msr_low;
 619 }
 620
 621 static struct vmcs *alloc_vmcs_cpu(int cpu)
 622 {
 623         int node = cpu_to_node(cpu);
 624         struct page *pages;
 625         struct vmcs *vmcs;
 626
 627         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 628         if (!pages)
 629                 return NULL;
 630         vmcs = page_address(pages);
 631         memset(vmcs, 0, vmcs_descriptor.size);
 632         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 633         return vmcs;
 634 }
 635
 636 static struct vmcs *alloc_vmcs(void)
 637 {
 638         return alloc_vmcs_cpu(raw_smp_processor_id());
 639 }
 640
 641 static void free_vmcs(struct vmcs *vmcs)
 642 {
 643         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 644 }
 645
 646 static void free_kvm_area(void)
 647 {
 648         int cpu;
 649
 650         for_each_online_cpu(cpu)
 651                 free_vmcs(per_cpu(vmxarea, cpu));
 652 }
 653
 654 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 655
 656 static __init int alloc_kvm_area(void)
 657 {
 658         int cpu;
 659
 660         for_each_online_cpu(cpu) {
 661                 struct vmcs *vmcs;
 662
 663                 vmcs = alloc_vmcs_cpu(cpu);
 664                 if (!vmcs) {
 665                         free_kvm_area();
 666                         return -ENOMEM;
 667                 }
 668
 669                 per_cpu(vmxarea, cpu) = vmcs;
 670         }
 671         return 0;
 672 }
 673
 674 static __init int hardware_setup(void)
 675 {
 676         setup_vmcs_descriptor();
 677         return alloc_kvm_area();
 678 }
 679
 680 static __exit void hardware_unsetup(void)
 681 {
 682         free_kvm_area();
 683 }
 684
 685 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 686 {
 687         if (vcpu->rmode.active)
 688                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 689         else
 690                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 691 }
 692
 693 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 694 {
 695         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 696
 697         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 698                 vmcs_write16(sf->selector, save->selector);
 699                 vmcs_writel(sf->base, save->base);
 700                 vmcs_write32(sf->limit, save->limit);
 701                 vmcs_write32(sf->ar_bytes, save->ar);
 702         } else {
 703                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 704                         << AR_DPL_SHIFT;
 705                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 706         }
 707 }
 708
 709 static void enter_pmode(struct kvm_vcpu *vcpu)
 710 {
 711         unsigned long flags;
 712
 713         vcpu->rmode.active = 0;
 714
 715         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 716         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 717         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 718
 719         flags = vmcs_readl(GUEST_RFLAGS);
 720         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 721         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 722         vmcs_writel(GUEST_RFLAGS, flags);
 723
 724         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 725                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 726
 727         update_exception_bitmap(vcpu);
 728
 729         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 730         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 731         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 732         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 733
 734         vmcs_write16(GUEST_SS_SELECTOR, 0);
 735         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 736
 737         vmcs_write16(GUEST_CS_SELECTOR,
 738                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 739         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 740 }
 741
 742 static int rmode_tss_base(struct kvm* kvm)
 743 {
 744         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 745         return base_gfn << PAGE_SHIFT;
 746 }
 747
 748 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 749 {
 750         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 751
 752         save->selector = vmcs_read16(sf->selector);
 753         save->base = vmcs_readl(sf->base);
 754         save->limit = vmcs_read32(sf->limit);
 755         save->ar = vmcs_read32(sf->ar_bytes);
 756         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 757         vmcs_write32(sf->limit, 0xffff);
 758         vmcs_write32(sf->ar_bytes, 0xf3);
 759 }
 760
 761 static void enter_rmode(struct kvm_vcpu *vcpu)
 762 {
 763         unsigned long flags;
 764
 765         vcpu->rmode.active = 1;
 766
 767         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 768         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 769
 770         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 771         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 772
 773         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 774         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 775
 776         flags = vmcs_readl(GUEST_RFLAGS);
 777         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 778
 779         flags |= IOPL_MASK | X86_EFLAGS_VM;
 780
 781         vmcs_writel(GUEST_RFLAGS, flags);
 782         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 783         update_exception_bitmap(vcpu);
 784
 785         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 786         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 787         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 788
 789         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 790         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 791         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 792                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 793         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 794
 795         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 796         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 797         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 798         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 799 }
 800
 801 #ifdef CONFIG_X86_64
 802
 803 static void enter_lmode(struct kvm_vcpu *vcpu)
 804 {
 805         u32 guest_tr_ar;
 806
 807         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 808         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 809                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 810                        __FUNCTION__);
 811                 vmcs_write32(GUEST_TR_AR_BYTES,
 812                              (guest_tr_ar & ~AR_TYPE_MASK)
 813                              | AR_TYPE_BUSY_64_TSS);
 814         }
 815
 816         vcpu->shadow_efer |= EFER_LMA;
 817
 818         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 819         vmcs_write32(VM_ENTRY_CONTROLS,
 820                      vmcs_read32(VM_ENTRY_CONTROLS)
 821                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 822 }
 823
 824 static void exit_lmode(struct kvm_vcpu *vcpu)
 825 {
 826         vcpu->shadow_efer &= ~EFER_LMA;
 827
 828         vmcs_write32(VM_ENTRY_CONTROLS,
 829                      vmcs_read32(VM_ENTRY_CONTROLS)
 830                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 831 }
 832
 833 #endif
 834
 835 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 836 {
 837         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 838         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 839 }
 840
 841 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 842 {
 843         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 844                 enter_pmode(vcpu);
 845
 846         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 847                 enter_rmode(vcpu);
 848
 849 #ifdef CONFIG_X86_64
 850         if (vcpu->shadow_efer & EFER_LME) {
 851                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 852                         enter_lmode(vcpu);
 853                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 854                         exit_lmode(vcpu);
 855         }
 856 #endif
 857
 858         if (!(cr0 & CR0_TS_MASK)) {
 859                 vcpu->fpu_active = 1;
 860                 vmcs_clear_bits(EXCEPTION_BITMAP, CR0_TS_MASK);
 861         }
 862
 863         vmcs_writel(CR0_READ_SHADOW, cr0);
 864         vmcs_writel(GUEST_CR0,
 865                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 866         vcpu->cr0 = cr0;
 867 }
 868
 869 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 870 {
 871         vmcs_writel(GUEST_CR3, cr3);
 872
 873         if (!(vcpu->cr0 & CR0_TS_MASK)) {
 874                 vcpu->fpu_active = 0;
 875                 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 876                 vmcs_set_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
 877         }
 878 }
 879
 880 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 881 {
 882         vmcs_writel(CR4_READ_SHADOW, cr4);
 883         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 884                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 885         vcpu->cr4 = cr4;
 886 }
 887
 888 #ifdef CONFIG_X86_64
 889
 890 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 891 {
 892         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 893
 894         vcpu->shadow_efer = efer;
 895         if (efer & EFER_LMA) {
 896                 vmcs_write32(VM_ENTRY_CONTROLS,
 897                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 898                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 899                 msr->data = efer;
 900
 901         } else {
 902                 vmcs_write32(VM_ENTRY_CONTROLS,
 903                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 904                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 905
 906                 msr->data = efer & ~EFER_LME;
 907         }
 908         setup_msrs(vcpu);
 909 }
 910
 911 #endif
 912
 913 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 914 {
 915         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 916
 917         return vmcs_readl(sf->base);
 918 }
 919
 920 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 921                             struct kvm_segment *var, int seg)
 922 {
 923         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 924         u32 ar;
 925
 926         var->base = vmcs_readl(sf->base);
 927         var->limit = vmcs_read32(sf->limit);
 928         var->selector = vmcs_read16(sf->selector);
 929         ar = vmcs_read32(sf->ar_bytes);
 930         if (ar & AR_UNUSABLE_MASK)
 931                 ar = 0;
 932         var->type = ar & 15;
 933         var->s = (ar >> 4) & 1;
 934         var->dpl = (ar >> 5) & 3;
 935         var->present = (ar >> 7) & 1;
 936         var->avl = (ar >> 12) & 1;
 937         var->l = (ar >> 13) & 1;
 938         var->db = (ar >> 14) & 1;
 939         var->g = (ar >> 15) & 1;
 940         var->unusable = (ar >> 16) & 1;
 941 }
 942
 943 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 944                             struct kvm_segment *var, int seg)
 945 {
 946         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 947         u32 ar;
 948
 949         vmcs_writel(sf->base, var->base);
 950         vmcs_write32(sf->limit, var->limit);
 951         vmcs_write16(sf->selector, var->selector);
 952         if (vcpu->rmode.active && var->s) {
 953                 /*
 954                  * Hack real-mode segments into vm86 compatibility.
 955                  */
 956                 if (var->base == 0xffff0000 && var->selector == 0xf000)
 957                         vmcs_writel(sf->base, 0xf0000);
 958                 ar = 0xf3;
 959         } else if (var->unusable)
 960                 ar = 1 << 16;
 961         else {
 962                 ar = var->type & 15;
 963                 ar |= (var->s & 1) << 4;
 964                 ar |= (var->dpl & 3) << 5;
 965                 ar |= (var->present & 1) << 7;
 966                 ar |= (var->avl & 1) << 12;
 967                 ar |= (var->l & 1) << 13;
 968                 ar |= (var->db & 1) << 14;
 969                 ar |= (var->g & 1) << 15;
 970         }
 971         if (ar == 0) /* a 0 value means unusable */
 972                 ar = AR_UNUSABLE_MASK;
 973         vmcs_write32(sf->ar_bytes, ar);
 974 }
 975
 976 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 977 {
 978         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 979
 980         *db = (ar >> 14) & 1;
 981         *l = (ar >> 13) & 1;
 982 }
 983
 984 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 985 {
 986         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 987         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 988 }
 989
 990 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 991 {
 992         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 993         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 994 }
 995
 996 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 997 {
 998         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 999         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1000 }
1001
1002 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1003 {
1004         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1005         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1006 }
1007
1008 static int init_rmode_tss(struct kvm* kvm)
1009 {
1010         struct page *p1, *p2, *p3;
1011         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1012         char *page;
1013
1014         p1 = gfn_to_page(kvm, fn++);
1015         p2 = gfn_to_page(kvm, fn++);
1016         p3 = gfn_to_page(kvm, fn);
1017
1018         if (!p1 || !p2 || !p3) {
1019                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1020                 return 0;
1021         }
1022
1023         page = kmap_atomic(p1, KM_USER0);
1024         memset(page, 0, PAGE_SIZE);
1025         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1026         kunmap_atomic(page, KM_USER0);
1027
1028         page = kmap_atomic(p2, KM_USER0);
1029         memset(page, 0, PAGE_SIZE);
1030         kunmap_atomic(page, KM_USER0);
1031
1032         page = kmap_atomic(p3, KM_USER0);
1033         memset(page, 0, PAGE_SIZE);
1034         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1035         kunmap_atomic(page, KM_USER0);
1036
1037         return 1;
1038 }
1039
1040 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1041 {
1042         u32 msr_high, msr_low;
1043
1044         rdmsr(msr, msr_low, msr_high);
1045
1046         val &= msr_high;
1047         val |= msr_low;
1048         vmcs_write32(vmcs_field, val);
1049 }
1050
1051 static void seg_setup(int seg)
1052 {
1053         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1054
1055         vmcs_write16(sf->selector, 0);
1056         vmcs_writel(sf->base, 0);
1057         vmcs_write32(sf->limit, 0xffff);
1058         vmcs_write32(sf->ar_bytes, 0x93);
1059 }
1060
1061 /*
1062  * Sets up the vmcs for emulated real mode.
1063  */
1064 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1065 {
1066         u32 host_sysenter_cs;
1067         u32 junk;
1068         unsigned long a;
1069         struct descriptor_table dt;
1070         int i;
1071         int ret = 0;
1072         extern asmlinkage void kvm_vmx_return(void);
1073
1074         if (!init_rmode_tss(vcpu->kvm)) {
1075                 ret = -ENOMEM;
1076                 goto out;
1077         }
1078
1079         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1080         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1081         vcpu->cr8 = 0;
1082         vcpu->apic_base = 0xfee00000 |
1083                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1084                         MSR_IA32_APICBASE_ENABLE;
1085
1086         fx_init(vcpu);
1087
1088         /*
1089          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1090          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1091          */
1092         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1093         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1094         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1095         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1096
1097         seg_setup(VCPU_SREG_DS);
1098         seg_setup(VCPU_SREG_ES);
1099         seg_setup(VCPU_SREG_FS);
1100         seg_setup(VCPU_SREG_GS);
1101         seg_setup(VCPU_SREG_SS);
1102
1103         vmcs_write16(GUEST_TR_SELECTOR, 0);
1104         vmcs_writel(GUEST_TR_BASE, 0);
1105         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1106         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1107
1108         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1109         vmcs_writel(GUEST_LDTR_BASE, 0);
1110         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1111         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1112
1113         vmcs_write32(GUEST_SYSENTER_CS, 0);
1114         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1115         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1116
1117         vmcs_writel(GUEST_RFLAGS, 0x02);
1118         vmcs_writel(GUEST_RIP, 0xfff0);
1119         vmcs_writel(GUEST_RSP, 0);
1120
1121         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1122         vmcs_writel(GUEST_DR7, 0x400);
1123
1124         vmcs_writel(GUEST_GDTR_BASE, 0);
1125         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1126
1127         vmcs_writel(GUEST_IDTR_BASE, 0);
1128         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1129
1130         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1131         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1132         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1133
1134         /* I/O */
1135         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1136         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1137
1138         guest_write_tsc(0);
1139
1140         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1141
1142         /* Special registers */
1143         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1144
1145         /* Control */
1146         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1147                                PIN_BASED_VM_EXEC_CONTROL,
1148                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1149                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1150                         );
1151         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1152                                CPU_BASED_VM_EXEC_CONTROL,
1153                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1154                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1155                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1156                                | CPU_BASED_ACTIVATE_IO_BITMAP  /* 20.6.2 */
1157                                | CPU_BASED_MOV_DR_EXITING
1158                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1159                         );
1160
1161         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1162         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1163         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1164         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1165
1166         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1167         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1168         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1169
1170         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1171         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1172         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1173         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1174         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1175         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1176 #ifdef CONFIG_X86_64
1177         rdmsrl(MSR_FS_BASE, a);
1178         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1179         rdmsrl(MSR_GS_BASE, a);
1180         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1181 #else
1182         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1183         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1184 #endif
1185
1186         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1187
1188         get_idt(&dt);
1189         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1190
1191
1192         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1193
1194         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1195         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1196         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1197         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1198         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1199         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1200
1201         for (i = 0; i < NR_VMX_MSR; ++i) {
1202                 u32 index = vmx_msr_index[i];
1203                 u32 data_low, data_high;
1204                 u64 data;
1205                 int j = vcpu->nmsrs;
1206
1207                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1208                         continue;
1209                 if (wrmsr_safe(index, data_low, data_high) < 0)
1210                         continue;
1211                 data = data_low | ((u64)data_high << 32);
1212                 vcpu->host_msrs[j].index = index;
1213                 vcpu->host_msrs[j].reserved = 0;
1214                 vcpu->host_msrs[j].data = data;
1215                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1216 #ifdef CONFIG_X86_64
1217                 if (index == MSR_KERNEL_GS_BASE)
1218                         msr_offset_kernel_gs_base = j;
1219 #endif
1220                 ++vcpu->nmsrs;
1221         }
1222
1223         setup_msrs(vcpu);
1224
1225         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1226                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1227
1228         /* 22.2.1, 20.8.1 */
1229         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1230                                VM_ENTRY_CONTROLS, 0);
1231         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1232
1233 #ifdef CONFIG_X86_64
1234         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1235         vmcs_writel(TPR_THRESHOLD, 0);
1236 #endif
1237
1238         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1239         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1240
1241         vcpu->cr0 = 0x60000010;
1242         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1243         vmx_set_cr4(vcpu, 0);
1244 #ifdef CONFIG_X86_64
1245         vmx_set_efer(vcpu, 0);
1246 #endif
1247
1248         return 0;
1249
1250 out:
1251         return ret;
1252 }
1253
1254 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1255 {
1256         u16 ent[2];
1257         u16 cs;
1258         u16 ip;
1259         unsigned long flags;
1260         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1261         u16 sp =  vmcs_readl(GUEST_RSP);
1262         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1263
1264         if (sp > ss_limit || sp < 6 ) {
1265                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1266                             __FUNCTION__,
1267                             vmcs_readl(GUEST_RSP),
1268                             vmcs_readl(GUEST_SS_BASE),
1269                             vmcs_read32(GUEST_SS_LIMIT));
1270                 return;
1271         }
1272
1273         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1274                                                                 sizeof(ent)) {
1275                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1276                 return;
1277         }
1278
1279         flags =  vmcs_readl(GUEST_RFLAGS);
1280         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1281         ip =  vmcs_readl(GUEST_RIP);
1282
1283
1284         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1285             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1286             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1287                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1288                 return;
1289         }
1290
1291         vmcs_writel(GUEST_RFLAGS, flags &
1292                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1293         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1294         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1295         vmcs_writel(GUEST_RIP, ent[0]);
1296         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1297 }
1298
1299 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1300 {
1301         int word_index = __ffs(vcpu->irq_summary);
1302         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1303         int irq = word_index * BITS_PER_LONG + bit_index;
1304
1305         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1306         if (!vcpu->irq_pending[word_index])
1307                 clear_bit(word_index, &vcpu->irq_summary);
1308
1309         if (vcpu->rmode.active) {
1310                 inject_rmode_irq(vcpu, irq);
1311                 return;
1312         }
1313         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1314                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1315 }
1316
1317
1318 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1319                                        struct kvm_run *kvm_run)
1320 {
1321         u32 cpu_based_vm_exec_control;
1322
1323         vcpu->interrupt_window_open =
1324                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1325                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1326
1327         if (vcpu->interrupt_window_open &&
1328             vcpu->irq_summary &&
1329             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1330                 /*
1331                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1332                  */
1333                 kvm_do_inject_irq(vcpu);
1334
1335         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1336         if (!vcpu->interrupt_window_open &&
1337             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1338                 /*
1339                  * Interrupts blocked.  Wait for unblock.
1340                  */
1341                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1342         else
1343                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1344         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1345 }
1346
1347 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1348 {
1349         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1350
1351         set_debugreg(dbg->bp[0], 0);
1352         set_debugreg(dbg->bp[1], 1);
1353         set_debugreg(dbg->bp[2], 2);
1354         set_debugreg(dbg->bp[3], 3);
1355
1356         if (dbg->singlestep) {
1357                 unsigned long flags;
1358
1359                 flags = vmcs_readl(GUEST_RFLAGS);
1360                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1361                 vmcs_writel(GUEST_RFLAGS, flags);
1362         }
1363 }
1364
1365 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1366                                   int vec, u32 err_code)
1367 {
1368         if (!vcpu->rmode.active)
1369                 return 0;
1370
1371         if (vec == GP_VECTOR && err_code == 0)
1372                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1373                         return 1;
1374         return 0;
1375 }
1376
1377 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1378 {
1379         u32 intr_info, error_code;
1380         unsigned long cr2, rip;
1381         u32 vect_info;
1382         enum emulation_result er;
1383         int r;
1384
1385         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1386         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1387
1388         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1389                                                 !is_page_fault(intr_info)) {
1390                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1391                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1392         }
1393
1394         if (is_external_interrupt(vect_info)) {
1395                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1396                 set_bit(irq, vcpu->irq_pending);
1397                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1398         }
1399
1400         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1401                 asm ("int $2");
1402                 return 1;
1403         }
1404
1405         if (is_no_device(intr_info)) {
1406                 vcpu->fpu_active = 1;
1407                 vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
1408                 if (!(vcpu->cr0 & CR0_TS_MASK))
1409                         vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1410                 return 1;
1411         }
1412
1413         error_code = 0;
1414         rip = vmcs_readl(GUEST_RIP);
1415         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1416                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1417         if (is_page_fault(intr_info)) {
1418                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1419
1420                 spin_lock(&vcpu->kvm->lock);
1421                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1422                 if (r < 0) {
1423                         spin_unlock(&vcpu->kvm->lock);
1424                         return r;
1425                 }
1426                 if (!r) {
1427                         spin_unlock(&vcpu->kvm->lock);
1428                         return 1;
1429                 }
1430
1431                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1432                 spin_unlock(&vcpu->kvm->lock);
1433
1434                 switch (er) {
1435                 case EMULATE_DONE:
1436                         return 1;
1437                 case EMULATE_DO_MMIO:
1438                         ++vcpu->stat.mmio_exits;
1439                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1440                         return 0;
1441                  case EMULATE_FAIL:
1442                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1443                         break;
1444                 default:
1445                         BUG();
1446                 }
1447         }
1448
1449         if (vcpu->rmode.active &&
1450             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1451                                                                 error_code))
1452                 return 1;
1453
1454         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1455                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1456                 return 0;
1457         }
1458         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1459         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1460         kvm_run->ex.error_code = error_code;
1461         return 0;
1462 }
1463
1464 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1465                                      struct kvm_run *kvm_run)
1466 {
1467         ++vcpu->stat.irq_exits;
1468         return 1;
1469 }
1470
1471 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1472 {
1473         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1474         return 0;
1475 }
1476
1477 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1478 {
1479         u64 inst;
1480         gva_t rip;
1481         int countr_size;
1482         int i, n;
1483
1484         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1485                 countr_size = 2;
1486         } else {
1487                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1488
1489                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1490                               (cs_ar & AR_DB_MASK) ? 4: 2;
1491         }
1492
1493         rip =  vmcs_readl(GUEST_RIP);
1494         if (countr_size != 8)
1495                 rip += vmcs_readl(GUEST_CS_BASE);
1496
1497         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1498
1499         for (i = 0; i < n; i++) {
1500                 switch (((u8*)&inst)[i]) {
1501                 case 0xf0:
1502                 case 0xf2:
1503                 case 0xf3:
1504                 case 0x2e:
1505                 case 0x36:
1506                 case 0x3e:
1507                 case 0x26:
1508                 case 0x64:
1509                 case 0x65:
1510                 case 0x66:
1511                         break;
1512                 case 0x67:
1513                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1514                 default:
1515                         goto done;
1516                 }
1517         }
1518         return 0;
1519 done:
1520         countr_size *= 8;
1521         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1522         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1523         return 1;
1524 }
1525
1526 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1527 {
1528         u64 exit_qualification;
1529         int size, down, in, string, rep;
1530         unsigned port;
1531         unsigned long count;
1532         gva_t address;
1533
1534         ++vcpu->stat.io_exits;
1535         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1536         in = (exit_qualification & 8) != 0;
1537         size = (exit_qualification & 7) + 1;
1538         string = (exit_qualification & 16) != 0;
1539         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1540         count = 1;
1541         rep = (exit_qualification & 32) != 0;
1542         port = exit_qualification >> 16;
1543         address = 0;
1544         if (string) {
1545                 if (rep && !get_io_count(vcpu, &count))
1546                         return 1;
1547                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1548         }
1549         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1550                              address, rep, port);
1551 }
1552
1553 static void
1554 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1555 {
1556         /*
1557          * Patch in the VMCALL instruction:
1558          */
1559         hypercall[0] = 0x0f;
1560         hypercall[1] = 0x01;
1561         hypercall[2] = 0xc1;
1562         hypercall[3] = 0xc3;
1563 }
1564
1565 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1566 {
1567         u64 exit_qualification;
1568         int cr;
1569         int reg;
1570
1571         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1572         cr = exit_qualification & 15;
1573         reg = (exit_qualification >> 8) & 15;
1574         switch ((exit_qualification >> 4) & 3) {
1575         case 0: /* mov to cr */
1576                 switch (cr) {
1577                 case 0:
1578                         vcpu_load_rsp_rip(vcpu);
1579                         set_cr0(vcpu, vcpu->regs[reg]);
1580                         skip_emulated_instruction(vcpu);
1581                         return 1;
1582                 case 3:
1583                         vcpu_load_rsp_rip(vcpu);
1584                         set_cr3(vcpu, vcpu->regs[reg]);
1585                         skip_emulated_instruction(vcpu);
1586                         return 1;
1587                 case 4:
1588                         vcpu_load_rsp_rip(vcpu);
1589                         set_cr4(vcpu, vcpu->regs[reg]);
1590                         skip_emulated_instruction(vcpu);
1591                         return 1;
1592                 case 8:
1593                         vcpu_load_rsp_rip(vcpu);
1594                         set_cr8(vcpu, vcpu->regs[reg]);
1595                         skip_emulated_instruction(vcpu);
1596                         return 1;
1597                 };
1598                 break;
1599         case 2: /* clts */
1600                 vcpu_load_rsp_rip(vcpu);
1601                 vcpu->fpu_active = 1;
1602                 vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
1603                 vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1604                 vcpu->cr0 &= ~CR0_TS_MASK;
1605                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1606                 skip_emulated_instruction(vcpu);
1607                 return 1;
1608         case 1: /*mov from cr*/
1609                 switch (cr) {
1610                 case 3:
1611                         vcpu_load_rsp_rip(vcpu);
1612                         vcpu->regs[reg] = vcpu->cr3;
1613                         vcpu_put_rsp_rip(vcpu);
1614                         skip_emulated_instruction(vcpu);
1615                         return 1;
1616                 case 8:
1617                         vcpu_load_rsp_rip(vcpu);
1618                         vcpu->regs[reg] = vcpu->cr8;
1619                         vcpu_put_rsp_rip(vcpu);
1620                         skip_emulated_instruction(vcpu);
1621                         return 1;
1622                 }
1623                 break;
1624         case 3: /* lmsw */
1625                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1626
1627                 skip_emulated_instruction(vcpu);
1628                 return 1;
1629         default:
1630                 break;
1631         }
1632         kvm_run->exit_reason = 0;
1633         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1634                (int)(exit_qualification >> 4) & 3, cr);
1635         return 0;
1636 }
1637
1638 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1639 {
1640         u64 exit_qualification;
1641         unsigned long val;
1642         int dr, reg;
1643
1644         /*
1645          * FIXME: this code assumes the host is debugging the guest.
1646          *        need to deal with guest debugging itself too.
1647          */
1648         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1649         dr = exit_qualification & 7;
1650         reg = (exit_qualification >> 8) & 15;
1651         vcpu_load_rsp_rip(vcpu);
1652         if (exit_qualification & 16) {
1653                 /* mov from dr */
1654                 switch (dr) {
1655                 case 6:
1656                         val = 0xffff0ff0;
1657                         break;
1658                 case 7:
1659                         val = 0x400;
1660                         break;
1661                 default:
1662                         val = 0;
1663                 }
1664                 vcpu->regs[reg] = val;
1665         } else {
1666                 /* mov to dr */
1667         }
1668         vcpu_put_rsp_rip(vcpu);
1669         skip_emulated_instruction(vcpu);
1670         return 1;
1671 }
1672
1673 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1674 {
1675         kvm_emulate_cpuid(vcpu);
1676         return 1;
1677 }
1678
1679 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1680 {
1681         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1682         u64 data;
1683
1684         if (vmx_get_msr(vcpu, ecx, &data)) {
1685                 vmx_inject_gp(vcpu, 0);
1686                 return 1;
1687         }
1688
1689         /* FIXME: handling of bits 32:63 of rax, rdx */
1690         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1691         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1692         skip_emulated_instruction(vcpu);
1693         return 1;
1694 }
1695
1696 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1697 {
1698         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1699         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1700                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1701
1702         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1703                 vmx_inject_gp(vcpu, 0);
1704                 return 1;
1705         }
1706
1707         skip_emulated_instruction(vcpu);
1708         return 1;
1709 }
1710
1711 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1712                               struct kvm_run *kvm_run)
1713 {
1714         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1715         kvm_run->cr8 = vcpu->cr8;
1716         kvm_run->apic_base = vcpu->apic_base;
1717         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1718                                                   vcpu->irq_summary == 0);
1719 }
1720
1721 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1722                                    struct kvm_run *kvm_run)
1723 {
1724         /*
1725          * If the user space waits to inject interrupts, exit as soon as
1726          * possible
1727          */
1728         if (kvm_run->request_interrupt_window &&
1729             !vcpu->irq_summary) {
1730                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1731                 ++vcpu->stat.irq_window_exits;
1732                 return 0;
1733         }
1734         return 1;
1735 }
1736
1737 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1738 {
1739         skip_emulated_instruction(vcpu);
1740         if (vcpu->irq_summary)
1741                 return 1;
1742
1743         kvm_run->exit_reason = KVM_EXIT_HLT;
1744         ++vcpu->stat.halt_exits;
1745         return 0;
1746 }
1747
1748 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1749 {
1750         skip_emulated_instruction(vcpu);
1751         return kvm_hypercall(vcpu, kvm_run);
1752 }
1753
1754 /*
1755  * The exit handlers return 1 if the exit was handled fully and guest execution
1756  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1757  * to be done to userspace and return 0.
1758  */
1759 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1760                                       struct kvm_run *kvm_run) = {
1761         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1762         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1763         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1764         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1765         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1766         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1767         [EXIT_REASON_CPUID]                   = handle_cpuid,
1768         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1769         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1770         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1771         [EXIT_REASON_HLT]                     = handle_halt,
1772         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1773 };
1774
1775 static const int kvm_vmx_max_exit_handlers =
1776         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1777
1778 /*
1779  * The guest has exited.  See if we can fix it or if we need userspace
1780  * assistance.
1781  */
1782 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1783 {
1784         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1785         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1786
1787         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1788                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1789                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1790                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1791         if (exit_reason < kvm_vmx_max_exit_handlers
1792             && kvm_vmx_exit_handlers[exit_reason])
1793                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1794         else {
1795                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1796                 kvm_run->hw.hardware_exit_reason = exit_reason;
1797         }
1798         return 0;
1799 }
1800
1801 /*
1802  * Check if userspace requested an interrupt window, and that the
1803  * interrupt window is open.
1804  *
1805  * No need to exit to userspace if we already have an interrupt queued.
1806  */
1807 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1808                                           struct kvm_run *kvm_run)
1809 {
1810         return (!vcpu->irq_summary &&
1811                 kvm_run->request_interrupt_window &&
1812                 vcpu->interrupt_window_open &&
1813                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1814 }
1815
1816 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1817 {
1818         u8 fail;
1819         u16 fs_sel, gs_sel, ldt_sel;
1820         int fs_gs_ldt_reload_needed;
1821         int r;
1822
1823 again:
1824         /*
1825          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1826          * allow segment selectors with cpl > 0 or ti == 1.
1827          */
1828         fs_sel = read_fs();
1829         gs_sel = read_gs();
1830         ldt_sel = read_ldt();
1831         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1832         if (!fs_gs_ldt_reload_needed) {
1833                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1834                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1835         } else {
1836                 vmcs_write16(HOST_FS_SELECTOR, 0);
1837                 vmcs_write16(HOST_GS_SELECTOR, 0);
1838         }
1839
1840 #ifdef CONFIG_X86_64
1841         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1842         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1843 #else
1844         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1845         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1846 #endif
1847
1848         if (!vcpu->mmio_read_completed)
1849                 do_interrupt_requests(vcpu, kvm_run);
1850
1851         if (vcpu->guest_debug.enabled)
1852                 kvm_guest_debug_pre(vcpu);
1853
1854         kvm_load_guest_fpu(vcpu);
1855
1856         /*
1857          * Loading guest fpu may have cleared host cr0.ts
1858          */
1859         vmcs_writel(HOST_CR0, read_cr0());
1860
1861 #ifdef CONFIG_X86_64
1862         if (is_long_mode(vcpu)) {
1863                 save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
1864                 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1865         }
1866 #endif
1867
1868         asm (
1869                 /* Store host registers */
1870                 "pushf \n\t"
1871 #ifdef CONFIG_X86_64
1872                 "push %%rax; push %%rbx; push %%rdx;"
1873                 "push %%rsi; push %%rdi; push %%rbp;"
1874                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1875                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1876                 "push %%rcx \n\t"
1877                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1878 #else
1879                 "pusha; push %%ecx \n\t"
1880                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1881 #endif
1882                 /* Check if vmlaunch of vmresume is needed */
1883                 "cmp $0, %1 \n\t"
1884                 /* Load guest registers.  Don't clobber flags. */
1885 #ifdef CONFIG_X86_64
1886                 "mov %c[cr2](%3), %%rax \n\t"
1887                 "mov %%rax, %%cr2 \n\t"
1888                 "mov %c[rax](%3), %%rax \n\t"
1889                 "mov %c[rbx](%3), %%rbx \n\t"
1890                 "mov %c[rdx](%3), %%rdx \n\t"
1891                 "mov %c[rsi](%3), %%rsi \n\t"
1892                 "mov %c[rdi](%3), %%rdi \n\t"
1893                 "mov %c[rbp](%3), %%rbp \n\t"
1894                 "mov %c[r8](%3),  %%r8  \n\t"
1895                 "mov %c[r9](%3),  %%r9  \n\t"
1896                 "mov %c[r10](%3), %%r10 \n\t"
1897                 "mov %c[r11](%3), %%r11 \n\t"
1898                 "mov %c[r12](%3), %%r12 \n\t"
1899                 "mov %c[r13](%3), %%r13 \n\t"
1900                 "mov %c[r14](%3), %%r14 \n\t"
1901                 "mov %c[r15](%3), %%r15 \n\t"
1902                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1903 #else
1904                 "mov %c[cr2](%3), %%eax \n\t"
1905                 "mov %%eax,   %%cr2 \n\t"
1906                 "mov %c[rax](%3), %%eax \n\t"
1907                 "mov %c[rbx](%3), %%ebx \n\t"
1908                 "mov %c[rdx](%3), %%edx \n\t"
1909                 "mov %c[rsi](%3), %%esi \n\t"
1910                 "mov %c[rdi](%3), %%edi \n\t"
1911                 "mov %c[rbp](%3), %%ebp \n\t"
1912                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1913 #endif
1914                 /* Enter guest mode */
1915                 "jne launched \n\t"
1916                 ASM_VMX_VMLAUNCH "\n\t"
1917                 "jmp kvm_vmx_return \n\t"
1918                 "launched: " ASM_VMX_VMRESUME "\n\t"
1919                 ".globl kvm_vmx_return \n\t"
1920                 "kvm_vmx_return: "
1921                 /* Save guest registers, load host registers, keep flags */
1922 #ifdef CONFIG_X86_64
1923                 "xchg %3,     (%%rsp) \n\t"
1924                 "mov %%rax, %c[rax](%3) \n\t"
1925                 "mov %%rbx, %c[rbx](%3) \n\t"
1926                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1927                 "mov %%rdx, %c[rdx](%3) \n\t"
1928                 "mov %%rsi, %c[rsi](%3) \n\t"
1929                 "mov %%rdi, %c[rdi](%3) \n\t"
1930                 "mov %%rbp, %c[rbp](%3) \n\t"
1931                 "mov %%r8,  %c[r8](%3) \n\t"
1932                 "mov %%r9,  %c[r9](%3) \n\t"
1933                 "mov %%r10, %c[r10](%3) \n\t"
1934                 "mov %%r11, %c[r11](%3) \n\t"
1935                 "mov %%r12, %c[r12](%3) \n\t"
1936                 "mov %%r13, %c[r13](%3) \n\t"
1937                 "mov %%r14, %c[r14](%3) \n\t"
1938                 "mov %%r15, %c[r15](%3) \n\t"
1939                 "mov %%cr2, %%rax   \n\t"
1940                 "mov %%rax, %c[cr2](%3) \n\t"
1941                 "mov (%%rsp), %3 \n\t"
1942
1943                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1944                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1945                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1946                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1947 #else
1948                 "xchg %3, (%%esp) \n\t"
1949                 "mov %%eax, %c[rax](%3) \n\t"
1950                 "mov %%ebx, %c[rbx](%3) \n\t"
1951                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1952                 "mov %%edx, %c[rdx](%3) \n\t"
1953                 "mov %%esi, %c[rsi](%3) \n\t"
1954                 "mov %%edi, %c[rdi](%3) \n\t"
1955                 "mov %%ebp, %c[rbp](%3) \n\t"
1956                 "mov %%cr2, %%eax  \n\t"
1957                 "mov %%eax, %c[cr2](%3) \n\t"
1958                 "mov (%%esp), %3 \n\t"
1959
1960                 "pop %%ecx; popa \n\t"
1961 #endif
1962                 "setbe %0 \n\t"
1963                 "popf \n\t"
1964               : "=q" (fail)
1965               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1966                 "c"(vcpu),
1967                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1968                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1969                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1970                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1971                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1972                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1973                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1974 #ifdef CONFIG_X86_64
1975                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1976                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1977                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1978                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1979                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1980                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1981                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1982                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1983 #endif
1984                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1985               : "cc", "memory" );
1986
1987         /*
1988          * Reload segment selectors ASAP. (it's needed for a functional
1989          * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1990          * relies on having 0 in %gs for the CPU PDA to work.)
1991          */
1992         if (fs_gs_ldt_reload_needed) {
1993                 load_ldt(ldt_sel);
1994                 load_fs(fs_sel);
1995                 /*
1996                  * If we have to reload gs, we must take care to
1997                  * preserve our gs base.
1998                  */
1999                 local_irq_disable();
2000                 load_gs(gs_sel);
2001 #ifdef CONFIG_X86_64
2002                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
2003 #endif
2004                 local_irq_enable();
2005
2006                 reload_tss();
2007         }
2008         ++vcpu->stat.exits;
2009
2010 #ifdef CONFIG_X86_64
2011         if (is_long_mode(vcpu)) {
2012                 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
2013                 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
2014         }
2015 #endif
2016
2017         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2018
2019         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2020
2021         if (fail) {
2022                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2023                 kvm_run->fail_entry.hardware_entry_failure_reason
2024                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2025                 r = 0;
2026         } else {
2027                 /*
2028                  * Profile KVM exit RIPs:
2029                  */
2030                 if (unlikely(prof_on == KVM_PROFILING))
2031                         profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2032
2033                 vcpu->launched = 1;
2034                 r = kvm_handle_exit(kvm_run, vcpu);
2035                 if (r > 0) {
2036                         /* Give scheduler a change to reschedule. */
2037                         if (signal_pending(current)) {
2038                                 ++vcpu->stat.signal_exits;
2039                                 post_kvm_run_save(vcpu, kvm_run);
2040                                 kvm_run->exit_reason = KVM_EXIT_INTR;
2041                                 return -EINTR;
2042                         }
2043
2044                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2045                                 ++vcpu->stat.request_irq_exits;
2046                                 post_kvm_run_save(vcpu, kvm_run);
2047                                 kvm_run->exit_reason = KVM_EXIT_INTR;
2048                                 return -EINTR;
2049                         }
2050
2051                         kvm_resched(vcpu);
2052                         goto again;
2053                 }
2054         }
2055
2056         post_kvm_run_save(vcpu, kvm_run);
2057         return r;
2058 }
2059
2060 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2061 {
2062         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
2063 }
2064
2065 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2066                                   unsigned long addr,
2067                                   u32 err_code)
2068 {
2069         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2070
2071         ++vcpu->stat.pf_guest;
2072
2073         if (is_page_fault(vect_info)) {
2074                 printk(KERN_DEBUG "inject_page_fault: "
2075                        "double fault 0x%lx @ 0x%lx\n",
2076                        addr, vmcs_readl(GUEST_RIP));
2077                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2078                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2079                              DF_VECTOR |
2080                              INTR_TYPE_EXCEPTION |
2081                              INTR_INFO_DELIEVER_CODE_MASK |
2082                              INTR_INFO_VALID_MASK);
2083                 return;
2084         }
2085         vcpu->cr2 = addr;
2086         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2087         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2088                      PF_VECTOR |
2089                      INTR_TYPE_EXCEPTION |
2090                      INTR_INFO_DELIEVER_CODE_MASK |
2091                      INTR_INFO_VALID_MASK);
2092
2093 }
2094
2095 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2096 {
2097         if (vcpu->vmcs) {
2098                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2099                 free_vmcs(vcpu->vmcs);
2100                 vcpu->vmcs = NULL;
2101         }
2102 }
2103
2104 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2105 {
2106         vmx_free_vmcs(vcpu);
2107 }
2108
2109 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2110 {
2111         struct vmcs *vmcs;
2112
2113         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2114         if (!vcpu->guest_msrs)
2115                 return -ENOMEM;
2116
2117         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2118         if (!vcpu->host_msrs)
2119                 goto out_free_guest_msrs;
2120
2121         vmcs = alloc_vmcs();
2122         if (!vmcs)
2123                 goto out_free_msrs;
2124
2125         vmcs_clear(vmcs);
2126         vcpu->vmcs = vmcs;
2127         vcpu->launched = 0;
2128         vcpu->fpu_active = 1;
2129
2130         return 0;
2131
2132 out_free_msrs:
2133         kfree(vcpu->host_msrs);
2134         vcpu->host_msrs = NULL;
2135
2136 out_free_guest_msrs:
2137         kfree(vcpu->guest_msrs);
2138         vcpu->guest_msrs = NULL;
2139
2140         return -ENOMEM;
2141 }
2142
2143 static struct kvm_arch_ops vmx_arch_ops = {
2144         .cpu_has_kvm_support = cpu_has_kvm_support,
2145         .disabled_by_bios = vmx_disabled_by_bios,
2146         .hardware_setup = hardware_setup,
2147         .hardware_unsetup = hardware_unsetup,
2148         .hardware_enable = hardware_enable,
2149         .hardware_disable = hardware_disable,
2150
2151         .vcpu_create = vmx_create_vcpu,
2152         .vcpu_free = vmx_free_vcpu,
2153
2154         .vcpu_load = vmx_vcpu_load,
2155         .vcpu_put = vmx_vcpu_put,
2156         .vcpu_decache = vmx_vcpu_decache,
2157
2158         .set_guest_debug = set_guest_debug,
2159         .get_msr = vmx_get_msr,
2160         .set_msr = vmx_set_msr,
2161         .get_segment_base = vmx_get_segment_base,
2162         .get_segment = vmx_get_segment,
2163         .set_segment = vmx_set_segment,
2164         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2165         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2166         .set_cr0 = vmx_set_cr0,
2167         .set_cr3 = vmx_set_cr3,
2168         .set_cr4 = vmx_set_cr4,
2169 #ifdef CONFIG_X86_64
2170         .set_efer = vmx_set_efer,
2171 #endif
2172         .get_idt = vmx_get_idt,
2173         .set_idt = vmx_set_idt,
2174         .get_gdt = vmx_get_gdt,
2175         .set_gdt = vmx_set_gdt,
2176         .cache_regs = vcpu_load_rsp_rip,
2177         .decache_regs = vcpu_put_rsp_rip,
2178         .get_rflags = vmx_get_rflags,
2179         .set_rflags = vmx_set_rflags,
2180
2181         .tlb_flush = vmx_flush_tlb,
2182         .inject_page_fault = vmx_inject_page_fault,
2183
2184         .inject_gp = vmx_inject_gp,
2185
2186         .run = vmx_vcpu_run,
2187         .skip_emulated_instruction = skip_emulated_instruction,
2188         .vcpu_setup = vmx_vcpu_setup,
2189         .patch_hypercall = vmx_patch_hypercall,
2190 };
2191
2192 static int __init vmx_init(void)
2193 {
2194         void *iova;
2195         int r;
2196
2197         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2198         if (!vmx_io_bitmap_a)
2199                 return -ENOMEM;
2200
2201         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2202         if (!vmx_io_bitmap_b) {
2203                 r = -ENOMEM;
2204                 goto out;
2205         }
2206
2207         /*
2208          * Allow direct access to the PC debug port (it is often used for I/O
2209          * delays, but the vmexits simply slow things down).
2210          */
2211         iova = kmap(vmx_io_bitmap_a);
2212         memset(iova, 0xff, PAGE_SIZE);
2213         clear_bit(0x80, iova);
2214         kunmap(iova);
2215
2216         iova = kmap(vmx_io_bitmap_b);
2217         memset(iova, 0xff, PAGE_SIZE);
2218         kunmap(iova);
2219
2220         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2221         if (r)
2222                 goto out1;
2223
2224         return 0;
2225
2226 out1:
2227         __free_page(vmx_io_bitmap_b);
2228 out:
2229         __free_page(vmx_io_bitmap_a);
2230         return r;
2231 }
2232
2233 static void __exit vmx_exit(void)
2234 {
2235         __free_page(vmx_io_bitmap_b);
2236         __free_page(vmx_io_bitmap_a);
2237
2238         kvm_exit_arch();
2239 }
2240
2241 module_init(vmx_init)
2242 module_exit(vmx_exit)