2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/vmalloc.h>
20 #include <linux/highmem.h>
21 #include <linux/profile.h>
25 #include "x86_emulate.h"
27 MODULE_AUTHOR("Qumranet");
28 MODULE_LICENSE("GPL");
30 #define IOPM_ALLOC_ORDER 2
31 #define MSRPM_ALLOC_ORDER 1
37 #define DR7_GD_MASK (1 << 13)
38 #define DR6_BD_MASK (1 << 13)
39 #define CR4_DE_MASK (1UL << 3)
41 #define SEG_TYPE_LDT 2
42 #define SEG_TYPE_BUSY_TSS16 3
44 #define KVM_EFER_LMA (1 << 10)
45 #define KVM_EFER_LME (1 << 8)
47 unsigned long iopm_base;
48 unsigned long msrpm_base;
50 struct kvm_ldttss_desc {
53 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
54 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
57 } __attribute__((packed));
62 uint64_t asid_generation;
65 struct kvm_ldttss_desc *tss_desc;
67 struct page *save_area;
70 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
72 struct svm_init_data {
77 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
79 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
80 #define MSRS_RANGE_SIZE 2048
81 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
83 #define MAX_INST_SIZE 15
85 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
87 struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
90 if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
93 cs_attrib = sa->cs.attrib;
95 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
96 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
99 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
101 int word_index = __ffs(vcpu->irq_summary);
102 int bit_index = __ffs(vcpu->irq_pending[word_index]);
103 int irq = word_index * BITS_PER_LONG + bit_index;
105 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
106 if (!vcpu->irq_pending[word_index])
107 clear_bit(word_index, &vcpu->irq_summary);
111 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
113 set_bit(irq, vcpu->irq_pending);
114 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
117 static inline void clgi(void)
119 asm volatile (SVM_CLGI);
122 static inline void stgi(void)
124 asm volatile (SVM_STGI);
127 static inline void invlpga(unsigned long addr, u32 asid)
129 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
132 static inline unsigned long kvm_read_cr2(void)
136 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
140 static inline void kvm_write_cr2(unsigned long val)
142 asm volatile ("mov %0, %%cr2" :: "r" (val));
145 static inline unsigned long read_dr6(void)
149 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
153 static inline void write_dr6(unsigned long val)
155 asm volatile ("mov %0, %%dr6" :: "r" (val));
158 static inline unsigned long read_dr7(void)
162 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
166 static inline void write_dr7(unsigned long val)
168 asm volatile ("mov %0, %%dr7" :: "r" (val));
171 static inline void force_new_asid(struct kvm_vcpu *vcpu)
173 vcpu->svm->asid_generation--;
176 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
178 force_new_asid(vcpu);
181 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
183 if (!(efer & KVM_EFER_LMA))
184 efer &= ~KVM_EFER_LME;
186 vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
187 vcpu->shadow_efer = efer;
190 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
192 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
193 SVM_EVTINJ_VALID_ERR |
194 SVM_EVTINJ_TYPE_EXEPT |
196 vcpu->svm->vmcb->control.event_inj_err = error_code;
199 static void inject_ud(struct kvm_vcpu *vcpu)
201 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
202 SVM_EVTINJ_TYPE_EXEPT |
206 static void inject_db(struct kvm_vcpu *vcpu)
208 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
209 SVM_EVTINJ_TYPE_EXEPT |
213 static int is_page_fault(uint32_t info)
215 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
216 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
219 static int is_external_interrupt(u32 info)
221 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
222 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
225 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
227 if (!vcpu->svm->next_rip) {
228 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
231 if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
232 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
234 vcpu->svm->vmcb->save.rip,
235 vcpu->svm->next_rip);
238 vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
239 vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
241 vcpu->interrupt_window_open = 1;
244 static int has_svm(void)
246 uint32_t eax, ebx, ecx, edx;
248 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
249 printk(KERN_INFO "has_svm: not amd\n");
253 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
254 if (eax < SVM_CPUID_FUNC) {
255 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
259 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
260 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
261 printk(KERN_DEBUG "has_svm: svm not available\n");
267 static void svm_hardware_disable(void *garbage)
269 struct svm_cpu_data *svm_data
270 = per_cpu(svm_data, raw_smp_processor_id());
275 wrmsrl(MSR_VM_HSAVE_PA, 0);
276 rdmsrl(MSR_EFER, efer);
277 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
278 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
279 __free_page(svm_data->save_area);
284 static void svm_hardware_enable(void *garbage)
287 struct svm_cpu_data *svm_data;
290 struct desc_ptr gdt_descr;
292 struct Xgt_desc_struct gdt_descr;
294 struct desc_struct *gdt;
295 int me = raw_smp_processor_id();
298 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
301 svm_data = per_cpu(svm_data, me);
304 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
309 svm_data->asid_generation = 1;
310 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
311 svm_data->next_asid = svm_data->max_asid + 1;
313 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
314 gdt = (struct desc_struct *)gdt_descr.address;
315 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
317 rdmsrl(MSR_EFER, efer);
318 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
320 wrmsrl(MSR_VM_HSAVE_PA,
321 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
324 static int svm_cpu_init(int cpu)
326 struct svm_cpu_data *svm_data;
329 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
333 svm_data->save_area = alloc_page(GFP_KERNEL);
335 if (!svm_data->save_area)
338 per_cpu(svm_data, cpu) = svm_data;
348 static int set_msr_interception(u32 *msrpm, unsigned msr,
353 for (i = 0; i < NUM_MSR_MAPS; i++) {
354 if (msr >= msrpm_ranges[i] &&
355 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
356 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
357 msrpm_ranges[i]) * 2;
359 u32 *base = msrpm + (msr_offset / 32);
360 u32 msr_shift = msr_offset % 32;
361 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
362 *base = (*base & ~(0x3 << msr_shift)) |
367 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
371 static __init int svm_hardware_setup(void)
374 struct page *iopm_pages;
375 struct page *msrpm_pages;
379 kvm_emulator_want_group7_invlpg();
381 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
385 memset(page_address(iopm_pages), 0xff,
386 PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
387 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
390 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
396 msrpm_va = page_address(msrpm_pages);
397 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
398 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
401 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
402 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
403 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
404 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
405 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
406 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
408 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
409 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
410 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
411 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
413 for_each_online_cpu(cpu) {
414 r = svm_cpu_init(cpu);
421 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
424 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
429 static __exit void svm_hardware_unsetup(void)
431 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
432 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
433 iopm_base = msrpm_base = 0;
436 static void init_seg(struct vmcb_seg *seg)
439 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
440 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
445 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
448 seg->attrib = SVM_SELECTOR_P_MASK | type;
453 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
458 static void init_vmcb(struct vmcb *vmcb)
460 struct vmcb_control_area *control = &vmcb->control;
461 struct vmcb_save_area *save = &vmcb->save;
464 control->intercept_cr_read = INTERCEPT_CR0_MASK |
468 control->intercept_cr_write = INTERCEPT_CR0_MASK |
472 control->intercept_dr_read = INTERCEPT_DR0_MASK |
477 control->intercept_dr_write = INTERCEPT_DR0_MASK |
484 control->intercept_exceptions = 1 << PF_VECTOR;
487 control->intercept = (1ULL << INTERCEPT_INTR) |
488 (1ULL << INTERCEPT_NMI) |
489 (1ULL << INTERCEPT_SMI) |
491 * selective cr0 intercept bug?
492 * 0: 0f 22 d8 mov %eax,%cr3
493 * 3: 0f 20 c0 mov %cr0,%eax
494 * 6: 0d 00 00 00 80 or $0x80000000,%eax
495 * b: 0f 22 c0 mov %eax,%cr0
496 * set cr3 ->interception
497 * get cr0 ->interception
498 * set cr0 -> no interception
500 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
501 (1ULL << INTERCEPT_CPUID) |
502 (1ULL << INTERCEPT_HLT) |
503 (1ULL << INTERCEPT_INVLPGA) |
504 (1ULL << INTERCEPT_IOIO_PROT) |
505 (1ULL << INTERCEPT_MSR_PROT) |
506 (1ULL << INTERCEPT_TASK_SWITCH) |
507 (1ULL << INTERCEPT_SHUTDOWN) |
508 (1ULL << INTERCEPT_VMRUN) |
509 (1ULL << INTERCEPT_VMMCALL) |
510 (1ULL << INTERCEPT_VMLOAD) |
511 (1ULL << INTERCEPT_VMSAVE) |
512 (1ULL << INTERCEPT_STGI) |
513 (1ULL << INTERCEPT_CLGI) |
514 (1ULL << INTERCEPT_SKINIT);
516 control->iopm_base_pa = iopm_base;
517 control->msrpm_base_pa = msrpm_base;
519 control->tsc_offset = -tsc;
520 control->int_ctl = V_INTR_MASKING_MASK;
528 save->cs.selector = 0xf000;
529 /* Executable/Readable Code Segment */
530 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
531 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
532 save->cs.limit = 0xffff;
534 * cs.base should really be 0xffff0000, but vmx can't handle that, so
535 * be consistent with it.
537 * Replace when we have real mode working for vmx.
539 save->cs.base = 0xf0000;
541 save->gdtr.limit = 0xffff;
542 save->idtr.limit = 0xffff;
544 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
545 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
547 save->efer = MSR_EFER_SVME_MASK;
549 save->dr6 = 0xffff0ff0;
552 save->rip = 0x0000fff0;
555 * cr0 val on cpu init should be 0x60000010, we enable cpu
556 * cache by default. the orderly way is to enable cache in bios.
558 save->cr0 = 0x00000010 | CR0_PG_MASK | CR0_WP_MASK;
559 save->cr4 = CR4_PAE_MASK;
563 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
569 vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
572 page = alloc_page(GFP_KERNEL);
576 vcpu->svm->vmcb = page_address(page);
577 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
578 vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
579 vcpu->svm->cr0 = 0x00000010;
580 vcpu->svm->asid_generation = 0;
581 memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
582 init_vmcb(vcpu->svm->vmcb);
585 vcpu->apic_base = 0xfee00000 |
586 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
587 MSR_IA32_APICBASE_ENABLE;
597 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
602 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
606 static void svm_vcpu_load(struct kvm_vcpu *vcpu)
611 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
616 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
620 static void svm_cache_regs(struct kvm_vcpu *vcpu)
622 vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
623 vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
624 vcpu->rip = vcpu->svm->vmcb->save.rip;
627 static void svm_decache_regs(struct kvm_vcpu *vcpu)
629 vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
630 vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
631 vcpu->svm->vmcb->save.rip = vcpu->rip;
634 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
636 return vcpu->svm->vmcb->save.rflags;
639 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
641 vcpu->svm->vmcb->save.rflags = rflags;
644 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
646 struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
649 case VCPU_SREG_CS: return &save->cs;
650 case VCPU_SREG_DS: return &save->ds;
651 case VCPU_SREG_ES: return &save->es;
652 case VCPU_SREG_FS: return &save->fs;
653 case VCPU_SREG_GS: return &save->gs;
654 case VCPU_SREG_SS: return &save->ss;
655 case VCPU_SREG_TR: return &save->tr;
656 case VCPU_SREG_LDTR: return &save->ldtr;
662 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
664 struct vmcb_seg *s = svm_seg(vcpu, seg);
669 static void svm_get_segment(struct kvm_vcpu *vcpu,
670 struct kvm_segment *var, int seg)
672 struct vmcb_seg *s = svm_seg(vcpu, seg);
675 var->limit = s->limit;
676 var->selector = s->selector;
677 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
678 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
679 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
680 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
681 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
682 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
683 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
684 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
685 var->unusable = !var->present;
688 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
690 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
692 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
693 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
696 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
698 dt->limit = vcpu->svm->vmcb->save.idtr.limit;
699 dt->base = vcpu->svm->vmcb->save.idtr.base;
702 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
704 vcpu->svm->vmcb->save.idtr.limit = dt->limit;
705 vcpu->svm->vmcb->save.idtr.base = dt->base ;
708 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
710 dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
711 dt->base = vcpu->svm->vmcb->save.gdtr.base;
714 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
716 vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
717 vcpu->svm->vmcb->save.gdtr.base = dt->base ;
720 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
724 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
727 if (vcpu->shadow_efer & KVM_EFER_LME) {
728 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
729 vcpu->shadow_efer |= KVM_EFER_LMA;
730 vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
733 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
734 vcpu->shadow_efer &= ~KVM_EFER_LMA;
735 vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
739 vcpu->svm->cr0 = cr0;
741 cr0 |= CR0_PG_MASK | CR0_WP_MASK;
742 cr0 &= ~(CR0_CD_MASK | CR0_NW_MASK);
743 vcpu->svm->vmcb->save.cr0 = cr0;
746 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
749 vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
752 static void svm_set_segment(struct kvm_vcpu *vcpu,
753 struct kvm_segment *var, int seg)
755 struct vmcb_seg *s = svm_seg(vcpu, seg);
758 s->limit = var->limit;
759 s->selector = var->selector;
763 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
764 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
765 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
766 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
767 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
768 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
769 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
770 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
772 if (seg == VCPU_SREG_CS)
773 vcpu->svm->vmcb->save.cpl
774 = (vcpu->svm->vmcb->save.cs.attrib
775 >> SVM_SELECTOR_DPL_SHIFT) & 3;
781 vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
782 vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
786 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
791 static void load_host_msrs(struct kvm_vcpu *vcpu)
795 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
796 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
799 static void save_host_msrs(struct kvm_vcpu *vcpu)
803 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
804 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
807 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
809 if (svm_data->next_asid > svm_data->max_asid) {
810 ++svm_data->asid_generation;
811 svm_data->next_asid = 1;
812 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
815 vcpu->cpu = svm_data->cpu;
816 vcpu->svm->asid_generation = svm_data->asid_generation;
817 vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
820 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
822 invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
825 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
827 return vcpu->svm->db_regs[dr];
830 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
835 if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
836 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
837 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
838 *exception = DB_VECTOR;
844 vcpu->svm->db_regs[dr] = value;
847 if (vcpu->cr4 & CR4_DE_MASK) {
848 *exception = UD_VECTOR;
852 if (value & ~((1ULL << 32) - 1)) {
853 *exception = GP_VECTOR;
856 vcpu->svm->vmcb->save.dr7 = value;
860 printk(KERN_DEBUG "%s: unexpected dr %u\n",
862 *exception = UD_VECTOR;
867 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
869 u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
872 enum emulation_result er;
875 if (is_external_interrupt(exit_int_info))
876 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
878 spin_lock(&vcpu->kvm->lock);
880 fault_address = vcpu->svm->vmcb->control.exit_info_2;
881 error_code = vcpu->svm->vmcb->control.exit_info_1;
882 r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
884 spin_unlock(&vcpu->kvm->lock);
888 spin_unlock(&vcpu->kvm->lock);
891 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
892 spin_unlock(&vcpu->kvm->lock);
897 case EMULATE_DO_MMIO:
898 ++kvm_stat.mmio_exits;
899 kvm_run->exit_reason = KVM_EXIT_MMIO;
902 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
908 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
912 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
915 * VMCB is undefined after a SHUTDOWN intercept
916 * so reinitialize it.
918 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
919 init_vmcb(vcpu->svm->vmcb);
921 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
925 static int io_get_override(struct kvm_vcpu *vcpu,
926 struct vmcb_seg **seg,
929 u8 inst[MAX_INST_SIZE];
934 rip = vcpu->svm->vmcb->save.rip;
935 ins_length = vcpu->svm->next_rip - rip;
936 rip += vcpu->svm->vmcb->save.cs.base;
938 if (ins_length > MAX_INST_SIZE)
940 "%s: inst length err, cs base 0x%llx rip 0x%llx "
941 "next rip 0x%llx ins_length %u\n",
943 vcpu->svm->vmcb->save.cs.base,
944 vcpu->svm->vmcb->save.rip,
945 vcpu->svm->vmcb->control.exit_info_2,
948 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
954 for (i = 0; i < ins_length; i++)
965 *seg = &vcpu->svm->vmcb->save.cs;
968 *seg = &vcpu->svm->vmcb->save.ss;
971 *seg = &vcpu->svm->vmcb->save.ds;
974 *seg = &vcpu->svm->vmcb->save.es;
977 *seg = &vcpu->svm->vmcb->save.fs;
980 *seg = &vcpu->svm->vmcb->save.gs;
985 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
989 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, gva_t *address)
991 unsigned long addr_mask;
993 struct vmcb_seg *seg;
995 struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
996 u16 cs_attrib = save_area->cs.attrib;
997 unsigned addr_size = get_addr_size(vcpu);
999 if (!io_get_override(vcpu, &seg, &addr_override))
1003 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1006 reg = &vcpu->regs[VCPU_REGS_RDI];
1007 seg = &vcpu->svm->vmcb->save.es;
1009 reg = &vcpu->regs[VCPU_REGS_RSI];
1010 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1013 addr_mask = ~0ULL >> (64 - (addr_size * 8));
1015 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1016 !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1017 *address = (*reg & addr_mask);
1021 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1022 svm_inject_gp(vcpu, 0);
1026 *address = (*reg & addr_mask) + seg->base;
1030 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1032 u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1033 int size, down, in, string, rep;
1035 unsigned long count;
1038 ++kvm_stat.io_exits;
1040 vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1042 in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1043 port = io_info >> 16;
1044 size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1045 string = (io_info & SVM_IOIO_STR_MASK) != 0;
1046 rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1048 down = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1053 addr_mask = io_adress(vcpu, in, &address);
1055 printk(KERN_DEBUG "%s: get io address failed\n",
1061 count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1063 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1064 address, rep, port);
1067 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1072 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1074 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1075 skip_emulated_instruction(vcpu);
1076 if (vcpu->irq_summary)
1079 kvm_run->exit_reason = KVM_EXIT_HLT;
1080 ++kvm_stat.halt_exits;
1084 static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1086 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 3;
1087 skip_emulated_instruction(vcpu);
1088 return kvm_hypercall(vcpu, kvm_run);
1091 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1097 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1099 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1100 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1104 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1106 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1107 kvm_emulate_cpuid(vcpu);
1111 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1113 if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1114 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1118 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1121 case MSR_IA32_TIME_STAMP_COUNTER: {
1125 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1129 *data = vcpu->svm->vmcb->save.star;
1131 #ifdef CONFIG_X86_64
1133 *data = vcpu->svm->vmcb->save.lstar;
1136 *data = vcpu->svm->vmcb->save.cstar;
1138 case MSR_KERNEL_GS_BASE:
1139 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1141 case MSR_SYSCALL_MASK:
1142 *data = vcpu->svm->vmcb->save.sfmask;
1145 case MSR_IA32_SYSENTER_CS:
1146 *data = vcpu->svm->vmcb->save.sysenter_cs;
1148 case MSR_IA32_SYSENTER_EIP:
1149 *data = vcpu->svm->vmcb->save.sysenter_eip;
1151 case MSR_IA32_SYSENTER_ESP:
1152 *data = vcpu->svm->vmcb->save.sysenter_esp;
1155 return kvm_get_msr_common(vcpu, ecx, data);
1160 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1162 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1165 if (svm_get_msr(vcpu, ecx, &data))
1166 svm_inject_gp(vcpu, 0);
1168 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1169 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1170 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1171 skip_emulated_instruction(vcpu);
1176 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1179 case MSR_IA32_TIME_STAMP_COUNTER: {
1183 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1187 vcpu->svm->vmcb->save.star = data;
1189 #ifdef CONFIG_X86_64
1191 vcpu->svm->vmcb->save.lstar = data;
1194 vcpu->svm->vmcb->save.cstar = data;
1196 case MSR_KERNEL_GS_BASE:
1197 vcpu->svm->vmcb->save.kernel_gs_base = data;
1199 case MSR_SYSCALL_MASK:
1200 vcpu->svm->vmcb->save.sfmask = data;
1203 case MSR_IA32_SYSENTER_CS:
1204 vcpu->svm->vmcb->save.sysenter_cs = data;
1206 case MSR_IA32_SYSENTER_EIP:
1207 vcpu->svm->vmcb->save.sysenter_eip = data;
1209 case MSR_IA32_SYSENTER_ESP:
1210 vcpu->svm->vmcb->save.sysenter_esp = data;
1213 return kvm_set_msr_common(vcpu, ecx, data);
1218 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1220 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1221 u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1222 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1223 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1224 if (svm_set_msr(vcpu, ecx, data))
1225 svm_inject_gp(vcpu, 0);
1227 skip_emulated_instruction(vcpu);
1231 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1233 if (vcpu->svm->vmcb->control.exit_info_1)
1234 return wrmsr_interception(vcpu, kvm_run);
1236 return rdmsr_interception(vcpu, kvm_run);
1239 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1240 struct kvm_run *kvm_run)
1243 * If the user space waits to inject interrupts, exit as soon as
1246 if (kvm_run->request_interrupt_window &&
1247 !vcpu->irq_summary) {
1248 ++kvm_stat.irq_window_exits;
1249 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1256 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1257 struct kvm_run *kvm_run) = {
1258 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1259 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1260 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1262 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1263 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1264 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1265 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1266 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1267 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1268 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1269 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1270 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1271 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1272 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1273 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1274 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1275 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1276 [SVM_EXIT_INTR] = nop_on_interception,
1277 [SVM_EXIT_NMI] = nop_on_interception,
1278 [SVM_EXIT_SMI] = nop_on_interception,
1279 [SVM_EXIT_INIT] = nop_on_interception,
1280 [SVM_EXIT_VINTR] = interrupt_window_interception,
1281 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1282 [SVM_EXIT_CPUID] = cpuid_interception,
1283 [SVM_EXIT_HLT] = halt_interception,
1284 [SVM_EXIT_INVLPG] = emulate_on_interception,
1285 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1286 [SVM_EXIT_IOIO] = io_interception,
1287 [SVM_EXIT_MSR] = msr_interception,
1288 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1289 [SVM_EXIT_SHUTDOWN] = shutdown_interception,
1290 [SVM_EXIT_VMRUN] = invalid_op_interception,
1291 [SVM_EXIT_VMMCALL] = vmmcall_interception,
1292 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1293 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1294 [SVM_EXIT_STGI] = invalid_op_interception,
1295 [SVM_EXIT_CLGI] = invalid_op_interception,
1296 [SVM_EXIT_SKINIT] = invalid_op_interception,
1300 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1302 u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1304 if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1305 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1306 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1308 __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1311 if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1312 || svm_exit_handlers[exit_code] == 0) {
1313 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1314 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1317 vcpu->svm->vmcb->save.rip,
1319 vcpu->svm->vmcb->save.rflags);
1323 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1326 static void reload_tss(struct kvm_vcpu *vcpu)
1328 int cpu = raw_smp_processor_id();
1330 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1331 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1335 static void pre_svm_run(struct kvm_vcpu *vcpu)
1337 int cpu = raw_smp_processor_id();
1339 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1341 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1342 if (vcpu->cpu != cpu ||
1343 vcpu->svm->asid_generation != svm_data->asid_generation)
1344 new_asid(vcpu, svm_data);
1348 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1350 struct vmcb_control_area *control;
1352 control = &vcpu->svm->vmcb->control;
1353 control->int_vector = pop_irq(vcpu);
1354 control->int_ctl &= ~V_INTR_PRIO_MASK;
1355 control->int_ctl |= V_IRQ_MASK |
1356 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1359 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1361 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1363 if (control->int_ctl & V_IRQ_MASK) {
1364 control->int_ctl &= ~V_IRQ_MASK;
1365 push_irq(vcpu, control->int_vector);
1368 vcpu->interrupt_window_open =
1369 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1372 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1373 struct kvm_run *kvm_run)
1375 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1377 vcpu->interrupt_window_open =
1378 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1379 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1381 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1383 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1385 kvm_do_inject_irq(vcpu);
1388 * Interrupts blocked. Wait for unblock.
1390 if (!vcpu->interrupt_window_open &&
1391 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1392 control->intercept |= 1ULL << INTERCEPT_VINTR;
1394 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1397 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1398 struct kvm_run *kvm_run)
1400 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1401 vcpu->irq_summary == 0);
1402 kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1403 kvm_run->cr8 = vcpu->cr8;
1404 kvm_run->apic_base = vcpu->apic_base;
1408 * Check if userspace requested an interrupt window, and that the
1409 * interrupt window is open.
1411 * No need to exit to userspace if we already have an interrupt queued.
1413 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1414 struct kvm_run *kvm_run)
1416 return (!vcpu->irq_summary &&
1417 kvm_run->request_interrupt_window &&
1418 vcpu->interrupt_window_open &&
1419 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1422 static void save_db_regs(unsigned long *db_regs)
1424 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1425 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1426 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1427 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1430 static void load_db_regs(unsigned long *db_regs)
1432 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1433 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1434 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1435 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1438 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1446 if (!vcpu->mmio_read_completed)
1447 do_interrupt_requests(vcpu, kvm_run);
1453 save_host_msrs(vcpu);
1454 fs_selector = read_fs();
1455 gs_selector = read_gs();
1456 ldt_selector = read_ldt();
1457 vcpu->svm->host_cr2 = kvm_read_cr2();
1458 vcpu->svm->host_dr6 = read_dr6();
1459 vcpu->svm->host_dr7 = read_dr7();
1460 vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1462 if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1464 save_db_regs(vcpu->svm->host_db_regs);
1465 load_db_regs(vcpu->svm->db_regs);
1468 fx_save(vcpu->host_fx_image);
1469 fx_restore(vcpu->guest_fx_image);
1472 #ifdef CONFIG_X86_64
1473 "push %%rbx; push %%rcx; push %%rdx;"
1474 "push %%rsi; push %%rdi; push %%rbp;"
1475 "push %%r8; push %%r9; push %%r10; push %%r11;"
1476 "push %%r12; push %%r13; push %%r14; push %%r15;"
1478 "push %%ebx; push %%ecx; push %%edx;"
1479 "push %%esi; push %%edi; push %%ebp;"
1482 #ifdef CONFIG_X86_64
1483 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1484 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1485 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1486 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1487 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1488 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1489 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1490 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1491 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1492 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1493 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1494 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1495 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1496 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1498 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1499 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1500 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1501 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1502 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1503 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1506 #ifdef CONFIG_X86_64
1507 /* Enter guest mode */
1509 "mov %c[svm](%[vcpu]), %%rax \n\t"
1510 "mov %c[vmcb](%%rax), %%rax \n\t"
1516 /* Enter guest mode */
1518 "mov %c[svm](%[vcpu]), %%eax \n\t"
1519 "mov %c[vmcb](%%eax), %%eax \n\t"
1526 /* Save guest registers, load host registers */
1527 #ifdef CONFIG_X86_64
1528 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1529 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1530 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1531 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1532 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1533 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1534 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1535 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1536 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1537 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1538 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1539 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1540 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1541 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1543 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1544 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1545 "pop %%rbp; pop %%rdi; pop %%rsi;"
1546 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1548 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1549 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1550 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1551 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1552 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1553 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1555 "pop %%ebp; pop %%edi; pop %%esi;"
1556 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1560 [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1561 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1562 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1563 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1564 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1565 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1566 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1567 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1568 #ifdef CONFIG_X86_64
1569 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1570 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1571 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1572 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1573 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1574 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1575 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1576 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1580 fx_save(vcpu->guest_fx_image);
1581 fx_restore(vcpu->host_fx_image);
1583 if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1584 load_db_regs(vcpu->svm->host_db_regs);
1586 vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1588 write_dr6(vcpu->svm->host_dr6);
1589 write_dr7(vcpu->svm->host_dr7);
1590 kvm_write_cr2(vcpu->svm->host_cr2);
1592 load_fs(fs_selector);
1593 load_gs(gs_selector);
1594 load_ldt(ldt_selector);
1595 load_host_msrs(vcpu);
1600 * Profile KVM exit RIPs:
1602 if (unlikely(prof_on == KVM_PROFILING))
1603 profile_hit(KVM_PROFILING,
1604 (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1608 kvm_reput_irq(vcpu);
1610 vcpu->svm->next_rip = 0;
1612 if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1613 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1614 kvm_run->fail_entry.hardware_entry_failure_reason
1615 = vcpu->svm->vmcb->control.exit_code;
1616 post_kvm_run_save(vcpu, kvm_run);
1620 r = handle_exit(vcpu, kvm_run);
1622 if (signal_pending(current)) {
1623 ++kvm_stat.signal_exits;
1624 post_kvm_run_save(vcpu, kvm_run);
1625 kvm_run->exit_reason = KVM_EXIT_INTR;
1629 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1630 ++kvm_stat.request_irq_exits;
1631 post_kvm_run_save(vcpu, kvm_run);
1632 kvm_run->exit_reason = KVM_EXIT_INTR;
1638 post_kvm_run_save(vcpu, kvm_run);
1642 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1644 force_new_asid(vcpu);
1647 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1649 vcpu->svm->vmcb->save.cr3 = root;
1650 force_new_asid(vcpu);
1653 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1657 uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1659 ++kvm_stat.pf_guest;
1661 if (is_page_fault(exit_int_info)) {
1663 vcpu->svm->vmcb->control.event_inj_err = 0;
1664 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1665 SVM_EVTINJ_VALID_ERR |
1666 SVM_EVTINJ_TYPE_EXEPT |
1671 vcpu->svm->vmcb->save.cr2 = addr;
1672 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1673 SVM_EVTINJ_VALID_ERR |
1674 SVM_EVTINJ_TYPE_EXEPT |
1676 vcpu->svm->vmcb->control.event_inj_err = err_code;
1680 static int is_disabled(void)
1686 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1689 * Patch in the VMMCALL instruction:
1691 hypercall[0] = 0x0f;
1692 hypercall[1] = 0x01;
1693 hypercall[2] = 0xd9;
1694 hypercall[3] = 0xc3;
1697 static struct kvm_arch_ops svm_arch_ops = {
1698 .cpu_has_kvm_support = has_svm,
1699 .disabled_by_bios = is_disabled,
1700 .hardware_setup = svm_hardware_setup,
1701 .hardware_unsetup = svm_hardware_unsetup,
1702 .hardware_enable = svm_hardware_enable,
1703 .hardware_disable = svm_hardware_disable,
1705 .vcpu_create = svm_create_vcpu,
1706 .vcpu_free = svm_free_vcpu,
1708 .vcpu_load = svm_vcpu_load,
1709 .vcpu_put = svm_vcpu_put,
1710 .vcpu_decache = svm_vcpu_decache,
1712 .set_guest_debug = svm_guest_debug,
1713 .get_msr = svm_get_msr,
1714 .set_msr = svm_set_msr,
1715 .get_segment_base = svm_get_segment_base,
1716 .get_segment = svm_get_segment,
1717 .set_segment = svm_set_segment,
1718 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1719 .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1720 .set_cr0 = svm_set_cr0,
1721 .set_cr3 = svm_set_cr3,
1722 .set_cr4 = svm_set_cr4,
1723 .set_efer = svm_set_efer,
1724 .get_idt = svm_get_idt,
1725 .set_idt = svm_set_idt,
1726 .get_gdt = svm_get_gdt,
1727 .set_gdt = svm_set_gdt,
1728 .get_dr = svm_get_dr,
1729 .set_dr = svm_set_dr,
1730 .cache_regs = svm_cache_regs,
1731 .decache_regs = svm_decache_regs,
1732 .get_rflags = svm_get_rflags,
1733 .set_rflags = svm_set_rflags,
1735 .invlpg = svm_invlpg,
1736 .tlb_flush = svm_flush_tlb,
1737 .inject_page_fault = svm_inject_page_fault,
1739 .inject_gp = svm_inject_gp,
1741 .run = svm_vcpu_run,
1742 .skip_emulated_instruction = skip_emulated_instruction,
1743 .vcpu_setup = svm_vcpu_setup,
1744 .patch_hypercall = svm_patch_hypercall,
1747 static int __init svm_init(void)
1749 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1752 static void __exit svm_exit(void)
1757 module_init(svm_init)
1758 module_exit(svm_exit)