2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
51 #if defined(MMU_DEBUG) || defined(AUDIT)
56 #define ASSERT(x) do { } while (0)
60 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
61 __FILE__, __LINE__, #x); \
65 #define PT64_PT_BITS 9
66 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
67 #define PT32_PT_BITS 10
68 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
70 #define PT_WRITABLE_SHIFT 1
72 #define PT_PRESENT_MASK (1ULL << 0)
73 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
74 #define PT_USER_MASK (1ULL << 2)
75 #define PT_PWT_MASK (1ULL << 3)
76 #define PT_PCD_MASK (1ULL << 4)
77 #define PT_ACCESSED_MASK (1ULL << 5)
78 #define PT_DIRTY_MASK (1ULL << 6)
79 #define PT_PAGE_SIZE_MASK (1ULL << 7)
80 #define PT_PAT_MASK (1ULL << 7)
81 #define PT_GLOBAL_MASK (1ULL << 8)
82 #define PT64_NX_MASK (1ULL << 63)
84 #define PT_PAT_SHIFT 7
85 #define PT_DIR_PAT_SHIFT 12
86 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
88 #define PT32_DIR_PSE36_SIZE 4
89 #define PT32_DIR_PSE36_SHIFT 13
90 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
93 #define PT32_PTE_COPY_MASK \
94 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
96 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
98 #define PT_FIRST_AVAIL_BITS_SHIFT 9
99 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
101 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
102 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
104 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
105 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
107 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
108 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
110 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
112 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
114 #define PT64_LEVEL_BITS 9
116 #define PT64_LEVEL_SHIFT(level) \
117 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
119 #define PT64_LEVEL_MASK(level) \
120 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
122 #define PT64_INDEX(address, level)\
123 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
126 #define PT32_LEVEL_BITS 10
128 #define PT32_LEVEL_SHIFT(level) \
129 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
131 #define PT32_LEVEL_MASK(level) \
132 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
134 #define PT32_INDEX(address, level)\
135 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
138 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
139 #define PT64_DIR_BASE_ADDR_MASK \
140 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
142 #define PT32_BASE_ADDR_MASK PAGE_MASK
143 #define PT32_DIR_BASE_ADDR_MASK \
144 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
147 #define PFERR_PRESENT_MASK (1U << 0)
148 #define PFERR_WRITE_MASK (1U << 1)
149 #define PFERR_USER_MASK (1U << 2)
150 #define PFERR_FETCH_MASK (1U << 4)
152 #define PT64_ROOT_LEVEL 4
153 #define PT32_ROOT_LEVEL 2
154 #define PT32E_ROOT_LEVEL 3
156 #define PT_DIRECTORY_LEVEL 2
157 #define PT_PAGE_TABLE_LEVEL 1
161 struct kvm_rmap_desc {
162 u64 *shadow_ptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
166 static struct kmem_cache *pte_chain_cache;
167 static struct kmem_cache *rmap_desc_cache;
169 static int is_write_protection(struct kvm_vcpu *vcpu)
171 return vcpu->cr0 & CR0_WP_MASK;
174 static int is_cpuid_PSE36(void)
179 static int is_nx(struct kvm_vcpu *vcpu)
181 return vcpu->shadow_efer & EFER_NX;
184 static int is_present_pte(unsigned long pte)
186 return pte & PT_PRESENT_MASK;
189 static int is_writeble_pte(unsigned long pte)
191 return pte & PT_WRITABLE_MASK;
194 static int is_io_pte(unsigned long pte)
196 return pte & PT_SHADOW_IO_MARK;
199 static int is_rmap_pte(u64 pte)
201 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
202 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
205 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
206 struct kmem_cache *base_cache, int min,
211 if (cache->nobjs >= min)
213 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
214 obj = kmem_cache_zalloc(base_cache, gfp_flags);
217 cache->objects[cache->nobjs++] = obj;
222 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
225 kfree(mc->objects[--mc->nobjs]);
228 static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
232 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
233 pte_chain_cache, 4, gfp_flags);
236 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
237 rmap_desc_cache, 1, gfp_flags);
242 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
246 r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
248 spin_unlock(&vcpu->kvm->lock);
249 kvm_arch_ops->vcpu_put(vcpu);
250 r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
251 kvm_arch_ops->vcpu_load(vcpu);
252 spin_lock(&vcpu->kvm->lock);
257 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
259 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
260 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
263 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
269 p = mc->objects[--mc->nobjs];
274 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
276 if (mc->nobjs < KVM_NR_MEM_OBJS)
277 mc->objects[mc->nobjs++] = obj;
282 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
284 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
285 sizeof(struct kvm_pte_chain));
288 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
289 struct kvm_pte_chain *pc)
291 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
294 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
296 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
297 sizeof(struct kvm_rmap_desc));
300 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
301 struct kvm_rmap_desc *rd)
303 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
307 * Reverse mapping data structures:
309 * If page->private bit zero is zero, then page->private points to the
310 * shadow page table entry that points to page_address(page).
312 * If page->private bit zero is one, (then page->private & ~1) points
313 * to a struct kvm_rmap_desc containing more mappings.
315 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
318 struct kvm_rmap_desc *desc;
321 if (!is_rmap_pte(*spte))
323 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
324 if (!page_private(page)) {
325 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
326 set_page_private(page,(unsigned long)spte);
327 } else if (!(page_private(page) & 1)) {
328 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
329 desc = mmu_alloc_rmap_desc(vcpu);
330 desc->shadow_ptes[0] = (u64 *)page_private(page);
331 desc->shadow_ptes[1] = spte;
332 set_page_private(page,(unsigned long)desc | 1);
334 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
335 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
336 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
338 if (desc->shadow_ptes[RMAP_EXT-1]) {
339 desc->more = mmu_alloc_rmap_desc(vcpu);
342 for (i = 0; desc->shadow_ptes[i]; ++i)
344 desc->shadow_ptes[i] = spte;
348 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
350 struct kvm_rmap_desc *desc,
352 struct kvm_rmap_desc *prev_desc)
356 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
358 desc->shadow_ptes[i] = desc->shadow_ptes[j];
359 desc->shadow_ptes[j] = NULL;
362 if (!prev_desc && !desc->more)
363 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
366 prev_desc->more = desc->more;
368 set_page_private(page,(unsigned long)desc->more | 1);
369 mmu_free_rmap_desc(vcpu, desc);
372 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
375 struct kvm_rmap_desc *desc;
376 struct kvm_rmap_desc *prev_desc;
379 if (!is_rmap_pte(*spte))
381 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
382 if (!page_private(page)) {
383 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
385 } else if (!(page_private(page) & 1)) {
386 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
387 if ((u64 *)page_private(page) != spte) {
388 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
392 set_page_private(page,0);
394 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
395 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
398 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
399 if (desc->shadow_ptes[i] == spte) {
400 rmap_desc_remove_entry(vcpu, page,
412 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
414 struct kvm *kvm = vcpu->kvm;
416 struct kvm_rmap_desc *desc;
419 page = gfn_to_page(kvm, gfn);
422 while (page_private(page)) {
423 if (!(page_private(page) & 1))
424 spte = (u64 *)page_private(page);
426 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
427 spte = desc->shadow_ptes[0];
430 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
431 != page_to_pfn(page));
432 BUG_ON(!(*spte & PT_PRESENT_MASK));
433 BUG_ON(!(*spte & PT_WRITABLE_MASK));
434 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
435 rmap_remove(vcpu, spte);
436 kvm_arch_ops->tlb_flush(vcpu);
437 *spte &= ~(u64)PT_WRITABLE_MASK;
442 static int is_empty_shadow_page(hpa_t page_hpa)
447 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
450 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
458 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu,
459 struct kvm_mmu_page *page_head)
461 ASSERT(is_empty_shadow_page(page_head->page_hpa));
462 list_move(&page_head->link, &vcpu->free_pages);
463 ++vcpu->kvm->n_free_mmu_pages;
466 static unsigned kvm_page_table_hashfn(gfn_t gfn)
471 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
474 struct kvm_mmu_page *page;
476 if (list_empty(&vcpu->free_pages))
479 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
480 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
481 ASSERT(is_empty_shadow_page(page->page_hpa));
482 page->slot_bitmap = 0;
483 page->multimapped = 0;
484 page->parent_pte = parent_pte;
485 --vcpu->kvm->n_free_mmu_pages;
489 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
490 struct kvm_mmu_page *page, u64 *parent_pte)
492 struct kvm_pte_chain *pte_chain;
493 struct hlist_node *node;
498 if (!page->multimapped) {
499 u64 *old = page->parent_pte;
502 page->parent_pte = parent_pte;
505 page->multimapped = 1;
506 pte_chain = mmu_alloc_pte_chain(vcpu);
507 INIT_HLIST_HEAD(&page->parent_ptes);
508 hlist_add_head(&pte_chain->link, &page->parent_ptes);
509 pte_chain->parent_ptes[0] = old;
511 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
512 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
514 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
515 if (!pte_chain->parent_ptes[i]) {
516 pte_chain->parent_ptes[i] = parent_pte;
520 pte_chain = mmu_alloc_pte_chain(vcpu);
522 hlist_add_head(&pte_chain->link, &page->parent_ptes);
523 pte_chain->parent_ptes[0] = parent_pte;
526 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
527 struct kvm_mmu_page *page,
530 struct kvm_pte_chain *pte_chain;
531 struct hlist_node *node;
534 if (!page->multimapped) {
535 BUG_ON(page->parent_pte != parent_pte);
536 page->parent_pte = NULL;
539 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
540 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
541 if (!pte_chain->parent_ptes[i])
543 if (pte_chain->parent_ptes[i] != parent_pte)
545 while (i + 1 < NR_PTE_CHAIN_ENTRIES
546 && pte_chain->parent_ptes[i + 1]) {
547 pte_chain->parent_ptes[i]
548 = pte_chain->parent_ptes[i + 1];
551 pte_chain->parent_ptes[i] = NULL;
553 hlist_del(&pte_chain->link);
554 mmu_free_pte_chain(vcpu, pte_chain);
555 if (hlist_empty(&page->parent_ptes)) {
556 page->multimapped = 0;
557 page->parent_pte = NULL;
565 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
569 struct hlist_head *bucket;
570 struct kvm_mmu_page *page;
571 struct hlist_node *node;
573 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
574 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
575 bucket = &vcpu->kvm->mmu_page_hash[index];
576 hlist_for_each_entry(page, node, bucket, hash_link)
577 if (page->gfn == gfn && !page->role.metaphysical) {
578 pgprintk("%s: found role %x\n",
579 __FUNCTION__, page->role.word);
585 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
590 unsigned hugepage_access,
593 union kvm_mmu_page_role role;
596 struct hlist_head *bucket;
597 struct kvm_mmu_page *page;
598 struct hlist_node *node;
601 role.glevels = vcpu->mmu.root_level;
603 role.metaphysical = metaphysical;
604 role.hugepage_access = hugepage_access;
605 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
606 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
607 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
608 role.quadrant = quadrant;
610 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
612 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
613 bucket = &vcpu->kvm->mmu_page_hash[index];
614 hlist_for_each_entry(page, node, bucket, hash_link)
615 if (page->gfn == gfn && page->role.word == role.word) {
616 mmu_page_add_parent_pte(vcpu, page, parent_pte);
617 pgprintk("%s: found\n", __FUNCTION__);
620 page = kvm_mmu_alloc_page(vcpu, parent_pte);
623 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
626 hlist_add_head(&page->hash_link, bucket);
628 rmap_write_protect(vcpu, gfn);
632 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
633 struct kvm_mmu_page *page)
639 pt = __va(page->page_hpa);
641 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
642 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
643 if (pt[i] & PT_PRESENT_MASK)
644 rmap_remove(vcpu, &pt[i]);
647 kvm_arch_ops->tlb_flush(vcpu);
651 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
655 if (!(ent & PT_PRESENT_MASK))
657 ent &= PT64_BASE_ADDR_MASK;
658 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
662 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
663 struct kvm_mmu_page *page,
666 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
669 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
670 struct kvm_mmu_page *page)
674 while (page->multimapped || page->parent_pte) {
675 if (!page->multimapped)
676 parent_pte = page->parent_pte;
678 struct kvm_pte_chain *chain;
680 chain = container_of(page->parent_ptes.first,
681 struct kvm_pte_chain, link);
682 parent_pte = chain->parent_ptes[0];
685 kvm_mmu_put_page(vcpu, page, parent_pte);
688 kvm_mmu_page_unlink_children(vcpu, page);
689 if (!page->root_count) {
690 hlist_del(&page->hash_link);
691 kvm_mmu_free_page(vcpu, page);
693 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
696 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
699 struct hlist_head *bucket;
700 struct kvm_mmu_page *page;
701 struct hlist_node *node, *n;
704 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
706 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
707 bucket = &vcpu->kvm->mmu_page_hash[index];
708 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
709 if (page->gfn == gfn && !page->role.metaphysical) {
710 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
712 kvm_mmu_zap_page(vcpu, page);
718 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
720 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
721 struct kvm_mmu_page *page_head = page_header(__pa(pte));
723 __set_bit(slot, &page_head->slot_bitmap);
726 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
728 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
730 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
733 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
737 ASSERT((gpa & HPA_ERR_MASK) == 0);
738 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
740 return gpa | HPA_ERR_MASK;
741 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
742 | (gpa & (PAGE_SIZE-1));
745 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
747 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
749 if (gpa == UNMAPPED_GVA)
751 return gpa_to_hpa(vcpu, gpa);
754 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
756 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
758 if (gpa == UNMAPPED_GVA)
760 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
763 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
767 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
769 int level = PT32E_ROOT_LEVEL;
770 hpa_t table_addr = vcpu->mmu.root_hpa;
773 u32 index = PT64_INDEX(v, level);
777 ASSERT(VALID_PAGE(table_addr));
778 table = __va(table_addr);
782 if (is_present_pte(pte) && is_writeble_pte(pte))
784 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
785 page_header_update_slot(vcpu->kvm, table, v);
786 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
788 rmap_add(vcpu, &table[index]);
792 if (table[index] == 0) {
793 struct kvm_mmu_page *new_table;
796 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
798 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
800 1, 0, &table[index]);
802 pgprintk("nonpaging_map: ENOMEM\n");
806 table[index] = new_table->page_hpa | PT_PRESENT_MASK
807 | PT_WRITABLE_MASK | PT_USER_MASK;
809 table_addr = table[index] & PT64_BASE_ADDR_MASK;
813 static void mmu_free_roots(struct kvm_vcpu *vcpu)
816 struct kvm_mmu_page *page;
819 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
820 hpa_t root = vcpu->mmu.root_hpa;
822 ASSERT(VALID_PAGE(root));
823 page = page_header(root);
825 vcpu->mmu.root_hpa = INVALID_PAGE;
829 for (i = 0; i < 4; ++i) {
830 hpa_t root = vcpu->mmu.pae_root[i];
833 ASSERT(VALID_PAGE(root));
834 root &= PT64_BASE_ADDR_MASK;
835 page = page_header(root);
838 vcpu->mmu.pae_root[i] = INVALID_PAGE;
840 vcpu->mmu.root_hpa = INVALID_PAGE;
843 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
847 struct kvm_mmu_page *page;
849 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
852 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
853 hpa_t root = vcpu->mmu.root_hpa;
855 ASSERT(!VALID_PAGE(root));
856 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
857 PT64_ROOT_LEVEL, 0, 0, NULL);
858 root = page->page_hpa;
860 vcpu->mmu.root_hpa = root;
864 for (i = 0; i < 4; ++i) {
865 hpa_t root = vcpu->mmu.pae_root[i];
867 ASSERT(!VALID_PAGE(root));
868 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
869 if (!is_present_pte(vcpu->pdptrs[i])) {
870 vcpu->mmu.pae_root[i] = 0;
873 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
874 } else if (vcpu->mmu.root_level == 0)
876 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
877 PT32_ROOT_LEVEL, !is_paging(vcpu),
879 root = page->page_hpa;
881 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
883 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
886 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
891 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
898 r = mmu_topup_memory_caches(vcpu);
903 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
906 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
908 if (is_error_hpa(paddr))
911 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
914 static void nonpaging_free(struct kvm_vcpu *vcpu)
916 mmu_free_roots(vcpu);
919 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
921 struct kvm_mmu *context = &vcpu->mmu;
923 context->new_cr3 = nonpaging_new_cr3;
924 context->page_fault = nonpaging_page_fault;
925 context->gva_to_gpa = nonpaging_gva_to_gpa;
926 context->free = nonpaging_free;
927 context->root_level = 0;
928 context->shadow_root_level = PT32E_ROOT_LEVEL;
929 mmu_alloc_roots(vcpu);
930 ASSERT(VALID_PAGE(context->root_hpa));
931 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
935 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
937 ++vcpu->stat.tlb_flush;
938 kvm_arch_ops->tlb_flush(vcpu);
941 static void paging_new_cr3(struct kvm_vcpu *vcpu)
943 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
944 mmu_free_roots(vcpu);
945 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
946 kvm_mmu_free_some_pages(vcpu);
947 mmu_alloc_roots(vcpu);
948 kvm_mmu_flush_tlb(vcpu);
949 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
952 static inline void set_pte_common(struct kvm_vcpu *vcpu,
961 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
963 access_bits &= ~PT_WRITABLE_MASK;
965 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
967 *shadow_pte |= access_bits;
969 if (is_error_hpa(paddr)) {
970 *shadow_pte |= gaddr;
971 *shadow_pte |= PT_SHADOW_IO_MARK;
972 *shadow_pte &= ~PT_PRESENT_MASK;
976 *shadow_pte |= paddr;
978 if (access_bits & PT_WRITABLE_MASK) {
979 struct kvm_mmu_page *shadow;
981 shadow = kvm_mmu_lookup_page(vcpu, gfn);
983 pgprintk("%s: found shadow page for %lx, marking ro\n",
985 access_bits &= ~PT_WRITABLE_MASK;
986 if (is_writeble_pte(*shadow_pte)) {
987 *shadow_pte &= ~PT_WRITABLE_MASK;
988 kvm_arch_ops->tlb_flush(vcpu);
993 if (access_bits & PT_WRITABLE_MASK)
994 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
996 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
997 rmap_add(vcpu, shadow_pte);
1000 static void inject_page_fault(struct kvm_vcpu *vcpu,
1004 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
1007 static inline int fix_read_pf(u64 *shadow_ent)
1009 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
1010 !(*shadow_ent & PT_USER_MASK)) {
1012 * If supervisor write protect is disabled, we shadow kernel
1013 * pages as user pages so we can trap the write access.
1015 *shadow_ent |= PT_USER_MASK;
1016 *shadow_ent &= ~PT_WRITABLE_MASK;
1024 static void paging_free(struct kvm_vcpu *vcpu)
1026 nonpaging_free(vcpu);
1030 #include "paging_tmpl.h"
1034 #include "paging_tmpl.h"
1037 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1039 struct kvm_mmu *context = &vcpu->mmu;
1041 ASSERT(is_pae(vcpu));
1042 context->new_cr3 = paging_new_cr3;
1043 context->page_fault = paging64_page_fault;
1044 context->gva_to_gpa = paging64_gva_to_gpa;
1045 context->free = paging_free;
1046 context->root_level = level;
1047 context->shadow_root_level = level;
1048 mmu_alloc_roots(vcpu);
1049 ASSERT(VALID_PAGE(context->root_hpa));
1050 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1051 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1055 static int paging64_init_context(struct kvm_vcpu *vcpu)
1057 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1060 static int paging32_init_context(struct kvm_vcpu *vcpu)
1062 struct kvm_mmu *context = &vcpu->mmu;
1064 context->new_cr3 = paging_new_cr3;
1065 context->page_fault = paging32_page_fault;
1066 context->gva_to_gpa = paging32_gva_to_gpa;
1067 context->free = paging_free;
1068 context->root_level = PT32_ROOT_LEVEL;
1069 context->shadow_root_level = PT32E_ROOT_LEVEL;
1070 mmu_alloc_roots(vcpu);
1071 ASSERT(VALID_PAGE(context->root_hpa));
1072 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1073 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1077 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1079 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1082 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1085 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1087 if (!is_paging(vcpu))
1088 return nonpaging_init_context(vcpu);
1089 else if (is_long_mode(vcpu))
1090 return paging64_init_context(vcpu);
1091 else if (is_pae(vcpu))
1092 return paging32E_init_context(vcpu);
1094 return paging32_init_context(vcpu);
1097 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1100 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1101 vcpu->mmu.free(vcpu);
1102 vcpu->mmu.root_hpa = INVALID_PAGE;
1106 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1110 destroy_kvm_mmu(vcpu);
1111 r = init_kvm_mmu(vcpu);
1114 r = mmu_topup_memory_caches(vcpu);
1119 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1120 struct kvm_mmu_page *page,
1124 struct kvm_mmu_page *child;
1127 if (is_present_pte(pte)) {
1128 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1129 rmap_remove(vcpu, spte);
1131 child = page_header(pte & PT64_BASE_ADDR_MASK);
1132 mmu_page_remove_parent_pte(vcpu, child, spte);
1138 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1139 struct kvm_mmu_page *page,
1141 const void *new, int bytes)
1143 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1146 if (page->role.glevels == PT32_ROOT_LEVEL)
1147 paging32_update_pte(vcpu, page, spte, new, bytes);
1149 paging64_update_pte(vcpu, page, spte, new, bytes);
1152 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1153 const u8 *old, const u8 *new, int bytes)
1155 gfn_t gfn = gpa >> PAGE_SHIFT;
1156 struct kvm_mmu_page *page;
1157 struct hlist_node *node, *n;
1158 struct hlist_head *bucket;
1161 unsigned offset = offset_in_page(gpa);
1163 unsigned page_offset;
1164 unsigned misaligned;
1170 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1171 if (gfn == vcpu->last_pt_write_gfn) {
1172 ++vcpu->last_pt_write_count;
1173 if (vcpu->last_pt_write_count >= 3)
1176 vcpu->last_pt_write_gfn = gfn;
1177 vcpu->last_pt_write_count = 1;
1179 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1180 bucket = &vcpu->kvm->mmu_page_hash[index];
1181 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1182 if (page->gfn != gfn || page->role.metaphysical)
1184 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1185 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1186 misaligned |= bytes < 4;
1187 if (misaligned || flooded) {
1189 * Misaligned accesses are too much trouble to fix
1190 * up; also, they usually indicate a page is not used
1193 * If we're seeing too many writes to a page,
1194 * it may no longer be a page table, or we may be
1195 * forking, in which case it is better to unmap the
1198 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1199 gpa, bytes, page->role.word);
1200 kvm_mmu_zap_page(vcpu, page);
1203 page_offset = offset;
1204 level = page->role.level;
1206 if (page->role.glevels == PT32_ROOT_LEVEL) {
1207 page_offset <<= 1; /* 32->64 */
1209 * A 32-bit pde maps 4MB while the shadow pdes map
1210 * only 2MB. So we need to double the offset again
1211 * and zap two pdes instead of one.
1213 if (level == PT32_ROOT_LEVEL) {
1214 page_offset &= ~7; /* kill rounding error */
1218 quadrant = page_offset >> PAGE_SHIFT;
1219 page_offset &= ~PAGE_MASK;
1220 if (quadrant != page->role.quadrant)
1223 spte = __va(page->page_hpa);
1224 spte += page_offset / sizeof(*spte);
1226 mmu_pte_write_zap_pte(vcpu, page, spte);
1227 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
1233 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1235 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1237 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1240 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1242 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1243 struct kvm_mmu_page *page;
1245 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1246 struct kvm_mmu_page, link);
1247 kvm_mmu_zap_page(vcpu, page);
1250 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1252 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1254 struct kvm_mmu_page *page;
1256 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1257 page = container_of(vcpu->kvm->active_mmu_pages.next,
1258 struct kvm_mmu_page, link);
1259 kvm_mmu_zap_page(vcpu, page);
1261 while (!list_empty(&vcpu->free_pages)) {
1262 page = list_entry(vcpu->free_pages.next,
1263 struct kvm_mmu_page, link);
1264 list_del(&page->link);
1265 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1266 page->page_hpa = INVALID_PAGE;
1268 free_page((unsigned long)vcpu->mmu.pae_root);
1271 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1278 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1279 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1281 INIT_LIST_HEAD(&page_header->link);
1282 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1284 set_page_private(page, (unsigned long)page_header);
1285 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1286 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1287 list_add(&page_header->link, &vcpu->free_pages);
1288 ++vcpu->kvm->n_free_mmu_pages;
1292 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1293 * Therefore we need to allocate shadow page tables in the first
1294 * 4GB of memory, which happens to fit the DMA32 zone.
1296 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1299 vcpu->mmu.pae_root = page_address(page);
1300 for (i = 0; i < 4; ++i)
1301 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1306 free_mmu_pages(vcpu);
1310 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1313 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1314 ASSERT(list_empty(&vcpu->free_pages));
1316 return alloc_mmu_pages(vcpu);
1319 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1322 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1323 ASSERT(!list_empty(&vcpu->free_pages));
1325 return init_kvm_mmu(vcpu);
1328 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1332 destroy_kvm_mmu(vcpu);
1333 free_mmu_pages(vcpu);
1334 mmu_free_memory_caches(vcpu);
1337 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1339 struct kvm *kvm = vcpu->kvm;
1340 struct kvm_mmu_page *page;
1342 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1346 if (!test_bit(slot, &page->slot_bitmap))
1349 pt = __va(page->page_hpa);
1350 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1352 if (pt[i] & PT_WRITABLE_MASK) {
1353 rmap_remove(vcpu, &pt[i]);
1354 pt[i] &= ~PT_WRITABLE_MASK;
1359 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1361 destroy_kvm_mmu(vcpu);
1363 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1364 struct kvm_mmu_page *page;
1366 page = container_of(vcpu->kvm->active_mmu_pages.next,
1367 struct kvm_mmu_page, link);
1368 kvm_mmu_zap_page(vcpu, page);
1371 mmu_free_memory_caches(vcpu);
1372 kvm_arch_ops->tlb_flush(vcpu);
1376 void kvm_mmu_module_exit(void)
1378 if (pte_chain_cache)
1379 kmem_cache_destroy(pte_chain_cache);
1380 if (rmap_desc_cache)
1381 kmem_cache_destroy(rmap_desc_cache);
1384 int kvm_mmu_module_init(void)
1386 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1387 sizeof(struct kvm_pte_chain),
1389 if (!pte_chain_cache)
1391 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1392 sizeof(struct kvm_rmap_desc),
1394 if (!rmap_desc_cache)
1400 kvm_mmu_module_exit();
1406 static const char *audit_msg;
1408 static gva_t canonicalize(gva_t gva)
1410 #ifdef CONFIG_X86_64
1411 gva = (long long)(gva << 16) >> 16;
1416 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1417 gva_t va, int level)
1419 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1421 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1423 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1426 if (!(ent & PT_PRESENT_MASK))
1429 va = canonicalize(va);
1431 audit_mappings_page(vcpu, ent, va, level - 1);
1433 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1434 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1436 if ((ent & PT_PRESENT_MASK)
1437 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1438 printk(KERN_ERR "audit error: (%s) levels %d"
1439 " gva %lx gpa %llx hpa %llx ent %llx\n",
1440 audit_msg, vcpu->mmu.root_level,
1446 static void audit_mappings(struct kvm_vcpu *vcpu)
1450 if (vcpu->mmu.root_level == 4)
1451 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1453 for (i = 0; i < 4; ++i)
1454 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1455 audit_mappings_page(vcpu,
1456 vcpu->mmu.pae_root[i],
1461 static int count_rmaps(struct kvm_vcpu *vcpu)
1466 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1467 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1468 struct kvm_rmap_desc *d;
1470 for (j = 0; j < m->npages; ++j) {
1471 struct page *page = m->phys_mem[j];
1475 if (!(page->private & 1)) {
1479 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1481 for (k = 0; k < RMAP_EXT; ++k)
1482 if (d->shadow_ptes[k])
1493 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1496 struct kvm_mmu_page *page;
1499 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1500 u64 *pt = __va(page->page_hpa);
1502 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1505 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1508 if (!(ent & PT_PRESENT_MASK))
1510 if (!(ent & PT_WRITABLE_MASK))
1518 static void audit_rmap(struct kvm_vcpu *vcpu)
1520 int n_rmap = count_rmaps(vcpu);
1521 int n_actual = count_writable_mappings(vcpu);
1523 if (n_rmap != n_actual)
1524 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1525 __FUNCTION__, audit_msg, n_rmap, n_actual);
1528 static void audit_write_protection(struct kvm_vcpu *vcpu)
1530 struct kvm_mmu_page *page;
1532 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1536 if (page->role.metaphysical)
1539 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1541 pg = pfn_to_page(hfn);
1543 printk(KERN_ERR "%s: (%s) shadow page has writable"
1544 " mappings: gfn %lx role %x\n",
1545 __FUNCTION__, audit_msg, page->gfn,
1550 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1557 audit_write_protection(vcpu);
1558 audit_mappings(vcpu);