2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
51 #if defined(MMU_DEBUG) || defined(AUDIT)
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
66 #define PT_WRITABLE_SHIFT 1
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
110 #define PT64_LEVEL_BITS 9
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
122 #define PT32_LEVEL_BITS 10
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
162 static int is_write_protection(struct kvm_vcpu *vcpu)
164 return vcpu->cr0 & CR0_WP_MASK;
167 static int is_cpuid_PSE36(void)
172 static int is_nx(struct kvm_vcpu *vcpu)
174 return vcpu->shadow_efer & EFER_NX;
177 static int is_present_pte(unsigned long pte)
179 return pte & PT_PRESENT_MASK;
182 static int is_writeble_pte(unsigned long pte)
184 return pte & PT_WRITABLE_MASK;
187 static int is_io_pte(unsigned long pte)
189 return pte & PT_SHADOW_IO_MARK;
192 static int is_rmap_pte(u64 pte)
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
203 if (cache->nobjs >= min)
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
209 cache->objects[cache->nobjs++] = obj;
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
217 kfree(mc->objects[--mc->nobjs]);
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
246 p = mc->objects[--mc->nobjs];
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
284 * Reverse mapping data structures:
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
295 struct kvm_rmap_desc *desc;
298 if (!is_rmap_pte(*spte))
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
319 for (i = 0; desc->shadow_ptes[i]; ++i)
321 desc->shadow_ptes[i] = spte;
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
327 struct kvm_rmap_desc *desc,
329 struct kvm_rmap_desc *prev_desc)
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
343 prev_desc->more = desc->more;
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
356 if (!is_rmap_pte(*spte))
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
369 set_page_private(page,0);
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
391 struct kvm *kvm = vcpu->kvm;
393 struct kvm_rmap_desc *desc;
396 page = gfn_to_page(kvm, gfn);
399 while (page_private(page)) {
400 if (!(page_private(page) & 1))
401 spte = (u64 *)page_private(page);
403 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
404 spte = desc->shadow_ptes[0];
407 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
408 != page_to_pfn(page));
409 BUG_ON(!(*spte & PT_PRESENT_MASK));
410 BUG_ON(!(*spte & PT_WRITABLE_MASK));
411 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
412 rmap_remove(vcpu, spte);
413 kvm_arch_ops->tlb_flush(vcpu);
414 *spte &= ~(u64)PT_WRITABLE_MASK;
418 static int is_empty_shadow_page(hpa_t page_hpa)
423 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
426 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
433 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
435 struct kvm_mmu_page *page_head = page_header(page_hpa);
437 ASSERT(is_empty_shadow_page(page_hpa));
438 page_head->page_hpa = page_hpa;
439 list_move(&page_head->link, &vcpu->free_pages);
440 ++vcpu->kvm->n_free_mmu_pages;
443 static unsigned kvm_page_table_hashfn(gfn_t gfn)
448 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
451 struct kvm_mmu_page *page;
453 if (list_empty(&vcpu->free_pages))
456 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
457 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
458 ASSERT(is_empty_shadow_page(page->page_hpa));
459 page->slot_bitmap = 0;
460 page->multimapped = 0;
461 page->parent_pte = parent_pte;
462 --vcpu->kvm->n_free_mmu_pages;
466 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
467 struct kvm_mmu_page *page, u64 *parent_pte)
469 struct kvm_pte_chain *pte_chain;
470 struct hlist_node *node;
475 if (!page->multimapped) {
476 u64 *old = page->parent_pte;
479 page->parent_pte = parent_pte;
482 page->multimapped = 1;
483 pte_chain = mmu_alloc_pte_chain(vcpu);
484 INIT_HLIST_HEAD(&page->parent_ptes);
485 hlist_add_head(&pte_chain->link, &page->parent_ptes);
486 pte_chain->parent_ptes[0] = old;
488 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
489 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
491 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
492 if (!pte_chain->parent_ptes[i]) {
493 pte_chain->parent_ptes[i] = parent_pte;
497 pte_chain = mmu_alloc_pte_chain(vcpu);
499 hlist_add_head(&pte_chain->link, &page->parent_ptes);
500 pte_chain->parent_ptes[0] = parent_pte;
503 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
504 struct kvm_mmu_page *page,
507 struct kvm_pte_chain *pte_chain;
508 struct hlist_node *node;
511 if (!page->multimapped) {
512 BUG_ON(page->parent_pte != parent_pte);
513 page->parent_pte = NULL;
516 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
517 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
518 if (!pte_chain->parent_ptes[i])
520 if (pte_chain->parent_ptes[i] != parent_pte)
522 while (i + 1 < NR_PTE_CHAIN_ENTRIES
523 && pte_chain->parent_ptes[i + 1]) {
524 pte_chain->parent_ptes[i]
525 = pte_chain->parent_ptes[i + 1];
528 pte_chain->parent_ptes[i] = NULL;
530 hlist_del(&pte_chain->link);
531 mmu_free_pte_chain(vcpu, pte_chain);
532 if (hlist_empty(&page->parent_ptes)) {
533 page->multimapped = 0;
534 page->parent_pte = NULL;
542 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
546 struct hlist_head *bucket;
547 struct kvm_mmu_page *page;
548 struct hlist_node *node;
550 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
551 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
552 bucket = &vcpu->kvm->mmu_page_hash[index];
553 hlist_for_each_entry(page, node, bucket, hash_link)
554 if (page->gfn == gfn && !page->role.metaphysical) {
555 pgprintk("%s: found role %x\n",
556 __FUNCTION__, page->role.word);
562 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
567 unsigned hugepage_access,
570 union kvm_mmu_page_role role;
573 struct hlist_head *bucket;
574 struct kvm_mmu_page *page;
575 struct hlist_node *node;
578 role.glevels = vcpu->mmu.root_level;
580 role.metaphysical = metaphysical;
581 role.hugepage_access = hugepage_access;
582 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
583 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
584 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
585 role.quadrant = quadrant;
587 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
589 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
590 bucket = &vcpu->kvm->mmu_page_hash[index];
591 hlist_for_each_entry(page, node, bucket, hash_link)
592 if (page->gfn == gfn && page->role.word == role.word) {
593 mmu_page_add_parent_pte(vcpu, page, parent_pte);
594 pgprintk("%s: found\n", __FUNCTION__);
597 page = kvm_mmu_alloc_page(vcpu, parent_pte);
600 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
603 hlist_add_head(&page->hash_link, bucket);
605 rmap_write_protect(vcpu, gfn);
609 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
610 struct kvm_mmu_page *page)
616 pt = __va(page->page_hpa);
618 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
619 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
620 if (pt[i] & PT_PRESENT_MASK)
621 rmap_remove(vcpu, &pt[i]);
624 kvm_arch_ops->tlb_flush(vcpu);
628 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
632 if (!(ent & PT_PRESENT_MASK))
634 ent &= PT64_BASE_ADDR_MASK;
635 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
639 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
640 struct kvm_mmu_page *page,
643 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
646 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
647 struct kvm_mmu_page *page)
651 while (page->multimapped || page->parent_pte) {
652 if (!page->multimapped)
653 parent_pte = page->parent_pte;
655 struct kvm_pte_chain *chain;
657 chain = container_of(page->parent_ptes.first,
658 struct kvm_pte_chain, link);
659 parent_pte = chain->parent_ptes[0];
662 kvm_mmu_put_page(vcpu, page, parent_pte);
665 kvm_mmu_page_unlink_children(vcpu, page);
666 if (!page->root_count) {
667 hlist_del(&page->hash_link);
668 kvm_mmu_free_page(vcpu, page->page_hpa);
670 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
673 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
676 struct hlist_head *bucket;
677 struct kvm_mmu_page *page;
678 struct hlist_node *node, *n;
681 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
683 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
684 bucket = &vcpu->kvm->mmu_page_hash[index];
685 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
686 if (page->gfn == gfn && !page->role.metaphysical) {
687 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
689 kvm_mmu_zap_page(vcpu, page);
695 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
697 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
698 struct kvm_mmu_page *page_head = page_header(__pa(pte));
700 __set_bit(slot, &page_head->slot_bitmap);
703 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
705 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
707 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
710 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
714 ASSERT((gpa & HPA_ERR_MASK) == 0);
715 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
717 return gpa | HPA_ERR_MASK;
718 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
719 | (gpa & (PAGE_SIZE-1));
722 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
724 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
726 if (gpa == UNMAPPED_GVA)
728 return gpa_to_hpa(vcpu, gpa);
731 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
733 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
735 if (gpa == UNMAPPED_GVA)
737 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
740 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
744 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
746 int level = PT32E_ROOT_LEVEL;
747 hpa_t table_addr = vcpu->mmu.root_hpa;
750 u32 index = PT64_INDEX(v, level);
754 ASSERT(VALID_PAGE(table_addr));
755 table = __va(table_addr);
759 if (is_present_pte(pte) && is_writeble_pte(pte))
761 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
762 page_header_update_slot(vcpu->kvm, table, v);
763 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
765 rmap_add(vcpu, &table[index]);
769 if (table[index] == 0) {
770 struct kvm_mmu_page *new_table;
773 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
775 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
777 1, 0, &table[index]);
779 pgprintk("nonpaging_map: ENOMEM\n");
783 table[index] = new_table->page_hpa | PT_PRESENT_MASK
784 | PT_WRITABLE_MASK | PT_USER_MASK;
786 table_addr = table[index] & PT64_BASE_ADDR_MASK;
790 static void mmu_free_roots(struct kvm_vcpu *vcpu)
793 struct kvm_mmu_page *page;
796 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
797 hpa_t root = vcpu->mmu.root_hpa;
799 ASSERT(VALID_PAGE(root));
800 page = page_header(root);
802 vcpu->mmu.root_hpa = INVALID_PAGE;
806 for (i = 0; i < 4; ++i) {
807 hpa_t root = vcpu->mmu.pae_root[i];
810 ASSERT(VALID_PAGE(root));
811 root &= PT64_BASE_ADDR_MASK;
812 page = page_header(root);
815 vcpu->mmu.pae_root[i] = INVALID_PAGE;
817 vcpu->mmu.root_hpa = INVALID_PAGE;
820 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
824 struct kvm_mmu_page *page;
826 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
829 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
830 hpa_t root = vcpu->mmu.root_hpa;
832 ASSERT(!VALID_PAGE(root));
833 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
834 PT64_ROOT_LEVEL, 0, 0, NULL);
835 root = page->page_hpa;
837 vcpu->mmu.root_hpa = root;
841 for (i = 0; i < 4; ++i) {
842 hpa_t root = vcpu->mmu.pae_root[i];
844 ASSERT(!VALID_PAGE(root));
845 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
846 if (!is_present_pte(vcpu->pdptrs[i])) {
847 vcpu->mmu.pae_root[i] = 0;
850 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
851 } else if (vcpu->mmu.root_level == 0)
853 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
854 PT32_ROOT_LEVEL, !is_paging(vcpu),
856 root = page->page_hpa;
858 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
860 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
863 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
868 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
875 r = mmu_topup_memory_caches(vcpu);
880 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
883 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
885 if (is_error_hpa(paddr))
888 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
891 static void nonpaging_free(struct kvm_vcpu *vcpu)
893 mmu_free_roots(vcpu);
896 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
898 struct kvm_mmu *context = &vcpu->mmu;
900 context->new_cr3 = nonpaging_new_cr3;
901 context->page_fault = nonpaging_page_fault;
902 context->gva_to_gpa = nonpaging_gva_to_gpa;
903 context->free = nonpaging_free;
904 context->root_level = 0;
905 context->shadow_root_level = PT32E_ROOT_LEVEL;
906 mmu_alloc_roots(vcpu);
907 ASSERT(VALID_PAGE(context->root_hpa));
908 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
912 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
914 ++kvm_stat.tlb_flush;
915 kvm_arch_ops->tlb_flush(vcpu);
918 static void paging_new_cr3(struct kvm_vcpu *vcpu)
920 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
921 mmu_free_roots(vcpu);
922 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
923 kvm_mmu_free_some_pages(vcpu);
924 mmu_alloc_roots(vcpu);
925 kvm_mmu_flush_tlb(vcpu);
926 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
929 static inline void set_pte_common(struct kvm_vcpu *vcpu,
938 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
940 access_bits &= ~PT_WRITABLE_MASK;
942 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
944 *shadow_pte |= access_bits;
946 if (is_error_hpa(paddr)) {
947 *shadow_pte |= gaddr;
948 *shadow_pte |= PT_SHADOW_IO_MARK;
949 *shadow_pte &= ~PT_PRESENT_MASK;
953 *shadow_pte |= paddr;
955 if (access_bits & PT_WRITABLE_MASK) {
956 struct kvm_mmu_page *shadow;
958 shadow = kvm_mmu_lookup_page(vcpu, gfn);
960 pgprintk("%s: found shadow page for %lx, marking ro\n",
962 access_bits &= ~PT_WRITABLE_MASK;
963 if (is_writeble_pte(*shadow_pte)) {
964 *shadow_pte &= ~PT_WRITABLE_MASK;
965 kvm_arch_ops->tlb_flush(vcpu);
970 if (access_bits & PT_WRITABLE_MASK)
971 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
973 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
974 rmap_add(vcpu, shadow_pte);
977 static void inject_page_fault(struct kvm_vcpu *vcpu,
981 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
984 static inline int fix_read_pf(u64 *shadow_ent)
986 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
987 !(*shadow_ent & PT_USER_MASK)) {
989 * If supervisor write protect is disabled, we shadow kernel
990 * pages as user pages so we can trap the write access.
992 *shadow_ent |= PT_USER_MASK;
993 *shadow_ent &= ~PT_WRITABLE_MASK;
1001 static void paging_free(struct kvm_vcpu *vcpu)
1003 nonpaging_free(vcpu);
1007 #include "paging_tmpl.h"
1011 #include "paging_tmpl.h"
1014 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1016 struct kvm_mmu *context = &vcpu->mmu;
1018 ASSERT(is_pae(vcpu));
1019 context->new_cr3 = paging_new_cr3;
1020 context->page_fault = paging64_page_fault;
1021 context->gva_to_gpa = paging64_gva_to_gpa;
1022 context->free = paging_free;
1023 context->root_level = level;
1024 context->shadow_root_level = level;
1025 mmu_alloc_roots(vcpu);
1026 ASSERT(VALID_PAGE(context->root_hpa));
1027 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1028 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1032 static int paging64_init_context(struct kvm_vcpu *vcpu)
1034 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1037 static int paging32_init_context(struct kvm_vcpu *vcpu)
1039 struct kvm_mmu *context = &vcpu->mmu;
1041 context->new_cr3 = paging_new_cr3;
1042 context->page_fault = paging32_page_fault;
1043 context->gva_to_gpa = paging32_gva_to_gpa;
1044 context->free = paging_free;
1045 context->root_level = PT32_ROOT_LEVEL;
1046 context->shadow_root_level = PT32E_ROOT_LEVEL;
1047 mmu_alloc_roots(vcpu);
1048 ASSERT(VALID_PAGE(context->root_hpa));
1049 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1050 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1054 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1056 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1059 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1062 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1064 if (!is_paging(vcpu))
1065 return nonpaging_init_context(vcpu);
1066 else if (is_long_mode(vcpu))
1067 return paging64_init_context(vcpu);
1068 else if (is_pae(vcpu))
1069 return paging32E_init_context(vcpu);
1071 return paging32_init_context(vcpu);
1074 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1077 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1078 vcpu->mmu.free(vcpu);
1079 vcpu->mmu.root_hpa = INVALID_PAGE;
1083 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1087 destroy_kvm_mmu(vcpu);
1088 r = init_kvm_mmu(vcpu);
1091 r = mmu_topup_memory_caches(vcpu);
1096 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *page,
1101 struct kvm_mmu_page *child;
1104 if (is_present_pte(pte)) {
1105 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1106 rmap_remove(vcpu, spte);
1108 child = page_header(pte & PT64_BASE_ADDR_MASK);
1109 mmu_page_remove_parent_pte(vcpu, child, spte);
1115 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1117 gfn_t gfn = gpa >> PAGE_SHIFT;
1118 struct kvm_mmu_page *page;
1119 struct hlist_node *node, *n;
1120 struct hlist_head *bucket;
1123 unsigned offset = offset_in_page(gpa);
1125 unsigned page_offset;
1126 unsigned misaligned;
1131 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1132 if (gfn == vcpu->last_pt_write_gfn) {
1133 ++vcpu->last_pt_write_count;
1134 if (vcpu->last_pt_write_count >= 3)
1137 vcpu->last_pt_write_gfn = gfn;
1138 vcpu->last_pt_write_count = 1;
1140 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1141 bucket = &vcpu->kvm->mmu_page_hash[index];
1142 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1143 if (page->gfn != gfn || page->role.metaphysical)
1145 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1146 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1147 if (misaligned || flooded) {
1149 * Misaligned accesses are too much trouble to fix
1150 * up; also, they usually indicate a page is not used
1153 * If we're seeing too many writes to a page,
1154 * it may no longer be a page table, or we may be
1155 * forking, in which case it is better to unmap the
1158 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1159 gpa, bytes, page->role.word);
1160 kvm_mmu_zap_page(vcpu, page);
1163 page_offset = offset;
1164 level = page->role.level;
1166 if (page->role.glevels == PT32_ROOT_LEVEL) {
1167 page_offset <<= 1; /* 32->64 */
1169 * A 32-bit pde maps 4MB while the shadow pdes map
1170 * only 2MB. So we need to double the offset again
1171 * and zap two pdes instead of one.
1173 if (level == PT32_ROOT_LEVEL) {
1174 page_offset &= ~7; /* kill rounding error */
1178 page_offset &= ~PAGE_MASK;
1180 spte = __va(page->page_hpa);
1181 spte += page_offset / sizeof(*spte);
1183 mmu_pre_write_zap_pte(vcpu, page, spte);
1189 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1193 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1195 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1197 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1200 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1202 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1203 struct kvm_mmu_page *page;
1205 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1206 struct kvm_mmu_page, link);
1207 kvm_mmu_zap_page(vcpu, page);
1210 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1212 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1214 struct kvm_mmu_page *page;
1216 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1217 page = container_of(vcpu->kvm->active_mmu_pages.next,
1218 struct kvm_mmu_page, link);
1219 kvm_mmu_zap_page(vcpu, page);
1221 while (!list_empty(&vcpu->free_pages)) {
1222 page = list_entry(vcpu->free_pages.next,
1223 struct kvm_mmu_page, link);
1224 list_del(&page->link);
1225 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1226 page->page_hpa = INVALID_PAGE;
1228 free_page((unsigned long)vcpu->mmu.pae_root);
1231 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1238 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1239 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1241 INIT_LIST_HEAD(&page_header->link);
1242 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1244 set_page_private(page, (unsigned long)page_header);
1245 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1246 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1247 list_add(&page_header->link, &vcpu->free_pages);
1248 ++vcpu->kvm->n_free_mmu_pages;
1252 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1253 * Therefore we need to allocate shadow page tables in the first
1254 * 4GB of memory, which happens to fit the DMA32 zone.
1256 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1259 vcpu->mmu.pae_root = page_address(page);
1260 for (i = 0; i < 4; ++i)
1261 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1266 free_mmu_pages(vcpu);
1270 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1273 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1274 ASSERT(list_empty(&vcpu->free_pages));
1276 return alloc_mmu_pages(vcpu);
1279 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1282 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1283 ASSERT(!list_empty(&vcpu->free_pages));
1285 return init_kvm_mmu(vcpu);
1288 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1292 destroy_kvm_mmu(vcpu);
1293 free_mmu_pages(vcpu);
1294 mmu_free_memory_caches(vcpu);
1297 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1299 struct kvm *kvm = vcpu->kvm;
1300 struct kvm_mmu_page *page;
1302 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1306 if (!test_bit(slot, &page->slot_bitmap))
1309 pt = __va(page->page_hpa);
1310 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1312 if (pt[i] & PT_WRITABLE_MASK) {
1313 rmap_remove(vcpu, &pt[i]);
1314 pt[i] &= ~PT_WRITABLE_MASK;
1319 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1321 destroy_kvm_mmu(vcpu);
1323 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1324 struct kvm_mmu_page *page;
1326 page = container_of(vcpu->kvm->active_mmu_pages.next,
1327 struct kvm_mmu_page, link);
1328 kvm_mmu_zap_page(vcpu, page);
1331 mmu_free_memory_caches(vcpu);
1332 kvm_arch_ops->tlb_flush(vcpu);
1338 static const char *audit_msg;
1340 static gva_t canonicalize(gva_t gva)
1342 #ifdef CONFIG_X86_64
1343 gva = (long long)(gva << 16) >> 16;
1348 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1349 gva_t va, int level)
1351 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1353 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1355 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1358 if (!ent & PT_PRESENT_MASK)
1361 va = canonicalize(va);
1363 audit_mappings_page(vcpu, ent, va, level - 1);
1365 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1366 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1368 if ((ent & PT_PRESENT_MASK)
1369 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1370 printk(KERN_ERR "audit error: (%s) levels %d"
1371 " gva %lx gpa %llx hpa %llx ent %llx\n",
1372 audit_msg, vcpu->mmu.root_level,
1378 static void audit_mappings(struct kvm_vcpu *vcpu)
1382 if (vcpu->mmu.root_level == 4)
1383 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1385 for (i = 0; i < 4; ++i)
1386 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1387 audit_mappings_page(vcpu,
1388 vcpu->mmu.pae_root[i],
1393 static int count_rmaps(struct kvm_vcpu *vcpu)
1398 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1399 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1400 struct kvm_rmap_desc *d;
1402 for (j = 0; j < m->npages; ++j) {
1403 struct page *page = m->phys_mem[j];
1407 if (!(page->private & 1)) {
1411 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1413 for (k = 0; k < RMAP_EXT; ++k)
1414 if (d->shadow_ptes[k])
1425 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1428 struct kvm_mmu_page *page;
1431 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1432 u64 *pt = __va(page->page_hpa);
1434 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1437 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1440 if (!(ent & PT_PRESENT_MASK))
1442 if (!(ent & PT_WRITABLE_MASK))
1450 static void audit_rmap(struct kvm_vcpu *vcpu)
1452 int n_rmap = count_rmaps(vcpu);
1453 int n_actual = count_writable_mappings(vcpu);
1455 if (n_rmap != n_actual)
1456 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1457 __FUNCTION__, audit_msg, n_rmap, n_actual);
1460 static void audit_write_protection(struct kvm_vcpu *vcpu)
1462 struct kvm_mmu_page *page;
1464 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1468 if (page->role.metaphysical)
1471 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1473 pg = pfn_to_page(hfn);
1475 printk(KERN_ERR "%s: (%s) shadow page has writable"
1476 " mappings: gfn %lx role %x\n",
1477 __FUNCTION__, audit_msg, page->gfn,
1482 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1489 audit_write_protection(vcpu);
1490 audit_mappings(vcpu);