Pileus Git - ~andy/linux/blob - drivers/i2c/busses/i2c-i801.c

   1 /*
   2     Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
   3     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
   4     <mdsxyz123@yahoo.com>
   5     Copyright (C) 2007 - 2012  Jean Delvare <khali@linux-fr.org>
   6     Copyright (C) 2010         Intel Corporation,
   7                                David Woodhouse <dwmw2@infradead.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25   Supports the following Intel I/O Controller Hubs (ICH):
  26
  27                                   I/O                     Block   I2C
  28                                   region  SMBus   Block   proc.   block
  29   Chip name             PCI ID    size    PEC     buffer  call    read
  30   ----------------------------------------------------------------------
  31   82801AA  (ICH)        0x2413     16      no      no      no      no
  32   82801AB  (ICH0)       0x2423     16      no      no      no      no
  33   82801BA  (ICH2)       0x2443     16      no      no      no      no
  34   82801CA  (ICH3)       0x2483     32     soft     no      no      no
  35   82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
  36   82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
  37   6300ESB               0x25a4     32     hard     yes     yes     yes
  38   82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
  39   6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
  40   82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  41   82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  42   82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  43   EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
  44   ICH10                 0x3a30     32     hard     yes     yes     yes
  45   ICH10                 0x3a60     32     hard     yes     yes     yes
  46   5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  47   6 Series (PCH)        0x1c22     32     hard     yes     yes     yes
  48   Patsburg (PCH)        0x1d22     32     hard     yes     yes     yes
  49   Patsburg (PCH) IDF    0x1d70     32     hard     yes     yes     yes
  50   Patsburg (PCH) IDF    0x1d71     32     hard     yes     yes     yes
  51   Patsburg (PCH) IDF    0x1d72     32     hard     yes     yes     yes
  52   DH89xxCC (PCH)        0x2330     32     hard     yes     yes     yes
  53   Panther Point (PCH)   0x1e22     32     hard     yes     yes     yes
  54   Lynx Point (PCH)      0x8c22     32     hard     yes     yes     yes
  55
  56   Features supported by this driver:
  57   Software PEC                     no
  58   Hardware PEC                     yes
  59   Block buffer                     yes
  60   Block process call transaction   no
  61   I2C block read transaction       yes  (doesn't use the block buffer)
  62   Slave mode                       no
  63   Interrupt processing             yes
  64
  65   See the file Documentation/i2c/busses/i2c-i801 for details.
  66 */
  67
  68 #include <linux/interrupt.h>
  69 #include <linux/module.h>
  70 #include <linux/pci.h>
  71 #include <linux/kernel.h>
  72 #include <linux/stddef.h>
  73 #include <linux/delay.h>
  74 #include <linux/ioport.h>
  75 #include <linux/init.h>
  76 #include <linux/i2c.h>
  77 #include <linux/acpi.h>
  78 #include <linux/io.h>
  79 #include <linux/dmi.h>
  80 #include <linux/slab.h>
  81 #include <linux/wait.h>
  82
  83 /* I801 SMBus address offsets */
  84 #define SMBHSTSTS(p)    (0 + (p)->smba)
  85 #define SMBHSTCNT(p)    (2 + (p)->smba)
  86 #define SMBHSTCMD(p)    (3 + (p)->smba)
  87 #define SMBHSTADD(p)    (4 + (p)->smba)
  88 #define SMBHSTDAT0(p)   (5 + (p)->smba)
  89 #define SMBHSTDAT1(p)   (6 + (p)->smba)
  90 #define SMBBLKDAT(p)    (7 + (p)->smba)
  91 #define SMBPEC(p)       (8 + (p)->smba)         /* ICH3 and later */
  92 #define SMBAUXSTS(p)    (12 + (p)->smba)        /* ICH4 and later */
  93 #define SMBAUXCTL(p)    (13 + (p)->smba)        /* ICH4 and later */
  94
  95 /* PCI Address Constants */
  96 #define SMBBAR          4
  97 #define SMBPCISTS       0x006
  98 #define SMBHSTCFG       0x040
  99
 100 /* Host status bits for SMBPCISTS */
 101 #define SMBPCISTS_INTS          0x08
 102
 103 /* Host configuration bits for SMBHSTCFG */
 104 #define SMBHSTCFG_HST_EN        1
 105 #define SMBHSTCFG_SMB_SMI_EN    2
 106 #define SMBHSTCFG_I2C_EN        4
 107
 108 /* Auxiliary control register bits, ICH4+ only */
 109 #define SMBAUXCTL_CRC           1
 110 #define SMBAUXCTL_E32B          2
 111
 112 /* Other settings */
 113 #define MAX_RETRIES             400
 114
 115 /* I801 command constants */
 116 #define I801_QUICK              0x00
 117 #define I801_BYTE               0x04
 118 #define I801_BYTE_DATA          0x08
 119 #define I801_WORD_DATA          0x0C
 120 #define I801_PROC_CALL          0x10    /* unimplemented */
 121 #define I801_BLOCK_DATA         0x14
 122 #define I801_I2C_BLOCK_DATA     0x18    /* ICH5 and later */
 123
 124 /* I801 Host Control register bits */
 125 #define SMBHSTCNT_INTREN        0x01
 126 #define SMBHSTCNT_KILL          0x02
 127 #define SMBHSTCNT_LAST_BYTE     0x20
 128 #define SMBHSTCNT_START         0x40
 129 #define SMBHSTCNT_PEC_EN        0x80    /* ICH3 and later */
 130
 131 /* I801 Hosts Status register bits */
 132 #define SMBHSTSTS_BYTE_DONE     0x80
 133 #define SMBHSTSTS_INUSE_STS     0x40
 134 #define SMBHSTSTS_SMBALERT_STS  0x20
 135 #define SMBHSTSTS_FAILED        0x10
 136 #define SMBHSTSTS_BUS_ERR       0x08
 137 #define SMBHSTSTS_DEV_ERR       0x04
 138 #define SMBHSTSTS_INTR          0x02
 139 #define SMBHSTSTS_HOST_BUSY     0x01
 140
 141 #define STATUS_ERROR_FLAGS      (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
 142                                  SMBHSTSTS_DEV_ERR)
 143
 144 #define STATUS_FLAGS            (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
 145                                  STATUS_ERROR_FLAGS)
 146
 147 /* Older devices have their ID defined in <linux/pci_ids.h> */
 148 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS   0x1c22
 149 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS      0x1d22
 150 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
 151 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
 152 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
 153 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
 154 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS  0x1e22
 155 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS      0x2330
 156 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
 157 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS     0x8c22
 158
 159 struct i801_priv {
 160         struct i2c_adapter adapter;
 161         unsigned long smba;
 162         unsigned char original_hstcfg;
 163         struct pci_dev *pci_dev;
 164         unsigned int features;
 165
 166         /* isr processing */
 167         wait_queue_head_t waitq;
 168         u8 status;
 169
 170         /* Command state used by isr for byte-by-byte block transactions */
 171         u8 cmd;
 172         bool is_read;
 173         int count;
 174         int len;
 175         u8 *data;
 176 };
 177
 178 static struct pci_driver i801_driver;
 179
 180 #define FEATURE_SMBUS_PEC       (1 << 0)
 181 #define FEATURE_BLOCK_BUFFER    (1 << 1)
 182 #define FEATURE_BLOCK_PROC      (1 << 2)
 183 #define FEATURE_I2C_BLOCK_READ  (1 << 3)
 184 #define FEATURE_IRQ             (1 << 4)
 185 /* Not really a feature, but it's convenient to handle it as such */
 186 #define FEATURE_IDF             (1 << 15)
 187
 188 static const char *i801_feature_names[] = {
 189         "SMBus PEC",
 190         "Block buffer",
 191         "Block process call",
 192         "I2C block read",
 193         "Interrupt",
 194 };
 195
 196 static unsigned int disable_features;
 197 module_param(disable_features, uint, S_IRUGO | S_IWUSR);
 198 MODULE_PARM_DESC(disable_features, "Disable selected driver features");
 199
 200 /* Make sure the SMBus host is ready to start transmitting.
 201    Return 0 if it is, -EBUSY if it is not. */
 202 static int i801_check_pre(struct i801_priv *priv)
 203 {
 204         int status;
 205
 206         status = inb_p(SMBHSTSTS(priv));
 207         if (status & SMBHSTSTS_HOST_BUSY) {
 208                 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
 209                 return -EBUSY;
 210         }
 211
 212         status &= STATUS_FLAGS;
 213         if (status) {
 214                 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
 215                         status);
 216                 outb_p(status, SMBHSTSTS(priv));
 217                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 218                 if (status) {
 219                         dev_err(&priv->pci_dev->dev,
 220                                 "Failed clearing status flags (%02x)\n",
 221                                 status);
 222                         return -EBUSY;
 223                 }
 224         }
 225
 226         return 0;
 227 }
 228
 229 /*
 230  * Convert the status register to an error code, and clear it.
 231  * Note that status only contains the bits we want to clear, not the
 232  * actual register value.
 233  */
 234 static int i801_check_post(struct i801_priv *priv, int status)
 235 {
 236         int result = 0;
 237
 238         /*
 239          * If the SMBus is still busy, we give up
 240          * Note: This timeout condition only happens when using polling
 241          * transactions.  For interrupt operation, NAK/timeout is indicated by
 242          * DEV_ERR.
 243          */
 244         if (unlikely(status < 0)) {
 245                 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
 246                 /* try to stop the current command */
 247                 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
 248                 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
 249                        SMBHSTCNT(priv));
 250                 usleep_range(1000, 2000);
 251                 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
 252                        SMBHSTCNT(priv));
 253
 254                 /* Check if it worked */
 255                 status = inb_p(SMBHSTSTS(priv));
 256                 if ((status & SMBHSTSTS_HOST_BUSY) ||
 257                     !(status & SMBHSTSTS_FAILED))
 258                         dev_err(&priv->pci_dev->dev,
 259                                 "Failed terminating the transaction\n");
 260                 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
 261                 return -ETIMEDOUT;
 262         }
 263
 264         if (status & SMBHSTSTS_FAILED) {
 265                 result = -EIO;
 266                 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
 267         }
 268         if (status & SMBHSTSTS_DEV_ERR) {
 269                 result = -ENXIO;
 270                 dev_dbg(&priv->pci_dev->dev, "No response\n");
 271         }
 272         if (status & SMBHSTSTS_BUS_ERR) {
 273                 result = -EAGAIN;
 274                 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
 275         }
 276
 277         /* Clear status flags except BYTE_DONE, to be cleared by caller */
 278         outb_p(status, SMBHSTSTS(priv));
 279
 280         return result;
 281 }
 282
 283 /* Wait for BUSY being cleared and either INTR or an error flag being set */
 284 static int i801_wait_intr(struct i801_priv *priv)
 285 {
 286         int timeout = 0;
 287         int status;
 288
 289         /* We will always wait for a fraction of a second! */
 290         do {
 291                 usleep_range(250, 500);
 292                 status = inb_p(SMBHSTSTS(priv));
 293         } while (((status & SMBHSTSTS_HOST_BUSY) ||
 294                   !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
 295                  (timeout++ < MAX_RETRIES));
 296
 297         if (timeout > MAX_RETRIES) {
 298                 dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
 299                 return -ETIMEDOUT;
 300         }
 301         return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
 302 }
 303
 304 /* Wait for either BYTE_DONE or an error flag being set */
 305 static int i801_wait_byte_done(struct i801_priv *priv)
 306 {
 307         int timeout = 0;
 308         int status;
 309
 310         /* We will always wait for a fraction of a second! */
 311         do {
 312                 usleep_range(250, 500);
 313                 status = inb_p(SMBHSTSTS(priv));
 314         } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
 315                  (timeout++ < MAX_RETRIES));
 316
 317         if (timeout > MAX_RETRIES) {
 318                 dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
 319                 return -ETIMEDOUT;
 320         }
 321         return status & STATUS_ERROR_FLAGS;
 322 }
 323
 324 static int i801_transaction(struct i801_priv *priv, int xact)
 325 {
 326         int status;
 327         int result;
 328
 329         result = i801_check_pre(priv);
 330         if (result < 0)
 331                 return result;
 332
 333         if (priv->features & FEATURE_IRQ) {
 334                 outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
 335                        SMBHSTCNT(priv));
 336                 wait_event(priv->waitq, (status = priv->status));
 337                 priv->status = 0;
 338                 return i801_check_post(priv, status);
 339         }
 340
 341         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
 342          * SMBSCMD are passed in xact */
 343         outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
 344
 345         status = i801_wait_intr(priv);
 346         return i801_check_post(priv, status);
 347 }
 348
 349 static int i801_block_transaction_by_block(struct i801_priv *priv,
 350                                            union i2c_smbus_data *data,
 351                                            char read_write, int hwpec)
 352 {
 353         int i, len;
 354         int status;
 355
 356         inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 357
 358         /* Use 32-byte buffer to process this transaction */
 359         if (read_write == I2C_SMBUS_WRITE) {
 360                 len = data->block[0];
 361                 outb_p(len, SMBHSTDAT0(priv));
 362                 for (i = 0; i < len; i++)
 363                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 364         }
 365
 366         status = i801_transaction(priv, I801_BLOCK_DATA |
 367                                   (hwpec ? SMBHSTCNT_PEC_EN : 0));
 368         if (status)
 369                 return status;
 370
 371         if (read_write == I2C_SMBUS_READ) {
 372                 len = inb_p(SMBHSTDAT0(priv));
 373                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
 374                         return -EPROTO;
 375
 376                 data->block[0] = len;
 377                 for (i = 0; i < len; i++)
 378                         data->block[i + 1] = inb_p(SMBBLKDAT(priv));
 379         }
 380         return 0;
 381 }
 382
 383 static void i801_isr_byte_done(struct i801_priv *priv)
 384 {
 385         if (priv->is_read) {
 386                 /* For SMBus block reads, length is received with first byte */
 387                 if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
 388                     (priv->count == 0)) {
 389                         priv->len = inb_p(SMBHSTDAT0(priv));
 390                         if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
 391                                 dev_err(&priv->pci_dev->dev,
 392                                         "Illegal SMBus block read size %d\n",
 393                                         priv->len);
 394                                 /* FIXME: Recover */
 395                                 priv->len = I2C_SMBUS_BLOCK_MAX;
 396                         } else {
 397                                 dev_dbg(&priv->pci_dev->dev,
 398                                         "SMBus block read size is %d\n",
 399                                         priv->len);
 400                         }
 401                         priv->data[-1] = priv->len;
 402                 }
 403
 404                 /* Read next byte */
 405                 if (priv->count < priv->len)
 406                         priv->data[priv->count++] = inb(SMBBLKDAT(priv));
 407                 else
 408                         dev_dbg(&priv->pci_dev->dev,
 409                                 "Discarding extra byte on block read\n");
 410
 411                 /* Set LAST_BYTE for last byte of read transaction */
 412                 if (priv->count == priv->len - 1)
 413                         outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
 414                                SMBHSTCNT(priv));
 415         } else if (priv->count < priv->len - 1) {
 416                 /* Write next byte, except for IRQ after last byte */
 417                 outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
 418         }
 419
 420         /* Clear BYTE_DONE to continue with next byte */
 421         outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 422 }
 423
 424 /*
 425  * There are two kinds of interrupts:
 426  *
 427  * 1) i801 signals transaction completion with one of these interrupts:
 428  *      INTR - Success
 429  *      DEV_ERR - Invalid command, NAK or communication timeout
 430  *      BUS_ERR - SMI# transaction collision
 431  *      FAILED - transaction was canceled due to a KILL request
 432  *    When any of these occur, update ->status and wake up the waitq.
 433  *    ->status must be cleared before kicking off the next transaction.
 434  *
 435  * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
 436  *    occurs for each byte of a byte-by-byte to prepare the next byte.
 437  */
 438 static irqreturn_t i801_isr(int irq, void *dev_id)
 439 {
 440         struct i801_priv *priv = dev_id;
 441         u16 pcists;
 442         u8 status;
 443
 444         /* Confirm this is our interrupt */
 445         pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
 446         if (!(pcists & SMBPCISTS_INTS))
 447                 return IRQ_NONE;
 448
 449         status = inb_p(SMBHSTSTS(priv));
 450         if (status != 0x42)
 451                 dev_dbg(&priv->pci_dev->dev, "irq: status = %02x\n", status);
 452
 453         if (status & SMBHSTSTS_BYTE_DONE)
 454                 i801_isr_byte_done(priv);
 455
 456         /*
 457          * Clear irq sources and report transaction result.
 458          * ->status must be cleared before the next transaction is started.
 459          */
 460         status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
 461         if (status) {
 462                 outb_p(status, SMBHSTSTS(priv));
 463                 priv->status |= status;
 464                 wake_up(&priv->waitq);
 465         }
 466
 467         return IRQ_HANDLED;
 468 }
 469
 470 /*
 471  * For "byte-by-byte" block transactions:
 472  *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
 473  *   I2C read uses cmd=I801_I2C_BLOCK_DATA
 474  */
 475 static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
 476                                                union i2c_smbus_data *data,
 477                                                char read_write, int command,
 478                                                int hwpec)
 479 {
 480         int i, len;
 481         int smbcmd;
 482         int status;
 483         int result;
 484
 485         result = i801_check_pre(priv);
 486         if (result < 0)
 487                 return result;
 488
 489         len = data->block[0];
 490
 491         if (read_write == I2C_SMBUS_WRITE) {
 492                 outb_p(len, SMBHSTDAT0(priv));
 493                 outb_p(data->block[1], SMBBLKDAT(priv));
 494         }
 495
 496         if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
 497             read_write == I2C_SMBUS_READ)
 498                 smbcmd = I801_I2C_BLOCK_DATA;
 499         else
 500                 smbcmd = I801_BLOCK_DATA;
 501
 502         if (priv->features & FEATURE_IRQ) {
 503                 priv->is_read = (read_write == I2C_SMBUS_READ);
 504                 if (len == 1 && priv->is_read)
 505                         smbcmd |= SMBHSTCNT_LAST_BYTE;
 506                 priv->cmd = smbcmd | SMBHSTCNT_INTREN;
 507                 priv->len = len;
 508                 priv->count = 0;
 509                 priv->data = &data->block[1];
 510
 511                 outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
 512                 wait_event(priv->waitq, (status = priv->status));
 513                 priv->status = 0;
 514                 return i801_check_post(priv, status);
 515         }
 516
 517         for (i = 1; i <= len; i++) {
 518                 if (i == len && read_write == I2C_SMBUS_READ)
 519                         smbcmd |= SMBHSTCNT_LAST_BYTE;
 520                 outb_p(smbcmd, SMBHSTCNT(priv));
 521
 522                 if (i == 1)
 523                         outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
 524                                SMBHSTCNT(priv));
 525
 526                 status = i801_wait_byte_done(priv);
 527                 if (status)
 528                         goto exit;
 529
 530                 if (i == 1 && read_write == I2C_SMBUS_READ
 531                  && command != I2C_SMBUS_I2C_BLOCK_DATA) {
 532                         len = inb_p(SMBHSTDAT0(priv));
 533                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
 534                                 dev_err(&priv->pci_dev->dev,
 535                                         "Illegal SMBus block read size %d\n",
 536                                         len);
 537                                 /* Recover */
 538                                 while (inb_p(SMBHSTSTS(priv)) &
 539                                        SMBHSTSTS_HOST_BUSY)
 540                                         outb_p(SMBHSTSTS_BYTE_DONE,
 541                                                SMBHSTSTS(priv));
 542                                 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 543                                 return -EPROTO;
 544                         }
 545                         data->block[0] = len;
 546                 }
 547
 548                 /* Retrieve/store value in SMBBLKDAT */
 549                 if (read_write == I2C_SMBUS_READ)
 550                         data->block[i] = inb_p(SMBBLKDAT(priv));
 551                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
 552                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 553
 554                 /* signals SMBBLKDAT ready */
 555                 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 556         }
 557
 558         status = i801_wait_intr(priv);
 559 exit:
 560         return i801_check_post(priv, status);
 561 }
 562
 563 static int i801_set_block_buffer_mode(struct i801_priv *priv)
 564 {
 565         outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
 566         if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
 567                 return -EIO;
 568         return 0;
 569 }
 570
 571 /* Block transaction function */
 572 static int i801_block_transaction(struct i801_priv *priv,
 573                                   union i2c_smbus_data *data, char read_write,
 574                                   int command, int hwpec)
 575 {
 576         int result = 0;
 577         unsigned char hostc;
 578
 579         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
 580                 if (read_write == I2C_SMBUS_WRITE) {
 581                         /* set I2C_EN bit in configuration register */
 582                         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
 583                         pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
 584                                               hostc | SMBHSTCFG_I2C_EN);
 585                 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
 586                         dev_err(&priv->pci_dev->dev,
 587                                 "I2C block read is unsupported!\n");
 588                         return -EOPNOTSUPP;
 589                 }
 590         }
 591
 592         if (read_write == I2C_SMBUS_WRITE
 593          || command == I2C_SMBUS_I2C_BLOCK_DATA) {
 594                 if (data->block[0] < 1)
 595                         data->block[0] = 1;
 596                 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
 597                         data->block[0] = I2C_SMBUS_BLOCK_MAX;
 598         } else {
 599                 data->block[0] = 32;    /* max for SMBus block reads */
 600         }
 601
 602         /* Experience has shown that the block buffer can only be used for
 603            SMBus (not I2C) block transactions, even though the datasheet
 604            doesn't mention this limitation. */
 605         if ((priv->features & FEATURE_BLOCK_BUFFER)
 606          && command != I2C_SMBUS_I2C_BLOCK_DATA
 607          && i801_set_block_buffer_mode(priv) == 0)
 608                 result = i801_block_transaction_by_block(priv, data,
 609                                                          read_write, hwpec);
 610         else
 611                 result = i801_block_transaction_byte_by_byte(priv, data,
 612                                                              read_write,
 613                                                              command, hwpec);
 614
 615         if (command == I2C_SMBUS_I2C_BLOCK_DATA
 616          && read_write == I2C_SMBUS_WRITE) {
 617                 /* restore saved configuration register value */
 618                 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
 619         }
 620         return result;
 621 }
 622
 623 /* Return negative errno on error. */
 624 static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 625                        unsigned short flags, char read_write, u8 command,
 626                        int size, union i2c_smbus_data *data)
 627 {
 628         int hwpec;
 629         int block = 0;
 630         int ret, xact = 0;
 631         struct i801_priv *priv = i2c_get_adapdata(adap);
 632
 633         hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
 634                 && size != I2C_SMBUS_QUICK
 635                 && size != I2C_SMBUS_I2C_BLOCK_DATA;
 636
 637         switch (size) {
 638         case I2C_SMBUS_QUICK:
 639                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 640                        SMBHSTADD(priv));
 641                 xact = I801_QUICK;
 642                 break;
 643         case I2C_SMBUS_BYTE:
 644                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 645                        SMBHSTADD(priv));
 646                 if (read_write == I2C_SMBUS_WRITE)
 647                         outb_p(command, SMBHSTCMD(priv));
 648                 xact = I801_BYTE;
 649                 break;
 650         case I2C_SMBUS_BYTE_DATA:
 651                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 652                        SMBHSTADD(priv));
 653                 outb_p(command, SMBHSTCMD(priv));
 654                 if (read_write == I2C_SMBUS_WRITE)
 655                         outb_p(data->byte, SMBHSTDAT0(priv));
 656                 xact = I801_BYTE_DATA;
 657                 break;
 658         case I2C_SMBUS_WORD_DATA:
 659                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 660                        SMBHSTADD(priv));
 661                 outb_p(command, SMBHSTCMD(priv));
 662                 if (read_write == I2C_SMBUS_WRITE) {
 663                         outb_p(data->word & 0xff, SMBHSTDAT0(priv));
 664                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
 665                 }
 666                 xact = I801_WORD_DATA;
 667                 break;
 668         case I2C_SMBUS_BLOCK_DATA:
 669                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 670                        SMBHSTADD(priv));
 671                 outb_p(command, SMBHSTCMD(priv));
 672                 block = 1;
 673                 break;
 674         case I2C_SMBUS_I2C_BLOCK_DATA:
 675                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
 676                  * bit should be cleared here, even when reading */
 677                 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
 678                 if (read_write == I2C_SMBUS_READ) {
 679                         /* NB: page 240 of ICH5 datasheet also shows
 680                          * that DATA1 is the cmd field when reading */
 681                         outb_p(command, SMBHSTDAT1(priv));
 682                 } else
 683                         outb_p(command, SMBHSTCMD(priv));
 684                 block = 1;
 685                 break;
 686         default:
 687                 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
 688                         size);
 689                 return -EOPNOTSUPP;
 690         }
 691
 692         if (hwpec)      /* enable/disable hardware PEC */
 693                 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
 694         else
 695                 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
 696                        SMBAUXCTL(priv));
 697
 698         if (block)
 699                 ret = i801_block_transaction(priv, data, read_write, size,
 700                                              hwpec);
 701         else
 702                 ret = i801_transaction(priv, xact);
 703
 704         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
 705            time, so we forcibly disable it after every transaction. Turn off
 706            E32B for the same reason. */
 707         if (hwpec || block)
 708                 outb_p(inb_p(SMBAUXCTL(priv)) &
 709                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 710
 711         if (block)
 712                 return ret;
 713         if (ret)
 714                 return ret;
 715         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
 716                 return 0;
 717
 718         switch (xact & 0x7f) {
 719         case I801_BYTE: /* Result put in SMBHSTDAT0 */
 720         case I801_BYTE_DATA:
 721                 data->byte = inb_p(SMBHSTDAT0(priv));
 722                 break;
 723         case I801_WORD_DATA:
 724                 data->word = inb_p(SMBHSTDAT0(priv)) +
 725                              (inb_p(SMBHSTDAT1(priv)) << 8);
 726                 break;
 727         }
 728         return 0;
 729 }
 730
 731
 732 static u32 i801_func(struct i2c_adapter *adapter)
 733 {
 734         struct i801_priv *priv = i2c_get_adapdata(adapter);
 735
 736         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 737                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 738                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
 739                ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
 740                ((priv->features & FEATURE_I2C_BLOCK_READ) ?
 741                 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 742 }
 743
 744 static const struct i2c_algorithm smbus_algorithm = {
 745         .smbus_xfer     = i801_access,
 746         .functionality  = i801_func,
 747 };
 748
 749 static DEFINE_PCI_DEVICE_TABLE(i801_ids) = {
 750         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
 751         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
 752         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
 753         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
 754         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
 755         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
 756         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
 757         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
 758         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
 759         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
 760         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
 761         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
 762         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
 763         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 764         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 765         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
 766         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
 767         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
 768         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
 769         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
 770         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
 771         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
 772         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
 773         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
 774         { 0, }
 775 };
 776
 777 MODULE_DEVICE_TABLE(pci, i801_ids);
 778
 779 #if defined CONFIG_X86 && defined CONFIG_DMI
 780 static unsigned char apanel_addr;
 781
 782 /* Scan the system ROM for the signature "FJKEYINF" */
 783 static __init const void __iomem *bios_signature(const void __iomem *bios)
 784 {
 785         ssize_t offset;
 786         const unsigned char signature[] = "FJKEYINF";
 787
 788         for (offset = 0; offset < 0x10000; offset += 0x10) {
 789                 if (check_signature(bios + offset, signature,
 790                                     sizeof(signature)-1))
 791                         return bios + offset;
 792         }
 793         return NULL;
 794 }
 795
 796 static void __init input_apanel_init(void)
 797 {
 798         void __iomem *bios;
 799         const void __iomem *p;
 800
 801         bios = ioremap(0xF0000, 0x10000); /* Can't fail */
 802         p = bios_signature(bios);
 803         if (p) {
 804                 /* just use the first address */
 805                 apanel_addr = readb(p + 8 + 3) >> 1;
 806         }
 807         iounmap(bios);
 808 }
 809
 810 struct dmi_onboard_device_info {
 811         const char *name;
 812         u8 type;
 813         unsigned short i2c_addr;
 814         const char *i2c_type;
 815 };
 816
 817 static struct dmi_onboard_device_info __devinitdata dmi_devices[] = {
 818         { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
 819         { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
 820         { "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
 821 };
 822
 823 static void __devinit dmi_check_onboard_device(u8 type, const char *name,
 824                                                struct i2c_adapter *adap)
 825 {
 826         int i;
 827         struct i2c_board_info info;
 828
 829         for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
 830                 /* & ~0x80, ignore enabled/disabled bit */
 831                 if ((type & ~0x80) != dmi_devices[i].type)
 832                         continue;
 833                 if (strcasecmp(name, dmi_devices[i].name))
 834                         continue;
 835
 836                 memset(&info, 0, sizeof(struct i2c_board_info));
 837                 info.addr = dmi_devices[i].i2c_addr;
 838                 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
 839                 i2c_new_device(adap, &info);
 840                 break;
 841         }
 842 }
 843
 844 /* We use our own function to check for onboard devices instead of
 845    dmi_find_device() as some buggy BIOS's have the devices we are interested
 846    in marked as disabled */
 847 static void __devinit dmi_check_onboard_devices(const struct dmi_header *dm,
 848                                                 void *adap)
 849 {
 850         int i, count;
 851
 852         if (dm->type != 10)
 853                 return;
 854
 855         count = (dm->length - sizeof(struct dmi_header)) / 2;
 856         for (i = 0; i < count; i++) {
 857                 const u8 *d = (char *)(dm + 1) + (i * 2);
 858                 const char *name = ((char *) dm) + dm->length;
 859                 u8 type = d[0];
 860                 u8 s = d[1];
 861
 862                 if (!s)
 863                         continue;
 864                 s--;
 865                 while (s > 0 && name[0]) {
 866                         name += strlen(name) + 1;
 867                         s--;
 868                 }
 869                 if (name[0] == 0) /* Bogus string reference */
 870                         continue;
 871
 872                 dmi_check_onboard_device(type, name, adap);
 873         }
 874 }
 875
 876 /* Register optional slaves */
 877 static void __devinit i801_probe_optional_slaves(struct i801_priv *priv)
 878 {
 879         /* Only register slaves on main SMBus channel */
 880         if (priv->features & FEATURE_IDF)
 881                 return;
 882
 883         if (apanel_addr) {
 884                 struct i2c_board_info info;
 885
 886                 memset(&info, 0, sizeof(struct i2c_board_info));
 887                 info.addr = apanel_addr;
 888                 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
 889                 i2c_new_device(&priv->adapter, &info);
 890         }
 891
 892         if (dmi_name_in_vendors("FUJITSU"))
 893                 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
 894 }
 895 #else
 896 static void __init input_apanel_init(void) {}
 897 static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {}
 898 #endif  /* CONFIG_X86 && CONFIG_DMI */
 899
 900 static int __devinit i801_probe(struct pci_dev *dev,
 901                                 const struct pci_device_id *id)
 902 {
 903         unsigned char temp;
 904         int err, i;
 905         struct i801_priv *priv;
 906
 907         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 908         if (!priv)
 909                 return -ENOMEM;
 910
 911         i2c_set_adapdata(&priv->adapter, priv);
 912         priv->adapter.owner = THIS_MODULE;
 913         priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 914         priv->adapter.algo = &smbus_algorithm;
 915
 916         priv->pci_dev = dev;
 917         switch (dev->device) {
 918         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
 919         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
 920         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
 921                 priv->features |= FEATURE_IDF;
 922                 /* fall through */
 923         default:
 924                 priv->features |= FEATURE_I2C_BLOCK_READ;
 925                 /* fall through */
 926         case PCI_DEVICE_ID_INTEL_82801DB_3:
 927                 priv->features |= FEATURE_SMBUS_PEC;
 928                 priv->features |= FEATURE_BLOCK_BUFFER;
 929                 /* fall through */
 930         case PCI_DEVICE_ID_INTEL_82801CA_3:
 931         case PCI_DEVICE_ID_INTEL_82801BA_2:
 932         case PCI_DEVICE_ID_INTEL_82801AB_3:
 933         case PCI_DEVICE_ID_INTEL_82801AA_3:
 934                 break;
 935         }
 936
 937         /* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
 938         if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
 939             dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
 940             dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
 941             dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
 942             dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
 943             dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
 944             dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
 945                 priv->features |= FEATURE_IRQ;
 946
 947         /* Disable features on user request */
 948         for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
 949                 if (priv->features & disable_features & (1 << i))
 950                         dev_notice(&dev->dev, "%s disabled by user\n",
 951                                    i801_feature_names[i]);
 952         }
 953         priv->features &= ~disable_features;
 954
 955         err = pci_enable_device(dev);
 956         if (err) {
 957                 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
 958                         err);
 959                 goto exit;
 960         }
 961
 962         /* Determine the address of the SMBus area */
 963         priv->smba = pci_resource_start(dev, SMBBAR);
 964         if (!priv->smba) {
 965                 dev_err(&dev->dev, "SMBus base address uninitialized, "
 966                         "upgrade BIOS\n");
 967                 err = -ENODEV;
 968                 goto exit;
 969         }
 970
 971         err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
 972         if (err) {
 973                 err = -ENODEV;
 974                 goto exit;
 975         }
 976
 977         err = pci_request_region(dev, SMBBAR, i801_driver.name);
 978         if (err) {
 979                 dev_err(&dev->dev, "Failed to request SMBus region "
 980                         "0x%lx-0x%Lx\n", priv->smba,
 981                         (unsigned long long)pci_resource_end(dev, SMBBAR));
 982                 goto exit;
 983         }
 984
 985         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
 986         priv->original_hstcfg = temp;
 987         temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
 988         if (!(temp & SMBHSTCFG_HST_EN)) {
 989                 dev_info(&dev->dev, "Enabling SMBus device\n");
 990                 temp |= SMBHSTCFG_HST_EN;
 991         }
 992         pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
 993
 994         if (temp & SMBHSTCFG_SMB_SMI_EN) {
 995                 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
 996                 /* Disable SMBus interrupt feature if SMBus using SMI# */
 997                 priv->features &= ~FEATURE_IRQ;
 998         }
 999
1000         /* Clear special mode bits */
1001         if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
1002                 outb_p(inb_p(SMBAUXCTL(priv)) &
1003                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
1004
1005         if (priv->features & FEATURE_IRQ) {
1006                 init_waitqueue_head(&priv->waitq);
1007
1008                 err = request_irq(dev->irq, i801_isr, IRQF_SHARED,
1009                                   i801_driver.name, priv);
1010                 if (err) {
1011                         dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
1012                                 dev->irq, err);
1013                         goto exit_release;
1014                 }
1015                 dev_info(&dev->dev, "SMBus using PCI Interrupt\n");
1016         }
1017
1018         /* set up the sysfs linkage to our parent device */
1019         priv->adapter.dev.parent = &dev->dev;
1020
1021         /* Retry up to 3 times on lost arbitration */
1022         priv->adapter.retries = 3;
1023
1024         snprintf(priv->adapter.name, sizeof(priv->adapter.name),
1025                 "SMBus I801 adapter at %04lx", priv->smba);
1026         err = i2c_add_adapter(&priv->adapter);
1027         if (err) {
1028                 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
1029                 goto exit_free_irq;
1030         }
1031
1032         i801_probe_optional_slaves(priv);
1033
1034         pci_set_drvdata(dev, priv);
1035
1036         return 0;
1037
1038 exit_free_irq:
1039         if (priv->features & FEATURE_IRQ)
1040                 free_irq(dev->irq, priv);
1041 exit_release:
1042         pci_release_region(dev, SMBBAR);
1043 exit:
1044         kfree(priv);
1045         return err;
1046 }
1047
1048 static void __devexit i801_remove(struct pci_dev *dev)
1049 {
1050         struct i801_priv *priv = pci_get_drvdata(dev);
1051
1052         i2c_del_adapter(&priv->adapter);
1053         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1054
1055         if (priv->features & FEATURE_IRQ)
1056                 free_irq(dev->irq, priv);
1057         pci_release_region(dev, SMBBAR);
1058
1059         pci_set_drvdata(dev, NULL);
1060         kfree(priv);
1061         /*
1062          * do not call pci_disable_device(dev) since it can cause hard hangs on
1063          * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
1064          */
1065 }
1066
1067 #ifdef CONFIG_PM
1068 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
1069 {
1070         struct i801_priv *priv = pci_get_drvdata(dev);
1071
1072         pci_save_state(dev);
1073         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1074         pci_set_power_state(dev, pci_choose_state(dev, mesg));
1075         return 0;
1076 }
1077
1078 static int i801_resume(struct pci_dev *dev)
1079 {
1080         pci_set_power_state(dev, PCI_D0);
1081         pci_restore_state(dev);
1082         return pci_enable_device(dev);
1083 }
1084 #else
1085 #define i801_suspend NULL
1086 #define i801_resume NULL
1087 #endif
1088
1089 static struct pci_driver i801_driver = {
1090         .name           = "i801_smbus",
1091         .id_table       = i801_ids,
1092         .probe          = i801_probe,
1093         .remove         = __devexit_p(i801_remove),
1094         .suspend        = i801_suspend,
1095         .resume         = i801_resume,
1096 };
1097
1098 static int __init i2c_i801_init(void)
1099 {
1100         if (dmi_name_in_vendors("FUJITSU"))
1101                 input_apanel_init();
1102         return pci_register_driver(&i801_driver);
1103 }
1104
1105 static void __exit i2c_i801_exit(void)
1106 {
1107         pci_unregister_driver(&i801_driver);
1108 }
1109
1110 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
1111               "Jean Delvare <khali@linux-fr.org>");
1112 MODULE_DESCRIPTION("I801 SMBus driver");
1113 MODULE_LICENSE("GPL");
1114
1115 module_init(i2c_i801_init);
1116 module_exit(i2c_i801_exit);