Pileus Git - ~andy/linux/blob - drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25     Supports following chips:
  26
  27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  28     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  29     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  30     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  31     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  32
  33     For other winbond chips, and for i2c support in the above chips,
  34     use w83781d.c.
  35
  36     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  37     supported yet.
  38 */
  39
  40 #include <linux/module.h>
  41 #include <linux/init.h>
  42 #include <linux/slab.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/i2c.h>
  45 #include <linux/i2c-isa.h>
  46 #include <linux/hwmon.h>
  47 #include <linux/hwmon-vid.h>
  48 #include <linux/err.h>
  49 #include <asm/io.h>
  50 #include "lm75.h"
  51
  52 static u16 force_addr;
  53 module_param(force_addr, ushort, 0);
  54 MODULE_PARM_DESC(force_addr,
  55                  "Initialize the base address of the sensors");
  56 static u8 force_i2c = 0x1f;
  57 module_param(force_i2c, byte, 0);
  58 MODULE_PARM_DESC(force_i2c,
  59                  "Initialize the i2c address of the sensors");
  60
  61 /* The actual ISA address is read from Super-I/O configuration space */
  62 static unsigned short address;
  63
  64 /* Insmod parameters */
  65 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  66
  67 static int reset;
  68 module_param(reset, bool, 0);
  69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  70
  71 static int init = 1;
  72 module_param(init, bool, 0);
  73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  74
  75 /* modified from kernel/include/traps.c */
  76 static int REG;         /* The register to read/write */
  77 #define DEV     0x07    /* Register: Logical device select */
  78 static int VAL;         /* The value to read/write */
  79
  80 /* logical device numbers for superio_select (below) */
  81 #define W83627HF_LD_FDC         0x00
  82 #define W83627HF_LD_PRT         0x01
  83 #define W83627HF_LD_UART1       0x02
  84 #define W83627HF_LD_UART2       0x03
  85 #define W83627HF_LD_KBC         0x05
  86 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  87 #define W83627HF_LD_GAME        0x07
  88 #define W83627HF_LD_MIDI        0x07
  89 #define W83627HF_LD_GPIO1       0x07
  90 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  91 #define W83627HF_LD_GPIO2       0x08
  92 #define W83627HF_LD_GPIO3       0x09
  93 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  94 #define W83627HF_LD_ACPI        0x0a
  95 #define W83627HF_LD_HWM         0x0b
  96
  97 #define DEVID   0x20    /* Register: Device ID */
  98
  99 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
 100 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
 101 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
 102
 103 static inline void
 104 superio_outb(int reg, int val)
 105 {
 106         outb(reg, REG);
 107         outb(val, VAL);
 108 }
 109
 110 static inline int
 111 superio_inb(int reg)
 112 {
 113         outb(reg, REG);
 114         return inb(VAL);
 115 }
 116
 117 static inline void
 118 superio_select(int ld)
 119 {
 120         outb(DEV, REG);
 121         outb(ld, VAL);
 122 }
 123
 124 static inline void
 125 superio_enter(void)
 126 {
 127         outb(0x87, REG);
 128         outb(0x87, REG);
 129 }
 130
 131 static inline void
 132 superio_exit(void)
 133 {
 134         outb(0xAA, REG);
 135 }
 136
 137 #define W627_DEVID 0x52
 138 #define W627THF_DEVID 0x82
 139 #define W697_DEVID 0x60
 140 #define W637_DEVID 0x70
 141 #define WINB_ACT_REG 0x30
 142 #define WINB_BASE_REG 0x60
 143 /* Constants specified below */
 144
 145 /* Alignment of the base address */
 146 #define WINB_ALIGNMENT          ~7
 147
 148 /* Offset & size of I/O region we are interested in */
 149 #define WINB_REGION_OFFSET      5
 150 #define WINB_REGION_SIZE        2
 151
 152 /* Where are the sensors address/data registers relative to the base address */
 153 #define W83781D_ADDR_REG_OFFSET 5
 154 #define W83781D_DATA_REG_OFFSET 6
 155
 156 /* The W83781D registers */
 157 /* The W83782D registers for nr=7,8 are in bank 5 */
 158 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 159                                            (0x554 + (((nr) - 7) * 2)))
 160 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 161                                            (0x555 + (((nr) - 7) * 2)))
 162 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 163                                            (0x550 + (nr) - 7))
 164
 165 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
 166 #define W83781D_REG_FAN(nr) (0x27 + (nr))
 167
 168 #define W83781D_REG_TEMP2_CONFIG 0x152
 169 #define W83781D_REG_TEMP3_CONFIG 0x252
 170 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
 171                                         ((nr == 2) ? (0x0150) : \
 172                                                      (0x27)))
 173 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
 174                                         ((nr == 2) ? (0x153) : \
 175                                                      (0x3A)))
 176 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
 177                                         ((nr == 2) ? (0x155) : \
 178                                                      (0x39)))
 179
 180 #define W83781D_REG_BANK 0x4E
 181
 182 #define W83781D_REG_CONFIG 0x40
 183 #define W83781D_REG_ALARM1 0x41
 184 #define W83781D_REG_ALARM2 0x42
 185 #define W83781D_REG_ALARM3 0x450
 186
 187 #define W83781D_REG_IRQ 0x4C
 188 #define W83781D_REG_BEEP_CONFIG 0x4D
 189 #define W83781D_REG_BEEP_INTS1 0x56
 190 #define W83781D_REG_BEEP_INTS2 0x57
 191 #define W83781D_REG_BEEP_INTS3 0x453
 192
 193 #define W83781D_REG_VID_FANDIV 0x47
 194
 195 #define W83781D_REG_CHIPID 0x49
 196 #define W83781D_REG_WCHIPID 0x58
 197 #define W83781D_REG_CHIPMAN 0x4F
 198 #define W83781D_REG_PIN 0x4B
 199
 200 #define W83781D_REG_VBAT 0x5D
 201
 202 #define W83627HF_REG_PWM1 0x5A
 203 #define W83627HF_REG_PWM2 0x5B
 204
 205 #define W83627THF_REG_PWM1              0x01    /* 697HF and 637HF too */
 206 #define W83627THF_REG_PWM2              0x03    /* 697HF and 637HF too */
 207 #define W83627THF_REG_PWM3              0x11    /* 637HF too */
 208
 209 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF too */
 210
 211 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 212 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 213                              W83627THF_REG_PWM3 };
 214 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 215                                      regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
 216
 217 #define W83781D_REG_I2C_ADDR 0x48
 218 #define W83781D_REG_I2C_SUBADDR 0x4A
 219
 220 /* Sensor selection */
 221 #define W83781D_REG_SCFG1 0x5D
 222 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 223 #define W83781D_REG_SCFG2 0x59
 224 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 225 #define W83781D_DEFAULT_BETA 3435
 226
 227 /* Conversions. Limit checking is only done on the TO_REG
 228    variants. Note that you should be a bit careful with which arguments
 229    these macros are called: arguments may be evaluated more than once.
 230    Fixing this is just not worth it. */
 231 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 232 #define IN_FROM_REG(val) ((val) * 16)
 233
 234 static inline u8 FAN_TO_REG(long rpm, int div)
 235 {
 236         if (rpm == 0)
 237                 return 255;
 238         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 239         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 240                              254);
 241 }
 242
 243 #define TEMP_MIN (-128000)
 244 #define TEMP_MAX ( 127000)
 245
 246 /* TEMP: 0.001C/bit (-128C to +127C)
 247    REG: 1C/bit, two's complement */
 248 static u8 TEMP_TO_REG(int temp)
 249 {
 250         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 251         ntemp += (ntemp<0 ? -500 : 500);
 252         return (u8)(ntemp / 1000);
 253 }
 254
 255 static int TEMP_FROM_REG(u8 reg)
 256 {
 257         return (s8)reg * 1000;
 258 }
 259
 260 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 261
 262 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 263
 264 #define BEEP_MASK_FROM_REG(val)          (val)
 265 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 266 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 267 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 268
 269 #define DIV_FROM_REG(val) (1 << (val))
 270
 271 static inline u8 DIV_TO_REG(long val)
 272 {
 273         int i;
 274         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 275         for (i = 0; i < 7; i++) {
 276                 if (val == 0)
 277                         break;
 278                 val >>= 1;
 279         }
 280         return ((u8) i);
 281 }
 282
 283 /* For each registered chip, we need to keep some data in memory. That
 284    data is pointed to by w83627hf_list[NR]->data. The structure itself is
 285    dynamically allocated, at the same time when a new client is allocated. */
 286 struct w83627hf_data {
 287         struct i2c_client client;
 288         struct class_device *class_dev;
 289         struct semaphore lock;
 290         enum chips type;
 291
 292         struct semaphore update_lock;
 293         char valid;             /* !=0 if following fields are valid */
 294         unsigned long last_updated;     /* In jiffies */
 295
 296         struct i2c_client *lm75;        /* for secondary I2C addresses */
 297         /* pointer to array of 2 subclients */
 298
 299         u8 in[9];               /* Register value */
 300         u8 in_max[9];           /* Register value */
 301         u8 in_min[9];           /* Register value */
 302         u8 fan[3];              /* Register value */
 303         u8 fan_min[3];          /* Register value */
 304         u8 temp;
 305         u8 temp_max;            /* Register value */
 306         u8 temp_max_hyst;       /* Register value */
 307         u16 temp_add[2];        /* Register value */
 308         u16 temp_max_add[2];    /* Register value */
 309         u16 temp_max_hyst_add[2]; /* Register value */
 310         u8 fan_div[3];          /* Register encoding, shifted right */
 311         u8 vid;                 /* Register encoding, combined */
 312         u32 alarms;             /* Register encoding, combined */
 313         u32 beep_mask;          /* Register encoding, combined */
 314         u8 beep_enable;         /* Boolean */
 315         u8 pwm[3];              /* Register value */
 316         u16 sens[3];            /* 782D/783S only.
 317                                    1 = pentium diode; 2 = 3904 diode;
 318                                    3000-5000 = thermistor beta.
 319                                    Default = 3435.
 320                                    Other Betas unimplemented */
 321         u8 vrm;
 322         u8 vrm_ovt;             /* Register value, 627thf & 637hf only */
 323 };
 324
 325
 326 static int w83627hf_detect(struct i2c_adapter *adapter);
 327 static int w83627hf_detach_client(struct i2c_client *client);
 328
 329 static int w83627hf_read_value(struct i2c_client *client, u16 register);
 330 static int w83627hf_write_value(struct i2c_client *client, u16 register,
 331                                u16 value);
 332 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 333 static void w83627hf_init_client(struct i2c_client *client);
 334
 335 static struct i2c_driver w83627hf_driver = {
 336         .owner          = THIS_MODULE,
 337         .name           = "w83627hf",
 338         .attach_adapter = w83627hf_detect,
 339         .detach_client  = w83627hf_detach_client,
 340 };
 341
 342 /* following are the sysfs callback functions */
 343 #define show_in_reg(reg) \
 344 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 345 { \
 346         struct w83627hf_data *data = w83627hf_update_device(dev); \
 347         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
 348 }
 349 show_in_reg(in)
 350 show_in_reg(in_min)
 351 show_in_reg(in_max)
 352
 353 #define store_in_reg(REG, reg) \
 354 static ssize_t \
 355 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 356 { \
 357         struct i2c_client *client = to_i2c_client(dev); \
 358         struct w83627hf_data *data = i2c_get_clientdata(client); \
 359         u32 val; \
 360          \
 361         val = simple_strtoul(buf, NULL, 10); \
 362          \
 363         down(&data->update_lock); \
 364         data->in_##reg[nr] = IN_TO_REG(val); \
 365         w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
 366                             data->in_##reg[nr]); \
 367          \
 368         up(&data->update_lock); \
 369         return count; \
 370 }
 371 store_in_reg(MIN, min)
 372 store_in_reg(MAX, max)
 373
 374 #define sysfs_in_offset(offset) \
 375 static ssize_t \
 376 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 377 { \
 378         return show_in(dev, buf, offset); \
 379 } \
 380 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 381
 382 #define sysfs_in_reg_offset(reg, offset) \
 383 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 384 { \
 385         return show_in_##reg (dev, buf, offset); \
 386 } \
 387 static ssize_t \
 388 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
 389                             const char *buf, size_t count) \
 390 { \
 391         return store_in_##reg (dev, buf, count, offset); \
 392 } \
 393 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
 394                   show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 395
 396 #define sysfs_in_offsets(offset) \
 397 sysfs_in_offset(offset) \
 398 sysfs_in_reg_offset(min, offset) \
 399 sysfs_in_reg_offset(max, offset)
 400
 401 sysfs_in_offsets(1);
 402 sysfs_in_offsets(2);
 403 sysfs_in_offsets(3);
 404 sysfs_in_offsets(4);
 405 sysfs_in_offsets(5);
 406 sysfs_in_offsets(6);
 407 sysfs_in_offsets(7);
 408 sysfs_in_offsets(8);
 409
 410 /* use a different set of functions for in0 */
 411 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 412 {
 413         long in0;
 414
 415         if ((data->vrm_ovt & 0x01) &&
 416                 (w83627thf == data->type || w83637hf == data->type))
 417
 418                 /* use VRM9 calculation */
 419                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 420         else
 421                 /* use VRM8 (standard) calculation */
 422                 in0 = (long)IN_FROM_REG(reg);
 423
 424         return sprintf(buf,"%ld\n", in0);
 425 }
 426
 427 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 428 {
 429         struct w83627hf_data *data = w83627hf_update_device(dev);
 430         return show_in_0(data, buf, data->in[0]);
 431 }
 432
 433 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 434 {
 435         struct w83627hf_data *data = w83627hf_update_device(dev);
 436         return show_in_0(data, buf, data->in_min[0]);
 437 }
 438
 439 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 440 {
 441         struct w83627hf_data *data = w83627hf_update_device(dev);
 442         return show_in_0(data, buf, data->in_max[0]);
 443 }
 444
 445 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 446         const char *buf, size_t count)
 447 {
 448         struct i2c_client *client = to_i2c_client(dev);
 449         struct w83627hf_data *data = i2c_get_clientdata(client);
 450         u32 val;
 451
 452         val = simple_strtoul(buf, NULL, 10);
 453
 454         down(&data->update_lock);
 455
 456         if ((data->vrm_ovt & 0x01) &&
 457                 (w83627thf == data->type || w83637hf == data->type))
 458
 459                 /* use VRM9 calculation */
 460                 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 461         else
 462                 /* use VRM8 (standard) calculation */
 463                 data->in_min[0] = IN_TO_REG(val);
 464
 465         w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
 466         up(&data->update_lock);
 467         return count;
 468 }
 469
 470 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 471         const char *buf, size_t count)
 472 {
 473         struct i2c_client *client = to_i2c_client(dev);
 474         struct w83627hf_data *data = i2c_get_clientdata(client);
 475         u32 val;
 476
 477         val = simple_strtoul(buf, NULL, 10);
 478
 479         down(&data->update_lock);
 480
 481         if ((data->vrm_ovt & 0x01) &&
 482                 (w83627thf == data->type || w83637hf == data->type))
 483
 484                 /* use VRM9 calculation */
 485                 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 486         else
 487                 /* use VRM8 (standard) calculation */
 488                 data->in_max[0] = IN_TO_REG(val);
 489
 490         w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
 491         up(&data->update_lock);
 492         return count;
 493 }
 494
 495 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 496 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 497         show_regs_in_min0, store_regs_in_min0);
 498 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 499         show_regs_in_max0, store_regs_in_max0);
 500
 501 #define device_create_file_in(client, offset) \
 502 do { \
 503 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 504 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 505 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 506 } while (0)
 507
 508 #define show_fan_reg(reg) \
 509 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 510 { \
 511         struct w83627hf_data *data = w83627hf_update_device(dev); \
 512         return sprintf(buf,"%ld\n", \
 513                 FAN_FROM_REG(data->reg[nr-1], \
 514                             (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 515 }
 516 show_fan_reg(fan);
 517 show_fan_reg(fan_min);
 518
 519 static ssize_t
 520 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 521 {
 522         struct i2c_client *client = to_i2c_client(dev);
 523         struct w83627hf_data *data = i2c_get_clientdata(client);
 524         u32 val;
 525
 526         val = simple_strtoul(buf, NULL, 10);
 527
 528         down(&data->update_lock);
 529         data->fan_min[nr - 1] =
 530             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 531         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
 532                             data->fan_min[nr - 1]);
 533
 534         up(&data->update_lock);
 535         return count;
 536 }
 537
 538 #define sysfs_fan_offset(offset) \
 539 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 540 { \
 541         return show_fan(dev, buf, offset); \
 542 } \
 543 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 544
 545 #define sysfs_fan_min_offset(offset) \
 546 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 547 { \
 548         return show_fan_min(dev, buf, offset); \
 549 } \
 550 static ssize_t \
 551 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 552 { \
 553         return store_fan_min(dev, buf, count, offset); \
 554 } \
 555 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
 556                   show_regs_fan_min##offset, store_regs_fan_min##offset);
 557
 558 sysfs_fan_offset(1);
 559 sysfs_fan_min_offset(1);
 560 sysfs_fan_offset(2);
 561 sysfs_fan_min_offset(2);
 562 sysfs_fan_offset(3);
 563 sysfs_fan_min_offset(3);
 564
 565 #define device_create_file_fan(client, offset) \
 566 do { \
 567 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 568 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 569 } while (0)
 570
 571 #define show_temp_reg(reg) \
 572 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 573 { \
 574         struct w83627hf_data *data = w83627hf_update_device(dev); \
 575         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 576                 return sprintf(buf,"%ld\n", \
 577                         (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 578         } else {        /* TEMP1 */ \
 579                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 580         } \
 581 }
 582 show_temp_reg(temp);
 583 show_temp_reg(temp_max);
 584 show_temp_reg(temp_max_hyst);
 585
 586 #define store_temp_reg(REG, reg) \
 587 static ssize_t \
 588 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 589 { \
 590         struct i2c_client *client = to_i2c_client(dev); \
 591         struct w83627hf_data *data = i2c_get_clientdata(client); \
 592         u32 val; \
 593          \
 594         val = simple_strtoul(buf, NULL, 10); \
 595          \
 596         down(&data->update_lock); \
 597          \
 598         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 599                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 600                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 601                                 data->temp_##reg##_add[nr-2]); \
 602         } else {        /* TEMP1 */ \
 603                 data->temp_##reg = TEMP_TO_REG(val); \
 604                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 605                         data->temp_##reg); \
 606         } \
 607          \
 608         up(&data->update_lock); \
 609         return count; \
 610 }
 611 store_temp_reg(OVER, max);
 612 store_temp_reg(HYST, max_hyst);
 613
 614 #define sysfs_temp_offset(offset) \
 615 static ssize_t \
 616 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 617 { \
 618         return show_temp(dev, buf, offset); \
 619 } \
 620 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 621
 622 #define sysfs_temp_reg_offset(reg, offset) \
 623 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 624 { \
 625         return show_temp_##reg (dev, buf, offset); \
 626 } \
 627 static ssize_t \
 628 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
 629                               const char *buf, size_t count) \
 630 { \
 631         return store_temp_##reg (dev, buf, count, offset); \
 632 } \
 633 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
 634                   show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 635
 636 #define sysfs_temp_offsets(offset) \
 637 sysfs_temp_offset(offset) \
 638 sysfs_temp_reg_offset(max, offset) \
 639 sysfs_temp_reg_offset(max_hyst, offset)
 640
 641 sysfs_temp_offsets(1);
 642 sysfs_temp_offsets(2);
 643 sysfs_temp_offsets(3);
 644
 645 #define device_create_file_temp(client, offset) \
 646 do { \
 647 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 648 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 649 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 650 } while (0)
 651
 652 static ssize_t
 653 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 654 {
 655         struct w83627hf_data *data = w83627hf_update_device(dev);
 656         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 657 }
 658 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 659 #define device_create_file_vid(client) \
 660 device_create_file(&client->dev, &dev_attr_cpu0_vid)
 661
 662 static ssize_t
 663 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 664 {
 665         struct w83627hf_data *data = w83627hf_update_device(dev);
 666         return sprintf(buf, "%ld\n", (long) data->vrm);
 667 }
 668 static ssize_t
 669 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 670 {
 671         struct i2c_client *client = to_i2c_client(dev);
 672         struct w83627hf_data *data = i2c_get_clientdata(client);
 673         u32 val;
 674
 675         val = simple_strtoul(buf, NULL, 10);
 676         data->vrm = val;
 677
 678         return count;
 679 }
 680 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 681 #define device_create_file_vrm(client) \
 682 device_create_file(&client->dev, &dev_attr_vrm)
 683
 684 static ssize_t
 685 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 686 {
 687         struct w83627hf_data *data = w83627hf_update_device(dev);
 688         return sprintf(buf, "%ld\n", (long) data->alarms);
 689 }
 690 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 691 #define device_create_file_alarms(client) \
 692 device_create_file(&client->dev, &dev_attr_alarms)
 693
 694 #define show_beep_reg(REG, reg) \
 695 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 696 { \
 697         struct w83627hf_data *data = w83627hf_update_device(dev); \
 698         return sprintf(buf,"%ld\n", \
 699                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 700 }
 701 show_beep_reg(ENABLE, enable)
 702 show_beep_reg(MASK, mask)
 703
 704 #define BEEP_ENABLE                     0       /* Store beep_enable */
 705 #define BEEP_MASK                       1       /* Store beep_mask */
 706
 707 static ssize_t
 708 store_beep_reg(struct device *dev, const char *buf, size_t count,
 709                int update_mask)
 710 {
 711         struct i2c_client *client = to_i2c_client(dev);
 712         struct w83627hf_data *data = i2c_get_clientdata(client);
 713         u32 val, val2;
 714
 715         val = simple_strtoul(buf, NULL, 10);
 716
 717         down(&data->update_lock);
 718
 719         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 720                 data->beep_mask = BEEP_MASK_TO_REG(val);
 721                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
 722                                     data->beep_mask & 0xff);
 723                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
 724                                     ((data->beep_mask) >> 16) & 0xff);
 725                 val2 = (data->beep_mask >> 8) & 0x7f;
 726         } else {                /* We are storing beep_enable */
 727                 val2 =
 728                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 729                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 730         }
 731
 732         w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
 733                             val2 | data->beep_enable << 7);
 734
 735         up(&data->update_lock);
 736         return count;
 737 }
 738
 739 #define sysfs_beep(REG, reg) \
 740 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 741 { \
 742         return show_beep_##reg(dev, attr, buf); \
 743 } \
 744 static ssize_t \
 745 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 746 { \
 747         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 748 } \
 749 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 750                   show_regs_beep_##reg, store_regs_beep_##reg);
 751
 752 sysfs_beep(ENABLE, enable);
 753 sysfs_beep(MASK, mask);
 754
 755 #define device_create_file_beep(client) \
 756 do { \
 757 device_create_file(&client->dev, &dev_attr_beep_enable); \
 758 device_create_file(&client->dev, &dev_attr_beep_mask); \
 759 } while (0)
 760
 761 static ssize_t
 762 show_fan_div_reg(struct device *dev, char *buf, int nr)
 763 {
 764         struct w83627hf_data *data = w83627hf_update_device(dev);
 765         return sprintf(buf, "%ld\n",
 766                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 767 }
 768
 769 /* Note: we save and restore the fan minimum here, because its value is
 770    determined in part by the fan divisor.  This follows the principle of
 771    least suprise; the user doesn't expect the fan minimum to change just
 772    because the divisor changed. */
 773 static ssize_t
 774 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 775 {
 776         struct i2c_client *client = to_i2c_client(dev);
 777         struct w83627hf_data *data = i2c_get_clientdata(client);
 778         unsigned long min;
 779         u8 reg;
 780         unsigned long val = simple_strtoul(buf, NULL, 10);
 781
 782         down(&data->update_lock);
 783
 784         /* Save fan_min */
 785         min = FAN_FROM_REG(data->fan_min[nr],
 786                            DIV_FROM_REG(data->fan_div[nr]));
 787
 788         data->fan_div[nr] = DIV_TO_REG(val);
 789
 790         reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 791                & (nr==0 ? 0xcf : 0x3f))
 792             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 793         w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 794
 795         reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
 796                & ~(1 << (5 + nr)))
 797             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 798         w83627hf_write_value(client, W83781D_REG_VBAT, reg);
 799
 800         /* Restore fan_min */
 801         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 802         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 803
 804         up(&data->update_lock);
 805         return count;
 806 }
 807
 808 #define sysfs_fan_div(offset) \
 809 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 810 { \
 811         return show_fan_div_reg(dev, buf, offset); \
 812 } \
 813 static ssize_t \
 814 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
 815                             const char *buf, size_t count) \
 816 { \
 817         return store_fan_div_reg(dev, buf, count, offset - 1); \
 818 } \
 819 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
 820                   show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 821
 822 sysfs_fan_div(1);
 823 sysfs_fan_div(2);
 824 sysfs_fan_div(3);
 825
 826 #define device_create_file_fan_div(client, offset) \
 827 do { \
 828 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 829 } while (0)
 830
 831 static ssize_t
 832 show_pwm_reg(struct device *dev, char *buf, int nr)
 833 {
 834         struct w83627hf_data *data = w83627hf_update_device(dev);
 835         return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
 836 }
 837
 838 static ssize_t
 839 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 840 {
 841         struct i2c_client *client = to_i2c_client(dev);
 842         struct w83627hf_data *data = i2c_get_clientdata(client);
 843         u32 val;
 844
 845         val = simple_strtoul(buf, NULL, 10);
 846
 847         down(&data->update_lock);
 848
 849         if (data->type == w83627thf) {
 850                 /* bits 0-3 are reserved  in 627THF */
 851                 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
 852                 w83627hf_write_value(client,
 853                                      W836X7HF_REG_PWM(data->type, nr),
 854                                      data->pwm[nr - 1] |
 855                                      (w83627hf_read_value(client,
 856                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 857         } else {
 858                 data->pwm[nr - 1] = PWM_TO_REG(val);
 859                 w83627hf_write_value(client,
 860                                      W836X7HF_REG_PWM(data->type, nr),
 861                                      data->pwm[nr - 1]);
 862         }
 863
 864         up(&data->update_lock);
 865         return count;
 866 }
 867
 868 #define sysfs_pwm(offset) \
 869 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 870 { \
 871         return show_pwm_reg(dev, buf, offset); \
 872 } \
 873 static ssize_t \
 874 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 875 { \
 876         return store_pwm_reg(dev, buf, count, offset); \
 877 } \
 878 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 879                   show_regs_pwm_##offset, store_regs_pwm_##offset);
 880
 881 sysfs_pwm(1);
 882 sysfs_pwm(2);
 883 sysfs_pwm(3);
 884
 885 #define device_create_file_pwm(client, offset) \
 886 do { \
 887 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 888 } while (0)
 889
 890 static ssize_t
 891 show_sensor_reg(struct device *dev, char *buf, int nr)
 892 {
 893         struct w83627hf_data *data = w83627hf_update_device(dev);
 894         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 895 }
 896
 897 static ssize_t
 898 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 899 {
 900         struct i2c_client *client = to_i2c_client(dev);
 901         struct w83627hf_data *data = i2c_get_clientdata(client);
 902         u32 val, tmp;
 903
 904         val = simple_strtoul(buf, NULL, 10);
 905
 906         down(&data->update_lock);
 907
 908         switch (val) {
 909         case 1:         /* PII/Celeron diode */
 910                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 911                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 912                                     tmp | BIT_SCFG1[nr - 1]);
 913                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 914                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 915                                     tmp | BIT_SCFG2[nr - 1]);
 916                 data->sens[nr - 1] = val;
 917                 break;
 918         case 2:         /* 3904 */
 919                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 920                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 921                                     tmp | BIT_SCFG1[nr - 1]);
 922                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 923                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 924                                     tmp & ~BIT_SCFG2[nr - 1]);
 925                 data->sens[nr - 1] = val;
 926                 break;
 927         case W83781D_DEFAULT_BETA:      /* thermistor */
 928                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 929                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 930                                     tmp & ~BIT_SCFG1[nr - 1]);
 931                 data->sens[nr - 1] = val;
 932                 break;
 933         default:
 934                 dev_err(&client->dev,
 935                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 936                        (long) val, W83781D_DEFAULT_BETA);
 937                 break;
 938         }
 939
 940         up(&data->update_lock);
 941         return count;
 942 }
 943
 944 #define sysfs_sensor(offset) \
 945 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 946 { \
 947     return show_sensor_reg(dev, buf, offset); \
 948 } \
 949 static ssize_t \
 950 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 951 { \
 952     return store_sensor_reg(dev, buf, count, offset); \
 953 } \
 954 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 955                   show_regs_sensor_##offset, store_regs_sensor_##offset);
 956
 957 sysfs_sensor(1);
 958 sysfs_sensor(2);
 959 sysfs_sensor(3);
 960
 961 #define device_create_file_sensor(client, offset) \
 962 do { \
 963 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 964 } while (0)
 965
 966
 967 static int __init w83627hf_find(int sioaddr, unsigned short *addr)
 968 {
 969         u16 val;
 970
 971         REG = sioaddr;
 972         VAL = sioaddr + 1;
 973
 974         superio_enter();
 975         val= superio_inb(DEVID);
 976         if(val != W627_DEVID &&
 977            val != W627THF_DEVID &&
 978            val != W697_DEVID &&
 979            val != W637_DEVID) {
 980                 superio_exit();
 981                 return -ENODEV;
 982         }
 983
 984         superio_select(W83627HF_LD_HWM);
 985         val = (superio_inb(WINB_BASE_REG) << 8) |
 986                superio_inb(WINB_BASE_REG + 1);
 987         *addr = val & WINB_ALIGNMENT;
 988         if (*addr == 0 && force_addr == 0) {
 989                 superio_exit();
 990                 return -ENODEV;
 991         }
 992
 993         superio_exit();
 994         return 0;
 995 }
 996
 997 static int w83627hf_detect(struct i2c_adapter *adapter)
 998 {
 999         int val, kind;
1000         struct i2c_client *new_client;
1001         struct w83627hf_data *data;
1002         int err = 0;
1003         const char *client_name = "";
1004
1005         if(force_addr)
1006                 address = force_addr & WINB_ALIGNMENT;
1007
1008         if (!request_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE,
1009                             w83627hf_driver.name)) {
1010                 err = -EBUSY;
1011                 goto ERROR0;
1012         }
1013
1014         if(force_addr) {
1015                 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1016                 superio_enter();
1017                 superio_select(W83627HF_LD_HWM);
1018                 superio_outb(WINB_BASE_REG, address >> 8);
1019                 superio_outb(WINB_BASE_REG+1, address & 0xff);
1020                 superio_exit();
1021         }
1022
1023         superio_enter();
1024         val= superio_inb(DEVID);
1025         if(val == W627_DEVID)
1026                 kind = w83627hf;
1027         else if(val == W697_DEVID)
1028                 kind = w83697hf;
1029         else if(val == W627THF_DEVID)
1030                 kind = w83627thf;
1031         else if(val == W637_DEVID)
1032                 kind = w83637hf;
1033         else {
1034                 dev_info(&adapter->dev,
1035                          "Unsupported chip (dev_id=0x%02X).\n", val);
1036                 goto ERROR1;
1037         }
1038
1039         superio_select(W83627HF_LD_HWM);
1040         if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1041                 superio_outb(WINB_ACT_REG, 1);
1042         superio_exit();
1043
1044         /* OK. For now, we presume we have a valid client. We now create the
1045            client structure, even though we cannot fill it completely yet.
1046            But it allows us to access w83627hf_{read,write}_value. */
1047
1048         if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1049                 err = -ENOMEM;
1050                 goto ERROR1;
1051         }
1052         memset(data, 0, sizeof(struct w83627hf_data));
1053
1054         new_client = &data->client;
1055         i2c_set_clientdata(new_client, data);
1056         new_client->addr = address;
1057         init_MUTEX(&data->lock);
1058         new_client->adapter = adapter;
1059         new_client->driver = &w83627hf_driver;
1060         new_client->flags = 0;
1061
1062
1063         if (kind == w83627hf) {
1064                 client_name = "w83627hf";
1065         } else if (kind == w83627thf) {
1066                 client_name = "w83627thf";
1067         } else if (kind == w83697hf) {
1068                 client_name = "w83697hf";
1069         } else if (kind == w83637hf) {
1070                 client_name = "w83637hf";
1071         }
1072
1073         /* Fill in the remaining client fields and put into the global list */
1074         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1075         data->type = kind;
1076         data->valid = 0;
1077         init_MUTEX(&data->update_lock);
1078
1079         /* Tell the I2C layer a new client has arrived */
1080         if ((err = i2c_attach_client(new_client)))
1081                 goto ERROR2;
1082
1083         data->lm75 = NULL;
1084
1085         /* Initialize the chip */
1086         w83627hf_init_client(new_client);
1087
1088         /* A few vars need to be filled upon startup */
1089         data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1090         data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1091         data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1092
1093         /* Register sysfs hooks */
1094         data->class_dev = hwmon_device_register(&new_client->dev);
1095         if (IS_ERR(data->class_dev)) {
1096                 err = PTR_ERR(data->class_dev);
1097                 goto ERROR3;
1098         }
1099
1100         device_create_file_in(new_client, 0);
1101         if (kind != w83697hf)
1102                 device_create_file_in(new_client, 1);
1103         device_create_file_in(new_client, 2);
1104         device_create_file_in(new_client, 3);
1105         device_create_file_in(new_client, 4);
1106         if (kind != w83627thf && kind != w83637hf) {
1107                 device_create_file_in(new_client, 5);
1108                 device_create_file_in(new_client, 6);
1109         }
1110         device_create_file_in(new_client, 7);
1111         device_create_file_in(new_client, 8);
1112
1113         device_create_file_fan(new_client, 1);
1114         device_create_file_fan(new_client, 2);
1115         if (kind != w83697hf)
1116                 device_create_file_fan(new_client, 3);
1117
1118         device_create_file_temp(new_client, 1);
1119         device_create_file_temp(new_client, 2);
1120         if (kind != w83697hf)
1121                 device_create_file_temp(new_client, 3);
1122
1123         if (kind != w83697hf)
1124                 device_create_file_vid(new_client);
1125
1126         if (kind != w83697hf)
1127                 device_create_file_vrm(new_client);
1128
1129         device_create_file_fan_div(new_client, 1);
1130         device_create_file_fan_div(new_client, 2);
1131         if (kind != w83697hf)
1132                 device_create_file_fan_div(new_client, 3);
1133
1134         device_create_file_alarms(new_client);
1135
1136         device_create_file_beep(new_client);
1137
1138         device_create_file_pwm(new_client, 1);
1139         device_create_file_pwm(new_client, 2);
1140         if (kind == w83627thf || kind == w83637hf)
1141                 device_create_file_pwm(new_client, 3);
1142
1143         device_create_file_sensor(new_client, 1);
1144         device_create_file_sensor(new_client, 2);
1145         if (kind != w83697hf)
1146                 device_create_file_sensor(new_client, 3);
1147
1148         return 0;
1149
1150       ERROR3:
1151         i2c_detach_client(new_client);
1152       ERROR2:
1153         kfree(data);
1154       ERROR1:
1155         release_region(address + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1156       ERROR0:
1157         return err;
1158 }
1159
1160 static int w83627hf_detach_client(struct i2c_client *client)
1161 {
1162         struct w83627hf_data *data = i2c_get_clientdata(client);
1163         int err;
1164
1165         hwmon_device_unregister(data->class_dev);
1166
1167         if ((err = i2c_detach_client(client)))
1168                 return err;
1169
1170         release_region(client->addr + WINB_REGION_OFFSET, WINB_REGION_SIZE);
1171         kfree(data);
1172
1173         return 0;
1174 }
1175
1176
1177 /*
1178    ISA access must always be locked explicitly!
1179    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1180    would slow down the W83781D access and should not be necessary.
1181    There are some ugly typecasts here, but the good news is - they should
1182    nowhere else be necessary! */
1183 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1184 {
1185         struct w83627hf_data *data = i2c_get_clientdata(client);
1186         int res, word_sized;
1187
1188         down(&data->lock);
1189         word_sized = (((reg & 0xff00) == 0x100)
1190                    || ((reg & 0xff00) == 0x200))
1191                   && (((reg & 0x00ff) == 0x50)
1192                    || ((reg & 0x00ff) == 0x53)
1193                    || ((reg & 0x00ff) == 0x55));
1194         if (reg & 0xff00) {
1195                 outb_p(W83781D_REG_BANK,
1196                        client->addr + W83781D_ADDR_REG_OFFSET);
1197                 outb_p(reg >> 8,
1198                        client->addr + W83781D_DATA_REG_OFFSET);
1199         }
1200         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1201         res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1202         if (word_sized) {
1203                 outb_p((reg & 0xff) + 1,
1204                        client->addr + W83781D_ADDR_REG_OFFSET);
1205                 res =
1206                     (res << 8) + inb_p(client->addr +
1207                                        W83781D_DATA_REG_OFFSET);
1208         }
1209         if (reg & 0xff00) {
1210                 outb_p(W83781D_REG_BANK,
1211                        client->addr + W83781D_ADDR_REG_OFFSET);
1212                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1213         }
1214         up(&data->lock);
1215         return res;
1216 }
1217
1218 static int w83627thf_read_gpio5(struct i2c_client *client)
1219 {
1220         int res = 0xff, sel;
1221
1222         superio_enter();
1223         superio_select(W83627HF_LD_GPIO5);
1224
1225         /* Make sure these GPIO pins are enabled */
1226         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1227                 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1228                 goto exit;
1229         }
1230
1231         /* Make sure the pins are configured for input
1232            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1233         sel = superio_inb(W83627THF_GPIO5_IOSR);
1234         if ((sel & 0x1f) != 0x1f) {
1235                 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1236                         "function\n");
1237                 goto exit;
1238         }
1239
1240         dev_info(&client->dev, "Reading VID from GPIO5\n");
1241         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1242
1243 exit:
1244         superio_exit();
1245         return res;
1246 }
1247
1248 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1249 {
1250         struct w83627hf_data *data = i2c_get_clientdata(client);
1251         int word_sized;
1252
1253         down(&data->lock);
1254         word_sized = (((reg & 0xff00) == 0x100)
1255                    || ((reg & 0xff00) == 0x200))
1256                   && (((reg & 0x00ff) == 0x53)
1257                    || ((reg & 0x00ff) == 0x55));
1258         if (reg & 0xff00) {
1259                 outb_p(W83781D_REG_BANK,
1260                        client->addr + W83781D_ADDR_REG_OFFSET);
1261                 outb_p(reg >> 8,
1262                        client->addr + W83781D_DATA_REG_OFFSET);
1263         }
1264         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1265         if (word_sized) {
1266                 outb_p(value >> 8,
1267                        client->addr + W83781D_DATA_REG_OFFSET);
1268                 outb_p((reg & 0xff) + 1,
1269                        client->addr + W83781D_ADDR_REG_OFFSET);
1270         }
1271         outb_p(value & 0xff,
1272                client->addr + W83781D_DATA_REG_OFFSET);
1273         if (reg & 0xff00) {
1274                 outb_p(W83781D_REG_BANK,
1275                        client->addr + W83781D_ADDR_REG_OFFSET);
1276                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1277         }
1278         up(&data->lock);
1279         return 0;
1280 }
1281
1282 static void w83627hf_init_client(struct i2c_client *client)
1283 {
1284         struct w83627hf_data *data = i2c_get_clientdata(client);
1285         int i;
1286         int type = data->type;
1287         u8 tmp;
1288
1289         if (reset) {
1290                 /* Resetting the chip has been the default for a long time,
1291                    but repeatedly caused problems (fans going to full
1292                    speed...) so it is now optional. It might even go away if
1293                    nobody reports it as being useful, as I see very little
1294                    reason why this would be needed at all. */
1295                 dev_info(&client->dev, "If reset=1 solved a problem you were "
1296                          "having, please report!\n");
1297
1298                 /* save this register */
1299                 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1300                 /* Reset all except Watchdog values and last conversion values
1301                    This sets fan-divs to 2, among others */
1302                 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1303                 /* Restore the register and disable power-on abnormal beep.
1304                    This saves FAN 1/2/3 input/output values set by BIOS. */
1305                 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1306                 /* Disable master beep-enable (reset turns it on).
1307                    Individual beeps should be reset to off but for some reason
1308                    disabling this bit helps some people not get beeped */
1309                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1310         }
1311
1312         /* Minimize conflicts with other winbond i2c-only clients...  */
1313         /* disable i2c subclients... how to disable main i2c client?? */
1314         /* force i2c address to relatively uncommon address */
1315         w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1316         w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1317
1318         /* Read VID only once */
1319         if (w83627hf == data->type || w83637hf == data->type) {
1320                 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1321                 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1322                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1323         } else if (w83627thf == data->type) {
1324                 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1325         }
1326
1327         /* Read VRM & OVT Config only once */
1328         if (w83627thf == data->type || w83637hf == data->type) {
1329                 data->vrm_ovt =
1330                         w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1331                 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1332         } else {
1333                 /* Convert VID to voltage based on default VRM */
1334                 data->vrm = vid_which_vrm();
1335         }
1336
1337         tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1338         for (i = 1; i <= 3; i++) {
1339                 if (!(tmp & BIT_SCFG1[i - 1])) {
1340                         data->sens[i - 1] = W83781D_DEFAULT_BETA;
1341                 } else {
1342                         if (w83627hf_read_value
1343                             (client,
1344                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1345                                 data->sens[i - 1] = 1;
1346                         else
1347                                 data->sens[i - 1] = 2;
1348                 }
1349                 if ((type == w83697hf) && (i == 2))
1350                         break;
1351         }
1352
1353         if(init) {
1354                 /* Enable temp2 */
1355                 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1356                 if (tmp & 0x01) {
1357                         dev_warn(&client->dev, "Enabling temp2, readings "
1358                                  "might not make sense\n");
1359                         w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1360                                 tmp & 0xfe);
1361                 }
1362
1363                 /* Enable temp3 */
1364                 if (type != w83697hf) {
1365                         tmp = w83627hf_read_value(client,
1366                                 W83781D_REG_TEMP3_CONFIG);
1367                         if (tmp & 0x01) {
1368                                 dev_warn(&client->dev, "Enabling temp3, "
1369                                          "readings might not make sense\n");
1370                                 w83627hf_write_value(client,
1371                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1372                         }
1373                 }
1374
1375                 /* enable comparator mode for temp2 and temp3 so
1376                    alarm indication will work correctly */
1377                 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1378                 if (!(i & 0x40))
1379                         w83627hf_write_value(client, W83781D_REG_IRQ,
1380                                             i | 0x40);
1381         }
1382
1383         /* Start monitoring */
1384         w83627hf_write_value(client, W83781D_REG_CONFIG,
1385                             (w83627hf_read_value(client,
1386                                                 W83781D_REG_CONFIG) & 0xf7)
1387                             | 0x01);
1388 }
1389
1390 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1391 {
1392         struct i2c_client *client = to_i2c_client(dev);
1393         struct w83627hf_data *data = i2c_get_clientdata(client);
1394         int i;
1395
1396         down(&data->update_lock);
1397
1398         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1399             || !data->valid) {
1400                 for (i = 0; i <= 8; i++) {
1401                         /* skip missing sensors */
1402                         if (((data->type == w83697hf) && (i == 1)) ||
1403                             ((data->type == w83627thf || data->type == w83637hf)
1404                             && (i == 4 || i == 5)))
1405                                 continue;
1406                         data->in[i] =
1407                             w83627hf_read_value(client, W83781D_REG_IN(i));
1408                         data->in_min[i] =
1409                             w83627hf_read_value(client,
1410                                                W83781D_REG_IN_MIN(i));
1411                         data->in_max[i] =
1412                             w83627hf_read_value(client,
1413                                                W83781D_REG_IN_MAX(i));
1414                 }
1415                 for (i = 1; i <= 3; i++) {
1416                         data->fan[i - 1] =
1417                             w83627hf_read_value(client, W83781D_REG_FAN(i));
1418                         data->fan_min[i - 1] =
1419                             w83627hf_read_value(client,
1420                                                W83781D_REG_FAN_MIN(i));
1421                 }
1422                 for (i = 1; i <= 3; i++) {
1423                         u8 tmp = w83627hf_read_value(client,
1424                                 W836X7HF_REG_PWM(data->type, i));
1425                         /* bits 0-3 are reserved  in 627THF */
1426                         if (data->type == w83627thf)
1427                                 tmp &= 0xf0;
1428                         data->pwm[i - 1] = tmp;
1429                         if(i == 2 &&
1430                            (data->type == w83627hf || data->type == w83697hf))
1431                                 break;
1432                 }
1433
1434                 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1435                 data->temp_max =
1436                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1437                 data->temp_max_hyst =
1438                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1439                 data->temp_add[0] =
1440                     w83627hf_read_value(client, W83781D_REG_TEMP(2));
1441                 data->temp_max_add[0] =
1442                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1443                 data->temp_max_hyst_add[0] =
1444                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1445                 if (data->type != w83697hf) {
1446                         data->temp_add[1] =
1447                           w83627hf_read_value(client, W83781D_REG_TEMP(3));
1448                         data->temp_max_add[1] =
1449                           w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1450                         data->temp_max_hyst_add[1] =
1451                           w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1452                 }
1453
1454                 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1455                 data->fan_div[0] = (i >> 4) & 0x03;
1456                 data->fan_div[1] = (i >> 6) & 0x03;
1457                 if (data->type != w83697hf) {
1458                         data->fan_div[2] = (w83627hf_read_value(client,
1459                                                W83781D_REG_PIN) >> 6) & 0x03;
1460                 }
1461                 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1462                 data->fan_div[0] |= (i >> 3) & 0x04;
1463                 data->fan_div[1] |= (i >> 4) & 0x04;
1464                 if (data->type != w83697hf)
1465                         data->fan_div[2] |= (i >> 5) & 0x04;
1466                 data->alarms =
1467                     w83627hf_read_value(client, W83781D_REG_ALARM1) |
1468                     (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1469                     (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1470                 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1471                 data->beep_enable = i >> 7;
1472                 data->beep_mask = ((i & 0x7f) << 8) |
1473                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1474                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1475                 data->last_updated = jiffies;
1476                 data->valid = 1;
1477         }
1478
1479         up(&data->update_lock);
1480
1481         return data;
1482 }
1483
1484 static int __init sensors_w83627hf_init(void)
1485 {
1486         if (w83627hf_find(0x2e, &address)
1487          && w83627hf_find(0x4e, &address)) {
1488                 return -ENODEV;
1489         }
1490
1491         return i2c_isa_add_driver(&w83627hf_driver);
1492 }
1493
1494 static void __exit sensors_w83627hf_exit(void)
1495 {
1496         i2c_isa_del_driver(&w83627hf_driver);
1497 }
1498
1499 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1500               "Philip Edelbrock <phil@netroedge.com>, "
1501               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1502 MODULE_DESCRIPTION("W83627HF driver");
1503 MODULE_LICENSE("GPL");
1504
1505 module_init(sensors_w83627hf_init);
1506 module_exit(sensors_w83627hf_exit);