2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include "tilcdc_drv.h"
21 #include "tilcdc_regs.h"
22 #include "tilcdc_tfp410.h"
23 #include "tilcdc_slave.h"
25 #include "drm_fb_helper.h"
27 static LIST_HEAD(module_list);
29 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
30 const struct tilcdc_module_ops *funcs)
34 INIT_LIST_HEAD(&mod->list);
35 list_add(&mod->list, &module_list);
38 void tilcdc_module_cleanup(struct tilcdc_module *mod)
43 static struct of_device_id tilcdc_of_match[];
45 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
46 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
48 return drm_fb_cma_create(dev, file_priv, mode_cmd);
51 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
53 struct tilcdc_drm_private *priv = dev->dev_private;
55 drm_fbdev_cma_hotplug_event(priv->fbdev);
58 static const struct drm_mode_config_funcs mode_config_funcs = {
59 .fb_create = tilcdc_fb_create,
60 .output_poll_changed = tilcdc_fb_output_poll_changed,
63 static int modeset_init(struct drm_device *dev)
65 struct tilcdc_drm_private *priv = dev->dev_private;
66 struct tilcdc_module *mod;
68 drm_mode_config_init(dev);
70 priv->crtc = tilcdc_crtc_create(dev);
72 list_for_each_entry(mod, &module_list, list) {
73 DBG("loading module: %s", mod->name);
74 mod->funcs->modeset_init(mod, dev);
77 if ((priv->num_encoders = 0) || (priv->num_connectors == 0)) {
79 dev_err(dev->dev, "no encoders/connectors found\n");
83 dev->mode_config.min_width = 0;
84 dev->mode_config.min_height = 0;
85 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
86 dev->mode_config.max_height = 2048;
87 dev->mode_config.funcs = &mode_config_funcs;
92 #ifdef CONFIG_CPU_FREQ
93 static int cpufreq_transition(struct notifier_block *nb,
94 unsigned long val, void *data)
96 struct tilcdc_drm_private *priv = container_of(nb,
97 struct tilcdc_drm_private, freq_transition);
98 if (val == CPUFREQ_POSTCHANGE) {
99 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
100 priv->lcd_fck_rate = clk_get_rate(priv->clk);
101 tilcdc_crtc_update_clk(priv->crtc);
113 static int tilcdc_unload(struct drm_device *dev)
115 struct tilcdc_drm_private *priv = dev->dev_private;
116 struct tilcdc_module *mod, *cur;
118 drm_kms_helper_poll_fini(dev);
119 drm_mode_config_cleanup(dev);
120 drm_vblank_cleanup(dev);
122 pm_runtime_get_sync(dev->dev);
123 drm_irq_uninstall(dev);
124 pm_runtime_put_sync(dev->dev);
126 #ifdef CONFIG_CPU_FREQ
127 cpufreq_unregister_notifier(&priv->freq_transition,
128 CPUFREQ_TRANSITION_NOTIFIER);
137 flush_workqueue(priv->wq);
138 destroy_workqueue(priv->wq);
140 dev->dev_private = NULL;
142 pm_runtime_disable(dev->dev);
144 list_for_each_entry_safe(mod, cur, &module_list, list) {
145 DBG("destroying module: %s", mod->name);
146 mod->funcs->destroy(mod);
154 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
156 struct platform_device *pdev = dev->platformdev;
157 struct device_node *node = pdev->dev.of_node;
158 struct tilcdc_drm_private *priv;
159 struct resource *res;
162 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
164 dev_err(dev->dev, "failed to allocate private data\n");
168 dev->dev_private = priv;
170 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
172 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
174 dev_err(dev->dev, "failed to get memory resource\n");
179 priv->mmio = ioremap_nocache(res->start, resource_size(res));
181 dev_err(dev->dev, "failed to ioremap\n");
186 priv->clk = clk_get(dev->dev, "fck");
187 if (IS_ERR(priv->clk)) {
188 dev_err(dev->dev, "failed to get functional clock\n");
193 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
194 if (IS_ERR(priv->clk)) {
195 dev_err(dev->dev, "failed to get display clock\n");
200 #ifdef CONFIG_CPU_FREQ
201 priv->lcd_fck_rate = clk_get_rate(priv->clk);
202 priv->freq_transition.notifier_call = cpufreq_transition;
203 ret = cpufreq_register_notifier(&priv->freq_transition,
204 CPUFREQ_TRANSITION_NOTIFIER);
206 dev_err(dev->dev, "failed to register cpufreq notifier\n");
211 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
212 priv->max_bandwidth = 1280 * 1024 * 60;
214 pm_runtime_enable(dev->dev);
216 /* Determine LCD IP Version */
217 pm_runtime_get_sync(dev->dev);
218 switch (tilcdc_read(dev, LCDC_PID_REG)) {
227 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
228 "defaulting to LCD revision 1\n",
229 tilcdc_read(dev, LCDC_PID_REG));
234 pm_runtime_put_sync(dev->dev);
236 ret = modeset_init(dev);
238 dev_err(dev->dev, "failed to initialize mode setting\n");
242 ret = drm_vblank_init(dev, 1);
244 dev_err(dev->dev, "failed to initialize vblank\n");
248 pm_runtime_get_sync(dev->dev);
249 ret = drm_irq_install(dev);
250 pm_runtime_put_sync(dev->dev);
252 dev_err(dev->dev, "failed to install IRQ handler\n");
256 platform_set_drvdata(pdev, dev);
258 priv->fbdev = drm_fbdev_cma_init(dev, 16,
259 dev->mode_config.num_crtc,
260 dev->mode_config.num_connector);
262 drm_kms_helper_poll_init(dev);
271 static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
273 struct tilcdc_drm_private *priv = dev->dev_private;
275 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
278 static void tilcdc_lastclose(struct drm_device *dev)
280 struct tilcdc_drm_private *priv = dev->dev_private;
281 drm_fbdev_cma_restore_mode(priv->fbdev);
284 static irqreturn_t tilcdc_irq(DRM_IRQ_ARGS)
286 struct drm_device *dev = arg;
287 struct tilcdc_drm_private *priv = dev->dev_private;
288 return tilcdc_crtc_irq(priv->crtc);
291 static void tilcdc_irq_preinstall(struct drm_device *dev)
293 tilcdc_clear_irqstatus(dev, 0xffffffff);
296 static int tilcdc_irq_postinstall(struct drm_device *dev)
298 struct tilcdc_drm_private *priv = dev->dev_private;
300 /* enable FIFO underflow irq: */
301 if (priv->rev == 1) {
302 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
304 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
310 static void tilcdc_irq_uninstall(struct drm_device *dev)
312 struct tilcdc_drm_private *priv = dev->dev_private;
314 /* disable irqs that we might have enabled: */
315 if (priv->rev == 1) {
316 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
317 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
318 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
320 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
321 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
322 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
328 static void enable_vblank(struct drm_device *dev, bool enable)
330 struct tilcdc_drm_private *priv = dev->dev_private;
333 if (priv->rev == 1) {
334 reg = LCDC_DMA_CTRL_REG;
335 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
337 reg = LCDC_INT_ENABLE_SET_REG;
338 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
339 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
343 tilcdc_set(dev, reg, mask);
345 tilcdc_clear(dev, reg, mask);
348 static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
350 enable_vblank(dev, true);
354 static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
356 enable_vblank(dev, false);
359 #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
360 static const struct {
366 #define REG(rev, save, reg) { #reg, rev, save, reg }
367 /* exists in revision 1: */
368 REG(1, false, LCDC_PID_REG),
369 REG(1, true, LCDC_CTRL_REG),
370 REG(1, false, LCDC_STAT_REG),
371 REG(1, true, LCDC_RASTER_CTRL_REG),
372 REG(1, true, LCDC_RASTER_TIMING_0_REG),
373 REG(1, true, LCDC_RASTER_TIMING_1_REG),
374 REG(1, true, LCDC_RASTER_TIMING_2_REG),
375 REG(1, true, LCDC_DMA_CTRL_REG),
376 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
377 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
378 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
379 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
380 /* new in revision 2: */
381 REG(2, false, LCDC_RAW_STAT_REG),
382 REG(2, false, LCDC_MASKED_STAT_REG),
383 REG(2, false, LCDC_INT_ENABLE_SET_REG),
384 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
385 REG(2, false, LCDC_END_OF_INT_IND_REG),
386 REG(2, true, LCDC_CLK_ENABLE_REG),
387 REG(2, true, LCDC_INT_ENABLE_SET_REG),
392 #ifdef CONFIG_DEBUG_FS
393 static int tilcdc_regs_show(struct seq_file *m, void *arg)
395 struct drm_info_node *node = (struct drm_info_node *) m->private;
396 struct drm_device *dev = node->minor->dev;
397 struct tilcdc_drm_private *priv = dev->dev_private;
400 pm_runtime_get_sync(dev->dev);
402 seq_printf(m, "revision: %d\n", priv->rev);
404 for (i = 0; i < ARRAY_SIZE(registers); i++)
405 if (priv->rev >= registers[i].rev)
406 seq_printf(m, "%s:\t %08x\n", registers[i].name,
407 tilcdc_read(dev, registers[i].reg));
409 pm_runtime_put_sync(dev->dev);
414 static int tilcdc_mm_show(struct seq_file *m, void *arg)
416 struct drm_info_node *node = (struct drm_info_node *) m->private;
417 struct drm_device *dev = node->minor->dev;
418 return drm_mm_dump_table(m, dev->mm_private);
421 static struct drm_info_list tilcdc_debugfs_list[] = {
422 { "regs", tilcdc_regs_show, 0 },
423 { "mm", tilcdc_mm_show, 0 },
424 { "fb", drm_fb_cma_debugfs_show, 0 },
427 static int tilcdc_debugfs_init(struct drm_minor *minor)
429 struct drm_device *dev = minor->dev;
430 struct tilcdc_module *mod;
433 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
434 ARRAY_SIZE(tilcdc_debugfs_list),
435 minor->debugfs_root, minor);
437 list_for_each_entry(mod, &module_list, list)
438 if (mod->funcs->debugfs_init)
439 mod->funcs->debugfs_init(mod, minor);
442 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
449 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
451 struct tilcdc_module *mod;
452 drm_debugfs_remove_files(tilcdc_debugfs_list,
453 ARRAY_SIZE(tilcdc_debugfs_list), minor);
455 list_for_each_entry(mod, &module_list, list)
456 if (mod->funcs->debugfs_cleanup)
457 mod->funcs->debugfs_cleanup(mod, minor);
461 static const struct file_operations fops = {
462 .owner = THIS_MODULE,
464 .release = drm_release,
465 .unlocked_ioctl = drm_ioctl,
467 .compat_ioctl = drm_compat_ioctl,
471 .fasync = drm_fasync,
473 .mmap = drm_gem_cma_mmap,
476 static struct drm_driver tilcdc_driver = {
477 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
479 .unload = tilcdc_unload,
480 .preclose = tilcdc_preclose,
481 .lastclose = tilcdc_lastclose,
482 .irq_handler = tilcdc_irq,
483 .irq_preinstall = tilcdc_irq_preinstall,
484 .irq_postinstall = tilcdc_irq_postinstall,
485 .irq_uninstall = tilcdc_irq_uninstall,
486 .get_vblank_counter = drm_vblank_count,
487 .enable_vblank = tilcdc_enable_vblank,
488 .disable_vblank = tilcdc_disable_vblank,
489 .gem_free_object = drm_gem_cma_free_object,
490 .gem_vm_ops = &drm_gem_cma_vm_ops,
491 .dumb_create = drm_gem_cma_dumb_create,
492 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
493 .dumb_destroy = drm_gem_cma_dumb_destroy,
494 #ifdef CONFIG_DEBUG_FS
495 .debugfs_init = tilcdc_debugfs_init,
496 .debugfs_cleanup = tilcdc_debugfs_cleanup,
500 .desc = "TI LCD Controller DRM",
510 #ifdef CONFIG_PM_SLEEP
511 static int tilcdc_pm_suspend(struct device *dev)
513 struct drm_device *ddev = dev_get_drvdata(dev);
514 struct tilcdc_drm_private *priv = ddev->dev_private;
517 drm_kms_helper_poll_disable(ddev);
519 /* Save register state: */
520 for (i = 0; i < ARRAY_SIZE(registers); i++)
521 if (registers[i].save && (priv->rev >= registers[i].rev))
522 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
527 static int tilcdc_pm_resume(struct device *dev)
529 struct drm_device *ddev = dev_get_drvdata(dev);
530 struct tilcdc_drm_private *priv = ddev->dev_private;
533 /* Restore register state: */
534 for (i = 0; i < ARRAY_SIZE(registers); i++)
535 if (registers[i].save && (priv->rev >= registers[i].rev))
536 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
538 drm_kms_helper_poll_enable(ddev);
544 static const struct dev_pm_ops tilcdc_pm_ops = {
545 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
552 static int tilcdc_pdev_probe(struct platform_device *pdev)
554 /* bail out early if no DT data: */
555 if (!pdev->dev.of_node) {
556 dev_err(&pdev->dev, "device-tree data is missing\n");
560 return drm_platform_init(&tilcdc_driver, pdev);
563 static int tilcdc_pdev_remove(struct platform_device *pdev)
565 drm_platform_exit(&tilcdc_driver, pdev);
570 static struct of_device_id tilcdc_of_match[] = {
571 { .compatible = "ti,am33xx-tilcdc", },
574 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
576 static struct platform_driver tilcdc_platform_driver = {
577 .probe = tilcdc_pdev_probe,
578 .remove = tilcdc_pdev_remove,
580 .owner = THIS_MODULE,
582 .pm = &tilcdc_pm_ops,
583 .of_match_table = tilcdc_of_match,
587 static int __init tilcdc_drm_init(void)
590 tilcdc_tfp410_init();
592 return platform_driver_register(&tilcdc_platform_driver);
595 static void __exit tilcdc_drm_fini(void)
598 tilcdc_tfp410_fini();
600 platform_driver_unregister(&tilcdc_platform_driver);
603 late_initcall(tilcdc_drm_init);
604 module_exit(tilcdc_drm_fini);
606 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
607 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
608 MODULE_LICENSE("GPL");