Pileus Git - ~andy/linux/blob - drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "omap_drv.h"
  21
  22 #include "drm_crtc_helper.h"
  23 #include "drm_fb_helper.h"
  24 #include "omap_dmm_tiler.h"
  25
  26 #define DRIVER_NAME             MODULE_NAME
  27 #define DRIVER_DESC             "OMAP DRM"
  28 #define DRIVER_DATE             "20110917"
  29 #define DRIVER_MAJOR            1
  30 #define DRIVER_MINOR            0
  31 #define DRIVER_PATCHLEVEL       0
  32
  33 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  34
  35 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  36 module_param(num_crtc, int, 0600);
  37
  38 /*
  39  * mode config funcs
  40  */
  41
  42 /* Notes about mapping DSS and DRM entities:
  43  *    CRTC:        overlay
  44  *    encoder:     manager.. with some extension to allow one primary CRTC
  45  *                 and zero or more video CRTC's to be mapped to one encoder?
  46  *    connector:   dssdev.. manager can be attached/detached from different
  47  *                 devices
  48  */
  49
  50 static void omap_fb_output_poll_changed(struct drm_device *dev)
  51 {
  52         struct omap_drm_private *priv = dev->dev_private;
  53         DBG("dev=%p", dev);
  54         if (priv->fbdev)
  55                 drm_fb_helper_hotplug_event(priv->fbdev);
  56 }
  57
  58 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
  59         .fb_create = omap_framebuffer_create,
  60         .output_poll_changed = omap_fb_output_poll_changed,
  61 };
  62
  63 static int get_connector_type(struct omap_dss_device *dssdev)
  64 {
  65         switch (dssdev->type) {
  66         case OMAP_DISPLAY_TYPE_HDMI:
  67                 return DRM_MODE_CONNECTOR_HDMIA;
  68         case OMAP_DISPLAY_TYPE_DVI:
  69                 return DRM_MODE_CONNECTOR_DVID;
  70         default:
  71                 return DRM_MODE_CONNECTOR_Unknown;
  72         }
  73 }
  74
  75 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
  76 {
  77         struct omap_drm_private *priv = dev->dev_private;
  78         int i;
  79
  80         for (i = 0; i < priv->num_crtcs; i++) {
  81                 struct drm_crtc *crtc = priv->crtcs[i];
  82
  83                 if (omap_crtc_channel(crtc) == channel)
  84                         return true;
  85         }
  86
  87         return false;
  88 }
  89
  90 static int omap_modeset_init(struct drm_device *dev)
  91 {
  92         struct omap_drm_private *priv = dev->dev_private;
  93         struct omap_dss_device *dssdev = NULL;
  94         int num_ovls = dss_feat_get_num_ovls();
  95         int num_mgrs = dss_feat_get_num_mgrs();
  96         int num_crtcs;
  97         int i, id = 0;
  98         int r;
  99
 100         omap_crtc_pre_init();
 101
 102         drm_mode_config_init(dev);
 103
 104         omap_drm_irq_install(dev);
 105
 106         /*
 107          * We usually don't want to create a CRTC for each manager, at least
 108          * not until we have a way to expose private planes to userspace.
 109          * Otherwise there would not be enough video pipes left for drm planes.
 110          * We use the num_crtc argument to limit the number of crtcs we create.
 111          */
 112         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 113
 114         dssdev = NULL;
 115
 116         for_each_dss_dev(dssdev) {
 117                 struct drm_connector *connector;
 118                 struct drm_encoder *encoder;
 119                 enum omap_channel channel;
 120                 struct omap_overlay_manager *mgr;
 121
 122                 if (!dssdev->driver) {
 123                         dev_warn(dev->dev, "%s has no driver.. skipping it\n",
 124                                         dssdev->name);
 125                         continue;
 126                 }
 127
 128                 if (!(dssdev->driver->get_timings ||
 129                                         dssdev->driver->read_edid)) {
 130                         dev_warn(dev->dev, "%s driver does not support "
 131                                 "get_timings or read_edid.. skipping it!\n",
 132                                 dssdev->name);
 133                         continue;
 134                 }
 135
 136                 r = dssdev->driver->connect(dssdev);
 137                 if (r) {
 138                         dev_err(dev->dev, "could not connect display: %s\n",
 139                                         dssdev->name);
 140                         continue;
 141                 }
 142
 143                 encoder = omap_encoder_init(dev, dssdev);
 144
 145                 if (!encoder) {
 146                         dev_err(dev->dev, "could not create encoder: %s\n",
 147                                         dssdev->name);
 148                         return -ENOMEM;
 149                 }
 150
 151                 connector = omap_connector_init(dev,
 152                                 get_connector_type(dssdev), dssdev, encoder);
 153
 154                 if (!connector) {
 155                         dev_err(dev->dev, "could not create connector: %s\n",
 156                                         dssdev->name);
 157                         return -ENOMEM;
 158                 }
 159
 160                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 161                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 162
 163                 priv->encoders[priv->num_encoders++] = encoder;
 164                 priv->connectors[priv->num_connectors++] = connector;
 165
 166                 drm_mode_connector_attach_encoder(connector, encoder);
 167
 168                 /*
 169                  * if we have reached the limit of the crtcs we are allowed to
 170                  * create, let's not try to look for a crtc for this
 171                  * panel/encoder and onwards, we will, of course, populate the
 172                  * the possible_crtcs field for all the encoders with the final
 173                  * set of crtcs we create
 174                  */
 175                 if (id == num_crtcs)
 176                         continue;
 177
 178                 /*
 179                  * get the recommended DISPC channel for this encoder. For now,
 180                  * we only try to get create a crtc out of the recommended, the
 181                  * other possible channels to which the encoder can connect are
 182                  * not considered.
 183                  */
 184
 185                 mgr = omapdss_find_mgr_from_display(dssdev);
 186                 channel = mgr->id;
 187                 /*
 188                  * if this channel hasn't already been taken by a previously
 189                  * allocated crtc, we create a new crtc for it
 190                  */
 191                 if (!channel_used(dev, channel)) {
 192                         struct drm_plane *plane;
 193                         struct drm_crtc *crtc;
 194
 195                         plane = omap_plane_init(dev, id, true);
 196                         crtc = omap_crtc_init(dev, plane, channel, id);
 197
 198                         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 199                         priv->crtcs[id] = crtc;
 200                         priv->num_crtcs++;
 201
 202                         priv->planes[id] = plane;
 203                         priv->num_planes++;
 204
 205                         id++;
 206                 }
 207         }
 208
 209         /*
 210          * we have allocated crtcs according to the need of the panels/encoders,
 211          * adding more crtcs here if needed
 212          */
 213         for (; id < num_crtcs; id++) {
 214
 215                 /* find a free manager for this crtc */
 216                 for (i = 0; i < num_mgrs; i++) {
 217                         if (!channel_used(dev, i)) {
 218                                 struct drm_plane *plane;
 219                                 struct drm_crtc *crtc;
 220
 221                                 plane = omap_plane_init(dev, id, true);
 222                                 crtc = omap_crtc_init(dev, plane, i, id);
 223
 224                                 BUG_ON(priv->num_crtcs >=
 225                                         ARRAY_SIZE(priv->crtcs));
 226
 227                                 priv->crtcs[id] = crtc;
 228                                 priv->num_crtcs++;
 229
 230                                 priv->planes[id] = plane;
 231                                 priv->num_planes++;
 232
 233                                 break;
 234                         } else {
 235                                 continue;
 236                         }
 237                 }
 238
 239                 if (i == num_mgrs) {
 240                         /* this shouldn't really happen */
 241                         dev_err(dev->dev, "no managers left for crtc\n");
 242                         return -ENOMEM;
 243                 }
 244         }
 245
 246         /*
 247          * Create normal planes for the remaining overlays:
 248          */
 249         for (; id < num_ovls; id++) {
 250                 struct drm_plane *plane = omap_plane_init(dev, id, false);
 251
 252                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 253                 priv->planes[priv->num_planes++] = plane;
 254         }
 255
 256         for (i = 0; i < priv->num_encoders; i++) {
 257                 struct drm_encoder *encoder = priv->encoders[i];
 258                 struct omap_dss_device *dssdev =
 259                                         omap_encoder_get_dssdev(encoder);
 260                 struct omap_dss_device *output;
 261
 262                 output = omapdss_find_output_from_display(dssdev);
 263
 264                 /* figure out which crtc's we can connect the encoder to: */
 265                 encoder->possible_crtcs = 0;
 266                 for (id = 0; id < priv->num_crtcs; id++) {
 267                         struct drm_crtc *crtc = priv->crtcs[id];
 268                         enum omap_channel crtc_channel;
 269                         enum omap_dss_output_id supported_outputs;
 270
 271                         crtc_channel = omap_crtc_channel(crtc);
 272                         supported_outputs =
 273                                 dss_feat_get_supported_outputs(crtc_channel);
 274
 275                         if (supported_outputs & output->id)
 276                                 encoder->possible_crtcs |= (1 << id);
 277                 }
 278
 279                 omap_dss_put_device(output);
 280         }
 281
 282         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 283                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 284                 priv->num_connectors);
 285
 286         dev->mode_config.min_width = 32;
 287         dev->mode_config.min_height = 32;
 288
 289         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 290          * to fill in these limits properly on different OMAP generations..
 291          */
 292         dev->mode_config.max_width = 2048;
 293         dev->mode_config.max_height = 2048;
 294
 295         dev->mode_config.funcs = &omap_mode_config_funcs;
 296
 297         return 0;
 298 }
 299
 300 static void omap_modeset_free(struct drm_device *dev)
 301 {
 302         drm_mode_config_cleanup(dev);
 303 }
 304
 305 /*
 306  * drm ioctl funcs
 307  */
 308
 309
 310 static int ioctl_get_param(struct drm_device *dev, void *data,
 311                 struct drm_file *file_priv)
 312 {
 313         struct omap_drm_private *priv = dev->dev_private;
 314         struct drm_omap_param *args = data;
 315
 316         DBG("%p: param=%llu", dev, args->param);
 317
 318         switch (args->param) {
 319         case OMAP_PARAM_CHIPSET_ID:
 320                 args->value = priv->omaprev;
 321                 break;
 322         default:
 323                 DBG("unknown parameter %lld", args->param);
 324                 return -EINVAL;
 325         }
 326
 327         return 0;
 328 }
 329
 330 static int ioctl_set_param(struct drm_device *dev, void *data,
 331                 struct drm_file *file_priv)
 332 {
 333         struct drm_omap_param *args = data;
 334
 335         switch (args->param) {
 336         default:
 337                 DBG("unknown parameter %lld", args->param);
 338                 return -EINVAL;
 339         }
 340
 341         return 0;
 342 }
 343
 344 static int ioctl_gem_new(struct drm_device *dev, void *data,
 345                 struct drm_file *file_priv)
 346 {
 347         struct drm_omap_gem_new *args = data;
 348         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 349                         args->size.bytes, args->flags);
 350         return omap_gem_new_handle(dev, file_priv, args->size,
 351                         args->flags, &args->handle);
 352 }
 353
 354 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 355                 struct drm_file *file_priv)
 356 {
 357         struct drm_omap_gem_cpu_prep *args = data;
 358         struct drm_gem_object *obj;
 359         int ret;
 360
 361         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 362
 363         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 364         if (!obj)
 365                 return -ENOENT;
 366
 367         ret = omap_gem_op_sync(obj, args->op);
 368
 369         if (!ret)
 370                 ret = omap_gem_op_start(obj, args->op);
 371
 372         drm_gem_object_unreference_unlocked(obj);
 373
 374         return ret;
 375 }
 376
 377 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 378                 struct drm_file *file_priv)
 379 {
 380         struct drm_omap_gem_cpu_fini *args = data;
 381         struct drm_gem_object *obj;
 382         int ret;
 383
 384         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 385
 386         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 387         if (!obj)
 388                 return -ENOENT;
 389
 390         /* XXX flushy, flushy */
 391         ret = 0;
 392
 393         if (!ret)
 394                 ret = omap_gem_op_finish(obj, args->op);
 395
 396         drm_gem_object_unreference_unlocked(obj);
 397
 398         return ret;
 399 }
 400
 401 static int ioctl_gem_info(struct drm_device *dev, void *data,
 402                 struct drm_file *file_priv)
 403 {
 404         struct drm_omap_gem_info *args = data;
 405         struct drm_gem_object *obj;
 406         int ret = 0;
 407
 408         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 409
 410         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 411         if (!obj)
 412                 return -ENOENT;
 413
 414         args->size = omap_gem_mmap_size(obj);
 415         args->offset = omap_gem_mmap_offset(obj);
 416
 417         drm_gem_object_unreference_unlocked(obj);
 418
 419         return ret;
 420 }
 421
 422 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 423         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
 424         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 425         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
 426         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
 427         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
 428         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
 429 };
 430
 431 /*
 432  * drm driver funcs
 433  */
 434
 435 /**
 436  * load - setup chip and create an initial config
 437  * @dev: DRM device
 438  * @flags: startup flags
 439  *
 440  * The driver load routine has to do several things:
 441  *   - initialize the memory manager
 442  *   - allocate initial config memory
 443  *   - setup the DRM framebuffer with the allocated memory
 444  */
 445 static int dev_load(struct drm_device *dev, unsigned long flags)
 446 {
 447         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
 448         struct omap_drm_private *priv;
 449         int ret;
 450
 451         DBG("load: dev=%p", dev);
 452
 453         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 454         if (!priv)
 455                 return -ENOMEM;
 456
 457         priv->omaprev = pdata->omaprev;
 458
 459         dev->dev_private = priv;
 460
 461         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 462
 463         INIT_LIST_HEAD(&priv->obj_list);
 464
 465         omap_gem_init(dev);
 466
 467         ret = omap_modeset_init(dev);
 468         if (ret) {
 469                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 470                 dev->dev_private = NULL;
 471                 kfree(priv);
 472                 return ret;
 473         }
 474
 475         ret = drm_vblank_init(dev, priv->num_crtcs);
 476         if (ret)
 477                 dev_warn(dev->dev, "could not init vblank\n");
 478
 479         priv->fbdev = omap_fbdev_init(dev);
 480         if (!priv->fbdev) {
 481                 dev_warn(dev->dev, "omap_fbdev_init failed\n");
 482                 /* well, limp along without an fbdev.. maybe X11 will work? */
 483         }
 484
 485         /* store off drm_device for use in pm ops */
 486         dev_set_drvdata(dev->dev, dev);
 487
 488         drm_kms_helper_poll_init(dev);
 489
 490         return 0;
 491 }
 492
 493 static int dev_unload(struct drm_device *dev)
 494 {
 495         struct omap_drm_private *priv = dev->dev_private;
 496
 497         DBG("unload: dev=%p", dev);
 498
 499         drm_kms_helper_poll_fini(dev);
 500         drm_vblank_cleanup(dev);
 501         omap_drm_irq_uninstall(dev);
 502
 503         omap_fbdev_free(dev);
 504         omap_modeset_free(dev);
 505         omap_gem_deinit(dev);
 506
 507         flush_workqueue(priv->wq);
 508         destroy_workqueue(priv->wq);
 509
 510         kfree(dev->dev_private);
 511         dev->dev_private = NULL;
 512
 513         dev_set_drvdata(dev->dev, NULL);
 514
 515         return 0;
 516 }
 517
 518 static int dev_open(struct drm_device *dev, struct drm_file *file)
 519 {
 520         file->driver_priv = NULL;
 521
 522         DBG("open: dev=%p, file=%p", dev, file);
 523
 524         return 0;
 525 }
 526
 527 /**
 528  * lastclose - clean up after all DRM clients have exited
 529  * @dev: DRM device
 530  *
 531  * Take care of cleaning up after all DRM clients have exited.  In the
 532  * mode setting case, we want to restore the kernel's initial mode (just
 533  * in case the last client left us in a bad state).
 534  */
 535 static void dev_lastclose(struct drm_device *dev)
 536 {
 537         int i;
 538
 539         /* we don't support vga-switcheroo.. so just make sure the fbdev
 540          * mode is active
 541          */
 542         struct omap_drm_private *priv = dev->dev_private;
 543         int ret;
 544
 545         DBG("lastclose: dev=%p", dev);
 546
 547         if (priv->rotation_prop) {
 548                 /* need to restore default rotation state.. not sure
 549                  * if there is a cleaner way to restore properties to
 550                  * default state?  Maybe a flag that properties should
 551                  * automatically be restored to default state on
 552                  * lastclose?
 553                  */
 554                 for (i = 0; i < priv->num_crtcs; i++) {
 555                         drm_object_property_set_value(&priv->crtcs[i]->base,
 556                                         priv->rotation_prop, 0);
 557                 }
 558
 559                 for (i = 0; i < priv->num_planes; i++) {
 560                         drm_object_property_set_value(&priv->planes[i]->base,
 561                                         priv->rotation_prop, 0);
 562                 }
 563         }
 564
 565         drm_modeset_lock_all(dev);
 566         ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
 567         drm_modeset_unlock_all(dev);
 568         if (ret)
 569                 DBG("failed to restore crtc mode");
 570 }
 571
 572 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
 573 {
 574         DBG("preclose: dev=%p", dev);
 575 }
 576
 577 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
 578 {
 579         DBG("postclose: dev=%p, file=%p", dev, file);
 580 }
 581
 582 static const struct vm_operations_struct omap_gem_vm_ops = {
 583         .fault = omap_gem_fault,
 584         .open = drm_gem_vm_open,
 585         .close = drm_gem_vm_close,
 586 };
 587
 588 static const struct file_operations omapdriver_fops = {
 589                 .owner = THIS_MODULE,
 590                 .open = drm_open,
 591                 .unlocked_ioctl = drm_ioctl,
 592                 .release = drm_release,
 593                 .mmap = omap_gem_mmap,
 594                 .poll = drm_poll,
 595                 .read = drm_read,
 596                 .llseek = noop_llseek,
 597 };
 598
 599 static struct drm_driver omap_drm_driver = {
 600                 .driver_features =
 601                                 DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
 602                 .load = dev_load,
 603                 .unload = dev_unload,
 604                 .open = dev_open,
 605                 .lastclose = dev_lastclose,
 606                 .preclose = dev_preclose,
 607                 .postclose = dev_postclose,
 608                 .get_vblank_counter = drm_vblank_count,
 609                 .enable_vblank = omap_irq_enable_vblank,
 610                 .disable_vblank = omap_irq_disable_vblank,
 611                 .irq_preinstall = omap_irq_preinstall,
 612                 .irq_postinstall = omap_irq_postinstall,
 613                 .irq_uninstall = omap_irq_uninstall,
 614                 .irq_handler = omap_irq_handler,
 615 #ifdef CONFIG_DEBUG_FS
 616                 .debugfs_init = omap_debugfs_init,
 617                 .debugfs_cleanup = omap_debugfs_cleanup,
 618 #endif
 619                 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 620                 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 621                 .gem_prime_export = omap_gem_prime_export,
 622                 .gem_prime_import = omap_gem_prime_import,
 623                 .gem_init_object = omap_gem_init_object,
 624                 .gem_free_object = omap_gem_free_object,
 625                 .gem_vm_ops = &omap_gem_vm_ops,
 626                 .dumb_create = omap_gem_dumb_create,
 627                 .dumb_map_offset = omap_gem_dumb_map_offset,
 628                 .dumb_destroy = drm_gem_dumb_destroy,
 629                 .ioctls = ioctls,
 630                 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 631                 .fops = &omapdriver_fops,
 632                 .name = DRIVER_NAME,
 633                 .desc = DRIVER_DESC,
 634                 .date = DRIVER_DATE,
 635                 .major = DRIVER_MAJOR,
 636                 .minor = DRIVER_MINOR,
 637                 .patchlevel = DRIVER_PATCHLEVEL,
 638 };
 639
 640 static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
 641 {
 642         DBG("");
 643         return 0;
 644 }
 645
 646 static int pdev_resume(struct platform_device *device)
 647 {
 648         DBG("");
 649         return 0;
 650 }
 651
 652 static void pdev_shutdown(struct platform_device *device)
 653 {
 654         DBG("");
 655 }
 656
 657 static int pdev_probe(struct platform_device *device)
 658 {
 659         if (omapdss_is_initialized() == false)
 660                 return -EPROBE_DEFER;
 661
 662         DBG("%s", device->name);
 663         return drm_platform_init(&omap_drm_driver, device);
 664 }
 665
 666 static int pdev_remove(struct platform_device *device)
 667 {
 668         DBG("");
 669         drm_platform_exit(&omap_drm_driver, device);
 670
 671         platform_driver_unregister(&omap_dmm_driver);
 672         return 0;
 673 }
 674
 675 #ifdef CONFIG_PM
 676 static const struct dev_pm_ops omapdrm_pm_ops = {
 677         .resume = omap_gem_resume,
 678 };
 679 #endif
 680
 681 static struct platform_driver pdev = {
 682                 .driver = {
 683                         .name = DRIVER_NAME,
 684                         .owner = THIS_MODULE,
 685 #ifdef CONFIG_PM
 686                         .pm = &omapdrm_pm_ops,
 687 #endif
 688                 },
 689                 .probe = pdev_probe,
 690                 .remove = pdev_remove,
 691                 .suspend = pdev_suspend,
 692                 .resume = pdev_resume,
 693                 .shutdown = pdev_shutdown,
 694 };
 695
 696 static int __init omap_drm_init(void)
 697 {
 698         DBG("init");
 699         if (platform_driver_register(&omap_dmm_driver)) {
 700                 /* we can continue on without DMM.. so not fatal */
 701                 dev_err(NULL, "DMM registration failed\n");
 702         }
 703         return platform_driver_register(&pdev);
 704 }
 705
 706 static void __exit omap_drm_fini(void)
 707 {
 708         DBG("fini");
 709         platform_driver_unregister(&pdev);
 710 }
 711
 712 /* need late_initcall() so we load after dss_driver's are loaded */
 713 late_initcall(omap_drm_init);
 714 module_exit(omap_drm_fini);
 715
 716 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 717 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 718 MODULE_ALIAS("platform:" DRIVER_NAME);
 719 MODULE_LICENSE("GPL v2");